dp_rx_mon_dest.c 35 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /**
  40. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  41. * (WBM), following error handling
  42. *
  43. * @dp_pdev: core txrx pdev context
  44. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  45. * Return: QDF_STATUS
  46. */
  47. static QDF_STATUS
  48. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  49. void *buf_addr_info, int mac_id)
  50. {
  51. struct dp_srng *dp_srng;
  52. void *hal_srng;
  53. void *hal_soc;
  54. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  55. void *src_srng_desc;
  56. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  57. hal_soc = dp_pdev->soc->hal_soc;
  58. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  59. hal_srng = dp_srng->hal_srng;
  60. qdf_assert(hal_srng);
  61. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  62. /* TODO */
  63. /*
  64. * Need API to convert from hal_ring pointer to
  65. * Ring Type / Ring Id combo
  66. */
  67. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  68. "%s %d : \
  69. HAL RING Access For WBM Release SRNG Failed -- %pK",
  70. __func__, __LINE__, hal_srng);
  71. goto done;
  72. }
  73. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  74. if (qdf_likely(src_srng_desc)) {
  75. /* Return link descriptor through WBM ring (SW2WBM)*/
  76. hal_rx_mon_msdu_link_desc_set(hal_soc,
  77. src_srng_desc, buf_addr_info);
  78. status = QDF_STATUS_SUCCESS;
  79. } else {
  80. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  81. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  82. __func__, __LINE__);
  83. }
  84. done:
  85. hal_srng_access_end(hal_soc, hal_srng);
  86. return status;
  87. }
  88. /**
  89. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  90. * multiple nbufs. This function
  91. * is to return data length in
  92. * fragmented buffer
  93. *
  94. * @total_len: pointer to remaining data length.
  95. * @frag_len: pointer to data length in this fragment.
  96. */
  97. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  98. uint32_t *frag_len)
  99. {
  100. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  101. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  102. *total_len -= *frag_len;
  103. } else {
  104. *frag_len = *total_len;
  105. *total_len = 0;
  106. }
  107. }
  108. /**
  109. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  110. * (WBM), following error handling
  111. *
  112. * @soc: core DP main context
  113. * @mac_id: mac id which is one of 3 mac_ids
  114. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  115. * @head_msdu: head of msdu to be popped
  116. * @tail_msdu: tail of msdu to be popped
  117. * @npackets: number of packet to be popped
  118. * @ppdu_id: ppdu id of processing ppdu
  119. * @head: head of descs list to be freed
  120. * @tail: tail of decs list to be freed
  121. * Return: number of msdu in MPDU to be popped
  122. */
  123. static inline uint32_t
  124. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  125. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  126. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  127. union dp_rx_desc_list_elem_t **head,
  128. union dp_rx_desc_list_elem_t **tail)
  129. {
  130. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  131. void *rx_desc_tlv;
  132. void *rx_msdu_link_desc;
  133. qdf_nbuf_t msdu;
  134. qdf_nbuf_t last;
  135. struct hal_rx_msdu_list msdu_list;
  136. uint16_t num_msdus;
  137. uint32_t rx_buf_size, rx_pkt_offset;
  138. struct hal_buf_info buf_info;
  139. void *p_buf_addr_info;
  140. void *p_last_buf_addr_info;
  141. uint32_t rx_bufs_used = 0;
  142. uint32_t msdu_ppdu_id, msdu_cnt;
  143. uint8_t *data;
  144. uint32_t i;
  145. uint32_t total_frag_len = 0, frag_len = 0;
  146. bool is_frag, is_first_msdu;
  147. bool drop_mpdu = false;
  148. msdu = 0;
  149. last = NULL;
  150. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  151. &p_last_buf_addr_info, &msdu_cnt);
  152. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  153. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  154. uint8_t rxdma_err =
  155. hal_rx_reo_ent_rxdma_error_code_get(
  156. rxdma_dst_ring_desc);
  157. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  158. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  159. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  160. drop_mpdu = true;
  161. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  162. }
  163. }
  164. is_frag = false;
  165. is_first_msdu = true;
  166. do {
  167. rx_msdu_link_desc =
  168. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info,
  169. mac_id);
  170. qdf_assert(rx_msdu_link_desc);
  171. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  172. for (i = 0; i < num_msdus; i++) {
  173. uint32_t l2_hdr_offset;
  174. struct dp_rx_desc *rx_desc =
  175. dp_rx_cookie_2_va_mon_buf(soc,
  176. msdu_list.sw_cookie[i]);
  177. qdf_assert(rx_desc);
  178. msdu = rx_desc->nbuf;
  179. if (rx_desc->unmapped == 0) {
  180. qdf_nbuf_unmap_single(soc->osdev, msdu,
  181. QDF_DMA_FROM_DEVICE);
  182. rx_desc->unmapped = 1;
  183. }
  184. if (drop_mpdu) {
  185. qdf_nbuf_free(msdu);
  186. msdu = NULL;
  187. goto next_msdu;
  188. }
  189. data = qdf_nbuf_data(msdu);
  190. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  191. QDF_TRACE(QDF_MODULE_ID_DP,
  192. QDF_TRACE_LEVEL_DEBUG,
  193. "[%s] i=%d, ppdu_id=%x, num_msdus = %u\n",
  194. __func__, i, *ppdu_id,
  195. num_msdus);
  196. if (is_first_msdu) {
  197. if (!HAL_RX_HW_DESC_MPDU_VALID(
  198. rx_desc_tlv)) {
  199. drop_mpdu = true;
  200. qdf_nbuf_free(msdu);
  201. msdu = NULL;
  202. goto next_msdu;
  203. }
  204. msdu_ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(
  205. rx_desc_tlv);
  206. is_first_msdu = false;
  207. QDF_TRACE(QDF_MODULE_ID_DP,
  208. QDF_TRACE_LEVEL_DEBUG,
  209. "[%s] msdu_ppdu_id=%x",
  210. __func__, msdu_ppdu_id);
  211. if (*ppdu_id > msdu_ppdu_id)
  212. QDF_TRACE(QDF_MODULE_ID_DP,
  213. QDF_TRACE_LEVEL_DEBUG,
  214. "[%s][%d] ppdu_id=%d "
  215. "msdu_ppdu_id=%d",
  216. __func__, __LINE__, *ppdu_id,
  217. msdu_ppdu_id);
  218. if ((*ppdu_id < msdu_ppdu_id) && (
  219. (msdu_ppdu_id - *ppdu_id) <
  220. NOT_PPDU_ID_WRAP_AROUND)) {
  221. *ppdu_id = msdu_ppdu_id;
  222. return rx_bufs_used;
  223. } else if ((*ppdu_id > msdu_ppdu_id) && (
  224. (*ppdu_id - msdu_ppdu_id) >
  225. NOT_PPDU_ID_WRAP_AROUND)) {
  226. *ppdu_id = msdu_ppdu_id;
  227. return rx_bufs_used;
  228. }
  229. }
  230. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  231. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  232. rx_desc_tlv,
  233. &(dp_pdev->ppdu_info.rx_status));
  234. if (msdu_list.msdu_info[i].msdu_flags &
  235. HAL_MSDU_F_MSDU_CONTINUATION) {
  236. if (!is_frag) {
  237. total_frag_len =
  238. msdu_list.msdu_info[i].msdu_len;
  239. is_frag = true;
  240. }
  241. dp_mon_adjust_frag_len(
  242. &total_frag_len, &frag_len);
  243. } else {
  244. if (is_frag) {
  245. dp_mon_adjust_frag_len(
  246. &total_frag_len, &frag_len);
  247. } else {
  248. frag_len =
  249. msdu_list.msdu_info[i].msdu_len;
  250. }
  251. is_frag = false;
  252. msdu_cnt--;
  253. }
  254. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  255. "%s total_len %u frag_len %u flags %u",
  256. __func__, total_frag_len, frag_len,
  257. msdu_list.msdu_info[i].msdu_flags);
  258. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  259. /*
  260. * HW structures call this L3 header padding
  261. * -- even though this is actually the offset
  262. * from the buffer beginning where the L2
  263. * header begins.
  264. */
  265. l2_hdr_offset =
  266. hal_rx_msdu_end_l3_hdr_padding_get(data);
  267. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  268. + frag_len;
  269. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  270. #if 0
  271. /* Disble it.see packet on msdu done set to 0 */
  272. /*
  273. * Check if DMA completed -- msdu_done is the
  274. * last bit to be written
  275. */
  276. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  277. QDF_TRACE(QDF_MODULE_ID_DP,
  278. QDF_TRACE_LEVEL_ERROR,
  279. "%s:%d: Pkt Desc",
  280. __func__, __LINE__);
  281. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  282. QDF_TRACE_LEVEL_ERROR,
  283. rx_desc_tlv, 128);
  284. qdf_assert_always(0);
  285. }
  286. #endif
  287. QDF_TRACE(QDF_MODULE_ID_DP,
  288. QDF_TRACE_LEVEL_DEBUG,
  289. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %lu",
  290. __func__, rx_pkt_offset, l2_hdr_offset,
  291. msdu_list.msdu_info[i].msdu_len,
  292. qdf_nbuf_data(msdu), qdf_nbuf_len(msdu));
  293. if (head_msdu && *head_msdu == NULL) {
  294. *head_msdu = msdu;
  295. } else {
  296. if (last)
  297. qdf_nbuf_set_next(last, msdu);
  298. }
  299. last = msdu;
  300. next_msdu:
  301. rx_bufs_used++;
  302. dp_rx_add_to_free_desc_list(head,
  303. tail, rx_desc);
  304. }
  305. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  306. &p_buf_addr_info);
  307. if (dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info,
  308. mac_id) != QDF_STATUS_SUCCESS)
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  310. "dp_rx_mon_link_desc_return failed");
  311. p_last_buf_addr_info = p_buf_addr_info;
  312. } while (buf_info.paddr && msdu_cnt);
  313. if (last)
  314. qdf_nbuf_set_next(last, NULL);
  315. *tail_msdu = msdu;
  316. return rx_bufs_used;
  317. }
  318. static inline
  319. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  320. {
  321. uint8_t *data;
  322. uint32_t rx_pkt_offset, l2_hdr_offset;
  323. data = qdf_nbuf_data(msdu);
  324. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  325. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  326. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  327. }
  328. static inline
  329. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  330. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  331. struct cdp_mon_status *rx_status)
  332. {
  333. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  334. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  335. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  336. is_amsdu, is_first_frag, amsdu_pad;
  337. void *rx_desc;
  338. char *hdr_desc;
  339. unsigned char *dest;
  340. struct ieee80211_frame *wh;
  341. struct ieee80211_qoscntl *qos;
  342. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  343. head_frag_list = NULL;
  344. mpdu_buf = NULL;
  345. /* The nbuf has been pulled just beyond the status and points to the
  346. * payload
  347. */
  348. if (!head_msdu)
  349. goto mpdu_stitch_fail;
  350. msdu_orig = head_msdu;
  351. rx_desc = qdf_nbuf_data(msdu_orig);
  352. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  353. /* It looks like there is some issue on MPDU len err */
  354. /* Need further investigate if drop the packet */
  355. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  356. return NULL;
  357. }
  358. rx_desc = qdf_nbuf_data(last_msdu);
  359. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  360. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  361. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  362. /* Fill out the rx_status from the PPDU start and end fields */
  363. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  364. rx_desc = qdf_nbuf_data(head_msdu);
  365. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  366. /* Easy case - The MSDU status indicates that this is a non-decapped
  367. * packet in RAW mode.
  368. */
  369. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  370. /* Note that this path might suffer from headroom unavailabilty
  371. * - but the RX status is usually enough
  372. */
  373. dp_rx_msdus_set_payload(head_msdu);
  374. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  375. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  376. __func__, __LINE__, head_msdu, head_msdu->next,
  377. last_msdu, last_msdu->next);
  378. mpdu_buf = head_msdu;
  379. prev_buf = mpdu_buf;
  380. frag_list_sum_len = 0;
  381. msdu = qdf_nbuf_next(head_msdu);
  382. is_first_frag = 1;
  383. while (msdu) {
  384. dp_rx_msdus_set_payload(msdu);
  385. if (is_first_frag) {
  386. is_first_frag = 0;
  387. head_frag_list = msdu;
  388. }
  389. frag_list_sum_len += qdf_nbuf_len(msdu);
  390. /* Maintain the linking of the cloned MSDUS */
  391. qdf_nbuf_set_next_ext(prev_buf, msdu);
  392. /* Move to the next */
  393. prev_buf = msdu;
  394. msdu = qdf_nbuf_next(msdu);
  395. }
  396. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  397. /* If there were more fragments to this RAW frame */
  398. if (head_frag_list) {
  399. if (frag_list_sum_len <
  400. sizeof(struct ieee80211_frame_min_one)) {
  401. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  402. return NULL;
  403. }
  404. frag_list_sum_len -= HAL_RX_FCS_LEN;
  405. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  406. frag_list_sum_len);
  407. qdf_nbuf_set_next(mpdu_buf, NULL);
  408. }
  409. goto mpdu_stitch_done;
  410. }
  411. /* Decap mode:
  412. * Calculate the amount of header in decapped packet to knock off based
  413. * on the decap type and the corresponding number of raw bytes to copy
  414. * status header
  415. */
  416. rx_desc = qdf_nbuf_data(head_msdu);
  417. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  418. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  419. "[%s][%d] decap format not raw",
  420. __func__, __LINE__);
  421. /* Base size */
  422. wifi_hdr_len = sizeof(struct ieee80211_frame);
  423. wh = (struct ieee80211_frame *)hdr_desc;
  424. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  425. if (dir == IEEE80211_FC1_DIR_DSTODS)
  426. wifi_hdr_len += 6;
  427. is_amsdu = 0;
  428. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  429. qos = (struct ieee80211_qoscntl *)
  430. (hdr_desc + wifi_hdr_len);
  431. wifi_hdr_len += 2;
  432. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  433. }
  434. /*Calculate security header length based on 'Protected'
  435. * and 'EXT_IV' flag
  436. * */
  437. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  438. char *iv = (char *)wh + wifi_hdr_len;
  439. if (iv[3] & KEY_EXTIV)
  440. sec_hdr_len = 8;
  441. else
  442. sec_hdr_len = 4;
  443. } else {
  444. sec_hdr_len = 0;
  445. }
  446. wifi_hdr_len += sec_hdr_len;
  447. /* MSDU related stuff LLC - AMSDU subframe header etc */
  448. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  449. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  450. /* "Decap" header to remove from MSDU buffer */
  451. decap_hdr_pull_bytes = 14;
  452. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  453. * status of the now decapped first msdu. Leave enough headroom for
  454. * accomodating any radio-tap /prism like PHY header
  455. */
  456. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  457. MAX_MONITOR_HEADER + mpdu_buf_len,
  458. MAX_MONITOR_HEADER, 4, FALSE);
  459. if (!mpdu_buf)
  460. goto mpdu_stitch_done;
  461. /* Copy the MPDU related header and enc headers into the first buffer
  462. * - Note that there can be a 2 byte pad between heaader and enc header
  463. */
  464. prev_buf = mpdu_buf;
  465. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  466. if (!dest)
  467. goto mpdu_stitch_fail;
  468. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  469. hdr_desc += wifi_hdr_len;
  470. #if 0
  471. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  472. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  473. hdr_desc += sec_hdr_len;
  474. #endif
  475. /* The first LLC len is copied into the MPDU buffer */
  476. frag_list_sum_len = 0;
  477. msdu_orig = head_msdu;
  478. is_first_frag = 1;
  479. amsdu_pad = 0;
  480. while (msdu_orig) {
  481. /* TODO: intra AMSDU padding - do we need it ??? */
  482. msdu = msdu_orig;
  483. if (is_first_frag) {
  484. head_frag_list = msdu;
  485. } else {
  486. /* Reload the hdr ptr only on non-first MSDUs */
  487. rx_desc = qdf_nbuf_data(msdu_orig);
  488. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  489. }
  490. /* Copy this buffers MSDU related status into the prev buffer */
  491. if (is_first_frag) {
  492. is_first_frag = 0;
  493. }
  494. dest = qdf_nbuf_put_tail(prev_buf,
  495. msdu_llc_len + amsdu_pad);
  496. if (!dest)
  497. goto mpdu_stitch_fail;
  498. dest += amsdu_pad;
  499. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  500. dp_rx_msdus_set_payload(msdu);
  501. /* Push the MSDU buffer beyond the decap header */
  502. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  503. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  504. + amsdu_pad;
  505. /* Set up intra-AMSDU pad to be added to start of next buffer -
  506. * AMSDU pad is 4 byte pad on AMSDU subframe */
  507. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  508. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  509. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  510. * probably iterate all the frags cloning them along the way and
  511. * and also updating the prev_buf pointer
  512. */
  513. /* Move to the next */
  514. prev_buf = msdu;
  515. msdu_orig = qdf_nbuf_next(msdu_orig);
  516. }
  517. #if 0
  518. /* Add in the trailer section - encryption trailer + FCS */
  519. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  520. frag_list_sum_len += HAL_RX_FCS_LEN;
  521. #endif
  522. frag_list_sum_len -= msdu_llc_len;
  523. /* TODO: Convert this to suitable adf routines */
  524. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  525. frag_list_sum_len);
  526. mpdu_stitch_done:
  527. /* Check if this buffer contains the PPDU end status for TSF */
  528. /* Need revist this code to see where we can get tsf timestamp */
  529. #if 0
  530. /* PPDU end TLV will be retrieved from monitor status ring */
  531. last_mpdu =
  532. (*(((u_int32_t *)&rx_desc->attention)) &
  533. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  534. RX_ATTENTION_0_LAST_MPDU_LSB;
  535. if (last_mpdu)
  536. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  537. #endif
  538. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  539. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  540. __func__, __LINE__,
  541. mpdu_buf, mpdu_buf->len);
  542. return mpdu_buf;
  543. mpdu_stitch_fail:
  544. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  546. "%s mpdu_stitch_fail mpdu_buf %pK",
  547. __func__, mpdu_buf);
  548. /* Free the head buffer */
  549. qdf_nbuf_free(mpdu_buf);
  550. }
  551. return NULL;
  552. }
  553. /**
  554. * dp_rx_extract_radiotap_info(): Extract and populate information in
  555. * struct mon_rx_status type
  556. * @rx_status: Receive status
  557. * @mon_rx_status: Monitor mode status
  558. *
  559. * Returns: None
  560. */
  561. static inline
  562. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  563. struct mon_rx_status *rx_mon_status)
  564. {
  565. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  566. rx_mon_status->chan_freq = rx_status->rs_freq;
  567. rx_mon_status->chan_num = rx_status->rs_channel;
  568. rx_mon_status->chan_flags = rx_status->rs_flags;
  569. rx_mon_status->rate = rx_status->rs_datarate;
  570. /* TODO: rx_mon_status->ant_signal_db */
  571. /* TODO: rx_mon_status->nr_ant */
  572. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  573. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  574. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  575. /* TODO: rx_mon_status->ldpc */
  576. /* TODO: rx_mon_status->beamformed */
  577. /* TODO: rx_mon_status->vht_flags */
  578. /* TODO: rx_mon_status->vht_flag_values1 */
  579. }
  580. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  581. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  582. {
  583. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  584. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  585. qdf_nbuf_t mon_skb, skb_next;
  586. qdf_nbuf_t mon_mpdu = NULL;
  587. if ((pdev->monitor_vdev == NULL) ||
  588. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  589. goto mon_deliver_fail;
  590. }
  591. /* restitch mon MPDU for delivery via monitor interface */
  592. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  593. tail_msdu, rs);
  594. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  595. pdev->ppdu_info.rx_status.ppdu_id =
  596. pdev->ppdu_info.com_info.ppdu_id;
  597. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  598. pdev->ppdu_info.rx_status.chan_noise_floor =
  599. pdev->chan_noise_floor;
  600. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  601. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  602. pdev->monitor_vdev->osif_rx_mon(
  603. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  604. } else {
  605. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  606. "[%s][%d] mon_mpdu=%pK pdev->monitor_vdev %pK osif_vdev %pK",
  607. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  608. pdev->monitor_vdev->osif_vdev);
  609. goto mon_deliver_fail;
  610. }
  611. return QDF_STATUS_SUCCESS;
  612. mon_deliver_fail:
  613. mon_skb = head_msdu;
  614. while (mon_skb) {
  615. skb_next = qdf_nbuf_next(mon_skb);
  616. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  617. "[%s][%d] mon_skb=%pK len %u", __func__,
  618. __LINE__, mon_skb, mon_skb->len);
  619. qdf_nbuf_free(mon_skb);
  620. mon_skb = skb_next;
  621. }
  622. return QDF_STATUS_E_INVAL;
  623. }
  624. /**
  625. * dp_rx_mon_deliver_non_std()
  626. * @soc: core txrx main contex
  627. * @mac_id: MAC ID
  628. *
  629. * This function delivers the radio tap and dummy MSDU
  630. * into user layer application for preamble only PPDU.
  631. *
  632. * Return: QDF_STATUS
  633. */
  634. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  635. uint32_t mac_id)
  636. {
  637. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  638. ol_txrx_rx_mon_fp osif_rx_mon;
  639. qdf_nbuf_t dummy_msdu;
  640. /* Sanity checking */
  641. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  642. goto mon_deliver_non_std_fail;
  643. /* Generate a dummy skb_buff */
  644. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  645. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  646. MAX_MONITOR_HEADER, 4, FALSE);
  647. if (!dummy_msdu)
  648. goto allocate_dummy_msdu_fail;
  649. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  650. qdf_nbuf_set_next(dummy_msdu, NULL);
  651. pdev->ppdu_info.rx_status.ppdu_id =
  652. pdev->ppdu_info.com_info.ppdu_id;
  653. /* Apply the radio header to this dummy skb */
  654. qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  655. dummy_msdu, MAX_MONITOR_HEADER);
  656. /* deliver to the user layer application */
  657. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  658. dummy_msdu, NULL);
  659. /* Clear rx_status*/
  660. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  661. sizeof(pdev->ppdu_info.rx_status));
  662. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  663. return QDF_STATUS_SUCCESS;
  664. allocate_dummy_msdu_fail:
  665. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  666. __func__, __LINE__, dummy_msdu);
  667. mon_deliver_non_std_fail:
  668. return QDF_STATUS_E_INVAL;
  669. }
  670. /**
  671. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  672. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  673. * @soc: core txrx main contex
  674. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  675. * @quota: No. of units (packets) that can be serviced in one shot.
  676. *
  677. * This function implements the core of Rx functionality. This is
  678. * expected to handle only non-error frames.
  679. *
  680. * Return: none
  681. */
  682. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  683. {
  684. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  685. void *hal_soc;
  686. void *rxdma_dst_ring_desc;
  687. void *mon_dst_srng;
  688. union dp_rx_desc_list_elem_t *head = NULL;
  689. union dp_rx_desc_list_elem_t *tail = NULL;
  690. uint32_t ppdu_id;
  691. uint32_t rx_bufs_used;
  692. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  693. struct cdp_pdev_mon_stats *rx_mon_stats;
  694. mon_dst_srng = pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  695. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  696. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  697. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  698. __func__, __LINE__, mon_dst_srng);
  699. return;
  700. }
  701. hal_soc = soc->hal_soc;
  702. qdf_assert(hal_soc);
  703. qdf_spin_lock_bh(&pdev->mon_lock);
  704. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  705. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  706. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  707. __func__, __LINE__, mon_dst_srng);
  708. return;
  709. }
  710. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  711. rx_bufs_used = 0;
  712. rx_mon_stats = &pdev->rx_mon_stats;
  713. while (qdf_likely(rxdma_dst_ring_desc =
  714. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  715. qdf_nbuf_t head_msdu, tail_msdu;
  716. uint32_t npackets;
  717. head_msdu = (qdf_nbuf_t) NULL;
  718. tail_msdu = (qdf_nbuf_t) NULL;
  719. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  720. rxdma_dst_ring_desc,
  721. &head_msdu, &tail_msdu,
  722. &npackets, &ppdu_id,
  723. &head, &tail);
  724. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  725. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  726. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  727. sizeof(pdev->ppdu_info.rx_status));
  728. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  729. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  730. __func__, __LINE__,
  731. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  732. break;
  733. }
  734. if (qdf_likely((head_msdu != NULL) && (tail_msdu != NULL))) {
  735. rx_mon_stats->dest_mpdu_done++;
  736. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  737. }
  738. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  739. mon_dst_srng);
  740. }
  741. hal_srng_access_end(hal_soc, mon_dst_srng);
  742. qdf_spin_unlock_bh(&pdev->mon_lock);
  743. if (rx_bufs_used) {
  744. rx_mon_stats->dest_ppdu_done++;
  745. dp_rx_buffers_replenish(soc, mac_id,
  746. &pdev->rxdma_mon_buf_ring[mac_for_pdev],
  747. &soc->rx_desc_mon[mac_id], rx_bufs_used, &head, &tail);
  748. }
  749. }
  750. #ifndef QCA_WIFI_QCA6390
  751. static QDF_STATUS
  752. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  753. uint8_t pdev_id = pdev->pdev_id;
  754. struct dp_soc *soc = pdev->soc;
  755. union dp_rx_desc_list_elem_t *desc_list = NULL;
  756. union dp_rx_desc_list_elem_t *tail = NULL;
  757. struct dp_srng *rxdma_srng;
  758. uint32_t rxdma_entries;
  759. struct rx_desc_pool *rx_desc_pool;
  760. QDF_STATUS status;
  761. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  762. rxdma_srng = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  763. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  764. soc->hal_soc,
  765. RXDMA_MONITOR_BUF);
  766. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  768. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  769. , __func__, pdev_id, rxdma_entries*3);
  770. status = dp_rx_desc_pool_alloc(soc, mac_id,
  771. rxdma_entries*3, rx_desc_pool);
  772. if (!QDF_IS_STATUS_SUCCESS(status)) {
  773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  774. "%s: dp_rx_desc_pool_alloc() failed ", __func__);
  775. return status;
  776. }
  777. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  778. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  779. "%s: Mon RX Buffers Replenish pdev_id=%d",
  780. __func__, pdev_id);
  781. status = dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  782. rxdma_entries, &desc_list, &tail);
  783. if (!QDF_IS_STATUS_SUCCESS(status)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. "%s: dp_rx_buffers_replenish() failed",
  786. __func__);
  787. return status;
  788. }
  789. return QDF_STATUS_SUCCESS;
  790. }
  791. static QDF_STATUS
  792. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  793. {
  794. struct dp_soc *soc = pdev->soc;
  795. struct rx_desc_pool *rx_desc_pool;
  796. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  797. if (rx_desc_pool->pool_size != 0)
  798. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  799. return QDF_STATUS_SUCCESS;
  800. }
  801. /*
  802. * Allocate and setup link descriptor pool that will be used by HW for
  803. * various link and queue descriptors and managed by WBM
  804. */
  805. static
  806. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  807. {
  808. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  809. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  810. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  811. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  812. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  813. uint32_t total_link_descs, total_mem_size;
  814. uint32_t num_link_desc_banks;
  815. uint32_t last_bank_size = 0;
  816. uint32_t entry_size, num_entries;
  817. void *mon_desc_srng;
  818. uint32_t num_replenish_buf;
  819. struct dp_srng *dp_srng;
  820. int i;
  821. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  822. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  823. soc->hal_soc, RXDMA_MONITOR_DESC);
  824. /* Round up to power of 2 */
  825. total_link_descs = 1;
  826. while (total_link_descs < num_entries)
  827. total_link_descs <<= 1;
  828. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  829. "%s: total_link_descs: %u, link_desc_size: %d",
  830. __func__, total_link_descs, link_desc_size);
  831. total_mem_size = total_link_descs * link_desc_size;
  832. total_mem_size += link_desc_align;
  833. if (total_mem_size <= max_alloc_size) {
  834. num_link_desc_banks = 0;
  835. last_bank_size = total_mem_size;
  836. } else {
  837. num_link_desc_banks = (total_mem_size) /
  838. (max_alloc_size - link_desc_align);
  839. last_bank_size = total_mem_size %
  840. (max_alloc_size - link_desc_align);
  841. }
  842. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  843. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  844. max_alloc_size: %d last_bank_size: %d",
  845. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  846. last_bank_size);
  847. for (i = 0; i < num_link_desc_banks; i++) {
  848. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  849. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  850. max_alloc_size,
  851. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  852. base_paddr_unaligned));
  853. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  854. base_vaddr_unaligned) {
  855. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  856. "%s: Link desc memory allocation failed",
  857. __func__);
  858. goto fail;
  859. }
  860. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  861. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  862. (void *)((unsigned long)
  863. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  864. base_vaddr_unaligned) +
  865. ((unsigned long)
  866. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  867. base_vaddr_unaligned) %
  868. link_desc_align));
  869. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  870. (unsigned long)
  871. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  872. base_paddr_unaligned) +
  873. ((unsigned long)
  874. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  875. (unsigned long)
  876. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  877. base_vaddr_unaligned));
  878. }
  879. if (last_bank_size) {
  880. /* Allocate last bank in case total memory required is not exact
  881. * multiple of max_alloc_size
  882. */
  883. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  884. qdf_mem_alloc_consistent(soc->osdev,
  885. soc->osdev->dev, last_bank_size,
  886. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  887. base_paddr_unaligned));
  888. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  889. base_vaddr_unaligned == NULL) {
  890. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  891. "%s: allocation failed for mon link desc pool",
  892. __func__);
  893. goto fail;
  894. }
  895. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  896. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  897. (void *)((unsigned long)
  898. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  899. base_vaddr_unaligned) +
  900. ((unsigned long)
  901. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  902. base_vaddr_unaligned) %
  903. link_desc_align));
  904. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  905. (unsigned long)
  906. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  907. base_paddr_unaligned) +
  908. ((unsigned long)
  909. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  910. (unsigned long)
  911. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  912. base_vaddr_unaligned));
  913. }
  914. /* Allocate and setup link descriptor idle list for HW internal use */
  915. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  916. total_mem_size = entry_size * total_link_descs;
  917. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  918. num_replenish_buf = 0;
  919. if (total_mem_size <= max_alloc_size) {
  920. void *desc;
  921. for (i = 0;
  922. i < MAX_MON_LINK_DESC_BANKS &&
  923. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  924. i++) {
  925. uint32_t num_entries =
  926. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  927. (unsigned long)
  928. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  929. (unsigned long)
  930. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  931. base_vaddr_unaligned)) / link_desc_size;
  932. unsigned long paddr =
  933. (unsigned long)
  934. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  935. unsigned long vaddr =
  936. (unsigned long)
  937. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  938. hal_srng_access_start_unlocked(soc->hal_soc,
  939. mon_desc_srng);
  940. while (num_entries && (desc =
  941. hal_srng_src_get_next(soc->hal_soc,
  942. mon_desc_srng))) {
  943. hal_set_link_desc_addr(desc, i, paddr);
  944. num_entries--;
  945. num_replenish_buf++;
  946. paddr += link_desc_size;
  947. vaddr += link_desc_size;
  948. }
  949. hal_srng_access_end_unlocked(soc->hal_soc,
  950. mon_desc_srng);
  951. }
  952. } else {
  953. qdf_assert(0);
  954. }
  955. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  956. "%s: successfully replenished %d buffer",
  957. __func__, num_replenish_buf);
  958. return QDF_STATUS_SUCCESS;
  959. fail:
  960. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  961. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  962. base_vaddr_unaligned) {
  963. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  964. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  965. dp_pdev->link_desc_banks[mac_for_pdev][i].
  966. base_vaddr_unaligned,
  967. dp_pdev->link_desc_banks[mac_for_pdev][i].
  968. base_paddr_unaligned, 0);
  969. dp_pdev->link_desc_banks[mac_for_pdev][i].
  970. base_vaddr_unaligned = NULL;
  971. }
  972. }
  973. return QDF_STATUS_E_FAILURE;
  974. }
  975. /*
  976. * Free link descriptor pool that was setup HW
  977. */
  978. static
  979. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  980. {
  981. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  982. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  983. int i;
  984. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  985. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  986. base_vaddr_unaligned) {
  987. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  988. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  989. dp_pdev->link_desc_banks[mac_for_pdev][i].
  990. base_vaddr_unaligned,
  991. dp_pdev->link_desc_banks[mac_for_pdev][i].
  992. base_paddr_unaligned, 0);
  993. dp_pdev->link_desc_banks[mac_for_pdev][i].
  994. base_vaddr_unaligned = NULL;
  995. }
  996. }
  997. }
  998. /**
  999. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1000. * @pdev: core txrx pdev context
  1001. *
  1002. * This function will attach a DP RX for monitor mode instance into
  1003. * the main device (SOC) context. Will allocate dp rx resource and
  1004. * initialize resources.
  1005. *
  1006. * Return: QDF_STATUS_SUCCESS: success
  1007. * QDF_STATUS_E_RESOURCES: Error return
  1008. */
  1009. QDF_STATUS
  1010. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1011. struct dp_soc *soc = pdev->soc;
  1012. QDF_STATUS status;
  1013. uint8_t pdev_id = pdev->pdev_id;
  1014. int mac_id;
  1015. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1016. "%s: pdev attach id=%d", __func__, pdev_id);
  1017. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1018. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1019. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1020. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1021. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1022. "%s: dp_rx_pdev_mon_buf_attach() failed",
  1023. __func__);
  1024. return status;
  1025. }
  1026. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1027. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1028. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1029. "%s: dp_rx_pdev_mon_status_attach() failed",
  1030. __func__);
  1031. return status;
  1032. }
  1033. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1034. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1035. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1036. "%s: dp_mon_link_desc_pool_setup() failed",
  1037. __func__);
  1038. return status;
  1039. }
  1040. }
  1041. qdf_spinlock_create(&pdev->mon_lock);
  1042. return QDF_STATUS_SUCCESS;
  1043. }
  1044. /**
  1045. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1046. * @pdev: core txrx pdev context
  1047. *
  1048. * This function will detach DP RX for monitor mode from
  1049. * main device context. will free DP Rx resources for
  1050. * monitor mode
  1051. *
  1052. * Return: QDF_STATUS_SUCCESS: success
  1053. * QDF_STATUS_E_RESOURCES: Error return
  1054. */
  1055. QDF_STATUS
  1056. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1057. uint8_t pdev_id = pdev->pdev_id;
  1058. struct dp_soc *soc = pdev->soc;
  1059. int mac_id;
  1060. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1061. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1062. qdf_spinlock_destroy(&pdev->mon_lock);
  1063. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1064. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1065. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1066. }
  1067. return QDF_STATUS_SUCCESS;
  1068. }
  1069. #endif