dp_rx_mon_dest.c 47 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /*
  40. * The destination ring processing is stuck if the destrination is not
  41. * moving while status ring moves 16 ppdu. the destination ring processing
  42. * skips this destination ring ppdu as walkaround
  43. */
  44. #define MON_DEST_RING_STUCK_MAX_CNT 16
  45. /**
  46. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  47. * (WBM), following error handling
  48. *
  49. * @dp_pdev: core txrx pdev context
  50. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  51. * Return: QDF_STATUS
  52. */
  53. static QDF_STATUS
  54. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  55. hal_buff_addrinfo_t buf_addr_info, int mac_id)
  56. {
  57. struct dp_srng *dp_srng;
  58. hal_ring_handle_t hal_ring_hdl;
  59. hal_soc_handle_t hal_soc;
  60. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  61. void *src_srng_desc;
  62. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  63. hal_soc = dp_pdev->soc->hal_soc;
  64. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  65. hal_ring_hdl = dp_srng->hal_srng;
  66. qdf_assert(hal_ring_hdl);
  67. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring_hdl))) {
  68. /* TODO */
  69. /*
  70. * Need API to convert from hal_ring pointer to
  71. * Ring Type / Ring Id combo
  72. */
  73. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  74. "%s %d : \
  75. HAL RING Access For WBM Release SRNG Failed -- %pK",
  76. __func__, __LINE__, hal_ring_hdl);
  77. goto done;
  78. }
  79. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
  80. if (qdf_likely(src_srng_desc)) {
  81. /* Return link descriptor through WBM ring (SW2WBM)*/
  82. hal_rx_mon_msdu_link_desc_set(hal_soc,
  83. src_srng_desc, buf_addr_info);
  84. status = QDF_STATUS_SUCCESS;
  85. } else {
  86. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  87. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  88. __func__, __LINE__);
  89. }
  90. done:
  91. hal_srng_access_end(hal_soc, hal_ring_hdl);
  92. return status;
  93. }
  94. /**
  95. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  96. * multiple nbufs. This function
  97. * is to return data length in
  98. * fragmented buffer
  99. *
  100. * @total_len: pointer to remaining data length.
  101. * @frag_len: pointer to data length in this fragment.
  102. */
  103. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  104. uint32_t *frag_len)
  105. {
  106. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  107. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  108. *total_len -= *frag_len;
  109. } else {
  110. *frag_len = *total_len;
  111. *total_len = 0;
  112. }
  113. }
  114. /**
  115. * dp_rx_cookie_2_mon_link_desc() - Retrieve Link descriptor based on target
  116. * @pdev: core physical device context
  117. * @hal_buf_info: structure holding the buffer info
  118. * mac_id: mac number
  119. *
  120. * Return: link descriptor address
  121. */
  122. static inline
  123. void *dp_rx_cookie_2_mon_link_desc(struct dp_pdev *pdev,
  124. struct hal_buf_info buf_info,
  125. uint8_t mac_id)
  126. {
  127. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  128. return dp_rx_cookie_2_mon_link_desc_va(pdev, &buf_info,
  129. mac_id);
  130. return dp_rx_cookie_2_link_desc_va(pdev->soc, &buf_info);
  131. }
  132. /**
  133. * dp_rx_monitor_link_desc_return() - Return Link descriptor based on target
  134. * @pdev: core physical device context
  135. * @p_last_buf_addr_info: MPDU Link descriptor
  136. * mac_id: mac number
  137. *
  138. * Return: QDF_STATUS
  139. */
  140. static inline
  141. QDF_STATUS dp_rx_monitor_link_desc_return(struct dp_pdev *pdev,
  142. hal_buff_addrinfo_t
  143. p_last_buf_addr_info,
  144. uint8_t mac_id, uint8_t bm_action)
  145. {
  146. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  147. return dp_rx_mon_link_desc_return(pdev, p_last_buf_addr_info,
  148. mac_id);
  149. return dp_rx_link_desc_return_by_addr(pdev->soc, p_last_buf_addr_info,
  150. bm_action);
  151. }
  152. /**
  153. * dp_rxdma_get_mon_dst_ring() - Return the pointer to rxdma_err_dst_ring
  154. * or mon_dst_ring based on the target
  155. * @pdev: core physical device context
  156. * @mac_for_pdev: mac_id number
  157. *
  158. * Return: ring address
  159. */
  160. static inline
  161. void *dp_rxdma_get_mon_dst_ring(struct dp_pdev *pdev,
  162. uint8_t mac_for_pdev)
  163. {
  164. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  165. return pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  166. return pdev->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  167. }
  168. /**
  169. * dp_rxdma_get_mon_buf_ring() - Return monitor buf ring address
  170. * based on target
  171. * @pdev: core physical device context
  172. * @mac_for_pdev: mac id number
  173. *
  174. * Return: ring address
  175. */
  176. static inline
  177. struct dp_srng *dp_rxdma_get_mon_buf_ring(struct dp_pdev *pdev,
  178. uint8_t mac_for_pdev)
  179. {
  180. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  181. return &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  182. return &pdev->rx_refill_buf_ring;
  183. }
  184. /**
  185. * dp_rx_get_mon_desc_pool() - Return monitor descriptor pool
  186. * based on target
  187. * @soc: soc handle
  188. * @mac_id: mac id number
  189. * @pdev_id: pdev id number
  190. *
  191. * Return: descriptor pool address
  192. */
  193. static inline
  194. struct rx_desc_pool *dp_rx_get_mon_desc_pool(struct dp_soc *soc,
  195. uint8_t mac_id,
  196. uint8_t pdev_id)
  197. {
  198. if (soc->wlan_cfg_ctx->rxdma1_enable)
  199. return &soc->rx_desc_mon[mac_id];
  200. return &soc->rx_desc_buf[pdev_id];
  201. }
  202. /**
  203. * dp_rx_get_mon_desc() - Return Rx descriptor based on target
  204. * @soc: soc handle
  205. * @cookie: cookie value
  206. *
  207. * Return: Rx descriptor
  208. */
  209. static inline
  210. struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
  211. uint32_t cookie)
  212. {
  213. if (soc->wlan_cfg_ctx->rxdma1_enable)
  214. return dp_rx_cookie_2_va_mon_buf(soc, cookie);
  215. return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
  216. }
  217. /**
  218. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  219. * (WBM), following error handling
  220. *
  221. * @soc: core DP main context
  222. * @mac_id: mac id which is one of 3 mac_ids
  223. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  224. * @head_msdu: head of msdu to be popped
  225. * @tail_msdu: tail of msdu to be popped
  226. * @npackets: number of packet to be popped
  227. * @ppdu_id: ppdu id of processing ppdu
  228. * @head: head of descs list to be freed
  229. * @tail: tail of decs list to be freed
  230. *
  231. * Return: number of msdu in MPDU to be popped
  232. */
  233. static inline uint32_t
  234. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  235. hal_rxdma_desc_t rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  236. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  237. union dp_rx_desc_list_elem_t **head,
  238. union dp_rx_desc_list_elem_t **tail)
  239. {
  240. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  241. void *rx_desc_tlv;
  242. void *rx_msdu_link_desc;
  243. qdf_nbuf_t msdu;
  244. qdf_nbuf_t last;
  245. struct hal_rx_msdu_list msdu_list;
  246. uint16_t num_msdus;
  247. uint32_t rx_buf_size, rx_pkt_offset;
  248. struct hal_buf_info buf_info;
  249. uint32_t rx_bufs_used = 0;
  250. uint32_t msdu_ppdu_id, msdu_cnt;
  251. uint8_t *data;
  252. uint32_t i;
  253. uint32_t total_frag_len = 0, frag_len = 0;
  254. bool is_frag, is_first_msdu;
  255. bool drop_mpdu = false;
  256. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  257. uint64_t nbuf_paddr = 0;
  258. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  259. msdu = 0;
  260. last = NULL;
  261. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info, &msdu_cnt);
  262. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  263. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  264. uint8_t rxdma_err =
  265. hal_rx_reo_ent_rxdma_error_code_get(
  266. rxdma_dst_ring_desc);
  267. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  268. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  269. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  270. drop_mpdu = true;
  271. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  272. }
  273. }
  274. is_frag = false;
  275. is_first_msdu = true;
  276. do {
  277. /* WAR for duplicate link descriptors received from HW */
  278. if (qdf_unlikely(dp_pdev->mon_last_linkdesc_paddr ==
  279. buf_info.paddr)) {
  280. dp_pdev->rx_mon_stats.dup_mon_linkdesc_cnt++;
  281. return rx_bufs_used;
  282. }
  283. rx_msdu_link_desc =
  284. dp_rx_cookie_2_mon_link_desc(dp_pdev,
  285. buf_info, mac_id);
  286. qdf_assert(rx_msdu_link_desc);
  287. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  288. &msdu_list, &num_msdus);
  289. for (i = 0; i < num_msdus; i++) {
  290. uint32_t l2_hdr_offset;
  291. struct dp_rx_desc *rx_desc = NULL;
  292. rx_desc = dp_rx_get_mon_desc(soc,
  293. msdu_list.sw_cookie[i]);
  294. qdf_assert_always(rx_desc);
  295. msdu = rx_desc->nbuf;
  296. if (msdu)
  297. nbuf_paddr = qdf_nbuf_get_frag_paddr(msdu, 0);
  298. /* WAR for duplicate buffers received from HW */
  299. if (qdf_unlikely(dp_pdev->mon_last_buf_cookie ==
  300. msdu_list.sw_cookie[i] ||
  301. !msdu ||
  302. msdu_list.paddr[i] != nbuf_paddr ||
  303. !rx_desc->in_use)) {
  304. /* Skip duplicate buffer and drop subsequent
  305. * buffers in this MPDU
  306. */
  307. drop_mpdu = true;
  308. dp_pdev->rx_mon_stats.dup_mon_buf_cnt++;
  309. dp_pdev->mon_last_linkdesc_paddr =
  310. buf_info.paddr;
  311. continue;
  312. }
  313. if (rx_desc->unmapped == 0) {
  314. qdf_nbuf_unmap_single(soc->osdev, msdu,
  315. QDF_DMA_FROM_DEVICE);
  316. rx_desc->unmapped = 1;
  317. }
  318. if (drop_mpdu) {
  319. dp_pdev->mon_last_linkdesc_paddr =
  320. buf_info.paddr;
  321. qdf_nbuf_free(msdu);
  322. msdu = NULL;
  323. goto next_msdu;
  324. }
  325. data = qdf_nbuf_data(msdu);
  326. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  327. QDF_TRACE(QDF_MODULE_ID_DP,
  328. QDF_TRACE_LEVEL_DEBUG,
  329. "[%s] i=%d, ppdu_id=%x, num_msdus = %u",
  330. __func__, i, *ppdu_id, num_msdus);
  331. if (is_first_msdu) {
  332. if (!HAL_RX_HW_DESC_MPDU_VALID(
  333. rx_desc_tlv)) {
  334. drop_mpdu = true;
  335. qdf_nbuf_free(msdu);
  336. msdu = NULL;
  337. dp_pdev->mon_last_linkdesc_paddr =
  338. buf_info.paddr;
  339. goto next_msdu;
  340. }
  341. msdu_ppdu_id = hal_rx_hw_desc_get_ppduid_get(
  342. soc->hal_soc,
  343. rx_desc_tlv);
  344. is_first_msdu = false;
  345. QDF_TRACE(QDF_MODULE_ID_DP,
  346. QDF_TRACE_LEVEL_DEBUG,
  347. "[%s] msdu_ppdu_id=%x",
  348. __func__, msdu_ppdu_id);
  349. if (*ppdu_id > msdu_ppdu_id)
  350. QDF_TRACE(QDF_MODULE_ID_DP,
  351. QDF_TRACE_LEVEL_DEBUG,
  352. "[%s][%d] ppdu_id=%d "
  353. "msdu_ppdu_id=%d",
  354. __func__, __LINE__, *ppdu_id,
  355. msdu_ppdu_id);
  356. if ((*ppdu_id < msdu_ppdu_id) && (
  357. (msdu_ppdu_id - *ppdu_id) <
  358. NOT_PPDU_ID_WRAP_AROUND)) {
  359. *ppdu_id = msdu_ppdu_id;
  360. return rx_bufs_used;
  361. } else if ((*ppdu_id > msdu_ppdu_id) && (
  362. (*ppdu_id - msdu_ppdu_id) >
  363. NOT_PPDU_ID_WRAP_AROUND)) {
  364. *ppdu_id = msdu_ppdu_id;
  365. return rx_bufs_used;
  366. }
  367. dp_pdev->mon_last_linkdesc_paddr =
  368. buf_info.paddr;
  369. }
  370. if (hal_rx_desc_is_first_msdu(soc->hal_soc,
  371. rx_desc_tlv))
  372. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  373. rx_desc_tlv,
  374. &(dp_pdev->ppdu_info.rx_status));
  375. if (msdu_list.msdu_info[i].msdu_flags &
  376. HAL_MSDU_F_MSDU_CONTINUATION) {
  377. if (!is_frag) {
  378. total_frag_len =
  379. msdu_list.msdu_info[i].msdu_len;
  380. is_frag = true;
  381. }
  382. dp_mon_adjust_frag_len(
  383. &total_frag_len, &frag_len);
  384. } else {
  385. if (is_frag) {
  386. dp_mon_adjust_frag_len(
  387. &total_frag_len, &frag_len);
  388. } else {
  389. frag_len =
  390. msdu_list.msdu_info[i].msdu_len;
  391. }
  392. is_frag = false;
  393. msdu_cnt--;
  394. }
  395. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  396. "%s total_len %u frag_len %u flags %u",
  397. __func__, total_frag_len, frag_len,
  398. msdu_list.msdu_info[i].msdu_flags);
  399. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  400. /*
  401. * HW structures call this L3 header padding
  402. * -- even though this is actually the offset
  403. * from the buffer beginning where the L2
  404. * header begins.
  405. */
  406. l2_hdr_offset =
  407. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, data);
  408. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  409. + frag_len;
  410. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  411. #if 0
  412. /* Disble it.see packet on msdu done set to 0 */
  413. /*
  414. * Check if DMA completed -- msdu_done is the
  415. * last bit to be written
  416. */
  417. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  418. QDF_TRACE(QDF_MODULE_ID_DP,
  419. QDF_TRACE_LEVEL_ERROR,
  420. "%s:%d: Pkt Desc",
  421. __func__, __LINE__);
  422. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  423. QDF_TRACE_LEVEL_ERROR,
  424. rx_desc_tlv, 128);
  425. qdf_assert_always(0);
  426. }
  427. #endif
  428. QDF_TRACE(QDF_MODULE_ID_DP,
  429. QDF_TRACE_LEVEL_DEBUG,
  430. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %u",
  431. __func__, rx_pkt_offset, l2_hdr_offset,
  432. msdu_list.msdu_info[i].msdu_len,
  433. qdf_nbuf_data(msdu),
  434. (uint32_t)qdf_nbuf_len(msdu));
  435. if (head_msdu && !*head_msdu) {
  436. *head_msdu = msdu;
  437. } else {
  438. if (last)
  439. qdf_nbuf_set_next(last, msdu);
  440. }
  441. last = msdu;
  442. next_msdu:
  443. dp_pdev->mon_last_buf_cookie = msdu_list.sw_cookie[i];
  444. rx_bufs_used++;
  445. dp_rx_add_to_free_desc_list(head,
  446. tail, rx_desc);
  447. }
  448. /*
  449. * Store the current link buffer into to the local
  450. * structure to be used for release purpose.
  451. */
  452. hal_rxdma_buff_addr_info_set(rx_link_buf_info, buf_info.paddr,
  453. buf_info.sw_cookie, buf_info.rbm);
  454. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info);
  455. if (dp_rx_monitor_link_desc_return(dp_pdev,
  456. (hal_buff_addrinfo_t)
  457. rx_link_buf_info,
  458. mac_id,
  459. bm_action)
  460. != QDF_STATUS_SUCCESS)
  461. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  462. "dp_rx_monitor_link_desc_return failed");
  463. } while (buf_info.paddr && msdu_cnt);
  464. if (last)
  465. qdf_nbuf_set_next(last, NULL);
  466. *tail_msdu = msdu;
  467. return rx_bufs_used;
  468. }
  469. static inline
  470. void dp_rx_msdus_set_payload(struct dp_soc *soc, qdf_nbuf_t msdu)
  471. {
  472. uint8_t *data;
  473. uint32_t rx_pkt_offset, l2_hdr_offset;
  474. data = qdf_nbuf_data(msdu);
  475. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  476. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, data);
  477. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  478. }
  479. static inline
  480. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  481. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  482. struct cdp_mon_status *rx_status)
  483. {
  484. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  485. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  486. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  487. is_amsdu, is_first_frag, amsdu_pad;
  488. void *rx_desc;
  489. char *hdr_desc;
  490. unsigned char *dest;
  491. struct ieee80211_frame *wh;
  492. struct ieee80211_qoscntl *qos;
  493. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  494. head_frag_list = NULL;
  495. mpdu_buf = NULL;
  496. /* The nbuf has been pulled just beyond the status and points to the
  497. * payload
  498. */
  499. if (!head_msdu)
  500. goto mpdu_stitch_fail;
  501. msdu_orig = head_msdu;
  502. rx_desc = qdf_nbuf_data(msdu_orig);
  503. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  504. /* It looks like there is some issue on MPDU len err */
  505. /* Need further investigate if drop the packet */
  506. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  507. return NULL;
  508. }
  509. rx_desc = qdf_nbuf_data(last_msdu);
  510. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  511. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  512. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  513. /* Fill out the rx_status from the PPDU start and end fields */
  514. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  515. rx_desc = qdf_nbuf_data(head_msdu);
  516. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  517. /* Easy case - The MSDU status indicates that this is a non-decapped
  518. * packet in RAW mode.
  519. */
  520. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  521. /* Note that this path might suffer from headroom unavailabilty
  522. * - but the RX status is usually enough
  523. */
  524. dp_rx_msdus_set_payload(soc, head_msdu);
  525. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  526. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  527. __func__, __LINE__, head_msdu, head_msdu->next,
  528. last_msdu, last_msdu->next);
  529. mpdu_buf = head_msdu;
  530. prev_buf = mpdu_buf;
  531. frag_list_sum_len = 0;
  532. msdu = qdf_nbuf_next(head_msdu);
  533. is_first_frag = 1;
  534. while (msdu) {
  535. dp_rx_msdus_set_payload(soc, msdu);
  536. if (is_first_frag) {
  537. is_first_frag = 0;
  538. head_frag_list = msdu;
  539. }
  540. frag_list_sum_len += qdf_nbuf_len(msdu);
  541. /* Maintain the linking of the cloned MSDUS */
  542. qdf_nbuf_set_next_ext(prev_buf, msdu);
  543. /* Move to the next */
  544. prev_buf = msdu;
  545. msdu = qdf_nbuf_next(msdu);
  546. }
  547. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  548. /* If there were more fragments to this RAW frame */
  549. if (head_frag_list) {
  550. if (frag_list_sum_len <
  551. sizeof(struct ieee80211_frame_min_one)) {
  552. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  553. return NULL;
  554. }
  555. frag_list_sum_len -= HAL_RX_FCS_LEN;
  556. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  557. frag_list_sum_len);
  558. qdf_nbuf_set_next(mpdu_buf, NULL);
  559. }
  560. goto mpdu_stitch_done;
  561. }
  562. /* Decap mode:
  563. * Calculate the amount of header in decapped packet to knock off based
  564. * on the decap type and the corresponding number of raw bytes to copy
  565. * status header
  566. */
  567. rx_desc = qdf_nbuf_data(head_msdu);
  568. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  570. "[%s][%d] decap format not raw",
  571. __func__, __LINE__);
  572. /* Base size */
  573. wifi_hdr_len = sizeof(struct ieee80211_frame);
  574. wh = (struct ieee80211_frame *)hdr_desc;
  575. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  576. if (dir == IEEE80211_FC1_DIR_DSTODS)
  577. wifi_hdr_len += 6;
  578. is_amsdu = 0;
  579. if (wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) {
  580. qos = (struct ieee80211_qoscntl *)
  581. (hdr_desc + wifi_hdr_len);
  582. wifi_hdr_len += 2;
  583. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  584. }
  585. /*Calculate security header length based on 'Protected'
  586. * and 'EXT_IV' flag
  587. * */
  588. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  589. char *iv = (char *)wh + wifi_hdr_len;
  590. if (iv[3] & KEY_EXTIV)
  591. sec_hdr_len = 8;
  592. else
  593. sec_hdr_len = 4;
  594. } else {
  595. sec_hdr_len = 0;
  596. }
  597. wifi_hdr_len += sec_hdr_len;
  598. /* MSDU related stuff LLC - AMSDU subframe header etc */
  599. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  600. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  601. /* "Decap" header to remove from MSDU buffer */
  602. decap_hdr_pull_bytes = 14;
  603. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  604. * status of the now decapped first msdu. Leave enough headroom for
  605. * accomodating any radio-tap /prism like PHY header
  606. */
  607. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  608. MAX_MONITOR_HEADER + mpdu_buf_len,
  609. MAX_MONITOR_HEADER, 4, FALSE);
  610. if (!mpdu_buf)
  611. goto mpdu_stitch_done;
  612. /* Copy the MPDU related header and enc headers into the first buffer
  613. * - Note that there can be a 2 byte pad between heaader and enc header
  614. */
  615. prev_buf = mpdu_buf;
  616. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  617. if (!dest)
  618. goto mpdu_stitch_fail;
  619. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  620. hdr_desc += wifi_hdr_len;
  621. #if 0
  622. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  623. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  624. hdr_desc += sec_hdr_len;
  625. #endif
  626. /* The first LLC len is copied into the MPDU buffer */
  627. frag_list_sum_len = 0;
  628. msdu_orig = head_msdu;
  629. is_first_frag = 1;
  630. amsdu_pad = 0;
  631. while (msdu_orig) {
  632. /* TODO: intra AMSDU padding - do we need it ??? */
  633. msdu = msdu_orig;
  634. if (is_first_frag) {
  635. head_frag_list = msdu;
  636. } else {
  637. /* Reload the hdr ptr only on non-first MSDUs */
  638. rx_desc = qdf_nbuf_data(msdu_orig);
  639. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  640. }
  641. /* Copy this buffers MSDU related status into the prev buffer */
  642. if (is_first_frag) {
  643. is_first_frag = 0;
  644. }
  645. /* Update protocol and flow tag for MSDU */
  646. dp_rx_mon_update_protocol_flow_tag(soc, dp_pdev,
  647. msdu_orig, rx_desc);
  648. dest = qdf_nbuf_put_tail(prev_buf,
  649. msdu_llc_len + amsdu_pad);
  650. if (!dest)
  651. goto mpdu_stitch_fail;
  652. dest += amsdu_pad;
  653. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  654. dp_rx_msdus_set_payload(soc, msdu);
  655. /* Push the MSDU buffer beyond the decap header */
  656. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  657. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  658. + amsdu_pad;
  659. /* Set up intra-AMSDU pad to be added to start of next buffer -
  660. * AMSDU pad is 4 byte pad on AMSDU subframe */
  661. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  662. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  663. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  664. * probably iterate all the frags cloning them along the way and
  665. * and also updating the prev_buf pointer
  666. */
  667. /* Move to the next */
  668. prev_buf = msdu;
  669. msdu_orig = qdf_nbuf_next(msdu_orig);
  670. }
  671. #if 0
  672. /* Add in the trailer section - encryption trailer + FCS */
  673. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  674. frag_list_sum_len += HAL_RX_FCS_LEN;
  675. #endif
  676. frag_list_sum_len -= msdu_llc_len;
  677. /* TODO: Convert this to suitable adf routines */
  678. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  679. frag_list_sum_len);
  680. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  681. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  682. __func__, __LINE__,
  683. mpdu_buf, mpdu_buf->len);
  684. mpdu_stitch_done:
  685. /* Check if this buffer contains the PPDU end status for TSF */
  686. /* Need revist this code to see where we can get tsf timestamp */
  687. #if 0
  688. /* PPDU end TLV will be retrieved from monitor status ring */
  689. last_mpdu =
  690. (*(((u_int32_t *)&rx_desc->attention)) &
  691. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  692. RX_ATTENTION_0_LAST_MPDU_LSB;
  693. if (last_mpdu)
  694. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  695. #endif
  696. return mpdu_buf;
  697. mpdu_stitch_fail:
  698. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  699. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  700. "%s mpdu_stitch_fail mpdu_buf %pK",
  701. __func__, mpdu_buf);
  702. /* Free the head buffer */
  703. qdf_nbuf_free(mpdu_buf);
  704. }
  705. return NULL;
  706. }
  707. /**
  708. * dp_send_mgmt_packet_to_stack(): send indicataion to upper layers
  709. *
  710. * @soc: soc handle
  711. * @nbuf: Mgmt packet
  712. * @pdev: pdev handle
  713. *
  714. * Return: QDF_STATUS_SUCCESS on success
  715. * QDF_STATUS_E_INVAL in error
  716. */
  717. #ifdef FEATURE_PERPKT_INFO
  718. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  719. qdf_nbuf_t nbuf,
  720. struct dp_pdev *pdev)
  721. {
  722. uint32_t *nbuf_data;
  723. struct ieee80211_frame *wh;
  724. if (!nbuf)
  725. return QDF_STATUS_E_INVAL;
  726. /*check if this is not a mgmt packet*/
  727. wh = (struct ieee80211_frame *)qdf_nbuf_data(nbuf);
  728. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  729. IEEE80211_FC0_TYPE_MGT) &&
  730. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  731. IEEE80211_FC0_TYPE_CTL)) {
  732. qdf_nbuf_free(nbuf);
  733. return QDF_STATUS_E_INVAL;
  734. }
  735. nbuf_data = (uint32_t *)qdf_nbuf_push_head(nbuf, 4);
  736. if (!nbuf_data) {
  737. QDF_TRACE(QDF_MODULE_ID_DP,
  738. QDF_TRACE_LEVEL_ERROR,
  739. FL("No headroom"));
  740. qdf_nbuf_free(nbuf);
  741. return QDF_STATUS_E_INVAL;
  742. }
  743. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  744. dp_wdi_event_handler(WDI_EVENT_RX_MGMT_CTRL, soc, nbuf,
  745. HTT_INVALID_PEER,
  746. WDI_NO_VAL, pdev->pdev_id);
  747. return QDF_STATUS_SUCCESS;
  748. }
  749. #else
  750. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  751. qdf_nbuf_t nbuf,
  752. struct dp_pdev *pdev)
  753. {
  754. return QDF_STATUS_SUCCESS;
  755. }
  756. #endif
  757. /**
  758. * dp_rx_extract_radiotap_info(): Extract and populate information in
  759. * struct mon_rx_status type
  760. * @rx_status: Receive status
  761. * @mon_rx_status: Monitor mode status
  762. *
  763. * Returns: None
  764. */
  765. static inline
  766. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  767. struct mon_rx_status *rx_mon_status)
  768. {
  769. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  770. rx_mon_status->chan_freq = rx_status->rs_freq;
  771. rx_mon_status->chan_num = rx_status->rs_channel;
  772. rx_mon_status->chan_flags = rx_status->rs_flags;
  773. rx_mon_status->rate = rx_status->rs_datarate;
  774. /* TODO: rx_mon_status->ant_signal_db */
  775. /* TODO: rx_mon_status->nr_ant */
  776. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  777. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  778. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  779. /* TODO: rx_mon_status->ldpc */
  780. /* TODO: rx_mon_status->beamformed */
  781. /* TODO: rx_mon_status->vht_flags */
  782. /* TODO: rx_mon_status->vht_flag_values1 */
  783. }
  784. /*
  785. * dp_rx_mon_deliver(): function to deliver packets to stack
  786. * @soc: DP soc
  787. * @mac_id: MAC ID
  788. * @head_msdu: head of msdu list
  789. * @tail_msdu: tail of msdu list
  790. *
  791. * Return: status: 0 - Success, non-zero: Failure
  792. */
  793. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  794. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  795. {
  796. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  797. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  798. qdf_nbuf_t mon_skb, skb_next;
  799. qdf_nbuf_t mon_mpdu = NULL;
  800. if (!pdev->monitor_vdev && !pdev->mcopy_mode)
  801. goto mon_deliver_fail;
  802. /* restitch mon MPDU for delivery via monitor interface */
  803. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  804. tail_msdu, rs);
  805. /* monitor vap cannot be present when mcopy is enabled
  806. * hence same skb can be consumed
  807. */
  808. if (pdev->mcopy_mode)
  809. return dp_send_mgmt_packet_to_stack(soc, mon_mpdu, pdev);
  810. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev &&
  811. pdev->monitor_vdev->osif_rx_mon) {
  812. pdev->ppdu_info.rx_status.ppdu_id =
  813. pdev->ppdu_info.com_info.ppdu_id;
  814. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  815. pdev->ppdu_info.rx_status.chan_noise_floor =
  816. pdev->chan_noise_floor;
  817. /*
  818. * if chan_num is not fetched correctly from ppdu RX TLV,
  819. * get it from pdev saved.
  820. */
  821. if (pdev->ppdu_info.rx_status.chan_num == 0)
  822. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  823. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  824. mon_mpdu,
  825. qdf_nbuf_headroom(mon_mpdu))) {
  826. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  827. goto mon_deliver_fail;
  828. }
  829. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  830. mon_mpdu,
  831. &pdev->ppdu_info.rx_status);
  832. } else {
  833. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  834. "[%s][%d] mon_mpdu=%pK monitor_vdev %pK osif_vdev %pK"
  835. , __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  836. (pdev->monitor_vdev ? pdev->monitor_vdev->osif_vdev
  837. : NULL));
  838. goto mon_deliver_fail;
  839. }
  840. return QDF_STATUS_SUCCESS;
  841. mon_deliver_fail:
  842. mon_skb = head_msdu;
  843. while (mon_skb) {
  844. skb_next = qdf_nbuf_next(mon_skb);
  845. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  846. "[%s][%d] mon_skb=%pK len %u", __func__,
  847. __LINE__, mon_skb, mon_skb->len);
  848. qdf_nbuf_free(mon_skb);
  849. mon_skb = skb_next;
  850. }
  851. return QDF_STATUS_E_INVAL;
  852. }
  853. /**
  854. * dp_rx_mon_deliver_non_std()
  855. * @soc: core txrx main contex
  856. * @mac_id: MAC ID
  857. *
  858. * This function delivers the radio tap and dummy MSDU
  859. * into user layer application for preamble only PPDU.
  860. *
  861. * Return: QDF_STATUS
  862. */
  863. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  864. uint32_t mac_id)
  865. {
  866. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  867. ol_txrx_rx_mon_fp osif_rx_mon;
  868. qdf_nbuf_t dummy_msdu;
  869. /* Sanity checking */
  870. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  871. goto mon_deliver_non_std_fail;
  872. /* Generate a dummy skb_buff */
  873. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  874. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  875. MAX_MONITOR_HEADER, 4, FALSE);
  876. if (!dummy_msdu)
  877. goto allocate_dummy_msdu_fail;
  878. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  879. qdf_nbuf_set_next(dummy_msdu, NULL);
  880. pdev->ppdu_info.rx_status.ppdu_id =
  881. pdev->ppdu_info.com_info.ppdu_id;
  882. /* Apply the radio header to this dummy skb */
  883. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, dummy_msdu,
  884. qdf_nbuf_headroom(dummy_msdu))) {
  885. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  886. qdf_nbuf_free(dummy_msdu);
  887. goto mon_deliver_non_std_fail;
  888. }
  889. /* deliver to the user layer application */
  890. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  891. dummy_msdu, NULL);
  892. /* Clear rx_status*/
  893. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  894. sizeof(pdev->ppdu_info.rx_status));
  895. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  896. return QDF_STATUS_SUCCESS;
  897. allocate_dummy_msdu_fail:
  898. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  899. __func__, __LINE__, dummy_msdu);
  900. mon_deliver_non_std_fail:
  901. return QDF_STATUS_E_INVAL;
  902. }
  903. /**
  904. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  905. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  906. * @soc: core txrx main contex
  907. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  908. * @quota: No. of units (packets) that can be serviced in one shot.
  909. *
  910. * This function implements the core of Rx functionality. This is
  911. * expected to handle only non-error frames.
  912. *
  913. * Return: none
  914. */
  915. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  916. {
  917. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  918. uint8_t pdev_id;
  919. hal_rxdma_desc_t rxdma_dst_ring_desc;
  920. hal_soc_handle_t hal_soc;
  921. void *mon_dst_srng;
  922. union dp_rx_desc_list_elem_t *head = NULL;
  923. union dp_rx_desc_list_elem_t *tail = NULL;
  924. uint32_t ppdu_id;
  925. uint32_t rx_bufs_used;
  926. uint32_t mpdu_rx_bufs_used;
  927. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  928. struct cdp_pdev_mon_stats *rx_mon_stats;
  929. mon_dst_srng = dp_rxdma_get_mon_dst_ring(pdev, mac_for_pdev);
  930. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  931. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  932. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  933. __func__, __LINE__, mon_dst_srng);
  934. return;
  935. }
  936. hal_soc = soc->hal_soc;
  937. qdf_assert((hal_soc && pdev));
  938. qdf_spin_lock_bh(&pdev->mon_lock);
  939. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  940. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  941. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  942. __func__, __LINE__, mon_dst_srng);
  943. return;
  944. }
  945. pdev_id = pdev->pdev_id;
  946. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  947. rx_bufs_used = 0;
  948. rx_mon_stats = &pdev->rx_mon_stats;
  949. while (qdf_likely(rxdma_dst_ring_desc =
  950. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  951. qdf_nbuf_t head_msdu, tail_msdu;
  952. uint32_t npackets;
  953. head_msdu = (qdf_nbuf_t) NULL;
  954. tail_msdu = (qdf_nbuf_t) NULL;
  955. mpdu_rx_bufs_used =
  956. dp_rx_mon_mpdu_pop(soc, mac_id,
  957. rxdma_dst_ring_desc,
  958. &head_msdu, &tail_msdu,
  959. &npackets, &ppdu_id,
  960. &head, &tail);
  961. rx_bufs_used += mpdu_rx_bufs_used;
  962. if (mpdu_rx_bufs_used)
  963. pdev->mon_dest_ring_stuck_cnt = 0;
  964. else
  965. pdev->mon_dest_ring_stuck_cnt++;
  966. if (pdev->mon_dest_ring_stuck_cnt >
  967. MON_DEST_RING_STUCK_MAX_CNT) {
  968. dp_info("destination ring stuck");
  969. dp_info("ppdu_id status=%d dest=%d",
  970. pdev->ppdu_info.com_info.ppdu_id, ppdu_id);
  971. rx_mon_stats->mon_rx_dest_stuck++;
  972. pdev->ppdu_info.com_info.ppdu_id = ppdu_id;
  973. continue;
  974. }
  975. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  976. rx_mon_stats->stat_ring_ppdu_id_hist[
  977. rx_mon_stats->ppdu_id_hist_idx] =
  978. pdev->ppdu_info.com_info.ppdu_id;
  979. rx_mon_stats->dest_ring_ppdu_id_hist[
  980. rx_mon_stats->ppdu_id_hist_idx] = ppdu_id;
  981. rx_mon_stats->ppdu_id_hist_idx =
  982. (rx_mon_stats->ppdu_id_hist_idx + 1) &
  983. (MAX_PPDU_ID_HIST - 1);
  984. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  985. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  986. sizeof(pdev->ppdu_info.rx_status));
  987. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  988. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  989. __func__, __LINE__,
  990. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  991. break;
  992. }
  993. if (qdf_likely((head_msdu) && (tail_msdu))) {
  994. rx_mon_stats->dest_mpdu_done++;
  995. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  996. }
  997. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  998. mon_dst_srng);
  999. }
  1000. hal_srng_access_end(hal_soc, mon_dst_srng);
  1001. qdf_spin_unlock_bh(&pdev->mon_lock);
  1002. if (rx_bufs_used) {
  1003. rx_mon_stats->dest_ppdu_done++;
  1004. dp_rx_buffers_replenish(soc, mac_id,
  1005. dp_rxdma_get_mon_buf_ring(pdev,
  1006. mac_for_pdev),
  1007. dp_rx_get_mon_desc_pool(soc, mac_id,
  1008. pdev_id),
  1009. rx_bufs_used, &head, &tail);
  1010. }
  1011. }
  1012. #ifndef DISABLE_MON_CONFIG
  1013. #if !defined(QCA_WIFI_QCA6390) && !defined(QCA_WIFI_QCA6490)
  1014. /**
  1015. * dp_rx_pdev_mon_buf_attach() - Allocate the monitor descriptor pool
  1016. *
  1017. * @pdev: physical device handle
  1018. * @mac_id: mac id
  1019. *
  1020. * Return: QDF_STATUS
  1021. */
  1022. #define MON_BUF_MIN_ALLOC_ENTRIES 128
  1023. static QDF_STATUS
  1024. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  1025. uint8_t pdev_id = pdev->pdev_id;
  1026. struct dp_soc *soc = pdev->soc;
  1027. struct dp_srng *mon_buf_ring;
  1028. uint32_t num_entries;
  1029. struct rx_desc_pool *rx_desc_pool;
  1030. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1031. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1032. uint32_t rx_desc_pool_size, replenish_size;
  1033. mon_buf_ring = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  1034. num_entries = mon_buf_ring->num_entries;
  1035. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1036. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1037. pdev_id, num_entries);
  1038. rx_desc_pool_size = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx) * num_entries;
  1039. status = dp_rx_desc_pool_alloc(soc, mac_id, rx_desc_pool_size,
  1040. rx_desc_pool);
  1041. if (!QDF_IS_STATUS_SUCCESS(status))
  1042. return status;
  1043. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1044. replenish_size = ((num_entries - 1) < MON_BUF_MIN_ALLOC_ENTRIES) ?
  1045. (num_entries - 1) : MON_BUF_MIN_ALLOC_ENTRIES;
  1046. status = dp_pdev_rx_buffers_attach(soc, mac_id, mon_buf_ring,
  1047. rx_desc_pool, replenish_size);
  1048. return status;
  1049. }
  1050. static QDF_STATUS
  1051. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1052. {
  1053. struct dp_soc *soc = pdev->soc;
  1054. struct rx_desc_pool *rx_desc_pool;
  1055. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1056. if (rx_desc_pool->pool_size != 0) {
  1057. if (!dp_is_soc_reinit(soc))
  1058. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1059. rx_desc_pool);
  1060. else
  1061. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1062. }
  1063. return QDF_STATUS_SUCCESS;
  1064. }
  1065. /**
  1066. * dp_mon_link_desc_pool_setup(): Allocate and setup link descriptor pool
  1067. * that will be used by HW for various link
  1068. * and queue descriptorsand managed by WBM
  1069. *
  1070. * @soc: soc handle
  1071. * @mac_id: mac id
  1072. *
  1073. * Return: QDF_STATUS
  1074. */
  1075. static
  1076. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1077. {
  1078. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1079. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1080. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1081. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1082. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1083. uint32_t total_link_descs, total_mem_size;
  1084. uint32_t num_link_desc_banks;
  1085. uint32_t last_bank_size = 0;
  1086. uint32_t entry_size, num_entries;
  1087. void *mon_desc_srng;
  1088. uint32_t num_replenish_buf;
  1089. struct dp_srng *dp_srng;
  1090. int i;
  1091. qdf_dma_addr_t *baseaddr = NULL;
  1092. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  1093. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  1094. soc->hal_soc, RXDMA_MONITOR_DESC);
  1095. /* Round up to power of 2 */
  1096. total_link_descs = 1;
  1097. while (total_link_descs < num_entries)
  1098. total_link_descs <<= 1;
  1099. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1100. "%s: total_link_descs: %u, link_desc_size: %d",
  1101. __func__, total_link_descs, link_desc_size);
  1102. total_mem_size = total_link_descs * link_desc_size;
  1103. total_mem_size += link_desc_align;
  1104. if (total_mem_size <= max_alloc_size) {
  1105. num_link_desc_banks = 0;
  1106. last_bank_size = total_mem_size;
  1107. } else {
  1108. num_link_desc_banks = (total_mem_size) /
  1109. (max_alloc_size - link_desc_align);
  1110. last_bank_size = total_mem_size %
  1111. (max_alloc_size - link_desc_align);
  1112. }
  1113. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1114. "%s: total_mem_size: %d, num_link_desc_banks: %u",
  1115. __func__, total_mem_size, num_link_desc_banks);
  1116. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1117. "%s: max_alloc_size: %d last_bank_size: %d",
  1118. __func__, max_alloc_size, last_bank_size);
  1119. for (i = 0; i < num_link_desc_banks; i++) {
  1120. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  1121. base_paddr_unaligned;
  1122. if (!dp_is_soc_reinit(soc)) {
  1123. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1124. base_vaddr_unaligned =
  1125. qdf_mem_alloc_consistent(soc->osdev,
  1126. soc->osdev->dev,
  1127. max_alloc_size,
  1128. baseaddr);
  1129. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1130. base_vaddr_unaligned) {
  1131. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1132. QDF_TRACE_LEVEL_ERROR,
  1133. "%s: Link desc mem alloc failed",
  1134. __func__);
  1135. goto fail;
  1136. }
  1137. }
  1138. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  1139. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1140. (void *)((unsigned long)
  1141. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1142. base_vaddr_unaligned) +
  1143. ((unsigned long)
  1144. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1145. base_vaddr_unaligned) %
  1146. link_desc_align));
  1147. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1148. (unsigned long)
  1149. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1150. base_paddr_unaligned) +
  1151. ((unsigned long)
  1152. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1153. (unsigned long)
  1154. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1155. base_vaddr_unaligned));
  1156. }
  1157. if (last_bank_size) {
  1158. /* Allocate last bank in case total memory required is not exact
  1159. * multiple of max_alloc_size
  1160. */
  1161. baseaddr = &dp_pdev->link_desc_banks[mac_for_pdev][i].
  1162. base_paddr_unaligned;
  1163. if (!dp_is_soc_reinit(soc)) {
  1164. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1165. base_vaddr_unaligned =
  1166. qdf_mem_alloc_consistent(soc->osdev,
  1167. soc->osdev->dev,
  1168. last_bank_size,
  1169. baseaddr);
  1170. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  1171. base_vaddr_unaligned) {
  1172. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1173. QDF_TRACE_LEVEL_ERROR,
  1174. "%s: alloc fail:mon link desc pool",
  1175. __func__);
  1176. goto fail;
  1177. }
  1178. }
  1179. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  1180. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  1181. (void *)((unsigned long)
  1182. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1183. base_vaddr_unaligned) +
  1184. ((unsigned long)
  1185. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1186. base_vaddr_unaligned) %
  1187. link_desc_align));
  1188. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  1189. (unsigned long)
  1190. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1191. base_paddr_unaligned) +
  1192. ((unsigned long)
  1193. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1194. (unsigned long)
  1195. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1196. base_vaddr_unaligned));
  1197. }
  1198. /* Allocate and setup link descriptor idle list for HW internal use */
  1199. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  1200. total_mem_size = entry_size * total_link_descs;
  1201. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  1202. num_replenish_buf = 0;
  1203. if (total_mem_size <= max_alloc_size) {
  1204. void *desc;
  1205. for (i = 0;
  1206. i < MAX_MON_LINK_DESC_BANKS &&
  1207. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  1208. i++) {
  1209. uint32_t num_entries =
  1210. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  1211. (unsigned long)
  1212. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  1213. (unsigned long)
  1214. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1215. base_vaddr_unaligned)) / link_desc_size;
  1216. unsigned long paddr =
  1217. (unsigned long)
  1218. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  1219. unsigned long vaddr =
  1220. (unsigned long)
  1221. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  1222. hal_srng_access_start_unlocked(soc->hal_soc,
  1223. mon_desc_srng);
  1224. while (num_entries && (desc =
  1225. hal_srng_src_get_next(soc->hal_soc,
  1226. mon_desc_srng))) {
  1227. hal_set_link_desc_addr(desc, i, paddr);
  1228. num_entries--;
  1229. num_replenish_buf++;
  1230. paddr += link_desc_size;
  1231. vaddr += link_desc_size;
  1232. }
  1233. hal_srng_access_end_unlocked(soc->hal_soc,
  1234. mon_desc_srng);
  1235. }
  1236. } else {
  1237. qdf_assert(0);
  1238. }
  1239. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1240. "%s: successfully replenished %d buffer",
  1241. __func__, num_replenish_buf);
  1242. return QDF_STATUS_SUCCESS;
  1243. fail:
  1244. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1245. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1246. base_vaddr_unaligned) {
  1247. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1248. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1249. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1250. base_vaddr_unaligned,
  1251. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1252. base_paddr_unaligned, 0);
  1253. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1254. base_vaddr_unaligned = NULL;
  1255. }
  1256. }
  1257. return QDF_STATUS_E_FAILURE;
  1258. }
  1259. /*
  1260. * Free link descriptor pool that was setup HW
  1261. */
  1262. static
  1263. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1264. {
  1265. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1266. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1267. int i;
  1268. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1269. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  1270. base_vaddr_unaligned) {
  1271. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1272. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  1273. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1274. base_vaddr_unaligned,
  1275. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1276. base_paddr_unaligned, 0);
  1277. dp_pdev->link_desc_banks[mac_for_pdev][i].
  1278. base_vaddr_unaligned = NULL;
  1279. }
  1280. }
  1281. }
  1282. /**
  1283. * dp_mon_buf_delayed_replenish() - Helper routine to replenish monitor dest buf
  1284. * @pdev: DP pdev object
  1285. *
  1286. * Return: None
  1287. */
  1288. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1289. {
  1290. struct dp_soc *soc;
  1291. uint32_t mac_for_pdev;
  1292. union dp_rx_desc_list_elem_t *tail = NULL;
  1293. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1294. uint32_t num_entries;
  1295. uint32_t mac_id, id;
  1296. soc = pdev->soc;
  1297. num_entries = wlan_cfg_get_dma_mon_buf_ring_size(pdev->wlan_cfg_ctx);
  1298. for (id = 0; id < NUM_RXDMA_RINGS_PER_PDEV; id++) {
  1299. mac_for_pdev = dp_get_mac_id_for_pdev(id,
  1300. pdev->pdev_id);
  1301. /*
  1302. * Map mac_for_pdev appropriately for both MCL & WIN,
  1303. * since MCL have multiple mon buf rings and WIN just
  1304. * has one mon buffer ring, below API helps identify
  1305. * accurate buffer_ring for both cases
  1306. *
  1307. */
  1308. mac_id = dp_get_mac_id_for_mac(soc, mac_for_pdev);
  1309. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1310. dp_rxdma_get_mon_buf_ring(pdev,
  1311. mac_id),
  1312. dp_rx_get_mon_desc_pool(soc,
  1313. mac_for_pdev,
  1314. pdev->pdev_id),
  1315. num_entries, &desc_list, &tail);
  1316. }
  1317. }
  1318. #else
  1319. static
  1320. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1321. {
  1322. return QDF_STATUS_SUCCESS;
  1323. }
  1324. static QDF_STATUS
  1325. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id)
  1326. {
  1327. return QDF_STATUS_SUCCESS;
  1328. }
  1329. static
  1330. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1331. {
  1332. }
  1333. static QDF_STATUS
  1334. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1335. {
  1336. return QDF_STATUS_SUCCESS;
  1337. }
  1338. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1339. {}
  1340. #endif
  1341. /**
  1342. * dp_rx_pdev_mon_cmn_detach() - detach dp rx for monitor mode
  1343. * @pdev: core txrx pdev context
  1344. * @mac_id: mac_id for which deinit is to be done
  1345. *
  1346. * This function will free DP Rx resources for
  1347. * monitor mode
  1348. *
  1349. * Return: QDF_STATUS_SUCCESS: success
  1350. * QDF_STATUS_E_RESOURCES: Error return
  1351. */
  1352. static QDF_STATUS
  1353. dp_rx_pdev_mon_cmn_detach(struct dp_pdev *pdev, int mac_id) {
  1354. struct dp_soc *soc = pdev->soc;
  1355. uint8_t pdev_id = pdev->pdev_id;
  1356. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1357. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1358. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1359. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1360. return QDF_STATUS_SUCCESS;
  1361. }
  1362. /**
  1363. * dp_rx_pdev_mon_cmn_attach() - attach DP RX for monitor mode
  1364. * @pdev: core txrx pdev context
  1365. * @mac_id: mac_id for which init is to be done
  1366. *
  1367. * This function Will allocate dp rx resource and
  1368. * initialize resources for monitor mode.
  1369. *
  1370. * Return: QDF_STATUS_SUCCESS: success
  1371. * QDF_STATUS_E_RESOURCES: Error return
  1372. */
  1373. static QDF_STATUS
  1374. dp_rx_pdev_mon_cmn_attach(struct dp_pdev *pdev, int mac_id) {
  1375. struct dp_soc *soc = pdev->soc;
  1376. uint8_t pdev_id = pdev->pdev_id;
  1377. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1378. QDF_STATUS status;
  1379. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1380. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1381. dp_err("%s: dp_rx_pdev_mon_buf_attach() failed\n", __func__);
  1382. goto fail;
  1383. }
  1384. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1385. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1386. dp_err("%s: dp_rx_pdev_mon_status_attach() failed", __func__);
  1387. goto mon_buf_detach;
  1388. }
  1389. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1390. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1391. dp_err("%s: dp_mon_link_desc_pool_setup() failed", __func__);
  1392. goto mon_status_detach;
  1393. }
  1394. return status;
  1395. mon_status_detach:
  1396. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1397. mon_buf_detach:
  1398. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1399. fail:
  1400. return status;
  1401. }
  1402. /**
  1403. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1404. * @pdev: core txrx pdev context
  1405. *
  1406. * This function will attach a DP RX for monitor mode instance into
  1407. * the main device (SOC) context. Will allocate dp rx resource and
  1408. * initialize resources.
  1409. *
  1410. * Return: QDF_STATUS_SUCCESS: success
  1411. * QDF_STATUS_E_RESOURCES: Error return
  1412. */
  1413. QDF_STATUS
  1414. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1415. QDF_STATUS status;
  1416. uint8_t pdev_id = pdev->pdev_id;
  1417. int mac_id;
  1418. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1419. "%s: pdev attach id=%d", __func__, pdev_id);
  1420. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1421. status = dp_rx_pdev_mon_cmn_attach(pdev, mac_id);
  1422. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1423. QDF_TRACE(QDF_MODULE_ID_DP,
  1424. QDF_TRACE_LEVEL_ERROR,
  1425. "%s: dp_rx_pdev_mon_cmn_attach(%d) failed\n",
  1426. __func__, mac_id);
  1427. goto fail;
  1428. }
  1429. }
  1430. pdev->mon_last_linkdesc_paddr = 0;
  1431. pdev->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
  1432. qdf_spinlock_create(&pdev->mon_lock);
  1433. return QDF_STATUS_SUCCESS;
  1434. fail:
  1435. for (mac_id = mac_id - 1; mac_id >= 0; mac_id--)
  1436. dp_rx_pdev_mon_cmn_detach(pdev, mac_id);
  1437. return status;
  1438. }
  1439. QDF_STATUS
  1440. dp_mon_link_free(struct dp_pdev *pdev) {
  1441. uint8_t pdev_id = pdev->pdev_id;
  1442. struct dp_soc *soc = pdev->soc;
  1443. int mac_id;
  1444. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1445. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1446. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1447. }
  1448. return QDF_STATUS_SUCCESS;
  1449. }
  1450. /**
  1451. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1452. * @pdev: core txrx pdev context
  1453. *
  1454. * This function will detach DP RX for monitor mode from
  1455. * main device context. will free DP Rx resources for
  1456. * monitor mode
  1457. *
  1458. * Return: QDF_STATUS_SUCCESS: success
  1459. * QDF_STATUS_E_RESOURCES: Error return
  1460. */
  1461. QDF_STATUS
  1462. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1463. uint8_t pdev_id = pdev->pdev_id;
  1464. int mac_id;
  1465. qdf_spinlock_destroy(&pdev->mon_lock);
  1466. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1467. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  1468. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1469. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1470. }
  1471. return QDF_STATUS_SUCCESS;
  1472. }
  1473. #else
  1474. QDF_STATUS
  1475. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1476. return QDF_STATUS_SUCCESS;
  1477. }
  1478. QDF_STATUS
  1479. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1480. return QDF_STATUS_SUCCESS;
  1481. }
  1482. QDF_STATUS
  1483. dp_mon_link_free(struct dp_pdev *pdev) {
  1484. return QDF_STATUS_SUCCESS;
  1485. }
  1486. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1487. {}
  1488. #endif /* DISABLE_MON_CONFIG */