ipa_uc_wdi.c 86 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include "ipa_i.h"
  6. #include <linux/dmapool.h>
  7. #include <linux/delay.h>
  8. #include <linux/mm.h>
  9. #include "ipa_qmi_service.h"
  10. #define IPA_HOLB_TMR_DIS 0x0
  11. #define IPA_HW_INTERFACE_WDI_VERSION 0x0001
  12. #define IPA_HW_WDI_RX_MBOX_START_INDEX 48
  13. #define IPA_HW_WDI_TX_MBOX_START_INDEX 50
  14. #define IPA_WDI_RING_ALIGNMENT 8
  15. #define IPA_GSI_EVT_RING_INT_MODT (32 * 1) /* 1ms under 32KHz clock */
  16. #define IPA_AGGR_PKT_LIMIT 1
  17. #define IPA_AGGR_HARD_BYTE_LIMIT 2 /*2 Kbytes Agger hard byte limit*/
  18. #define UPDATE_RI_MODERATION_THRESHOLD 8
  19. #define IPA_WDI_CONNECTED BIT(0)
  20. #define IPA_WDI_ENABLED BIT(1)
  21. #define IPA_WDI_RESUMED BIT(2)
  22. #define IPA_UC_POLL_SLEEP_USEC 100
  23. #define GSI_STOP_MAX_RETRY_CNT 10
  24. struct ipa_wdi_res {
  25. struct ipa_wdi_buffer_info *res;
  26. unsigned int nents;
  27. bool valid;
  28. };
  29. static struct ipa_wdi_res wdi_res[IPA_WDI_MAX_RES];
  30. static void ipa3_uc_wdi_loaded_handler(void);
  31. /**
  32. * enum ipa_hw_2_cpu_wdi_events - Values that represent HW event to be sent to
  33. * CPU.
  34. * @IPA_HW_2_CPU_EVENT_WDI_ERROR : Event to specify that HW detected an error
  35. * in WDI
  36. */
  37. enum ipa_hw_2_cpu_wdi_events {
  38. IPA_HW_2_CPU_EVENT_WDI_ERROR =
  39. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 0),
  40. };
  41. /**
  42. * enum ipa_hw_wdi_channel_states - Values that represent WDI channel state
  43. * machine.
  44. * @IPA_HW_WDI_CHANNEL_STATE_INITED_DISABLED : Channel is initialized but
  45. * disabled
  46. * @IPA_HW_WDI_CHANNEL_STATE_ENABLED_SUSPEND : Channel is enabled but in
  47. * suspended state
  48. * @IPA_HW_WDI_CHANNEL_STATE_RUNNING : Channel is running. Entered after
  49. * SET_UP_COMMAND is processed successfully
  50. * @IPA_HW_WDI_CHANNEL_STATE_ERROR : Channel is in error state
  51. * @IPA_HW_WDI_CHANNEL_STATE_INVALID : Invalid state. Shall not be in use in
  52. * operational scenario
  53. *
  54. * These states apply to both Tx and Rx paths. These do not reflect the
  55. * sub-state the state machine may be in.
  56. */
  57. enum ipa_hw_wdi_channel_states {
  58. IPA_HW_WDI_CHANNEL_STATE_INITED_DISABLED = 1,
  59. IPA_HW_WDI_CHANNEL_STATE_ENABLED_SUSPEND = 2,
  60. IPA_HW_WDI_CHANNEL_STATE_RUNNING = 3,
  61. IPA_HW_WDI_CHANNEL_STATE_ERROR = 4,
  62. IPA_HW_WDI_CHANNEL_STATE_INVALID = 0xFF
  63. };
  64. /**
  65. * enum ipa3_cpu_2_hw_commands - Values that represent the WDI commands from
  66. * CPU
  67. * @IPA_CPU_2_HW_CMD_WDI_TX_SET_UP : Command to set up WDI Tx Path
  68. * @IPA_CPU_2_HW_CMD_WDI_RX_SET_UP : Command to set up WDI Rx Path
  69. * @IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG : Provide extended config info for Rx path
  70. * @IPA_CPU_2_HW_CMD_WDI_CH_ENABLE : Command to enable a channel
  71. * @IPA_CPU_2_HW_CMD_WDI_CH_DISABLE : Command to disable a channel
  72. * @IPA_CPU_2_HW_CMD_WDI_CH_SUSPEND : Command to suspend a channel
  73. * @IPA_CPU_2_HW_CMD_WDI_CH_RESUME : Command to resume a channel
  74. * @IPA_CPU_2_HW_CMD_WDI_TEAR_DOWN : Command to tear down WDI Tx/ Rx Path
  75. */
  76. enum ipa_cpu_2_hw_wdi_commands {
  77. IPA_CPU_2_HW_CMD_WDI_TX_SET_UP =
  78. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 0),
  79. IPA_CPU_2_HW_CMD_WDI_RX_SET_UP =
  80. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 1),
  81. IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG =
  82. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 2),
  83. IPA_CPU_2_HW_CMD_WDI_CH_ENABLE =
  84. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 3),
  85. IPA_CPU_2_HW_CMD_WDI_CH_DISABLE =
  86. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 4),
  87. IPA_CPU_2_HW_CMD_WDI_CH_SUSPEND =
  88. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 5),
  89. IPA_CPU_2_HW_CMD_WDI_CH_RESUME =
  90. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 6),
  91. IPA_CPU_2_HW_CMD_WDI_TEAR_DOWN =
  92. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 7),
  93. };
  94. /**
  95. * enum ipa_hw_2_cpu_cmd_resp_status - Values that represent WDI related
  96. * command response status to be sent to CPU.
  97. */
  98. enum ipa_hw_2_cpu_cmd_resp_status {
  99. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS =
  100. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 0),
  101. IPA_HW_2_CPU_MAX_WDI_TX_CHANNELS =
  102. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 1),
  103. IPA_HW_2_CPU_WDI_CE_RING_OVERRUN_POSSIBILITY =
  104. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 2),
  105. IPA_HW_2_CPU_WDI_CE_RING_SET_UP_FAILURE =
  106. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 3),
  107. IPA_HW_2_CPU_WDI_CE_RING_PARAMS_UNALIGNED =
  108. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 4),
  109. IPA_HW_2_CPU_WDI_COMP_RING_OVERRUN_POSSIBILITY =
  110. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 5),
  111. IPA_HW_2_CPU_WDI_COMP_RING_SET_UP_FAILURE =
  112. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 6),
  113. IPA_HW_2_CPU_WDI_COMP_RING_PARAMS_UNALIGNED =
  114. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 7),
  115. IPA_HW_2_CPU_WDI_UNKNOWN_TX_CHANNEL =
  116. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 8),
  117. IPA_HW_2_CPU_WDI_TX_INVALID_FSM_TRANSITION =
  118. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 9),
  119. IPA_HW_2_CPU_WDI_TX_FSM_TRANSITION_ERROR =
  120. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 10),
  121. IPA_HW_2_CPU_MAX_WDI_RX_CHANNELS =
  122. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 11),
  123. IPA_HW_2_CPU_WDI_RX_RING_PARAMS_UNALIGNED =
  124. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 12),
  125. IPA_HW_2_CPU_WDI_RX_RING_SET_UP_FAILURE =
  126. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 13),
  127. IPA_HW_2_CPU_WDI_UNKNOWN_RX_CHANNEL =
  128. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 14),
  129. IPA_HW_2_CPU_WDI_RX_INVALID_FSM_TRANSITION =
  130. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 15),
  131. IPA_HW_2_CPU_WDI_RX_FSM_TRANSITION_ERROR =
  132. FEATURE_ENUM_VAL(IPA_HW_FEATURE_WDI, 16),
  133. };
  134. /**
  135. * enum ipa_hw_wdi_errors - WDI specific error types.
  136. * @IPA_HW_WDI_ERROR_NONE : No error persists
  137. * @IPA_HW_WDI_CHANNEL_ERROR : Error is specific to channel
  138. */
  139. enum ipa_hw_wdi_errors {
  140. IPA_HW_WDI_ERROR_NONE = 0,
  141. IPA_HW_WDI_CHANNEL_ERROR = 1
  142. };
  143. /**
  144. * enum ipa_hw_wdi_ch_errors = List of WDI Channel error types. This is present
  145. * in the event param.
  146. * @IPA_HW_WDI_CH_ERR_NONE : No error persists
  147. * @IPA_HW_WDI_TX_COMP_RING_WP_UPDATE_FAIL : Write pointer update failed in Tx
  148. * Completion ring
  149. * @IPA_HW_WDI_TX_FSM_ERROR : Error in the state machine transition
  150. * @IPA_HW_WDI_TX_COMP_RE_FETCH_FAIL : Error while calculating num RE to bring
  151. * @IPA_HW_WDI_CH_ERR_RESERVED : Reserved - Not available for CPU to use
  152. */
  153. enum ipa_hw_wdi_ch_errors {
  154. IPA_HW_WDI_CH_ERR_NONE = 0,
  155. IPA_HW_WDI_TX_COMP_RING_WP_UPDATE_FAIL = 1,
  156. IPA_HW_WDI_TX_FSM_ERROR = 2,
  157. IPA_HW_WDI_TX_COMP_RE_FETCH_FAIL = 3,
  158. IPA_HW_WDI_CH_ERR_RESERVED = 0xFF
  159. };
  160. /**
  161. * struct IpaHwSharedMemWdiMapping_t - Structure referring to the common and
  162. * WDI section of 128B shared memory located in offset zero of SW Partition in
  163. * IPA SRAM.
  164. *
  165. * The shared memory is used for communication between IPA HW and CPU.
  166. */
  167. struct IpaHwSharedMemWdiMapping_t {
  168. struct IpaHwSharedMemCommonMapping_t common;
  169. u32 reserved_2B_28;
  170. u32 reserved_2F_2C;
  171. u32 reserved_33_30;
  172. u32 reserved_37_34;
  173. u32 reserved_3B_38;
  174. u32 reserved_3F_3C;
  175. u16 interfaceVersionWdi;
  176. u16 reserved_43_42;
  177. u8 wdi_tx_ch_0_state;
  178. u8 wdi_rx_ch_0_state;
  179. u16 reserved_47_46;
  180. } __packed;
  181. /**
  182. * struct IpaHwWdiTxSetUpCmdData_t - Structure holding the parameters for
  183. * IPA_CPU_2_HW_CMD_WDI_TX_SET_UP command.
  184. * @comp_ring_base_pa : This is the physical address of the base of the Tx
  185. * completion ring
  186. * @comp_ring_size : This is the size of the Tx completion ring
  187. * @reserved_comp_ring : Reserved field for expansion of Completion ring params
  188. * @ce_ring_base_pa : This is the physical address of the base of the Copy
  189. * Engine Source Ring
  190. * @ce_ring_size : Copy Engine Ring size
  191. * @reserved_ce_ring : Reserved field for expansion of CE ring params
  192. * @ce_ring_doorbell_pa : This is the physical address of the doorbell that the
  193. * IPA uC has to write into to trigger the copy engine
  194. * @num_tx_buffers : Number of pkt buffers allocated. The size of the CE ring
  195. * and the Tx completion ring has to be atleast ( num_tx_buffers + 1)
  196. * @ipa_pipe_number : This is the IPA pipe number that has to be used for the
  197. * Tx path
  198. * @reserved : Reserved field
  199. *
  200. * Parameters are sent as pointer thus should be reside in address accessible
  201. * to HW
  202. */
  203. struct IpaHwWdiTxSetUpCmdData_t {
  204. u32 comp_ring_base_pa;
  205. u16 comp_ring_size;
  206. u16 reserved_comp_ring;
  207. u32 ce_ring_base_pa;
  208. u16 ce_ring_size;
  209. u16 reserved_ce_ring;
  210. u32 ce_ring_doorbell_pa;
  211. u16 num_tx_buffers;
  212. u8 ipa_pipe_number;
  213. u8 reserved;
  214. } __packed;
  215. struct IpaHwWdi2TxSetUpCmdData_t {
  216. u32 comp_ring_base_pa;
  217. u32 comp_ring_base_pa_hi;
  218. u16 comp_ring_size;
  219. u16 reserved_comp_ring;
  220. u32 ce_ring_base_pa;
  221. u32 ce_ring_base_pa_hi;
  222. u16 ce_ring_size;
  223. u16 reserved_ce_ring;
  224. u32 ce_ring_doorbell_pa;
  225. u32 ce_ring_doorbell_pa_hi;
  226. u16 num_tx_buffers;
  227. u8 ipa_pipe_number;
  228. u8 reserved;
  229. } __packed;
  230. /**
  231. * struct IpaHwWdiRxSetUpCmdData_t - Structure holding the parameters for
  232. * IPA_CPU_2_HW_CMD_WDI_RX_SET_UP command.
  233. * @rx_ring_base_pa : This is the physical address of the base of the Rx ring
  234. * (containing Rx buffers)
  235. * @rx_ring_size : This is the size of the Rx ring
  236. * @rx_ring_rp_pa : This is the physical address of the location through which
  237. * IPA uc is expected to communicate about the Read pointer into the Rx Ring
  238. * @ipa_pipe_number : This is the IPA pipe number that has to be used for the
  239. * Rx path
  240. *
  241. * Parameters are sent as pointer thus should be reside in address accessible
  242. * to HW
  243. */
  244. struct IpaHwWdiRxSetUpCmdData_t {
  245. u32 rx_ring_base_pa;
  246. u32 rx_ring_size;
  247. u32 rx_ring_rp_pa;
  248. u8 ipa_pipe_number;
  249. } __packed;
  250. struct IpaHwWdi2RxSetUpCmdData_t {
  251. u32 rx_ring_base_pa;
  252. u32 rx_ring_base_pa_hi;
  253. u32 rx_ring_size;
  254. u32 rx_ring_rp_pa;
  255. u32 rx_ring_rp_pa_hi;
  256. u32 rx_comp_ring_base_pa;
  257. u32 rx_comp_ring_base_pa_hi;
  258. u32 rx_comp_ring_size;
  259. u32 rx_comp_ring_wp_pa;
  260. u32 rx_comp_ring_wp_pa_hi;
  261. u8 ipa_pipe_number;
  262. } __packed;
  263. /**
  264. * union IpaHwWdiRxExtCfgCmdData_t - Structure holding the parameters for
  265. * IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG command.
  266. * @ipa_pipe_number : The IPA pipe number for which this config is passed
  267. * @qmap_id : QMAP ID to be set in the metadata register
  268. * @reserved : Reserved
  269. *
  270. * The parameters are passed as immediate params in the shared memory
  271. */
  272. union IpaHwWdiRxExtCfgCmdData_t {
  273. struct IpaHwWdiRxExtCfgCmdParams_t {
  274. u32 ipa_pipe_number:8;
  275. u32 qmap_id:8;
  276. u32 reserved:16;
  277. } __packed params;
  278. u32 raw32b;
  279. } __packed;
  280. /**
  281. * union IpaHwWdiCommonChCmdData_t - Structure holding the parameters for
  282. * IPA_CPU_2_HW_CMD_WDI_TEAR_DOWN,
  283. * IPA_CPU_2_HW_CMD_WDI_CH_ENABLE,
  284. * IPA_CPU_2_HW_CMD_WDI_CH_DISABLE,
  285. * IPA_CPU_2_HW_CMD_WDI_CH_SUSPEND,
  286. * IPA_CPU_2_HW_CMD_WDI_CH_RESUME command.
  287. * @ipa_pipe_number : The IPA pipe number. This could be Tx or an Rx pipe
  288. * @reserved : Reserved
  289. *
  290. * The parameters are passed as immediate params in the shared memory
  291. */
  292. union IpaHwWdiCommonChCmdData_t {
  293. struct IpaHwWdiCommonChCmdParams_t {
  294. u32 ipa_pipe_number:8;
  295. u32 reserved:24;
  296. } __packed params;
  297. u32 raw32b;
  298. } __packed;
  299. /**
  300. * union IpaHwWdiErrorEventData_t - parameters for IPA_HW_2_CPU_EVENT_WDI_ERROR
  301. * event.
  302. * @wdi_error_type : The IPA pipe number to be torn down. This could be Tx or
  303. * an Rx pipe
  304. * @reserved : Reserved
  305. * @ipa_pipe_number : IPA pipe number on which error has happened. Applicable
  306. * only if error type indicates channel error
  307. * @wdi_ch_err_type : Information about the channel error (if available)
  308. *
  309. * The parameters are passed as immediate params in the shared memory
  310. */
  311. union IpaHwWdiErrorEventData_t {
  312. struct IpaHwWdiErrorEventParams_t {
  313. u32 wdi_error_type:8;
  314. u32 reserved:8;
  315. u32 ipa_pipe_number:8;
  316. u32 wdi_ch_err_type:8;
  317. } __packed params;
  318. u32 raw32b;
  319. } __packed;
  320. static void ipa3_uc_wdi_event_log_info_handler(
  321. struct IpaHwEventLogInfoData_t *uc_event_top_mmio)
  322. {
  323. struct Ipa3HwEventInfoData_t *stats_ptr = &uc_event_top_mmio->statsInfo;
  324. if ((uc_event_top_mmio->protocolMask &
  325. (1 << IPA_HW_PROTOCOL_WDI)) == 0) {
  326. IPAERR("WDI protocol missing 0x%x\n",
  327. uc_event_top_mmio->protocolMask);
  328. return;
  329. }
  330. if (stats_ptr->featureInfo[IPA_HW_PROTOCOL_WDI].params.size !=
  331. sizeof(struct IpaHwStatsWDIInfoData_t)) {
  332. IPAERR("wdi stats sz invalid exp=%zu is=%u\n",
  333. sizeof(struct IpaHwStatsWDIInfoData_t),
  334. stats_ptr->featureInfo[
  335. IPA_HW_PROTOCOL_WDI].params.size);
  336. return;
  337. }
  338. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_ofst =
  339. stats_ptr->baseAddrOffset +
  340. stats_ptr->featureInfo[IPA_HW_PROTOCOL_WDI].params.offset;
  341. IPAERR("WDI stats ofst=0x%x\n", ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_ofst);
  342. if (ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_ofst +
  343. sizeof(struct IpaHwStatsWDIInfoData_t) >=
  344. ipa3_ctx->ctrl->ipa_reg_base_ofst +
  345. ipahal_get_reg_n_ofst(IPA_SW_AREA_RAM_DIRECT_ACCESS_n, 0) +
  346. ipa3_ctx->smem_sz) {
  347. IPAERR("uc_wdi_stats 0x%x outside SRAM\n",
  348. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_ofst);
  349. return;
  350. }
  351. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio =
  352. ioremap(ipa3_ctx->ipa_wrapper_base +
  353. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_ofst,
  354. sizeof(struct IpaHwStatsWDIInfoData_t));
  355. if (!ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio) {
  356. IPAERR("fail to ioremap uc wdi stats\n");
  357. return;
  358. }
  359. }
  360. static void ipa3_uc_wdi_event_handler(struct IpaHwSharedMemCommonMapping_t
  361. *uc_sram_mmio)
  362. {
  363. union IpaHwWdiErrorEventData_t wdi_evt;
  364. struct IpaHwSharedMemWdiMapping_t *wdi_sram_mmio_ext;
  365. if (uc_sram_mmio->eventOp ==
  366. IPA_HW_2_CPU_EVENT_WDI_ERROR) {
  367. wdi_evt.raw32b = uc_sram_mmio->eventParams;
  368. IPADBG("uC WDI evt errType=%u pipe=%d cherrType=%u\n",
  369. wdi_evt.params.wdi_error_type,
  370. wdi_evt.params.ipa_pipe_number,
  371. wdi_evt.params.wdi_ch_err_type);
  372. wdi_sram_mmio_ext =
  373. (struct IpaHwSharedMemWdiMapping_t *)
  374. uc_sram_mmio;
  375. IPADBG("tx_ch_state=%u rx_ch_state=%u\n",
  376. wdi_sram_mmio_ext->wdi_tx_ch_0_state,
  377. wdi_sram_mmio_ext->wdi_rx_ch_0_state);
  378. }
  379. }
  380. /**
  381. * ipa3_get_wdi_gsi_stats() - Query WDI gsi stats from uc
  382. * @stats: [inout] stats blob from client populated by driver
  383. *
  384. * Returns: 0 on success, negative on failure
  385. *
  386. * @note Cannot be called from atomic context
  387. *
  388. */
  389. int ipa3_get_wdi_gsi_stats(struct ipa_uc_dbg_ring_stats *stats)
  390. {
  391. int i;
  392. if (!ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio) {
  393. IPAERR("bad NULL parms for wdi_gsi_stats\n");
  394. return -EINVAL;
  395. }
  396. IPA_ACTIVE_CLIENTS_INC_SIMPLE();
  397. for (i = 0; i < MAX_WDI2_CHANNELS; i++) {
  398. stats->ring[i].ringFull = ioread32(
  399. ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio
  400. + i * IPA3_UC_DEBUG_STATS_OFF +
  401. IPA3_UC_DEBUG_STATS_RINGFULL_OFF);
  402. stats->ring[i].ringEmpty = ioread32(
  403. ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio
  404. + i * IPA3_UC_DEBUG_STATS_OFF +
  405. IPA3_UC_DEBUG_STATS_RINGEMPTY_OFF);
  406. stats->ring[i].ringUsageHigh = ioread32(
  407. ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio
  408. + i * IPA3_UC_DEBUG_STATS_OFF +
  409. IPA3_UC_DEBUG_STATS_RINGUSAGEHIGH_OFF);
  410. stats->ring[i].ringUsageLow = ioread32(
  411. ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio
  412. + i * IPA3_UC_DEBUG_STATS_OFF +
  413. IPA3_UC_DEBUG_STATS_RINGUSAGELOW_OFF);
  414. stats->ring[i].RingUtilCount = ioread32(
  415. ipa3_ctx->wdi2_ctx.dbg_stats.uc_dbg_stats_mmio
  416. + i * IPA3_UC_DEBUG_STATS_OFF +
  417. IPA3_UC_DEBUG_STATS_RINGUTILCOUNT_OFF);
  418. }
  419. IPA_ACTIVE_CLIENTS_DEC_SIMPLE();
  420. return 0;
  421. }
  422. /**
  423. * ipa3_get_wdi_stats() - Query WDI statistics from uc
  424. * @stats: [inout] stats blob from client populated by driver
  425. *
  426. * Returns: 0 on success, negative on failure
  427. *
  428. * @note Cannot be called from atomic context
  429. *
  430. */
  431. int ipa3_get_wdi_stats(struct IpaHwStatsWDIInfoData_t *stats)
  432. {
  433. #define TX_STATS(y) stats->tx_ch_stats.y = \
  434. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio->tx_ch_stats.y
  435. #define RX_STATS(y) stats->rx_ch_stats.y = \
  436. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio->rx_ch_stats.y
  437. if (!stats || !ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio) {
  438. IPAERR("bad parms stats=%pK wdi_stats=%pK\n",
  439. stats,
  440. ipa3_ctx->uc_wdi_ctx.wdi_uc_stats_mmio);
  441. return -EINVAL;
  442. }
  443. IPA_ACTIVE_CLIENTS_INC_SIMPLE();
  444. TX_STATS(num_pkts_processed);
  445. TX_STATS(copy_engine_doorbell_value);
  446. TX_STATS(num_db_fired);
  447. TX_STATS(tx_comp_ring_stats.ringFull);
  448. TX_STATS(tx_comp_ring_stats.ringEmpty);
  449. TX_STATS(tx_comp_ring_stats.ringUsageHigh);
  450. TX_STATS(tx_comp_ring_stats.ringUsageLow);
  451. TX_STATS(tx_comp_ring_stats.RingUtilCount);
  452. TX_STATS(bam_stats.bamFifoFull);
  453. TX_STATS(bam_stats.bamFifoEmpty);
  454. TX_STATS(bam_stats.bamFifoUsageHigh);
  455. TX_STATS(bam_stats.bamFifoUsageLow);
  456. TX_STATS(bam_stats.bamUtilCount);
  457. TX_STATS(num_db);
  458. TX_STATS(num_unexpected_db);
  459. TX_STATS(num_bam_int_handled);
  460. TX_STATS(num_bam_int_in_non_running_state);
  461. TX_STATS(num_qmb_int_handled);
  462. TX_STATS(num_bam_int_handled_while_wait_for_bam);
  463. RX_STATS(max_outstanding_pkts);
  464. RX_STATS(num_pkts_processed);
  465. RX_STATS(rx_ring_rp_value);
  466. RX_STATS(rx_ind_ring_stats.ringFull);
  467. RX_STATS(rx_ind_ring_stats.ringEmpty);
  468. RX_STATS(rx_ind_ring_stats.ringUsageHigh);
  469. RX_STATS(rx_ind_ring_stats.ringUsageLow);
  470. RX_STATS(rx_ind_ring_stats.RingUtilCount);
  471. RX_STATS(bam_stats.bamFifoFull);
  472. RX_STATS(bam_stats.bamFifoEmpty);
  473. RX_STATS(bam_stats.bamFifoUsageHigh);
  474. RX_STATS(bam_stats.bamFifoUsageLow);
  475. RX_STATS(bam_stats.bamUtilCount);
  476. RX_STATS(num_bam_int_handled);
  477. RX_STATS(num_db);
  478. RX_STATS(num_unexpected_db);
  479. RX_STATS(num_pkts_in_dis_uninit_state);
  480. RX_STATS(num_ic_inj_vdev_change);
  481. RX_STATS(num_ic_inj_fw_desc_change);
  482. RX_STATS(num_qmb_int_handled);
  483. RX_STATS(reserved1);
  484. RX_STATS(reserved2);
  485. IPA_ACTIVE_CLIENTS_DEC_SIMPLE();
  486. return 0;
  487. }
  488. int ipa3_wdi_init(void)
  489. {
  490. struct ipa3_uc_hdlrs uc_wdi_cbs = { 0 };
  491. uc_wdi_cbs.ipa_uc_event_hdlr = ipa3_uc_wdi_event_handler;
  492. uc_wdi_cbs.ipa_uc_event_log_info_hdlr =
  493. ipa3_uc_wdi_event_log_info_handler;
  494. uc_wdi_cbs.ipa_uc_loaded_hdlr =
  495. ipa3_uc_wdi_loaded_handler;
  496. ipa3_uc_register_handlers(IPA_HW_FEATURE_WDI, &uc_wdi_cbs);
  497. return 0;
  498. }
  499. static int ipa_create_ap_smmu_mapping_pa(phys_addr_t pa, size_t len,
  500. bool device, unsigned long *iova)
  501. {
  502. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);
  503. unsigned long va = roundup(cb->next_addr, PAGE_SIZE);
  504. int prot = IOMMU_READ | IOMMU_WRITE;
  505. size_t true_len = roundup(len + pa - rounddown(pa, PAGE_SIZE),
  506. PAGE_SIZE);
  507. int ret;
  508. if (!cb->valid) {
  509. IPAERR("No SMMU CB setup\n");
  510. return -EINVAL;
  511. }
  512. if (len > PAGE_SIZE)
  513. va = roundup(cb->next_addr, len);
  514. ret = ipa3_iommu_map(cb->iommu_domain, va, rounddown(pa, PAGE_SIZE),
  515. true_len,
  516. device ? (prot | IOMMU_MMIO) : prot);
  517. if (ret) {
  518. IPAERR("iommu map failed for pa=%pa len=%zu\n", &pa, true_len);
  519. return -EINVAL;
  520. }
  521. ipa3_ctx->wdi_map_cnt++;
  522. cb->next_addr = va + true_len;
  523. *iova = va + pa - rounddown(pa, PAGE_SIZE);
  524. return 0;
  525. }
  526. static int ipa_create_uc_smmu_mapping_pa(phys_addr_t pa, size_t len,
  527. bool device, unsigned long *iova)
  528. {
  529. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_UC);
  530. unsigned long va = roundup(cb->next_addr, PAGE_SIZE);
  531. int prot = IOMMU_READ | IOMMU_WRITE;
  532. size_t true_len = roundup(len + pa - rounddown(pa, PAGE_SIZE),
  533. PAGE_SIZE);
  534. int ret;
  535. if (!cb->valid) {
  536. IPAERR("No SMMU CB setup\n");
  537. return -EINVAL;
  538. }
  539. ret = ipa3_iommu_map(cb->iommu_domain, va, rounddown(pa, PAGE_SIZE),
  540. true_len,
  541. device ? (prot | IOMMU_MMIO) : prot);
  542. if (ret) {
  543. IPAERR("iommu map failed for pa=%pa len=%zu\n", &pa, true_len);
  544. return -EINVAL;
  545. }
  546. ipa3_ctx->wdi_map_cnt++;
  547. cb->next_addr = va + true_len;
  548. *iova = va + pa - rounddown(pa, PAGE_SIZE);
  549. return 0;
  550. }
  551. static int ipa_create_ap_smmu_mapping_sgt(struct sg_table *sgt,
  552. unsigned long *iova)
  553. {
  554. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);
  555. unsigned long va = roundup(cb->next_addr, PAGE_SIZE);
  556. int prot = IOMMU_READ | IOMMU_WRITE;
  557. int ret, i;
  558. struct scatterlist *sg;
  559. unsigned long start_iova = va;
  560. phys_addr_t phys;
  561. size_t len = 0;
  562. int count = 0;
  563. if (!cb->valid) {
  564. IPAERR("No SMMU CB setup\n");
  565. return -EINVAL;
  566. }
  567. if (!sgt) {
  568. IPAERR("Bad parameters, scatter / gather list is NULL\n");
  569. return -EINVAL;
  570. }
  571. for_each_sg(sgt->sgl, sg, sgt->nents, i) {
  572. /* directly get sg_tbl PA from wlan-driver */
  573. len += PAGE_ALIGN(sg->offset + sg->length);
  574. }
  575. if (len > PAGE_SIZE) {
  576. va = roundup(cb->next_addr,
  577. roundup_pow_of_two(len));
  578. start_iova = va;
  579. }
  580. for_each_sg(sgt->sgl, sg, sgt->nents, i) {
  581. /* directly get sg_tbl PA from wlan-driver */
  582. phys = sg->dma_address;
  583. len = PAGE_ALIGN(sg->offset + sg->length);
  584. ret = ipa3_iommu_map(cb->iommu_domain, va, phys, len, prot);
  585. if (ret) {
  586. IPAERR("iommu map failed for pa=%pa len=%zu\n",
  587. &phys, len);
  588. goto bad_mapping;
  589. }
  590. va += len;
  591. ipa3_ctx->wdi_map_cnt++;
  592. count++;
  593. }
  594. cb->next_addr = va;
  595. *iova = start_iova;
  596. return 0;
  597. bad_mapping:
  598. for_each_sg(sgt->sgl, sg, count, i)
  599. iommu_unmap(cb->iommu_domain, sg_dma_address(sg),
  600. sg_dma_len(sg));
  601. return -EINVAL;
  602. }
  603. static int ipa_create_uc_smmu_mapping_sgt(struct sg_table *sgt,
  604. unsigned long *iova)
  605. {
  606. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_UC);
  607. unsigned long va = roundup(cb->next_addr, PAGE_SIZE);
  608. int prot = IOMMU_READ | IOMMU_WRITE;
  609. int ret;
  610. int i;
  611. struct scatterlist *sg;
  612. unsigned long start_iova = va;
  613. phys_addr_t phys;
  614. size_t len;
  615. int count = 0;
  616. if (!cb->valid) {
  617. IPAERR("No SMMU CB setup\n");
  618. return -EINVAL;
  619. }
  620. if (!sgt) {
  621. IPAERR("Bad parameters, scatter / gather list is NULL\n");
  622. return -EINVAL;
  623. }
  624. for_each_sg(sgt->sgl, sg, sgt->nents, i) {
  625. /* directly get sg_tbl PA from wlan-driver */
  626. phys = sg->dma_address;
  627. len = PAGE_ALIGN(sg->offset + sg->length);
  628. ret = ipa3_iommu_map(cb->iommu_domain, va, phys, len, prot);
  629. if (ret) {
  630. IPAERR("iommu map failed for pa=%pa len=%zu\n",
  631. &phys, len);
  632. goto bad_mapping;
  633. }
  634. va += len;
  635. ipa3_ctx->wdi_map_cnt++;
  636. count++;
  637. }
  638. cb->next_addr = va;
  639. *iova = start_iova;
  640. return 0;
  641. bad_mapping:
  642. for_each_sg(sgt->sgl, sg, count, i)
  643. iommu_unmap(cb->iommu_domain, sg_dma_address(sg),
  644. sg_dma_len(sg));
  645. return -EINVAL;
  646. }
  647. static void ipa_release_ap_smmu_mappings(enum ipa_client_type client)
  648. {
  649. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);
  650. int i, j, start, end;
  651. if (IPA_CLIENT_IS_CONS(client)) {
  652. start = IPA_WDI_TX_RING_RES;
  653. if (ipa3_ctx->ipa_wdi3_over_gsi)
  654. end = IPA_WDI_TX_DB_RES;
  655. else
  656. end = IPA_WDI_CE_DB_RES;
  657. } else {
  658. start = IPA_WDI_RX_RING_RES;
  659. if (ipa3_ctx->ipa_wdi2 ||
  660. ipa3_ctx->ipa_wdi3_over_gsi)
  661. end = IPA_WDI_RX_COMP_RING_WP_RES;
  662. else
  663. end = IPA_WDI_RX_RING_RP_RES;
  664. }
  665. for (i = start; i <= end; i++) {
  666. if (wdi_res[i].valid) {
  667. for (j = 0; j < wdi_res[i].nents; j++) {
  668. iommu_unmap(cb->iommu_domain,
  669. wdi_res[i].res[j].iova,
  670. wdi_res[i].res[j].size);
  671. ipa3_ctx->wdi_map_cnt--;
  672. }
  673. kfree(wdi_res[i].res);
  674. wdi_res[i].valid = false;
  675. }
  676. }
  677. if (ipa3_ctx->wdi_map_cnt == 0)
  678. cb->next_addr = cb->va_end;
  679. }
  680. static void ipa_release_uc_smmu_mappings(enum ipa_client_type client)
  681. {
  682. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_UC);
  683. int i;
  684. int j;
  685. int start;
  686. int end;
  687. if (IPA_CLIENT_IS_CONS(client)) {
  688. start = IPA_WDI_TX_RING_RES;
  689. end = IPA_WDI_CE_DB_RES;
  690. } else {
  691. start = IPA_WDI_RX_RING_RES;
  692. if (ipa3_ctx->ipa_wdi2)
  693. end = IPA_WDI_RX_COMP_RING_WP_RES;
  694. else
  695. end = IPA_WDI_RX_RING_RP_RES;
  696. }
  697. for (i = start; i <= end; i++) {
  698. if (wdi_res[i].valid) {
  699. for (j = 0; j < wdi_res[i].nents; j++) {
  700. iommu_unmap(cb->iommu_domain,
  701. wdi_res[i].res[j].iova,
  702. wdi_res[i].res[j].size);
  703. ipa3_ctx->wdi_map_cnt--;
  704. }
  705. kfree(wdi_res[i].res);
  706. wdi_res[i].valid = false;
  707. }
  708. }
  709. if (ipa3_ctx->wdi_map_cnt == 0)
  710. cb->next_addr = cb->va_end;
  711. }
  712. static void ipa_save_uc_smmu_mapping_pa(int res_idx, phys_addr_t pa,
  713. unsigned long iova, size_t len)
  714. {
  715. IPADBG("--res_idx=%d pa=0x%pa iova=0x%lx sz=0x%zx\n", res_idx,
  716. &pa, iova, len);
  717. wdi_res[res_idx].res = kzalloc(sizeof(*wdi_res[res_idx].res),
  718. GFP_KERNEL);
  719. if (!wdi_res[res_idx].res) {
  720. WARN_ON(1);
  721. return;
  722. }
  723. wdi_res[res_idx].nents = 1;
  724. wdi_res[res_idx].valid = true;
  725. wdi_res[res_idx].res->pa = rounddown(pa, PAGE_SIZE);
  726. wdi_res[res_idx].res->iova = rounddown(iova, PAGE_SIZE);
  727. wdi_res[res_idx].res->size = roundup(len + pa - rounddown(pa,
  728. PAGE_SIZE), PAGE_SIZE);
  729. IPADBG("res_idx=%d pa=0x%pa iova=0x%lx sz=0x%zx\n", res_idx,
  730. &wdi_res[res_idx].res->pa, wdi_res[res_idx].res->iova,
  731. wdi_res[res_idx].res->size);
  732. }
  733. static void ipa_save_uc_smmu_mapping_sgt(int res_idx, struct sg_table *sgt,
  734. unsigned long iova)
  735. {
  736. int i;
  737. struct scatterlist *sg;
  738. unsigned long curr_iova = iova;
  739. if (!sgt) {
  740. IPAERR("Bad parameters, scatter / gather list is NULL\n");
  741. return;
  742. }
  743. wdi_res[res_idx].res = kcalloc(sgt->nents,
  744. sizeof(*wdi_res[res_idx].res),
  745. GFP_KERNEL);
  746. if (!wdi_res[res_idx].res) {
  747. WARN_ON(1);
  748. return;
  749. }
  750. wdi_res[res_idx].nents = sgt->nents;
  751. wdi_res[res_idx].valid = true;
  752. for_each_sg(sgt->sgl, sg, sgt->nents, i) {
  753. /* directly get sg_tbl PA from wlan */
  754. wdi_res[res_idx].res[i].pa = sg->dma_address;
  755. wdi_res[res_idx].res[i].iova = curr_iova;
  756. wdi_res[res_idx].res[i].size = PAGE_ALIGN(sg->offset +
  757. sg->length);
  758. IPADBG("res_idx=%d pa=0x%pa iova=0x%lx sz=0x%zx\n", res_idx,
  759. &wdi_res[res_idx].res[i].pa,
  760. wdi_res[res_idx].res[i].iova,
  761. wdi_res[res_idx].res[i].size);
  762. curr_iova += wdi_res[res_idx].res[i].size;
  763. }
  764. }
  765. int ipa_create_uc_smmu_mapping(int res_idx, bool wlan_smmu_en,
  766. phys_addr_t pa, struct sg_table *sgt, size_t len, bool device,
  767. unsigned long *iova)
  768. {
  769. /* support for SMMU on WLAN but no SMMU on IPA */
  770. if (wlan_smmu_en && ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC]) {
  771. IPAERR("Unsupported SMMU pairing\n");
  772. return -EINVAL;
  773. }
  774. /* legacy: no SMMUs on either end */
  775. if (!wlan_smmu_en && ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC]) {
  776. *iova = pa;
  777. return 0;
  778. }
  779. /* no SMMU on WLAN but SMMU on IPA */
  780. if (!wlan_smmu_en && !ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC]) {
  781. if (ipa_create_uc_smmu_mapping_pa(pa, len,
  782. (res_idx == IPA_WDI_CE_DB_RES) ? true : false, iova)) {
  783. IPAERR("Fail to create mapping res %d\n", res_idx);
  784. return -EFAULT;
  785. }
  786. ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len);
  787. return 0;
  788. }
  789. /* SMMU on WLAN and SMMU on IPA */
  790. if (wlan_smmu_en && !ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC]) {
  791. switch (res_idx) {
  792. case IPA_WDI_RX_RING_RP_RES:
  793. case IPA_WDI_RX_COMP_RING_WP_RES:
  794. case IPA_WDI_CE_DB_RES:
  795. case IPA_WDI_TX_DB_RES:
  796. if (ipa_create_uc_smmu_mapping_pa(pa, len,
  797. (res_idx == IPA_WDI_CE_DB_RES) ? true : false,
  798. iova)) {
  799. IPAERR("Fail to create mapping res %d\n",
  800. res_idx);
  801. return -EFAULT;
  802. }
  803. ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len);
  804. break;
  805. case IPA_WDI_RX_RING_RES:
  806. case IPA_WDI_RX_COMP_RING_RES:
  807. case IPA_WDI_TX_RING_RES:
  808. case IPA_WDI_CE_RING_RES:
  809. if (ipa_create_uc_smmu_mapping_sgt(sgt, iova)) {
  810. IPAERR("Fail to create mapping res %d\n",
  811. res_idx);
  812. WARN_ON(1);
  813. return -EFAULT;
  814. }
  815. ipa_save_uc_smmu_mapping_sgt(res_idx, sgt, *iova);
  816. break;
  817. default:
  818. WARN_ON(1);
  819. }
  820. }
  821. return 0;
  822. }
  823. void ipa3_release_wdi3_gsi_smmu_mappings(u8 dir)
  824. {
  825. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);
  826. int i, j, start, end;
  827. if (dir == IPA_WDI3_TX_DIR) {
  828. start = IPA_WDI_TX_RING_RES;
  829. end = IPA_WDI_TX_DB_RES;
  830. } else {
  831. start = IPA_WDI_RX_RING_RES;
  832. end = IPA_WDI_RX_COMP_RING_WP_RES;
  833. }
  834. for (i = start; i <= end; i++) {
  835. if (wdi_res[i].valid) {
  836. for (j = 0; j < wdi_res[i].nents; j++) {
  837. iommu_unmap(cb->iommu_domain,
  838. wdi_res[i].res[j].iova,
  839. wdi_res[i].res[j].size);
  840. ipa3_ctx->wdi_map_cnt--;
  841. }
  842. kfree(wdi_res[i].res);
  843. wdi_res[i].valid = false;
  844. }
  845. }
  846. if (ipa3_ctx->wdi_map_cnt == 0)
  847. cb->next_addr = cb->va_end;
  848. }
  849. int ipa_create_gsi_smmu_mapping(int res_idx, bool wlan_smmu_en,
  850. phys_addr_t pa, struct sg_table *sgt, size_t len, bool device,
  851. unsigned long *iova)
  852. {
  853. /* support for SMMU on WLAN but no SMMU on IPA */
  854. if (wlan_smmu_en && ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP]) {
  855. IPAERR("Unsupported SMMU pairing\n");
  856. return -EINVAL;
  857. }
  858. /* legacy: no SMMUs on either end */
  859. if (!wlan_smmu_en && ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP]) {
  860. *iova = pa;
  861. return 0;
  862. }
  863. /* no SMMU on WLAN but SMMU on IPA */
  864. if (!wlan_smmu_en && !ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP]) {
  865. if (ipa_create_ap_smmu_mapping_pa(pa, len,
  866. (res_idx == IPA_WDI_CE_DB_RES) ? true : false,
  867. iova)) {
  868. IPAERR("Fail to create mapping res %d\n",
  869. res_idx);
  870. return -EFAULT;
  871. }
  872. ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len);
  873. return 0;
  874. }
  875. /* SMMU on WLAN and SMMU on IPA */
  876. if (wlan_smmu_en && !ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP]) {
  877. switch (res_idx) {
  878. case IPA_WDI_RX_RING_RP_RES:
  879. case IPA_WDI_RX_COMP_RING_WP_RES:
  880. case IPA_WDI_CE_DB_RES:
  881. case IPA_WDI_TX_DB_RES:
  882. if (ipa_create_ap_smmu_mapping_pa(pa, len,
  883. (res_idx == IPA_WDI_CE_DB_RES) ? true : false,
  884. iova)) {
  885. IPAERR("Fail to create mapping res %d\n",
  886. res_idx);
  887. return -EFAULT;
  888. }
  889. ipa_save_uc_smmu_mapping_pa(res_idx, pa, *iova, len);
  890. break;
  891. case IPA_WDI_RX_RING_RES:
  892. case IPA_WDI_RX_COMP_RING_RES:
  893. case IPA_WDI_TX_RING_RES:
  894. case IPA_WDI_CE_RING_RES:
  895. if (ipa_create_ap_smmu_mapping_sgt(sgt, iova)) {
  896. IPAERR("Fail to create mapping res %d\n",
  897. res_idx);
  898. return -EFAULT;
  899. }
  900. ipa_save_uc_smmu_mapping_sgt(res_idx, sgt, *iova);
  901. break;
  902. default:
  903. WARN_ON(1);
  904. }
  905. }
  906. return 0;
  907. }
  908. static void ipa_gsi_evt_ring_err_cb(struct gsi_evt_err_notify *notify)
  909. {
  910. switch (notify->evt_id) {
  911. case GSI_EVT_OUT_OF_BUFFERS_ERR:
  912. IPAERR("Got GSI_EVT_OUT_OF_BUFFERS_ERR\n");
  913. break;
  914. case GSI_EVT_OUT_OF_RESOURCES_ERR:
  915. IPAERR("Got GSI_EVT_OUT_OF_RESOURCES_ERR\n");
  916. break;
  917. case GSI_EVT_UNSUPPORTED_INTER_EE_OP_ERR:
  918. IPAERR("Got GSI_EVT_UNSUPPORTED_INTER_EE_OP_ERR\n");
  919. break;
  920. case GSI_EVT_EVT_RING_EMPTY_ERR:
  921. IPAERR("Got GSI_EVT_EVT_RING_EMPTY_ERR\n");
  922. break;
  923. default:
  924. IPAERR("Unexpected err evt: %d\n", notify->evt_id);
  925. }
  926. ipa_assert();
  927. }
  928. static void ipa_gsi_chan_err_cb(struct gsi_chan_err_notify *notify)
  929. {
  930. switch (notify->evt_id) {
  931. case GSI_CHAN_INVALID_TRE_ERR:
  932. IPAERR("Got GSI_CHAN_INVALID_TRE_ERR\n");
  933. break;
  934. case GSI_CHAN_NON_ALLOCATED_EVT_ACCESS_ERR:
  935. IPAERR("Got GSI_CHAN_NON_ALLOCATED_EVT_ACCESS_ERR\n");
  936. break;
  937. case GSI_CHAN_OUT_OF_BUFFERS_ERR:
  938. IPAERR("Got GSI_CHAN_OUT_OF_BUFFERS_ERR\n");
  939. break;
  940. case GSI_CHAN_OUT_OF_RESOURCES_ERR:
  941. IPAERR("Got GSI_CHAN_OUT_OF_RESOURCES_ERR\n");
  942. break;
  943. case GSI_CHAN_UNSUPPORTED_INTER_EE_OP_ERR:
  944. IPAERR("Got GSI_CHAN_UNSUPPORTED_INTER_EE_OP_ERR\n");
  945. break;
  946. case GSI_CHAN_HWO_1_ERR:
  947. IPAERR("Got GSI_CHAN_HWO_1_ERR\n");
  948. break;
  949. default:
  950. IPAERR("Unexpected err evt: %d\n", notify->evt_id);
  951. }
  952. ipa_assert();
  953. }
  954. static int ipa3_wdi2_gsi_alloc_evt_ring(
  955. struct gsi_evt_ring_props *evt_ring_props,
  956. enum ipa_client_type client,
  957. unsigned long *evt_ring_hdl)
  958. {
  959. union __packed gsi_evt_scratch evt_scratch;
  960. int result = -EFAULT;
  961. /* GSI EVENT RING allocation */
  962. evt_ring_props->intf = GSI_EVT_CHTYPE_WDI2_EV;
  963. evt_ring_props->intr = GSI_INTR_IRQ;
  964. if (IPA_CLIENT_IS_PROD(client))
  965. evt_ring_props->re_size = GSI_EVT_RING_RE_SIZE_8B;
  966. else
  967. evt_ring_props->re_size = GSI_EVT_RING_RE_SIZE_16B;
  968. evt_ring_props->exclusive = true;
  969. evt_ring_props->err_cb = ipa_gsi_evt_ring_err_cb;
  970. evt_ring_props->user_data = NULL;
  971. evt_ring_props->int_modt = IPA_GSI_EVT_RING_INT_MODT;
  972. evt_ring_props->int_modc = 1;
  973. IPADBG("GSI evt ring len: %d\n", evt_ring_props->ring_len);
  974. IPADBG("client=%d moderation threshold cycles=%u cnt=%u\n",
  975. client,
  976. evt_ring_props->int_modt,
  977. evt_ring_props->int_modc);
  978. result = gsi_alloc_evt_ring(evt_ring_props,
  979. ipa3_ctx->gsi_dev_hdl, evt_ring_hdl);
  980. IPADBG("gsi_alloc_evt_ring result: %d\n", result);
  981. if (result != GSI_STATUS_SUCCESS)
  982. goto fail_alloc_evt_ring;
  983. evt_scratch.wdi.update_ri_moderation_config =
  984. UPDATE_RI_MODERATION_THRESHOLD;
  985. evt_scratch.wdi.update_ri_mod_timer_running = 0;
  986. evt_scratch.wdi.evt_comp_count = 0;
  987. evt_scratch.wdi.last_update_ri = 0;
  988. evt_scratch.wdi.resvd1 = 0;
  989. evt_scratch.wdi.resvd2 = 0;
  990. result = gsi_write_evt_ring_scratch(*evt_ring_hdl, evt_scratch);
  991. if (result != GSI_STATUS_SUCCESS) {
  992. IPAERR("Error writing WDI event ring scratch: %d\n", result);
  993. gsi_dealloc_evt_ring(*evt_ring_hdl);
  994. return -EFAULT;
  995. }
  996. fail_alloc_evt_ring:
  997. return result;
  998. }
  999. static int ipa3_wdi2_gsi_alloc_channel_ring(
  1000. struct gsi_chan_props *channel_props,
  1001. enum ipa_client_type client,
  1002. unsigned long *chan_hdl,
  1003. unsigned long evt_ring_hdl)
  1004. {
  1005. int result = -EFAULT;
  1006. const struct ipa_gsi_ep_config *ep_cfg;
  1007. ep_cfg = ipa3_get_gsi_ep_info(client);
  1008. if (!ep_cfg) {
  1009. IPAERR("Failed getting GSI EP info for client=%d\n",
  1010. client);
  1011. return -EPERM;
  1012. }
  1013. if (IPA_CLIENT_IS_PROD(client)) {
  1014. IPAERR("Client is PROD\n");
  1015. channel_props->dir = GSI_CHAN_DIR_TO_GSI;
  1016. channel_props->re_size = GSI_CHAN_RE_SIZE_16B;
  1017. } else {
  1018. IPAERR("Client is CONS");
  1019. channel_props->dir = GSI_CHAN_DIR_FROM_GSI;
  1020. channel_props->re_size = GSI_CHAN_RE_SIZE_8B;
  1021. }
  1022. channel_props->prot = GSI_CHAN_PROT_WDI2;
  1023. channel_props->ch_id = ep_cfg->ipa_gsi_chan_num;
  1024. channel_props->evt_ring_hdl = evt_ring_hdl;
  1025. IPADBG("ch_id: %d\n", channel_props->ch_id);
  1026. IPADBG("evt_ring_hdl: %ld\n", channel_props->evt_ring_hdl);
  1027. IPADBG("re_size: %d\n", channel_props->re_size);
  1028. IPADBG("Config GSI xfer cb func");
  1029. IPADBG("GSI channel ring len: %d\n", channel_props->ring_len);
  1030. channel_props->xfer_cb = NULL;
  1031. IPADBG("channel ring base vaddr = 0x%pa\n",
  1032. channel_props->ring_base_vaddr);
  1033. channel_props->use_db_eng = GSI_CHAN_DB_MODE;
  1034. channel_props->max_prefetch = GSI_ONE_PREFETCH_SEG;
  1035. channel_props->prefetch_mode = ep_cfg->prefetch_mode;
  1036. channel_props->low_weight = 1;
  1037. channel_props->err_cb = ipa_gsi_chan_err_cb;
  1038. IPADBG("Allocating GSI channel\n");
  1039. result = gsi_alloc_channel(channel_props,
  1040. ipa3_ctx->gsi_dev_hdl,
  1041. chan_hdl);
  1042. if (result != GSI_STATUS_SUCCESS)
  1043. goto fail_alloc_channel;
  1044. IPADBG("gsi_chan_hdl: %ld\n", *chan_hdl);
  1045. fail_alloc_channel:
  1046. return result;
  1047. }
  1048. int ipa3_connect_gsi_wdi_pipe(struct ipa_wdi_in_params *in,
  1049. struct ipa_wdi_out_params *out)
  1050. {
  1051. u32 len;
  1052. int ipa_ep_idx, num_ring_ele;
  1053. int result = -EFAULT;
  1054. enum gsi_status gsi_res;
  1055. struct ipa3_ep_context *ep;
  1056. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  1057. struct gsi_chan_props gsi_channel_props;
  1058. struct gsi_evt_ring_props gsi_evt_ring_props;
  1059. union __packed gsi_channel_scratch gsi_scratch;
  1060. phys_addr_t pa;
  1061. unsigned long va;
  1062. unsigned long wifi_rx_ri_addr = 0;
  1063. u32 gsi_db_reg_phs_addr_lsb;
  1064. u32 gsi_db_reg_phs_addr_msb;
  1065. ipa_ep_idx = ipa3_get_ep_mapping(in->sys.client);
  1066. if (ipa_ep_idx == -1) {
  1067. IPAERR("fail to alloc EP.\n");
  1068. goto fail;
  1069. }
  1070. ep = &ipa3_ctx->ep[ipa_ep_idx];
  1071. if (ep->valid) {
  1072. IPAERR("EP already allocated.\n");
  1073. goto fail;
  1074. }
  1075. IPA_ACTIVE_CLIENTS_INC_EP(in->sys.client);
  1076. memset(&ipa3_ctx->ep[ipa_ep_idx], 0, sizeof(struct ipa3_ep_context));
  1077. memset(&gsi_evt_ring_props, 0, sizeof(gsi_evt_ring_props));
  1078. memset(&gsi_channel_props, 0, sizeof(gsi_channel_props));
  1079. memset(&gsi_scratch, 0, sizeof(gsi_scratch));
  1080. IPADBG("client=%d ep=%d\n", in->sys.client, ipa_ep_idx);
  1081. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1082. if (in->smmu_enabled) {
  1083. IPADBG("comp_ring_size=%d\n",
  1084. in->u.dl_smmu.comp_ring_size);
  1085. IPADBG("ce_ring_size=%d\n", in->u.dl_smmu.ce_ring_size);
  1086. IPADBG("ce_ring_doorbell_pa=0x%pa\n",
  1087. &in->u.dl_smmu.ce_door_bell_pa);
  1088. IPADBG("num_tx_buffers=%d\n",
  1089. in->u.dl_smmu.num_tx_buffers);
  1090. } else {
  1091. IPADBG("comp_ring_base_pa=0x%pa\n",
  1092. &in->u.dl.comp_ring_base_pa);
  1093. IPADBG("comp_ring_size=%d\n", in->u.dl.comp_ring_size);
  1094. IPADBG("ce_ring_base_pa=0x%pa\n",
  1095. &in->u.dl.ce_ring_base_pa);
  1096. IPADBG("ce_ring_size=%d\n", in->u.dl.ce_ring_size);
  1097. IPADBG("ce_ring_doorbell_pa=0x%pa\n",
  1098. &in->u.dl.ce_door_bell_pa);
  1099. IPADBG("num_tx_buffers=%d\n", in->u.dl.num_tx_buffers);
  1100. }
  1101. } else {
  1102. if (in->smmu_enabled) {
  1103. IPADBG("rx_ring_size=%d\n",
  1104. in->u.ul_smmu.rdy_ring_size);
  1105. IPADBG("rx_ring_rp_pa=0x%pa\n",
  1106. &in->u.ul_smmu.rdy_ring_rp_pa);
  1107. IPADBG("rx_comp_ring_size=%d\n",
  1108. in->u.ul_smmu.rdy_comp_ring_size);
  1109. IPADBG("rx_comp_ring_wp_pa=0x%pa\n",
  1110. &in->u.ul_smmu.rdy_comp_ring_wp_pa);
  1111. ipa3_ctx->wdi2_ctx.rdy_ring_rp_pa =
  1112. in->u.ul_smmu.rdy_ring_rp_pa;
  1113. ipa3_ctx->wdi2_ctx.rdy_ring_size =
  1114. in->u.ul_smmu.rdy_ring_size;
  1115. ipa3_ctx->wdi2_ctx.rdy_comp_ring_wp_pa =
  1116. in->u.ul_smmu.rdy_comp_ring_wp_pa;
  1117. ipa3_ctx->wdi2_ctx.rdy_comp_ring_size =
  1118. in->u.ul_smmu.rdy_comp_ring_size;
  1119. } else {
  1120. IPADBG("rx_ring_base_pa=0x%pa\n",
  1121. &in->u.ul.rdy_ring_base_pa);
  1122. IPADBG("rx_ring_size=%d\n",
  1123. in->u.ul.rdy_ring_size);
  1124. IPADBG("rx_ring_rp_pa=0x%pa\n",
  1125. &in->u.ul.rdy_ring_rp_pa);
  1126. IPADBG("rx_comp_ring_base_pa=0x%pa\n",
  1127. &in->u.ul.rdy_comp_ring_base_pa);
  1128. IPADBG("rx_comp_ring_size=%d\n",
  1129. in->u.ul.rdy_comp_ring_size);
  1130. IPADBG("rx_comp_ring_wp_pa=0x%pa\n",
  1131. &in->u.ul.rdy_comp_ring_wp_pa);
  1132. ipa3_ctx->wdi2_ctx.rdy_ring_base_pa =
  1133. in->u.ul.rdy_ring_base_pa;
  1134. ipa3_ctx->wdi2_ctx.rdy_ring_rp_pa =
  1135. in->u.ul.rdy_ring_rp_pa;
  1136. ipa3_ctx->wdi2_ctx.rdy_ring_size =
  1137. in->u.ul.rdy_ring_size;
  1138. ipa3_ctx->wdi2_ctx.rdy_comp_ring_base_pa =
  1139. in->u.ul.rdy_comp_ring_base_pa;
  1140. ipa3_ctx->wdi2_ctx.rdy_comp_ring_wp_pa =
  1141. in->u.ul.rdy_comp_ring_wp_pa;
  1142. ipa3_ctx->wdi2_ctx.rdy_comp_ring_size =
  1143. in->u.ul.rdy_comp_ring_size;
  1144. }
  1145. }
  1146. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1147. len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size :
  1148. in->u.dl.comp_ring_size;
  1149. IPADBG("TX ring smmu_en=%d ring_size=%d %d\n",
  1150. in->smmu_enabled,
  1151. in->u.dl_smmu.comp_ring_size,
  1152. in->u.dl.comp_ring_size);
  1153. if (ipa_create_gsi_smmu_mapping(IPA_WDI_TX_RING_RES,
  1154. in->smmu_enabled,
  1155. in->u.dl.comp_ring_base_pa,
  1156. &in->u.dl_smmu.comp_ring,
  1157. len,
  1158. false,
  1159. &va)) {
  1160. IPAERR("fail to create gsi mapping TX ring.\n");
  1161. result = -ENOMEM;
  1162. goto gsi_timeout;
  1163. }
  1164. gsi_channel_props.ring_base_addr = va;
  1165. gsi_channel_props.ring_base_vaddr = NULL;
  1166. gsi_channel_props.ring_len = len;
  1167. len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size :
  1168. in->u.dl.ce_ring_size;
  1169. IPADBG("CE ring smmu_en=%d ring_size=%d %d\n",
  1170. in->smmu_enabled,
  1171. in->u.dl_smmu.ce_ring_size,
  1172. in->u.dl.ce_ring_size);
  1173. /* WA: wlan passed ce_ring sg_table PA directly */
  1174. if (ipa_create_gsi_smmu_mapping(IPA_WDI_CE_RING_RES,
  1175. in->smmu_enabled,
  1176. in->u.dl.ce_ring_base_pa,
  1177. &in->u.dl_smmu.ce_ring,
  1178. len,
  1179. false,
  1180. &va)) {
  1181. IPAERR("fail to create gsi mapping CE ring.\n");
  1182. result = -ENOMEM;
  1183. goto gsi_timeout;
  1184. }
  1185. gsi_evt_ring_props.ring_base_addr = va;
  1186. gsi_evt_ring_props.ring_base_vaddr = NULL;
  1187. gsi_evt_ring_props.ring_len = len;
  1188. pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa :
  1189. in->u.dl.ce_door_bell_pa;
  1190. if (ipa_create_gsi_smmu_mapping(IPA_WDI_CE_DB_RES,
  1191. in->smmu_enabled,
  1192. pa,
  1193. NULL,
  1194. 4,
  1195. true,
  1196. &va)) {
  1197. IPAERR("fail to create gsi mapping CE DB.\n");
  1198. result = -ENOMEM;
  1199. goto gsi_timeout;
  1200. }
  1201. gsi_evt_ring_props.rp_update_addr = va;
  1202. } else {
  1203. len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size :
  1204. in->u.ul.rdy_ring_size;
  1205. IPADBG("RX ring smmu_en=%d ring_size=%d %d\n",
  1206. in->smmu_enabled,
  1207. in->u.ul_smmu.rdy_ring_size,
  1208. in->u.ul.rdy_ring_size);
  1209. if (ipa_create_gsi_smmu_mapping(IPA_WDI_RX_RING_RES,
  1210. in->smmu_enabled,
  1211. in->u.ul.rdy_ring_base_pa,
  1212. &in->u.ul_smmu.rdy_ring,
  1213. len,
  1214. false,
  1215. &va)) {
  1216. IPAERR("fail to create gsi RX ring.\n");
  1217. result = -ENOMEM;
  1218. goto gsi_timeout;
  1219. }
  1220. gsi_channel_props.ring_base_addr = va;
  1221. gsi_channel_props.ring_base_vaddr = NULL;
  1222. gsi_channel_props.ring_len = len;
  1223. pa = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_rp_pa :
  1224. in->u.ul.rdy_ring_rp_pa;
  1225. if (ipa_create_gsi_smmu_mapping(IPA_WDI_RX_RING_RP_RES,
  1226. in->smmu_enabled,
  1227. pa,
  1228. NULL,
  1229. 4,
  1230. false,
  1231. &wifi_rx_ri_addr)) {
  1232. IPAERR("fail to create gsi RX rng RP\n");
  1233. result = -ENOMEM;
  1234. goto gsi_timeout;
  1235. }
  1236. len = in->smmu_enabled ?
  1237. in->u.ul_smmu.rdy_comp_ring_size :
  1238. in->u.ul.rdy_comp_ring_size;
  1239. IPADBG("RX ring smmu_en=%d comp_ring_size=%d %d\n",
  1240. in->smmu_enabled,
  1241. in->u.ul_smmu.rdy_comp_ring_size,
  1242. in->u.ul.rdy_comp_ring_size);
  1243. if (ipa_create_gsi_smmu_mapping(
  1244. IPA_WDI_RX_COMP_RING_RES,
  1245. in->smmu_enabled,
  1246. in->u.ul.rdy_comp_ring_base_pa,
  1247. &in->u.ul_smmu.rdy_comp_ring,
  1248. len,
  1249. false,
  1250. &va)) {
  1251. IPAERR("fail to create gsi RX comp_ring.\n");
  1252. result = -ENOMEM;
  1253. goto gsi_timeout;
  1254. }
  1255. gsi_evt_ring_props.ring_base_addr = va;
  1256. gsi_evt_ring_props.ring_base_vaddr = NULL;
  1257. gsi_evt_ring_props.ring_len = len;
  1258. pa = in->smmu_enabled ?
  1259. in->u.ul_smmu.rdy_comp_ring_wp_pa :
  1260. in->u.ul.rdy_comp_ring_wp_pa;
  1261. if (ipa_create_gsi_smmu_mapping(
  1262. IPA_WDI_RX_COMP_RING_WP_RES,
  1263. in->smmu_enabled,
  1264. pa,
  1265. NULL,
  1266. 4,
  1267. false,
  1268. &va)) {
  1269. IPAERR("fail to create gsi RX comp_rng WP\n");
  1270. result = -ENOMEM;
  1271. goto gsi_timeout;
  1272. }
  1273. gsi_evt_ring_props.rp_update_addr = va;
  1274. }
  1275. ep->valid = 1;
  1276. ep->client = in->sys.client;
  1277. ep->keep_ipa_awake = in->sys.keep_ipa_awake;
  1278. ep->skip_ep_cfg = in->sys.skip_ep_cfg;
  1279. ep->client_notify = in->sys.notify;
  1280. ep->priv = in->sys.priv;
  1281. if (IPA_CLIENT_IS_PROD(in->sys.client)) {
  1282. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  1283. ep_cfg_ctrl.ipa_ep_delay = true;
  1284. ipa3_cfg_ep_ctrl(ipa_ep_idx, &ep_cfg_ctrl);
  1285. }
  1286. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1287. in->sys.ipa_ep_cfg.aggr.aggr_en = IPA_ENABLE_AGGR;
  1288. in->sys.ipa_ep_cfg.aggr.aggr = IPA_GENERIC;
  1289. in->sys.ipa_ep_cfg.aggr.aggr_pkt_limit = IPA_AGGR_PKT_LIMIT;
  1290. in->sys.ipa_ep_cfg.aggr.aggr_byte_limit =
  1291. IPA_AGGR_HARD_BYTE_LIMIT;
  1292. in->sys.ipa_ep_cfg.aggr.aggr_hard_byte_limit_en =
  1293. IPA_ENABLE_AGGR;
  1294. }
  1295. if (!ep->skip_ep_cfg) {
  1296. if (ipa3_cfg_ep(ipa_ep_idx, &in->sys.ipa_ep_cfg)) {
  1297. IPAERR("fail to configure EP.\n");
  1298. goto ipa_cfg_ep_fail;
  1299. }
  1300. IPADBG("ep configuration successful\n");
  1301. } else {
  1302. IPADBG("Skipping endpoint configuration.\n");
  1303. }
  1304. result = ipa3_wdi2_gsi_alloc_evt_ring(&gsi_evt_ring_props,
  1305. in->sys.client,
  1306. &ep->gsi_evt_ring_hdl);
  1307. if (result)
  1308. goto fail_alloc_evt_ring;
  1309. /*copy mem info */
  1310. ep->gsi_mem_info.evt_ring_len = gsi_evt_ring_props.ring_len;
  1311. ep->gsi_mem_info.evt_ring_base_addr = gsi_evt_ring_props.ring_base_addr;
  1312. ep->gsi_mem_info.evt_ring_base_vaddr =
  1313. gsi_evt_ring_props.ring_base_vaddr;
  1314. IPAERR("evt ring len: %d\n", ep->gsi_mem_info.evt_ring_len);
  1315. IPAERR("element size: %d\n", gsi_evt_ring_props.re_size);
  1316. result = ipa3_wdi2_gsi_alloc_channel_ring(&gsi_channel_props,
  1317. in->sys.client,
  1318. &ep->gsi_chan_hdl, ep->gsi_evt_ring_hdl);
  1319. if (result)
  1320. goto fail_alloc_channel;
  1321. ep->gsi_mem_info.chan_ring_len = gsi_channel_props.ring_len;
  1322. ep->gsi_mem_info.chan_ring_base_addr = gsi_channel_props.ring_base_addr;
  1323. ep->gsi_mem_info.chan_ring_base_vaddr =
  1324. gsi_channel_props.ring_base_vaddr;
  1325. num_ring_ele = ep->gsi_mem_info.evt_ring_len/gsi_evt_ring_props.re_size;
  1326. IPAERR("UPDATE_RI_MODERATION_THRESHOLD: %d\n", num_ring_ele);
  1327. if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_7) {
  1328. if (IPA_CLIENT_IS_PROD(in->sys.client)) {
  1329. gsi_scratch.wdi.wifi_rx_ri_addr_low =
  1330. wifi_rx_ri_addr & 0xFFFFFFFF;
  1331. gsi_scratch.wdi.wifi_rx_ri_addr_high =
  1332. (wifi_rx_ri_addr & 0xFFFFF00000000) >> 32;
  1333. gsi_scratch.wdi.wdi_rx_vdev_id = 0xff;
  1334. gsi_scratch.wdi.wdi_rx_fw_desc = 0xff;
  1335. gsi_scratch.wdi.endp_metadatareg_offset =
  1336. ipahal_get_reg_mn_ofst(
  1337. IPA_ENDP_INIT_HDR_METADATA_n, 0,
  1338. ipa_ep_idx)/4;
  1339. gsi_scratch.wdi.qmap_id = 0;
  1340. }
  1341. gsi_scratch.wdi.update_ri_moderation_threshold =
  1342. min(UPDATE_RI_MODERATION_THRESHOLD, num_ring_ele);
  1343. gsi_scratch.wdi.update_ri_moderation_counter = 0;
  1344. gsi_scratch.wdi.wdi_rx_tre_proc_in_progress = 0;
  1345. } else {
  1346. if (IPA_CLIENT_IS_PROD(in->sys.client)) {
  1347. gsi_scratch.wdi2_new.wifi_rx_ri_addr_low =
  1348. wifi_rx_ri_addr & 0xFFFFFFFF;
  1349. gsi_scratch.wdi2_new.wifi_rx_ri_addr_high =
  1350. (wifi_rx_ri_addr & 0xFFFFF00000000) >> 32;
  1351. gsi_scratch.wdi2_new.wdi_rx_vdev_id = 0xff;
  1352. gsi_scratch.wdi2_new.wdi_rx_fw_desc = 0xff;
  1353. gsi_scratch.wdi2_new.endp_metadatareg_offset =
  1354. ipahal_get_reg_mn_ofst(
  1355. IPA_ENDP_INIT_HDR_METADATA_n, 0,
  1356. ipa_ep_idx)/4;
  1357. gsi_scratch.wdi2_new.qmap_id = 0;
  1358. }
  1359. gsi_scratch.wdi2_new.update_ri_moderation_threshold =
  1360. min(UPDATE_RI_MODERATION_THRESHOLD, num_ring_ele);
  1361. gsi_scratch.wdi2_new.update_ri_moderation_counter = 0;
  1362. gsi_scratch.wdi2_new.wdi_rx_tre_proc_in_progress = 0;
  1363. }
  1364. result = gsi_write_channel_scratch(ep->gsi_chan_hdl,
  1365. gsi_scratch);
  1366. if (result != GSI_STATUS_SUCCESS) {
  1367. IPAERR("gsi_write_channel_scratch failed %d\n",
  1368. result);
  1369. goto fail_write_channel_scratch;
  1370. }
  1371. /* for AP+STA stats update */
  1372. if (in->wdi_notify)
  1373. ipa3_ctx->uc_wdi_ctx.stats_notify = in->wdi_notify;
  1374. else
  1375. IPADBG("in->wdi_notify is null\n");
  1376. ipa3_enable_data_path(ipa_ep_idx);
  1377. if (!ep->skip_ep_cfg && IPA_CLIENT_IS_PROD(in->sys.client))
  1378. ipa3_install_dflt_flt_rules(ipa_ep_idx);
  1379. if (!ep->keep_ipa_awake)
  1380. IPA_ACTIVE_CLIENTS_DEC_EP(in->sys.client);
  1381. IPADBG("GSI connected.\n");
  1382. gsi_res = gsi_query_channel_db_addr(ep->gsi_chan_hdl,
  1383. &gsi_db_reg_phs_addr_lsb,
  1384. &gsi_db_reg_phs_addr_msb);
  1385. out->uc_door_bell_pa = gsi_db_reg_phs_addr_lsb;
  1386. IPADBG("GSI query result: %d\n", gsi_res);
  1387. IPADBG("GSI lsb addr: %d\n", gsi_db_reg_phs_addr_lsb);
  1388. IPADBG("GSI msb addr: %d\n", gsi_db_reg_phs_addr_msb);
  1389. ep->gsi_offload_state |= IPA_WDI_CONNECTED;
  1390. out->clnt_hdl = ipa_ep_idx;
  1391. return 0;
  1392. fail_write_channel_scratch:
  1393. gsi_dealloc_channel(ep->gsi_chan_hdl);
  1394. fail_alloc_channel:
  1395. if (ep->gsi_evt_ring_hdl != ~0) {
  1396. gsi_dealloc_evt_ring(ep->gsi_evt_ring_hdl);
  1397. ep->gsi_evt_ring_hdl = ~0;
  1398. }
  1399. fail_alloc_evt_ring:
  1400. ipa_cfg_ep_fail:
  1401. memset(&ipa3_ctx->ep[ipa_ep_idx], 0, sizeof(struct ipa3_ep_context));
  1402. gsi_timeout:
  1403. ipa_release_ap_smmu_mappings(in->sys.client);
  1404. IPA_ACTIVE_CLIENTS_DEC_EP(in->sys.client);
  1405. fail:
  1406. return result;
  1407. }
  1408. /**
  1409. * ipa3_connect_wdi_pipe() - WDI client connect
  1410. * @in: [in] input parameters from client
  1411. * @out: [out] output params to client
  1412. *
  1413. * Returns: 0 on success, negative on failure
  1414. *
  1415. * Note: Should not be called from atomic context
  1416. */
  1417. int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in,
  1418. struct ipa_wdi_out_params *out)
  1419. {
  1420. int ipa_ep_idx;
  1421. int result = -EFAULT;
  1422. struct ipa3_ep_context *ep;
  1423. struct ipa_mem_buffer cmd;
  1424. struct IpaHwWdiTxSetUpCmdData_t *tx;
  1425. struct IpaHwWdiRxSetUpCmdData_t *rx;
  1426. struct IpaHwWdi2TxSetUpCmdData_t *tx_2;
  1427. struct IpaHwWdi2RxSetUpCmdData_t *rx_2;
  1428. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  1429. unsigned long va;
  1430. phys_addr_t pa;
  1431. u32 len;
  1432. if (in == NULL || out == NULL || in->sys.client >= IPA_CLIENT_MAX) {
  1433. IPAERR("bad parm. in=%pK out=%pK\n", in, out);
  1434. if (in)
  1435. IPAERR("client = %d\n", in->sys.client);
  1436. return -EINVAL;
  1437. }
  1438. if (!in->smmu_enabled) {
  1439. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1440. if (in->u.dl.comp_ring_base_pa %
  1441. IPA_WDI_RING_ALIGNMENT ||
  1442. in->u.dl.ce_ring_base_pa %
  1443. IPA_WDI_RING_ALIGNMENT) {
  1444. IPAERR("alignment failure on TX\n");
  1445. return -EINVAL;
  1446. }
  1447. } else {
  1448. if (in->u.ul.rdy_ring_base_pa %
  1449. IPA_WDI_RING_ALIGNMENT) {
  1450. IPAERR("alignment failure on RX\n");
  1451. return -EINVAL;
  1452. }
  1453. }
  1454. }
  1455. if (ipa3_ctx->ipa_wdi2_over_gsi)
  1456. return ipa3_connect_gsi_wdi_pipe(in, out);
  1457. result = ipa3_uc_state_check();
  1458. if (result)
  1459. return result;
  1460. ipa_ep_idx = ipa3_get_ep_mapping(in->sys.client);
  1461. if (ipa_ep_idx == -1) {
  1462. IPAERR("fail to alloc EP.\n");
  1463. goto fail;
  1464. }
  1465. ep = &ipa3_ctx->ep[ipa_ep_idx];
  1466. if (ep->valid) {
  1467. IPAERR("EP already allocated.\n");
  1468. goto fail;
  1469. }
  1470. memset(&ipa3_ctx->ep[ipa_ep_idx], 0, sizeof(struct ipa3_ep_context));
  1471. IPA_ACTIVE_CLIENTS_INC_EP(in->sys.client);
  1472. IPADBG("client=%d ep=%d\n", in->sys.client, ipa_ep_idx);
  1473. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1474. if (ipa3_ctx->ipa_wdi2)
  1475. cmd.size = sizeof(*tx_2);
  1476. else
  1477. cmd.size = sizeof(*tx);
  1478. if (in->smmu_enabled) {
  1479. IPADBG("comp_ring_size=%d\n",
  1480. in->u.dl_smmu.comp_ring_size);
  1481. IPADBG("ce_ring_size=%d\n", in->u.dl_smmu.ce_ring_size);
  1482. IPADBG("ce_ring_doorbell_pa=0x%pa\n",
  1483. &in->u.dl_smmu.ce_door_bell_pa);
  1484. IPADBG("num_tx_buffers=%d\n",
  1485. in->u.dl_smmu.num_tx_buffers);
  1486. } else {
  1487. IPADBG("comp_ring_base_pa=0x%pa\n",
  1488. &in->u.dl.comp_ring_base_pa);
  1489. IPADBG("comp_ring_size=%d\n", in->u.dl.comp_ring_size);
  1490. IPADBG("ce_ring_base_pa=0x%pa\n",
  1491. &in->u.dl.ce_ring_base_pa);
  1492. IPADBG("ce_ring_size=%d\n", in->u.dl.ce_ring_size);
  1493. IPADBG("ce_ring_doorbell_pa=0x%pa\n",
  1494. &in->u.dl.ce_door_bell_pa);
  1495. IPADBG("num_tx_buffers=%d\n", in->u.dl.num_tx_buffers);
  1496. }
  1497. } else {
  1498. if (ipa3_ctx->ipa_wdi2)
  1499. cmd.size = sizeof(*rx_2);
  1500. else
  1501. cmd.size = sizeof(*rx);
  1502. if (in->smmu_enabled) {
  1503. IPADBG("rx_ring_size=%d\n",
  1504. in->u.ul_smmu.rdy_ring_size);
  1505. IPADBG("rx_ring_rp_pa=0x%pa\n",
  1506. &in->u.ul_smmu.rdy_ring_rp_pa);
  1507. IPADBG("rx_comp_ring_size=%d\n",
  1508. in->u.ul_smmu.rdy_comp_ring_size);
  1509. IPADBG("rx_comp_ring_wp_pa=0x%pa\n",
  1510. &in->u.ul_smmu.rdy_comp_ring_wp_pa);
  1511. ipa3_ctx->uc_ctx.rdy_ring_rp_pa =
  1512. in->u.ul_smmu.rdy_ring_rp_pa;
  1513. ipa3_ctx->uc_ctx.rdy_ring_size =
  1514. in->u.ul_smmu.rdy_ring_size;
  1515. ipa3_ctx->uc_ctx.rdy_comp_ring_wp_pa =
  1516. in->u.ul_smmu.rdy_comp_ring_wp_pa;
  1517. ipa3_ctx->uc_ctx.rdy_comp_ring_size =
  1518. in->u.ul_smmu.rdy_comp_ring_size;
  1519. } else {
  1520. IPADBG("rx_ring_base_pa=0x%pa\n",
  1521. &in->u.ul.rdy_ring_base_pa);
  1522. IPADBG("rx_ring_size=%d\n",
  1523. in->u.ul.rdy_ring_size);
  1524. IPADBG("rx_ring_rp_pa=0x%pa\n",
  1525. &in->u.ul.rdy_ring_rp_pa);
  1526. IPADBG("rx_comp_ring_base_pa=0x%pa\n",
  1527. &in->u.ul.rdy_comp_ring_base_pa);
  1528. IPADBG("rx_comp_ring_size=%d\n",
  1529. in->u.ul.rdy_comp_ring_size);
  1530. IPADBG("rx_comp_ring_wp_pa=0x%pa\n",
  1531. &in->u.ul.rdy_comp_ring_wp_pa);
  1532. ipa3_ctx->uc_ctx.rdy_ring_base_pa =
  1533. in->u.ul.rdy_ring_base_pa;
  1534. ipa3_ctx->uc_ctx.rdy_ring_rp_pa =
  1535. in->u.ul.rdy_ring_rp_pa;
  1536. ipa3_ctx->uc_ctx.rdy_ring_size =
  1537. in->u.ul.rdy_ring_size;
  1538. ipa3_ctx->uc_ctx.rdy_comp_ring_base_pa =
  1539. in->u.ul.rdy_comp_ring_base_pa;
  1540. ipa3_ctx->uc_ctx.rdy_comp_ring_wp_pa =
  1541. in->u.ul.rdy_comp_ring_wp_pa;
  1542. ipa3_ctx->uc_ctx.rdy_comp_ring_size =
  1543. in->u.ul.rdy_comp_ring_size;
  1544. }
  1545. }
  1546. cmd.base = dma_alloc_coherent(ipa3_ctx->uc_pdev, cmd.size,
  1547. &cmd.phys_base, GFP_KERNEL);
  1548. if (cmd.base == NULL) {
  1549. IPAERR("fail to get DMA memory.\n");
  1550. result = -ENOMEM;
  1551. goto dma_alloc_fail;
  1552. }
  1553. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1554. if (ipa3_ctx->ipa_wdi2) {
  1555. tx_2 = (struct IpaHwWdi2TxSetUpCmdData_t *)cmd.base;
  1556. len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size :
  1557. in->u.dl.comp_ring_size;
  1558. IPADBG("TX_2 ring smmu_en=%d ring_size=%d %d\n",
  1559. in->smmu_enabled,
  1560. in->u.dl_smmu.comp_ring_size,
  1561. in->u.dl.comp_ring_size);
  1562. if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES,
  1563. in->smmu_enabled,
  1564. in->u.dl.comp_ring_base_pa,
  1565. &in->u.dl_smmu.comp_ring,
  1566. len,
  1567. false,
  1568. &va)) {
  1569. IPAERR("fail to create uc mapping TX ring.\n");
  1570. result = -ENOMEM;
  1571. goto uc_timeout;
  1572. }
  1573. tx_2->comp_ring_base_pa_hi =
  1574. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1575. tx_2->comp_ring_base_pa = (u32) (va & 0xFFFFFFFF);
  1576. tx_2->comp_ring_size = len;
  1577. IPADBG("TX_2 comp_ring_base_pa_hi=0x%08x :0x%08x\n",
  1578. tx_2->comp_ring_base_pa_hi,
  1579. tx_2->comp_ring_base_pa);
  1580. len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size :
  1581. in->u.dl.ce_ring_size;
  1582. IPADBG("TX_2 CE ring smmu_en=%d ring_size=%d %d\n",
  1583. in->smmu_enabled,
  1584. in->u.dl_smmu.ce_ring_size,
  1585. in->u.dl.ce_ring_size);
  1586. /* WA: wlan passed ce_ring sg_table PA directly */
  1587. if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_RING_RES,
  1588. in->smmu_enabled,
  1589. in->u.dl.ce_ring_base_pa,
  1590. &in->u.dl_smmu.ce_ring,
  1591. len,
  1592. false,
  1593. &va)) {
  1594. IPAERR("fail to create uc mapping CE ring.\n");
  1595. result = -ENOMEM;
  1596. goto uc_timeout;
  1597. }
  1598. tx_2->ce_ring_base_pa_hi =
  1599. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1600. tx_2->ce_ring_base_pa = (u32) (va & 0xFFFFFFFF);
  1601. tx_2->ce_ring_size = len;
  1602. IPADBG("TX_2 ce_ring_base_pa_hi=0x%08x :0x%08x\n",
  1603. tx_2->ce_ring_base_pa_hi,
  1604. tx_2->ce_ring_base_pa);
  1605. pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa :
  1606. in->u.dl.ce_door_bell_pa;
  1607. if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES,
  1608. in->smmu_enabled,
  1609. pa,
  1610. NULL,
  1611. 4,
  1612. true,
  1613. &va)) {
  1614. IPAERR("fail to create uc mapping CE DB.\n");
  1615. result = -ENOMEM;
  1616. goto uc_timeout;
  1617. }
  1618. tx_2->ce_ring_doorbell_pa_hi =
  1619. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1620. tx_2->ce_ring_doorbell_pa = (u32) (va & 0xFFFFFFFF);
  1621. IPADBG("TX_2 ce_ring_doorbell_pa_hi=0x%08x :0x%08x\n",
  1622. tx_2->ce_ring_doorbell_pa_hi,
  1623. tx_2->ce_ring_doorbell_pa);
  1624. tx_2->num_tx_buffers = in->smmu_enabled ?
  1625. in->u.dl_smmu.num_tx_buffers :
  1626. in->u.dl.num_tx_buffers;
  1627. tx_2->ipa_pipe_number = ipa_ep_idx;
  1628. } else {
  1629. tx = (struct IpaHwWdiTxSetUpCmdData_t *)cmd.base;
  1630. len = in->smmu_enabled ? in->u.dl_smmu.comp_ring_size :
  1631. in->u.dl.comp_ring_size;
  1632. IPADBG("TX ring smmu_en=%d ring_size=%d %d\n",
  1633. in->smmu_enabled,
  1634. in->u.dl_smmu.comp_ring_size,
  1635. in->u.dl.comp_ring_size);
  1636. if (ipa_create_uc_smmu_mapping(IPA_WDI_TX_RING_RES,
  1637. in->smmu_enabled,
  1638. in->u.dl.comp_ring_base_pa,
  1639. &in->u.dl_smmu.comp_ring,
  1640. len,
  1641. false,
  1642. &va)) {
  1643. IPAERR("fail to create uc mapping TX ring.\n");
  1644. result = -ENOMEM;
  1645. goto uc_timeout;
  1646. }
  1647. tx->comp_ring_base_pa = va;
  1648. tx->comp_ring_size = len;
  1649. len = in->smmu_enabled ? in->u.dl_smmu.ce_ring_size :
  1650. in->u.dl.ce_ring_size;
  1651. IPADBG("TX CE ring smmu_en=%d ring_size=%d %d 0x%lx\n",
  1652. in->smmu_enabled,
  1653. in->u.dl_smmu.ce_ring_size,
  1654. in->u.dl.ce_ring_size,
  1655. va);
  1656. if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_RING_RES,
  1657. in->smmu_enabled,
  1658. in->u.dl.ce_ring_base_pa,
  1659. &in->u.dl_smmu.ce_ring,
  1660. len,
  1661. false,
  1662. &va)) {
  1663. IPAERR("fail to create uc mapping CE ring.\n");
  1664. result = -ENOMEM;
  1665. goto uc_timeout;
  1666. }
  1667. tx->ce_ring_base_pa = va;
  1668. tx->ce_ring_size = len;
  1669. pa = in->smmu_enabled ? in->u.dl_smmu.ce_door_bell_pa :
  1670. in->u.dl.ce_door_bell_pa;
  1671. if (ipa_create_uc_smmu_mapping(IPA_WDI_CE_DB_RES,
  1672. in->smmu_enabled,
  1673. pa,
  1674. NULL,
  1675. 4,
  1676. true,
  1677. &va)) {
  1678. IPAERR("fail to create uc mapping CE DB.\n");
  1679. result = -ENOMEM;
  1680. goto uc_timeout;
  1681. }
  1682. IPADBG("CE doorbell pa: 0x%pa va:0x%lx\n", &pa, va);
  1683. IPADBG("Is wdi_over_pcie ? (%s)\n",
  1684. ipa3_ctx->wdi_over_pcie ? "Yes":"No");
  1685. if (ipa3_ctx->wdi_over_pcie)
  1686. tx->ce_ring_doorbell_pa = pa;
  1687. else
  1688. tx->ce_ring_doorbell_pa = va;
  1689. tx->num_tx_buffers = in->smmu_enabled ?
  1690. in->u.dl_smmu.num_tx_buffers :
  1691. in->u.dl.num_tx_buffers;
  1692. tx->ipa_pipe_number = ipa_ep_idx;
  1693. }
  1694. out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base +
  1695. ipahal_get_reg_base() +
  1696. ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
  1697. IPA_HW_WDI_TX_MBOX_START_INDEX/32,
  1698. IPA_HW_WDI_TX_MBOX_START_INDEX % 32);
  1699. } else {
  1700. if (ipa3_ctx->ipa_wdi2) {
  1701. rx_2 = (struct IpaHwWdi2RxSetUpCmdData_t *)cmd.base;
  1702. len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size :
  1703. in->u.ul.rdy_ring_size;
  1704. IPADBG("RX_2 ring smmu_en=%d ring_size=%d %d\n",
  1705. in->smmu_enabled,
  1706. in->u.ul_smmu.rdy_ring_size,
  1707. in->u.ul.rdy_ring_size);
  1708. if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES,
  1709. in->smmu_enabled,
  1710. in->u.ul.rdy_ring_base_pa,
  1711. &in->u.ul_smmu.rdy_ring,
  1712. len,
  1713. false,
  1714. &va)) {
  1715. IPAERR("fail to create uc RX_2 ring.\n");
  1716. result = -ENOMEM;
  1717. goto uc_timeout;
  1718. }
  1719. rx_2->rx_ring_base_pa_hi =
  1720. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1721. rx_2->rx_ring_base_pa = (u32) (va & 0xFFFFFFFF);
  1722. rx_2->rx_ring_size = len;
  1723. IPADBG("RX_2 rx_ring_base_pa_hi=0x%08x:0x%08x\n",
  1724. rx_2->rx_ring_base_pa_hi,
  1725. rx_2->rx_ring_base_pa);
  1726. pa = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_rp_pa :
  1727. in->u.ul.rdy_ring_rp_pa;
  1728. if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RP_RES,
  1729. in->smmu_enabled,
  1730. pa,
  1731. NULL,
  1732. 4,
  1733. false,
  1734. &va)) {
  1735. IPAERR("fail to create uc RX_2 rng RP\n");
  1736. result = -ENOMEM;
  1737. goto uc_timeout;
  1738. }
  1739. rx_2->rx_ring_rp_pa_hi =
  1740. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1741. rx_2->rx_ring_rp_pa = (u32) (va & 0xFFFFFFFF);
  1742. IPADBG("RX_2 rx_ring_rp_pa_hi=0x%08x :0x%08x\n",
  1743. rx_2->rx_ring_rp_pa_hi,
  1744. rx_2->rx_ring_rp_pa);
  1745. len = in->smmu_enabled ?
  1746. in->u.ul_smmu.rdy_comp_ring_size :
  1747. in->u.ul.rdy_comp_ring_size;
  1748. IPADBG("RX_2 ring smmu_en=%d comp_ring_size=%d %d\n",
  1749. in->smmu_enabled,
  1750. in->u.ul_smmu.rdy_comp_ring_size,
  1751. in->u.ul.rdy_comp_ring_size);
  1752. if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_COMP_RING_RES,
  1753. in->smmu_enabled,
  1754. in->u.ul.rdy_comp_ring_base_pa,
  1755. &in->u.ul_smmu.rdy_comp_ring,
  1756. len,
  1757. false,
  1758. &va)) {
  1759. IPAERR("fail to create uc RX_2 comp_ring.\n");
  1760. result = -ENOMEM;
  1761. goto uc_timeout;
  1762. }
  1763. rx_2->rx_comp_ring_base_pa_hi =
  1764. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1765. rx_2->rx_comp_ring_base_pa = (u32) (va & 0xFFFFFFFF);
  1766. rx_2->rx_comp_ring_size = len;
  1767. IPADBG("RX_2 rx_comp_ring_base_pa_hi=0x%08x:0x%08x\n",
  1768. rx_2->rx_comp_ring_base_pa_hi,
  1769. rx_2->rx_comp_ring_base_pa);
  1770. pa = in->smmu_enabled ?
  1771. in->u.ul_smmu.rdy_comp_ring_wp_pa :
  1772. in->u.ul.rdy_comp_ring_wp_pa;
  1773. if (ipa_create_uc_smmu_mapping(
  1774. IPA_WDI_RX_COMP_RING_WP_RES,
  1775. in->smmu_enabled,
  1776. pa,
  1777. NULL,
  1778. 4,
  1779. false,
  1780. &va)) {
  1781. IPAERR("fail to create uc RX_2 comp_rng WP\n");
  1782. result = -ENOMEM;
  1783. goto uc_timeout;
  1784. }
  1785. rx_2->rx_comp_ring_wp_pa_hi =
  1786. (u32) ((va & 0xFFFFFFFF00000000) >> 32);
  1787. rx_2->rx_comp_ring_wp_pa = (u32) (va & 0xFFFFFFFF);
  1788. IPADBG("RX_2 rx_comp_ring_wp_pa_hi=0x%08x:0x%08x\n",
  1789. rx_2->rx_comp_ring_wp_pa_hi,
  1790. rx_2->rx_comp_ring_wp_pa);
  1791. rx_2->ipa_pipe_number = ipa_ep_idx;
  1792. } else {
  1793. rx = (struct IpaHwWdiRxSetUpCmdData_t *)cmd.base;
  1794. len = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_size :
  1795. in->u.ul.rdy_ring_size;
  1796. IPADBG("RX ring smmu_en=%d ring_size=%d %d\n",
  1797. in->smmu_enabled,
  1798. in->u.ul_smmu.rdy_ring_size,
  1799. in->u.ul.rdy_ring_size);
  1800. if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RES,
  1801. in->smmu_enabled,
  1802. in->u.ul.rdy_ring_base_pa,
  1803. &in->u.ul_smmu.rdy_ring,
  1804. len,
  1805. false,
  1806. &va)) {
  1807. IPAERR("fail to create uc mapping RX ring.\n");
  1808. result = -ENOMEM;
  1809. goto uc_timeout;
  1810. }
  1811. rx->rx_ring_base_pa = va;
  1812. rx->rx_ring_size = len;
  1813. pa = in->smmu_enabled ? in->u.ul_smmu.rdy_ring_rp_pa :
  1814. in->u.ul.rdy_ring_rp_pa;
  1815. if (ipa_create_uc_smmu_mapping(IPA_WDI_RX_RING_RP_RES,
  1816. in->smmu_enabled,
  1817. pa,
  1818. NULL,
  1819. 4,
  1820. false,
  1821. &va)) {
  1822. IPAERR("fail to create uc mapping RX rng RP\n");
  1823. result = -ENOMEM;
  1824. goto uc_timeout;
  1825. }
  1826. rx->rx_ring_rp_pa = va;
  1827. rx->ipa_pipe_number = ipa_ep_idx;
  1828. }
  1829. out->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base +
  1830. ipahal_get_reg_base() +
  1831. ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
  1832. IPA_HW_WDI_RX_MBOX_START_INDEX/32,
  1833. IPA_HW_WDI_RX_MBOX_START_INDEX % 32);
  1834. }
  1835. ep->valid = 1;
  1836. ep->client = in->sys.client;
  1837. ep->keep_ipa_awake = in->sys.keep_ipa_awake;
  1838. result = ipa3_disable_data_path(ipa_ep_idx);
  1839. if (result) {
  1840. IPAERR("disable data path failed res=%d clnt=%d.\n", result,
  1841. ipa_ep_idx);
  1842. goto uc_timeout;
  1843. }
  1844. if (IPA_CLIENT_IS_PROD(in->sys.client)) {
  1845. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  1846. ep_cfg_ctrl.ipa_ep_delay = true;
  1847. ipa3_cfg_ep_ctrl(ipa_ep_idx, &ep_cfg_ctrl);
  1848. }
  1849. result = ipa3_uc_send_cmd((u32)(cmd.phys_base),
  1850. IPA_CLIENT_IS_CONS(in->sys.client) ?
  1851. IPA_CPU_2_HW_CMD_WDI_TX_SET_UP :
  1852. IPA_CPU_2_HW_CMD_WDI_RX_SET_UP,
  1853. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  1854. false, 10*HZ);
  1855. if (result) {
  1856. result = -EFAULT;
  1857. goto uc_timeout;
  1858. }
  1859. ep->skip_ep_cfg = in->sys.skip_ep_cfg;
  1860. ep->client_notify = in->sys.notify;
  1861. ep->priv = in->sys.priv;
  1862. /* for AP+STA stats update */
  1863. if (in->wdi_notify)
  1864. ipa3_ctx->uc_wdi_ctx.stats_notify = in->wdi_notify;
  1865. else
  1866. IPADBG("in->wdi_notify is null\n");
  1867. if (IPA_CLIENT_IS_CONS(in->sys.client)) {
  1868. in->sys.ipa_ep_cfg.aggr.aggr_en = IPA_ENABLE_AGGR;
  1869. in->sys.ipa_ep_cfg.aggr.aggr = IPA_GENERIC;
  1870. in->sys.ipa_ep_cfg.aggr.aggr_pkt_limit = IPA_AGGR_PKT_LIMIT;
  1871. in->sys.ipa_ep_cfg.aggr.aggr_byte_limit =
  1872. IPA_AGGR_HARD_BYTE_LIMIT;
  1873. in->sys.ipa_ep_cfg.aggr.aggr_hard_byte_limit_en =
  1874. IPA_ENABLE_AGGR;
  1875. }
  1876. if (!ep->skip_ep_cfg) {
  1877. if (ipa3_cfg_ep(ipa_ep_idx, &in->sys.ipa_ep_cfg)) {
  1878. IPAERR("fail to configure EP.\n");
  1879. goto ipa_cfg_ep_fail;
  1880. }
  1881. IPADBG("ep configuration successful\n");
  1882. } else {
  1883. IPADBG("Skipping endpoint configuration.\n");
  1884. }
  1885. ipa3_enable_data_path(ipa_ep_idx);
  1886. out->clnt_hdl = ipa_ep_idx;
  1887. if (!ep->skip_ep_cfg && IPA_CLIENT_IS_PROD(in->sys.client))
  1888. ipa3_install_dflt_flt_rules(ipa_ep_idx);
  1889. if (!ep->keep_ipa_awake)
  1890. IPA_ACTIVE_CLIENTS_DEC_EP(in->sys.client);
  1891. dma_free_coherent(ipa3_ctx->uc_pdev, cmd.size, cmd.base, cmd.phys_base);
  1892. ep->uc_offload_state |= IPA_WDI_CONNECTED;
  1893. IPADBG("client %d (ep: %d) connected\n", in->sys.client, ipa_ep_idx);
  1894. return 0;
  1895. ipa_cfg_ep_fail:
  1896. memset(&ipa3_ctx->ep[ipa_ep_idx], 0, sizeof(struct ipa3_ep_context));
  1897. uc_timeout:
  1898. ipa_release_uc_smmu_mappings(in->sys.client);
  1899. dma_free_coherent(ipa3_ctx->uc_pdev, cmd.size, cmd.base, cmd.phys_base);
  1900. dma_alloc_fail:
  1901. IPA_ACTIVE_CLIENTS_DEC_EP(in->sys.client);
  1902. fail:
  1903. return result;
  1904. }
  1905. int ipa3_disconnect_gsi_wdi_pipe(u32 clnt_hdl)
  1906. {
  1907. int result = 0;
  1908. struct ipa3_ep_context *ep;
  1909. ep = &ipa3_ctx->ep[clnt_hdl];
  1910. if (ep->gsi_offload_state != IPA_WDI_CONNECTED) {
  1911. IPAERR("WDI channel bad state %d\n", ep->gsi_offload_state);
  1912. return -EFAULT;
  1913. }
  1914. if (!ep->keep_ipa_awake)
  1915. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  1916. ipa3_reset_gsi_channel(clnt_hdl);
  1917. ipa3_reset_gsi_event_ring(clnt_hdl);
  1918. if (!ep->keep_ipa_awake)
  1919. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  1920. result = ipa3_release_gsi_channel(clnt_hdl);
  1921. if (result) {
  1922. IPAERR("GSI dealloc channel failed %d\n",
  1923. result);
  1924. goto fail_dealloc_channel;
  1925. }
  1926. ipa_release_ap_smmu_mappings(clnt_hdl);
  1927. /* for AP+STA stats update */
  1928. if (ipa3_ctx->uc_wdi_ctx.stats_notify)
  1929. ipa3_ctx->uc_wdi_ctx.stats_notify = NULL;
  1930. else
  1931. IPADBG("uc_wdi_ctx.stats_notify already null\n");
  1932. if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5 &&
  1933. ipa3_ctx->ipa_hw_type != IPA_HW_v4_7)
  1934. ipa3_uc_debug_stats_dealloc(IPA_HW_PROTOCOL_WDI);
  1935. IPADBG("client (ep: %d) disconnected\n", clnt_hdl);
  1936. fail_dealloc_channel:
  1937. return result;
  1938. }
  1939. /**
  1940. * ipa3_disconnect_wdi_pipe() - WDI client disconnect
  1941. * @clnt_hdl: [in] opaque client handle assigned by IPA to client
  1942. *
  1943. * Returns: 0 on success, negative on failure
  1944. *
  1945. * Note: Should not be called from atomic context
  1946. */
  1947. int ipa3_disconnect_wdi_pipe(u32 clnt_hdl)
  1948. {
  1949. int result = 0;
  1950. struct ipa3_ep_context *ep;
  1951. union IpaHwWdiCommonChCmdData_t tear;
  1952. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  1953. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  1954. IPAERR("bad parm, %d\n", clnt_hdl);
  1955. return -EINVAL;
  1956. }
  1957. if (ipa3_ctx->ipa_wdi2_over_gsi)
  1958. return ipa3_disconnect_gsi_wdi_pipe(clnt_hdl);
  1959. result = ipa3_uc_state_check();
  1960. if (result)
  1961. return result;
  1962. IPADBG("ep=%d\n", clnt_hdl);
  1963. ep = &ipa3_ctx->ep[clnt_hdl];
  1964. if (ep->uc_offload_state != IPA_WDI_CONNECTED) {
  1965. IPAERR("WDI channel bad state %d\n", ep->uc_offload_state);
  1966. return -EFAULT;
  1967. }
  1968. if (!ep->keep_ipa_awake)
  1969. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  1970. tear.params.ipa_pipe_number = clnt_hdl;
  1971. result = ipa3_uc_send_cmd(tear.raw32b,
  1972. IPA_CPU_2_HW_CMD_WDI_TEAR_DOWN,
  1973. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  1974. false, 10*HZ);
  1975. if (result) {
  1976. result = -EFAULT;
  1977. goto uc_timeout;
  1978. }
  1979. ipa3_delete_dflt_flt_rules(clnt_hdl);
  1980. ipa_release_uc_smmu_mappings(ep->client);
  1981. memset(&ipa3_ctx->ep[clnt_hdl], 0, sizeof(struct ipa3_ep_context));
  1982. IPADBG("client (ep: %d) disconnected\n", clnt_hdl);
  1983. /* for AP+STA stats update */
  1984. if (ipa3_ctx->uc_wdi_ctx.stats_notify)
  1985. ipa3_ctx->uc_wdi_ctx.stats_notify = NULL;
  1986. else
  1987. IPADBG("uc_wdi_ctx.stats_notify already null\n");
  1988. uc_timeout:
  1989. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  1990. return result;
  1991. }
  1992. int ipa3_enable_gsi_wdi_pipe(u32 clnt_hdl)
  1993. {
  1994. int result = 0;
  1995. struct ipa3_ep_context *ep;
  1996. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  1997. int ipa_ep_idx;
  1998. IPADBG("ep=%d\n", clnt_hdl);
  1999. ep = &ipa3_ctx->ep[clnt_hdl];
  2000. if (ep->gsi_offload_state != IPA_WDI_CONNECTED) {
  2001. IPAERR("WDI channel bad state %d\n", ep->gsi_offload_state);
  2002. return -EFAULT;
  2003. }
  2004. ipa_ep_idx = ipa3_get_ep_mapping(ipa3_get_client_mapping(clnt_hdl));
  2005. if (ipa_ep_idx == -1) {
  2006. IPAERR("fail to alloc EP.\n");
  2007. return -EPERM;
  2008. }
  2009. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2010. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2011. ipa3_cfg_ep_ctrl(ipa_ep_idx, &ep_cfg_ctrl);
  2012. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2013. ep->gsi_offload_state |= IPA_WDI_ENABLED;
  2014. IPADBG("client (ep: %d) enabled\n", clnt_hdl);
  2015. return result;
  2016. }
  2017. int ipa3_disable_gsi_wdi_pipe(u32 clnt_hdl)
  2018. {
  2019. int result = 0;
  2020. struct ipa3_ep_context *ep;
  2021. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  2022. u32 cons_hdl;
  2023. IPADBG("ep=%d\n", clnt_hdl);
  2024. ep = &ipa3_ctx->ep[clnt_hdl];
  2025. if (ep->gsi_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED)) {
  2026. IPAERR("WDI channel bad state %d\n", ep->gsi_offload_state);
  2027. return -EFAULT;
  2028. }
  2029. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2030. result = ipa3_disable_data_path(clnt_hdl);
  2031. if (result) {
  2032. IPAERR("disable data path failed res=%d clnt=%d.\n", result,
  2033. clnt_hdl);
  2034. goto gsi_timeout;
  2035. }
  2036. /**
  2037. * To avoid data stall during continuous SAP on/off before
  2038. * setting delay to IPA Consumer pipe (Client Producer),
  2039. * remove delay and enable holb on IPA Producer pipe
  2040. */
  2041. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2042. IPADBG("Stopping PROD channel - hdl=%d clnt=%d\n",
  2043. clnt_hdl, ep->client);
  2044. /* remove delay on wlan-prod pipe*/
  2045. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2046. ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2047. cons_hdl = ipa3_get_ep_mapping(IPA_CLIENT_WLAN1_CONS);
  2048. if (cons_hdl == IPA_EP_NOT_ALLOCATED) {
  2049. IPAERR("Client %u is not mapped\n",
  2050. IPA_CLIENT_WLAN1_CONS);
  2051. goto gsi_timeout;
  2052. }
  2053. if (ipa3_ctx->ep[cons_hdl].valid == 1) {
  2054. result = ipa3_disable_data_path(cons_hdl);
  2055. if (result) {
  2056. IPAERR("disable data path failed\n");
  2057. IPAERR("res=%d clnt=%d\n",
  2058. result, cons_hdl);
  2059. goto gsi_timeout;
  2060. }
  2061. }
  2062. usleep_range(IPA_UC_POLL_SLEEP_USEC * IPA_UC_POLL_SLEEP_USEC,
  2063. IPA_UC_POLL_SLEEP_USEC * IPA_UC_POLL_SLEEP_USEC);
  2064. }
  2065. /* Set the delay after disabling IPA Producer pipe */
  2066. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2067. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2068. ep_cfg_ctrl.ipa_ep_delay = true;
  2069. ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2070. }
  2071. ep->gsi_offload_state &= ~IPA_WDI_ENABLED;
  2072. IPADBG("client (ep: %d) disabled\n", clnt_hdl);
  2073. gsi_timeout:
  2074. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2075. return result;
  2076. }
  2077. /**
  2078. * ipa3_enable_wdi_pipe() - WDI client enable
  2079. * @clnt_hdl: [in] opaque client handle assigned by IPA to client
  2080. *
  2081. * Returns: 0 on success, negative on failure
  2082. *
  2083. * Note: Should not be called from atomic context
  2084. */
  2085. int ipa3_enable_wdi_pipe(u32 clnt_hdl)
  2086. {
  2087. int result = 0;
  2088. struct ipa3_ep_context *ep;
  2089. union IpaHwWdiCommonChCmdData_t enable;
  2090. struct ipa_ep_cfg_holb holb_cfg;
  2091. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  2092. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  2093. IPAERR("bad parm, %d\n", clnt_hdl);
  2094. return -EINVAL;
  2095. }
  2096. if (ipa3_ctx->ipa_wdi2_over_gsi)
  2097. return ipa3_enable_gsi_wdi_pipe(clnt_hdl);
  2098. result = ipa3_uc_state_check();
  2099. if (result)
  2100. return result;
  2101. IPADBG("ep=%d\n", clnt_hdl);
  2102. ep = &ipa3_ctx->ep[clnt_hdl];
  2103. if (ep->uc_offload_state != IPA_WDI_CONNECTED) {
  2104. IPAERR("WDI channel bad state %d\n", ep->uc_offload_state);
  2105. return -EFAULT;
  2106. }
  2107. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2108. enable.params.ipa_pipe_number = clnt_hdl;
  2109. result = ipa3_uc_send_cmd(enable.raw32b,
  2110. IPA_CPU_2_HW_CMD_WDI_CH_ENABLE,
  2111. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2112. false, 10*HZ);
  2113. if (result) {
  2114. result = -EFAULT;
  2115. goto uc_timeout;
  2116. }
  2117. if (IPA_CLIENT_IS_CONS(ep->client)) {
  2118. memset(&holb_cfg, 0, sizeof(holb_cfg));
  2119. holb_cfg.en = IPA_HOLB_TMR_DIS;
  2120. holb_cfg.tmr_val = 0;
  2121. result = ipa3_cfg_ep_holb(clnt_hdl, &holb_cfg);
  2122. }
  2123. ep->uc_offload_state |= IPA_WDI_ENABLED;
  2124. IPADBG("client (ep: %d) enabled\n", clnt_hdl);
  2125. uc_timeout:
  2126. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2127. return result;
  2128. }
  2129. /**
  2130. * ipa3_disable_wdi_pipe() - WDI client disable
  2131. * @clnt_hdl: [in] opaque client handle assigned by IPA to client
  2132. *
  2133. * Returns: 0 on success, negative on failure
  2134. *
  2135. * Note: Should not be called from atomic context
  2136. */
  2137. int ipa3_disable_wdi_pipe(u32 clnt_hdl)
  2138. {
  2139. int result = 0;
  2140. struct ipa3_ep_context *ep;
  2141. union IpaHwWdiCommonChCmdData_t disable;
  2142. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  2143. u32 cons_hdl;
  2144. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  2145. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  2146. IPAERR("bad parm, %d\n", clnt_hdl);
  2147. return -EINVAL;
  2148. }
  2149. if (ipa3_ctx->ipa_wdi2_over_gsi)
  2150. return ipa3_disable_gsi_wdi_pipe(clnt_hdl);
  2151. result = ipa3_uc_state_check();
  2152. if (result)
  2153. return result;
  2154. IPADBG("ep=%d\n", clnt_hdl);
  2155. ep = &ipa3_ctx->ep[clnt_hdl];
  2156. if (ep->uc_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED)) {
  2157. IPAERR("WDI channel bad state %d\n", ep->uc_offload_state);
  2158. return -EFAULT;
  2159. }
  2160. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2161. result = ipa3_disable_data_path(clnt_hdl);
  2162. if (result) {
  2163. IPAERR("disable data path failed res=%d clnt=%d.\n", result,
  2164. clnt_hdl);
  2165. result = -EPERM;
  2166. goto uc_timeout;
  2167. }
  2168. /**
  2169. * To avoid data stall during continuous SAP on/off before
  2170. * setting delay to IPA Consumer pipe (Client Producer),
  2171. * remove delay and enable holb on IPA Producer pipe
  2172. */
  2173. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2174. IPADBG("Stopping PROD channel - hdl=%d clnt=%d\n",
  2175. clnt_hdl, ep->client);
  2176. /* remove delay on wlan-prod pipe*/
  2177. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2178. ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2179. cons_hdl = ipa3_get_ep_mapping(IPA_CLIENT_WLAN1_CONS);
  2180. if (cons_hdl == IPA_EP_NOT_ALLOCATED) {
  2181. IPAERR("Client %u is not mapped\n",
  2182. IPA_CLIENT_WLAN1_CONS);
  2183. goto uc_timeout;
  2184. }
  2185. if (ipa3_ctx->ep[cons_hdl].valid == 1) {
  2186. result = ipa3_disable_data_path(cons_hdl);
  2187. if (result) {
  2188. IPAERR("disable data path failed\n");
  2189. IPAERR("res=%d clnt=%d\n",
  2190. result, cons_hdl);
  2191. result = -EPERM;
  2192. goto uc_timeout;
  2193. }
  2194. }
  2195. usleep_range(IPA_UC_POLL_SLEEP_USEC * IPA_UC_POLL_SLEEP_USEC,
  2196. IPA_UC_POLL_SLEEP_USEC * IPA_UC_POLL_SLEEP_USEC);
  2197. }
  2198. disable.params.ipa_pipe_number = clnt_hdl;
  2199. result = ipa3_uc_send_cmd(disable.raw32b,
  2200. IPA_CPU_2_HW_CMD_WDI_CH_DISABLE,
  2201. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2202. false, 10*HZ);
  2203. if (result) {
  2204. result = -EFAULT;
  2205. goto uc_timeout;
  2206. }
  2207. /* Set the delay after disabling IPA Producer pipe */
  2208. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2209. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2210. ep_cfg_ctrl.ipa_ep_delay = true;
  2211. ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2212. }
  2213. ep->uc_offload_state &= ~IPA_WDI_ENABLED;
  2214. IPADBG("client (ep: %d) disabled\n", clnt_hdl);
  2215. uc_timeout:
  2216. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2217. return result;
  2218. }
  2219. int ipa3_resume_gsi_wdi_pipe(u32 clnt_hdl)
  2220. {
  2221. int result = 0;
  2222. struct ipa3_ep_context *ep;
  2223. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  2224. struct gsi_chan_info chan_info;
  2225. union __packed gsi_channel_scratch gsi_scratch;
  2226. struct IpaHwOffloadStatsAllocCmdData_t *pcmd_t = NULL;
  2227. IPADBG("ep=%d\n", clnt_hdl);
  2228. ep = &ipa3_ctx->ep[clnt_hdl];
  2229. if (ep->gsi_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED)) {
  2230. IPAERR("WDI channel bad state %d\n", ep->gsi_offload_state);
  2231. return -EFAULT;
  2232. }
  2233. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2234. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2235. result = ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2236. if (result)
  2237. IPAERR("client (ep: %d) fail un-susp/delay result=%d\n",
  2238. clnt_hdl, result);
  2239. else
  2240. IPADBG("client (ep: %d) un-susp/delay\n", clnt_hdl);
  2241. result = gsi_start_channel(ep->gsi_chan_hdl);
  2242. if (result != GSI_STATUS_SUCCESS) {
  2243. IPAERR("gsi_start_channel failed %d\n", result);
  2244. ipa_assert();
  2245. }
  2246. pcmd_t = &ipa3_ctx->gsi_info[IPA_HW_PROTOCOL_WDI];
  2247. /* start uC gsi dbg stats monitor */
  2248. if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5 &&
  2249. ipa3_ctx->ipa_hw_type != IPA_HW_v4_7) {
  2250. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2251. pcmd_t->ch_id_info[0].ch_id
  2252. = ep->gsi_chan_hdl;
  2253. pcmd_t->ch_id_info[0].dir
  2254. = DIR_PRODUCER;
  2255. } else {
  2256. pcmd_t->ch_id_info[1].ch_id
  2257. = ep->gsi_chan_hdl;
  2258. pcmd_t->ch_id_info[1].dir
  2259. = DIR_CONSUMER;
  2260. }
  2261. ipa3_uc_debug_stats_alloc(
  2262. ipa3_ctx->gsi_info[IPA_HW_PROTOCOL_WDI]);
  2263. }
  2264. gsi_query_channel_info(ep->gsi_chan_hdl, &chan_info);
  2265. gsi_read_channel_scratch(ep->gsi_chan_hdl, &gsi_scratch);
  2266. IPADBG("ch=%lu channel base = 0x%llx , event base 0x%llx\n",
  2267. ep->gsi_chan_hdl,
  2268. ep->gsi_mem_info.chan_ring_base_addr,
  2269. ep->gsi_mem_info.evt_ring_base_addr);
  2270. IPADBG("RP=0x%llx WP=0x%llx ev_valid=%d ERP=0x%llx EWP=0x%llx\n",
  2271. chan_info.rp, chan_info.wp, chan_info.evt_valid,
  2272. chan_info.evt_rp, chan_info.evt_wp);
  2273. IPADBG("Scratch 0 = %x Scratch 1 = %x Scratch 2 = %x Scratch 3 = %x\n",
  2274. gsi_scratch.data.word1, gsi_scratch.data.word2,
  2275. gsi_scratch.data.word3, gsi_scratch.data.word4);
  2276. ep->gsi_offload_state |= IPA_WDI_RESUMED;
  2277. IPADBG("exit\n");
  2278. return result;
  2279. }
  2280. /**
  2281. * ipa3_resume_wdi_pipe() - WDI client resume
  2282. * @clnt_hdl: [in] opaque client handle assigned by IPA to client
  2283. *
  2284. * Returns: 0 on success, negative on failure
  2285. *
  2286. * Note: Should not be called from atomic context
  2287. */
  2288. int ipa3_resume_wdi_pipe(u32 clnt_hdl)
  2289. {
  2290. int result = 0;
  2291. struct ipa3_ep_context *ep;
  2292. union IpaHwWdiCommonChCmdData_t resume;
  2293. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  2294. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  2295. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  2296. IPAERR("bad parm, %d\n", clnt_hdl);
  2297. return -EINVAL;
  2298. }
  2299. if (ipa3_ctx->ipa_wdi2_over_gsi)
  2300. return ipa3_resume_gsi_wdi_pipe(clnt_hdl);
  2301. result = ipa3_uc_state_check();
  2302. if (result)
  2303. return result;
  2304. IPADBG("ep=%d\n", clnt_hdl);
  2305. ep = &ipa3_ctx->ep[clnt_hdl];
  2306. if (ep->uc_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED)) {
  2307. IPAERR("WDI channel bad state %d\n", ep->uc_offload_state);
  2308. return -EFAULT;
  2309. }
  2310. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2311. resume.params.ipa_pipe_number = clnt_hdl;
  2312. result = ipa3_uc_send_cmd(resume.raw32b,
  2313. IPA_CPU_2_HW_CMD_WDI_CH_RESUME,
  2314. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2315. false, 10*HZ);
  2316. if (result) {
  2317. result = -EFAULT;
  2318. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2319. goto uc_timeout;
  2320. }
  2321. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2322. result = ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2323. if (result)
  2324. IPAERR("client (ep: %d) fail un-susp/delay result=%d\n",
  2325. clnt_hdl, result);
  2326. else
  2327. IPADBG("client (ep: %d) un-susp/delay\n", clnt_hdl);
  2328. ep->uc_offload_state |= IPA_WDI_RESUMED;
  2329. IPADBG("client (ep: %d) resumed\n", clnt_hdl);
  2330. uc_timeout:
  2331. return result;
  2332. }
  2333. int ipa3_suspend_gsi_wdi_pipe(u32 clnt_hdl)
  2334. {
  2335. int ipa_ep_idx;
  2336. struct ipa3_ep_context *ep;
  2337. int res = 0;
  2338. u32 source_pipe_bitmask = 0;
  2339. bool disable_force_clear = false;
  2340. struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
  2341. int retry_cnt = 0;
  2342. struct gsi_chan_info chan_info;
  2343. union __packed gsi_channel_scratch gsi_scratch;
  2344. struct IpaHwOffloadStatsAllocCmdData_t *pcmd_t = NULL;
  2345. ipa_ep_idx = ipa3_get_ep_mapping(ipa3_get_client_mapping(clnt_hdl));
  2346. if (ipa_ep_idx < 0) {
  2347. IPAERR("IPA client mapping failed\n");
  2348. return -EPERM;
  2349. }
  2350. ep = &ipa3_ctx->ep[ipa_ep_idx];
  2351. if (ep->gsi_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED |
  2352. IPA_WDI_RESUMED)) {
  2353. IPAERR("WDI channel bad state %d\n", ep->gsi_offload_state);
  2354. return -EFAULT;
  2355. }
  2356. if (ep->valid) {
  2357. IPADBG("suspended pipe %d\n", ipa_ep_idx);
  2358. source_pipe_bitmask = 1 <<
  2359. ipa3_get_ep_mapping(ep->client);
  2360. res = ipa3_enable_force_clear(clnt_hdl,
  2361. false, source_pipe_bitmask);
  2362. if (res) {
  2363. /*
  2364. * assuming here modem SSR, AP can remove
  2365. * the delay in this case
  2366. */
  2367. IPAERR("failed to force clear %d\n", res);
  2368. IPAERR("remove delay from SCND reg\n");
  2369. ep_ctrl_scnd.endp_delay = false;
  2370. ipahal_write_reg_n_fields(
  2371. IPA_ENDP_INIT_CTRL_SCND_n, clnt_hdl,
  2372. &ep_ctrl_scnd);
  2373. } else {
  2374. disable_force_clear = true;
  2375. }
  2376. retry_gsi_stop:
  2377. res = ipa3_stop_gsi_channel(ipa_ep_idx);
  2378. if (res != 0 && res != -GSI_STATUS_AGAIN &&
  2379. res != -GSI_STATUS_TIMED_OUT) {
  2380. IPAERR("failed to stop channel res = %d\n", res);
  2381. goto fail_stop_channel;
  2382. } else if (res == -GSI_STATUS_AGAIN) {
  2383. IPADBG("GSI stop channel failed retry cnt = %d\n",
  2384. retry_cnt);
  2385. retry_cnt++;
  2386. if (retry_cnt >= GSI_STOP_MAX_RETRY_CNT)
  2387. goto fail_stop_channel;
  2388. goto retry_gsi_stop;
  2389. } else {
  2390. IPADBG("GSI channel %ld STOP\n", ep->gsi_chan_hdl);
  2391. }
  2392. gsi_query_channel_info(ep->gsi_chan_hdl, &chan_info);
  2393. gsi_read_channel_scratch(ep->gsi_chan_hdl, &gsi_scratch);
  2394. IPADBG("ch=%lu channel base = 0x%llx , event base 0x%llx\n",
  2395. ep->gsi_chan_hdl,
  2396. ep->gsi_mem_info.chan_ring_base_addr,
  2397. ep->gsi_mem_info.evt_ring_base_addr);
  2398. IPADBG("RP=0x%llx WP=0x%llx ev_valid=%d ERP=0x%llx",
  2399. chan_info.rp, chan_info.wp,
  2400. chan_info.evt_valid, chan_info.evt_rp);
  2401. IPADBG("EWP=0x%llx\n", chan_info.evt_wp);
  2402. IPADBG("Scratch 0 = %x Scratch 1 = %x Scratch 2 = %x",
  2403. gsi_scratch.data.word1, gsi_scratch.data.word2,
  2404. gsi_scratch.data.word3);
  2405. IPADBG("Scratch 3 = %x\n", gsi_scratch.data.word4);
  2406. }
  2407. pcmd_t = &ipa3_ctx->gsi_info[IPA_HW_PROTOCOL_WDI];
  2408. /* stop uC gsi dbg stats monitor */
  2409. if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_5 &&
  2410. ipa3_ctx->ipa_hw_type != IPA_HW_v4_7) {
  2411. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2412. pcmd_t->ch_id_info[0].ch_id
  2413. = 0xff;
  2414. pcmd_t->ch_id_info[0].dir
  2415. = DIR_PRODUCER;
  2416. } else {
  2417. pcmd_t->ch_id_info[1].ch_id
  2418. = 0xff;
  2419. pcmd_t->ch_id_info[1].dir
  2420. = DIR_CONSUMER;
  2421. }
  2422. ipa3_uc_debug_stats_alloc(
  2423. ipa3_ctx->gsi_info[IPA_HW_PROTOCOL_WDI]);
  2424. }
  2425. if (disable_force_clear)
  2426. ipa3_disable_force_clear(clnt_hdl);
  2427. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2428. ep->gsi_offload_state &= ~IPA_WDI_RESUMED;
  2429. return res;
  2430. fail_stop_channel:
  2431. ipa_assert();
  2432. return res;
  2433. }
  2434. /**
  2435. * ipa3_suspend_wdi_pipe() - WDI client suspend
  2436. * @clnt_hdl: [in] opaque client handle assigned by IPA to client
  2437. *
  2438. * Returns: 0 on success, negative on failure
  2439. *
  2440. * Note: Should not be called from atomic context
  2441. */
  2442. int ipa3_suspend_wdi_pipe(u32 clnt_hdl)
  2443. {
  2444. int result = 0;
  2445. struct ipa3_ep_context *ep;
  2446. union IpaHwWdiCommonChCmdData_t suspend;
  2447. struct ipa_ep_cfg_ctrl ep_cfg_ctrl;
  2448. u32 source_pipe_bitmask = 0;
  2449. bool disable_force_clear = false;
  2450. struct ipahal_ep_cfg_ctrl_scnd ep_ctrl_scnd = { 0 };
  2451. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  2452. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  2453. IPAERR("bad parm, %d\n", clnt_hdl);
  2454. return -EINVAL;
  2455. }
  2456. if (ipa3_ctx->ipa_wdi2_over_gsi)
  2457. return ipa3_suspend_gsi_wdi_pipe(clnt_hdl);
  2458. result = ipa3_uc_state_check();
  2459. if (result)
  2460. return result;
  2461. IPADBG("ep=%d\n", clnt_hdl);
  2462. ep = &ipa3_ctx->ep[clnt_hdl];
  2463. if (ep->uc_offload_state != (IPA_WDI_CONNECTED | IPA_WDI_ENABLED |
  2464. IPA_WDI_RESUMED)) {
  2465. IPAERR("WDI channel bad state %d\n", ep->uc_offload_state);
  2466. return -EFAULT;
  2467. }
  2468. suspend.params.ipa_pipe_number = clnt_hdl;
  2469. if (IPA_CLIENT_IS_PROD(ep->client)) {
  2470. /*
  2471. * For WDI 2.0 need to ensure pipe will be empty before suspend
  2472. * as IPA uC will fail to suspend the pipe otherwise.
  2473. */
  2474. if (ipa3_ctx->ipa_wdi2) {
  2475. source_pipe_bitmask = 1 <<
  2476. ipa3_get_ep_mapping(ep->client);
  2477. result = ipa3_enable_force_clear(clnt_hdl,
  2478. false, source_pipe_bitmask);
  2479. if (result) {
  2480. /*
  2481. * assuming here modem SSR, AP can remove
  2482. * the delay in this case
  2483. */
  2484. IPAERR("failed to force clear %d\n", result);
  2485. IPAERR("remove delay from SCND reg\n");
  2486. ep_ctrl_scnd.endp_delay = false;
  2487. ipahal_write_reg_n_fields(
  2488. IPA_ENDP_INIT_CTRL_SCND_n, clnt_hdl,
  2489. &ep_ctrl_scnd);
  2490. } else {
  2491. disable_force_clear = true;
  2492. }
  2493. }
  2494. IPADBG("Post suspend event first for IPA Producer\n");
  2495. IPADBG("Client: %d clnt_hdl: %d\n", ep->client, clnt_hdl);
  2496. result = ipa3_uc_send_cmd(suspend.raw32b,
  2497. IPA_CPU_2_HW_CMD_WDI_CH_SUSPEND,
  2498. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2499. false, 10*HZ);
  2500. if (result) {
  2501. result = -EFAULT;
  2502. goto uc_timeout;
  2503. }
  2504. }
  2505. memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
  2506. if (IPA_CLIENT_IS_CONS(ep->client)) {
  2507. if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_0) {
  2508. ep_cfg_ctrl.ipa_ep_suspend = true;
  2509. result = ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2510. if (result)
  2511. IPAERR("(ep: %d) failed to suspend result=%d\n",
  2512. clnt_hdl, result);
  2513. else
  2514. IPADBG("(ep: %d) suspended\n", clnt_hdl);
  2515. }
  2516. } else {
  2517. ep_cfg_ctrl.ipa_ep_delay = true;
  2518. result = ipa3_cfg_ep_ctrl(clnt_hdl, &ep_cfg_ctrl);
  2519. if (result)
  2520. IPAERR("client (ep: %d) failed to delay result=%d\n",
  2521. clnt_hdl, result);
  2522. else
  2523. IPADBG("client (ep: %d) delayed\n", clnt_hdl);
  2524. }
  2525. if (IPA_CLIENT_IS_CONS(ep->client)) {
  2526. result = ipa3_uc_send_cmd(suspend.raw32b,
  2527. IPA_CPU_2_HW_CMD_WDI_CH_SUSPEND,
  2528. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2529. false, 10*HZ);
  2530. if (result) {
  2531. result = -EFAULT;
  2532. goto uc_timeout;
  2533. }
  2534. }
  2535. if (disable_force_clear)
  2536. ipa3_disable_force_clear(clnt_hdl);
  2537. ipa3_ctx->tag_process_before_gating = true;
  2538. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2539. ep->uc_offload_state &= ~IPA_WDI_RESUMED;
  2540. IPADBG("client (ep: %d) suspended\n", clnt_hdl);
  2541. uc_timeout:
  2542. return result;
  2543. }
  2544. /**
  2545. * ipa_broadcast_wdi_quota_reach_ind() - quota reach
  2546. * @uint32_t fid: [in] input netdev ID
  2547. * @uint64_t num_bytes: [in] used bytes
  2548. *
  2549. * Returns: 0 on success, negative on failure
  2550. */
  2551. int ipa3_broadcast_wdi_quota_reach_ind(uint32_t fid,
  2552. uint64_t num_bytes)
  2553. {
  2554. IPAERR("Quota reached indication on fid(%d) Mbytes(%lu)\n",
  2555. fid, (unsigned long)num_bytes);
  2556. ipa3_broadcast_quota_reach_ind(0, IPA_UPSTEAM_WLAN);
  2557. return 0;
  2558. }
  2559. int ipa3_write_qmapid_gsi_wdi_pipe(u32 clnt_hdl, u8 qmap_id)
  2560. {
  2561. int result = 0;
  2562. struct ipa3_ep_context *ep;
  2563. union __packed gsi_wdi_channel_scratch3_reg gsi_scratch3;
  2564. union __packed gsi_wdi2_channel_scratch2_reg gsi_scratch2;
  2565. ep = &ipa3_ctx->ep[clnt_hdl];
  2566. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2567. if (ipa3_ctx->ipa_hw_type < IPA_HW_v4_7) {
  2568. memset(&gsi_scratch3, 0, sizeof(gsi_scratch3));
  2569. gsi_scratch3.wdi.qmap_id = qmap_id;
  2570. gsi_scratch3.wdi.endp_metadatareg_offset =
  2571. ipahal_get_reg_mn_ofst(
  2572. IPA_ENDP_INIT_HDR_METADATA_n, 0, clnt_hdl)/4;
  2573. result = gsi_write_channel_scratch3_reg(ep->gsi_chan_hdl,
  2574. gsi_scratch3);
  2575. } else {
  2576. memset(&gsi_scratch2, 0, sizeof(gsi_scratch2));
  2577. gsi_scratch2.wdi.qmap_id = qmap_id;
  2578. gsi_scratch2.wdi.endp_metadatareg_offset =
  2579. ipahal_get_reg_mn_ofst(
  2580. IPA_ENDP_INIT_HDR_METADATA_n, 0, clnt_hdl)/4;
  2581. result = gsi_write_channel_scratch2_reg(ep->gsi_chan_hdl,
  2582. gsi_scratch2);
  2583. }
  2584. if (result != GSI_STATUS_SUCCESS) {
  2585. IPAERR("gsi_write_channel_scratch failed %d\n",
  2586. result);
  2587. goto fail_write_channel_scratch;
  2588. }
  2589. IPADBG("client (ep: %d) qmap_id %d updated\n", clnt_hdl, qmap_id);
  2590. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2591. return 0;
  2592. fail_write_channel_scratch:
  2593. ipa_assert();
  2594. return result;
  2595. }
  2596. int ipa3_write_qmapid_wdi_pipe(u32 clnt_hdl, u8 qmap_id)
  2597. {
  2598. int result = 0;
  2599. struct ipa3_ep_context *ep;
  2600. union IpaHwWdiRxExtCfgCmdData_t qmap;
  2601. if (clnt_hdl >= ipa3_ctx->ipa_num_pipes ||
  2602. ipa3_ctx->ep[clnt_hdl].valid == 0) {
  2603. IPAERR_RL("bad parm, %d\n", clnt_hdl);
  2604. return -EINVAL;
  2605. }
  2606. if (ipa3_ctx->ipa_wdi2_over_gsi)
  2607. return ipa3_write_qmapid_gsi_wdi_pipe(clnt_hdl, qmap_id);
  2608. result = ipa3_uc_state_check();
  2609. if (result)
  2610. return result;
  2611. IPADBG("ep=%d\n", clnt_hdl);
  2612. ep = &ipa3_ctx->ep[clnt_hdl];
  2613. if (!(ep->uc_offload_state & IPA_WDI_CONNECTED)) {
  2614. IPAERR_RL("WDI channel bad state %d\n", ep->uc_offload_state);
  2615. return -EFAULT;
  2616. }
  2617. IPA_ACTIVE_CLIENTS_INC_EP(ipa3_get_client_mapping(clnt_hdl));
  2618. qmap.params.ipa_pipe_number = clnt_hdl;
  2619. qmap.params.qmap_id = qmap_id;
  2620. result = ipa3_uc_send_cmd(qmap.raw32b,
  2621. IPA_CPU_2_HW_CMD_WDI_RX_EXT_CFG,
  2622. IPA_HW_2_CPU_WDI_CMD_STATUS_SUCCESS,
  2623. false, 10*HZ);
  2624. if (result) {
  2625. result = -EFAULT;
  2626. goto uc_timeout;
  2627. }
  2628. IPADBG("client (ep: %d) qmap_id %d updated\n", clnt_hdl, qmap_id);
  2629. uc_timeout:
  2630. IPA_ACTIVE_CLIENTS_DEC_EP(ipa3_get_client_mapping(clnt_hdl));
  2631. return result;
  2632. }
  2633. /**
  2634. * ipa3_uc_reg_rdyCB() - To register uC
  2635. * ready CB if uC not ready
  2636. * @inout: [in/out] input/output parameters
  2637. * from/to client
  2638. *
  2639. * Returns: 0 on success, negative on failure
  2640. *
  2641. */
  2642. int ipa3_uc_reg_rdyCB(
  2643. struct ipa_wdi_uc_ready_params *inout)
  2644. {
  2645. int result = 0;
  2646. if (inout == NULL) {
  2647. IPAERR("bad parm. inout=%pK ", inout);
  2648. return -EINVAL;
  2649. }
  2650. result = ipa3_uc_state_check();
  2651. if (result) {
  2652. inout->is_uC_ready = false;
  2653. ipa3_ctx->uc_wdi_ctx.uc_ready_cb = inout->notify;
  2654. ipa3_ctx->uc_wdi_ctx.priv = inout->priv;
  2655. } else {
  2656. inout->is_uC_ready = true;
  2657. }
  2658. return 0;
  2659. }
  2660. /**
  2661. * ipa3_uc_dereg_rdyCB() - To de-register uC ready CB
  2662. *
  2663. * Returns: 0 on success, negative on failure
  2664. *
  2665. */
  2666. int ipa3_uc_dereg_rdyCB(void)
  2667. {
  2668. ipa3_ctx->uc_wdi_ctx.uc_ready_cb = NULL;
  2669. ipa3_ctx->uc_wdi_ctx.priv = NULL;
  2670. return 0;
  2671. }
  2672. /**
  2673. * ipa3_uc_wdi_get_dbpa() - To retrieve
  2674. * doorbell physical address of wlan pipes
  2675. * @param: [in/out] input/output parameters
  2676. * from/to client
  2677. *
  2678. * Returns: 0 on success, negative on failure
  2679. *
  2680. */
  2681. int ipa3_uc_wdi_get_dbpa(
  2682. struct ipa_wdi_db_params *param)
  2683. {
  2684. if (param == NULL || param->client >= IPA_CLIENT_MAX) {
  2685. IPAERR("bad parm. param=%pK ", param);
  2686. if (param)
  2687. IPAERR("client = %d\n", param->client);
  2688. return -EINVAL;
  2689. }
  2690. if (IPA_CLIENT_IS_CONS(param->client)) {
  2691. param->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base +
  2692. ipahal_get_reg_base() +
  2693. ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
  2694. IPA_HW_WDI_TX_MBOX_START_INDEX/32,
  2695. IPA_HW_WDI_TX_MBOX_START_INDEX % 32);
  2696. } else {
  2697. param->uc_door_bell_pa = ipa3_ctx->ipa_wrapper_base +
  2698. ipahal_get_reg_base() +
  2699. ipahal_get_reg_mn_ofst(IPA_UC_MAILBOX_m_n,
  2700. IPA_HW_WDI_RX_MBOX_START_INDEX/32,
  2701. IPA_HW_WDI_RX_MBOX_START_INDEX % 32);
  2702. }
  2703. return 0;
  2704. }
  2705. static void ipa3_uc_wdi_loaded_handler(void)
  2706. {
  2707. if (!ipa3_ctx) {
  2708. IPAERR("IPA ctx is null\n");
  2709. return;
  2710. }
  2711. if (ipa3_ctx->uc_wdi_ctx.uc_ready_cb) {
  2712. ipa3_ctx->uc_wdi_ctx.uc_ready_cb(
  2713. ipa3_ctx->uc_wdi_ctx.priv);
  2714. ipa3_ctx->uc_wdi_ctx.uc_ready_cb =
  2715. NULL;
  2716. ipa3_ctx->uc_wdi_ctx.priv = NULL;
  2717. }
  2718. }
  2719. int ipa3_create_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info)
  2720. {
  2721. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_WLAN);
  2722. int i;
  2723. int ret = 0;
  2724. int prot = IOMMU_READ | IOMMU_WRITE;
  2725. if (!info) {
  2726. IPAERR("info = %pK\n", info);
  2727. return -EINVAL;
  2728. }
  2729. if (!cb->valid) {
  2730. IPAERR("No SMMU CB setup\n");
  2731. return -EINVAL;
  2732. }
  2733. if (ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_WLAN]) {
  2734. IPAERR("IPA SMMU not enabled\n");
  2735. return -EINVAL;
  2736. }
  2737. for (i = 0; i < num_buffers; i++) {
  2738. IPADBG_LOW("i=%d pa=0x%pa iova=0x%lx sz=0x%zx\n", i,
  2739. &info[i].pa, info[i].iova, info[i].size);
  2740. info[i].result = ipa3_iommu_map(cb->iommu_domain,
  2741. rounddown(info[i].iova, PAGE_SIZE),
  2742. rounddown(info[i].pa, PAGE_SIZE),
  2743. roundup(info[i].size + info[i].pa -
  2744. rounddown(info[i].pa, PAGE_SIZE), PAGE_SIZE),
  2745. prot);
  2746. }
  2747. return ret;
  2748. }
  2749. int ipa3_release_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info)
  2750. {
  2751. struct ipa_smmu_cb_ctx *cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_WLAN);
  2752. int i;
  2753. int ret = 0;
  2754. if (!info) {
  2755. IPAERR("info = %pK\n", info);
  2756. return -EINVAL;
  2757. }
  2758. if (!cb->valid) {
  2759. IPAERR("No SMMU CB setup\n");
  2760. return -EINVAL;
  2761. }
  2762. for (i = 0; i < num_buffers; i++) {
  2763. IPADBG_LOW("i=%d pa=0x%pa iova=0x%lx sz=0x%zx\n", i,
  2764. &info[i].pa, info[i].iova, info[i].size);
  2765. info[i].result = iommu_unmap(cb->iommu_domain,
  2766. rounddown(info[i].iova, PAGE_SIZE),
  2767. roundup(info[i].size + info[i].pa -
  2768. rounddown(info[i].pa, PAGE_SIZE), PAGE_SIZE));
  2769. }
  2770. return ret;
  2771. }