dp_tx.h 37 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #ifdef FEATURE_PERPKT_INFO
  25. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  26. defined(QCA_TX_CAPTURE_SUPPORT) || \
  27. defined(QCA_MCOPY_SUPPORT)
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #endif
  31. #include "dp_internal.h"
  32. #include "hal_tx.h"
  33. #include <qdf_tracepoint.h>
  34. #ifdef CONFIG_SAWF
  35. #include "dp_sawf.h"
  36. #endif
  37. #include <qdf_pkt_add_timestamp.h>
  38. #define DP_INVALID_VDEV_ID 0xFF
  39. #define DP_TX_MAX_NUM_FRAGS 6
  40. /*
  41. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  42. * please do not change this flag's definition
  43. */
  44. #define DP_TX_DESC_FLAG_FRAG 0x1
  45. #define DP_TX_DESC_FLAG_TO_FW 0x2
  46. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  47. #define DP_TX_DESC_FLAG_RAW 0x8
  48. #define DP_TX_DESC_FLAG_MESH 0x10
  49. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  50. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  51. #define DP_TX_DESC_FLAG_ME 0x80
  52. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  53. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  54. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  55. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  56. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  57. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  58. #define DP_TX_DESC_FLAG_TRAFFIC_END_IND 0x4000
  59. #define DP_TX_DESC_FLAG_RMNET 0x8000
  60. /*
  61. * Since the Tx descriptor flag is of only 16-bit and no more bit is free for
  62. * any new flag, therefore for time being overloading PPEDS flag with that of
  63. * FLUSH flag and FLAG_FAST with TDLS which is not enabled for WIN.
  64. */
  65. #define DP_TX_DESC_FLAG_PPEDS 0x2000
  66. #define DP_TX_DESC_FLAG_FAST 0x100
  67. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  68. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  69. do { \
  70. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  71. qdf_nbuf_free(buf); \
  72. } while (0)
  73. #define OCB_HEADER_VERSION 1
  74. #ifdef TX_PER_PDEV_DESC_POOL
  75. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  76. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  77. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  78. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  79. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  80. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  81. #else
  82. #ifdef TX_PER_VDEV_DESC_POOL
  83. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  84. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  85. #endif /* TX_PER_VDEV_DESC_POOL */
  86. #endif /* TX_PER_PDEV_DESC_POOL */
  87. #define DP_TX_QUEUE_MASK 0x3
  88. #define MAX_CDP_SEC_TYPE 12
  89. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  90. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  91. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  92. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  93. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  94. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  95. #define dp_tx_info(params...) \
  96. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  97. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  98. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  99. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  100. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  101. #define dp_tx_comp_info(params...) \
  102. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  103. #define dp_tx_comp_info_rl(params...) \
  104. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  105. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  106. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  107. /**
  108. * struct dp_tx_frag_info_s
  109. * @vaddr: hlos virtual address for buffer
  110. * @paddr_lo: physical address lower 32bits
  111. * @paddr_hi: physical address higher bits
  112. * @len: length of the buffer
  113. */
  114. struct dp_tx_frag_info_s {
  115. uint8_t *vaddr;
  116. uint32_t paddr_lo;
  117. uint16_t paddr_hi;
  118. uint16_t len;
  119. };
  120. /**
  121. * struct dp_tx_seg_info_s - Segmentation Descriptor
  122. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  123. * @frag_cnt: Fragment count in this segment
  124. * @total_len: Total length of segment
  125. * @frags: per-Fragment information
  126. * @next: pointer to next MSDU segment
  127. */
  128. struct dp_tx_seg_info_s {
  129. qdf_nbuf_t nbuf;
  130. uint16_t frag_cnt;
  131. uint16_t total_len;
  132. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  133. struct dp_tx_seg_info_s *next;
  134. };
  135. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  136. /**
  137. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  138. * @num_segs: Number of segments (TSO/ME) in the frame
  139. * @total_len: Total length of the frame
  140. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  141. * descriptors for SG frames/multicast-unicast converted packets.
  142. *
  143. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  144. * carry fragmentation information
  145. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  146. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  147. * converted into set of skb sg (nr_frags) structures.
  148. */
  149. struct dp_tx_sg_info_s {
  150. uint32_t num_segs;
  151. uint32_t total_len;
  152. struct dp_tx_seg_info_s *curr_seg;
  153. };
  154. /**
  155. * struct dp_tx_queue - Tx queue
  156. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  157. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  158. *
  159. * Tx queue contains information of the software (Descriptor pool)
  160. * and hardware resources (TCL ring id) to be used for a particular
  161. * transmit queue (obtained from skb_queue_mapping in case of linux)
  162. */
  163. struct dp_tx_queue {
  164. uint8_t desc_pool_id;
  165. uint8_t ring_id;
  166. };
  167. /**
  168. * struct dp_tx_msdu_info_s - MSDU Descriptor
  169. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  170. * @tx_queue: Tx queue on which this MSDU should be transmitted
  171. * @num_seg: Number of segments (TSO)
  172. * @tid: TID (override) that is sent from HLOS
  173. * @u.tso_info: TSO information for TSO frame types
  174. * (chain of the TSO segments, number of segments)
  175. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  176. * @meta_data: Mesh meta header information
  177. * @exception_fw: Duplicate frame to be sent to firmware
  178. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  179. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  180. * @gsn: global sequence for reinjected mcast packets
  181. * @vdev_id : vdev_id for reinjected mcast packets
  182. * @skip_hp_update : Skip HP update for TSO segments and update in last segment
  183. *
  184. * This structure holds the complete MSDU information needed to program the
  185. * Hardware TCL and MSDU extension descriptors for different frame types
  186. *
  187. */
  188. struct dp_tx_msdu_info_s {
  189. enum dp_tx_frm_type frm_type;
  190. struct dp_tx_queue tx_queue;
  191. uint32_t num_seg;
  192. uint8_t tid;
  193. uint8_t exception_fw;
  194. uint8_t is_tx_sniffer;
  195. union {
  196. struct qdf_tso_info_t tso_info;
  197. struct dp_tx_sg_info_s sg_info;
  198. } u;
  199. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  200. uint16_t ppdu_cookie;
  201. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  202. #ifdef WLAN_MCAST_MLO
  203. uint16_t gsn;
  204. uint8_t vdev_id;
  205. #endif
  206. #endif
  207. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  208. uint8_t skip_hp_update;
  209. #endif
  210. #ifdef QCA_DP_TX_RMNET_OPTIMIZATION
  211. uint16_t buf_len;
  212. uint8_t *payload_addr;
  213. #endif
  214. };
  215. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  216. /**
  217. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  218. * @soc: core txrx context
  219. * @index: index of ring to deinit
  220. *
  221. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  222. * index of the respective TCL/WBM2SW release in soc structure.
  223. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  224. * and &soc->tx_comp_ring[2] will be deinitialized.
  225. *
  226. * Return: none
  227. */
  228. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  229. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  230. void
  231. dp_tx_comp_process_desc_list(struct dp_soc *soc,
  232. struct dp_tx_desc_s *comp_head, uint8_t ring_id);
  233. qdf_nbuf_t dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc,
  234. bool delayed_free);
  235. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  236. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  237. uint8_t tid, uint8_t ring_id);
  238. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  239. struct dp_tx_desc_s *tx_desc,
  240. struct hal_tx_completion_status *ts,
  241. struct dp_txrx_peer *txrx_peer,
  242. uint8_t ring_id);
  243. void dp_tx_comp_process_desc(struct dp_soc *soc,
  244. struct dp_tx_desc_s *desc,
  245. struct hal_tx_completion_status *ts,
  246. struct dp_txrx_peer *txrx_peer);
  247. void dp_tx_reinject_handler(struct dp_soc *soc,
  248. struct dp_vdev *vdev,
  249. struct dp_tx_desc_s *tx_desc,
  250. uint8_t *status,
  251. uint8_t reinject_reason);
  252. void dp_tx_inspect_handler(struct dp_soc *soc,
  253. struct dp_vdev *vdev,
  254. struct dp_tx_desc_s *tx_desc,
  255. uint8_t *status);
  256. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  257. uint32_t length, uint8_t tx_status,
  258. bool update);
  259. #ifdef DP_UMAC_HW_RESET_SUPPORT
  260. qdf_nbuf_t dp_tx_drop(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  261. qdf_nbuf_t dp_tx_exc_drop(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  262. qdf_nbuf_t nbuf,
  263. struct cdp_tx_exception_metadata *tx_exc_metadata);
  264. #endif
  265. #ifdef WLAN_SUPPORT_PPEDS
  266. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc);
  267. #else
  268. static inline
  269. void dp_ppeds_tx_desc_free(struct dp_soc *soc, struct dp_tx_desc_s *tx_desc)
  270. {
  271. }
  272. #endif
  273. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  274. /**
  275. * dp_tso_attach() - TSO Attach handler
  276. * @txrx_soc: Opaque Dp handle
  277. *
  278. * Reserve TSO descriptor buffers
  279. *
  280. * Return: QDF_STATUS_E_FAILURE on failure or
  281. * QDF_STATUS_SUCCESS on success
  282. */
  283. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  284. /**
  285. * dp_tso_detach() - TSO Detach handler
  286. * @txrx_soc: Opaque Dp handle
  287. *
  288. * Deallocate TSO descriptor buffers
  289. *
  290. * Return: QDF_STATUS_E_FAILURE on failure or
  291. * QDF_STATUS_SUCCESS on success
  292. */
  293. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  294. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  295. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  296. qdf_nbuf_t nbuf);
  297. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  298. qdf_nbuf_t nbuf,
  299. struct cdp_tx_exception_metadata *tx_exc);
  300. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  301. uint8_t vdev_id,
  302. qdf_nbuf_t nbuf,
  303. struct cdp_tx_exception_metadata *tx_exc);
  304. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  305. qdf_nbuf_t nbuf);
  306. qdf_nbuf_t
  307. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  308. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  309. struct cdp_tx_exception_metadata *tx_exc_metadata);
  310. #if QDF_LOCK_STATS
  311. noinline qdf_nbuf_t
  312. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  313. struct dp_tx_msdu_info_s *msdu_info);
  314. #else
  315. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  316. struct dp_tx_msdu_info_s *msdu_info);
  317. #endif
  318. #ifdef FEATURE_WLAN_TDLS
  319. /**
  320. * dp_tx_non_std() - Allow the control-path SW to send data frames
  321. * @soc_hdl: Datapath soc handle
  322. * @vdev_id: id of vdev
  323. * @tx_spec: what non-standard handling to apply to the tx data frames
  324. * @msdu_list: NULL-terminated list of tx MSDUs
  325. *
  326. * Return: NULL on success,
  327. * nbuf when it fails to send
  328. */
  329. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  330. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  331. #endif
  332. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  333. /**
  334. * dp_tx_comp_handler() - Tx completion handler
  335. * @int_ctx: pointer to DP interrupt context
  336. * @soc: core txrx main context
  337. * @hal_srng: Opaque HAL SRNG pointer
  338. * @ring_id: completion ring id
  339. * @quota: No. of packets/descriptors that can be serviced in one loop
  340. *
  341. * This function will collect hardware release ring element contents and
  342. * handle descriptor contents. Based on contents, free packet or handle error
  343. * conditions
  344. *
  345. * Return: Number of TX completions processed
  346. */
  347. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  348. hal_ring_handle_t hal_srng, uint8_t ring_id,
  349. uint32_t quota);
  350. QDF_STATUS
  351. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  352. QDF_STATUS
  353. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  354. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  355. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  356. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  357. {
  358. return;
  359. }
  360. #endif
  361. /**
  362. * dp_tx_pdev_init() - dp tx pdev init
  363. * @pdev: physical device instance
  364. *
  365. * Return: QDF_STATUS_SUCCESS: success
  366. * QDF_STATUS_E_RESOURCES: Error return
  367. */
  368. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  369. {
  370. struct dp_soc *soc = pdev->soc;
  371. /* Initialize Flow control counters */
  372. qdf_atomic_init(&pdev->num_tx_outstanding);
  373. pdev->tx_descs_max = 0;
  374. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  375. /* Initialize descriptors in TCL Ring */
  376. hal_tx_init_data_ring(soc->hal_soc,
  377. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  378. }
  379. return QDF_STATUS_SUCCESS;
  380. }
  381. /**
  382. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  383. * @soc: Handle to HAL Soc structure
  384. * @hal_soc: HAL SOC handle
  385. * @num_avail_for_reap: descriptors available for reap
  386. * @hal_ring_hdl: ring pointer
  387. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  388. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  389. *
  390. * Return: None
  391. */
  392. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  393. static inline
  394. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  395. hal_soc_handle_t hal_soc,
  396. uint32_t num_avail_for_reap,
  397. hal_ring_handle_t hal_ring_hdl,
  398. void **last_prefetched_hw_desc,
  399. struct dp_tx_desc_s
  400. **last_prefetched_sw_desc)
  401. {
  402. if (*last_prefetched_sw_desc) {
  403. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  404. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  405. }
  406. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  407. soc->arch_ops.tx_comp_get_params_from_hal_desc(soc,
  408. *last_prefetched_hw_desc,
  409. last_prefetched_sw_desc);
  410. if ((uintptr_t)*last_prefetched_hw_desc & 0x3f)
  411. *last_prefetched_hw_desc =
  412. hal_srng_dst_prefetch_next_cached_desc(
  413. hal_soc,
  414. hal_ring_hdl,
  415. (uint8_t *)*last_prefetched_hw_desc);
  416. else
  417. *last_prefetched_hw_desc =
  418. hal_srng_dst_get_next_32_byte_desc(hal_soc,
  419. hal_ring_hdl,
  420. (uint8_t *)*last_prefetched_hw_desc);
  421. }
  422. }
  423. #else
  424. static inline
  425. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  426. hal_soc_handle_t hal_soc,
  427. uint32_t num_avail_for_reap,
  428. hal_ring_handle_t hal_ring_hdl,
  429. void **last_prefetched_hw_desc,
  430. struct dp_tx_desc_s
  431. **last_prefetched_sw_desc)
  432. {
  433. }
  434. #endif
  435. #ifndef FEATURE_WDS
  436. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  437. {
  438. return;
  439. }
  440. #endif
  441. #ifndef QCA_MULTIPASS_SUPPORT
  442. static inline
  443. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  444. qdf_nbuf_t nbuf,
  445. struct dp_tx_msdu_info_s *msdu_info)
  446. {
  447. return true;
  448. }
  449. static inline
  450. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  451. {
  452. }
  453. #else
  454. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  455. qdf_nbuf_t nbuf,
  456. struct dp_tx_msdu_info_s *msdu_info);
  457. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  458. void dp_tx_remove_vlan_tag(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  459. void dp_tx_add_groupkey_metadata(struct dp_vdev *vdev,
  460. struct dp_tx_msdu_info_s *msdu_info,
  461. uint16_t group_key);
  462. #endif
  463. /**
  464. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  465. * @status: hw status
  466. *
  467. * Return: qdf tx rx status
  468. */
  469. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  470. {
  471. switch (status) {
  472. case HAL_TX_TQM_RR_FRAME_ACKED:
  473. return QDF_TX_RX_STATUS_OK;
  474. case HAL_TX_TQM_RR_REM_CMD_TX:
  475. return QDF_TX_RX_STATUS_NO_ACK;
  476. case HAL_TX_TQM_RR_REM_CMD_REM:
  477. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  478. case HAL_TX_TQM_RR_REM_CMD_AGED:
  479. return QDF_TX_RX_STATUS_FW_DISCARD;
  480. default:
  481. return QDF_TX_RX_STATUS_DEFAULT;
  482. }
  483. }
  484. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  485. /**
  486. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  487. * @vdev: DP Virtual device handle
  488. * @nbuf: Buffer pointer
  489. * @queue: queue ids container for nbuf
  490. *
  491. * TX packet queue has 2 instances, software descriptors id and dma ring id
  492. * Based on tx feature and hardware configuration queue id combination could be
  493. * different.
  494. * For example -
  495. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  496. * With no XPS,lock based resource protection, Descriptor pool ids are different
  497. * for each vdev, dma ring id will be same as single pdev id
  498. *
  499. * Return: None
  500. */
  501. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  502. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  503. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  504. {
  505. queue->ring_id = qdf_get_cpu();
  506. queue->desc_pool_id = queue->ring_id;
  507. }
  508. /*
  509. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  510. * @dp_soc - DP soc structure pointer
  511. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  512. *
  513. * Return - HAL ring handle
  514. */
  515. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  516. uint8_t ring_id)
  517. {
  518. if (ring_id == soc->num_tcl_data_rings)
  519. return soc->tcl_cmd_credit_ring.hal_srng;
  520. return soc->tcl_data_ring[ring_id].hal_srng;
  521. }
  522. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  523. #ifdef TX_MULTI_TCL
  524. #ifdef IPA_OFFLOAD
  525. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  526. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  527. {
  528. /* get flow id */
  529. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  530. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  531. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  532. else
  533. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  534. vdev->pdev->soc->num_tcl_data_rings);
  535. }
  536. #else
  537. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  538. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  539. {
  540. /* get flow id */
  541. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  542. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  543. vdev->pdev->soc->num_tcl_data_rings);
  544. }
  545. #endif
  546. #else
  547. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  548. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  549. {
  550. /* get flow id */
  551. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  552. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  553. }
  554. #endif
  555. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  556. uint8_t ring_id)
  557. {
  558. return soc->tcl_data_ring[ring_id].hal_srng;
  559. }
  560. #endif
  561. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  562. /*
  563. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  564. * @dp_soc - DP soc structure pointer
  565. * @hal_ring_hdl - HAL ring handle
  566. *
  567. * Return - None
  568. */
  569. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  570. hal_ring_handle_t hal_ring_hdl)
  571. {
  572. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  573. }
  574. /*
  575. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  576. * @dp_soc - DP soc structure pointer
  577. * @hal_ring_hdl - HAL ring handle
  578. *
  579. * Return - None
  580. */
  581. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  582. hal_ring_handle_t hal_ring_hdl)
  583. {
  584. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  585. }
  586. /*
  587. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  588. * @dp_soc - DP soc structure pointer
  589. * @hal_ring_hdl - HAL ring handle
  590. *
  591. * Return - None
  592. */
  593. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  594. hal_ring_handle_t
  595. hal_ring_hdl)
  596. {
  597. }
  598. #else
  599. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  600. hal_ring_handle_t hal_ring_hdl)
  601. {
  602. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  603. }
  604. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  605. hal_ring_handle_t hal_ring_hdl)
  606. {
  607. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  608. }
  609. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  610. hal_ring_handle_t
  611. hal_ring_hdl)
  612. {
  613. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  614. }
  615. #endif
  616. #ifdef ATH_TX_PRI_OVERRIDE
  617. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  618. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  619. #else
  620. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  621. #endif
  622. /* TODO TX_FEATURE_NOT_YET */
  623. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  624. {
  625. return;
  626. }
  627. /* TODO TX_FEATURE_NOT_YET */
  628. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  629. bool force_free);
  630. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  631. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  632. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  633. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  634. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  635. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  636. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  637. void
  638. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  639. uint32_t buf_type);
  640. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  641. static inline
  642. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  643. {
  644. return QDF_STATUS_SUCCESS;
  645. }
  646. static inline
  647. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  648. {
  649. return QDF_STATUS_SUCCESS;
  650. }
  651. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  652. {
  653. }
  654. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  655. {
  656. }
  657. static inline
  658. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  659. bool force_free)
  660. {
  661. }
  662. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  663. {
  664. return QDF_STATUS_SUCCESS;
  665. }
  666. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  667. {
  668. return QDF_STATUS_SUCCESS;
  669. }
  670. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  671. {
  672. }
  673. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  674. #if defined(QCA_SUPPORT_LATENCY_CAPTURE) || \
  675. defined(QCA_TX_CAPTURE_SUPPORT) || \
  676. defined(QCA_MCOPY_SUPPORT)
  677. #ifdef FEATURE_PERPKT_INFO
  678. QDF_STATUS
  679. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  680. struct dp_pdev *pdev,
  681. struct dp_txrx_peer *peer,
  682. struct hal_tx_completion_status *ts,
  683. qdf_nbuf_t netbuf,
  684. uint64_t time_latency);
  685. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  686. uint16_t peer_id, uint32_t ppdu_id,
  687. qdf_nbuf_t netbuf);
  688. #endif
  689. #else
  690. static inline
  691. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  692. struct dp_pdev *pdev,
  693. struct dp_txrx_peer *peer,
  694. struct hal_tx_completion_status *ts,
  695. qdf_nbuf_t netbuf,
  696. uint64_t time_latency)
  697. {
  698. return QDF_STATUS_E_NOSUPPORT;
  699. }
  700. static inline
  701. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  702. uint16_t peer_id, uint32_t ppdu_id,
  703. qdf_nbuf_t netbuf)
  704. {
  705. }
  706. #endif
  707. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  708. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  709. struct dp_tx_desc_s *desc,
  710. struct hal_tx_completion_status *ts);
  711. #else
  712. static inline void
  713. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  714. struct dp_tx_desc_s *desc,
  715. struct hal_tx_completion_status *ts)
  716. {
  717. }
  718. #endif
  719. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  720. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  721. /**
  722. * dp_tx_update_stats() - Update soc level tx stats
  723. * @soc: DP soc handle
  724. * @tx_desc: TX descriptor reference
  725. * @ring_id: TCL ring id
  726. *
  727. * Returns: none
  728. */
  729. void dp_tx_update_stats(struct dp_soc *soc,
  730. struct dp_tx_desc_s *tx_desc,
  731. uint8_t ring_id);
  732. /**
  733. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  734. * @soc: Datapath soc handle
  735. * @tx_desc: tx packet descriptor
  736. * @tid: TID for pkt transmission
  737. * @msdu_info: MSDU info of tx packet
  738. * @ring_id: TCL ring id
  739. *
  740. * Returns: 1, if coalescing is to be done
  741. * 0, if coalescing is not to be done
  742. */
  743. int
  744. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  745. struct dp_tx_desc_s *tx_desc,
  746. uint8_t tid,
  747. struct dp_tx_msdu_info_s *msdu_info,
  748. uint8_t ring_id);
  749. /**
  750. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  751. * @soc: Datapath soc handle
  752. * @hal_ring_hdl: HAL ring handle
  753. * @coalesce: Coalesce the current write or not
  754. *
  755. * Returns: none
  756. */
  757. void
  758. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  759. int coalesce);
  760. #else
  761. /**
  762. * dp_tx_update_stats() - Update soc level tx stats
  763. * @soc: DP soc handle
  764. * @tx_desc: TX descriptor reference
  765. * @ring_id: TCL ring id
  766. *
  767. * Returns: none
  768. */
  769. static inline void dp_tx_update_stats(struct dp_soc *soc,
  770. struct dp_tx_desc_s *tx_desc,
  771. uint8_t ring_id){ }
  772. static inline void
  773. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  774. int coalesce)
  775. {
  776. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  777. }
  778. static inline int
  779. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  780. struct dp_tx_desc_s *tx_desc,
  781. uint8_t tid,
  782. struct dp_tx_msdu_info_s *msdu_info,
  783. uint8_t ring_id)
  784. {
  785. return 0;
  786. }
  787. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  788. #ifdef FEATURE_RUNTIME_PM
  789. /**
  790. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  791. * @soc_hdl: DP soc handle
  792. * @is_high_tput: flag to indicate whether throughput is high
  793. *
  794. * Returns: none
  795. */
  796. static inline
  797. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  798. bool is_high_tput)
  799. {
  800. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  801. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  802. }
  803. void
  804. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  805. hal_ring_handle_t hal_ring_hdl,
  806. int coalesce);
  807. #else
  808. #ifdef DP_POWER_SAVE
  809. void
  810. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  811. hal_ring_handle_t hal_ring_hdl,
  812. int coalesce);
  813. #else
  814. static inline void
  815. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  816. hal_ring_handle_t hal_ring_hdl,
  817. int coalesce)
  818. {
  819. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  820. }
  821. #endif
  822. static inline void
  823. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  824. bool is_high_tput)
  825. { }
  826. #endif
  827. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  828. #ifdef DP_TX_HW_DESC_HISTORY
  829. static inline void
  830. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  831. hal_ring_handle_t hal_ring_hdl,
  832. struct dp_soc *soc, uint8_t ring_id)
  833. {
  834. struct dp_tx_hw_desc_history *tx_hw_desc_history =
  835. &soc->tx_hw_desc_history;
  836. struct dp_tx_hw_desc_evt *evt;
  837. uint32_t idx = 0;
  838. uint16_t slot = 0;
  839. if (!tx_hw_desc_history->allocated)
  840. return;
  841. dp_get_frag_hist_next_atomic_idx(&tx_hw_desc_history->index, &idx,
  842. &slot,
  843. DP_TX_HW_DESC_HIST_SLOT_SHIFT,
  844. DP_TX_HW_DESC_HIST_PER_SLOT_MAX,
  845. DP_TX_HW_DESC_HIST_MAX);
  846. evt = &tx_hw_desc_history->entry[slot][idx];
  847. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  848. evt->posted = qdf_get_log_timestamp();
  849. evt->tcl_ring_id = ring_id;
  850. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  851. }
  852. #else
  853. static inline void
  854. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  855. hal_ring_handle_t hal_ring_hdl,
  856. struct dp_soc *soc, uint8_t ring_id)
  857. {
  858. }
  859. #endif
  860. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(WLAN_CONFIG_TX_DELAY)
  861. /**
  862. * dp_tx_compute_hw_delay_us() - Compute hardware Tx completion delay
  863. * @ts: Tx completion status
  864. * @delta_tsf: Difference between TSF clock and qtimer
  865. * @delay_us: Delay in microseconds
  866. *
  867. * Return: QDF_STATUS_SUCCESS : Success
  868. * QDF_STATUS_E_INVAL : Tx completion status is invalid or
  869. * delay_us is NULL
  870. * QDF_STATUS_E_FAILURE : Error in delay calculation
  871. */
  872. QDF_STATUS
  873. dp_tx_compute_hw_delay_us(struct hal_tx_completion_status *ts,
  874. uint32_t delta_tsf,
  875. uint32_t *delay_us);
  876. /**
  877. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  878. * @soc_hdl: cdp soc pointer
  879. * @vdev_id: vdev id
  880. * @delta_tsf: difference between TSF clock and qtimer
  881. *
  882. * Return: None
  883. */
  884. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  885. uint32_t delta_tsf);
  886. #endif
  887. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  888. /**
  889. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  890. * @soc_hdl: cdp soc pointer
  891. * @vdev_id: vdev id
  892. * @enable: true to enable and false to disable
  893. *
  894. * Return: QDF_STATUS
  895. */
  896. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  897. uint8_t vdev_id, bool enable);
  898. /**
  899. * dp_get_uplink_delay() - Get uplink delay value
  900. * @soc_hdl: cdp soc pointer
  901. * @vdev_id: vdev id
  902. * @val: pointer to save uplink delay value
  903. *
  904. * Return: QDF_STATUS
  905. */
  906. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  907. uint32_t *val);
  908. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  909. /**
  910. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  911. *
  912. * Return: True if any tx pkt tracepoint is enabled else false
  913. */
  914. static inline
  915. bool dp_tx_pkt_tracepoints_enabled(void)
  916. {
  917. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  918. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  919. qdf_trace_dp_tx_comp_pkt_enabled());
  920. }
  921. #ifdef DP_TX_TRACKING
  922. /**
  923. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  924. * @tx_desc - tx descriptor
  925. *
  926. * Return: None
  927. */
  928. static inline
  929. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  930. {
  931. tx_desc->timestamp_tick = qdf_system_ticks();
  932. }
  933. /**
  934. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  935. * @tx_desc: tx descriptor
  936. *
  937. * Check for corruption in tx descriptor, if magic pattern is not matching
  938. * trigger self recovery
  939. *
  940. * Return: none
  941. */
  942. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  943. #else
  944. static inline
  945. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  946. {
  947. }
  948. static inline
  949. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  950. {
  951. }
  952. #endif
  953. #ifndef CONFIG_SAWF
  954. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  955. {
  956. return false;
  957. }
  958. #endif
  959. #ifdef HW_TX_DELAY_STATS_ENABLE
  960. /**
  961. * dp_tx_desc_set_ktimestamp() - set kernel timestamp in tx descriptor
  962. * @vdev: DP vdev handle
  963. * @tx_desc: tx descriptor
  964. *
  965. * Return: true when descriptor is timestamped, false otherwise
  966. */
  967. static inline
  968. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  969. struct dp_tx_desc_s *tx_desc)
  970. {
  971. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  972. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  973. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  974. qdf_unlikely(vdev->pdev->soc->peerstats_enabled) ||
  975. qdf_unlikely(dp_is_vdev_tx_delay_stats_enabled(vdev))) {
  976. tx_desc->timestamp = qdf_ktime_real_get();
  977. return true;
  978. }
  979. return false;
  980. }
  981. #else
  982. static inline
  983. bool dp_tx_desc_set_ktimestamp(struct dp_vdev *vdev,
  984. struct dp_tx_desc_s *tx_desc)
  985. {
  986. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  987. qdf_unlikely(vdev->pdev->soc->wlan_cfg_ctx->pext_stats_enabled) ||
  988. qdf_unlikely(dp_tx_pkt_tracepoints_enabled()) ||
  989. qdf_unlikely(vdev->pdev->soc->peerstats_enabled)) {
  990. tx_desc->timestamp = qdf_ktime_real_get();
  991. return true;
  992. }
  993. return false;
  994. }
  995. #endif
  996. #ifdef CONFIG_DP_PKT_ADD_TIMESTAMP
  997. /**
  998. * dp_pkt_add_timestamp() - add timestamp in data payload
  999. *
  1000. * @vdev: dp vdev
  1001. * @index: index to decide offset in payload
  1002. * @time: timestamp to add in data payload
  1003. * @nbuf: network buffer
  1004. *
  1005. * Return: none
  1006. */
  1007. void dp_pkt_add_timestamp(struct dp_vdev *vdev,
  1008. enum qdf_pkt_timestamp_index index, uint64_t time,
  1009. qdf_nbuf_t nbuf);
  1010. /**
  1011. * dp_pkt_get_timestamp() - get current system time
  1012. *
  1013. * @time: return current system time
  1014. *
  1015. * Return: none
  1016. */
  1017. void dp_pkt_get_timestamp(uint64_t *time);
  1018. #else
  1019. #define dp_pkt_add_timestamp(vdev, index, time, nbuf)
  1020. static inline
  1021. void dp_pkt_get_timestamp(uint64_t *time)
  1022. {
  1023. }
  1024. #endif
  1025. #ifdef CONFIG_WLAN_SYSFS_MEM_STATS
  1026. /**
  1027. * dp_update_tx_desc_stats - Update the increase or decrease in
  1028. * outstanding tx desc count
  1029. * values on pdev and soc
  1030. * @vdev: DP pdev handle
  1031. *
  1032. * Return: void
  1033. */
  1034. static inline void
  1035. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1036. {
  1037. int32_t tx_descs_cnt =
  1038. qdf_atomic_read(&pdev->num_tx_outstanding);
  1039. if (pdev->tx_descs_max < tx_descs_cnt)
  1040. pdev->tx_descs_max = tx_descs_cnt;
  1041. qdf_mem_tx_desc_cnt_update(pdev->num_tx_outstanding,
  1042. pdev->tx_descs_max);
  1043. }
  1044. #else /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1045. static inline void
  1046. dp_update_tx_desc_stats(struct dp_pdev *pdev)
  1047. {
  1048. }
  1049. #endif /* CONFIG_WLAN_SYSFS_MEM_STATS */
  1050. #ifdef QCA_TX_LIMIT_CHECK
  1051. static inline bool is_spl_packet(qdf_nbuf_t nbuf)
  1052. {
  1053. if (qdf_nbuf_is_ipv4_eapol_pkt(nbuf))
  1054. return true;
  1055. return false;
  1056. }
  1057. /**
  1058. * is_dp_spl_tx_limit_reached - Check if the packet is a special packet to allow
  1059. * allocation if allocated tx descriptors are within the soc max limit
  1060. * and pdev max limit.
  1061. * @vdev: DP vdev handle
  1062. *
  1063. * Return: true if allocated tx descriptors reached max configured value, else
  1064. * false
  1065. */
  1066. static inline bool
  1067. is_dp_spl_tx_limit_reached(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1068. {
  1069. struct dp_pdev *pdev = vdev->pdev;
  1070. struct dp_soc *soc = pdev->soc;
  1071. if (is_spl_packet(nbuf)) {
  1072. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1073. soc->num_tx_allowed)
  1074. return true;
  1075. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1076. pdev->num_tx_allowed)
  1077. return true;
  1078. return false;
  1079. }
  1080. return true;
  1081. }
  1082. /**
  1083. * dp_tx_limit_check - Check if allocated tx descriptors reached
  1084. * soc max reg limit and pdev max reg limit for regular packets. Also check if
  1085. * the limit is reached for special packets.
  1086. * @vdev: DP vdev handle
  1087. *
  1088. * Return: true if allocated tx descriptors reached max limit for regular
  1089. * packets and in case of special packets, if the limit is reached max
  1090. * configured vale for the soc/pdev, else false
  1091. */
  1092. static inline bool
  1093. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1094. {
  1095. struct dp_pdev *pdev = vdev->pdev;
  1096. struct dp_soc *soc = pdev->soc;
  1097. if (qdf_atomic_read(&soc->num_tx_outstanding) >=
  1098. soc->num_reg_tx_allowed) {
  1099. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1100. dp_tx_info("queued packets are more than max tx, drop the frame");
  1101. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1102. return true;
  1103. }
  1104. }
  1105. if (qdf_atomic_read(&pdev->num_tx_outstanding) >=
  1106. pdev->num_reg_tx_allowed) {
  1107. if (is_dp_spl_tx_limit_reached(vdev, nbuf)) {
  1108. dp_tx_info("queued packets are more than max tx, drop the frame");
  1109. DP_STATS_INC(vdev, tx_i.dropped.desc_na.num, 1);
  1110. DP_STATS_INC(vdev,
  1111. tx_i.dropped.desc_na_exc_outstand.num, 1);
  1112. return true;
  1113. }
  1114. }
  1115. return false;
  1116. }
  1117. /**
  1118. * dp_tx_exception_limit_check - Check if allocated tx exception descriptors
  1119. * reached soc max limit
  1120. * @vdev: DP vdev handle
  1121. *
  1122. * Return: true if allocated tx descriptors reached max configured value, else
  1123. * false
  1124. */
  1125. static inline bool
  1126. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1127. {
  1128. struct dp_pdev *pdev = vdev->pdev;
  1129. struct dp_soc *soc = pdev->soc;
  1130. if (qdf_atomic_read(&soc->num_tx_exception) >=
  1131. soc->num_msdu_exception_desc) {
  1132. dp_info("exc packets are more than max drop the exc pkt");
  1133. DP_STATS_INC(vdev, tx_i.dropped.exc_desc_na.num, 1);
  1134. return true;
  1135. }
  1136. return false;
  1137. }
  1138. /**
  1139. * dp_tx_outstanding_inc - Increment outstanding tx desc values on pdev and soc
  1140. * @vdev: DP pdev handle
  1141. *
  1142. * Return: void
  1143. */
  1144. static inline void
  1145. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1146. {
  1147. struct dp_soc *soc = pdev->soc;
  1148. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1149. qdf_atomic_inc(&soc->num_tx_outstanding);
  1150. dp_update_tx_desc_stats(pdev);
  1151. }
  1152. /**
  1153. * dp_tx_outstanding__dec - Decrement outstanding tx desc values on pdev and soc
  1154. * @vdev: DP pdev handle
  1155. *
  1156. * Return: void
  1157. */
  1158. static inline void
  1159. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1160. {
  1161. struct dp_soc *soc = pdev->soc;
  1162. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1163. qdf_atomic_dec(&soc->num_tx_outstanding);
  1164. dp_update_tx_desc_stats(pdev);
  1165. }
  1166. #else //QCA_TX_LIMIT_CHECK
  1167. static inline bool
  1168. dp_tx_limit_check(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1169. {
  1170. return false;
  1171. }
  1172. static inline bool
  1173. dp_tx_exception_limit_check(struct dp_vdev *vdev)
  1174. {
  1175. return false;
  1176. }
  1177. static inline void
  1178. dp_tx_outstanding_inc(struct dp_pdev *pdev)
  1179. {
  1180. qdf_atomic_inc(&pdev->num_tx_outstanding);
  1181. dp_update_tx_desc_stats(pdev);
  1182. }
  1183. static inline void
  1184. dp_tx_outstanding_dec(struct dp_pdev *pdev)
  1185. {
  1186. qdf_atomic_dec(&pdev->num_tx_outstanding);
  1187. dp_update_tx_desc_stats(pdev);
  1188. }
  1189. #endif //QCA_TX_LIMIT_CHECK
  1190. /**
  1191. * dp_tx_get_pkt_len() - Get the packet length of a msdu
  1192. * @tx_desc: tx descriptor
  1193. *
  1194. * Return: Packet length of a msdu. If the packet is fragmented,
  1195. * it will return the single fragment length.
  1196. *
  1197. * In TSO mode, the msdu from stack will be fragmented into small
  1198. * fragments and each of these new fragments will be transmitted
  1199. * as an individual msdu.
  1200. *
  1201. * Please note that the length of a msdu from stack may be smaller
  1202. * than the length of the total length of the fragments it has been
  1203. * fragmentted because each of the fragments has a nbuf header.
  1204. */
  1205. static inline uint32_t dp_tx_get_pkt_len(struct dp_tx_desc_s *tx_desc)
  1206. {
  1207. return tx_desc->frm_type == dp_tx_frm_tso ?
  1208. tx_desc->msdu_ext_desc->tso_desc->seg.total_len :
  1209. qdf_nbuf_len(tx_desc->nbuf);
  1210. }
  1211. #endif