hal_rx_flow.c 15 KB

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  1. /*
  2. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "qdf_module.h"
  18. #include "dp_types.h"
  19. #include "hal_rx_flow.h"
  20. /**
  21. * hal_rx_flow_get_cmem_fse() - Get FSE from CMEM
  22. * @hal_soc_hdl: HAL SOC handle
  23. * @fse_offset: CMEM FSE offset
  24. * @fse: reference where FSE will be copied
  25. * @len: length of FSE
  26. *
  27. * Return: If read is successful or not
  28. */
  29. static void
  30. hal_rx_flow_get_cmem_fse(hal_soc_handle_t hal_soc_hdl, uint32_t fse_offset,
  31. uint32_t *fse, qdf_size_t len)
  32. {
  33. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  34. if (hal_soc->ops->hal_rx_flow_get_cmem_fse) {
  35. return hal_soc->ops->hal_rx_flow_get_cmem_fse(
  36. hal_soc, fse_offset, fse, len);
  37. }
  38. }
  39. #if defined(WLAN_SUPPORT_RX_FISA)
  40. static inline void hal_rx_dump_fse(struct rx_flow_search_entry *fse, int index)
  41. {
  42. dp_info("index %d:"
  43. " src_ip_127_96 0x%x"
  44. " src_ip_95_640 0x%x"
  45. " src_ip_63_32 0x%x"
  46. " src_ip_31_0 0x%x"
  47. " dest_ip_127_96 0x%x"
  48. " dest_ip_95_64 0x%x"
  49. " dest_ip_63_32 0x%x"
  50. " dest_ip_31_0 0x%x"
  51. " src_port 0x%x"
  52. " dest_port 0x%x"
  53. " l4_protocol 0x%x"
  54. " valid 0x%x"
  55. " reo_destination_indication 0x%x"
  56. " msdu_drop 0x%x"
  57. " reo_destination_handler 0x%x"
  58. " metadata 0x%x"
  59. " aggregation_count0x%x"
  60. " lro_eligible 0x%x"
  61. " msdu_count 0x%x"
  62. " msdu_byte_count 0x%x"
  63. " timestamp 0x%x"
  64. " cumulative_l4_checksum 0x%x"
  65. " cumulative_ip_length 0x%x"
  66. " tcp_sequence_number 0x%x",
  67. index,
  68. fse->src_ip_127_96,
  69. fse->src_ip_95_64,
  70. fse->src_ip_63_32,
  71. fse->src_ip_31_0,
  72. fse->dest_ip_127_96,
  73. fse->dest_ip_95_64,
  74. fse->dest_ip_63_32,
  75. fse->dest_ip_31_0,
  76. fse->src_port,
  77. fse->dest_port,
  78. fse->l4_protocol,
  79. fse->valid,
  80. fse->reo_destination_indication,
  81. fse->msdu_drop,
  82. fse->reo_destination_handler,
  83. fse->metadata,
  84. fse->aggregation_count,
  85. fse->lro_eligible,
  86. fse->msdu_count,
  87. fse->msdu_byte_count,
  88. fse->timestamp,
  89. #ifdef QCA_WIFI_KIWI_V2
  90. fse->cumulative_ip_length_pmac1,
  91. #else
  92. fse->cumulative_l4_checksum,
  93. #endif
  94. fse->cumulative_ip_length,
  95. fse->tcp_sequence_number);
  96. }
  97. void hal_rx_dump_fse_table(struct hal_rx_fst *fst)
  98. {
  99. int i = 0;
  100. struct rx_flow_search_entry *fse =
  101. (struct rx_flow_search_entry *)fst->base_vaddr;
  102. dp_info("Number flow table entries %d", fst->add_flow_count);
  103. for (i = 0; i < fst->max_entries; i++) {
  104. if (fse[i].valid)
  105. hal_rx_dump_fse(&fse[i], i);
  106. }
  107. }
  108. void hal_rx_dump_cmem_fse(hal_soc_handle_t hal_soc_hdl, uint32_t fse_offset,
  109. int index)
  110. {
  111. struct rx_flow_search_entry fse = {0};
  112. if (!fse_offset)
  113. return;
  114. hal_rx_flow_get_cmem_fse(hal_soc_hdl, fse_offset, (uint32_t *)&fse,
  115. sizeof(struct rx_flow_search_entry));
  116. if (fse.valid)
  117. hal_rx_dump_fse(&fse, index);
  118. }
  119. #else
  120. void hal_rx_dump_fse_table(struct hal_rx_fst *fst)
  121. {
  122. }
  123. void hal_rx_dump_cmem_fse(hal_soc_handle_t hal_soc_hdl, uint32_t fse_offset,
  124. int index)
  125. {
  126. }
  127. #endif
  128. void *
  129. hal_rx_flow_setup_fse(hal_soc_handle_t hal_soc_hdl,
  130. struct hal_rx_fst *fst, uint32_t table_offset,
  131. struct hal_rx_flow *flow)
  132. {
  133. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  134. if (hal_soc->ops->hal_rx_flow_setup_fse) {
  135. return hal_soc->ops->hal_rx_flow_setup_fse((uint8_t *)fst,
  136. table_offset,
  137. (uint8_t *)flow);
  138. }
  139. return NULL;
  140. }
  141. qdf_export_symbol(hal_rx_flow_setup_fse);
  142. uint32_t
  143. hal_rx_flow_setup_cmem_fse(hal_soc_handle_t hal_soc_hdl, uint32_t cmem_ba,
  144. uint32_t table_offset, struct hal_rx_flow *flow)
  145. {
  146. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  147. if (hal_soc->ops->hal_rx_flow_setup_cmem_fse) {
  148. return hal_soc->ops->hal_rx_flow_setup_cmem_fse(
  149. hal_soc, cmem_ba,
  150. table_offset, (uint8_t *)flow);
  151. }
  152. return 0;
  153. }
  154. qdf_export_symbol(hal_rx_flow_setup_cmem_fse);
  155. uint32_t hal_rx_flow_get_cmem_fse_timestamp(hal_soc_handle_t hal_soc_hdl,
  156. uint32_t fse_offset)
  157. {
  158. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  159. if (hal_soc->ops->hal_rx_flow_get_cmem_fse_ts) {
  160. return hal_soc->ops->hal_rx_flow_get_cmem_fse_ts(hal_soc,
  161. fse_offset);
  162. }
  163. return 0;
  164. }
  165. qdf_export_symbol(hal_rx_flow_get_cmem_fse_timestamp);
  166. QDF_STATUS
  167. hal_rx_flow_delete_entry(hal_soc_handle_t hal_soc_hdl,
  168. struct hal_rx_fst *fst, void *hal_rx_fse)
  169. {
  170. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  171. if (hal_soc->ops->hal_rx_flow_delete_entry) {
  172. return hal_soc->ops->hal_rx_flow_delete_entry((uint8_t *)fst,
  173. hal_rx_fse);
  174. }
  175. return QDF_STATUS_E_NOSUPPORT;
  176. }
  177. qdf_export_symbol(hal_rx_flow_delete_entry);
  178. #ifndef WLAN_SUPPORT_RX_FISA
  179. /**
  180. * hal_rx_fst_key_configure() - Configure the Toeplitz key in the FST
  181. * @fst: Pointer to the Rx Flow Search Table
  182. *
  183. * Return: Success/Failure
  184. */
  185. static void hal_rx_fst_key_configure(struct hal_rx_fst *fst)
  186. {
  187. uint8_t key_bytes[HAL_FST_HASH_KEY_SIZE_BYTES];
  188. qdf_mem_copy(key_bytes, fst->key, HAL_FST_HASH_KEY_SIZE_BYTES);
  189. /*
  190. * The Toeplitz algorithm as per the Microsoft spec works in a
  191. * “big-endian” manner, using the MSBs of the key to hash the
  192. * initial bytes of the input going on to use up the lower order bits
  193. * of the key to hash further bytes of the input until the LSBs of the
  194. * key are used finally.
  195. *
  196. * So first, rightshift 320-bit input key 5 times to get 315 MS bits
  197. */
  198. key_bitwise_shift_left(key_bytes, HAL_FST_HASH_KEY_SIZE_BYTES, 5);
  199. key_reverse(fst->shifted_key, key_bytes, HAL_FST_HASH_KEY_SIZE_BYTES);
  200. }
  201. #else
  202. static void hal_rx_fst_key_configure(struct hal_rx_fst *fst)
  203. {
  204. }
  205. #endif
  206. /**
  207. * hal_rx_fst_get_base() - Retrieve the virtual base address of the Rx FST
  208. * @fst: Pointer to the Rx Flow Search Table
  209. *
  210. * Return: Success/Failure
  211. */
  212. static inline void *hal_rx_fst_get_base(struct hal_rx_fst *fst)
  213. {
  214. return fst->base_vaddr;
  215. }
  216. /**
  217. * hal_rx_fst_get_fse_size() - Retrieve the size of each entry(flow) in Rx FST
  218. * @hal_soc_hdl: HAL SOC handle
  219. *
  220. * Return: size of each entry/flow in Rx FST
  221. */
  222. static inline uint32_t
  223. hal_rx_fst_get_fse_size(hal_soc_handle_t hal_soc_hdl)
  224. {
  225. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  226. if (hal_soc->ops->hal_rx_fst_get_fse_size)
  227. return hal_soc->ops->hal_rx_fst_get_fse_size();
  228. return 0;
  229. }
  230. /**
  231. * hal_rx_flow_get_tuple_info() - Get a flow search entry in HW FST
  232. * @hal_soc_hdl: HAL SOC handle
  233. * @fst: Pointer to the Rx Flow Search Table
  234. * @hal_hash: HAL 5 tuple hash
  235. * @tuple_info: 5-tuple info of the flow returned to the caller
  236. *
  237. * Return: Success/Failure
  238. */
  239. void *
  240. hal_rx_flow_get_tuple_info(hal_soc_handle_t hal_soc_hdl,
  241. struct hal_rx_fst *fst,
  242. uint32_t hal_hash,
  243. struct hal_flow_tuple_info *tuple_info)
  244. {
  245. struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
  246. if (hal_soc->ops->hal_rx_flow_get_tuple_info)
  247. return hal_soc->ops->hal_rx_flow_get_tuple_info(
  248. (uint8_t *)fst,
  249. hal_hash,
  250. (uint8_t *)tuple_info);
  251. return NULL;
  252. }
  253. #ifndef WLAN_SUPPORT_RX_FISA
  254. /**
  255. * hal_flow_toeplitz_create_cache() - Calculate hashes for each possible
  256. * byte value with the key taken as is
  257. * @fst: FST Handle
  258. *
  259. * Return: None
  260. */
  261. static void hal_flow_toeplitz_create_cache(struct hal_rx_fst *fst)
  262. {
  263. int bit;
  264. int val;
  265. int i;
  266. uint8_t *key = fst->shifted_key;
  267. /*
  268. * Initialise to first 32 bits of the key; shift in further key material
  269. * through the loop
  270. */
  271. uint32_t cur_key = (key[0] << 24) | (key[1] << 16) | (key[2] << 8) |
  272. key[3];
  273. for (i = 0; i < HAL_FST_HASH_KEY_SIZE_BYTES; i++) {
  274. uint8_t new_key_byte;
  275. uint32_t shifted_key[8];
  276. if (i + 4 < HAL_FST_HASH_KEY_SIZE_BYTES)
  277. new_key_byte = key[i + 4];
  278. else
  279. new_key_byte = 0;
  280. shifted_key[0] = cur_key;
  281. for (bit = 1; bit < 8; bit++) {
  282. /*
  283. * For each iteration, shift out one more bit of the
  284. * current key and shift in one more bit of the new key
  285. * material
  286. */
  287. shifted_key[bit] = cur_key << bit |
  288. new_key_byte >> (8 - bit);
  289. }
  290. for (val = 0; val < (1 << 8); val++) {
  291. uint32_t hash = 0;
  292. int mask;
  293. /*
  294. * For each bit set in the input, XOR in
  295. * the appropriately shifted key
  296. */
  297. for (bit = 0, mask = 1 << 7; bit < 8; bit++, mask >>= 1)
  298. if ((val & mask))
  299. hash ^= shifted_key[bit];
  300. fst->key_cache[i][val] = hash;
  301. }
  302. cur_key = cur_key << 8 | new_key_byte;
  303. }
  304. }
  305. #else
  306. static void hal_flow_toeplitz_create_cache(struct hal_rx_fst *fst)
  307. {
  308. }
  309. #endif
  310. struct hal_rx_fst *
  311. hal_rx_fst_attach(hal_soc_handle_t hal_soc_hdl,
  312. qdf_device_t qdf_dev,
  313. uint64_t *hal_fst_base_paddr, uint16_t max_entries,
  314. uint16_t max_search, uint8_t *hash_key,
  315. uint64_t fst_cmem_base)
  316. {
  317. struct hal_rx_fst *fst = qdf_mem_malloc(sizeof(struct hal_rx_fst));
  318. uint32_t fst_entry_size;
  319. if (!fst) {
  320. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  321. FL("hal fst allocation failed,"));
  322. return NULL;
  323. }
  324. qdf_mem_set(fst, sizeof(struct hal_rx_fst), 0);
  325. fst->key = hash_key;
  326. fst->max_skid_length = max_search;
  327. fst->max_entries = max_entries;
  328. fst->hash_mask = max_entries - 1;
  329. fst_entry_size = hal_rx_fst_get_fse_size(hal_soc_hdl);
  330. fst->fst_entry_size = fst_entry_size;
  331. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  332. "HAL FST allocation %pK %d * %d\n", fst,
  333. fst->max_entries, fst_entry_size);
  334. if (fst_cmem_base == 0) {
  335. /* FST is in DDR */
  336. fst->base_vaddr = (uint8_t *)qdf_mem_alloc_consistent(qdf_dev,
  337. qdf_dev->dev,
  338. (fst->max_entries * fst_entry_size),
  339. &fst->base_paddr);
  340. if (!fst->base_vaddr) {
  341. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  342. FL("hal fst->base_vaddr allocation failed"));
  343. qdf_mem_free(fst);
  344. return NULL;
  345. }
  346. *hal_fst_base_paddr = (uint64_t)fst->base_paddr;
  347. } else {
  348. *hal_fst_base_paddr = fst_cmem_base;
  349. goto out;
  350. }
  351. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
  352. "hal_rx_fst base address 0x%pK", (void *)fst->base_paddr);
  353. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_DEBUG,
  354. (void *)fst->key, HAL_FST_HASH_KEY_SIZE_BYTES);
  355. qdf_mem_set((uint8_t *)fst->base_vaddr,
  356. (fst->max_entries * fst_entry_size), 0);
  357. out:
  358. hal_rx_fst_key_configure(fst);
  359. hal_flow_toeplitz_create_cache(fst);
  360. return fst;
  361. }
  362. qdf_export_symbol(hal_rx_fst_attach);
  363. void hal_rx_fst_detach(hal_soc_handle_t hal_soc_hdl, struct hal_rx_fst *rx_fst,
  364. qdf_device_t qdf_dev, uint64_t fst_cmem_base)
  365. {
  366. if (!rx_fst || !qdf_dev)
  367. return;
  368. if (fst_cmem_base == 0 && rx_fst->base_vaddr) {
  369. qdf_mem_free_consistent(qdf_dev, qdf_dev->dev,
  370. rx_fst->max_entries *
  371. rx_fst->fst_entry_size,
  372. rx_fst->base_vaddr, rx_fst->base_paddr,
  373. 0);
  374. }
  375. qdf_mem_free(rx_fst);
  376. }
  377. qdf_export_symbol(hal_rx_fst_detach);
  378. #ifndef WLAN_SUPPORT_RX_FISA
  379. uint32_t
  380. hal_flow_toeplitz_hash(void *hal_fst, struct hal_rx_flow *flow)
  381. {
  382. int i, j;
  383. uint32_t hash = 0;
  384. struct hal_rx_fst *fst = (struct hal_rx_fst *)hal_fst;
  385. uint32_t input[HAL_FST_HASH_KEY_SIZE_WORDS];
  386. uint8_t *tuple;
  387. qdf_mem_zero(input, HAL_FST_HASH_KEY_SIZE_BYTES);
  388. *(uint32_t *)&input[0] = qdf_htonl(flow->tuple_info.src_ip_127_96);
  389. *(uint32_t *)&input[1] = qdf_htonl(flow->tuple_info.src_ip_95_64);
  390. *(uint32_t *)&input[2] = qdf_htonl(flow->tuple_info.src_ip_63_32);
  391. *(uint32_t *)&input[3] = qdf_htonl(flow->tuple_info.src_ip_31_0);
  392. *(uint32_t *)&input[4] = qdf_htonl(flow->tuple_info.dest_ip_127_96);
  393. *(uint32_t *)&input[5] = qdf_htonl(flow->tuple_info.dest_ip_95_64);
  394. *(uint32_t *)&input[6] = qdf_htonl(flow->tuple_info.dest_ip_63_32);
  395. *(uint32_t *)&input[7] = qdf_htonl(flow->tuple_info.dest_ip_31_0);
  396. *(uint32_t *)&input[8] = (flow->tuple_info.dest_port << 16) |
  397. (flow->tuple_info.src_port);
  398. *(uint32_t *)&input[9] = flow->tuple_info.l4_protocol;
  399. tuple = (uint8_t *)input;
  400. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  401. tuple, sizeof(input));
  402. for (i = 0, j = HAL_FST_HASH_DATA_SIZE - 1;
  403. i < HAL_FST_HASH_KEY_SIZE_BYTES && j >= 0; i++, j--) {
  404. hash ^= fst->key_cache[i][tuple[j]];
  405. }
  406. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  407. "Hash value %u %u truncated hash %u\n", hash,
  408. (hash >> 12), (hash >> 12) % (fst->max_entries));
  409. hash >>= 12;
  410. hash &= (fst->max_entries - 1);
  411. return hash;
  412. }
  413. #else
  414. uint32_t
  415. hal_flow_toeplitz_hash(void *hal_fst, struct hal_rx_flow *flow)
  416. {
  417. return 0;
  418. }
  419. #endif
  420. qdf_export_symbol(hal_flow_toeplitz_hash);
  421. uint32_t hal_rx_get_hal_hash(struct hal_rx_fst *hal_fst, uint32_t flow_hash)
  422. {
  423. uint32_t trunc_hash = flow_hash;
  424. /* Take care of hash wrap around scenario */
  425. if (flow_hash >= hal_fst->max_entries)
  426. trunc_hash &= hal_fst->hash_mask;
  427. return trunc_hash;
  428. }
  429. qdf_export_symbol(hal_rx_get_hal_hash);
  430. QDF_STATUS
  431. hal_rx_insert_flow_entry(hal_soc_handle_t hal_soc,
  432. struct hal_rx_fst *fst, uint32_t flow_hash,
  433. void *flow_tuple_info, uint32_t *flow_idx)
  434. {
  435. int i;
  436. void *hal_fse = NULL;
  437. uint32_t hal_hash = 0;
  438. struct hal_flow_tuple_info hal_tuple_info = { 0 };
  439. for (i = 0; i < fst->max_skid_length; i++) {
  440. hal_hash = hal_rx_get_hal_hash(fst, (flow_hash + i));
  441. hal_fse = hal_rx_flow_get_tuple_info(hal_soc, fst, hal_hash,
  442. &hal_tuple_info);
  443. if (!hal_fse)
  444. break;
  445. /* Find the matching flow entry in HW FST */
  446. if (!qdf_mem_cmp(&hal_tuple_info,
  447. flow_tuple_info,
  448. sizeof(struct hal_flow_tuple_info))) {
  449. dp_err("Duplicate flow entry in FST %u at skid %u ",
  450. hal_hash, i);
  451. return QDF_STATUS_E_EXISTS;
  452. }
  453. }
  454. if (i == fst->max_skid_length) {
  455. dp_err("Max skid length reached for hash %u", flow_hash);
  456. return QDF_STATUS_E_RANGE;
  457. }
  458. *flow_idx = hal_hash;
  459. dp_info("flow_hash = %u, skid_entry = %d, flow_addr = %pK flow_idx = %d",
  460. flow_hash, i, hal_fse, *flow_idx);
  461. return QDF_STATUS_SUCCESS;
  462. }
  463. qdf_export_symbol(hal_rx_insert_flow_entry);
  464. QDF_STATUS
  465. hal_rx_find_flow_from_tuple(hal_soc_handle_t hal_soc_hdl,
  466. struct hal_rx_fst *fst, uint32_t flow_hash,
  467. void *flow_tuple_info, uint32_t *flow_idx)
  468. {
  469. int i;
  470. void *hal_fse = NULL;
  471. uint32_t hal_hash = 0;
  472. struct hal_flow_tuple_info hal_tuple_info = { 0 };
  473. for (i = 0; i < fst->max_skid_length; i++) {
  474. hal_hash = hal_rx_get_hal_hash(fst, (flow_hash + i));
  475. hal_fse = hal_rx_flow_get_tuple_info(hal_soc_hdl, fst, hal_hash,
  476. &hal_tuple_info);
  477. if (!hal_fse)
  478. continue;
  479. /* Find the matching flow entry in HW FST */
  480. if (!qdf_mem_cmp(&hal_tuple_info,
  481. flow_tuple_info,
  482. sizeof(struct hal_flow_tuple_info))) {
  483. break;
  484. }
  485. }
  486. if (i == fst->max_skid_length) {
  487. dp_err("Max skid length reached for hash %u", flow_hash);
  488. return QDF_STATUS_E_RANGE;
  489. }
  490. *flow_idx = hal_hash;
  491. dp_info("flow_hash = %u, skid_entry = %d, flow_addr = %pK flow_idx = %d",
  492. flow_hash, i, hal_fse, *flow_idx);
  493. return QDF_STATUS_SUCCESS;
  494. }
  495. qdf_export_symbol(hal_rx_find_flow_from_tuple);