msm_drv.c 55 KB

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  1. /*
  2. * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (C) 2013 Red Hat
  5. * Author: Rob Clark <[email protected]>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. /*
  20. * Copyright (c) 2016 Intel Corporation
  21. *
  22. * Permission to use, copy, modify, distribute, and sell this software and its
  23. * documentation for any purpose is hereby granted without fee, provided that
  24. * the above copyright notice appear in all copies and that both that copyright
  25. * notice and this permission notice appear in supporting documentation, and
  26. * that the name of the copyright holders not be used in advertising or
  27. * publicity pertaining to distribution of the software without specific,
  28. * written prior permission. The copyright holders make no representations
  29. * about the suitability of this software for any purpose. It is provided "as
  30. * is" without express or implied warranty.
  31. *
  32. * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  33. * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  34. * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  35. * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  36. * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  37. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  38. * OF THIS SOFTWARE.
  39. */
  40. #include <linux/of_address.h>
  41. #include <linux/kthread.h>
  42. #include <uapi/linux/sched/types.h>
  43. #include <drm/drm_of.h>
  44. #include <drm/drm_irq.h>
  45. #include <drm/drm_ioctl.h>
  46. #include <drm/drm_vblank.h>
  47. #include <drm/drm_drv.h>
  48. #include <drm/drm_auth.h>
  49. #include <drm/drm_probe_helper.h>
  50. #include "msm_drv.h"
  51. #include "msm_gem.h"
  52. #include "msm_kms.h"
  53. #include "msm_mmu.h"
  54. #include "sde_wb.h"
  55. #include "sde_dbg.h"
  56. /*
  57. * MSM driver version:
  58. * - 1.0.0 - initial interface
  59. * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
  60. * - 1.2.0 - adds explicit fence support for submit ioctl
  61. * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
  62. * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
  63. * MSM_GEM_INFO ioctl.
  64. * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
  65. * GEM object's debug name
  66. */
  67. #define MSM_VERSION_MAJOR 1
  68. #define MSM_VERSION_MINOR 4
  69. #define MSM_VERSION_PATCHLEVEL 0
  70. #define LASTCLOSE_TIMEOUT_MS 500
  71. #define msm_wait_event_timeout(waitq, cond, timeout_ms, ret) \
  72. do { \
  73. ktime_t cur_ktime; \
  74. ktime_t exp_ktime; \
  75. s64 wait_time_jiffies = msecs_to_jiffies(timeout_ms); \
  76. \
  77. exp_ktime = ktime_add_ms(ktime_get(), timeout_ms); \
  78. do { \
  79. ret = wait_event_timeout(waitq, cond, \
  80. wait_time_jiffies); \
  81. cur_ktime = ktime_get(); \
  82. } while ((!cond) && (ret == 0) && \
  83. (ktime_compare_safe(exp_ktime, cur_ktime) > 0));\
  84. } while (0)
  85. static DEFINE_MUTEX(msm_release_lock);
  86. static void msm_fb_output_poll_changed(struct drm_device *dev)
  87. {
  88. struct msm_drm_private *priv = NULL;
  89. if (!dev) {
  90. DRM_ERROR("output_poll_changed failed, invalid input\n");
  91. return;
  92. }
  93. priv = dev->dev_private;
  94. if (priv->fbdev)
  95. drm_fb_helper_hotplug_event(priv->fbdev);
  96. }
  97. static void msm_drm_display_thread_priority_worker(struct kthread_work *work)
  98. {
  99. int ret = 0;
  100. struct sched_param param = { 0 };
  101. struct task_struct *task = current->group_leader;
  102. /**
  103. * this priority was found during empiric testing to have appropriate
  104. * realtime scheduling to process display updates and interact with
  105. * other real time and normal priority task
  106. */
  107. param.sched_priority = 16;
  108. ret = sched_setscheduler(task, SCHED_FIFO, &param);
  109. if (ret)
  110. pr_warn("pid:%d name:%s priority update failed: %d\n",
  111. current->tgid, task->comm, ret);
  112. }
  113. /**
  114. * msm_atomic_helper_check - validate state object
  115. * @dev: DRM device
  116. * @state: the driver state object
  117. *
  118. * This is a wrapper for the drm_atomic_helper_check to check the modeset
  119. * and state checking for planes. Additionally it checks if any secure
  120. * transition(moving CRTC and planes between secure and non-secure states and
  121. * vice versa) is allowed or not. When going to secure state, planes
  122. * with fb_mode as dir translated only can be staged on the CRTC, and only one
  123. * CRTC should be active.
  124. * Also mixing of secure and non-secure is not allowed.
  125. *
  126. * RETURNS
  127. * Zero for success or -errorno.
  128. */
  129. int msm_atomic_check(struct drm_device *dev,
  130. struct drm_atomic_state *state)
  131. {
  132. struct msm_drm_private *priv;
  133. priv = dev->dev_private;
  134. if (priv && priv->kms && priv->kms->funcs &&
  135. priv->kms->funcs->atomic_check)
  136. return priv->kms->funcs->atomic_check(priv->kms, state);
  137. return drm_atomic_helper_check(dev, state);
  138. }
  139. static const struct drm_mode_config_funcs mode_config_funcs = {
  140. .fb_create = msm_framebuffer_create,
  141. .output_poll_changed = msm_fb_output_poll_changed,
  142. .atomic_check = msm_atomic_check,
  143. .atomic_commit = msm_atomic_commit,
  144. .atomic_state_alloc = msm_atomic_state_alloc,
  145. .atomic_state_clear = msm_atomic_state_clear,
  146. .atomic_state_free = msm_atomic_state_free,
  147. };
  148. static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
  149. .atomic_commit_tail = msm_atomic_commit_tail,
  150. };
  151. #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
  152. static bool reglog = false;
  153. MODULE_PARM_DESC(reglog, "Enable register read/write logging");
  154. module_param(reglog, bool, 0600);
  155. #else
  156. #define reglog 0
  157. #endif
  158. #ifdef CONFIG_DRM_FBDEV_EMULATION
  159. static bool fbdev = true;
  160. MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
  161. module_param(fbdev, bool, 0600);
  162. #endif
  163. static char *vram = "16m";
  164. MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
  165. module_param(vram, charp, 0);
  166. bool dumpstate = false;
  167. MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
  168. module_param(dumpstate, bool, 0600);
  169. static bool modeset = true;
  170. MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
  171. module_param(modeset, bool, 0600);
  172. /*
  173. * Util/helpers:
  174. */
  175. int msm_clk_bulk_get(struct device *dev, struct clk_bulk_data **bulk)
  176. {
  177. struct property *prop;
  178. const char *name;
  179. struct clk_bulk_data *local;
  180. int i = 0, ret, count;
  181. count = of_property_count_strings(dev->of_node, "clock-names");
  182. if (count < 1)
  183. return 0;
  184. local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
  185. count, GFP_KERNEL);
  186. if (!local)
  187. return -ENOMEM;
  188. of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
  189. local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
  190. if (!local[i].id) {
  191. devm_kfree(dev, local);
  192. return -ENOMEM;
  193. }
  194. i++;
  195. }
  196. ret = devm_clk_bulk_get(dev, count, local);
  197. if (ret) {
  198. for (i = 0; i < count; i++)
  199. devm_kfree(dev, (void *) local[i].id);
  200. devm_kfree(dev, local);
  201. return ret;
  202. }
  203. *bulk = local;
  204. return count;
  205. }
  206. struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
  207. const char *name)
  208. {
  209. int i;
  210. char n[32];
  211. snprintf(n, sizeof(n), "%s_clk", name);
  212. for (i = 0; bulk && i < count; i++) {
  213. if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
  214. return bulk[i].clk;
  215. }
  216. return NULL;
  217. }
  218. struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
  219. {
  220. struct clk *clk;
  221. char name2[32];
  222. clk = devm_clk_get(&pdev->dev, name);
  223. if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
  224. return clk;
  225. snprintf(name2, sizeof(name2), "%s_clk", name);
  226. clk = devm_clk_get(&pdev->dev, name2);
  227. if (!IS_ERR(clk))
  228. dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
  229. "\"%s\" instead of \"%s\"\n", name, name2);
  230. return clk;
  231. }
  232. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  233. const char *dbgname)
  234. {
  235. struct resource *res;
  236. unsigned long size;
  237. void __iomem *ptr;
  238. if (name)
  239. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  240. else
  241. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  242. if (!res) {
  243. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  244. name);
  245. return ERR_PTR(-EINVAL);
  246. }
  247. size = resource_size(res);
  248. ptr = devm_ioremap(&pdev->dev, res->start, size);
  249. if (!ptr) {
  250. dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
  251. return ERR_PTR(-ENOMEM);
  252. }
  253. if (reglog)
  254. dev_dbg(&pdev->dev, "IO:region %s %pK %08lx\n",
  255. dbgname, ptr, size);
  256. return ptr;
  257. }
  258. unsigned long msm_iomap_size(struct platform_device *pdev, const char *name)
  259. {
  260. struct resource *res;
  261. if (name)
  262. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  263. else
  264. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  265. if (!res) {
  266. dev_dbg(&pdev->dev, "failed to get memory resource: %s\n",
  267. name);
  268. return 0;
  269. }
  270. return resource_size(res);
  271. }
  272. unsigned long msm_get_phys_addr(struct platform_device *pdev, const char *name)
  273. {
  274. struct resource *res;
  275. if (!name) {
  276. dev_err(&pdev->dev, "invalid block name\n");
  277. return 0;
  278. }
  279. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
  280. if (!res) {
  281. dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
  282. return 0;
  283. }
  284. return res->start;
  285. }
  286. void msm_iounmap(struct platform_device *pdev, void __iomem *addr)
  287. {
  288. devm_iounmap(&pdev->dev, addr);
  289. }
  290. void msm_writel(u32 data, void __iomem *addr)
  291. {
  292. if (reglog)
  293. pr_debug("IO:W %pK %08x\n", addr, data);
  294. writel(data, addr);
  295. }
  296. u32 msm_readl(const void __iomem *addr)
  297. {
  298. u32 val = readl(addr);
  299. if (reglog)
  300. pr_err("IO:R %pK %08x\n", addr, val);
  301. return val;
  302. }
  303. int msm_get_src_bpc(int chroma_format,
  304. int bpc)
  305. {
  306. int src_bpp;
  307. switch (chroma_format) {
  308. case MSM_CHROMA_444:
  309. src_bpp = bpc * 3;
  310. break;
  311. case MSM_CHROMA_422:
  312. src_bpp = bpc * 2;
  313. break;
  314. case MSM_CHROMA_420:
  315. src_bpp = mult_frac(bpc, 3, 2);
  316. break;
  317. default:
  318. src_bpp = bpc * 3;
  319. break;
  320. }
  321. return src_bpp;
  322. }
  323. static int msm_drm_uninit(struct device *dev)
  324. {
  325. struct platform_device *pdev = to_platform_device(dev);
  326. struct drm_device *ddev = platform_get_drvdata(pdev);
  327. struct msm_drm_private *priv = ddev->dev_private;
  328. struct msm_kms *kms = priv->kms;
  329. struct msm_vm_client_entry *client_entry, *tmp;
  330. int i;
  331. flush_workqueue(priv->wq);
  332. pm_runtime_get_sync(dev);
  333. /* clean up display commit/event worker threads */
  334. for (i = 0; i < priv->num_crtcs; i++) {
  335. if (priv->disp_thread[i].thread) {
  336. kthread_flush_worker(&priv->disp_thread[i].worker);
  337. kthread_stop(priv->disp_thread[i].thread);
  338. priv->disp_thread[i].thread = NULL;
  339. }
  340. if (priv->event_thread[i].thread) {
  341. kthread_flush_worker(&priv->event_thread[i].worker);
  342. kthread_stop(priv->event_thread[i].thread);
  343. priv->event_thread[i].thread = NULL;
  344. }
  345. }
  346. drm_kms_helper_poll_fini(ddev);
  347. if (kms && kms->funcs)
  348. kms->funcs->debugfs_destroy(kms);
  349. sde_dbg_destroy();
  350. debugfs_remove_recursive(priv->debug_root);
  351. drm_mode_config_cleanup(ddev);
  352. if (priv->registered) {
  353. drm_dev_unregister(ddev);
  354. priv->registered = false;
  355. }
  356. #ifdef CONFIG_DRM_FBDEV_EMULATION
  357. if (fbdev && priv->fbdev)
  358. msm_fbdev_free(ddev);
  359. #endif
  360. drm_atomic_helper_shutdown(ddev);
  361. drm_irq_uninstall(ddev);
  362. if (kms && kms->funcs) {
  363. kms->funcs->destroy(kms);
  364. priv->kms = NULL;
  365. }
  366. if (priv->vram.paddr) {
  367. unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
  368. drm_mm_takedown(&priv->vram.mm);
  369. dma_free_attrs(dev, priv->vram.size, NULL,
  370. priv->vram.paddr, attrs);
  371. }
  372. component_unbind_all(dev, ddev);
  373. pm_runtime_put_sync(dev);
  374. sde_power_resource_deinit(pdev, &priv->phandle);
  375. mutex_lock(&priv->vm_client_lock);
  376. /* clean up any unregistered clients */
  377. list_for_each_entry_safe(client_entry, tmp, &priv->vm_client_list,
  378. list) {
  379. list_del(&client_entry->list);
  380. kfree(client_entry);
  381. }
  382. mutex_unlock(&priv->vm_client_lock);
  383. msm_mdss_destroy(ddev);
  384. ddev->dev_private = NULL;
  385. destroy_workqueue(priv->wq);
  386. kfree(priv);
  387. drm_dev_put(ddev);
  388. return 0;
  389. }
  390. #define KMS_MDP4 4
  391. #define KMS_MDP5 5
  392. #define KMS_SDE 3
  393. static int get_mdp_ver(struct platform_device *pdev)
  394. {
  395. #ifdef CONFIG_OF
  396. static const struct of_device_id match_types[] = { {
  397. .compatible = "qcom,mdss_mdp",
  398. .data = (void *)KMS_MDP5,
  399. },
  400. {
  401. .compatible = "qcom,sde-kms",
  402. .data = (void *)KMS_SDE,
  403. },
  404. {},
  405. };
  406. struct device *dev = &pdev->dev;
  407. const struct of_device_id *match;
  408. match = of_match_node(match_types, dev->of_node);
  409. if (match)
  410. return (int)(unsigned long)match->data;
  411. #endif
  412. return KMS_MDP4;
  413. }
  414. static int msm_init_vram(struct drm_device *dev)
  415. {
  416. struct msm_drm_private *priv = dev->dev_private;
  417. struct device_node *node;
  418. unsigned long size = 0;
  419. int ret = 0;
  420. /* In the device-tree world, we could have a 'memory-region'
  421. * phandle, which gives us a link to our "vram". Allocating
  422. * is all nicely abstracted behind the dma api, but we need
  423. * to know the entire size to allocate it all in one go. There
  424. * are two cases:
  425. * 1) device with no IOMMU, in which case we need exclusive
  426. * access to a VRAM carveout big enough for all gpu
  427. * buffers
  428. * 2) device with IOMMU, but where the bootloader puts up
  429. * a splash screen. In this case, the VRAM carveout
  430. * need only be large enough for fbdev fb. But we need
  431. * exclusive access to the buffer to avoid the kernel
  432. * using those pages for other purposes (which appears
  433. * as corruption on screen before we have a chance to
  434. * load and do initial modeset)
  435. */
  436. node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
  437. if (node) {
  438. struct resource r;
  439. ret = of_address_to_resource(node, 0, &r);
  440. of_node_put(node);
  441. if (ret)
  442. return ret;
  443. size = r.end - r.start;
  444. DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
  445. /* if we have no IOMMU, then we need to use carveout allocator.
  446. * Grab the entire CMA chunk carved out in early startup in
  447. * mach-msm:
  448. */
  449. } else if (!iommu_present(&platform_bus_type)) {
  450. u32 vram_size;
  451. ret = of_property_read_u32(dev->dev->of_node,
  452. "qcom,vram-size", &vram_size);
  453. size = (ret < 0) ? memparse(vram, NULL) : vram_size;
  454. DRM_INFO("using 0x%lx VRAM carveout\n", size);
  455. ret = 0;
  456. }
  457. if (size) {
  458. unsigned long attrs = 0;
  459. void *p;
  460. priv->vram.size = size;
  461. drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
  462. spin_lock_init(&priv->vram.lock);
  463. attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
  464. attrs |= DMA_ATTR_WRITE_COMBINE;
  465. /* note that for no-kernel-mapping, the vaddr returned
  466. * is bogus, but non-null if allocation succeeded:
  467. */
  468. p = dma_alloc_attrs(dev->dev, size,
  469. &priv->vram.paddr, GFP_KERNEL, attrs);
  470. if (!p) {
  471. dev_err(dev->dev, "failed to allocate VRAM\n");
  472. priv->vram.paddr = 0;
  473. return -ENOMEM;
  474. }
  475. dev_info(dev->dev, "VRAM: %08x->%08x\n",
  476. (uint32_t)priv->vram.paddr,
  477. (uint32_t)(priv->vram.paddr + size));
  478. }
  479. return ret;
  480. }
  481. #ifdef CONFIG_OF
  482. static int msm_component_bind_all(struct device *dev,
  483. struct drm_device *drm_dev)
  484. {
  485. int ret;
  486. ret = component_bind_all(dev, drm_dev);
  487. if (ret)
  488. DRM_ERROR("component_bind_all failed: %d\n", ret);
  489. return ret;
  490. }
  491. #else
  492. static int msm_component_bind_all(struct device *dev,
  493. struct drm_device *drm_dev)
  494. {
  495. return 0;
  496. }
  497. #endif
  498. static int msm_drm_display_thread_create(struct msm_drm_private *priv, struct drm_device *ddev,
  499. struct device *dev)
  500. {
  501. int i, ret = 0;
  502. for (i = 0; i < priv->num_crtcs; i++) {
  503. /* initialize display thread */
  504. priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
  505. kthread_init_worker(&priv->disp_thread[i].worker);
  506. priv->disp_thread[i].dev = ddev;
  507. priv->disp_thread[i].thread =
  508. kthread_run(kthread_worker_fn,
  509. &priv->disp_thread[i].worker,
  510. "crtc_commit:%d", priv->disp_thread[i].crtc_id);
  511. kthread_init_work(&priv->thread_priority_work,
  512. msm_drm_display_thread_priority_worker);
  513. kthread_queue_work(&priv->disp_thread[i].worker, &priv->thread_priority_work);
  514. kthread_flush_work(&priv->thread_priority_work);
  515. if (IS_ERR(priv->disp_thread[i].thread)) {
  516. dev_err(dev, "failed to create crtc_commit kthread\n");
  517. priv->disp_thread[i].thread = NULL;
  518. }
  519. /* initialize event thread */
  520. priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
  521. kthread_init_worker(&priv->event_thread[i].worker);
  522. priv->event_thread[i].dev = ddev;
  523. priv->event_thread[i].thread =
  524. kthread_run(kthread_worker_fn,
  525. &priv->event_thread[i].worker,
  526. "crtc_event:%d", priv->event_thread[i].crtc_id);
  527. /**
  528. * event thread should also run at same priority as disp_thread
  529. * because it is handling frame_done events. A lower priority
  530. * event thread and higher priority disp_thread can causes
  531. * frame_pending counters beyond 2. This can lead to commit
  532. * failure at crtc commit level.
  533. */
  534. kthread_init_work(&priv->thread_priority_work,
  535. msm_drm_display_thread_priority_worker);
  536. kthread_queue_work(&priv->event_thread[i].worker, &priv->thread_priority_work);
  537. kthread_flush_work(&priv->thread_priority_work);
  538. if (IS_ERR(priv->event_thread[i].thread)) {
  539. dev_err(dev, "failed to create crtc_event kthread\n");
  540. priv->event_thread[i].thread = NULL;
  541. }
  542. if ((!priv->disp_thread[i].thread) ||
  543. !priv->event_thread[i].thread) {
  544. /* clean up previously created threads if any */
  545. for ( ; i >= 0; i--) {
  546. if (priv->disp_thread[i].thread) {
  547. kthread_stop(
  548. priv->disp_thread[i].thread);
  549. priv->disp_thread[i].thread = NULL;
  550. }
  551. if (priv->event_thread[i].thread) {
  552. kthread_stop(
  553. priv->event_thread[i].thread);
  554. priv->event_thread[i].thread = NULL;
  555. }
  556. }
  557. return -EINVAL;
  558. }
  559. }
  560. /**
  561. * Since pp interrupt is heavy weight, try to queue the work
  562. * into a dedicated worker thread, so that they dont interrupt
  563. * other important events.
  564. */
  565. kthread_init_worker(&priv->pp_event_worker);
  566. priv->pp_event_thread = kthread_run(kthread_worker_fn,
  567. &priv->pp_event_worker, "pp_event");
  568. kthread_init_work(&priv->thread_priority_work, msm_drm_display_thread_priority_worker);
  569. kthread_queue_work(&priv->pp_event_worker, &priv->thread_priority_work);
  570. kthread_flush_work(&priv->thread_priority_work);
  571. if (IS_ERR(priv->pp_event_thread)) {
  572. dev_err(dev, "failed to create pp_event kthread\n");
  573. ret = PTR_ERR(priv->pp_event_thread);
  574. priv->pp_event_thread = NULL;
  575. return ret;
  576. }
  577. return 0;
  578. }
  579. static struct msm_kms *_msm_drm_component_init_helper(
  580. struct msm_drm_private *priv,
  581. struct drm_device *ddev, struct device *dev,
  582. struct platform_device *pdev)
  583. {
  584. int ret;
  585. struct msm_kms *kms;
  586. switch (get_mdp_ver(pdev)) {
  587. case KMS_MDP4:
  588. kms = mdp4_kms_init(ddev);
  589. break;
  590. case KMS_MDP5:
  591. kms = mdp5_kms_init(ddev);
  592. break;
  593. case KMS_SDE:
  594. kms = sde_kms_init(ddev);
  595. break;
  596. default:
  597. kms = ERR_PTR(-ENODEV);
  598. break;
  599. }
  600. if (IS_ERR_OR_NULL(kms)) {
  601. /*
  602. * NOTE: once we have GPU support, having no kms should not
  603. * be considered fatal.. ideally we would still support gpu
  604. * and (for example) use dmabuf/prime to share buffers with
  605. * imx drm driver on iMX5
  606. */
  607. dev_err(dev, "failed to load kms\n");
  608. return kms;
  609. }
  610. priv->kms = kms;
  611. /**
  612. * Since kms->funcs->hw_init(kms) might call
  613. * drm_object_property_set_value to initialize some custom
  614. * properties we need to make sure mode_config.funcs are populated
  615. * beforehand to avoid dereferencing an unset value during the
  616. * drm_drv_uses_atomic_modeset check.
  617. */
  618. ddev->mode_config.funcs = &mode_config_funcs;
  619. ret = (kms)->funcs->hw_init(kms);
  620. if (ret) {
  621. dev_err(dev, "kms hw init failed: %d\n", ret);
  622. return ERR_PTR(ret);
  623. }
  624. return kms;
  625. }
  626. static int msm_drm_device_init(struct platform_device *pdev,
  627. struct drm_driver *drv)
  628. {
  629. struct device *dev = &pdev->dev;
  630. struct drm_device *ddev;
  631. struct msm_drm_private *priv;
  632. int i, ret;
  633. ddev = drm_dev_alloc(drv, dev);
  634. if (IS_ERR(ddev)) {
  635. dev_err(dev, "failed to allocate drm_device\n");
  636. return PTR_ERR(ddev);
  637. }
  638. drm_mode_config_init(ddev);
  639. platform_set_drvdata(pdev, ddev);
  640. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  641. if (!priv) {
  642. ret = -ENOMEM;
  643. goto priv_alloc_fail;
  644. }
  645. ddev->dev_private = priv;
  646. priv->dev = ddev;
  647. ret = sde_power_resource_init(pdev, &priv->phandle);
  648. if (ret) {
  649. pr_err("sde power resource init failed\n");
  650. goto power_init_fail;
  651. }
  652. ret = sde_dbg_init(&pdev->dev);
  653. if (ret) {
  654. dev_err(dev, "failed to init sde dbg: %d\n", ret);
  655. goto dbg_init_fail;
  656. }
  657. pm_runtime_enable(dev);
  658. ret = pm_runtime_get_sync(dev);
  659. if (ret < 0) {
  660. dev_err(dev, "resource enable failed: %d\n", ret);
  661. goto pm_runtime_error;
  662. }
  663. for (i = 0; i < SDE_POWER_HANDLE_DBUS_ID_MAX; i++)
  664. sde_power_data_bus_set_quota(&priv->phandle, i,
  665. SDE_POWER_HANDLE_CONT_SPLASH_BUS_AB_QUOTA,
  666. SDE_POWER_HANDLE_CONT_SPLASH_BUS_IB_QUOTA);
  667. return ret;
  668. pm_runtime_error:
  669. sde_dbg_destroy();
  670. dbg_init_fail:
  671. sde_power_resource_deinit(pdev, &priv->phandle);
  672. power_init_fail:
  673. priv_alloc_fail:
  674. drm_dev_put(ddev);
  675. kfree(priv);
  676. return ret;
  677. }
  678. static int msm_drm_component_init(struct device *dev)
  679. {
  680. struct platform_device *pdev = to_platform_device(dev);
  681. struct drm_device *ddev = platform_get_drvdata(pdev);
  682. struct msm_drm_private *priv = ddev->dev_private;
  683. struct msm_kms *kms = NULL;
  684. int ret;
  685. struct drm_crtc *crtc;
  686. ret = msm_mdss_init(ddev);
  687. if (ret)
  688. goto mdss_init_fail;
  689. priv->wq = alloc_ordered_workqueue("msm_drm", 0);
  690. init_waitqueue_head(&priv->pending_crtcs_event);
  691. INIT_LIST_HEAD(&priv->client_event_list);
  692. INIT_LIST_HEAD(&priv->inactive_list);
  693. INIT_LIST_HEAD(&priv->vm_client_list);
  694. mutex_init(&priv->mm_lock);
  695. mutex_init(&priv->vm_client_lock);
  696. /* Bind all our sub-components: */
  697. ret = msm_component_bind_all(dev, ddev);
  698. if (ret)
  699. goto bind_fail;
  700. ret = msm_init_vram(ddev);
  701. if (ret)
  702. goto fail;
  703. ddev->mode_config.funcs = &mode_config_funcs;
  704. ddev->mode_config.helper_private = &mode_config_helper_funcs;
  705. kms = _msm_drm_component_init_helper(priv, ddev, dev, pdev);
  706. if (IS_ERR_OR_NULL(kms)) {
  707. dev_err(dev, "msm_drm_component_init_helper failed\n");
  708. goto fail;
  709. }
  710. /* Register rotator platform driver only after genpd init */
  711. sde_rotator_register();
  712. sde_rotator_smmu_driver_register();
  713. ret = msm_drm_display_thread_create(priv, ddev, dev);
  714. if (ret) {
  715. dev_err(dev, "msm_drm_display_thread_create failed\n");
  716. goto fail;
  717. }
  718. ret = drm_vblank_init(ddev, priv->num_crtcs);
  719. if (ret < 0) {
  720. dev_err(dev, "failed to initialize vblank\n");
  721. goto fail;
  722. }
  723. drm_for_each_crtc(crtc, ddev)
  724. drm_crtc_vblank_reset(crtc);
  725. if (kms) {
  726. pm_runtime_get_sync(dev);
  727. ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
  728. pm_runtime_put_sync(dev);
  729. if (ret < 0) {
  730. dev_err(dev, "failed to install IRQ handler\n");
  731. goto fail;
  732. }
  733. }
  734. drm_mode_config_reset(ddev);
  735. ret = drm_dev_register(ddev, 0);
  736. if (ret)
  737. goto fail;
  738. priv->registered = true;
  739. if (kms && kms->funcs && kms->funcs->cont_splash_config) {
  740. ret = kms->funcs->cont_splash_config(kms, NULL);
  741. if (ret) {
  742. dev_err(dev, "kms cont_splash config failed.\n");
  743. goto fail;
  744. }
  745. }
  746. #ifdef CONFIG_DRM_FBDEV_EMULATION
  747. if (fbdev)
  748. priv->fbdev = msm_fbdev_init(ddev);
  749. #endif
  750. /* create drm client only when fbdev is not supported */
  751. if (!priv->fbdev) {
  752. ret = drm_client_init(ddev, &kms->client, "kms_client", NULL);
  753. if (ret) {
  754. DRM_ERROR("failed to init kms_client: %d\n", ret);
  755. kms->client.dev = NULL;
  756. goto fail;
  757. }
  758. drm_client_register(&kms->client);
  759. }
  760. ret = sde_dbg_debugfs_register(dev);
  761. if (ret) {
  762. dev_err(dev, "failed to reg sde dbg debugfs: %d\n", ret);
  763. goto fail;
  764. }
  765. /* perform subdriver post initialization */
  766. if (kms && kms->funcs && kms->funcs->postinit) {
  767. ret = kms->funcs->postinit(kms);
  768. if (ret) {
  769. pr_err("kms post init failed: %d\n", ret);
  770. goto fail;
  771. }
  772. }
  773. drm_kms_helper_poll_init(ddev);
  774. return 0;
  775. fail:
  776. msm_drm_uninit(dev);
  777. return ret;
  778. bind_fail:
  779. msm_mdss_destroy(ddev);
  780. mdss_init_fail:
  781. sde_dbg_destroy();
  782. sde_power_resource_deinit(pdev, &priv->phandle);
  783. drm_dev_put(ddev);
  784. kfree(priv);
  785. return ret;
  786. }
  787. /*
  788. * DRM operations:
  789. */
  790. static int context_init(struct drm_device *dev, struct drm_file *file)
  791. {
  792. struct msm_file_private *ctx;
  793. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  794. if (!ctx)
  795. return -ENOMEM;
  796. mutex_init(&ctx->power_lock);
  797. file->driver_priv = ctx;
  798. if (dev && dev->dev_private) {
  799. struct msm_drm_private *priv = dev->dev_private;
  800. struct msm_kms *kms;
  801. kms = priv->kms;
  802. if (kms && kms->funcs && kms->funcs->postopen)
  803. kms->funcs->postopen(kms, file);
  804. }
  805. return 0;
  806. }
  807. static int msm_open(struct drm_device *dev, struct drm_file *file)
  808. {
  809. return context_init(dev, file);
  810. }
  811. static void context_close(struct msm_file_private *ctx)
  812. {
  813. kfree(ctx);
  814. }
  815. static void msm_preclose(struct drm_device *dev, struct drm_file *file)
  816. {
  817. struct msm_drm_private *priv = dev->dev_private;
  818. struct msm_kms *kms = priv->kms;
  819. if (kms && kms->funcs && kms->funcs->preclose)
  820. kms->funcs->preclose(kms, file);
  821. }
  822. static void msm_postclose(struct drm_device *dev, struct drm_file *file)
  823. {
  824. struct msm_drm_private *priv = dev->dev_private;
  825. struct msm_file_private *ctx = file->driver_priv;
  826. struct msm_kms *kms = priv->kms;
  827. if (!kms)
  828. return;
  829. if (kms->funcs && kms->funcs->postclose)
  830. kms->funcs->postclose(kms, file);
  831. mutex_lock(&dev->struct_mutex);
  832. if (ctx == priv->lastctx)
  833. priv->lastctx = NULL;
  834. mutex_unlock(&dev->struct_mutex);
  835. mutex_lock(&ctx->power_lock);
  836. if (ctx->enable_refcnt) {
  837. SDE_EVT32(ctx->enable_refcnt);
  838. pm_runtime_put_sync(dev->dev);
  839. }
  840. mutex_unlock(&ctx->power_lock);
  841. context_close(ctx);
  842. }
  843. static void msm_lastclose(struct drm_device *dev)
  844. {
  845. struct msm_drm_private *priv = dev->dev_private;
  846. struct msm_kms *kms;
  847. int i, rc;
  848. if (!priv || !priv->kms)
  849. return;
  850. kms = priv->kms;
  851. /* check for splash status before triggering cleanup
  852. * if we end up here with splash status ON i.e before first
  853. * commit then ignore the last close call
  854. */
  855. if (kms->funcs && kms->funcs->check_for_splash
  856. && kms->funcs->check_for_splash(kms))
  857. return;
  858. /*
  859. * clean up vblank disable immediately as this is the last close.
  860. */
  861. for (i = 0; i < dev->num_crtcs; i++) {
  862. struct drm_vblank_crtc *vblank = &dev->vblank[i];
  863. struct timer_list *disable_timer = &vblank->disable_timer;
  864. if (del_timer_sync(disable_timer))
  865. disable_timer->function(disable_timer);
  866. }
  867. /* wait for pending vblank requests to be executed by worker thread */
  868. flush_workqueue(priv->wq);
  869. /* wait for any pending crtcs to finish before lastclose commit */
  870. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  871. LASTCLOSE_TIMEOUT_MS, rc);
  872. if (!rc)
  873. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  874. priv->pending_crtcs);
  875. if (priv->fbdev) {
  876. rc = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
  877. if (rc)
  878. DRM_ERROR("restore FBDEV mode failed: %d\n", rc);
  879. } else if (kms && kms->client.dev) {
  880. rc = drm_client_modeset_commit_locked(&kms->client);
  881. if (rc)
  882. DRM_ERROR("client modeset commit failed: %d\n", rc);
  883. }
  884. /* wait again, before kms driver does it's lastclose commit */
  885. msm_wait_event_timeout(priv->pending_crtcs_event, !priv->pending_crtcs,
  886. LASTCLOSE_TIMEOUT_MS, rc);
  887. if (!rc)
  888. DRM_INFO("wait for crtc mask 0x%x failed, commit anyway...\n",
  889. priv->pending_crtcs);
  890. if (kms->funcs && kms->funcs->lastclose)
  891. kms->funcs->lastclose(kms);
  892. }
  893. static irqreturn_t msm_irq(int irq, void *arg)
  894. {
  895. struct drm_device *dev = arg;
  896. struct msm_drm_private *priv = dev->dev_private;
  897. struct msm_kms *kms = priv->kms;
  898. BUG_ON(!kms);
  899. return kms->funcs->irq(kms);
  900. }
  901. static void msm_irq_preinstall(struct drm_device *dev)
  902. {
  903. struct msm_drm_private *priv = dev->dev_private;
  904. struct msm_kms *kms = priv->kms;
  905. BUG_ON(!kms);
  906. kms->funcs->irq_preinstall(kms);
  907. }
  908. static int msm_irq_postinstall(struct drm_device *dev)
  909. {
  910. struct msm_drm_private *priv = dev->dev_private;
  911. struct msm_kms *kms = priv->kms;
  912. BUG_ON(!kms);
  913. if (kms->funcs->irq_postinstall)
  914. return kms->funcs->irq_postinstall(kms);
  915. return 0;
  916. }
  917. static void msm_irq_uninstall(struct drm_device *dev)
  918. {
  919. struct msm_drm_private *priv = dev->dev_private;
  920. struct msm_kms *kms = priv->kms;
  921. BUG_ON(!kms);
  922. kms->funcs->irq_uninstall(kms);
  923. }
  924. /*
  925. * DRM ioctls:
  926. */
  927. static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
  928. struct drm_file *file)
  929. {
  930. struct drm_msm_gem_new *args = data;
  931. if (args->flags & ~MSM_BO_FLAGS) {
  932. DRM_ERROR("invalid flags: %08x\n", args->flags);
  933. return -EINVAL;
  934. }
  935. return msm_gem_new_handle(dev, file, args->size,
  936. args->flags, &args->handle, NULL);
  937. }
  938. static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
  939. {
  940. return ktime_set(timeout.tv_sec, timeout.tv_nsec);
  941. }
  942. static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  943. struct drm_file *file)
  944. {
  945. struct drm_msm_gem_cpu_prep *args = data;
  946. struct drm_gem_object *obj;
  947. ktime_t timeout = to_ktime(args->timeout);
  948. int ret;
  949. if (args->op & ~MSM_PREP_FLAGS) {
  950. DRM_ERROR("invalid op: %08x\n", args->op);
  951. return -EINVAL;
  952. }
  953. obj = drm_gem_object_lookup(file, args->handle);
  954. if (!obj)
  955. return -ENOENT;
  956. ret = msm_gem_cpu_prep(obj, args->op, &timeout);
  957. drm_gem_object_put(obj);
  958. return ret;
  959. }
  960. static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  961. struct drm_file *file)
  962. {
  963. struct drm_msm_gem_cpu_fini *args = data;
  964. struct drm_gem_object *obj;
  965. int ret;
  966. obj = drm_gem_object_lookup(file, args->handle);
  967. if (!obj)
  968. return -ENOENT;
  969. ret = msm_gem_cpu_fini(obj);
  970. drm_gem_object_put(obj);
  971. return ret;
  972. }
  973. static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
  974. struct drm_file *file)
  975. {
  976. struct drm_msm_gem_madvise *args = data;
  977. struct drm_gem_object *obj;
  978. int ret;
  979. switch (args->madv) {
  980. case MSM_MADV_DONTNEED:
  981. case MSM_MADV_WILLNEED:
  982. break;
  983. default:
  984. return -EINVAL;
  985. }
  986. ret = mutex_lock_interruptible(&dev->struct_mutex);
  987. if (ret)
  988. return ret;
  989. obj = drm_gem_object_lookup(file, args->handle);
  990. if (!obj) {
  991. ret = -ENOENT;
  992. goto unlock;
  993. }
  994. ret = msm_gem_madvise(obj, args->madv);
  995. if (ret >= 0) {
  996. args->retained = ret;
  997. ret = 0;
  998. }
  999. drm_gem_object_put(obj);
  1000. unlock:
  1001. mutex_unlock(&dev->struct_mutex);
  1002. return ret;
  1003. }
  1004. static int msm_drm_object_supports_event(struct drm_device *dev,
  1005. struct drm_msm_event_req *req)
  1006. {
  1007. int ret = -EINVAL;
  1008. struct drm_mode_object *arg_obj;
  1009. arg_obj = drm_mode_object_find(dev, NULL, req->object_id,
  1010. req->object_type);
  1011. if (!arg_obj)
  1012. return -ENOENT;
  1013. switch (arg_obj->type) {
  1014. case DRM_MODE_OBJECT_CRTC:
  1015. case DRM_MODE_OBJECT_CONNECTOR:
  1016. ret = 0;
  1017. break;
  1018. default:
  1019. ret = -EOPNOTSUPP;
  1020. break;
  1021. }
  1022. drm_mode_object_put(arg_obj);
  1023. return ret;
  1024. }
  1025. static int msm_register_event(struct drm_device *dev,
  1026. struct drm_msm_event_req *req, struct drm_file *file, bool en)
  1027. {
  1028. int ret = -EINVAL;
  1029. struct msm_drm_private *priv = dev->dev_private;
  1030. struct msm_kms *kms = priv->kms;
  1031. struct drm_mode_object *arg_obj;
  1032. arg_obj = drm_mode_object_find(dev, file, req->object_id,
  1033. req->object_type);
  1034. if (!arg_obj)
  1035. return -ENOENT;
  1036. ret = kms->funcs->register_events(kms, arg_obj, req->event, en);
  1037. drm_mode_object_put(arg_obj);
  1038. return ret;
  1039. }
  1040. static int msm_event_client_count(struct drm_device *dev,
  1041. struct drm_msm_event_req *req_event, bool locked)
  1042. {
  1043. struct msm_drm_private *priv = dev->dev_private;
  1044. unsigned long flag = 0;
  1045. struct msm_drm_event *node;
  1046. int count = 0;
  1047. if (!locked)
  1048. spin_lock_irqsave(&dev->event_lock, flag);
  1049. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1050. if (node->event.base.type == req_event->event &&
  1051. node->event.info.object_id == req_event->object_id)
  1052. count++;
  1053. }
  1054. if (!locked)
  1055. spin_unlock_irqrestore(&dev->event_lock, flag);
  1056. return count;
  1057. }
  1058. static int msm_ioctl_register_event(struct drm_device *dev, void *data,
  1059. struct drm_file *file)
  1060. {
  1061. struct msm_drm_private *priv = dev->dev_private;
  1062. struct drm_msm_event_req *req_event = data;
  1063. struct msm_drm_event *client, *node;
  1064. unsigned long flag = 0;
  1065. bool dup_request = false;
  1066. int ret = 0, count = 0;
  1067. ret = msm_drm_object_supports_event(dev, req_event);
  1068. if (ret) {
  1069. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1070. req_event->event, req_event->object_type,
  1071. req_event->object_id);
  1072. return ret;
  1073. }
  1074. spin_lock_irqsave(&dev->event_lock, flag);
  1075. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1076. if (node->base.file_priv != file)
  1077. continue;
  1078. if (node->event.base.type == req_event->event &&
  1079. node->event.info.object_id == req_event->object_id) {
  1080. DRM_DEBUG("duplicate request for event %x obj id %d\n",
  1081. node->event.base.type,
  1082. node->event.info.object_id);
  1083. dup_request = true;
  1084. break;
  1085. }
  1086. }
  1087. spin_unlock_irqrestore(&dev->event_lock, flag);
  1088. if (dup_request)
  1089. return -EALREADY;
  1090. client = kzalloc(sizeof(*client), GFP_KERNEL);
  1091. if (!client)
  1092. return -ENOMEM;
  1093. client->base.file_priv = file;
  1094. client->base.event = &client->event.base;
  1095. client->event.base.type = req_event->event;
  1096. memcpy(&client->event.info, req_event, sizeof(client->event.info));
  1097. /* Get the count of clients that have registered for event.
  1098. * Event should be enabled for first client, for subsequent enable
  1099. * calls add to client list and return.
  1100. */
  1101. count = msm_event_client_count(dev, req_event, false);
  1102. if (count) {
  1103. /* Add current client to list */
  1104. spin_lock_irqsave(&dev->event_lock, flag);
  1105. list_add_tail(&client->base.link, &priv->client_event_list);
  1106. spin_unlock_irqrestore(&dev->event_lock, flag);
  1107. return 0;
  1108. }
  1109. ret = msm_register_event(dev, req_event, file, true);
  1110. if (ret) {
  1111. DRM_ERROR("failed to enable event %x object %x object id %d\n",
  1112. req_event->event, req_event->object_type,
  1113. req_event->object_id);
  1114. kfree(client);
  1115. } else {
  1116. /* Add current client to list */
  1117. spin_lock_irqsave(&dev->event_lock, flag);
  1118. list_add_tail(&client->base.link, &priv->client_event_list);
  1119. spin_unlock_irqrestore(&dev->event_lock, flag);
  1120. }
  1121. return ret;
  1122. }
  1123. static int msm_ioctl_deregister_event(struct drm_device *dev, void *data,
  1124. struct drm_file *file)
  1125. {
  1126. struct msm_drm_private *priv = dev->dev_private;
  1127. struct drm_msm_event_req *req_event = data;
  1128. struct msm_drm_event *client = NULL, *node, *temp;
  1129. unsigned long flag = 0;
  1130. int count = 0;
  1131. bool found = false;
  1132. int ret = 0;
  1133. ret = msm_drm_object_supports_event(dev, req_event);
  1134. if (ret) {
  1135. DRM_ERROR("unsupported event %x object %x object id %d\n",
  1136. req_event->event, req_event->object_type,
  1137. req_event->object_id);
  1138. return ret;
  1139. }
  1140. spin_lock_irqsave(&dev->event_lock, flag);
  1141. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1142. base.link) {
  1143. if (node->event.base.type == req_event->event &&
  1144. node->event.info.object_id == req_event->object_id &&
  1145. node->base.file_priv == file) {
  1146. client = node;
  1147. list_del(&client->base.link);
  1148. found = true;
  1149. kfree(client);
  1150. break;
  1151. }
  1152. }
  1153. spin_unlock_irqrestore(&dev->event_lock, flag);
  1154. if (!found)
  1155. return -ENOENT;
  1156. count = msm_event_client_count(dev, req_event, false);
  1157. if (!count)
  1158. ret = msm_register_event(dev, req_event, file, false);
  1159. return ret;
  1160. }
  1161. void msm_mode_object_event_notify(struct drm_mode_object *obj,
  1162. struct drm_device *dev, struct drm_event *event, u8 *payload)
  1163. {
  1164. struct msm_drm_private *priv = NULL;
  1165. unsigned long flags;
  1166. struct msm_drm_event *notify, *node;
  1167. int len = 0, ret;
  1168. if (!obj || !event || !event->length || !payload) {
  1169. DRM_ERROR("err param obj %pK event %pK len %d payload %pK\n",
  1170. obj, event, ((event) ? (event->length) : -1),
  1171. payload);
  1172. return;
  1173. }
  1174. priv = (dev) ? dev->dev_private : NULL;
  1175. if (!dev || !priv) {
  1176. DRM_ERROR("invalid dev %pK priv %pK\n", dev, priv);
  1177. return;
  1178. }
  1179. spin_lock_irqsave(&dev->event_lock, flags);
  1180. list_for_each_entry(node, &priv->client_event_list, base.link) {
  1181. if (node->event.base.type != event->type ||
  1182. obj->id != node->event.info.object_id)
  1183. continue;
  1184. len = event->length + sizeof(struct msm_drm_event);
  1185. if (node->base.file_priv->event_space < len) {
  1186. DRM_ERROR("Insufficient space %d for event %x len %d\n",
  1187. node->base.file_priv->event_space, event->type,
  1188. len);
  1189. continue;
  1190. }
  1191. notify = kzalloc(len, GFP_ATOMIC);
  1192. if (!notify)
  1193. continue;
  1194. notify->base.file_priv = node->base.file_priv;
  1195. notify->base.event = &notify->event.base;
  1196. notify->event.base.type = node->event.base.type;
  1197. notify->event.base.length = event->length +
  1198. sizeof(struct drm_msm_event_resp);
  1199. memcpy(&notify->event.info, &node->event.info,
  1200. sizeof(notify->event.info));
  1201. memcpy(notify->event.data, payload, event->length);
  1202. ret = drm_event_reserve_init_locked(dev, node->base.file_priv,
  1203. &notify->base, &notify->event.base);
  1204. if (ret) {
  1205. kfree(notify);
  1206. continue;
  1207. }
  1208. drm_send_event_locked(dev, &notify->base);
  1209. }
  1210. spin_unlock_irqrestore(&dev->event_lock, flags);
  1211. }
  1212. static int msm_release(struct inode *inode, struct file *filp)
  1213. {
  1214. struct drm_file *file_priv;
  1215. struct drm_minor *minor;
  1216. struct drm_device *dev;
  1217. struct msm_drm_private *priv;
  1218. struct msm_drm_event *node, *temp, *tmp_node;
  1219. u32 count;
  1220. unsigned long flags;
  1221. LIST_HEAD(tmp_head);
  1222. int ret = 0;
  1223. mutex_lock(&msm_release_lock);
  1224. file_priv = filp->private_data;
  1225. if (!file_priv) {
  1226. ret = -EINVAL;
  1227. goto end;
  1228. }
  1229. minor = file_priv->minor;
  1230. dev = minor->dev;
  1231. priv = dev->dev_private;
  1232. spin_lock_irqsave(&dev->event_lock, flags);
  1233. list_for_each_entry_safe(node, temp, &priv->client_event_list,
  1234. base.link) {
  1235. if (node->base.file_priv != file_priv)
  1236. continue;
  1237. list_del(&node->base.link);
  1238. list_add_tail(&node->base.link, &tmp_head);
  1239. }
  1240. spin_unlock_irqrestore(&dev->event_lock, flags);
  1241. list_for_each_entry_safe(node, temp, &tmp_head,
  1242. base.link) {
  1243. list_del(&node->base.link);
  1244. count = msm_event_client_count(dev, &node->event.info, false);
  1245. list_for_each_entry(tmp_node, &tmp_head, base.link) {
  1246. if (tmp_node->event.base.type ==
  1247. node->event.info.event &&
  1248. tmp_node->event.info.object_id ==
  1249. node->event.info.object_id)
  1250. count++;
  1251. }
  1252. if (!count)
  1253. msm_register_event(dev, &node->event.info, file_priv,
  1254. false);
  1255. kfree(node);
  1256. }
  1257. /**
  1258. * Handle preclose operation here for removing fb's whose
  1259. * refcount > 1. This operation is not triggered from upstream
  1260. * drm as msm_driver does not support DRIVER_LEGACY feature.
  1261. */
  1262. if (drm_is_current_master(file_priv))
  1263. msm_preclose(dev, file_priv);
  1264. ret = drm_release(inode, filp);
  1265. filp->private_data = NULL;
  1266. end:
  1267. mutex_unlock(&msm_release_lock);
  1268. return ret;
  1269. }
  1270. /**
  1271. * msm_ioctl_rmfb2 - remove an FB from the configuration
  1272. * @dev: drm device for the ioctl
  1273. * @data: data pointer for the ioctl
  1274. * @file_priv: drm file for the ioctl call
  1275. *
  1276. * Remove the FB specified by the user.
  1277. *
  1278. * Called by the user via ioctl.
  1279. *
  1280. * Returns:
  1281. * Zero on success, negative errno on failure.
  1282. */
  1283. int msm_ioctl_rmfb2(struct drm_device *dev, void *data,
  1284. struct drm_file *file_priv)
  1285. {
  1286. struct drm_framebuffer *fb = NULL;
  1287. struct drm_framebuffer *fbl = NULL;
  1288. uint32_t *id = data;
  1289. int found = 0;
  1290. if (!drm_core_check_feature(dev, DRIVER_MODESET))
  1291. return -EINVAL;
  1292. fb = drm_framebuffer_lookup(dev, file_priv, *id);
  1293. if (!fb)
  1294. return -ENOENT;
  1295. /* drop extra ref from traversing drm_framebuffer_lookup */
  1296. drm_framebuffer_put(fb);
  1297. mutex_lock(&file_priv->fbs_lock);
  1298. list_for_each_entry(fbl, &file_priv->fbs, filp_head)
  1299. if (fb == fbl)
  1300. found = 1;
  1301. if (!found) {
  1302. mutex_unlock(&file_priv->fbs_lock);
  1303. return -ENOENT;
  1304. }
  1305. list_del_init(&fb->filp_head);
  1306. mutex_unlock(&file_priv->fbs_lock);
  1307. drm_framebuffer_put(fb);
  1308. return 0;
  1309. }
  1310. EXPORT_SYMBOL(msm_ioctl_rmfb2);
  1311. /**
  1312. * msm_ioctl_power_ctrl - enable/disable power vote on MDSS Hw
  1313. * @dev: drm device for the ioctl
  1314. * @data: data pointer for the ioctl
  1315. * @file_priv: drm file for the ioctl call
  1316. *
  1317. */
  1318. int msm_ioctl_power_ctrl(struct drm_device *dev, void *data,
  1319. struct drm_file *file_priv)
  1320. {
  1321. struct msm_file_private *ctx = file_priv->driver_priv;
  1322. struct msm_drm_private *priv;
  1323. struct drm_msm_power_ctrl *power_ctrl = data;
  1324. bool vote_req = false;
  1325. int old_cnt;
  1326. int rc = 0;
  1327. if (unlikely(!power_ctrl)) {
  1328. DRM_ERROR("invalid ioctl data\n");
  1329. return -EINVAL;
  1330. }
  1331. priv = dev->dev_private;
  1332. mutex_lock(&ctx->power_lock);
  1333. old_cnt = ctx->enable_refcnt;
  1334. if (power_ctrl->enable) {
  1335. if (!ctx->enable_refcnt)
  1336. vote_req = true;
  1337. ctx->enable_refcnt++;
  1338. } else if (ctx->enable_refcnt) {
  1339. ctx->enable_refcnt--;
  1340. if (!ctx->enable_refcnt)
  1341. vote_req = true;
  1342. } else {
  1343. pr_err("ignoring, unbalanced disable\n");
  1344. }
  1345. if (vote_req) {
  1346. if (power_ctrl->enable)
  1347. rc = pm_runtime_get_sync(dev->dev);
  1348. else
  1349. pm_runtime_put_sync(dev->dev);
  1350. if (rc < 0)
  1351. ctx->enable_refcnt = old_cnt;
  1352. else
  1353. rc = 0;
  1354. }
  1355. pr_debug("pid %d enable %d, refcnt %d, vote_req %d\n",
  1356. current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1357. vote_req);
  1358. SDE_EVT32(current->pid, power_ctrl->enable, ctx->enable_refcnt,
  1359. vote_req);
  1360. mutex_unlock(&ctx->power_lock);
  1361. return rc;
  1362. }
  1363. /**
  1364. * msm_ioctl_display_early_wakeup - early wakeup display.
  1365. * @dev: drm device for the ioctl
  1366. * @data: data pointer for the ioctl
  1367. * @file_priv: drm file for the ioctl call
  1368. *
  1369. */
  1370. int msm_ioctl_display_hint_ops(struct drm_device *dev, void *data,
  1371. struct drm_file *file_priv)
  1372. {
  1373. struct drm_msm_display_hint *display_hint = data;
  1374. struct drm_msm_early_wakeup early_wakeup;
  1375. void __user *early_wakeup_usr;
  1376. struct msm_drm_private *priv;
  1377. struct msm_kms *kms;
  1378. priv = dev->dev_private;
  1379. kms = priv->kms;
  1380. if (unlikely(!display_hint)) {
  1381. DRM_ERROR("invalid ioctl data\n");
  1382. return -EINVAL;
  1383. }
  1384. SDE_EVT32(display_hint->hint_flags);
  1385. /* Any new hint added will require a check for VM ownership before HW is accessed */
  1386. if (display_hint->hint_flags == DRM_MSM_DISPLAY_EARLY_WAKEUP_HINT) {
  1387. if (!display_hint->data) {
  1388. DRM_ERROR("early_wakeup: wrong parameter\n");
  1389. return -EINVAL;
  1390. }
  1391. early_wakeup_usr =
  1392. (void __user *)((uintptr_t)display_hint->data);
  1393. if (copy_from_user(&early_wakeup, early_wakeup_usr,
  1394. sizeof(early_wakeup))) {
  1395. DRM_ERROR("early_wakeup: copy from user failed\n");
  1396. return -EINVAL;
  1397. }
  1398. SDE_EVT32(early_wakeup.wakeup_hint);
  1399. if (kms && kms->funcs && kms->funcs->display_early_wakeup
  1400. && early_wakeup.wakeup_hint)
  1401. kms->funcs->display_early_wakeup(dev,
  1402. early_wakeup.connector_id);
  1403. }
  1404. return 0;
  1405. }
  1406. static const struct drm_ioctl_desc msm_ioctls[] = {
  1407. DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH|DRM_RENDER_ALLOW),
  1408. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  1409. DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  1410. DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH|DRM_RENDER_ALLOW),
  1411. DRM_IOCTL_DEF_DRV(SDE_WB_CONFIG, sde_wb_config, DRM_UNLOCKED|DRM_AUTH),
  1412. DRM_IOCTL_DEF_DRV(MSM_REGISTER_EVENT, msm_ioctl_register_event,
  1413. DRM_UNLOCKED),
  1414. DRM_IOCTL_DEF_DRV(MSM_DEREGISTER_EVENT, msm_ioctl_deregister_event,
  1415. DRM_UNLOCKED),
  1416. DRM_IOCTL_DEF_DRV(MSM_RMFB2, msm_ioctl_rmfb2, DRM_UNLOCKED),
  1417. DRM_IOCTL_DEF_DRV(MSM_POWER_CTRL, msm_ioctl_power_ctrl,
  1418. DRM_RENDER_ALLOW),
  1419. DRM_IOCTL_DEF_DRV(MSM_DISPLAY_HINT, msm_ioctl_display_hint_ops,
  1420. DRM_UNLOCKED),
  1421. };
  1422. static const struct vm_operations_struct vm_ops = {
  1423. .fault = msm_gem_fault,
  1424. .open = drm_gem_vm_open,
  1425. .close = drm_gem_vm_close,
  1426. };
  1427. static const struct file_operations fops = {
  1428. .owner = THIS_MODULE,
  1429. .open = drm_open,
  1430. .release = msm_release,
  1431. .unlocked_ioctl = drm_ioctl,
  1432. .compat_ioctl = drm_compat_ioctl,
  1433. .poll = drm_poll,
  1434. .read = drm_read,
  1435. .llseek = no_llseek,
  1436. .mmap = msm_gem_mmap,
  1437. };
  1438. static struct drm_driver msm_driver = {
  1439. .driver_features = DRIVER_GEM |
  1440. DRIVER_RENDER |
  1441. DRIVER_ATOMIC |
  1442. DRIVER_MODESET,
  1443. .open = msm_open,
  1444. .postclose = msm_postclose,
  1445. .lastclose = msm_lastclose,
  1446. .irq_handler = msm_irq,
  1447. .irq_preinstall = msm_irq_preinstall,
  1448. .irq_postinstall = msm_irq_postinstall,
  1449. .irq_uninstall = msm_irq_uninstall,
  1450. .gem_free_object_unlocked = msm_gem_free_object,
  1451. .gem_vm_ops = &vm_ops,
  1452. .dumb_create = msm_gem_dumb_create,
  1453. .dumb_map_offset = msm_gem_dumb_map_offset,
  1454. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  1455. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  1456. .gem_prime_export = drm_gem_prime_export,
  1457. .gem_prime_import = msm_gem_prime_import,
  1458. .gem_prime_pin = msm_gem_prime_pin,
  1459. .gem_prime_unpin = msm_gem_prime_unpin,
  1460. .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
  1461. .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
  1462. .gem_prime_vmap = msm_gem_prime_vmap,
  1463. .gem_prime_vunmap = msm_gem_prime_vunmap,
  1464. .gem_prime_mmap = msm_gem_prime_mmap,
  1465. .ioctls = msm_ioctls,
  1466. .num_ioctls = ARRAY_SIZE(msm_ioctls),
  1467. .fops = &fops,
  1468. .name = "msm_drm",
  1469. .desc = "MSM Snapdragon DRM",
  1470. .date = "20130625",
  1471. .major = MSM_VERSION_MAJOR,
  1472. .minor = MSM_VERSION_MINOR,
  1473. .patchlevel = MSM_VERSION_PATCHLEVEL,
  1474. };
  1475. #ifdef CONFIG_PM_SLEEP
  1476. static int msm_pm_suspend(struct device *dev)
  1477. {
  1478. struct drm_device *ddev;
  1479. struct msm_drm_private *priv;
  1480. struct msm_kms *kms;
  1481. if (!dev)
  1482. return -EINVAL;
  1483. ddev = dev_get_drvdata(dev);
  1484. if (!ddev || !ddev->dev_private)
  1485. return -EINVAL;
  1486. priv = ddev->dev_private;
  1487. kms = priv->kms;
  1488. if (kms && kms->funcs && kms->funcs->pm_suspend)
  1489. return kms->funcs->pm_suspend(dev);
  1490. /* disable hot-plug polling */
  1491. drm_kms_helper_poll_disable(ddev);
  1492. return 0;
  1493. }
  1494. static int msm_pm_resume(struct device *dev)
  1495. {
  1496. struct drm_device *ddev;
  1497. struct msm_drm_private *priv;
  1498. struct msm_kms *kms;
  1499. if (!dev)
  1500. return -EINVAL;
  1501. ddev = dev_get_drvdata(dev);
  1502. if (!ddev || !ddev->dev_private)
  1503. return -EINVAL;
  1504. priv = ddev->dev_private;
  1505. kms = priv->kms;
  1506. if (kms && kms->funcs && kms->funcs->pm_resume)
  1507. return kms->funcs->pm_resume(dev);
  1508. /* enable hot-plug polling */
  1509. drm_kms_helper_poll_enable(ddev);
  1510. return 0;
  1511. }
  1512. #endif
  1513. #ifdef CONFIG_PM
  1514. static int msm_runtime_suspend(struct device *dev)
  1515. {
  1516. struct drm_device *ddev = dev_get_drvdata(dev);
  1517. struct msm_drm_private *priv = ddev->dev_private;
  1518. DBG("");
  1519. if (priv->mdss)
  1520. msm_mdss_disable(priv->mdss);
  1521. else
  1522. sde_power_resource_enable(&priv->phandle, false);
  1523. return 0;
  1524. }
  1525. static int msm_runtime_resume(struct device *dev)
  1526. {
  1527. struct drm_device *ddev = dev_get_drvdata(dev);
  1528. struct msm_drm_private *priv = ddev->dev_private;
  1529. int ret;
  1530. DBG("");
  1531. if (priv->mdss)
  1532. ret = msm_mdss_enable(priv->mdss);
  1533. else
  1534. ret = sde_power_resource_enable(&priv->phandle, true);
  1535. return ret;
  1536. }
  1537. #endif
  1538. static const struct dev_pm_ops msm_pm_ops = {
  1539. SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
  1540. SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
  1541. };
  1542. /*
  1543. * Componentized driver support:
  1544. */
  1545. /*
  1546. * NOTE: duplication of the same code as exynos or imx (or probably any other).
  1547. * so probably some room for some helpers
  1548. */
  1549. static int compare_of(struct device *dev, void *data)
  1550. {
  1551. return dev->of_node == data;
  1552. }
  1553. /*
  1554. * Identify what components need to be added by parsing what remote-endpoints
  1555. * our MDP output ports are connected to. In the case of LVDS on MDP4, there
  1556. * is no external component that we need to add since LVDS is within MDP4
  1557. * itself.
  1558. */
  1559. static int add_components_mdp(struct device *mdp_dev,
  1560. struct component_match **matchptr)
  1561. {
  1562. struct device_node *np = mdp_dev->of_node;
  1563. struct device_node *ep_node;
  1564. struct device *master_dev;
  1565. /*
  1566. * on MDP4 based platforms, the MDP platform device is the component
  1567. * master that adds other display interface components to itself.
  1568. *
  1569. * on MDP5 based platforms, the MDSS platform device is the component
  1570. * master that adds MDP5 and other display interface components to
  1571. * itself.
  1572. */
  1573. if (of_device_is_compatible(np, "qcom,mdp4"))
  1574. master_dev = mdp_dev;
  1575. else
  1576. master_dev = mdp_dev->parent;
  1577. for_each_endpoint_of_node(np, ep_node) {
  1578. struct device_node *intf;
  1579. struct of_endpoint ep;
  1580. int ret;
  1581. ret = of_graph_parse_endpoint(ep_node, &ep);
  1582. if (ret) {
  1583. dev_err(mdp_dev, "unable to parse port endpoint\n");
  1584. of_node_put(ep_node);
  1585. return ret;
  1586. }
  1587. /*
  1588. * The LCDC/LVDS port on MDP4 is a speacial case where the
  1589. * remote-endpoint isn't a component that we need to add
  1590. */
  1591. if (of_device_is_compatible(np, "qcom,mdp4") &&
  1592. ep.port == 0)
  1593. continue;
  1594. /*
  1595. * It's okay if some of the ports don't have a remote endpoint
  1596. * specified. It just means that the port isn't connected to
  1597. * any external interface.
  1598. */
  1599. intf = of_graph_get_remote_port_parent(ep_node);
  1600. if (!intf)
  1601. continue;
  1602. if (of_device_is_available(intf))
  1603. drm_of_component_match_add(master_dev, matchptr,
  1604. compare_of, intf);
  1605. of_node_put(intf);
  1606. }
  1607. return 0;
  1608. }
  1609. static int compare_name_mdp(struct device *dev, void *data)
  1610. {
  1611. return (strnstr(dev_name(dev), "mdp", strlen("mdp")) != NULL);
  1612. }
  1613. static int add_display_components(struct device *dev,
  1614. struct component_match **matchptr)
  1615. {
  1616. struct device *mdp_dev = NULL;
  1617. struct device_node *node;
  1618. int ret;
  1619. if (of_device_is_compatible(dev->of_node, "qcom,sde-kms")) {
  1620. struct device_node *np = dev->of_node;
  1621. unsigned int i;
  1622. for (i = 0; ; i++) {
  1623. node = of_parse_phandle(np, "connectors", i);
  1624. if (!node)
  1625. break;
  1626. component_match_add(dev, matchptr, compare_of, node);
  1627. }
  1628. return 0;
  1629. }
  1630. /*
  1631. * MDP5 based devices don't have a flat hierarchy. There is a top level
  1632. * parent: MDSS, and children: MDP5, DSI, HDMI, eDP etc. Populate the
  1633. * children devices, find the MDP5 node, and then add the interfaces
  1634. * to our components list.
  1635. */
  1636. if (of_device_is_compatible(dev->of_node, "qcom,mdss")) {
  1637. ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
  1638. if (ret) {
  1639. dev_err(dev, "failed to populate children devices\n");
  1640. return ret;
  1641. }
  1642. mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
  1643. if (!mdp_dev) {
  1644. dev_err(dev, "failed to find MDSS MDP node\n");
  1645. of_platform_depopulate(dev);
  1646. return -ENODEV;
  1647. }
  1648. put_device(mdp_dev);
  1649. /* add the MDP component itself */
  1650. component_match_add(dev, matchptr, compare_of,
  1651. mdp_dev->of_node);
  1652. } else {
  1653. /* MDP4 */
  1654. mdp_dev = dev;
  1655. }
  1656. ret = add_components_mdp(mdp_dev, matchptr);
  1657. if (ret)
  1658. of_platform_depopulate(dev);
  1659. return ret;
  1660. }
  1661. struct msm_gem_address_space *
  1662. msm_gem_smmu_address_space_get(struct drm_device *dev,
  1663. unsigned int domain)
  1664. {
  1665. struct msm_drm_private *priv = NULL;
  1666. struct msm_kms *kms;
  1667. const struct msm_kms_funcs *funcs;
  1668. struct msm_gem_address_space *aspace;
  1669. if (!iommu_present(&platform_bus_type))
  1670. return ERR_PTR(-ENODEV);
  1671. if ((!dev) || (!dev->dev_private))
  1672. return ERR_PTR(-EINVAL);
  1673. priv = dev->dev_private;
  1674. kms = priv->kms;
  1675. if (!kms)
  1676. return ERR_PTR(-EINVAL);
  1677. funcs = kms->funcs;
  1678. if ((!funcs) || (!funcs->get_address_space))
  1679. return ERR_PTR(-EINVAL);
  1680. aspace = funcs->get_address_space(priv->kms, domain);
  1681. return aspace ? aspace : ERR_PTR(-EINVAL);
  1682. }
  1683. int msm_get_mixer_count(struct msm_drm_private *priv,
  1684. const struct drm_display_mode *mode,
  1685. const struct msm_resource_caps_info *res, u32 *num_lm)
  1686. {
  1687. struct msm_kms *kms;
  1688. const struct msm_kms_funcs *funcs;
  1689. if (!priv) {
  1690. DRM_ERROR("invalid drm private struct\n");
  1691. return -EINVAL;
  1692. }
  1693. kms = priv->kms;
  1694. if (!kms) {
  1695. DRM_ERROR("invalid msm kms struct\n");
  1696. return -EINVAL;
  1697. }
  1698. funcs = kms->funcs;
  1699. if (!funcs || !funcs->get_mixer_count) {
  1700. DRM_ERROR("invalid function pointers\n");
  1701. return -EINVAL;
  1702. }
  1703. return funcs->get_mixer_count(priv->kms, mode, res, num_lm);
  1704. }
  1705. int msm_get_dsc_count(struct msm_drm_private *priv,
  1706. u32 hdisplay, u32 *num_dsc)
  1707. {
  1708. struct msm_kms *kms;
  1709. const struct msm_kms_funcs *funcs;
  1710. if (!priv) {
  1711. DRM_ERROR("invalid drm private struct\n");
  1712. return -EINVAL;
  1713. }
  1714. kms = priv->kms;
  1715. if (!kms) {
  1716. DRM_ERROR("invalid msm kms struct\n");
  1717. return -EINVAL;
  1718. }
  1719. funcs = kms->funcs;
  1720. if (!funcs || !funcs->get_dsc_count) {
  1721. DRM_ERROR("invalid function pointers\n");
  1722. return -EINVAL;
  1723. }
  1724. return funcs->get_dsc_count(priv->kms, hdisplay, num_dsc);
  1725. }
  1726. static int msm_drm_bind(struct device *dev)
  1727. {
  1728. return msm_drm_component_init(dev);
  1729. }
  1730. static void msm_drm_unbind(struct device *dev)
  1731. {
  1732. msm_drm_uninit(dev);
  1733. }
  1734. static const struct component_master_ops msm_drm_ops = {
  1735. .bind = msm_drm_bind,
  1736. .unbind = msm_drm_unbind,
  1737. };
  1738. static int msm_drm_component_dependency_check(struct device *dev)
  1739. {
  1740. struct device_node *node;
  1741. struct device_node *np = dev->of_node;
  1742. unsigned int i;
  1743. if (!of_device_is_compatible(dev->of_node, "qcom,sde-kms"))
  1744. return 0;
  1745. for (i = 0; ; i++) {
  1746. node = of_parse_phandle(np, "connectors", i);
  1747. if (!node)
  1748. break;
  1749. if (of_node_name_eq(node,"qcom,sde_rscc") &&
  1750. of_device_is_available(node) &&
  1751. of_node_check_flag(node, OF_POPULATED)) {
  1752. struct platform_device *pdev =
  1753. of_find_device_by_node(node);
  1754. if (!platform_get_drvdata(pdev)) {
  1755. dev_err(dev,
  1756. "qcom,sde_rscc not probed yet\n");
  1757. return -EPROBE_DEFER;
  1758. } else {
  1759. return 0;
  1760. }
  1761. }
  1762. }
  1763. return 0;
  1764. }
  1765. /*
  1766. * Platform driver:
  1767. */
  1768. static int msm_pdev_probe(struct platform_device *pdev)
  1769. {
  1770. int ret;
  1771. struct component_match *match = NULL;
  1772. ret = msm_drm_component_dependency_check(&pdev->dev);
  1773. if (ret)
  1774. return ret;
  1775. ret = msm_drm_device_init(pdev, &msm_driver);
  1776. if (ret)
  1777. return ret;
  1778. ret = add_display_components(&pdev->dev, &match);
  1779. if (ret)
  1780. return ret;
  1781. if (!match)
  1782. return -ENODEV;
  1783. pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
  1784. return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
  1785. }
  1786. static int msm_pdev_remove(struct platform_device *pdev)
  1787. {
  1788. component_master_del(&pdev->dev, &msm_drm_ops);
  1789. of_platform_depopulate(&pdev->dev);
  1790. return 0;
  1791. }
  1792. static void msm_pdev_shutdown(struct platform_device *pdev)
  1793. {
  1794. struct drm_device *ddev = platform_get_drvdata(pdev);
  1795. struct msm_drm_private *priv = NULL;
  1796. if (!ddev) {
  1797. DRM_ERROR("invalid drm device node\n");
  1798. return;
  1799. }
  1800. priv = ddev->dev_private;
  1801. if (!priv) {
  1802. DRM_ERROR("invalid msm drm private node\n");
  1803. return;
  1804. }
  1805. msm_lastclose(ddev);
  1806. /* set this after lastclose to allow kickoff from lastclose */
  1807. priv->shutdown_in_progress = true;
  1808. }
  1809. static const struct of_device_id dt_match[] = {
  1810. { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
  1811. { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
  1812. { .compatible = "qcom,sde-kms", .data = (void *)KMS_SDE },
  1813. {},
  1814. };
  1815. MODULE_DEVICE_TABLE(of, dt_match);
  1816. static struct platform_driver msm_platform_driver = {
  1817. .probe = msm_pdev_probe,
  1818. .remove = msm_pdev_remove,
  1819. .shutdown = msm_pdev_shutdown,
  1820. .driver = {
  1821. .name = "msm_drm",
  1822. .of_match_table = dt_match,
  1823. .pm = &msm_pm_ops,
  1824. .suppress_bind_attrs = true,
  1825. },
  1826. };
  1827. static int __init msm_drm_register(void)
  1828. {
  1829. if (!modeset)
  1830. return -EINVAL;
  1831. DBG("init");
  1832. sde_rsc_rpmh_register();
  1833. sde_rsc_register();
  1834. msm_smmu_driver_init();
  1835. sde_wb_register();
  1836. platform_driver_register(&msm_platform_driver);
  1837. dsi_display_register();
  1838. msm_hdcp_register();
  1839. dp_display_register();
  1840. msm_dsi_register();
  1841. msm_edp_register();
  1842. msm_hdmi_register();
  1843. return 0;
  1844. }
  1845. static void __exit msm_drm_unregister(void)
  1846. {
  1847. DBG("fini");
  1848. sde_wb_unregister();
  1849. msm_hdmi_unregister();
  1850. msm_edp_unregister();
  1851. msm_dsi_unregister();
  1852. sde_rotator_smmu_driver_unregister();
  1853. sde_rotator_unregister();
  1854. msm_smmu_driver_cleanup();
  1855. msm_hdcp_unregister();
  1856. dp_display_unregister();
  1857. dsi_display_unregister();
  1858. sde_rsc_unregister();
  1859. platform_driver_unregister(&msm_platform_driver);
  1860. }
  1861. module_init(msm_drm_register);
  1862. module_exit(msm_drm_unregister);
  1863. #if IS_ENABLED(CONFIG_MSM_MMRM)
  1864. MODULE_SOFTDEP("pre: msm-mmrm");
  1865. #endif
  1866. MODULE_AUTHOR("Rob Clark <[email protected]");
  1867. MODULE_DESCRIPTION("MSM DRM Driver");
  1868. MODULE_LICENSE("GPL");