q6core.c 45 KB

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  1. /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/of_device.h>
  16. #include <linux/string.h>
  17. #include <linux/types.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/mutex.h>
  20. #include <linux/sched.h>
  21. #include <linux/slab.h>
  22. #include <linux/sysfs.h>
  23. #include <linux/kobject.h>
  24. #include <linux/delay.h>
  25. #include <dsp/q6core.h>
  26. #include <dsp/audio_cal_utils.h>
  27. #include <dsp/apr_audio-v2.h>
  28. #include <soc/snd_event.h>
  29. #include <ipc/apr.h>
  30. #include "adsp_err.h"
  31. #define TIMEOUT_MS 1000
  32. /*
  33. * AVS bring up in the modem is optimitized for the new
  34. * Sub System Restart design and 100 milliseconds timeout
  35. * is sufficient to make sure the Q6 will be ready.
  36. */
  37. #define Q6_READY_TIMEOUT_MS 100
  38. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  39. #define APR_ENOTREADY 10
  40. #define MEMPOOL_ID_MASK 0xFF
  41. #define MDF_MAP_TOKEN 0xF000
  42. enum {
  43. META_CAL,
  44. CUST_TOP_CAL,
  45. CORE_MAX_CAL
  46. };
  47. enum ver_query_status {
  48. VER_QUERY_UNATTEMPTED,
  49. VER_QUERY_UNSUPPORTED,
  50. VER_QUERY_SUPPORTED
  51. };
  52. struct q6core_avcs_ver_info {
  53. enum ver_query_status status;
  54. struct avcs_fwk_ver_info *ver_info;
  55. };
  56. struct q6core_str {
  57. struct apr_svc *core_handle_q;
  58. wait_queue_head_t bus_bw_req_wait;
  59. wait_queue_head_t mdf_map_resp_wait;
  60. wait_queue_head_t cmd_req_wait;
  61. wait_queue_head_t avcs_fwk_ver_req_wait;
  62. u32 bus_bw_resp_received;
  63. u32 mdf_map_resp_received;
  64. enum cmd_flags {
  65. FLAG_NONE,
  66. FLAG_CMDRSP_LICENSE_RESULT
  67. } cmd_resp_received_flag;
  68. u32 avcs_fwk_ver_resp_received;
  69. struct mutex cmd_lock;
  70. struct mutex ver_lock;
  71. union {
  72. struct avcs_cmdrsp_get_license_validation_result
  73. cmdrsp_license_result;
  74. } cmd_resp_payload;
  75. u32 param;
  76. struct cal_type_data *cal_data[CORE_MAX_CAL];
  77. uint32_t mem_map_cal_handle;
  78. uint32_t mdf_mem_map_cal_handle;
  79. int32_t adsp_status;
  80. int32_t avs_state;
  81. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  82. };
  83. static struct q6core_str q6core_lcl;
  84. struct generic_get_data_ {
  85. int valid;
  86. int size_in_ints;
  87. int ints[];
  88. };
  89. static struct generic_get_data_ *generic_get_data;
  90. static DEFINE_MUTEX(kset_lock);
  91. static struct kset *audio_uevent_kset;
  92. static int q6core_init_uevent_kset(void)
  93. {
  94. int ret = 0;
  95. mutex_lock(&kset_lock);
  96. if (audio_uevent_kset)
  97. goto done;
  98. /* Create a kset under /sys/kernel/ */
  99. audio_uevent_kset = kset_create_and_add("q6audio", NULL, kernel_kobj);
  100. if (!audio_uevent_kset) {
  101. pr_err("%s: error creating uevent kernel set", __func__);
  102. ret = -EINVAL;
  103. }
  104. done:
  105. mutex_unlock(&kset_lock);
  106. return ret;
  107. }
  108. static void q6core_destroy_uevent_kset(void)
  109. {
  110. if (audio_uevent_kset) {
  111. kset_unregister(audio_uevent_kset);
  112. audio_uevent_kset = NULL;
  113. }
  114. }
  115. /**
  116. * q6core_init_uevent_data - initialize kernel object required to send uevents.
  117. *
  118. * @uevent_data: uevent data (dynamically allocated memory).
  119. * @name: name of the kernel object.
  120. *
  121. * Returns 0 on success or error otherwise.
  122. */
  123. int q6core_init_uevent_data(struct audio_uevent_data *uevent_data, char *name)
  124. {
  125. int ret = -EINVAL;
  126. if (!uevent_data || !name)
  127. return ret;
  128. ret = q6core_init_uevent_kset();
  129. if (ret)
  130. return ret;
  131. /* Set kset for kobject before initializing the kobject */
  132. uevent_data->kobj.kset = audio_uevent_kset;
  133. /* Initialize kobject and add it to kernel */
  134. ret = kobject_init_and_add(&uevent_data->kobj, &uevent_data->ktype,
  135. NULL, "%s", name);
  136. if (ret) {
  137. pr_err("%s: error initializing uevent kernel object: %d",
  138. __func__, ret);
  139. kobject_put(&uevent_data->kobj);
  140. return ret;
  141. }
  142. /* Send kobject add event to the system */
  143. kobject_uevent(&uevent_data->kobj, KOBJ_ADD);
  144. return ret;
  145. }
  146. EXPORT_SYMBOL(q6core_init_uevent_data);
  147. /**
  148. * q6core_destroy_uevent_data - destroy kernel object.
  149. *
  150. * @uevent_data: uevent data.
  151. */
  152. void q6core_destroy_uevent_data(struct audio_uevent_data *uevent_data)
  153. {
  154. if (uevent_data)
  155. kobject_put(&uevent_data->kobj);
  156. }
  157. EXPORT_SYMBOL(q6core_destroy_uevent_data);
  158. /**
  159. * q6core_send_uevent - send uevent to userspace.
  160. *
  161. * @uevent_data: uevent data.
  162. * @event: event to send.
  163. *
  164. * Returns 0 on success or error otherwise.
  165. */
  166. int q6core_send_uevent(struct audio_uevent_data *uevent_data, char *event)
  167. {
  168. char *env[] = { event, NULL };
  169. if (!event || !uevent_data)
  170. return -EINVAL;
  171. return kobject_uevent_env(&uevent_data->kobj, KOBJ_CHANGE, env);
  172. }
  173. EXPORT_SYMBOL(q6core_send_uevent);
  174. static int parse_fwk_version_info(uint32_t *payload)
  175. {
  176. size_t ver_size;
  177. int num_services;
  178. pr_debug("%s: Payload info num services %d\n",
  179. __func__, payload[4]);
  180. /*
  181. * payload1[4] is the number of services running on DSP
  182. * Based on this info, we copy the payload into core
  183. * avcs version info structure.
  184. */
  185. num_services = payload[4];
  186. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  187. pr_err("%s: num_services: %d greater than max services: %d\n",
  188. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  189. return -EINVAL;
  190. }
  191. /*
  192. * Dynamically allocate memory for all
  193. * the services based on num_services
  194. */
  195. ver_size = sizeof(struct avcs_get_fwk_version) +
  196. num_services * sizeof(struct avs_svc_api_info);
  197. q6core_lcl.q6core_avcs_ver_info.ver_info =
  198. kzalloc(ver_size, GFP_ATOMIC);
  199. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  200. return -ENOMEM;
  201. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  202. ver_size);
  203. return 0;
  204. }
  205. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  206. {
  207. uint32_t *payload1;
  208. int ret = 0;
  209. if (data == NULL) {
  210. pr_err("%s: data argument is null\n", __func__);
  211. return -EINVAL;
  212. }
  213. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  214. __func__,
  215. data->payload_size, data->opcode);
  216. switch (data->opcode) {
  217. case APR_BASIC_RSP_RESULT:{
  218. if (data->payload_size == 0) {
  219. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  220. __func__);
  221. return 0;
  222. }
  223. payload1 = data->payload;
  224. switch (payload1[0]) {
  225. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  226. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  227. __func__, payload1[1]);
  228. /* -ADSP status to match Linux error standard */
  229. q6core_lcl.adsp_status = -payload1[1];
  230. q6core_lcl.bus_bw_resp_received = 1;
  231. wake_up(&q6core_lcl.bus_bw_req_wait);
  232. break;
  233. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  234. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  235. __func__, payload1[1]);
  236. /* -ADSP status to match Linux error standard */
  237. q6core_lcl.adsp_status = -payload1[1];
  238. q6core_lcl.bus_bw_resp_received = 1;
  239. wake_up(&q6core_lcl.bus_bw_req_wait);
  240. break;
  241. case AVCS_CMD_MAP_MDF_SHARED_MEMORY:
  242. pr_debug("%s: Cmd = AVCS_CMD_MAP_MDF_SHARED_MEMORY status[0x%x]\n",
  243. __func__, payload1[1]);
  244. /* -ADSP status to match Linux error standard */
  245. q6core_lcl.adsp_status = -payload1[1];
  246. q6core_lcl.bus_bw_resp_received = 1;
  247. wake_up(&q6core_lcl.bus_bw_req_wait);
  248. break;
  249. case AVCS_CMD_REGISTER_TOPOLOGIES:
  250. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  251. __func__, payload1[1]);
  252. /* -ADSP status to match Linux error standard */
  253. q6core_lcl.adsp_status = -payload1[1];
  254. q6core_lcl.bus_bw_resp_received = 1;
  255. wake_up(&q6core_lcl.bus_bw_req_wait);
  256. break;
  257. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  258. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  259. __func__, payload1[1]);
  260. q6core_lcl.bus_bw_resp_received = 1;
  261. wake_up(&q6core_lcl.bus_bw_req_wait);
  262. break;
  263. case AVCS_CMD_GET_FWK_VERSION:
  264. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  265. __func__, adsp_err_get_err_str(payload1[1]));
  266. /* ADSP status to match Linux error standard */
  267. q6core_lcl.adsp_status = -payload1[1];
  268. if (payload1[1] == ADSP_EUNSUPPORTED)
  269. q6core_lcl.q6core_avcs_ver_info.status =
  270. VER_QUERY_UNSUPPORTED;
  271. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  272. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  273. break;
  274. case AVCS_CMD_LOAD_TOPO_MODULES:
  275. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  276. pr_debug("%s: Cmd = %s status[%s]\n",
  277. __func__,
  278. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  279. "AVCS_CMD_LOAD_TOPO_MODULES" :
  280. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  281. adsp_err_get_err_str(payload1[1]));
  282. break;
  283. default:
  284. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  285. __func__,
  286. payload1[0], payload1[1], data->opcode);
  287. break;
  288. }
  289. break;
  290. }
  291. case RESET_EVENTS:{
  292. pr_debug("%s: Reset event received in Core service\n",
  293. __func__);
  294. /*
  295. * no reset for q6core_avcs_ver_info done as
  296. * the data will not change after SSR
  297. */
  298. apr_reset(q6core_lcl.core_handle_q);
  299. q6core_lcl.core_handle_q = NULL;
  300. break;
  301. }
  302. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  303. payload1 = data->payload;
  304. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  305. __func__, payload1[0]);
  306. if (data->token == MDF_MAP_TOKEN) {
  307. q6core_lcl.mdf_mem_map_cal_handle = payload1[0];
  308. q6core_lcl.mdf_map_resp_received = 1;
  309. wake_up(&q6core_lcl.mdf_map_resp_wait);
  310. } else {
  311. q6core_lcl.mem_map_cal_handle = payload1[0];
  312. q6core_lcl.bus_bw_resp_received = 1;
  313. wake_up(&q6core_lcl.bus_bw_req_wait);
  314. }
  315. break;
  316. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  317. payload1 = data->payload;
  318. q6core_lcl.param = payload1[0];
  319. pr_debug("%s: Received ADSP get state response 0x%x\n",
  320. __func__, q6core_lcl.param);
  321. /* ensure .param is updated prior to .bus_bw_resp_received */
  322. wmb();
  323. q6core_lcl.bus_bw_resp_received = 1;
  324. wake_up(&q6core_lcl.bus_bw_req_wait);
  325. break;
  326. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  327. payload1 = data->payload;
  328. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  329. __func__, payload1[0]);
  330. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  331. = payload1[0];
  332. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  333. wake_up(&q6core_lcl.cmd_req_wait);
  334. break;
  335. case AVCS_CMDRSP_GET_FWK_VERSION:
  336. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  337. __func__);
  338. payload1 = data->payload;
  339. ret = parse_fwk_version_info(payload1);
  340. if (ret < 0) {
  341. q6core_lcl.adsp_status = ret;
  342. pr_err("%s: Failed to parse payload:%d\n",
  343. __func__, ret);
  344. } else {
  345. q6core_lcl.q6core_avcs_ver_info.status =
  346. VER_QUERY_SUPPORTED;
  347. }
  348. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  349. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  350. break;
  351. default:
  352. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  353. __func__, data->opcode);
  354. if (generic_get_data) {
  355. generic_get_data->valid = 1;
  356. generic_get_data->size_in_ints =
  357. data->payload_size/sizeof(int);
  358. pr_debug("callback size = %i\n",
  359. data->payload_size);
  360. memcpy(generic_get_data->ints, data->payload,
  361. data->payload_size);
  362. q6core_lcl.bus_bw_resp_received = 1;
  363. wake_up(&q6core_lcl.bus_bw_req_wait);
  364. break;
  365. }
  366. break;
  367. }
  368. return 0;
  369. }
  370. void ocm_core_open(void)
  371. {
  372. if (q6core_lcl.core_handle_q == NULL)
  373. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  374. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  375. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  376. if (q6core_lcl.core_handle_q == NULL)
  377. pr_err("%s: Unable to register CORE\n", __func__);
  378. }
  379. struct cal_block_data *cal_utils_get_cal_block_by_key(
  380. struct cal_type_data *cal_type, uint32_t key)
  381. {
  382. struct list_head *ptr, *next;
  383. struct cal_block_data *cal_block = NULL;
  384. struct audio_cal_info_metainfo *metainfo;
  385. list_for_each_safe(ptr, next,
  386. &cal_type->cal_blocks) {
  387. cal_block = list_entry(ptr,
  388. struct cal_block_data, list);
  389. metainfo = (struct audio_cal_info_metainfo *)
  390. cal_block->cal_info;
  391. if (metainfo->nKey != key) {
  392. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  393. __func__, metainfo->nKey, key);
  394. } else {
  395. pr_debug("%s: metainfo key match found", __func__);
  396. return cal_block;
  397. }
  398. }
  399. return NULL;
  400. }
  401. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  402. {
  403. struct apr_hdr avcs_ver_cmd;
  404. int ret;
  405. avcs_ver_cmd.hdr_field =
  406. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  407. APR_PKT_VER);
  408. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  409. avcs_ver_cmd.src_port = 0;
  410. avcs_ver_cmd.dest_port = 0;
  411. avcs_ver_cmd.token = 0;
  412. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  413. q6core_lcl.adsp_status = 0;
  414. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  415. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  416. (uint32_t *) &avcs_ver_cmd);
  417. if (ret < 0) {
  418. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  419. ret);
  420. goto done;
  421. }
  422. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  423. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  424. msecs_to_jiffies(TIMEOUT_MS));
  425. if (!ret) {
  426. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  427. __func__);
  428. ret = -ETIMEDOUT;
  429. goto done;
  430. }
  431. if (q6core_lcl.adsp_status < 0) {
  432. /*
  433. * adsp_err_get_err_str expects a positive value but we store
  434. * the DSP error as negative to match the Linux error standard.
  435. * Pass in the negated value so adsp_err_get_err_str returns
  436. * the correct string.
  437. */
  438. pr_err("%s: DSP returned error[%s]\n", __func__,
  439. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  440. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  441. goto done;
  442. }
  443. ret = 0;
  444. done:
  445. return ret;
  446. }
  447. int q6core_get_service_version(uint32_t service_id,
  448. struct avcs_fwk_ver_info *ver_info,
  449. size_t size)
  450. {
  451. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  452. int i;
  453. uint32_t num_services;
  454. size_t ver_size;
  455. int ret;
  456. if (ver_info == NULL) {
  457. pr_err("%s: ver_info is NULL\n", __func__);
  458. return -EINVAL;
  459. }
  460. ret = q6core_get_fwk_version_size(service_id);
  461. if (ret < 0) {
  462. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  463. __func__, service_id, ret);
  464. return ret;
  465. }
  466. ver_size = ret;
  467. if (ver_size != size) {
  468. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  469. __func__, ver_size, size);
  470. return -EINVAL;
  471. }
  472. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  473. num_services = cached_ver_info->avcs_fwk_version.num_services;
  474. if (service_id == AVCS_SERVICE_ID_ALL) {
  475. memcpy(ver_info, cached_ver_info, ver_size);
  476. return 0;
  477. }
  478. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  479. for (i = 0; i < num_services; i++) {
  480. if (cached_ver_info->services[i].service_id == service_id) {
  481. ver_info->services[0] = cached_ver_info->services[i];
  482. return 0;
  483. }
  484. }
  485. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  486. return -EINVAL;
  487. }
  488. EXPORT_SYMBOL(q6core_get_service_version);
  489. static int q6core_get_avcs_fwk_version(void)
  490. {
  491. int ret = 0;
  492. mutex_lock(&(q6core_lcl.ver_lock));
  493. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  494. q6core_lcl.q6core_avcs_ver_info.status);
  495. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  496. case VER_QUERY_SUPPORTED:
  497. pr_debug("%s: AVCS FWK version query already attempted\n",
  498. __func__);
  499. break;
  500. case VER_QUERY_UNSUPPORTED:
  501. ret = -EOPNOTSUPP;
  502. break;
  503. case VER_QUERY_UNATTEMPTED:
  504. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  505. if (q6core_is_adsp_ready()) {
  506. ret = q6core_send_get_avcs_fwk_ver_cmd();
  507. } else {
  508. pr_err("%s: ADSP is not ready to query version\n",
  509. __func__);
  510. ret = -ENODEV;
  511. }
  512. break;
  513. default:
  514. pr_err("%s: Invalid version query status %d\n", __func__,
  515. q6core_lcl.q6core_avcs_ver_info.status);
  516. ret = -EINVAL;
  517. break;
  518. }
  519. mutex_unlock(&(q6core_lcl.ver_lock));
  520. return ret;
  521. }
  522. size_t q6core_get_fwk_version_size(uint32_t service_id)
  523. {
  524. int ret = 0;
  525. uint32_t num_services;
  526. ret = q6core_get_avcs_fwk_version();
  527. if (ret)
  528. goto done;
  529. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  530. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  531. ->avcs_fwk_version.num_services;
  532. } else {
  533. pr_err("%s: ver_info is NULL\n", __func__);
  534. ret = -EINVAL;
  535. goto done;
  536. }
  537. ret = sizeof(struct avcs_get_fwk_version);
  538. if (service_id == AVCS_SERVICE_ID_ALL)
  539. ret += num_services * sizeof(struct avs_svc_api_info);
  540. else
  541. ret += sizeof(struct avs_svc_api_info);
  542. done:
  543. return ret;
  544. }
  545. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  546. /**
  547. * q6core_get_avcs_version_per_service -
  548. * to get api version of a particular service
  549. *
  550. * @service_id: id of the service
  551. *
  552. * Returns valid version on success or error (negative value) on failure
  553. */
  554. int q6core_get_avcs_api_version_per_service(uint32_t service_id)
  555. {
  556. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  557. int i;
  558. uint32_t num_services;
  559. int ret = 0;
  560. if (service_id == AVCS_SERVICE_ID_ALL)
  561. return -EINVAL;
  562. ret = q6core_get_avcs_fwk_version();
  563. if (ret < 0) {
  564. pr_err("%s: failure in getting AVCS version\n", __func__);
  565. return ret;
  566. }
  567. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  568. num_services = cached_ver_info->avcs_fwk_version.num_services;
  569. for (i = 0; i < num_services; i++) {
  570. if (cached_ver_info->services[i].service_id == service_id)
  571. return cached_ver_info->services[i].api_version;
  572. }
  573. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  574. return -EINVAL;
  575. }
  576. EXPORT_SYMBOL(q6core_get_avcs_api_version_per_service);
  577. /**
  578. * core_set_license -
  579. * command to set license for module
  580. *
  581. * @key: license key hash
  582. * @module_id: DSP Module ID
  583. *
  584. * Returns 0 on success or error on failure
  585. */
  586. int32_t core_set_license(uint32_t key, uint32_t module_id)
  587. {
  588. struct avcs_cmd_set_license *cmd_setl = NULL;
  589. struct cal_block_data *cal_block = NULL;
  590. int rc = 0, packet_size = 0;
  591. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  592. mutex_lock(&(q6core_lcl.cmd_lock));
  593. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  594. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  595. rc = -EINVAL;
  596. goto cmd_unlock;
  597. }
  598. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  599. cal_block = cal_utils_get_cal_block_by_key(
  600. q6core_lcl.cal_data[META_CAL], key);
  601. if (cal_block == NULL ||
  602. cal_block->cal_data.kvaddr == NULL ||
  603. cal_block->cal_data.size <= 0) {
  604. pr_err("%s: Invalid cal block to send", __func__);
  605. rc = -EINVAL;
  606. goto cal_data_unlock;
  607. }
  608. packet_size = sizeof(struct avcs_cmd_set_license) +
  609. cal_block->cal_data.size;
  610. /*round up total packet_size to next 4 byte boundary*/
  611. packet_size = ((packet_size + 0x3)>>2)<<2;
  612. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  613. if (cmd_setl == NULL) {
  614. rc = -ENOMEM;
  615. goto cal_data_unlock;
  616. }
  617. ocm_core_open();
  618. if (q6core_lcl.core_handle_q == NULL) {
  619. pr_err("%s: apr registration for CORE failed\n", __func__);
  620. rc = -ENODEV;
  621. goto fail_cmd;
  622. }
  623. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  624. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  625. cmd_setl->hdr.pkt_size = packet_size;
  626. cmd_setl->hdr.src_port = 0;
  627. cmd_setl->hdr.dest_port = 0;
  628. cmd_setl->hdr.token = 0;
  629. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  630. cmd_setl->id = module_id;
  631. cmd_setl->overwrite = 1;
  632. cmd_setl->size = cal_block->cal_data.size;
  633. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  634. cal_block->cal_data.kvaddr,
  635. cal_block->cal_data.size);
  636. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  637. __func__, cmd_setl->hdr.opcode,
  638. cmd_setl->id, cmd_setl->size);
  639. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  640. if (rc < 0)
  641. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  642. __func__, cmd_setl->hdr.opcode, rc);
  643. fail_cmd:
  644. kfree(cmd_setl);
  645. cal_data_unlock:
  646. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  647. cmd_unlock:
  648. mutex_unlock(&(q6core_lcl.cmd_lock));
  649. return rc;
  650. }
  651. EXPORT_SYMBOL(core_set_license);
  652. /**
  653. * core_get_license_status -
  654. * command to retrieve license status for module
  655. *
  656. * @module_id: DSP Module ID
  657. *
  658. * Returns 0 on success or error on failure
  659. */
  660. int32_t core_get_license_status(uint32_t module_id)
  661. {
  662. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  663. int ret = 0;
  664. pr_debug("%s: module_id 0x%x", __func__, module_id);
  665. mutex_lock(&(q6core_lcl.cmd_lock));
  666. ocm_core_open();
  667. if (q6core_lcl.core_handle_q == NULL) {
  668. pr_err("%s: apr registration for CORE failed\n", __func__);
  669. ret = -ENODEV;
  670. goto fail_cmd;
  671. }
  672. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  673. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  674. get_lvr_cmd.hdr.pkt_size =
  675. sizeof(struct avcs_cmd_get_license_validation_result);
  676. get_lvr_cmd.hdr.src_port = 0;
  677. get_lvr_cmd.hdr.dest_port = 0;
  678. get_lvr_cmd.hdr.token = 0;
  679. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  680. get_lvr_cmd.id = module_id;
  681. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  682. if (ret < 0) {
  683. pr_err("%s: license_validation request failed, err %d\n",
  684. __func__, ret);
  685. ret = -EREMOTE;
  686. goto fail_cmd;
  687. }
  688. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  689. mutex_unlock(&(q6core_lcl.cmd_lock));
  690. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  691. (q6core_lcl.cmd_resp_received_flag ==
  692. FLAG_CMDRSP_LICENSE_RESULT),
  693. msecs_to_jiffies(TIMEOUT_MS));
  694. mutex_lock(&(q6core_lcl.cmd_lock));
  695. if (!ret) {
  696. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  697. __func__);
  698. ret = -ETIME;
  699. goto fail_cmd;
  700. }
  701. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  702. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  703. fail_cmd:
  704. mutex_unlock(&(q6core_lcl.cmd_lock));
  705. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  706. __func__, ret, module_id);
  707. return ret;
  708. }
  709. EXPORT_SYMBOL(core_get_license_status);
  710. /**
  711. * core_set_dolby_manufacturer_id -
  712. * command to set dolby manufacturer id
  713. *
  714. * @manufacturer_id: Dolby manufacturer id
  715. *
  716. * Returns 0 on success or error on failure
  717. */
  718. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  719. {
  720. struct adsp_dolby_manufacturer_id payload;
  721. int rc = 0;
  722. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  723. mutex_lock(&(q6core_lcl.cmd_lock));
  724. ocm_core_open();
  725. if (q6core_lcl.core_handle_q) {
  726. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  727. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  728. payload.hdr.pkt_size =
  729. sizeof(struct adsp_dolby_manufacturer_id);
  730. payload.hdr.src_port = 0;
  731. payload.hdr.dest_port = 0;
  732. payload.hdr.token = 0;
  733. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  734. payload.manufacturer_id = manufacturer_id;
  735. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  736. __func__,
  737. payload.hdr.opcode, payload.manufacturer_id);
  738. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  739. (uint32_t *)&payload);
  740. if (rc < 0)
  741. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  742. __func__, payload.hdr.opcode, rc);
  743. }
  744. mutex_unlock(&(q6core_lcl.cmd_lock));
  745. return rc;
  746. }
  747. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  748. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  749. bool preload_type)
  750. {
  751. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  752. int ret = 0;
  753. mutex_lock(&(q6core_lcl.cmd_lock));
  754. ocm_core_open();
  755. if (q6core_lcl.core_handle_q == NULL) {
  756. pr_err("%s: apr registration for CORE failed\n", __func__);
  757. ret = -ENODEV;
  758. goto done;
  759. }
  760. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  761. load_unload_topo_modules.hdr.hdr_field =
  762. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  763. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  764. load_unload_topo_modules.hdr.pkt_size =
  765. sizeof(struct avcs_cmd_load_unload_topo_modules);
  766. load_unload_topo_modules.hdr.src_port = 0;
  767. load_unload_topo_modules.hdr.dest_port = 0;
  768. load_unload_topo_modules.hdr.token = 0;
  769. if (preload_type == CORE_LOAD_TOPOLOGY)
  770. load_unload_topo_modules.hdr.opcode =
  771. AVCS_CMD_LOAD_TOPO_MODULES;
  772. else
  773. load_unload_topo_modules.hdr.opcode =
  774. AVCS_CMD_UNLOAD_TOPO_MODULES;
  775. load_unload_topo_modules.topology_id = topo_id;
  776. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  777. (uint32_t *) &load_unload_topo_modules);
  778. if (ret < 0) {
  779. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  780. __func__, topo_id, ret);
  781. ret = -EINVAL;
  782. }
  783. done:
  784. mutex_unlock(&(q6core_lcl.cmd_lock));
  785. return ret;
  786. }
  787. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  788. /**
  789. * q6core_is_adsp_ready - check adsp ready status
  790. *
  791. * Returns true if adsp is ready otherwise returns false
  792. */
  793. bool q6core_is_adsp_ready(void)
  794. {
  795. int rc = 0;
  796. bool ret = false;
  797. struct apr_hdr hdr;
  798. pr_debug("%s: enter\n", __func__);
  799. memset(&hdr, 0, sizeof(hdr));
  800. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  801. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  802. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  803. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  804. mutex_lock(&(q6core_lcl.cmd_lock));
  805. ocm_core_open();
  806. if (q6core_lcl.core_handle_q) {
  807. q6core_lcl.bus_bw_resp_received = 0;
  808. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  809. if (rc < 0) {
  810. pr_err("%s: Get ADSP state APR packet send event %d\n",
  811. __func__, rc);
  812. goto bail;
  813. }
  814. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  815. (q6core_lcl.bus_bw_resp_received == 1),
  816. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  817. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  818. /* ensure to read updated param by callback thread */
  819. rmb();
  820. ret = !!q6core_lcl.param;
  821. }
  822. }
  823. bail:
  824. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  825. mutex_unlock(&(q6core_lcl.cmd_lock));
  826. return ret;
  827. }
  828. EXPORT_SYMBOL(q6core_is_adsp_ready);
  829. int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  830. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  831. {
  832. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  833. struct avs_shared_map_region_payload *mregions = NULL;
  834. void *mmap_region_cmd = NULL;
  835. void *payload = NULL;
  836. int ret = 0;
  837. int i = 0;
  838. int cmd_size = 0;
  839. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  840. + sizeof(struct avs_shared_map_region_payload)
  841. * bufcnt;
  842. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  843. if (mmap_region_cmd == NULL)
  844. return -ENOMEM;
  845. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  846. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  847. APR_HDR_LEN(APR_HDR_SIZE),
  848. APR_PKT_VER);
  849. mmap_regions->hdr.pkt_size = cmd_size;
  850. mmap_regions->hdr.src_port = 0;
  851. mmap_regions->hdr.dest_port = 0;
  852. mmap_regions->hdr.token = 0;
  853. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  854. mmap_regions->mem_pool_id = mempool_id & 0x00ff;
  855. mmap_regions->num_regions = bufcnt & 0x00ff;
  856. mmap_regions->property_flag = 0x00;
  857. payload = ((u8 *) mmap_region_cmd +
  858. sizeof(struct avs_cmd_shared_mem_map_regions));
  859. mregions = (struct avs_shared_map_region_payload *)payload;
  860. for (i = 0; i < bufcnt; i++) {
  861. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  862. mregions->shm_addr_msw =
  863. msm_audio_populate_upper_32_bits(buf_add[i]);
  864. mregions->mem_size_bytes = bufsz[i];
  865. ++mregions;
  866. }
  867. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  868. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  869. *map_handle = 0;
  870. q6core_lcl.adsp_status = 0;
  871. q6core_lcl.bus_bw_resp_received = 0;
  872. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  873. mmap_regions);
  874. if (ret < 0) {
  875. pr_err("%s: mmap regions failed %d\n",
  876. __func__, ret);
  877. ret = -EINVAL;
  878. goto done;
  879. }
  880. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  881. (q6core_lcl.bus_bw_resp_received == 1),
  882. msecs_to_jiffies(TIMEOUT_MS));
  883. if (!ret) {
  884. pr_err("%s: timeout. waited for memory map\n", __func__);
  885. ret = -ETIME;
  886. goto done;
  887. } else {
  888. /* set ret to 0 as no timeout happened */
  889. ret = 0;
  890. }
  891. if (q6core_lcl.adsp_status < 0) {
  892. pr_err("%s: DSP returned error %d\n",
  893. __func__, q6core_lcl.adsp_status);
  894. ret = q6core_lcl.adsp_status;
  895. goto done;
  896. }
  897. *map_handle = q6core_lcl.mem_map_cal_handle;
  898. done:
  899. kfree(mmap_region_cmd);
  900. return ret;
  901. }
  902. /**
  903. * q6core_map_mdf_memory_regions - for sending MDF shared memory map information
  904. * to ADSP.
  905. *
  906. * @buf_add: array of buffers.
  907. * @mempool_id: memory pool ID
  908. * @bufsz: size of the buffer
  909. * @bufcnt: buffers count
  910. * @map_handle: map handle received from ADSP
  911. */
  912. int q6core_map_mdf_memory_regions(uint64_t *buf_add, uint32_t mempool_id,
  913. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  914. {
  915. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  916. struct avs_shared_map_region_payload *mregions = NULL;
  917. void *mmap_region_cmd = NULL;
  918. void *payload = NULL;
  919. int ret = 0;
  920. int i = 0;
  921. int cmd_size = 0;
  922. mutex_lock(&q6core_lcl.cmd_lock);
  923. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  924. + sizeof(struct avs_shared_map_region_payload)
  925. * bufcnt;
  926. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  927. if (mmap_region_cmd == NULL)
  928. return -ENOMEM;
  929. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  930. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  931. APR_HDR_LEN(APR_HDR_SIZE),
  932. APR_PKT_VER);
  933. mmap_regions->hdr.pkt_size = cmd_size;
  934. mmap_regions->hdr.src_port = 0;
  935. mmap_regions->hdr.dest_port = 0;
  936. mmap_regions->hdr.token = MDF_MAP_TOKEN;
  937. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  938. mmap_regions->mem_pool_id = mempool_id & MEMPOOL_ID_MASK;
  939. mmap_regions->num_regions = bufcnt & 0x00ff;
  940. mmap_regions->property_flag = 0x00;
  941. payload = ((u8 *) mmap_region_cmd +
  942. sizeof(struct avs_cmd_shared_mem_map_regions));
  943. mregions = (struct avs_shared_map_region_payload *)payload;
  944. for (i = 0; i < bufcnt; i++) {
  945. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  946. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  947. mregions->mem_size_bytes = bufsz[i];
  948. ++mregions;
  949. }
  950. pr_debug("%s: sending MDF memory map, addr %pK, size %d, bufcnt = %d\n",
  951. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  952. *map_handle = 0;
  953. q6core_lcl.adsp_status = 0;
  954. q6core_lcl.mdf_map_resp_received = 0;
  955. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  956. mmap_regions);
  957. if (ret < 0) {
  958. pr_err("%s: mmap regions failed %d\n",
  959. __func__, ret);
  960. ret = -EINVAL;
  961. goto done;
  962. }
  963. ret = wait_event_timeout(q6core_lcl.mdf_map_resp_wait,
  964. (q6core_lcl.mdf_map_resp_received == 1),
  965. msecs_to_jiffies(TIMEOUT_MS));
  966. if (!ret) {
  967. pr_err("%s: timeout. waited for memory map\n", __func__);
  968. ret = -ETIMEDOUT;
  969. goto done;
  970. } else {
  971. /* set ret to 0 as no timeout happened */
  972. ret = 0;
  973. }
  974. if (q6core_lcl.adsp_status < 0) {
  975. pr_err("%s: DSP returned error %d\n",
  976. __func__, q6core_lcl.adsp_status);
  977. ret = q6core_lcl.adsp_status;
  978. goto done;
  979. }
  980. *map_handle = q6core_lcl.mdf_mem_map_cal_handle;
  981. done:
  982. kfree(mmap_region_cmd);
  983. mutex_unlock(&q6core_lcl.cmd_lock);
  984. return ret;
  985. }
  986. EXPORT_SYMBOL(q6core_map_mdf_memory_regions);
  987. int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  988. {
  989. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  990. int ret = 0;
  991. memset(&unmap_regions, 0, sizeof(unmap_regions));
  992. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  993. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  994. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  995. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  996. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  997. unmap_regions.hdr.src_port = 0;
  998. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  999. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  1000. unmap_regions.hdr.dest_port = 0;
  1001. unmap_regions.hdr.token = 0;
  1002. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  1003. unmap_regions.mem_map_handle = mem_map_handle;
  1004. q6core_lcl.adsp_status = 0;
  1005. q6core_lcl.bus_bw_resp_received = 0;
  1006. pr_debug("%s: unmap regions map handle %d\n",
  1007. __func__, mem_map_handle);
  1008. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1009. &unmap_regions);
  1010. if (ret < 0) {
  1011. pr_err("%s: unmap regions failed %d\n",
  1012. __func__, ret);
  1013. ret = -EINVAL;
  1014. goto done;
  1015. }
  1016. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1017. (q6core_lcl.bus_bw_resp_received == 1),
  1018. msecs_to_jiffies(TIMEOUT_MS));
  1019. if (!ret) {
  1020. pr_err("%s: timeout. waited for memory_unmap\n",
  1021. __func__);
  1022. ret = -ETIME;
  1023. goto done;
  1024. } else {
  1025. /* set ret to 0 as no timeout happened */
  1026. ret = 0;
  1027. }
  1028. if (q6core_lcl.adsp_status < 0) {
  1029. pr_err("%s: DSP returned error %d\n",
  1030. __func__, q6core_lcl.adsp_status);
  1031. ret = q6core_lcl.adsp_status;
  1032. goto done;
  1033. }
  1034. done:
  1035. return ret;
  1036. }
  1037. int q6core_map_mdf_shared_memory(uint32_t map_handle, uint64_t *buf_add,
  1038. uint32_t proc_id, uint32_t *bufsz, uint32_t bufcnt)
  1039. {
  1040. struct avs_cmd_map_mdf_shared_memory *mmap_regions = NULL;
  1041. struct avs_shared_map_region_payload *mregions = NULL;
  1042. void *mmap_region_cmd = NULL;
  1043. void *payload = NULL;
  1044. int ret = 0;
  1045. int i = 0;
  1046. int cmd_size = 0;
  1047. cmd_size = sizeof(struct avs_cmd_map_mdf_shared_memory)
  1048. + sizeof(struct avs_shared_map_region_payload)
  1049. * bufcnt;
  1050. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1051. if (mmap_region_cmd == NULL)
  1052. return -ENOMEM;
  1053. mmap_regions = (struct avs_cmd_map_mdf_shared_memory *)mmap_region_cmd;
  1054. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1055. APR_HDR_LEN(APR_HDR_SIZE),
  1056. APR_PKT_VER);
  1057. mmap_regions->hdr.pkt_size = cmd_size;
  1058. mmap_regions->hdr.src_port = 0;
  1059. mmap_regions->hdr.dest_port = 0;
  1060. mmap_regions->hdr.token = 0;
  1061. mmap_regions->hdr.opcode = AVCS_CMD_MAP_MDF_SHARED_MEMORY;
  1062. mmap_regions->mem_map_handle = map_handle;
  1063. mmap_regions->proc_id = proc_id & 0x00ff;
  1064. mmap_regions->num_regions = bufcnt & 0x00ff;
  1065. payload = ((u8 *) mmap_region_cmd +
  1066. sizeof(struct avs_cmd_map_mdf_shared_memory));
  1067. mregions = (struct avs_shared_map_region_payload *)payload;
  1068. for (i = 0; i < bufcnt; i++) {
  1069. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1070. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1071. mregions->mem_size_bytes = bufsz[i];
  1072. ++mregions;
  1073. }
  1074. pr_debug("%s: sending mdf memory map, addr %pa, size %d, bufcnt = %d\n",
  1075. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1076. q6core_lcl.adsp_status = 0;
  1077. q6core_lcl.bus_bw_resp_received = 0;
  1078. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1079. mmap_regions);
  1080. if (ret < 0) {
  1081. pr_err("%s: mdf memory map failed %d\n",
  1082. __func__, ret);
  1083. ret = -EINVAL;
  1084. goto done;
  1085. }
  1086. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1087. (q6core_lcl.bus_bw_resp_received == 1),
  1088. msecs_to_jiffies(TIMEOUT_MS));
  1089. if (!ret) {
  1090. pr_err("%s: timeout. waited for mdf memory map\n",
  1091. __func__);
  1092. ret = -ETIME;
  1093. goto done;
  1094. } else {
  1095. /* set ret to 0 as no timeout happened */
  1096. ret = 0;
  1097. }
  1098. /*
  1099. * When the remote DSP is not ready, the ADSP will validate and store
  1100. * the memory information and return APR_ENOTREADY to HLOS. The ADSP
  1101. * will map the memory with remote DSP when it is ready. HLOS should
  1102. * not treat APR_ENOTREADY as an error.
  1103. */
  1104. if (q6core_lcl.adsp_status != -APR_ENOTREADY) {
  1105. pr_err("%s: DSP returned error %d\n",
  1106. __func__, q6core_lcl.adsp_status);
  1107. ret = q6core_lcl.adsp_status;
  1108. goto done;
  1109. }
  1110. done:
  1111. kfree(mmap_region_cmd);
  1112. return ret;
  1113. }
  1114. static int q6core_dereg_all_custom_topologies(void)
  1115. {
  1116. int ret = 0;
  1117. struct avcs_cmd_deregister_topologies dereg_top;
  1118. memset(&dereg_top, 0, sizeof(dereg_top));
  1119. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1120. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1121. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  1122. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1123. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1124. dereg_top.hdr.src_port = 0;
  1125. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1126. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1127. dereg_top.hdr.dest_port = 0;
  1128. dereg_top.hdr.token = 0;
  1129. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  1130. dereg_top.payload_addr_lsw = 0;
  1131. dereg_top.payload_addr_msw = 0;
  1132. dereg_top.mem_map_handle = 0;
  1133. dereg_top.payload_size = 0;
  1134. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  1135. q6core_lcl.bus_bw_resp_received = 0;
  1136. pr_debug("%s: Deregister topologies mode %d\n",
  1137. __func__, dereg_top.mode);
  1138. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  1139. if (ret < 0) {
  1140. pr_err("%s: Deregister topologies failed %d\n",
  1141. __func__, ret);
  1142. goto done;
  1143. }
  1144. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1145. (q6core_lcl.bus_bw_resp_received == 1),
  1146. msecs_to_jiffies(TIMEOUT_MS));
  1147. if (!ret) {
  1148. pr_err("%s: wait_event timeout for Deregister topologies\n",
  1149. __func__);
  1150. goto done;
  1151. }
  1152. done:
  1153. return ret;
  1154. }
  1155. static int q6core_send_custom_topologies(void)
  1156. {
  1157. int ret = 0;
  1158. int ret2 = 0;
  1159. struct cal_block_data *cal_block = NULL;
  1160. struct avcs_cmd_register_topologies reg_top;
  1161. if (!q6core_is_adsp_ready()) {
  1162. pr_err("%s: ADSP is not ready!\n", __func__);
  1163. return -ENODEV;
  1164. }
  1165. memset(&reg_top, 0, sizeof(reg_top));
  1166. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1167. mutex_lock(&q6core_lcl.cmd_lock);
  1168. cal_block = cal_utils_get_only_cal_block(
  1169. q6core_lcl.cal_data[CUST_TOP_CAL]);
  1170. if (cal_block == NULL) {
  1171. pr_debug("%s: cal block is NULL!\n", __func__);
  1172. goto unlock;
  1173. }
  1174. if (cal_block->cal_data.size <= 0) {
  1175. pr_debug("%s: cal size is %zd not sending\n",
  1176. __func__, cal_block->cal_data.size);
  1177. goto unlock;
  1178. }
  1179. q6core_dereg_all_custom_topologies();
  1180. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr,
  1181. ADSP_MEMORY_MAP_SHMEM8_4K_POOL,
  1182. (uint32_t *)&cal_block->map_data.map_size, 1,
  1183. &cal_block->map_data.q6map_handle);
  1184. if (ret) {
  1185. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  1186. goto unlock;
  1187. }
  1188. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1189. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1190. reg_top.hdr.pkt_size = sizeof(reg_top);
  1191. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1192. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1193. reg_top.hdr.src_port = 0;
  1194. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1195. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1196. reg_top.hdr.dest_port = 0;
  1197. reg_top.hdr.token = 0;
  1198. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  1199. reg_top.payload_addr_lsw =
  1200. lower_32_bits(cal_block->cal_data.paddr);
  1201. reg_top.payload_addr_msw =
  1202. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  1203. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  1204. reg_top.payload_size = cal_block->cal_data.size;
  1205. q6core_lcl.adsp_status = 0;
  1206. q6core_lcl.bus_bw_resp_received = 0;
  1207. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  1208. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  1209. cal_block->map_data.q6map_handle);
  1210. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  1211. if (ret < 0) {
  1212. pr_err("%s: Register topologies failed %d\n",
  1213. __func__, ret);
  1214. goto unmap;
  1215. }
  1216. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1217. (q6core_lcl.bus_bw_resp_received == 1),
  1218. msecs_to_jiffies(TIMEOUT_MS));
  1219. if (!ret) {
  1220. pr_err("%s: wait_event timeout for Register topologies\n",
  1221. __func__);
  1222. goto unmap;
  1223. }
  1224. if (q6core_lcl.adsp_status < 0)
  1225. ret = q6core_lcl.adsp_status;
  1226. unmap:
  1227. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  1228. if (ret2) {
  1229. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  1230. __func__, cal_block->map_data.q6map_handle);
  1231. ret = ret2;
  1232. goto unlock;
  1233. }
  1234. unlock:
  1235. mutex_unlock(&q6core_lcl.cmd_lock);
  1236. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1237. return ret;
  1238. }
  1239. static int get_cal_type_index(int32_t cal_type)
  1240. {
  1241. int ret = -EINVAL;
  1242. switch (cal_type) {
  1243. case AUDIO_CORE_METAINFO_CAL_TYPE:
  1244. ret = META_CAL;
  1245. break;
  1246. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  1247. ret = CUST_TOP_CAL;
  1248. break;
  1249. default:
  1250. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  1251. }
  1252. return ret;
  1253. }
  1254. static int q6core_alloc_cal(int32_t cal_type,
  1255. size_t data_size, void *data)
  1256. {
  1257. int ret = 0;
  1258. int cal_index;
  1259. cal_index = get_cal_type_index(cal_type);
  1260. if (cal_index < 0) {
  1261. pr_err("%s: could not get cal index %d!\n",
  1262. __func__, cal_index);
  1263. ret = -EINVAL;
  1264. goto done;
  1265. }
  1266. ret = cal_utils_alloc_cal(data_size, data,
  1267. q6core_lcl.cal_data[cal_index], 0, NULL);
  1268. if (ret < 0) {
  1269. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  1270. __func__, ret, cal_type);
  1271. goto done;
  1272. }
  1273. done:
  1274. return ret;
  1275. }
  1276. static int q6core_dealloc_cal(int32_t cal_type,
  1277. size_t data_size, void *data)
  1278. {
  1279. int ret = 0;
  1280. int cal_index;
  1281. cal_index = get_cal_type_index(cal_type);
  1282. if (cal_index < 0) {
  1283. pr_err("%s: could not get cal index %d!\n",
  1284. __func__, cal_index);
  1285. ret = -EINVAL;
  1286. goto done;
  1287. }
  1288. ret = cal_utils_dealloc_cal(data_size, data,
  1289. q6core_lcl.cal_data[cal_index]);
  1290. if (ret < 0) {
  1291. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  1292. __func__, ret, cal_type);
  1293. goto done;
  1294. }
  1295. done:
  1296. return ret;
  1297. }
  1298. static int q6core_set_cal(int32_t cal_type,
  1299. size_t data_size, void *data)
  1300. {
  1301. int ret = 0;
  1302. int cal_index;
  1303. cal_index = get_cal_type_index(cal_type);
  1304. if (cal_index < 0) {
  1305. pr_err("%s: could not get cal index %d!\n",
  1306. __func__, cal_index);
  1307. ret = -EINVAL;
  1308. goto done;
  1309. }
  1310. ret = cal_utils_set_cal(data_size, data,
  1311. q6core_lcl.cal_data[cal_index], 0, NULL);
  1312. if (ret < 0) {
  1313. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  1314. __func__, ret, cal_type);
  1315. goto done;
  1316. }
  1317. if (cal_index == CUST_TOP_CAL)
  1318. ret = q6core_send_custom_topologies();
  1319. done:
  1320. return ret;
  1321. }
  1322. static void q6core_delete_cal_data(void)
  1323. {
  1324. pr_debug("%s:\n", __func__);
  1325. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1326. }
  1327. static int q6core_init_cal_data(void)
  1328. {
  1329. int ret = 0;
  1330. struct cal_type_info cal_type_info[] = {
  1331. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1332. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1333. q6core_set_cal, NULL, NULL} },
  1334. {NULL, NULL, cal_utils_match_buf_num} },
  1335. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1336. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1337. q6core_set_cal, NULL, NULL} },
  1338. {NULL, NULL, cal_utils_match_buf_num} }
  1339. };
  1340. pr_debug("%s:\n", __func__);
  1341. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1342. q6core_lcl.cal_data, cal_type_info);
  1343. if (ret < 0) {
  1344. pr_err("%s: could not create cal type!\n",
  1345. __func__);
  1346. goto err;
  1347. }
  1348. return ret;
  1349. err:
  1350. q6core_delete_cal_data();
  1351. return ret;
  1352. }
  1353. static int q6core_is_avs_up(int32_t *avs_state)
  1354. {
  1355. unsigned long timeout;
  1356. int32_t adsp_ready = 0;
  1357. int ret = 0;
  1358. timeout = jiffies +
  1359. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  1360. do {
  1361. adsp_ready = q6core_is_adsp_ready();
  1362. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1363. adsp_ready ? "ready" : "not ready");
  1364. if (adsp_ready)
  1365. break;
  1366. /*
  1367. * ADSP will be coming up after boot up and AVS might
  1368. * not be fully up when the control reaches here.
  1369. * So, wait for 50msec before checking ADSP state again.
  1370. */
  1371. msleep(50);
  1372. } while (time_after(timeout, jiffies));
  1373. *avs_state = adsp_ready;
  1374. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1375. adsp_ready ? "ready" : "not ready");
  1376. if (!adsp_ready) {
  1377. pr_err_ratelimited("%s: Timeout. ADSP Audio is not ready\n",
  1378. __func__);
  1379. ret = -ETIMEDOUT;
  1380. }
  1381. return ret;
  1382. }
  1383. static int q6core_ssr_enable(struct device *dev, void *data)
  1384. {
  1385. int32_t avs_state = 0;
  1386. int ret = 0;
  1387. if (!dev) {
  1388. pr_err("%s: dev is NULL\n", __func__);
  1389. return -EINVAL;
  1390. }
  1391. if (!q6core_lcl.avs_state) {
  1392. ret = q6core_is_avs_up(&avs_state);
  1393. if (ret < 0)
  1394. goto err;
  1395. q6core_lcl.avs_state = avs_state;
  1396. }
  1397. err:
  1398. return ret;
  1399. }
  1400. static void q6core_ssr_disable(struct device *dev, void *data)
  1401. {
  1402. /* Reset AVS state to 0 */
  1403. q6core_lcl.avs_state = 0;
  1404. }
  1405. static const struct snd_event_ops q6core_ssr_ops = {
  1406. .enable = q6core_ssr_enable,
  1407. .disable = q6core_ssr_disable,
  1408. };
  1409. static int q6core_probe(struct platform_device *pdev)
  1410. {
  1411. int32_t avs_state = 0;
  1412. int rc = 0;
  1413. rc = q6core_is_avs_up(&avs_state);
  1414. if (rc < 0)
  1415. goto err;
  1416. q6core_lcl.avs_state = avs_state;
  1417. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1418. if (rc) {
  1419. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1420. __func__, rc);
  1421. rc = -EINVAL;
  1422. goto err;
  1423. }
  1424. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1425. rc = snd_event_client_register(&pdev->dev, &q6core_ssr_ops, NULL);
  1426. if (!rc) {
  1427. snd_event_notify(&pdev->dev, SND_EVENT_UP);
  1428. } else {
  1429. dev_err(&pdev->dev,
  1430. "%s: Registration with SND event fwk failed rc = %d\n",
  1431. __func__, rc);
  1432. rc = 0;
  1433. }
  1434. err:
  1435. return rc;
  1436. }
  1437. static int q6core_remove(struct platform_device *pdev)
  1438. {
  1439. snd_event_client_deregister(&pdev->dev);
  1440. of_platform_depopulate(&pdev->dev);
  1441. return 0;
  1442. }
  1443. static const struct of_device_id q6core_of_match[] = {
  1444. { .compatible = "qcom,q6core-audio", },
  1445. {},
  1446. };
  1447. static struct platform_driver q6core_driver = {
  1448. .probe = q6core_probe,
  1449. .remove = q6core_remove,
  1450. .driver = {
  1451. .name = "q6core_audio",
  1452. .owner = THIS_MODULE,
  1453. .of_match_table = q6core_of_match,
  1454. }
  1455. };
  1456. int __init core_init(void)
  1457. {
  1458. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1459. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1460. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1461. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1462. init_waitqueue_head(&q6core_lcl.mdf_map_resp_wait);
  1463. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1464. mutex_init(&q6core_lcl.cmd_lock);
  1465. mutex_init(&q6core_lcl.ver_lock);
  1466. q6core_init_cal_data();
  1467. q6core_init_uevent_kset();
  1468. return platform_driver_register(&q6core_driver);
  1469. }
  1470. void core_exit(void)
  1471. {
  1472. mutex_destroy(&q6core_lcl.cmd_lock);
  1473. mutex_destroy(&q6core_lcl.ver_lock);
  1474. q6core_delete_cal_data();
  1475. q6core_destroy_uevent_kset();
  1476. platform_driver_unregister(&q6core_driver);
  1477. }
  1478. MODULE_DESCRIPTION("ADSP core driver");
  1479. MODULE_LICENSE("GPL v2");