dp_rx_mon_status.c 62 KB

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  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "dp_internal.h"
  29. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  30. #include "htt.h"
  31. #ifdef FEATURE_PERPKT_INFO
  32. #include "dp_ratetable.h"
  33. #endif
  34. static inline
  35. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  36. uint32_t mac_id,
  37. struct dp_srng *dp_rxdma_srng,
  38. struct rx_desc_pool *rx_desc_pool,
  39. uint32_t num_req_buffers,
  40. union dp_rx_desc_list_elem_t **desc_list,
  41. union dp_rx_desc_list_elem_t **tail,
  42. uint8_t owner);
  43. static inline void
  44. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  45. struct hal_rx_ppdu_info *ppdu_info,
  46. struct cdp_rx_indication_ppdu *cdp_rx_ppdu);
  47. #ifndef QCA_SUPPORT_FULL_MON
  48. /**
  49. * dp_rx_mon_process () - Core brain processing for monitor mode
  50. *
  51. * This API processes monitor destination ring followed by monitor status ring
  52. * Called from bottom half (tasklet/NET_RX_SOFTIRQ)
  53. *
  54. * @soc: datapath soc context
  55. * @int_ctx: interrupt context
  56. * @mac_id: mac_id on which interrupt is received
  57. * @quota: Number of status ring entry that can be serviced in one shot.
  58. *
  59. * @Return: Number of reaped status ring entries
  60. */
  61. static inline uint32_t
  62. dp_rx_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  63. uint32_t mac_id, uint32_t quota)
  64. {
  65. return quota;
  66. }
  67. #endif
  68. #ifdef WLAN_RX_PKT_CAPTURE_ENH
  69. #include "dp_rx_mon_feature.h"
  70. #else
  71. static QDF_STATUS
  72. dp_rx_handle_enh_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  73. struct hal_rx_ppdu_info *ppdu_info)
  74. {
  75. return QDF_STATUS_SUCCESS;
  76. }
  77. static void
  78. dp_rx_mon_enh_capture_process(struct dp_pdev *pdev, uint32_t tlv_status,
  79. qdf_nbuf_t status_nbuf,
  80. struct hal_rx_ppdu_info *ppdu_info,
  81. bool *nbuf_used)
  82. {
  83. }
  84. #endif
  85. #ifdef WLAN_TX_PKT_CAPTURE_ENH
  86. #include "dp_rx_mon_feature.h"
  87. #else
  88. static QDF_STATUS
  89. dp_send_ack_frame_to_stack(struct dp_soc *soc,
  90. struct dp_pdev *pdev,
  91. struct hal_rx_ppdu_info *ppdu_info)
  92. {
  93. return QDF_STATUS_SUCCESS;
  94. }
  95. #endif
  96. #ifdef FEATURE_PERPKT_INFO
  97. static inline void
  98. dp_rx_populate_rx_rssi_chain(struct hal_rx_ppdu_info *ppdu_info,
  99. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  100. {
  101. uint8_t chain, bw;
  102. int8_t rssi;
  103. for (chain = 0; chain < SS_COUNT; chain++) {
  104. for (bw = 0; bw < MAX_BW; bw++) {
  105. rssi = ppdu_info->rx_status.rssi_chain[chain][bw];
  106. if (rssi != DP_RSSI_INVAL)
  107. cdp_rx_ppdu->rssi_chain[chain][bw] = rssi;
  108. else
  109. cdp_rx_ppdu->rssi_chain[chain][bw] = 0;
  110. }
  111. }
  112. }
  113. /*
  114. * dp_rx_populate_su_evm_details() - Populate su evm info
  115. * @ppdu_info: ppdu info structure from ppdu ring
  116. * @cdp_rx_ppdu: rx ppdu indication structure
  117. */
  118. static inline void
  119. dp_rx_populate_su_evm_details(struct hal_rx_ppdu_info *ppdu_info,
  120. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  121. {
  122. uint8_t pilot_evm;
  123. uint8_t nss_count;
  124. uint8_t pilot_count;
  125. nss_count = ppdu_info->evm_info.nss_count;
  126. pilot_count = ppdu_info->evm_info.pilot_count;
  127. if ((nss_count * pilot_count) > DP_RX_MAX_SU_EVM_COUNT) {
  128. qdf_err("pilot evm count is more than expected");
  129. return;
  130. }
  131. cdp_rx_ppdu->evm_info.pilot_count = pilot_count;
  132. cdp_rx_ppdu->evm_info.nss_count = nss_count;
  133. /* Populate evm for pilot_evm = nss_count*pilot_count */
  134. for (pilot_evm = 0; pilot_evm < nss_count * pilot_count; pilot_evm++) {
  135. cdp_rx_ppdu->evm_info.pilot_evm[pilot_evm] =
  136. ppdu_info->evm_info.pilot_evm[pilot_evm];
  137. }
  138. }
  139. /**
  140. * dp_rx_inc_rusize_cnt() - increment pdev stats based on RU size
  141. * @pdev: pdev ctx
  142. * @rx_user_status: mon rx user status
  143. *
  144. * Return: bool
  145. */
  146. static inline bool
  147. dp_rx_inc_rusize_cnt(struct dp_pdev *pdev,
  148. struct mon_rx_user_status *rx_user_status)
  149. {
  150. uint32_t ru_size;
  151. bool is_data;
  152. ru_size = rx_user_status->ofdma_ru_size;
  153. if (dp_is_subtype_data(rx_user_status->frame_control)) {
  154. DP_STATS_INC(pdev,
  155. ul_ofdma.data_rx_ru_size[ru_size], 1);
  156. is_data = true;
  157. } else {
  158. DP_STATS_INC(pdev,
  159. ul_ofdma.nondata_rx_ru_size[ru_size], 1);
  160. is_data = false;
  161. }
  162. return is_data;
  163. }
  164. /**
  165. * dp_rx_populate_cdp_indication_ppdu_user() - Populate per user cdp indication
  166. * @pdev: pdev ctx
  167. * @ppdu_info: ppdu info structure from ppdu ring
  168. * @cdp_rx_ppdu: Rx PPDU indication structure
  169. *
  170. * Return: none
  171. */
  172. static inline void
  173. dp_rx_populate_cdp_indication_ppdu_user(struct dp_pdev *pdev,
  174. struct hal_rx_ppdu_info *ppdu_info,
  175. struct cdp_rx_indication_ppdu
  176. *cdp_rx_ppdu)
  177. {
  178. struct dp_peer *peer;
  179. struct dp_soc *soc = pdev->soc;
  180. struct dp_ast_entry *ast_entry;
  181. uint32_t ast_index;
  182. int i;
  183. struct mon_rx_user_status *rx_user_status;
  184. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  185. int ru_size;
  186. bool is_data = false;
  187. uint32_t num_users;
  188. num_users = ppdu_info->com_info.num_users;
  189. for (i = 0; i < num_users; i++) {
  190. if (i > OFDMA_NUM_USERS)
  191. return;
  192. rx_user_status = &ppdu_info->rx_user_status[i];
  193. rx_stats_peruser = &cdp_rx_ppdu->user[i];
  194. ast_index = rx_user_status->ast_index;
  195. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  196. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  197. continue;
  198. }
  199. ast_entry = soc->ast_table[ast_index];
  200. if (!ast_entry) {
  201. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  202. continue;
  203. }
  204. peer = ast_entry->peer;
  205. if (!peer || peer->peer_id == HTT_INVALID_PEER) {
  206. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  207. continue;
  208. }
  209. rx_stats_peruser->first_data_seq_ctrl =
  210. rx_user_status->first_data_seq_ctrl;
  211. rx_stats_peruser->frame_control_info_valid =
  212. rx_user_status->frame_control_info_valid;
  213. rx_stats_peruser->frame_control =
  214. rx_user_status->frame_control;
  215. rx_stats_peruser->tcp_msdu_count =
  216. rx_user_status->tcp_msdu_count;
  217. rx_stats_peruser->udp_msdu_count =
  218. rx_user_status->udp_msdu_count;
  219. rx_stats_peruser->other_msdu_count =
  220. rx_user_status->other_msdu_count;
  221. rx_stats_peruser->num_msdu =
  222. rx_stats_peruser->tcp_msdu_count +
  223. rx_stats_peruser->udp_msdu_count +
  224. rx_stats_peruser->other_msdu_count;
  225. rx_stats_peruser->preamble_type =
  226. rx_user_status->preamble_type;
  227. rx_stats_peruser->mpdu_cnt_fcs_ok =
  228. rx_user_status->mpdu_cnt_fcs_ok;
  229. rx_stats_peruser->mpdu_cnt_fcs_err =
  230. rx_user_status->mpdu_cnt_fcs_err;
  231. qdf_mem_copy(&rx_stats_peruser->mpdu_fcs_ok_bitmap,
  232. &rx_user_status->mpdu_fcs_ok_bitmap,
  233. HAL_RX_NUM_WORDS_PER_PPDU_BITMAP *
  234. sizeof(rx_user_status->mpdu_fcs_ok_bitmap[0]));
  235. rx_stats_peruser->mpdu_ok_byte_count =
  236. rx_user_status->mpdu_ok_byte_count;
  237. rx_stats_peruser->mpdu_err_byte_count =
  238. rx_user_status->mpdu_err_byte_count;
  239. cdp_rx_ppdu->num_mpdu += rx_user_status->mpdu_cnt_fcs_ok;
  240. cdp_rx_ppdu->num_msdu += rx_stats_peruser->num_msdu;
  241. rx_stats_peruser->retries =
  242. CDP_FC_IS_RETRY_SET(rx_stats_peruser->frame_control) ?
  243. rx_stats_peruser->mpdu_cnt_fcs_ok : 0;
  244. if (rx_stats_peruser->mpdu_cnt_fcs_ok > 1)
  245. rx_stats_peruser->is_ampdu = 1;
  246. else
  247. rx_stats_peruser->is_ampdu = 0;
  248. rx_stats_peruser->tid = ppdu_info->rx_status.tid;
  249. qdf_mem_copy(rx_stats_peruser->mac_addr,
  250. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  251. rx_stats_peruser->peer_id = peer->peer_id;
  252. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  253. rx_stats_peruser->vdev_id = peer->vdev->vdev_id;
  254. rx_stats_peruser->mu_ul_info_valid = 0;
  255. if (cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_OFDMA ||
  256. cdp_rx_ppdu->u.ppdu_type == HAL_RX_TYPE_MU_MIMO) {
  257. if (rx_user_status->mu_ul_info_valid) {
  258. rx_stats_peruser->nss = rx_user_status->nss;
  259. rx_stats_peruser->mcs = rx_user_status->mcs;
  260. rx_stats_peruser->mu_ul_info_valid =
  261. rx_user_status->mu_ul_info_valid;
  262. rx_stats_peruser->ofdma_ru_start_index =
  263. rx_user_status->ofdma_ru_start_index;
  264. rx_stats_peruser->ofdma_ru_width =
  265. rx_user_status->ofdma_ru_width;
  266. rx_stats_peruser->user_index = i;
  267. ru_size = rx_user_status->ofdma_ru_size;
  268. /*
  269. * max RU size will be equal to
  270. * HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2
  271. */
  272. if (ru_size >= OFDMA_NUM_RU_SIZE) {
  273. dp_err("invalid ru_size %d\n",
  274. ru_size);
  275. return;
  276. }
  277. is_data = dp_rx_inc_rusize_cnt(pdev,
  278. rx_user_status);
  279. }
  280. if (is_data) {
  281. /* counter to get number of MU OFDMA */
  282. pdev->stats.ul_ofdma.data_rx_ppdu++;
  283. pdev->stats.ul_ofdma.data_users[num_users]++;
  284. }
  285. }
  286. }
  287. }
  288. /**
  289. * dp_rx_populate_cdp_indication_ppdu() - Populate cdp rx indication structure
  290. * @pdev: pdev ctx
  291. * @ppdu_info: ppdu info structure from ppdu ring
  292. * @cdp_rx_ppdu: Rx PPDU indication structure
  293. *
  294. * Return: none
  295. */
  296. static inline void
  297. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  298. struct hal_rx_ppdu_info *ppdu_info,
  299. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  300. {
  301. struct dp_peer *peer;
  302. struct dp_soc *soc = pdev->soc;
  303. struct dp_ast_entry *ast_entry;
  304. uint32_t ast_index;
  305. uint32_t i;
  306. cdp_rx_ppdu->first_data_seq_ctrl =
  307. ppdu_info->rx_status.first_data_seq_ctrl;
  308. cdp_rx_ppdu->frame_ctrl =
  309. ppdu_info->rx_status.frame_control;
  310. cdp_rx_ppdu->tcp_msdu_count = ppdu_info->rx_status.tcp_msdu_count;
  311. cdp_rx_ppdu->udp_msdu_count = ppdu_info->rx_status.udp_msdu_count;
  312. cdp_rx_ppdu->other_msdu_count = ppdu_info->rx_status.other_msdu_count;
  313. cdp_rx_ppdu->u.preamble = ppdu_info->rx_status.preamble_type;
  314. /* num mpdu is consolidated and added together in num user loop */
  315. cdp_rx_ppdu->num_mpdu = ppdu_info->com_info.mpdu_cnt_fcs_ok;
  316. /* num msdu is consolidated and added together in num user loop */
  317. cdp_rx_ppdu->num_msdu = (cdp_rx_ppdu->tcp_msdu_count +
  318. cdp_rx_ppdu->udp_msdu_count +
  319. cdp_rx_ppdu->other_msdu_count);
  320. cdp_rx_ppdu->retries = CDP_FC_IS_RETRY_SET(cdp_rx_ppdu->frame_ctrl) ?
  321. ppdu_info->com_info.mpdu_cnt_fcs_ok : 0;
  322. if (ppdu_info->com_info.mpdu_cnt_fcs_ok > 1)
  323. cdp_rx_ppdu->is_ampdu = 1;
  324. else
  325. cdp_rx_ppdu->is_ampdu = 0;
  326. cdp_rx_ppdu->tid = ppdu_info->rx_status.tid;
  327. ast_index = ppdu_info->rx_status.ast_index;
  328. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  329. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  330. cdp_rx_ppdu->num_users = 0;
  331. goto end;
  332. }
  333. ast_entry = soc->ast_table[ast_index];
  334. if (!ast_entry) {
  335. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  336. cdp_rx_ppdu->num_users = 0;
  337. goto end;
  338. }
  339. peer = ast_entry->peer;
  340. if (!peer || peer->peer_id == HTT_INVALID_PEER) {
  341. cdp_rx_ppdu->peer_id = HTT_INVALID_PEER;
  342. cdp_rx_ppdu->num_users = 0;
  343. goto end;
  344. }
  345. qdf_mem_copy(cdp_rx_ppdu->mac_addr,
  346. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  347. cdp_rx_ppdu->peer_id = peer->peer_id;
  348. cdp_rx_ppdu->vdev_id = peer->vdev->vdev_id;
  349. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  350. cdp_rx_ppdu->length = ppdu_info->rx_status.ppdu_len;
  351. cdp_rx_ppdu->duration = ppdu_info->rx_status.duration;
  352. cdp_rx_ppdu->u.bw = ppdu_info->rx_status.bw;
  353. cdp_rx_ppdu->u.nss = ppdu_info->rx_status.nss;
  354. cdp_rx_ppdu->u.mcs = ppdu_info->rx_status.mcs;
  355. if ((ppdu_info->rx_status.sgi == VHT_SGI_NYSM) &&
  356. (ppdu_info->rx_status.preamble_type == HAL_RX_PKT_TYPE_11AC))
  357. cdp_rx_ppdu->u.gi = CDP_SGI_0_4_US;
  358. else
  359. cdp_rx_ppdu->u.gi = ppdu_info->rx_status.sgi;
  360. cdp_rx_ppdu->u.ldpc = ppdu_info->rx_status.ldpc;
  361. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  362. cdp_rx_ppdu->u.ltf_size = (ppdu_info->rx_status.he_data5 >>
  363. QDF_MON_STATUS_HE_LTF_SIZE_SHIFT) & 0x3;
  364. cdp_rx_ppdu->rssi = ppdu_info->rx_status.rssi_comb;
  365. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  366. cdp_rx_ppdu->channel = ppdu_info->rx_status.chan_num;
  367. cdp_rx_ppdu->beamformed = ppdu_info->rx_status.beamformed;
  368. cdp_rx_ppdu->num_bytes = ppdu_info->rx_status.ppdu_len;
  369. cdp_rx_ppdu->lsig_a = ppdu_info->rx_status.rate;
  370. cdp_rx_ppdu->u.ltf_size = ppdu_info->rx_status.ltf_size;
  371. dp_rx_populate_rx_rssi_chain(ppdu_info, cdp_rx_ppdu);
  372. dp_rx_populate_su_evm_details(ppdu_info, cdp_rx_ppdu);
  373. cdp_rx_ppdu->rx_antenna = ppdu_info->rx_status.rx_antenna;
  374. cdp_rx_ppdu->nf = ppdu_info->rx_status.chan_noise_floor;
  375. for (i = 0; i < MAX_CHAIN; i++)
  376. cdp_rx_ppdu->per_chain_rssi[i] = ppdu_info->rx_status.rssi[i];
  377. cdp_rx_ppdu->is_mcast_bcast = ppdu_info->nac_info.mcast_bcast;
  378. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  379. cdp_rx_ppdu->num_mpdu = 0;
  380. cdp_rx_ppdu->num_msdu = 0;
  381. dp_rx_populate_cdp_indication_ppdu_user(pdev, ppdu_info, cdp_rx_ppdu);
  382. return;
  383. end:
  384. dp_rx_populate_cfr_non_assoc_sta(pdev, ppdu_info, cdp_rx_ppdu);
  385. }
  386. #else
  387. static inline void
  388. dp_rx_populate_cdp_indication_ppdu(struct dp_pdev *pdev,
  389. struct hal_rx_ppdu_info *ppdu_info,
  390. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  391. {
  392. }
  393. #endif
  394. /**
  395. * dp_rx_stats_update() - Update per-peer statistics
  396. * @soc: Datapath SOC handle
  397. * @peer: Datapath peer handle
  398. * @ppdu: PPDU Descriptor
  399. *
  400. * Return: None
  401. */
  402. #ifdef FEATURE_PERPKT_INFO
  403. static inline void dp_rx_rate_stats_update(struct dp_peer *peer,
  404. struct cdp_rx_indication_ppdu *ppdu,
  405. uint32_t user)
  406. {
  407. uint32_t ratekbps = 0;
  408. uint32_t ppdu_rx_rate = 0;
  409. uint32_t nss = 0;
  410. uint8_t mcs = 0;
  411. uint32_t rix;
  412. uint16_t ratecode;
  413. struct cdp_rx_stats_ppdu_user *ppdu_user = NULL;
  414. if (!peer || !ppdu)
  415. return;
  416. if (ppdu->u.ppdu_type != HAL_RX_TYPE_SU) {
  417. ppdu_user = &ppdu->user[user];
  418. if (ppdu_user->nss == 0)
  419. nss = 0;
  420. else
  421. nss = ppdu_user->nss - 1;
  422. mcs = ppdu_user->mcs;
  423. } else {
  424. if (ppdu->u.nss == 0)
  425. nss = 0;
  426. else
  427. nss = ppdu->u.nss - 1;
  428. mcs = ppdu->u.mcs;
  429. }
  430. ratekbps = dp_getrateindex(ppdu->u.gi,
  431. mcs,
  432. nss,
  433. ppdu->u.preamble,
  434. ppdu->u.bw,
  435. &rix,
  436. &ratecode);
  437. if (!ratekbps)
  438. return;
  439. ppdu->rix = rix;
  440. DP_STATS_UPD(peer, rx.last_rx_rate, ratekbps);
  441. dp_ath_rate_lpf(peer->stats.rx.avg_rx_rate, ratekbps);
  442. ppdu_rx_rate = dp_ath_rate_out(peer->stats.rx.avg_rx_rate);
  443. DP_STATS_UPD(peer, rx.rnd_avg_rx_rate, ppdu_rx_rate);
  444. ppdu->rx_ratekbps = ratekbps;
  445. ppdu->rx_ratecode = ratecode;
  446. if (peer->vdev)
  447. peer->vdev->stats.rx.last_rx_rate = ratekbps;
  448. }
  449. static void dp_rx_stats_update(struct dp_pdev *pdev,
  450. struct cdp_rx_indication_ppdu *ppdu)
  451. {
  452. struct dp_soc *soc = NULL;
  453. uint8_t mcs, preamble, ac = 0, nss, ppdu_type;
  454. uint16_t num_msdu;
  455. uint8_t pkt_bw_offset;
  456. struct dp_peer *peer;
  457. struct cdp_rx_stats_ppdu_user *ppdu_user;
  458. uint32_t i;
  459. enum cdp_mu_packet_type mu_pkt_type;
  460. if (pdev)
  461. soc = pdev->soc;
  462. else
  463. return;
  464. if (!soc || soc->process_rx_status)
  465. return;
  466. preamble = ppdu->u.preamble;
  467. ppdu_type = ppdu->u.ppdu_type;
  468. for (i = 0; i < ppdu->num_users && i < CDP_MU_MAX_USERS; i++) {
  469. peer = NULL;
  470. ppdu_user = &ppdu->user[i];
  471. if (ppdu_user->peer_id != HTT_INVALID_PEER)
  472. peer = dp_peer_find_hash_find(soc, ppdu_user->mac_addr,
  473. 0, ppdu_user->vdev_id);
  474. if (!peer)
  475. peer = pdev->invalid_peer;
  476. ppdu->cookie = (void *)peer->wlanstats_ctx;
  477. if (ppdu_type == HAL_RX_TYPE_SU) {
  478. mcs = ppdu->u.mcs;
  479. nss = ppdu->u.nss;
  480. } else {
  481. mcs = ppdu_user->mcs;
  482. nss = ppdu_user->nss;
  483. }
  484. num_msdu = ppdu_user->num_msdu;
  485. switch (ppdu->u.bw) {
  486. case CMN_BW_20MHZ:
  487. pkt_bw_offset = PKT_BW_GAIN_20MHZ;
  488. break;
  489. case CMN_BW_40MHZ:
  490. pkt_bw_offset = PKT_BW_GAIN_40MHZ;
  491. break;
  492. case CMN_BW_80MHZ:
  493. pkt_bw_offset = PKT_BW_GAIN_80MHZ;
  494. break;
  495. case CMN_BW_160MHZ:
  496. pkt_bw_offset = PKT_BW_GAIN_160MHZ;
  497. break;
  498. default:
  499. pkt_bw_offset = 0;
  500. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  501. "Invalid BW index = %d", ppdu->u.bw);
  502. }
  503. DP_STATS_UPD(peer, rx.rssi, (ppdu->rssi + pkt_bw_offset));
  504. if (peer->stats.rx.avg_rssi == INVALID_RSSI)
  505. peer->stats.rx.avg_rssi =
  506. CDP_RSSI_IN(peer->stats.rx.rssi);
  507. else
  508. CDP_RSSI_UPDATE_AVG(peer->stats.rx.avg_rssi,
  509. peer->stats.rx.rssi);
  510. if ((preamble == DOT11_A) || (preamble == DOT11_B))
  511. nss = 1;
  512. if (ppdu_type == HAL_RX_TYPE_SU) {
  513. if (nss) {
  514. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  515. DP_STATS_INC(peer, rx.ppdu_nss[nss - 1], 1);
  516. }
  517. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_ok,
  518. ppdu_user->mpdu_cnt_fcs_ok);
  519. DP_STATS_INC(peer, rx.mpdu_cnt_fcs_err,
  520. ppdu_user->mpdu_cnt_fcs_err);
  521. }
  522. if (ppdu_type >= HAL_RX_TYPE_MU_MIMO &&
  523. ppdu_type <= HAL_RX_TYPE_MU_OFDMA) {
  524. if (ppdu_type == HAL_RX_TYPE_MU_MIMO)
  525. mu_pkt_type = RX_TYPE_MU_MIMO;
  526. else
  527. mu_pkt_type = RX_TYPE_MU_OFDMA;
  528. if (nss) {
  529. DP_STATS_INC(peer, rx.nss[nss - 1], num_msdu);
  530. DP_STATS_INC(peer,
  531. rx.rx_mu[mu_pkt_type].ppdu_nss[nss - 1],
  532. 1);
  533. }
  534. DP_STATS_INC(peer,
  535. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_ok,
  536. ppdu_user->mpdu_cnt_fcs_ok);
  537. DP_STATS_INC(peer,
  538. rx.rx_mu[mu_pkt_type].mpdu_cnt_fcs_err,
  539. ppdu_user->mpdu_cnt_fcs_err);
  540. }
  541. DP_STATS_INC(peer, rx.sgi_count[ppdu->u.gi], num_msdu);
  542. DP_STATS_INC(peer, rx.bw[ppdu->u.bw], num_msdu);
  543. DP_STATS_INC(peer, rx.reception_type[ppdu->u.ppdu_type],
  544. num_msdu);
  545. DP_STATS_INC(peer, rx.ppdu_cnt[ppdu->u.ppdu_type], 1);
  546. DP_STATS_INCC(peer, rx.ampdu_cnt, num_msdu,
  547. ppdu_user->is_ampdu);
  548. DP_STATS_INCC(peer, rx.non_ampdu_cnt, num_msdu,
  549. !(ppdu_user->is_ampdu));
  550. DP_STATS_UPD(peer, rx.rx_rate, mcs);
  551. DP_STATS_INCC(peer,
  552. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  553. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_A)));
  554. DP_STATS_INCC(peer,
  555. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  556. ((mcs < MAX_MCS_11A) && (preamble == DOT11_A)));
  557. DP_STATS_INCC(peer,
  558. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  559. ((mcs >= MAX_MCS_11B) && (preamble == DOT11_B)));
  560. DP_STATS_INCC(peer,
  561. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  562. ((mcs < MAX_MCS_11B) && (preamble == DOT11_B)));
  563. DP_STATS_INCC(peer,
  564. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  565. ((mcs >= MAX_MCS_11A) && (preamble == DOT11_N)));
  566. DP_STATS_INCC(peer,
  567. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  568. ((mcs < MAX_MCS_11A) && (preamble == DOT11_N)));
  569. DP_STATS_INCC(peer,
  570. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  571. ((mcs >= MAX_MCS_11AC) && (preamble == DOT11_AC)));
  572. DP_STATS_INCC(peer,
  573. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  574. ((mcs < MAX_MCS_11AC) && (preamble == DOT11_AC)));
  575. DP_STATS_INCC(peer,
  576. rx.pkt_type[preamble].mcs_count[MAX_MCS - 1], num_msdu,
  577. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  578. DP_STATS_INCC(peer,
  579. rx.pkt_type[preamble].mcs_count[mcs], num_msdu,
  580. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX)));
  581. DP_STATS_INCC(peer,
  582. rx.su_ax_ppdu_cnt.mcs_count[MAX_MCS - 1], 1,
  583. ((mcs >= (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  584. (ppdu_type == HAL_RX_TYPE_SU)));
  585. DP_STATS_INCC(peer,
  586. rx.su_ax_ppdu_cnt.mcs_count[mcs], 1,
  587. ((mcs < (MAX_MCS - 1)) && (preamble == DOT11_AX) &&
  588. (ppdu_type == HAL_RX_TYPE_SU)));
  589. DP_STATS_INCC(peer,
  590. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[MAX_MCS - 1],
  591. 1, ((mcs >= (MAX_MCS - 1)) &&
  592. (preamble == DOT11_AX) &&
  593. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  594. DP_STATS_INCC(peer,
  595. rx.rx_mu[RX_TYPE_MU_OFDMA].ppdu.mcs_count[mcs],
  596. 1, ((mcs < (MAX_MCS - 1)) &&
  597. (preamble == DOT11_AX) &&
  598. (ppdu_type == HAL_RX_TYPE_MU_OFDMA)));
  599. DP_STATS_INCC(peer,
  600. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[MAX_MCS - 1],
  601. 1, ((mcs >= (MAX_MCS - 1)) &&
  602. (preamble == DOT11_AX) &&
  603. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  604. DP_STATS_INCC(peer,
  605. rx.rx_mu[RX_TYPE_MU_MIMO].ppdu.mcs_count[mcs],
  606. 1, ((mcs < (MAX_MCS - 1)) &&
  607. (preamble == DOT11_AX) &&
  608. (ppdu_type == HAL_RX_TYPE_MU_MIMO)));
  609. /*
  610. * If invalid TID, it could be a non-qos frame, hence do not
  611. * update any AC counters
  612. */
  613. ac = TID_TO_WME_AC(ppdu_user->tid);
  614. if (ppdu->tid != HAL_TID_INVALID)
  615. DP_STATS_INC(peer, rx.wme_ac_type[ac], num_msdu);
  616. dp_peer_stats_notify(pdev, peer);
  617. DP_STATS_UPD(peer, rx.last_rssi, ppdu->rssi);
  618. if (peer == pdev->invalid_peer)
  619. continue;
  620. if (dp_is_subtype_data(ppdu->frame_ctrl))
  621. dp_rx_rate_stats_update(peer, ppdu, i);
  622. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  623. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, pdev->soc,
  624. &peer->stats, ppdu->peer_id,
  625. UPDATE_PEER_STATS, pdev->pdev_id);
  626. #endif
  627. dp_peer_unref_delete(peer);
  628. }
  629. }
  630. #endif
  631. /**
  632. * dp_rx_handle_mcopy_mode() - Allocate and deliver first MSDU payload
  633. * @soc: core txrx main context
  634. * @pdev: pdev structure
  635. * @ppdu_info: structure for rx ppdu ring
  636. * @nbuf: QDF nbuf
  637. * @fcs_ok_mpdu_cnt: fcs passsed mpdu index
  638. * @deliver_frame: flag to deliver wdi event
  639. *
  640. * Return: QDF_STATUS_SUCCESS - If nbuf to be freed by caller
  641. * QDF_STATUS_E_ALREADY - If nbuf not to be freed by caller
  642. */
  643. #ifdef FEATURE_PERPKT_INFO
  644. static inline QDF_STATUS
  645. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  646. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  647. uint8_t fcs_ok_mpdu_cnt, bool deliver_frame)
  648. {
  649. uint16_t size = 0;
  650. struct ieee80211_frame *wh;
  651. uint32_t *nbuf_data;
  652. if (!ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload)
  653. return QDF_STATUS_SUCCESS;
  654. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  655. if (pdev->mcopy_mode == M_COPY) {
  656. if (pdev->m_copy_id.rx_ppdu_id == ppdu_info->com_info.ppdu_id)
  657. return QDF_STATUS_SUCCESS;
  658. }
  659. wh = (struct ieee80211_frame *)(ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload + 4);
  660. size = (ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].first_msdu_payload -
  661. qdf_nbuf_data(nbuf));
  662. if (qdf_nbuf_pull_head(nbuf, size) == NULL)
  663. return QDF_STATUS_SUCCESS;
  664. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  665. IEEE80211_FC0_TYPE_MGT) ||
  666. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
  667. IEEE80211_FC0_TYPE_CTL)) {
  668. return QDF_STATUS_SUCCESS;
  669. }
  670. nbuf_data = (uint32_t *)qdf_nbuf_data(nbuf);
  671. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  672. /* only retain RX MSDU payload in the skb */
  673. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) - ppdu_info->ppdu_msdu_info[fcs_ok_mpdu_cnt].payload_len);
  674. if (deliver_frame) {
  675. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  676. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  677. nbuf, HTT_INVALID_PEER,
  678. WDI_NO_VAL, pdev->pdev_id);
  679. }
  680. return QDF_STATUS_E_ALREADY;
  681. }
  682. #else
  683. static inline QDF_STATUS
  684. dp_rx_handle_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  685. struct hal_rx_ppdu_info *ppdu_info, qdf_nbuf_t nbuf,
  686. uint8_t fcs_ok_cnt, bool deliver_frame)
  687. {
  688. return QDF_STATUS_SUCCESS;
  689. }
  690. #endif
  691. /**
  692. * dp_rx_mcopy_handle_last_mpdu() - cache and delive last MPDU header in a
  693. * status buffer if MPDU end tlv is received in different buffer
  694. * @soc: core txrx main context
  695. * @pdev: pdev structure
  696. * @ppdu_info: structure for rx ppdu ring
  697. * @status_nbuf: QDF nbuf
  698. *
  699. * Return: void
  700. */
  701. #ifdef FEATURE_PERPKT_INFO
  702. static inline void
  703. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  704. struct hal_rx_ppdu_info *ppdu_info,
  705. qdf_nbuf_t status_nbuf)
  706. {
  707. QDF_STATUS mcopy_status;
  708. qdf_nbuf_t nbuf_clone = NULL;
  709. /* If the MPDU end tlv and RX header are received in different buffers,
  710. * process the RX header based on fcs status.
  711. */
  712. if (pdev->mcopy_status_nbuf) {
  713. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  714. if (pdev->mcopy_mode == M_COPY) {
  715. if (pdev->m_copy_id.rx_ppdu_id ==
  716. ppdu_info->com_info.ppdu_id)
  717. goto end1;
  718. }
  719. if (ppdu_info->is_fcs_passed) {
  720. nbuf_clone = qdf_nbuf_clone(pdev->mcopy_status_nbuf);
  721. if (!nbuf_clone) {
  722. QDF_TRACE(QDF_MODULE_ID_TXRX,
  723. QDF_TRACE_LEVEL_ERROR,
  724. "Failed to clone nbuf",
  725. __func__, __LINE__);
  726. goto end1;
  727. }
  728. pdev->m_copy_id.rx_ppdu_id = ppdu_info->com_info.ppdu_id;
  729. dp_wdi_event_handler(WDI_EVENT_RX_DATA, soc,
  730. nbuf_clone,
  731. HTT_INVALID_PEER,
  732. WDI_NO_VAL, pdev->pdev_id);
  733. ppdu_info->is_fcs_passed = false;
  734. }
  735. end1:
  736. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  737. pdev->mcopy_status_nbuf = NULL;
  738. }
  739. /* If the MPDU end tlv and RX header are received in different buffers,
  740. * preserve the RX header as the fcs status will be received in MPDU
  741. * end tlv in next buffer. So, cache the buffer to be processd in next
  742. * iteration
  743. */
  744. if ((ppdu_info->fcs_ok_cnt + ppdu_info->fcs_err_cnt) !=
  745. ppdu_info->com_info.mpdu_cnt) {
  746. pdev->mcopy_status_nbuf = qdf_nbuf_clone(status_nbuf);
  747. if (pdev->mcopy_status_nbuf) {
  748. mcopy_status = dp_rx_handle_mcopy_mode(
  749. soc, pdev,
  750. ppdu_info,
  751. pdev->mcopy_status_nbuf,
  752. ppdu_info->fcs_ok_cnt,
  753. false);
  754. if (mcopy_status == QDF_STATUS_SUCCESS) {
  755. qdf_nbuf_free(pdev->mcopy_status_nbuf);
  756. pdev->mcopy_status_nbuf = NULL;
  757. }
  758. }
  759. }
  760. }
  761. #else
  762. static inline void
  763. dp_rx_mcopy_handle_last_mpdu(struct dp_soc *soc, struct dp_pdev *pdev,
  764. struct hal_rx_ppdu_info *ppdu_info,
  765. qdf_nbuf_t status_nbuf)
  766. {
  767. }
  768. #endif
  769. /**
  770. * dp_rx_mcopy_process_ppdu_info() - update mcopy ppdu info
  771. * @ppdu_info: structure for rx ppdu ring
  772. * @tlv_status: processed TLV status
  773. *
  774. * Return: void
  775. */
  776. #ifdef FEATURE_PERPKT_INFO
  777. static inline void
  778. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  779. struct hal_rx_ppdu_info *ppdu_info,
  780. uint32_t tlv_status)
  781. {
  782. if (!pdev->mcopy_mode)
  783. return;
  784. /* The fcs status is received in MPDU end tlv. If the RX header
  785. * and its MPDU end tlv are received in different status buffer then
  786. * to process that header ppdu_info->is_fcs_passed is used.
  787. * If end tlv is received in next status buffer then com_info.mpdu_cnt
  788. * will be 0 at the time of receiving MPDU end tlv and we update the
  789. * is_fcs_passed flag based on ppdu_info->fcs_err.
  790. */
  791. if (tlv_status != HAL_TLV_STATUS_MPDU_END)
  792. return;
  793. if (!ppdu_info->fcs_err) {
  794. if (ppdu_info->fcs_ok_cnt >
  795. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER) {
  796. dp_err("No. of MPDUs(%d) per status buff exceeded",
  797. ppdu_info->fcs_ok_cnt);
  798. return;
  799. }
  800. if (ppdu_info->com_info.mpdu_cnt)
  801. ppdu_info->fcs_ok_cnt++;
  802. else
  803. ppdu_info->is_fcs_passed = true;
  804. } else {
  805. if (ppdu_info->com_info.mpdu_cnt)
  806. ppdu_info->fcs_err_cnt++;
  807. else
  808. ppdu_info->is_fcs_passed = false;
  809. }
  810. }
  811. #else
  812. static inline void
  813. dp_rx_mcopy_process_ppdu_info(struct dp_pdev *pdev,
  814. struct hal_rx_ppdu_info *ppdu_info,
  815. uint32_t tlv_status)
  816. {
  817. }
  818. #endif
  819. #ifdef FEATURE_PERPKT_INFO
  820. static inline void
  821. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  822. struct hal_rx_ppdu_info *ppdu_info,
  823. uint32_t tlv_status,
  824. qdf_nbuf_t status_nbuf)
  825. {
  826. QDF_STATUS mcopy_status;
  827. qdf_nbuf_t nbuf_clone = NULL;
  828. uint8_t fcs_ok_mpdu_cnt = 0;
  829. dp_rx_mcopy_handle_last_mpdu(soc, pdev, ppdu_info, status_nbuf);
  830. if (qdf_unlikely(!ppdu_info->com_info.mpdu_cnt))
  831. goto end;
  832. if (qdf_unlikely(!ppdu_info->fcs_ok_cnt))
  833. goto end;
  834. /* For M_COPY mode only one msdu per ppdu is sent to upper layer*/
  835. if (pdev->mcopy_mode == M_COPY)
  836. ppdu_info->fcs_ok_cnt = 1;
  837. while (fcs_ok_mpdu_cnt < ppdu_info->fcs_ok_cnt) {
  838. nbuf_clone = qdf_nbuf_clone(status_nbuf);
  839. if (!nbuf_clone) {
  840. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  841. "Failed to clone nbuf",
  842. __func__, __LINE__);
  843. goto end;
  844. }
  845. mcopy_status = dp_rx_handle_mcopy_mode(soc, pdev,
  846. ppdu_info,
  847. nbuf_clone,
  848. fcs_ok_mpdu_cnt,
  849. true);
  850. if (mcopy_status == QDF_STATUS_SUCCESS)
  851. qdf_nbuf_free(nbuf_clone);
  852. fcs_ok_mpdu_cnt++;
  853. }
  854. end:
  855. qdf_nbuf_free(status_nbuf);
  856. ppdu_info->fcs_ok_cnt = 0;
  857. ppdu_info->fcs_err_cnt = 0;
  858. ppdu_info->com_info.mpdu_cnt = 0;
  859. qdf_mem_zero(&ppdu_info->ppdu_msdu_info,
  860. HAL_RX_MAX_MPDU_H_PER_STATUS_BUFFER
  861. * sizeof(struct hal_rx_msdu_payload_info));
  862. }
  863. #else
  864. static inline void
  865. dp_rx_process_mcopy_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  866. struct hal_rx_ppdu_info *ppdu_info,
  867. uint32_t tlv_status,
  868. qdf_nbuf_t status_nbuf)
  869. {
  870. }
  871. #endif
  872. /**
  873. * dp_rx_handle_smart_mesh_mode() - Deliver header for smart mesh
  874. * @soc: Datapath SOC handle
  875. * @pdev: Datapath PDEV handle
  876. * @ppdu_info: Structure for rx ppdu info
  877. * @nbuf: Qdf nbuf abstraction for linux skb
  878. *
  879. * Return: 0 on success, 1 on failure
  880. */
  881. static inline int
  882. dp_rx_handle_smart_mesh_mode(struct dp_soc *soc, struct dp_pdev *pdev,
  883. struct hal_rx_ppdu_info *ppdu_info,
  884. qdf_nbuf_t nbuf)
  885. {
  886. uint8_t size = 0;
  887. if (!pdev->monitor_vdev) {
  888. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  889. "[%s]:[%d] Monitor vdev is NULL !!",
  890. __func__, __LINE__);
  891. return 1;
  892. }
  893. if (!ppdu_info->msdu_info.first_msdu_payload) {
  894. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  895. "[%s]:[%d] First msdu payload not present",
  896. __func__, __LINE__);
  897. return 1;
  898. }
  899. /* Adding 4 bytes to get to start of 802.11 frame after phy_ppdu_id */
  900. size = (ppdu_info->msdu_info.first_msdu_payload -
  901. qdf_nbuf_data(nbuf)) + 4;
  902. ppdu_info->msdu_info.first_msdu_payload = NULL;
  903. if (qdf_nbuf_pull_head(nbuf, size) == NULL) {
  904. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  905. "[%s]:[%d] No header present",
  906. __func__, __LINE__);
  907. return 1;
  908. }
  909. /* Only retain RX MSDU payload in the skb */
  910. qdf_nbuf_trim_tail(nbuf, qdf_nbuf_len(nbuf) -
  911. ppdu_info->msdu_info.payload_len);
  912. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, nbuf,
  913. qdf_nbuf_headroom(nbuf))) {
  914. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  915. return 1;
  916. }
  917. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  918. nbuf, NULL);
  919. pdev->ppdu_info.rx_status.monitor_direct_used = 0;
  920. return 0;
  921. }
  922. #if defined(WLAN_CFR_ENABLE) && defined(WLAN_ENH_CFR_ENABLE)
  923. /*
  924. * dp_rx_mon_handle_cfr_mu_info() - Gather macaddr and ast_index of peer(s) in
  925. * the PPDU received, this will be used for correlation of CFR data captured
  926. * for an UL-MU-PPDU
  927. * @pdev: pdev ctx
  928. * @ppdu_info: pointer to ppdu info structure populated from ppdu status TLVs
  929. * @cdp_rx_ppdu: Rx PPDU indication structure
  930. *
  931. * Return: none
  932. */
  933. static inline void
  934. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  935. struct hal_rx_ppdu_info *ppdu_info,
  936. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  937. {
  938. struct dp_peer *peer;
  939. struct dp_soc *soc = pdev->soc;
  940. struct dp_ast_entry *ast_entry;
  941. struct mon_rx_user_status *rx_user_status;
  942. struct cdp_rx_stats_ppdu_user *rx_stats_peruser;
  943. uint32_t num_users;
  944. int user_id;
  945. uint32_t ast_index;
  946. qdf_spin_lock_bh(&soc->ast_lock);
  947. num_users = ppdu_info->com_info.num_users;
  948. for (user_id = 0; user_id < num_users; user_id++) {
  949. if (user_id > OFDMA_NUM_USERS) {
  950. qdf_spin_unlock_bh(&soc->ast_lock);
  951. return;
  952. }
  953. rx_user_status = &ppdu_info->rx_user_status[user_id];
  954. rx_stats_peruser = &cdp_rx_ppdu->user[user_id];
  955. ast_index = rx_user_status->ast_index;
  956. if (ast_index >= wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  957. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  958. continue;
  959. }
  960. ast_entry = soc->ast_table[ast_index];
  961. if (!ast_entry) {
  962. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  963. continue;
  964. }
  965. peer = ast_entry->peer;
  966. if (!peer || peer->peer_id == HTT_INVALID_PEER) {
  967. rx_stats_peruser->peer_id = HTT_INVALID_PEER;
  968. continue;
  969. }
  970. qdf_mem_copy(rx_stats_peruser->mac_addr,
  971. peer->mac_addr.raw, QDF_MAC_ADDR_SIZE);
  972. }
  973. qdf_spin_unlock_bh(&soc->ast_lock);
  974. }
  975. /*
  976. * dp_rx_mon_populate_cfr_ppdu_info() - Populate cdp ppdu info from hal ppdu
  977. * info
  978. * @pdev: pdev ctx
  979. * @ppdu_info: ppdu info structure from ppdu ring
  980. * @cdp_rx_ppdu : Rx PPDU indication structure
  981. *
  982. * Return: none
  983. */
  984. static inline void
  985. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  986. struct hal_rx_ppdu_info *ppdu_info,
  987. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  988. {
  989. int chain;
  990. cdp_rx_ppdu->ppdu_id = ppdu_info->com_info.ppdu_id;
  991. cdp_rx_ppdu->timestamp = ppdu_info->rx_status.tsft;
  992. cdp_rx_ppdu->u.ppdu_type = ppdu_info->rx_status.reception_type;
  993. cdp_rx_ppdu->num_users = ppdu_info->com_info.num_users;
  994. for (chain = 0; chain < MAX_CHAIN; chain++)
  995. cdp_rx_ppdu->per_chain_rssi[chain] =
  996. ppdu_info->rx_status.rssi[chain];
  997. dp_rx_mon_handle_cfr_mu_info(pdev, ppdu_info, cdp_rx_ppdu);
  998. }
  999. /**
  1000. * dp_cfr_rcc_mode_status() - Return status of cfr rcc mode
  1001. * @pdev: pdev ctx
  1002. *
  1003. * Return: True or False
  1004. */
  1005. static inline bool
  1006. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1007. {
  1008. return pdev->cfr_rcc_mode;
  1009. }
  1010. /*
  1011. * dp_rx_mon_populate_cfr_info() - Populate cdp ppdu info from hal cfr info
  1012. * @pdev: pdev ctx
  1013. * @ppdu_info: ppdu info structure from ppdu ring
  1014. * @cdp_rx_ppdu: Rx PPDU indication structure
  1015. *
  1016. * Return: none
  1017. */
  1018. static inline void
  1019. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1020. struct hal_rx_ppdu_info *ppdu_info,
  1021. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1022. {
  1023. struct cdp_rx_ppdu_cfr_info *cfr_info;
  1024. if (!dp_cfr_rcc_mode_status(pdev))
  1025. return;
  1026. cfr_info = &cdp_rx_ppdu->cfr_info;
  1027. cfr_info->bb_captured_channel
  1028. = ppdu_info->cfr_info.bb_captured_channel;
  1029. cfr_info->bb_captured_timeout
  1030. = ppdu_info->cfr_info.bb_captured_timeout;
  1031. cfr_info->bb_captured_reason
  1032. = ppdu_info->cfr_info.bb_captured_reason;
  1033. cfr_info->rx_location_info_valid
  1034. = ppdu_info->cfr_info.rx_location_info_valid;
  1035. cfr_info->chan_capture_status
  1036. = ppdu_info->cfr_info.chan_capture_status;
  1037. cfr_info->rtt_che_buffer_pointer_high8
  1038. = ppdu_info->cfr_info.rtt_che_buffer_pointer_high8;
  1039. cfr_info->rtt_che_buffer_pointer_low32
  1040. = ppdu_info->cfr_info.rtt_che_buffer_pointer_low32;
  1041. }
  1042. /**
  1043. * dp_update_cfr_dbg_stats() - Increment RCC debug statistics
  1044. * @pdev: pdev structure
  1045. * @ppdu_info: structure for rx ppdu ring
  1046. *
  1047. * Return: none
  1048. */
  1049. static inline void
  1050. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1051. struct hal_rx_ppdu_info *ppdu_info)
  1052. {
  1053. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1054. DP_STATS_INC(pdev,
  1055. rcc.chan_capture_status[cfr->chan_capture_status], 1);
  1056. if (cfr->rx_location_info_valid) {
  1057. DP_STATS_INC(pdev, rcc.rx_loc_info_valid_cnt, 1);
  1058. if (cfr->bb_captured_channel) {
  1059. DP_STATS_INC(pdev, rcc.bb_captured_channel_cnt, 1);
  1060. DP_STATS_INC(pdev,
  1061. rcc.reason_cnt[cfr->bb_captured_reason],
  1062. 1);
  1063. } else if (cfr->bb_captured_timeout) {
  1064. DP_STATS_INC(pdev, rcc.bb_captured_timeout_cnt, 1);
  1065. DP_STATS_INC(pdev,
  1066. rcc.reason_cnt[cfr->bb_captured_reason],
  1067. 1);
  1068. }
  1069. }
  1070. }
  1071. /*
  1072. * dp_rx_handle_cfr() - Gather cfr info from hal ppdu info
  1073. * @soc: core txrx main context
  1074. * @pdev: pdev ctx
  1075. * @ppdu_info: ppdu info structure from ppdu ring
  1076. *
  1077. * Return: none
  1078. */
  1079. static inline void
  1080. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1081. struct hal_rx_ppdu_info *ppdu_info)
  1082. {
  1083. qdf_nbuf_t ppdu_nbuf;
  1084. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1085. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1086. if (!ppdu_info->cfr_info.bb_captured_channel)
  1087. return;
  1088. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1089. sizeof(struct cdp_rx_indication_ppdu),
  1090. 0,
  1091. 0,
  1092. FALSE);
  1093. if (ppdu_nbuf) {
  1094. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1095. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1096. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1097. qdf_nbuf_put_tail(ppdu_nbuf,
  1098. sizeof(struct cdp_rx_indication_ppdu));
  1099. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1100. ppdu_nbuf, HTT_INVALID_PEER,
  1101. WDI_NO_VAL, pdev->pdev_id);
  1102. }
  1103. }
  1104. /**
  1105. * dp_rx_populate_cfr_non_assoc_sta() - Populate cfr ppdu info for PPDUs from
  1106. * non-associated stations
  1107. * @pdev: pdev ctx
  1108. * @ppdu_info: ppdu info structure from ppdu ring
  1109. * @cdp_rx_ppdu: Rx PPDU indication structure
  1110. *
  1111. * Return: none
  1112. */
  1113. static inline void
  1114. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1115. struct hal_rx_ppdu_info *ppdu_info,
  1116. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1117. {
  1118. if (!dp_cfr_rcc_mode_status(pdev))
  1119. return;
  1120. if (ppdu_info->cfr_info.bb_captured_channel)
  1121. dp_rx_mon_populate_cfr_ppdu_info(pdev, ppdu_info, cdp_rx_ppdu);
  1122. }
  1123. /**
  1124. * dp_bb_captured_chan_status() - Get the bb_captured_channel status
  1125. * @ppdu_info: structure for rx ppdu ring
  1126. *
  1127. * Return: Success/ Failure
  1128. */
  1129. static inline QDF_STATUS
  1130. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1131. struct hal_rx_ppdu_info *ppdu_info)
  1132. {
  1133. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  1134. struct hal_rx_ppdu_cfr_info *cfr = &ppdu_info->cfr_info;
  1135. if (dp_cfr_rcc_mode_status(pdev)) {
  1136. if (cfr->bb_captured_channel)
  1137. status = QDF_STATUS_SUCCESS;
  1138. }
  1139. return status;
  1140. }
  1141. #else
  1142. static inline void
  1143. dp_rx_mon_handle_cfr_mu_info(struct dp_pdev *pdev,
  1144. struct hal_rx_ppdu_info *ppdu_info,
  1145. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1146. {
  1147. }
  1148. static inline void
  1149. dp_rx_mon_populate_cfr_ppdu_info(struct dp_pdev *pdev,
  1150. struct hal_rx_ppdu_info *ppdu_info,
  1151. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1152. {
  1153. }
  1154. static inline void
  1155. dp_rx_mon_populate_cfr_info(struct dp_pdev *pdev,
  1156. struct hal_rx_ppdu_info *ppdu_info,
  1157. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1158. {
  1159. }
  1160. static inline void
  1161. dp_rx_handle_cfr(struct dp_soc *soc, struct dp_pdev *pdev,
  1162. struct hal_rx_ppdu_info *ppdu_info)
  1163. {
  1164. }
  1165. static inline void
  1166. dp_rx_populate_cfr_non_assoc_sta(struct dp_pdev *pdev,
  1167. struct hal_rx_ppdu_info *ppdu_info,
  1168. struct cdp_rx_indication_ppdu *cdp_rx_ppdu)
  1169. {
  1170. }
  1171. static inline void
  1172. dp_update_cfr_dbg_stats(struct dp_pdev *pdev,
  1173. struct hal_rx_ppdu_info *ppdu_info)
  1174. {
  1175. }
  1176. static inline QDF_STATUS
  1177. dp_bb_captured_chan_status(struct dp_pdev *pdev,
  1178. struct hal_rx_ppdu_info *ppdu_info)
  1179. {
  1180. return QDF_STATUS_E_NOSUPPORT;
  1181. }
  1182. static inline bool
  1183. dp_cfr_rcc_mode_status(struct dp_pdev *pdev)
  1184. {
  1185. return false;
  1186. }
  1187. #endif
  1188. /**
  1189. * dp_rx_handle_ppdu_stats() - Allocate and deliver ppdu stats to cdp layer
  1190. * @soc: core txrx main context
  1191. * @pdev: pdev strcuture
  1192. * @ppdu_info: structure for rx ppdu ring
  1193. *
  1194. * Return: none
  1195. */
  1196. #ifdef FEATURE_PERPKT_INFO
  1197. static inline void
  1198. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1199. struct hal_rx_ppdu_info *ppdu_info)
  1200. {
  1201. qdf_nbuf_t ppdu_nbuf;
  1202. struct cdp_rx_indication_ppdu *cdp_rx_ppdu;
  1203. /*
  1204. * Do not allocate if fcs error,
  1205. * ast idx invalid / fctl invalid
  1206. *
  1207. * In CFR RCC mode - PPDU status TLVs of error pkts are also needed
  1208. */
  1209. if (ppdu_info->com_info.mpdu_cnt_fcs_ok == 0)
  1210. return;
  1211. if (ppdu_info->nac_info.fc_valid &&
  1212. ppdu_info->nac_info.to_ds_flag &&
  1213. ppdu_info->nac_info.mac_addr2_valid) {
  1214. struct dp_neighbour_peer *peer = NULL;
  1215. uint8_t rssi = ppdu_info->rx_status.rssi_comb;
  1216. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  1217. if (pdev->neighbour_peers_added) {
  1218. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  1219. neighbour_peer_list_elem) {
  1220. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr,
  1221. &ppdu_info->nac_info.mac_addr2,
  1222. QDF_MAC_ADDR_SIZE)) {
  1223. peer->rssi = rssi;
  1224. break;
  1225. }
  1226. }
  1227. }
  1228. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  1229. }
  1230. /* need not generate wdi event when mcopy, cfr rcc mode and
  1231. * enhanced stats are not enabled
  1232. */
  1233. if (!pdev->mcopy_mode && !pdev->enhanced_stats_en &&
  1234. !dp_cfr_rcc_mode_status(pdev))
  1235. return;
  1236. if (dp_cfr_rcc_mode_status(pdev))
  1237. dp_update_cfr_dbg_stats(pdev, ppdu_info);
  1238. if (!ppdu_info->rx_status.frame_control_info_valid ||
  1239. (ppdu_info->rx_status.ast_index == HAL_AST_IDX_INVALID)) {
  1240. if (!(pdev->mcopy_mode ||
  1241. (dp_bb_captured_chan_status(pdev, ppdu_info) ==
  1242. QDF_STATUS_SUCCESS)))
  1243. return;
  1244. }
  1245. ppdu_nbuf = qdf_nbuf_alloc(soc->osdev,
  1246. sizeof(struct cdp_rx_indication_ppdu),
  1247. 0, 0, FALSE);
  1248. if (ppdu_nbuf) {
  1249. cdp_rx_ppdu = (struct cdp_rx_indication_ppdu *)ppdu_nbuf->data;
  1250. dp_rx_mon_populate_cfr_info(pdev, ppdu_info, cdp_rx_ppdu);
  1251. dp_rx_populate_cdp_indication_ppdu(pdev,
  1252. ppdu_info, cdp_rx_ppdu);
  1253. if (!qdf_nbuf_put_tail(ppdu_nbuf,
  1254. sizeof(struct cdp_rx_indication_ppdu)))
  1255. return;
  1256. dp_rx_stats_update(pdev, cdp_rx_ppdu);
  1257. if (cdp_rx_ppdu->peer_id != HTT_INVALID_PEER) {
  1258. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC,
  1259. soc, ppdu_nbuf,
  1260. cdp_rx_ppdu->peer_id,
  1261. WDI_NO_VAL, pdev->pdev_id);
  1262. } else if (pdev->mcopy_mode || dp_cfr_rcc_mode_status(pdev)) {
  1263. dp_wdi_event_handler(WDI_EVENT_RX_PPDU_DESC, soc,
  1264. ppdu_nbuf, HTT_INVALID_PEER,
  1265. WDI_NO_VAL, pdev->pdev_id);
  1266. } else {
  1267. qdf_nbuf_free(ppdu_nbuf);
  1268. }
  1269. }
  1270. }
  1271. #else
  1272. static inline void
  1273. dp_rx_handle_ppdu_stats(struct dp_soc *soc, struct dp_pdev *pdev,
  1274. struct hal_rx_ppdu_info *ppdu_info)
  1275. {
  1276. }
  1277. #endif
  1278. /**
  1279. * dp_rx_process_peer_based_pktlog() - Process Rx pktlog if peer based
  1280. * filtering enabled
  1281. * @soc: core txrx main context
  1282. * @ppdu_info: Structure for rx ppdu info
  1283. * @status_nbuf: Qdf nbuf abstraction for linux skb
  1284. * @pdev_id: mac_id/pdev_id correspondinggly for MCL and WIN
  1285. *
  1286. * Return: none
  1287. */
  1288. static inline void
  1289. dp_rx_process_peer_based_pktlog(struct dp_soc *soc,
  1290. struct hal_rx_ppdu_info *ppdu_info,
  1291. qdf_nbuf_t status_nbuf, uint32_t pdev_id)
  1292. {
  1293. struct dp_peer *peer;
  1294. struct dp_ast_entry *ast_entry;
  1295. uint32_t ast_index;
  1296. ast_index = ppdu_info->rx_status.ast_index;
  1297. if (ast_index < wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx)) {
  1298. ast_entry = soc->ast_table[ast_index];
  1299. if (ast_entry) {
  1300. peer = ast_entry->peer;
  1301. if (peer && (peer->peer_id != HTT_INVALID_PEER)) {
  1302. if (peer->peer_based_pktlog_filter) {
  1303. dp_wdi_event_handler(
  1304. WDI_EVENT_RX_DESC, soc,
  1305. status_nbuf,
  1306. peer->peer_id,
  1307. WDI_NO_VAL, pdev_id);
  1308. }
  1309. }
  1310. }
  1311. }
  1312. }
  1313. #if defined(HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_M)
  1314. static inline void
  1315. dp_rx_ul_ofdma_ru_size_to_width(
  1316. uint32_t ru_size,
  1317. uint32_t *ru_width)
  1318. {
  1319. uint32_t width;
  1320. width = 0;
  1321. switch (ru_size) {
  1322. case HTT_UL_OFDMA_V0_RU_SIZE_RU_26:
  1323. width = 1;
  1324. break;
  1325. case HTT_UL_OFDMA_V0_RU_SIZE_RU_52:
  1326. width = 2;
  1327. break;
  1328. case HTT_UL_OFDMA_V0_RU_SIZE_RU_106:
  1329. width = 4;
  1330. break;
  1331. case HTT_UL_OFDMA_V0_RU_SIZE_RU_242:
  1332. width = 9;
  1333. break;
  1334. case HTT_UL_OFDMA_V0_RU_SIZE_RU_484:
  1335. width = 18;
  1336. break;
  1337. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996:
  1338. width = 37;
  1339. break;
  1340. case HTT_UL_OFDMA_V0_RU_SIZE_RU_996x2:
  1341. width = 74;
  1342. break;
  1343. default:
  1344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1345. "RU size to width convert err");
  1346. break;
  1347. }
  1348. *ru_width = width;
  1349. }
  1350. static inline void
  1351. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1352. {
  1353. struct mon_rx_user_status *mon_rx_user_status;
  1354. uint32_t num_users;
  1355. uint32_t i;
  1356. uint32_t mu_ul_user_v0_word0;
  1357. uint32_t mu_ul_user_v0_word1;
  1358. uint32_t ru_width;
  1359. uint32_t ru_size;
  1360. if (!(ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_OFDMA ||
  1361. ppdu_info->rx_status.reception_type == HAL_RX_TYPE_MU_MIMO))
  1362. return;
  1363. num_users = ppdu_info->com_info.num_users;
  1364. if (num_users > HAL_MAX_UL_MU_USERS)
  1365. num_users = HAL_MAX_UL_MU_USERS;
  1366. for (i = 0; i < num_users; i++) {
  1367. mon_rx_user_status = &ppdu_info->rx_user_status[i];
  1368. mu_ul_user_v0_word0 =
  1369. mon_rx_user_status->mu_ul_user_v0_word0;
  1370. mu_ul_user_v0_word1 =
  1371. mon_rx_user_status->mu_ul_user_v0_word1;
  1372. if (HTT_UL_OFDMA_USER_INFO_V0_W0_VALID_GET(
  1373. mu_ul_user_v0_word0) &&
  1374. !HTT_UL_OFDMA_USER_INFO_V0_W0_VER_GET(
  1375. mu_ul_user_v0_word0)) {
  1376. mon_rx_user_status->mcs =
  1377. HTT_UL_OFDMA_USER_INFO_V0_W1_MCS_GET(
  1378. mu_ul_user_v0_word1);
  1379. mon_rx_user_status->nss =
  1380. HTT_UL_OFDMA_USER_INFO_V0_W1_NSS_GET(
  1381. mu_ul_user_v0_word1) + 1;
  1382. mon_rx_user_status->mu_ul_info_valid = 1;
  1383. mon_rx_user_status->ofdma_ru_start_index =
  1384. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_START_GET(
  1385. mu_ul_user_v0_word1);
  1386. ru_size =
  1387. HTT_UL_OFDMA_USER_INFO_V0_W1_RU_SIZE_GET(
  1388. mu_ul_user_v0_word1);
  1389. dp_rx_ul_ofdma_ru_size_to_width(ru_size, &ru_width);
  1390. mon_rx_user_status->ofdma_ru_width = ru_width;
  1391. mon_rx_user_status->ofdma_ru_size = ru_size;
  1392. }
  1393. }
  1394. }
  1395. #else
  1396. static inline void
  1397. dp_rx_mon_handle_mu_ul_info(struct hal_rx_ppdu_info *ppdu_info)
  1398. {
  1399. }
  1400. #endif
  1401. /**
  1402. * dp_rx_mon_status_process_tlv() - Process status TLV in status
  1403. * buffer on Rx status Queue posted by status SRNG processing.
  1404. * @soc: core txrx main context
  1405. * @int_ctx: interrupt context
  1406. * @mac_id: mac_id which is one of 3 mac_ids _ring
  1407. * @quota: amount of work which can be done
  1408. *
  1409. * Return: none
  1410. */
  1411. static inline void
  1412. dp_rx_mon_status_process_tlv(struct dp_soc *soc, struct dp_intr *int_ctx,
  1413. uint32_t mac_id, uint32_t quota)
  1414. {
  1415. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1416. struct hal_rx_ppdu_info *ppdu_info;
  1417. qdf_nbuf_t status_nbuf;
  1418. uint8_t *rx_tlv;
  1419. uint8_t *rx_tlv_start;
  1420. uint32_t tlv_status = HAL_TLV_STATUS_BUF_DONE;
  1421. QDF_STATUS enh_log_status = QDF_STATUS_SUCCESS;
  1422. struct cdp_pdev_mon_stats *rx_mon_stats;
  1423. int smart_mesh_status;
  1424. enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
  1425. bool nbuf_used;
  1426. uint32_t rx_enh_capture_mode;
  1427. if (!pdev) {
  1428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1429. "pdev is null for mac_id = %d", mac_id);
  1430. return;
  1431. }
  1432. ppdu_info = &pdev->ppdu_info;
  1433. rx_mon_stats = &pdev->rx_mon_stats;
  1434. if (pdev->mon_ppdu_status != DP_PPDU_STATUS_START)
  1435. return;
  1436. rx_enh_capture_mode = pdev->rx_enh_capture_mode;
  1437. while (!qdf_nbuf_is_queue_empty(&pdev->rx_status_q)) {
  1438. status_nbuf = qdf_nbuf_queue_remove(&pdev->rx_status_q);
  1439. rx_tlv = qdf_nbuf_data(status_nbuf);
  1440. rx_tlv_start = rx_tlv;
  1441. nbuf_used = false;
  1442. if ((pdev->monitor_vdev) || (pdev->enhanced_stats_en) ||
  1443. (pdev->mcopy_mode) || (dp_cfr_rcc_mode_status(pdev)) ||
  1444. (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED)) {
  1445. do {
  1446. tlv_status = hal_rx_status_get_tlv_info(rx_tlv,
  1447. ppdu_info, pdev->soc->hal_soc,
  1448. status_nbuf);
  1449. dp_rx_mon_update_dbg_ppdu_stats(ppdu_info,
  1450. rx_mon_stats);
  1451. dp_rx_mon_enh_capture_process(pdev, tlv_status,
  1452. status_nbuf, ppdu_info,
  1453. &nbuf_used);
  1454. dp_rx_mcopy_process_ppdu_info(pdev,
  1455. ppdu_info,
  1456. tlv_status);
  1457. rx_tlv = hal_rx_status_get_next_tlv(rx_tlv);
  1458. if ((rx_tlv - rx_tlv_start) >=
  1459. RX_DATA_BUFFER_SIZE)
  1460. break;
  1461. } while ((tlv_status == HAL_TLV_STATUS_PPDU_NOT_DONE) ||
  1462. (tlv_status == HAL_TLV_STATUS_HEADER) ||
  1463. (tlv_status == HAL_TLV_STATUS_MPDU_END) ||
  1464. (tlv_status == HAL_TLV_STATUS_MSDU_END));
  1465. }
  1466. if (pdev->dp_peer_based_pktlog) {
  1467. dp_rx_process_peer_based_pktlog(soc, ppdu_info,
  1468. status_nbuf,
  1469. pdev->pdev_id);
  1470. } else {
  1471. if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_FULL)
  1472. pktlog_mode = WDI_EVENT_RX_DESC;
  1473. else if (pdev->rx_pktlog_mode == DP_RX_PKTLOG_LITE)
  1474. pktlog_mode = WDI_EVENT_LITE_RX;
  1475. if (pktlog_mode != WDI_NO_VAL)
  1476. dp_wdi_event_handler(pktlog_mode, soc,
  1477. status_nbuf,
  1478. HTT_INVALID_PEER,
  1479. WDI_NO_VAL, pdev->pdev_id);
  1480. }
  1481. /* smart monitor vap and m_copy cannot co-exist */
  1482. if (ppdu_info->rx_status.monitor_direct_used && pdev->neighbour_peers_added
  1483. && pdev->monitor_vdev) {
  1484. smart_mesh_status = dp_rx_handle_smart_mesh_mode(soc,
  1485. pdev, ppdu_info, status_nbuf);
  1486. if (smart_mesh_status)
  1487. qdf_nbuf_free(status_nbuf);
  1488. } else if (qdf_unlikely(pdev->mcopy_mode)) {
  1489. dp_rx_process_mcopy_mode(soc, pdev,
  1490. ppdu_info, tlv_status,
  1491. status_nbuf);
  1492. } else if (rx_enh_capture_mode != CDP_RX_ENH_CAPTURE_DISABLED) {
  1493. if (!nbuf_used)
  1494. qdf_nbuf_free(status_nbuf);
  1495. if (tlv_status == HAL_TLV_STATUS_PPDU_DONE)
  1496. enh_log_status =
  1497. dp_rx_handle_enh_capture(soc,
  1498. pdev, ppdu_info);
  1499. } else {
  1500. qdf_nbuf_free(status_nbuf);
  1501. }
  1502. if (tlv_status == HAL_TLV_STATUS_PPDU_NON_STD_DONE) {
  1503. dp_rx_mon_deliver_non_std(soc, mac_id);
  1504. } else if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) {
  1505. rx_mon_stats->status_ppdu_done++;
  1506. dp_rx_mon_handle_mu_ul_info(ppdu_info);
  1507. if (pdev->tx_capture_enabled
  1508. != CDP_TX_ENH_CAPTURE_DISABLED)
  1509. dp_send_ack_frame_to_stack(soc, pdev,
  1510. ppdu_info);
  1511. if (pdev->enhanced_stats_en ||
  1512. pdev->mcopy_mode || pdev->neighbour_peers_added)
  1513. dp_rx_handle_ppdu_stats(soc, pdev, ppdu_info);
  1514. else if (dp_cfr_rcc_mode_status(pdev))
  1515. dp_rx_handle_cfr(soc, pdev, ppdu_info);
  1516. pdev->mon_ppdu_status = DP_PPDU_STATUS_DONE;
  1517. /*
  1518. * if chan_num is not fetched correctly from ppdu RX TLV,
  1519. * get it from pdev saved.
  1520. */
  1521. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_num == 0))
  1522. pdev->ppdu_info.rx_status.chan_num = pdev->mon_chan_num;
  1523. /*
  1524. * if chan_freq is not fetched correctly from ppdu RX TLV,
  1525. * get it from pdev saved.
  1526. */
  1527. if (qdf_unlikely(pdev->ppdu_info.rx_status.chan_freq == 0)) {
  1528. pdev->ppdu_info.rx_status.chan_freq =
  1529. pdev->mon_chan_freq;
  1530. }
  1531. if (!soc->full_mon_mode)
  1532. dp_rx_mon_dest_process(soc, int_ctx, mac_id,
  1533. quota);
  1534. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1535. }
  1536. }
  1537. return;
  1538. }
  1539. /*
  1540. * dp_rx_mon_status_srng_process() - Process monitor status ring
  1541. * post the status ring buffer to Rx status Queue for later
  1542. * processing when status ring is filled with status TLV.
  1543. * Allocate a new buffer to status ring if the filled buffer
  1544. * is posted.
  1545. * @soc: core txrx main context
  1546. * @int_ctx: interrupt context
  1547. * @mac_id: mac_id which is one of 3 mac_ids
  1548. * @quota: No. of ring entry that can be serviced in one shot.
  1549. * Return: uint32_t: No. of ring entry that is processed.
  1550. */
  1551. static inline uint32_t
  1552. dp_rx_mon_status_srng_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1553. uint32_t mac_id, uint32_t quota)
  1554. {
  1555. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1556. hal_soc_handle_t hal_soc;
  1557. void *mon_status_srng;
  1558. void *rxdma_mon_status_ring_entry;
  1559. QDF_STATUS status;
  1560. uint32_t work_done = 0;
  1561. if (!pdev) {
  1562. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1563. "pdev is null for mac_id = %d", mac_id);
  1564. return work_done;
  1565. }
  1566. mon_status_srng = soc->rxdma_mon_status_ring[mac_id].hal_srng;
  1567. qdf_assert(mon_status_srng);
  1568. if (!mon_status_srng || !hal_srng_initialized(mon_status_srng)) {
  1569. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1570. "%s %d : HAL Monitor Status Ring Init Failed -- %pK",
  1571. __func__, __LINE__, mon_status_srng);
  1572. return work_done;
  1573. }
  1574. hal_soc = soc->hal_soc;
  1575. qdf_assert(hal_soc);
  1576. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, mon_status_srng)))
  1577. goto done;
  1578. /* mon_status_ring_desc => WBM_BUFFER_RING STRUCT =>
  1579. * BUFFER_ADDR_INFO STRUCT
  1580. */
  1581. while (qdf_likely((rxdma_mon_status_ring_entry =
  1582. hal_srng_src_peek_n_get_next(hal_soc, mon_status_srng))
  1583. && quota--)) {
  1584. uint32_t rx_buf_cookie;
  1585. qdf_nbuf_t status_nbuf;
  1586. struct dp_rx_desc *rx_desc;
  1587. uint8_t *status_buf;
  1588. qdf_dma_addr_t paddr;
  1589. uint64_t buf_addr;
  1590. struct rx_desc_pool *rx_desc_pool;
  1591. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1592. buf_addr =
  1593. (HAL_RX_BUFFER_ADDR_31_0_GET(
  1594. rxdma_mon_status_ring_entry) |
  1595. ((uint64_t)(HAL_RX_BUFFER_ADDR_39_32_GET(
  1596. rxdma_mon_status_ring_entry)) << 32));
  1597. if (qdf_likely(buf_addr)) {
  1598. rx_buf_cookie =
  1599. HAL_RX_BUF_COOKIE_GET(
  1600. rxdma_mon_status_ring_entry);
  1601. rx_desc = dp_rx_cookie_2_va_mon_status(soc,
  1602. rx_buf_cookie);
  1603. qdf_assert(rx_desc);
  1604. status_nbuf = rx_desc->nbuf;
  1605. qdf_nbuf_sync_for_cpu(soc->osdev, status_nbuf,
  1606. QDF_DMA_FROM_DEVICE);
  1607. status_buf = qdf_nbuf_data(status_nbuf);
  1608. status = hal_get_rx_status_done(status_buf);
  1609. if (status != QDF_STATUS_SUCCESS) {
  1610. uint32_t hp, tp;
  1611. hal_get_sw_hptp(hal_soc, mon_status_srng,
  1612. &tp, &hp);
  1613. dp_info_rl("tlv tag status error hp:%u, tp:%u",
  1614. hp, tp);
  1615. pdev->rx_mon_stats.tlv_tag_status_err++;
  1616. /* RxDMA status done bit might not be set even
  1617. * though tp is moved by HW.
  1618. * So Hold on to current entry on
  1619. * monitor status ring
  1620. */
  1621. /* If done status is missing, hold onto status
  1622. * ring until status is done for this status
  1623. * ring buffer.
  1624. * Keep HP in mon_status_ring unchanged,
  1625. * and break from here.
  1626. * Check status for same buffer for next time
  1627. * dp_rx_mon_status_srng_process
  1628. */
  1629. break;
  1630. }
  1631. qdf_nbuf_set_pktlen(status_nbuf, RX_DATA_BUFFER_SIZE);
  1632. qdf_nbuf_unmap_nbytes_single(soc->osdev, status_nbuf,
  1633. QDF_DMA_FROM_DEVICE,
  1634. rx_desc_pool->buf_size);
  1635. /* Put the status_nbuf to queue */
  1636. qdf_nbuf_queue_add(&pdev->rx_status_q, status_nbuf);
  1637. } else {
  1638. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1639. union dp_rx_desc_list_elem_t *tail = NULL;
  1640. uint32_t num_alloc_desc;
  1641. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  1642. rx_desc_pool,
  1643. 1,
  1644. &desc_list,
  1645. &tail);
  1646. /*
  1647. * No free descriptors available
  1648. */
  1649. if (qdf_unlikely(num_alloc_desc == 0)) {
  1650. work_done++;
  1651. break;
  1652. }
  1653. rx_desc = &desc_list->rx_desc;
  1654. }
  1655. status_nbuf = dp_rx_nbuf_prepare(soc, pdev);
  1656. /*
  1657. * qdf_nbuf alloc or map failed,
  1658. * free the dp rx desc to free list,
  1659. * fill in NULL dma address at current HP entry,
  1660. * keep HP in mon_status_ring unchanged,
  1661. * wait next time dp_rx_mon_status_srng_process
  1662. * to fill in buffer at current HP.
  1663. */
  1664. if (qdf_unlikely(!status_nbuf)) {
  1665. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1666. union dp_rx_desc_list_elem_t *tail = NULL;
  1667. struct rx_desc_pool *rx_desc_pool;
  1668. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1669. dp_info_rl("fail to allocate or map qdf_nbuf");
  1670. dp_rx_add_to_free_desc_list(&desc_list,
  1671. &tail, rx_desc);
  1672. dp_rx_add_desc_list_to_free_list(soc, &desc_list,
  1673. &tail, mac_id, rx_desc_pool);
  1674. hal_rxdma_buff_addr_info_set(
  1675. rxdma_mon_status_ring_entry,
  1676. 0, 0, HAL_RX_BUF_RBM_SW3_BM);
  1677. work_done++;
  1678. break;
  1679. }
  1680. paddr = qdf_nbuf_get_frag_paddr(status_nbuf, 0);
  1681. rx_desc->nbuf = status_nbuf;
  1682. rx_desc->in_use = 1;
  1683. hal_rxdma_buff_addr_info_set(rxdma_mon_status_ring_entry,
  1684. paddr, rx_desc->cookie, HAL_RX_BUF_RBM_SW3_BM);
  1685. hal_srng_src_get_next(hal_soc, mon_status_srng);
  1686. work_done++;
  1687. }
  1688. done:
  1689. dp_srng_access_end(int_ctx, soc, mon_status_srng);
  1690. return work_done;
  1691. }
  1692. uint32_t
  1693. dp_rx_mon_status_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1694. uint32_t mac_id, uint32_t quota)
  1695. {
  1696. uint32_t work_done;
  1697. work_done = dp_rx_mon_status_srng_process(soc, int_ctx, mac_id, quota);
  1698. quota -= work_done;
  1699. dp_rx_mon_status_process_tlv(soc, int_ctx, mac_id, quota);
  1700. return work_done;
  1701. }
  1702. #ifndef DISABLE_MON_CONFIG
  1703. uint32_t
  1704. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1705. uint32_t mac_id, uint32_t quota)
  1706. {
  1707. if (qdf_unlikely(soc->full_mon_mode))
  1708. return dp_rx_mon_process(soc, int_ctx, mac_id, quota);
  1709. return dp_rx_mon_status_process(soc, int_ctx, mac_id, quota);
  1710. }
  1711. #else
  1712. uint32_t
  1713. dp_mon_process(struct dp_soc *soc, struct dp_intr *int_ctx,
  1714. uint32_t mac_id, uint32_t quota)
  1715. {
  1716. return 0;
  1717. }
  1718. #endif
  1719. QDF_STATUS
  1720. dp_rx_pdev_mon_status_buffers_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1721. {
  1722. uint8_t pdev_id = pdev->pdev_id;
  1723. struct dp_soc *soc = pdev->soc;
  1724. struct dp_srng *mon_status_ring;
  1725. uint32_t num_entries;
  1726. struct rx_desc_pool *rx_desc_pool;
  1727. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1728. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1729. union dp_rx_desc_list_elem_t *tail = NULL;
  1730. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1731. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1732. num_entries = mon_status_ring->num_entries;
  1733. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1734. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1735. pdev_id, num_entries);
  1736. return dp_rx_mon_status_buffers_replenish(soc, mac_id, mon_status_ring,
  1737. rx_desc_pool, num_entries,
  1738. &desc_list, &tail,
  1739. HAL_RX_BUF_RBM_SW3_BM);
  1740. }
  1741. QDF_STATUS
  1742. dp_rx_pdev_mon_status_desc_pool_alloc(struct dp_pdev *pdev, uint32_t mac_id)
  1743. {
  1744. uint8_t pdev_id = pdev->pdev_id;
  1745. struct dp_soc *soc = pdev->soc;
  1746. struct dp_srng *mon_status_ring;
  1747. uint32_t num_entries;
  1748. struct rx_desc_pool *rx_desc_pool;
  1749. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1750. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1751. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1752. num_entries = mon_status_ring->num_entries;
  1753. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1754. dp_debug("Mon RX Desc Pool[%d] entries=%u", pdev_id, num_entries);
  1755. return dp_rx_desc_pool_alloc(soc, num_entries + 1, rx_desc_pool);
  1756. }
  1757. void
  1758. dp_rx_pdev_mon_status_desc_pool_init(struct dp_pdev *pdev, uint32_t mac_id)
  1759. {
  1760. uint32_t i;
  1761. uint8_t pdev_id = pdev->pdev_id;
  1762. struct dp_soc *soc = pdev->soc;
  1763. struct dp_srng *mon_status_ring;
  1764. uint32_t num_entries;
  1765. struct rx_desc_pool *rx_desc_pool;
  1766. struct wlan_cfg_dp_soc_ctxt *soc_cfg_ctx;
  1767. soc_cfg_ctx = soc->wlan_cfg_ctx;
  1768. mon_status_ring = &soc->rxdma_mon_status_ring[mac_id];
  1769. num_entries = mon_status_ring->num_entries;
  1770. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1771. dp_debug("Mon RX Desc status Pool[%d] init entries=%u",
  1772. pdev_id, num_entries);
  1773. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1774. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  1775. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  1776. /* Disable frag processing flag */
  1777. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  1778. dp_rx_desc_pool_init(soc, mac_id, num_entries + 1, rx_desc_pool);
  1779. qdf_nbuf_queue_init(&pdev->rx_status_q);
  1780. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  1781. qdf_mem_zero(&pdev->ppdu_info, sizeof(pdev->ppdu_info));
  1782. /*
  1783. * Set last_ppdu_id to HAL_INVALID_PPDU_ID in order to avoid ppdu_id
  1784. * match with '0' ppdu_id from monitor status ring
  1785. */
  1786. pdev->ppdu_info.com_info.last_ppdu_id = HAL_INVALID_PPDU_ID;
  1787. qdf_mem_zero(&pdev->rx_mon_stats, sizeof(pdev->rx_mon_stats));
  1788. dp_rx_mon_init_dbg_ppdu_stats(&pdev->ppdu_info,
  1789. &pdev->rx_mon_stats);
  1790. for (i = 0; i < MAX_MU_USERS; i++) {
  1791. qdf_nbuf_queue_init(&pdev->mpdu_q[i]);
  1792. pdev->is_mpdu_hdr[i] = true;
  1793. }
  1794. qdf_mem_zero(pdev->msdu_list, sizeof(pdev->msdu_list[MAX_MU_USERS]));
  1795. pdev->rx_enh_capture_mode = CDP_RX_ENH_CAPTURE_DISABLED;
  1796. }
  1797. void
  1798. dp_rx_pdev_mon_status_desc_pool_deinit(struct dp_pdev *pdev, uint32_t mac_id) {
  1799. uint8_t pdev_id = pdev->pdev_id;
  1800. struct dp_soc *soc = pdev->soc;
  1801. struct rx_desc_pool *rx_desc_pool;
  1802. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1803. dp_debug("Mon RX Desc status Pool[%d] deinit", pdev_id);
  1804. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  1805. }
  1806. void
  1807. dp_rx_pdev_mon_status_desc_pool_free(struct dp_pdev *pdev, uint32_t mac_id) {
  1808. uint8_t pdev_id = pdev->pdev_id;
  1809. struct dp_soc *soc = pdev->soc;
  1810. struct rx_desc_pool *rx_desc_pool;
  1811. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1812. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1813. dp_rx_desc_pool_free(soc, rx_desc_pool);
  1814. }
  1815. void
  1816. dp_rx_pdev_mon_status_buffers_free(struct dp_pdev *pdev, uint32_t mac_id)
  1817. {
  1818. uint8_t pdev_id = pdev->pdev_id;
  1819. struct dp_soc *soc = pdev->soc;
  1820. struct rx_desc_pool *rx_desc_pool;
  1821. rx_desc_pool = &soc->rx_desc_status[mac_id];
  1822. dp_debug("Mon RX Status Desc Pool Free pdev[%d]", pdev_id);
  1823. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1824. }
  1825. /*
  1826. * dp_rx_buffers_replenish() - replenish monitor status ring with
  1827. * rx nbufs called during dp rx
  1828. * monitor status ring initialization
  1829. *
  1830. * @soc: core txrx main context
  1831. * @mac_id: mac_id which is one of 3 mac_ids
  1832. * @dp_rxdma_srng: dp monitor status circular ring
  1833. * @rx_desc_pool; Pointer to Rx descriptor pool
  1834. * @num_req_buffers: number of buffer to be replenished
  1835. * @desc_list: list of descs if called from dp rx monitor status
  1836. * process or NULL during dp rx initialization or
  1837. * out of buffer interrupt
  1838. * @tail: tail of descs list
  1839. * @owner: who owns the nbuf (host, NSS etc...)
  1840. * Return: return success or failure
  1841. */
  1842. static inline
  1843. QDF_STATUS dp_rx_mon_status_buffers_replenish(struct dp_soc *dp_soc,
  1844. uint32_t mac_id,
  1845. struct dp_srng *dp_rxdma_srng,
  1846. struct rx_desc_pool *rx_desc_pool,
  1847. uint32_t num_req_buffers,
  1848. union dp_rx_desc_list_elem_t **desc_list,
  1849. union dp_rx_desc_list_elem_t **tail,
  1850. uint8_t owner)
  1851. {
  1852. uint32_t num_alloc_desc;
  1853. uint16_t num_desc_to_free = 0;
  1854. uint32_t num_entries_avail;
  1855. uint32_t count = 0;
  1856. int sync_hw_ptr = 1;
  1857. qdf_dma_addr_t paddr;
  1858. qdf_nbuf_t rx_netbuf;
  1859. void *rxdma_ring_entry;
  1860. union dp_rx_desc_list_elem_t *next;
  1861. void *rxdma_srng;
  1862. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  1863. if (!dp_pdev) {
  1864. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1865. "pdev is null for mac_id = %d", mac_id);
  1866. return QDF_STATUS_E_FAILURE;
  1867. }
  1868. rxdma_srng = dp_rxdma_srng->hal_srng;
  1869. qdf_assert(rxdma_srng);
  1870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1871. "[%s][%d] requested %d buffers for replenish",
  1872. __func__, __LINE__, num_req_buffers);
  1873. /*
  1874. * if desc_list is NULL, allocate the descs from freelist
  1875. */
  1876. if (!(*desc_list)) {
  1877. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  1878. rx_desc_pool,
  1879. num_req_buffers,
  1880. desc_list,
  1881. tail);
  1882. if (!num_alloc_desc) {
  1883. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1884. "[%s][%d] no free rx_descs in freelist",
  1885. __func__, __LINE__);
  1886. return QDF_STATUS_E_NOMEM;
  1887. }
  1888. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1889. "[%s][%d] %d rx desc allocated", __func__, __LINE__,
  1890. num_alloc_desc);
  1891. num_req_buffers = num_alloc_desc;
  1892. }
  1893. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1894. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  1895. rxdma_srng, sync_hw_ptr);
  1896. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1897. "[%s][%d] no of available entries in rxdma ring: %d",
  1898. __func__, __LINE__, num_entries_avail);
  1899. if (num_entries_avail < num_req_buffers) {
  1900. num_desc_to_free = num_req_buffers - num_entries_avail;
  1901. num_req_buffers = num_entries_avail;
  1902. }
  1903. while (count <= num_req_buffers) {
  1904. rx_netbuf = dp_rx_nbuf_prepare(dp_soc, dp_pdev);
  1905. /*
  1906. * qdf_nbuf alloc or map failed,
  1907. * keep HP in mon_status_ring unchanged,
  1908. * wait dp_rx_mon_status_srng_process
  1909. * to fill in buffer at current HP.
  1910. */
  1911. if (qdf_unlikely(!rx_netbuf)) {
  1912. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1913. "%s: qdf_nbuf allocate or map fail, count %d",
  1914. __func__, count);
  1915. break;
  1916. }
  1917. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  1918. next = (*desc_list)->next;
  1919. rxdma_ring_entry = hal_srng_src_get_cur_hp_n_move_next(
  1920. dp_soc->hal_soc,
  1921. rxdma_srng);
  1922. if (qdf_unlikely(!rxdma_ring_entry)) {
  1923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1924. "[%s][%d] rxdma_ring_entry is NULL, count - %d",
  1925. __func__, __LINE__, count);
  1926. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, rx_netbuf,
  1927. QDF_DMA_FROM_DEVICE,
  1928. rx_desc_pool->buf_size);
  1929. qdf_nbuf_free(rx_netbuf);
  1930. break;
  1931. }
  1932. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  1933. (*desc_list)->rx_desc.in_use = 1;
  1934. count++;
  1935. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1936. (*desc_list)->rx_desc.cookie, owner);
  1937. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1938. "[%s][%d] rx_desc=%pK, cookie=%d, nbuf=%pK, \
  1939. paddr=%pK",
  1940. __func__, __LINE__, &(*desc_list)->rx_desc,
  1941. (*desc_list)->rx_desc.cookie, rx_netbuf,
  1942. (void *)paddr);
  1943. *desc_list = next;
  1944. }
  1945. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1947. "successfully replenished %d buffers", num_req_buffers);
  1948. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1949. "%d rx desc added back to free list", num_desc_to_free);
  1950. /*
  1951. * add any available free desc back to the free list
  1952. */
  1953. if (*desc_list) {
  1954. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  1955. mac_id, rx_desc_pool);
  1956. }
  1957. return QDF_STATUS_SUCCESS;
  1958. }