qmi.c 106 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/soc/qcom/qmi.h>
  8. #include "bus.h"
  9. #include "debug.h"
  10. #include "main.h"
  11. #include "qmi.h"
  12. #include "genl.h"
  13. #define WLFW_SERVICE_INS_ID_V01 1
  14. #define WLFW_CLIENT_ID 0x4b4e454c
  15. #define BDF_FILE_NAME_PREFIX "bdwlan"
  16. #define ELF_BDF_FILE_NAME "bdwlan.elf"
  17. #define ELF_BDF_FILE_NAME_GF "bdwlang.elf"
  18. #define ELF_BDF_FILE_NAME_PREFIX "bdwlan.e"
  19. #define ELF_BDF_FILE_NAME_GF_PREFIX "bdwlang.e"
  20. #define BIN_BDF_FILE_NAME "bdwlan.bin"
  21. #define BIN_BDF_FILE_NAME_GF "bdwlang.bin"
  22. #define BIN_BDF_FILE_NAME_PREFIX "bdwlan.b"
  23. #define BIN_BDF_FILE_NAME_GF_PREFIX "bdwlang.b"
  24. #define REGDB_FILE_NAME "regdb.bin"
  25. #define HDS_FILE_NAME "hds.bin"
  26. #define CHIP_ID_GF_MASK 0x10
  27. #define CONN_ROAM_FILE_NAME "wlan-connection-roaming"
  28. #define INI_EXT ".ini"
  29. #define INI_FILE_NAME_LEN 100
  30. #define QDSS_TRACE_CONFIG_FILE "qdss_trace_config"
  31. #ifdef CONFIG_CNSS2_DEBUG
  32. #define QDSS_DEBUG_FILE_STR "debug_"
  33. #else
  34. #define QDSS_DEBUG_FILE_STR ""
  35. #endif
  36. #define HW_V1_NUMBER "v1"
  37. #define HW_V2_NUMBER "v2"
  38. #define CE_MSI_NAME "CE"
  39. #define QMI_WLFW_TIMEOUT_MS (plat_priv->ctrl_params.qmi_timeout)
  40. #define QMI_WLFW_TIMEOUT_JF msecs_to_jiffies(QMI_WLFW_TIMEOUT_MS)
  41. #define COEX_TIMEOUT QMI_WLFW_TIMEOUT_JF
  42. #define IMS_TIMEOUT QMI_WLFW_TIMEOUT_JF
  43. #define QMI_WLFW_MAX_RECV_BUF_SIZE SZ_8K
  44. #define IMSPRIVATE_SERVICE_MAX_MSG_LEN SZ_8K
  45. #define DMS_QMI_MAX_MSG_LEN SZ_256
  46. #define MAX_SHADOW_REG_RESERVED 2
  47. #define MAX_NUM_SHADOW_REG_V3 (QMI_WLFW_MAX_NUM_SHADOW_REG_V3_USAGE_V01 - \
  48. MAX_SHADOW_REG_RESERVED)
  49. #define QMI_WLFW_MAC_READY_TIMEOUT_MS 50
  50. #define QMI_WLFW_MAC_READY_MAX_RETRY 200
  51. enum nm_modem_bit {
  52. SLEEP_CLOCK_SELECT_INTERNAL_BIT = BIT(1),
  53. HOST_CSTATE_BIT = BIT(2),
  54. };
  55. #ifdef CONFIG_CNSS2_DEBUG
  56. static bool ignore_qmi_failure;
  57. #define CNSS_QMI_ASSERT() CNSS_ASSERT(ignore_qmi_failure)
  58. void cnss_ignore_qmi_failure(bool ignore)
  59. {
  60. ignore_qmi_failure = ignore;
  61. }
  62. #else
  63. #define CNSS_QMI_ASSERT() do { } while (0)
  64. void cnss_ignore_qmi_failure(bool ignore) { }
  65. #endif
  66. static char *cnss_qmi_mode_to_str(enum cnss_driver_mode mode)
  67. {
  68. switch (mode) {
  69. case CNSS_MISSION:
  70. return "MISSION";
  71. case CNSS_FTM:
  72. return "FTM";
  73. case CNSS_EPPING:
  74. return "EPPING";
  75. case CNSS_WALTEST:
  76. return "WALTEST";
  77. case CNSS_OFF:
  78. return "OFF";
  79. case CNSS_CCPM:
  80. return "CCPM";
  81. case CNSS_QVIT:
  82. return "QVIT";
  83. case CNSS_CALIBRATION:
  84. return "CALIBRATION";
  85. default:
  86. return "UNKNOWN";
  87. }
  88. }
  89. static int qmi_send_wait(struct qmi_handle *qmi, void *req, void *rsp,
  90. struct qmi_elem_info *req_ei,
  91. struct qmi_elem_info *rsp_ei,
  92. int req_id, size_t req_len,
  93. unsigned long timeout)
  94. {
  95. struct qmi_txn txn;
  96. int ret;
  97. char *err_msg;
  98. struct qmi_response_type_v01 *resp = rsp;
  99. ret = qmi_txn_init(qmi, &txn, rsp_ei, rsp);
  100. if (ret < 0) {
  101. err_msg = "Qmi fail: fail to init txn,";
  102. goto out;
  103. }
  104. ret = qmi_send_request(qmi, NULL, &txn, req_id,
  105. req_len, req_ei, req);
  106. if (ret < 0) {
  107. qmi_txn_cancel(&txn);
  108. err_msg = "Qmi fail: fail to send req,";
  109. goto out;
  110. }
  111. ret = qmi_txn_wait(&txn, timeout);
  112. if (ret < 0) {
  113. err_msg = "Qmi fail: wait timeout,";
  114. goto out;
  115. } else if (resp->result != QMI_RESULT_SUCCESS_V01) {
  116. err_msg = "Qmi fail: request rejected,";
  117. cnss_pr_err("Qmi fail: respons with error:%d\n",
  118. resp->error);
  119. ret = -resp->result;
  120. goto out;
  121. }
  122. cnss_pr_dbg("req %x success\n", req_id);
  123. return 0;
  124. out:
  125. cnss_pr_err("%s req %x, ret %d\n", err_msg, req_id, ret);
  126. return ret;
  127. }
  128. static int cnss_wlfw_ind_register_send_sync(struct cnss_plat_data *plat_priv)
  129. {
  130. struct wlfw_ind_register_req_msg_v01 *req;
  131. struct wlfw_ind_register_resp_msg_v01 *resp;
  132. struct qmi_txn txn;
  133. int ret = 0;
  134. cnss_pr_dbg("Sending indication register message, state: 0x%lx\n",
  135. plat_priv->driver_state);
  136. req = kzalloc(sizeof(*req), GFP_KERNEL);
  137. if (!req)
  138. return -ENOMEM;
  139. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  140. if (!resp) {
  141. kfree(req);
  142. return -ENOMEM;
  143. }
  144. req->client_id_valid = 1;
  145. req->client_id = WLFW_CLIENT_ID;
  146. req->request_mem_enable_valid = 1;
  147. req->request_mem_enable = 1;
  148. req->fw_mem_ready_enable_valid = 1;
  149. req->fw_mem_ready_enable = 1;
  150. /* fw_ready indication is replaced by fw_init_done in HST/HSP */
  151. req->fw_init_done_enable_valid = 1;
  152. req->fw_init_done_enable = 1;
  153. req->pin_connect_result_enable_valid = 1;
  154. req->pin_connect_result_enable = 1;
  155. req->cal_done_enable_valid = 1;
  156. req->cal_done_enable = 1;
  157. req->qdss_trace_req_mem_enable_valid = 1;
  158. req->qdss_trace_req_mem_enable = 1;
  159. req->qdss_trace_save_enable_valid = 1;
  160. req->qdss_trace_save_enable = 1;
  161. req->qdss_trace_free_enable_valid = 1;
  162. req->qdss_trace_free_enable = 1;
  163. req->respond_get_info_enable_valid = 1;
  164. req->respond_get_info_enable = 1;
  165. req->wfc_call_twt_config_enable_valid = 1;
  166. req->wfc_call_twt_config_enable = 1;
  167. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  168. wlfw_ind_register_resp_msg_v01_ei, resp);
  169. if (ret < 0) {
  170. cnss_pr_err("Failed to initialize txn for indication register request, err: %d\n",
  171. ret);
  172. goto out;
  173. }
  174. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  175. QMI_WLFW_IND_REGISTER_REQ_V01,
  176. WLFW_IND_REGISTER_REQ_MSG_V01_MAX_MSG_LEN,
  177. wlfw_ind_register_req_msg_v01_ei, req);
  178. if (ret < 0) {
  179. qmi_txn_cancel(&txn);
  180. cnss_pr_err("Failed to send indication register request, err: %d\n",
  181. ret);
  182. goto out;
  183. }
  184. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  185. if (ret < 0) {
  186. cnss_pr_err("Failed to wait for response of indication register request, err: %d\n",
  187. ret);
  188. goto out;
  189. }
  190. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  191. cnss_pr_err("Indication register request failed, result: %d, err: %d\n",
  192. resp->resp.result, resp->resp.error);
  193. ret = -resp->resp.result;
  194. goto out;
  195. }
  196. if (resp->fw_status_valid) {
  197. if (resp->fw_status & QMI_WLFW_ALREADY_REGISTERED_V01) {
  198. ret = -EALREADY;
  199. goto qmi_registered;
  200. }
  201. }
  202. kfree(req);
  203. kfree(resp);
  204. return 0;
  205. out:
  206. CNSS_QMI_ASSERT();
  207. qmi_registered:
  208. kfree(req);
  209. kfree(resp);
  210. return ret;
  211. }
  212. static void cnss_wlfw_host_cap_parse_mlo(struct cnss_plat_data *plat_priv,
  213. struct wlfw_host_cap_req_msg_v01 *req)
  214. {
  215. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  216. plat_priv->device_id == MANGO_DEVICE_ID ||
  217. plat_priv->device_id == PEACH_DEVICE_ID) {
  218. req->mlo_capable_valid = 1;
  219. req->mlo_capable = 1;
  220. req->mlo_chip_id_valid = 1;
  221. req->mlo_chip_id = 0;
  222. req->mlo_group_id_valid = 1;
  223. req->mlo_group_id = 0;
  224. req->max_mlo_peer_valid = 1;
  225. /* Max peer number generally won't change for the same device
  226. * but needs to be synced with host driver.
  227. */
  228. req->max_mlo_peer = 32;
  229. req->mlo_num_chips_valid = 1;
  230. req->mlo_num_chips = 1;
  231. req->mlo_chip_info_valid = 1;
  232. req->mlo_chip_info[0].chip_id = 0;
  233. req->mlo_chip_info[0].num_local_links = 2;
  234. req->mlo_chip_info[0].hw_link_id[0] = 0;
  235. req->mlo_chip_info[0].hw_link_id[1] = 1;
  236. req->mlo_chip_info[0].valid_mlo_link_id[0] = 1;
  237. req->mlo_chip_info[0].valid_mlo_link_id[1] = 1;
  238. }
  239. }
  240. static int cnss_wlfw_host_cap_send_sync(struct cnss_plat_data *plat_priv)
  241. {
  242. struct wlfw_host_cap_req_msg_v01 *req;
  243. struct wlfw_host_cap_resp_msg_v01 *resp;
  244. struct qmi_txn txn;
  245. int ret = 0;
  246. u64 iova_start = 0, iova_size = 0,
  247. iova_ipa_start = 0, iova_ipa_size = 0;
  248. u64 feature_list = 0;
  249. cnss_pr_dbg("Sending host capability message, state: 0x%lx\n",
  250. plat_priv->driver_state);
  251. req = kzalloc(sizeof(*req), GFP_KERNEL);
  252. if (!req)
  253. return -ENOMEM;
  254. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  255. if (!resp) {
  256. kfree(req);
  257. return -ENOMEM;
  258. }
  259. req->num_clients_valid = 1;
  260. req->num_clients = 1;
  261. cnss_pr_dbg("Number of clients is %d\n", req->num_clients);
  262. req->wake_msi = cnss_bus_get_wake_irq(plat_priv);
  263. if (req->wake_msi) {
  264. cnss_pr_dbg("WAKE MSI base data is %d\n", req->wake_msi);
  265. req->wake_msi_valid = 1;
  266. }
  267. req->bdf_support_valid = 1;
  268. req->bdf_support = 1;
  269. req->m3_support_valid = 1;
  270. req->m3_support = 1;
  271. req->m3_cache_support_valid = 1;
  272. req->m3_cache_support = 1;
  273. req->cal_done_valid = 1;
  274. req->cal_done = plat_priv->cal_done;
  275. cnss_pr_dbg("Calibration done is %d\n", plat_priv->cal_done);
  276. if (plat_priv->sleep_clk) {
  277. req->nm_modem_valid = 1;
  278. /* Notify firmware about the sleep clock selection,
  279. * nm_modem_bit[1] is used for this purpose.
  280. */
  281. req->nm_modem |= SLEEP_CLOCK_SELECT_INTERNAL_BIT;
  282. }
  283. if (cnss_bus_is_smmu_s1_enabled(plat_priv) &&
  284. !cnss_bus_get_iova(plat_priv, &iova_start, &iova_size) &&
  285. !cnss_bus_get_iova_ipa(plat_priv, &iova_ipa_start,
  286. &iova_ipa_size)) {
  287. req->ddr_range_valid = 1;
  288. req->ddr_range[0].start = iova_start;
  289. req->ddr_range[0].size = iova_size + iova_ipa_size;
  290. cnss_pr_dbg("Sending iova starting 0x%llx with size 0x%llx\n",
  291. req->ddr_range[0].start, req->ddr_range[0].size);
  292. }
  293. req->host_build_type_valid = 1;
  294. req->host_build_type = cnss_get_host_build_type();
  295. cnss_wlfw_host_cap_parse_mlo(plat_priv, req);
  296. ret = cnss_get_feature_list(plat_priv, &feature_list);
  297. if (!ret) {
  298. req->feature_list_valid = 1;
  299. req->feature_list = feature_list;
  300. cnss_pr_dbg("Sending feature list 0x%llx\n",
  301. req->feature_list);
  302. }
  303. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  304. wlfw_host_cap_resp_msg_v01_ei, resp);
  305. if (ret < 0) {
  306. cnss_pr_err("Failed to initialize txn for host capability request, err: %d\n",
  307. ret);
  308. goto out;
  309. }
  310. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  311. QMI_WLFW_HOST_CAP_REQ_V01,
  312. WLFW_HOST_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  313. wlfw_host_cap_req_msg_v01_ei, req);
  314. if (ret < 0) {
  315. qmi_txn_cancel(&txn);
  316. cnss_pr_err("Failed to send host capability request, err: %d\n",
  317. ret);
  318. goto out;
  319. }
  320. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  321. if (ret < 0) {
  322. cnss_pr_err("Failed to wait for response of host capability request, err: %d\n",
  323. ret);
  324. goto out;
  325. }
  326. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  327. cnss_pr_err("Host capability request failed, result: %d, err: %d\n",
  328. resp->resp.result, resp->resp.error);
  329. ret = -resp->resp.result;
  330. goto out;
  331. }
  332. kfree(req);
  333. kfree(resp);
  334. return 0;
  335. out:
  336. CNSS_QMI_ASSERT();
  337. kfree(req);
  338. kfree(resp);
  339. return ret;
  340. }
  341. int cnss_wlfw_respond_mem_send_sync(struct cnss_plat_data *plat_priv)
  342. {
  343. struct wlfw_respond_mem_req_msg_v01 *req;
  344. struct wlfw_respond_mem_resp_msg_v01 *resp;
  345. struct qmi_txn txn;
  346. struct cnss_fw_mem *fw_mem = plat_priv->fw_mem;
  347. int ret = 0, i;
  348. cnss_pr_dbg("Sending respond memory message, state: 0x%lx\n",
  349. plat_priv->driver_state);
  350. req = kzalloc(sizeof(*req), GFP_KERNEL);
  351. if (!req)
  352. return -ENOMEM;
  353. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  354. if (!resp) {
  355. kfree(req);
  356. return -ENOMEM;
  357. }
  358. if (plat_priv->fw_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  359. cnss_pr_err("Invalid seg len %u\n", plat_priv->fw_mem_seg_len);
  360. ret = -EINVAL;
  361. goto out;
  362. }
  363. req->mem_seg_len = plat_priv->fw_mem_seg_len;
  364. for (i = 0; i < req->mem_seg_len; i++) {
  365. if (!fw_mem[i].pa || !fw_mem[i].size) {
  366. if (fw_mem[i].type == 0) {
  367. cnss_pr_err("Invalid memory for FW type, segment = %d\n",
  368. i);
  369. ret = -EINVAL;
  370. goto out;
  371. }
  372. cnss_pr_err("Memory for FW is not available for type: %u\n",
  373. fw_mem[i].type);
  374. ret = -ENOMEM;
  375. goto out;
  376. }
  377. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  378. fw_mem[i].va, &fw_mem[i].pa,
  379. fw_mem[i].size, fw_mem[i].type);
  380. req->mem_seg[i].addr = fw_mem[i].pa;
  381. req->mem_seg[i].size = fw_mem[i].size;
  382. req->mem_seg[i].type = fw_mem[i].type;
  383. }
  384. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  385. wlfw_respond_mem_resp_msg_v01_ei, resp);
  386. if (ret < 0) {
  387. cnss_pr_err("Failed to initialize txn for respond memory request, err: %d\n",
  388. ret);
  389. goto out;
  390. }
  391. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  392. QMI_WLFW_RESPOND_MEM_REQ_V01,
  393. WLFW_RESPOND_MEM_REQ_MSG_V01_MAX_MSG_LEN,
  394. wlfw_respond_mem_req_msg_v01_ei, req);
  395. if (ret < 0) {
  396. qmi_txn_cancel(&txn);
  397. cnss_pr_err("Failed to send respond memory request, err: %d\n",
  398. ret);
  399. goto out;
  400. }
  401. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  402. if (ret < 0) {
  403. cnss_pr_err("Failed to wait for response of respond memory request, err: %d\n",
  404. ret);
  405. goto out;
  406. }
  407. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  408. cnss_pr_err("Respond memory request failed, result: %d, err: %d\n",
  409. resp->resp.result, resp->resp.error);
  410. ret = -resp->resp.result;
  411. goto out;
  412. }
  413. kfree(req);
  414. kfree(resp);
  415. return 0;
  416. out:
  417. CNSS_QMI_ASSERT();
  418. kfree(req);
  419. kfree(resp);
  420. return ret;
  421. }
  422. int cnss_wlfw_tgt_cap_send_sync(struct cnss_plat_data *plat_priv)
  423. {
  424. struct wlfw_cap_req_msg_v01 *req;
  425. struct wlfw_cap_resp_msg_v01 *resp;
  426. struct qmi_txn txn;
  427. char *fw_build_timestamp;
  428. int ret = 0, i;
  429. cnss_pr_dbg("Sending target capability message, state: 0x%lx\n",
  430. plat_priv->driver_state);
  431. req = kzalloc(sizeof(*req), GFP_KERNEL);
  432. if (!req)
  433. return -ENOMEM;
  434. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  435. if (!resp) {
  436. kfree(req);
  437. return -ENOMEM;
  438. }
  439. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  440. wlfw_cap_resp_msg_v01_ei, resp);
  441. if (ret < 0) {
  442. cnss_pr_err("Failed to initialize txn for target capability request, err: %d\n",
  443. ret);
  444. goto out;
  445. }
  446. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  447. QMI_WLFW_CAP_REQ_V01,
  448. WLFW_CAP_REQ_MSG_V01_MAX_MSG_LEN,
  449. wlfw_cap_req_msg_v01_ei, req);
  450. if (ret < 0) {
  451. qmi_txn_cancel(&txn);
  452. cnss_pr_err("Failed to send respond target capability request, err: %d\n",
  453. ret);
  454. goto out;
  455. }
  456. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  457. if (ret < 0) {
  458. cnss_pr_err("Failed to wait for response of target capability request, err: %d\n",
  459. ret);
  460. goto out;
  461. }
  462. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  463. cnss_pr_err("Target capability request failed, result: %d, err: %d\n",
  464. resp->resp.result, resp->resp.error);
  465. ret = -resp->resp.result;
  466. goto out;
  467. }
  468. if (resp->chip_info_valid) {
  469. plat_priv->chip_info.chip_id = resp->chip_info.chip_id;
  470. plat_priv->chip_info.chip_family = resp->chip_info.chip_family;
  471. }
  472. if (resp->board_info_valid)
  473. plat_priv->board_info.board_id = resp->board_info.board_id;
  474. else
  475. plat_priv->board_info.board_id = 0xFF;
  476. if (resp->soc_info_valid)
  477. plat_priv->soc_info.soc_id = resp->soc_info.soc_id;
  478. if (resp->fw_version_info_valid) {
  479. plat_priv->fw_version_info.fw_version =
  480. resp->fw_version_info.fw_version;
  481. fw_build_timestamp = resp->fw_version_info.fw_build_timestamp;
  482. fw_build_timestamp[QMI_WLFW_MAX_TIMESTAMP_LEN] = '\0';
  483. strlcpy(plat_priv->fw_version_info.fw_build_timestamp,
  484. resp->fw_version_info.fw_build_timestamp,
  485. QMI_WLFW_MAX_TIMESTAMP_LEN + 1);
  486. }
  487. if (resp->fw_build_id_valid) {
  488. resp->fw_build_id[QMI_WLFW_MAX_BUILD_ID_LEN] = '\0';
  489. strlcpy(plat_priv->fw_build_id, resp->fw_build_id,
  490. QMI_WLFW_MAX_BUILD_ID_LEN + 1);
  491. }
  492. /* FW will send aop retention volatage for qca6490 */
  493. if (resp->voltage_mv_valid) {
  494. plat_priv->cpr_info.voltage = resp->voltage_mv;
  495. cnss_pr_dbg("Voltage for CPR: %dmV\n",
  496. plat_priv->cpr_info.voltage);
  497. cnss_update_cpr_info(plat_priv);
  498. }
  499. if (resp->time_freq_hz_valid) {
  500. plat_priv->device_freq_hz = resp->time_freq_hz;
  501. cnss_pr_dbg("Device frequency is %d HZ\n",
  502. plat_priv->device_freq_hz);
  503. }
  504. if (resp->otp_version_valid)
  505. plat_priv->otp_version = resp->otp_version;
  506. if (resp->dev_mem_info_valid) {
  507. for (i = 0; i < QMI_WLFW_MAX_DEV_MEM_NUM_V01; i++) {
  508. plat_priv->dev_mem_info[i].start =
  509. resp->dev_mem_info[i].start;
  510. plat_priv->dev_mem_info[i].size =
  511. resp->dev_mem_info[i].size;
  512. cnss_pr_buf("Device memory info[%d]: start = 0x%llx, size = 0x%llx\n",
  513. i, plat_priv->dev_mem_info[i].start,
  514. plat_priv->dev_mem_info[i].size);
  515. }
  516. }
  517. if (resp->fw_caps_valid) {
  518. plat_priv->fw_pcie_gen_switch =
  519. !!(resp->fw_caps & QMI_WLFW_HOST_PCIE_GEN_SWITCH_V01);
  520. plat_priv->fw_aux_uc_support =
  521. !!(resp->fw_caps & QMI_WLFW_AUX_UC_SUPPORT_V01);
  522. cnss_pr_dbg("FW aux uc support capability: %d\n",
  523. plat_priv->fw_aux_uc_support);
  524. plat_priv->fw_caps = resp->fw_caps;
  525. }
  526. if (resp->hang_data_length_valid &&
  527. resp->hang_data_length &&
  528. resp->hang_data_length <= WLFW_MAX_HANG_EVENT_DATA_SIZE)
  529. plat_priv->hang_event_data_len = resp->hang_data_length;
  530. else
  531. plat_priv->hang_event_data_len = 0;
  532. if (resp->hang_data_addr_offset_valid)
  533. plat_priv->hang_data_addr_offset = resp->hang_data_addr_offset;
  534. else
  535. plat_priv->hang_data_addr_offset = 0;
  536. if (resp->hwid_bitmap_valid)
  537. plat_priv->hwid_bitmap = resp->hwid_bitmap;
  538. if (resp->ol_cpr_cfg_valid)
  539. cnss_aop_ol_cpr_cfg_setup(plat_priv, &resp->ol_cpr_cfg);
  540. /* Disable WLAN PDC in AOP firmware for boards which support on chip PMIC
  541. * so AOP will ignore SW_CTRL changes and do not update regulator votes.
  542. **/
  543. for (i = 0; i < plat_priv->on_chip_pmic_devices_count; i++) {
  544. if (plat_priv->board_info.board_id ==
  545. plat_priv->on_chip_pmic_board_ids[i]) {
  546. cnss_pr_dbg("Disabling WLAN PDC for board_id: %02x\n",
  547. plat_priv->board_info.board_id);
  548. ret = cnss_aop_send_msg(plat_priv,
  549. "{class: wlan_pdc, ss: rf, res: pdc, enable: 0}");
  550. if (ret < 0)
  551. cnss_pr_dbg("Failed to Send AOP Msg");
  552. break;
  553. }
  554. }
  555. cnss_pr_dbg("Target capability: chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, otp_version: 0x%x\n",
  556. plat_priv->chip_info.chip_id,
  557. plat_priv->chip_info.chip_family,
  558. plat_priv->board_info.board_id, plat_priv->soc_info.soc_id,
  559. plat_priv->otp_version);
  560. cnss_pr_dbg("fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s, hwid_bitmap:0x%x\n",
  561. plat_priv->fw_version_info.fw_version,
  562. plat_priv->fw_version_info.fw_build_timestamp,
  563. plat_priv->fw_build_id,
  564. plat_priv->hwid_bitmap);
  565. cnss_pr_dbg("Hang event params, Length: 0x%x, Offset Address: 0x%x\n",
  566. plat_priv->hang_event_data_len,
  567. plat_priv->hang_data_addr_offset);
  568. kfree(req);
  569. kfree(resp);
  570. return 0;
  571. out:
  572. CNSS_QMI_ASSERT();
  573. kfree(req);
  574. kfree(resp);
  575. return ret;
  576. }
  577. static char *cnss_bdf_type_to_str(enum cnss_bdf_type bdf_type)
  578. {
  579. switch (bdf_type) {
  580. case CNSS_BDF_BIN:
  581. case CNSS_BDF_ELF:
  582. return "BDF";
  583. case CNSS_BDF_REGDB:
  584. return "REGDB";
  585. case CNSS_BDF_HDS:
  586. return "HDS";
  587. default:
  588. return "UNKNOWN";
  589. }
  590. }
  591. static int cnss_get_bdf_file_name(struct cnss_plat_data *plat_priv,
  592. u32 bdf_type, char *filename,
  593. u32 filename_len)
  594. {
  595. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  596. int ret = 0;
  597. switch (bdf_type) {
  598. case CNSS_BDF_ELF:
  599. /* Board ID will be equal or less than 0xFF in GF mask case */
  600. if (plat_priv->board_info.board_id == 0xFF) {
  601. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  602. snprintf(filename_tmp, filename_len,
  603. ELF_BDF_FILE_NAME_GF);
  604. else
  605. snprintf(filename_tmp, filename_len,
  606. ELF_BDF_FILE_NAME);
  607. } else if (plat_priv->board_info.board_id < 0xFF) {
  608. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  609. snprintf(filename_tmp, filename_len,
  610. ELF_BDF_FILE_NAME_GF_PREFIX "%02x",
  611. plat_priv->board_info.board_id);
  612. else
  613. snprintf(filename_tmp, filename_len,
  614. ELF_BDF_FILE_NAME_PREFIX "%02x",
  615. plat_priv->board_info.board_id);
  616. } else {
  617. snprintf(filename_tmp, filename_len,
  618. BDF_FILE_NAME_PREFIX "%02x.e%02x",
  619. plat_priv->board_info.board_id >> 8 & 0xFF,
  620. plat_priv->board_info.board_id & 0xFF);
  621. }
  622. break;
  623. case CNSS_BDF_BIN:
  624. if (plat_priv->board_info.board_id == 0xFF) {
  625. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  626. snprintf(filename_tmp, filename_len,
  627. BIN_BDF_FILE_NAME_GF);
  628. else
  629. snprintf(filename_tmp, filename_len,
  630. BIN_BDF_FILE_NAME);
  631. } else if (plat_priv->board_info.board_id < 0xFF) {
  632. if (plat_priv->chip_info.chip_id & CHIP_ID_GF_MASK)
  633. snprintf(filename_tmp, filename_len,
  634. BIN_BDF_FILE_NAME_GF_PREFIX "%02x",
  635. plat_priv->board_info.board_id);
  636. else
  637. snprintf(filename_tmp, filename_len,
  638. BIN_BDF_FILE_NAME_PREFIX "%02x",
  639. plat_priv->board_info.board_id);
  640. } else {
  641. snprintf(filename_tmp, filename_len,
  642. BDF_FILE_NAME_PREFIX "%02x.b%02x",
  643. plat_priv->board_info.board_id >> 8 & 0xFF,
  644. plat_priv->board_info.board_id & 0xFF);
  645. }
  646. break;
  647. case CNSS_BDF_REGDB:
  648. snprintf(filename_tmp, filename_len, REGDB_FILE_NAME);
  649. break;
  650. case CNSS_BDF_HDS:
  651. snprintf(filename_tmp, filename_len, HDS_FILE_NAME);
  652. break;
  653. default:
  654. cnss_pr_err("Invalid BDF type: %d\n",
  655. plat_priv->ctrl_params.bdf_type);
  656. ret = -EINVAL;
  657. break;
  658. }
  659. if (!ret)
  660. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  661. return ret;
  662. }
  663. int cnss_wlfw_ini_file_send_sync(struct cnss_plat_data *plat_priv,
  664. enum wlfw_ini_file_type_v01 file_type)
  665. {
  666. struct wlfw_ini_file_download_req_msg_v01 *req;
  667. struct wlfw_ini_file_download_resp_msg_v01 *resp;
  668. struct qmi_txn txn;
  669. int ret = 0;
  670. const struct firmware *fw;
  671. char filename[INI_FILE_NAME_LEN] = {0};
  672. char tmp_filename[INI_FILE_NAME_LEN] = {0};
  673. const u8 *temp;
  674. unsigned int remaining;
  675. bool backup_supported = false;
  676. req = kzalloc(sizeof(*req), GFP_KERNEL);
  677. if (!req)
  678. return -ENOMEM;
  679. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  680. if (!resp) {
  681. kfree(req);
  682. return -ENOMEM;
  683. }
  684. switch (file_type) {
  685. case WLFW_CONN_ROAM_INI_V01:
  686. snprintf(tmp_filename, sizeof(tmp_filename),
  687. CONN_ROAM_FILE_NAME);
  688. backup_supported = true;
  689. break;
  690. default:
  691. cnss_pr_err("Invalid file type: %u\n", file_type);
  692. ret = -EINVAL;
  693. goto err_req_fw;
  694. }
  695. snprintf(filename, sizeof(filename), "%s%s", tmp_filename, INI_EXT);
  696. /* Fetch the file */
  697. ret = firmware_request_nowarn(&fw, filename, &plat_priv->plat_dev->dev);
  698. if (ret) {
  699. if (!backup_supported)
  700. goto err_req_fw;
  701. snprintf(filename, sizeof(filename),
  702. "%s-%s%s", tmp_filename, "backup", INI_EXT);
  703. ret = firmware_request_nowarn(&fw, filename,
  704. &plat_priv->plat_dev->dev);
  705. if (ret)
  706. goto err_req_fw;
  707. }
  708. temp = fw->data;
  709. remaining = fw->size;
  710. cnss_pr_dbg("Downloading INI file: %s, size: %u\n", filename,
  711. remaining);
  712. while (remaining) {
  713. req->file_type_valid = 1;
  714. req->file_type = file_type;
  715. req->total_size_valid = 1;
  716. req->total_size = remaining;
  717. req->seg_id_valid = 1;
  718. req->data_valid = 1;
  719. req->end_valid = 1;
  720. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  721. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  722. } else {
  723. req->data_len = remaining;
  724. req->end = 1;
  725. }
  726. memcpy(req->data, temp, req->data_len);
  727. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  728. wlfw_ini_file_download_resp_msg_v01_ei,
  729. resp);
  730. if (ret < 0) {
  731. cnss_pr_err("Failed to initialize txn for INI file download request, err: %d\n",
  732. ret);
  733. goto err;
  734. }
  735. ret = qmi_send_request
  736. (&plat_priv->qmi_wlfw, NULL, &txn,
  737. QMI_WLFW_INI_FILE_DOWNLOAD_REQ_V01,
  738. WLFW_INI_FILE_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  739. wlfw_ini_file_download_req_msg_v01_ei, req);
  740. if (ret < 0) {
  741. qmi_txn_cancel(&txn);
  742. cnss_pr_err("Failed to send INI File download request, err: %d\n",
  743. ret);
  744. goto err;
  745. }
  746. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  747. if (ret < 0) {
  748. cnss_pr_err("Failed to wait for response of INI File download request, err: %d\n",
  749. ret);
  750. goto err;
  751. }
  752. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  753. cnss_pr_err("INI file download request failed, result: %d, err: %d\n",
  754. resp->resp.result, resp->resp.error);
  755. ret = -resp->resp.result;
  756. goto err;
  757. }
  758. remaining -= req->data_len;
  759. temp += req->data_len;
  760. req->seg_id++;
  761. }
  762. release_firmware(fw);
  763. kfree(req);
  764. kfree(resp);
  765. return 0;
  766. err:
  767. release_firmware(fw);
  768. err_req_fw:
  769. kfree(req);
  770. kfree(resp);
  771. return ret;
  772. }
  773. int cnss_wlfw_bdf_dnld_send_sync(struct cnss_plat_data *plat_priv,
  774. u32 bdf_type)
  775. {
  776. struct wlfw_bdf_download_req_msg_v01 *req;
  777. struct wlfw_bdf_download_resp_msg_v01 *resp;
  778. struct qmi_txn txn;
  779. char filename[MAX_FIRMWARE_NAME_LEN];
  780. const struct firmware *fw_entry = NULL;
  781. const u8 *temp;
  782. unsigned int remaining;
  783. int ret = 0;
  784. cnss_pr_dbg("Sending QMI_WLFW_BDF_DOWNLOAD_REQ_V01 message for bdf_type: %d (%s), state: 0x%lx\n",
  785. bdf_type, cnss_bdf_type_to_str(bdf_type), plat_priv->driver_state);
  786. req = kzalloc(sizeof(*req), GFP_KERNEL);
  787. if (!req)
  788. return -ENOMEM;
  789. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  790. if (!resp) {
  791. kfree(req);
  792. return -ENOMEM;
  793. }
  794. ret = cnss_get_bdf_file_name(plat_priv, bdf_type,
  795. filename, sizeof(filename));
  796. if (ret)
  797. goto err_req_fw;
  798. if (bdf_type == CNSS_BDF_REGDB)
  799. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  800. filename);
  801. else
  802. ret = firmware_request_nowarn(&fw_entry, filename,
  803. &plat_priv->plat_dev->dev);
  804. if (ret) {
  805. cnss_pr_err("Failed to load %s: %s, ret: %d\n",
  806. cnss_bdf_type_to_str(bdf_type), filename, ret);
  807. goto err_req_fw;
  808. }
  809. temp = fw_entry->data;
  810. remaining = fw_entry->size;
  811. cnss_pr_dbg("Downloading %s: %s, size: %u\n",
  812. cnss_bdf_type_to_str(bdf_type), filename, remaining);
  813. while (remaining) {
  814. req->valid = 1;
  815. req->file_id_valid = 1;
  816. req->file_id = plat_priv->board_info.board_id;
  817. req->total_size_valid = 1;
  818. req->total_size = remaining;
  819. req->seg_id_valid = 1;
  820. req->data_valid = 1;
  821. req->end_valid = 1;
  822. req->bdf_type_valid = 1;
  823. req->bdf_type = bdf_type;
  824. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  825. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  826. } else {
  827. req->data_len = remaining;
  828. req->end = 1;
  829. }
  830. memcpy(req->data, temp, req->data_len);
  831. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  832. wlfw_bdf_download_resp_msg_v01_ei, resp);
  833. if (ret < 0) {
  834. cnss_pr_err("Failed to initialize txn for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  835. cnss_bdf_type_to_str(bdf_type), ret);
  836. goto err_send;
  837. }
  838. ret = qmi_send_request
  839. (&plat_priv->qmi_wlfw, NULL, &txn,
  840. QMI_WLFW_BDF_DOWNLOAD_REQ_V01,
  841. WLFW_BDF_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  842. wlfw_bdf_download_req_msg_v01_ei, req);
  843. if (ret < 0) {
  844. qmi_txn_cancel(&txn);
  845. cnss_pr_err("Failed to send QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, error: %d\n",
  846. cnss_bdf_type_to_str(bdf_type), ret);
  847. goto err_send;
  848. }
  849. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  850. if (ret < 0) {
  851. cnss_pr_err("Timeout while waiting for FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s, err: %d\n",
  852. cnss_bdf_type_to_str(bdf_type), ret);
  853. goto err_send;
  854. }
  855. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  856. cnss_pr_err("FW response for QMI_WLFW_BDF_DOWNLOAD_REQ_V01 request for %s failed, result: %d, err: %d\n",
  857. cnss_bdf_type_to_str(bdf_type), resp->resp.result,
  858. resp->resp.error);
  859. ret = -resp->resp.result;
  860. goto err_send;
  861. }
  862. remaining -= req->data_len;
  863. temp += req->data_len;
  864. req->seg_id++;
  865. }
  866. release_firmware(fw_entry);
  867. if (resp->host_bdf_data_valid) {
  868. /* QCA6490 enable S3E regulator for IPA configuration only */
  869. if (!(resp->host_bdf_data & QMI_WLFW_HW_XPA_V01))
  870. cnss_enable_int_pow_amp_vreg(plat_priv);
  871. plat_priv->cbc_file_download =
  872. resp->host_bdf_data & QMI_WLFW_CBC_FILE_DOWNLOAD_V01;
  873. cnss_pr_info("Host BDF config: HW_XPA: %d CalDB: %d\n",
  874. resp->host_bdf_data & QMI_WLFW_HW_XPA_V01,
  875. plat_priv->cbc_file_download);
  876. }
  877. kfree(req);
  878. kfree(resp);
  879. return 0;
  880. err_send:
  881. release_firmware(fw_entry);
  882. err_req_fw:
  883. if (!(bdf_type == CNSS_BDF_REGDB ||
  884. test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state) ||
  885. ret == -EAGAIN))
  886. CNSS_QMI_ASSERT();
  887. kfree(req);
  888. kfree(resp);
  889. return ret;
  890. }
  891. int cnss_wlfw_m3_dnld_send_sync(struct cnss_plat_data *plat_priv)
  892. {
  893. struct wlfw_m3_info_req_msg_v01 *req;
  894. struct wlfw_m3_info_resp_msg_v01 *resp;
  895. struct qmi_txn txn;
  896. struct cnss_fw_mem *m3_mem = &plat_priv->m3_mem;
  897. int ret = 0;
  898. cnss_pr_dbg("Sending M3 information message, state: 0x%lx\n",
  899. plat_priv->driver_state);
  900. req = kzalloc(sizeof(*req), GFP_KERNEL);
  901. if (!req)
  902. return -ENOMEM;
  903. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  904. if (!resp) {
  905. kfree(req);
  906. return -ENOMEM;
  907. }
  908. if (!m3_mem->pa || !m3_mem->size) {
  909. cnss_pr_err("Memory for M3 is not available\n");
  910. ret = -ENOMEM;
  911. goto out;
  912. }
  913. cnss_pr_dbg("M3 memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  914. m3_mem->va, &m3_mem->pa, m3_mem->size);
  915. req->addr = plat_priv->m3_mem.pa;
  916. req->size = plat_priv->m3_mem.size;
  917. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  918. wlfw_m3_info_resp_msg_v01_ei, resp);
  919. if (ret < 0) {
  920. cnss_pr_err("Failed to initialize txn for M3 information request, err: %d\n",
  921. ret);
  922. goto out;
  923. }
  924. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  925. QMI_WLFW_M3_INFO_REQ_V01,
  926. WLFW_M3_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  927. wlfw_m3_info_req_msg_v01_ei, req);
  928. if (ret < 0) {
  929. qmi_txn_cancel(&txn);
  930. cnss_pr_err("Failed to send M3 information request, err: %d\n",
  931. ret);
  932. goto out;
  933. }
  934. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  935. if (ret < 0) {
  936. cnss_pr_err("Failed to wait for response of M3 information request, err: %d\n",
  937. ret);
  938. goto out;
  939. }
  940. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  941. cnss_pr_err("M3 information request failed, result: %d, err: %d\n",
  942. resp->resp.result, resp->resp.error);
  943. ret = -resp->resp.result;
  944. goto out;
  945. }
  946. kfree(req);
  947. kfree(resp);
  948. return 0;
  949. out:
  950. CNSS_QMI_ASSERT();
  951. kfree(req);
  952. kfree(resp);
  953. return ret;
  954. }
  955. int cnss_wlfw_aux_dnld_send_sync(struct cnss_plat_data *plat_priv)
  956. {
  957. struct wlfw_aux_uc_info_req_msg_v01 *req;
  958. struct wlfw_aux_uc_info_resp_msg_v01 *resp;
  959. struct qmi_txn txn;
  960. struct cnss_fw_mem *aux_mem = &plat_priv->aux_mem;
  961. int ret = 0;
  962. cnss_pr_dbg("Sending QMI_WLFW_AUX_UC_INFO_REQ_V01 message, state: 0x%lx\n",
  963. plat_priv->driver_state);
  964. req = kzalloc(sizeof(*req), GFP_KERNEL);
  965. if (!req)
  966. return -ENOMEM;
  967. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  968. if (!resp) {
  969. kfree(req);
  970. return -ENOMEM;
  971. }
  972. if (!aux_mem->pa || !aux_mem->size) {
  973. cnss_pr_err("Memory for AUX is not available\n");
  974. ret = -ENOMEM;
  975. goto out;
  976. }
  977. cnss_pr_dbg("AUX memory, va: 0x%pK, pa: %pa, size: 0x%zx\n",
  978. aux_mem->va, &aux_mem->pa, aux_mem->size);
  979. req->addr = plat_priv->aux_mem.pa;
  980. req->size = plat_priv->aux_mem.size;
  981. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  982. wlfw_aux_uc_info_resp_msg_v01_ei, resp);
  983. if (ret < 0) {
  984. cnss_pr_err("Failed to initialize txn for QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  985. ret);
  986. goto out;
  987. }
  988. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  989. QMI_WLFW_AUX_UC_INFO_REQ_V01,
  990. WLFW_AUX_UC_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  991. wlfw_aux_uc_info_req_msg_v01_ei, req);
  992. if (ret < 0) {
  993. qmi_txn_cancel(&txn);
  994. cnss_pr_err("Failed to send QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  995. ret);
  996. goto out;
  997. }
  998. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  999. if (ret < 0) {
  1000. cnss_pr_err("Failed to wait for response of QMI_WLFW_AUX_UC_INFO_REQ_V01 request, err: %d\n",
  1001. ret);
  1002. goto out;
  1003. }
  1004. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1005. cnss_pr_err("QMI_WLFW_AUX_UC_INFO_REQ_V01 request failed, result: %d, err: %d\n",
  1006. resp->resp.result, resp->resp.error);
  1007. ret = -resp->resp.result;
  1008. goto out;
  1009. }
  1010. kfree(req);
  1011. kfree(resp);
  1012. return 0;
  1013. out:
  1014. CNSS_QMI_ASSERT();
  1015. kfree(req);
  1016. kfree(resp);
  1017. return ret;
  1018. }
  1019. int cnss_wlfw_wlan_mac_req_send_sync(struct cnss_plat_data *plat_priv,
  1020. u8 *mac, u32 mac_len)
  1021. {
  1022. struct wlfw_mac_addr_req_msg_v01 req;
  1023. struct wlfw_mac_addr_resp_msg_v01 resp = {0};
  1024. struct qmi_txn txn;
  1025. int ret;
  1026. if (!plat_priv || !mac || mac_len != QMI_WLFW_MAC_ADDR_SIZE_V01)
  1027. return -EINVAL;
  1028. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1029. wlfw_mac_addr_resp_msg_v01_ei, &resp);
  1030. if (ret < 0) {
  1031. cnss_pr_err("Failed to initialize txn for mac req, err: %d\n",
  1032. ret);
  1033. ret = -EIO;
  1034. goto out;
  1035. }
  1036. cnss_pr_dbg("Sending WLAN mac req [%pM], state: 0x%lx\n",
  1037. mac, plat_priv->driver_state);
  1038. memcpy(req.mac_addr, mac, mac_len);
  1039. req.mac_addr_valid = 1;
  1040. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1041. QMI_WLFW_MAC_ADDR_REQ_V01,
  1042. WLFW_MAC_ADDR_REQ_MSG_V01_MAX_MSG_LEN,
  1043. wlfw_mac_addr_req_msg_v01_ei, &req);
  1044. if (ret < 0) {
  1045. qmi_txn_cancel(&txn);
  1046. cnss_pr_err("Failed to send mac req, err: %d\n", ret);
  1047. ret = -EIO;
  1048. goto out;
  1049. }
  1050. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1051. if (ret < 0) {
  1052. cnss_pr_err("Failed to wait for resp of mac req, err: %d\n",
  1053. ret);
  1054. ret = -EIO;
  1055. goto out;
  1056. }
  1057. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1058. cnss_pr_err("WLAN mac req failed, result: %d, err: %d\n",
  1059. resp.resp.result);
  1060. ret = -resp.resp.result;
  1061. }
  1062. out:
  1063. return ret;
  1064. }
  1065. int cnss_wlfw_qdss_data_send_sync(struct cnss_plat_data *plat_priv, char *file_name,
  1066. u32 total_size)
  1067. {
  1068. int ret = 0;
  1069. struct wlfw_qdss_trace_data_req_msg_v01 *req;
  1070. struct wlfw_qdss_trace_data_resp_msg_v01 *resp;
  1071. unsigned char *p_qdss_trace_data_temp, *p_qdss_trace_data = NULL;
  1072. unsigned int remaining;
  1073. struct qmi_txn txn;
  1074. cnss_pr_dbg("%s\n", __func__);
  1075. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1076. if (!req)
  1077. return -ENOMEM;
  1078. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1079. if (!resp) {
  1080. kfree(req);
  1081. return -ENOMEM;
  1082. }
  1083. p_qdss_trace_data = kzalloc(total_size, GFP_KERNEL);
  1084. if (!p_qdss_trace_data) {
  1085. ret = ENOMEM;
  1086. goto end;
  1087. }
  1088. remaining = total_size;
  1089. p_qdss_trace_data_temp = p_qdss_trace_data;
  1090. while (remaining && resp->end == 0) {
  1091. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1092. wlfw_qdss_trace_data_resp_msg_v01_ei, resp);
  1093. if (ret < 0) {
  1094. cnss_pr_err("Fail to init txn for QDSS trace resp %d\n",
  1095. ret);
  1096. goto fail;
  1097. }
  1098. ret = qmi_send_request
  1099. (&plat_priv->qmi_wlfw, NULL, &txn,
  1100. QMI_WLFW_QDSS_TRACE_DATA_REQ_V01,
  1101. WLFW_QDSS_TRACE_DATA_REQ_MSG_V01_MAX_MSG_LEN,
  1102. wlfw_qdss_trace_data_req_msg_v01_ei, req);
  1103. if (ret < 0) {
  1104. qmi_txn_cancel(&txn);
  1105. cnss_pr_err("Fail to send QDSS trace data req %d\n",
  1106. ret);
  1107. goto fail;
  1108. }
  1109. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1110. if (ret < 0) {
  1111. cnss_pr_err("QDSS trace resp wait failed with rc %d\n",
  1112. ret);
  1113. goto fail;
  1114. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1115. cnss_pr_err("QMI QDSS trace request rejected, result:%d error:%d\n",
  1116. resp->resp.result, resp->resp.error);
  1117. ret = -resp->resp.result;
  1118. goto fail;
  1119. } else {
  1120. ret = 0;
  1121. }
  1122. cnss_pr_dbg("%s: response total size %d data len %d",
  1123. __func__, resp->total_size, resp->data_len);
  1124. if ((resp->total_size_valid == 1 &&
  1125. resp->total_size == total_size) &&
  1126. (resp->seg_id_valid == 1 && resp->seg_id == req->seg_id) &&
  1127. (resp->data_valid == 1 &&
  1128. resp->data_len <= QMI_WLFW_MAX_DATA_SIZE_V01) &&
  1129. resp->data_len <= remaining) {
  1130. memcpy(p_qdss_trace_data_temp,
  1131. resp->data, resp->data_len);
  1132. } else {
  1133. cnss_pr_err("%s: Unmatched qdss trace data, Expect total_size %u, seg_id %u, Recv total_size_valid %u, total_size %u, seg_id_valid %u, seg_id %u, data_len_valid %u, data_len %u",
  1134. __func__,
  1135. total_size, req->seg_id,
  1136. resp->total_size_valid,
  1137. resp->total_size,
  1138. resp->seg_id_valid,
  1139. resp->seg_id,
  1140. resp->data_valid,
  1141. resp->data_len);
  1142. ret = -1;
  1143. goto fail;
  1144. }
  1145. remaining -= resp->data_len;
  1146. p_qdss_trace_data_temp += resp->data_len;
  1147. req->seg_id++;
  1148. }
  1149. if (remaining == 0 && (resp->end_valid && resp->end)) {
  1150. ret = cnss_genl_send_msg(p_qdss_trace_data,
  1151. CNSS_GENL_MSG_TYPE_QDSS, file_name,
  1152. total_size);
  1153. if (ret < 0) {
  1154. cnss_pr_err("Fail to save QDSS trace data: %d\n",
  1155. ret);
  1156. ret = -1;
  1157. goto fail;
  1158. }
  1159. } else {
  1160. cnss_pr_err("%s: QDSS trace file corrupted: remaining %u, end_valid %u, end %u",
  1161. __func__,
  1162. remaining, resp->end_valid, resp->end);
  1163. ret = -1;
  1164. goto fail;
  1165. }
  1166. fail:
  1167. kfree(p_qdss_trace_data);
  1168. end:
  1169. kfree(req);
  1170. kfree(resp);
  1171. return ret;
  1172. }
  1173. void cnss_get_qdss_cfg_filename(struct cnss_plat_data *plat_priv,
  1174. char *filename, u32 filename_len)
  1175. {
  1176. char filename_tmp[MAX_FIRMWARE_NAME_LEN];
  1177. char *debug_str = QDSS_DEBUG_FILE_STR;
  1178. if (plat_priv->device_id == KIWI_DEVICE_ID ||
  1179. plat_priv->device_id == MANGO_DEVICE_ID ||
  1180. plat_priv->device_id == PEACH_DEVICE_ID)
  1181. debug_str = "";
  1182. if (plat_priv->device_version.major_version == FW_V2_NUMBER)
  1183. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1184. "_%s%s.cfg", debug_str, HW_V2_NUMBER);
  1185. else
  1186. snprintf(filename_tmp, filename_len, QDSS_TRACE_CONFIG_FILE
  1187. "_%s%s.cfg", debug_str, HW_V1_NUMBER);
  1188. cnss_bus_add_fw_prefix_name(plat_priv, filename, filename_tmp);
  1189. }
  1190. int cnss_wlfw_qdss_dnld_send_sync(struct cnss_plat_data *plat_priv)
  1191. {
  1192. struct wlfw_qdss_trace_config_download_req_msg_v01 *req;
  1193. struct wlfw_qdss_trace_config_download_resp_msg_v01 *resp;
  1194. struct qmi_txn txn;
  1195. const struct firmware *fw_entry = NULL;
  1196. const u8 *temp;
  1197. char qdss_cfg_filename[MAX_FIRMWARE_NAME_LEN];
  1198. unsigned int remaining;
  1199. int ret = 0;
  1200. cnss_pr_dbg("Sending QDSS config download message, state: 0x%lx\n",
  1201. plat_priv->driver_state);
  1202. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1203. if (!req)
  1204. return -ENOMEM;
  1205. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1206. if (!resp) {
  1207. kfree(req);
  1208. return -ENOMEM;
  1209. }
  1210. cnss_get_qdss_cfg_filename(plat_priv, qdss_cfg_filename, sizeof(qdss_cfg_filename));
  1211. ret = cnss_request_firmware_direct(plat_priv, &fw_entry,
  1212. qdss_cfg_filename);
  1213. if (ret) {
  1214. cnss_pr_dbg("Unable to load %s\n",
  1215. qdss_cfg_filename);
  1216. goto err_req_fw;
  1217. }
  1218. temp = fw_entry->data;
  1219. remaining = fw_entry->size;
  1220. cnss_pr_dbg("Downloading QDSS: %s, size: %u\n",
  1221. qdss_cfg_filename, remaining);
  1222. while (remaining) {
  1223. req->total_size_valid = 1;
  1224. req->total_size = remaining;
  1225. req->seg_id_valid = 1;
  1226. req->data_valid = 1;
  1227. req->end_valid = 1;
  1228. if (remaining > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1229. req->data_len = QMI_WLFW_MAX_DATA_SIZE_V01;
  1230. } else {
  1231. req->data_len = remaining;
  1232. req->end = 1;
  1233. }
  1234. memcpy(req->data, temp, req->data_len);
  1235. ret = qmi_txn_init
  1236. (&plat_priv->qmi_wlfw, &txn,
  1237. wlfw_qdss_trace_config_download_resp_msg_v01_ei,
  1238. resp);
  1239. if (ret < 0) {
  1240. cnss_pr_err("Failed to initialize txn for QDSS download request, err: %d\n",
  1241. ret);
  1242. goto err_send;
  1243. }
  1244. ret = qmi_send_request
  1245. (&plat_priv->qmi_wlfw, NULL, &txn,
  1246. QMI_WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_V01,
  1247. WLFW_QDSS_TRACE_CONFIG_DOWNLOAD_REQ_MSG_V01_MAX_MSG_LEN,
  1248. wlfw_qdss_trace_config_download_req_msg_v01_ei, req);
  1249. if (ret < 0) {
  1250. qmi_txn_cancel(&txn);
  1251. cnss_pr_err("Failed to send respond QDSS download request, err: %d\n",
  1252. ret);
  1253. goto err_send;
  1254. }
  1255. ret = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1256. if (ret < 0) {
  1257. cnss_pr_err("Failed to wait for response of QDSS download request, err: %d\n",
  1258. ret);
  1259. goto err_send;
  1260. }
  1261. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1262. cnss_pr_err("QDSS download request failed, result: %d, err: %d\n",
  1263. resp->resp.result, resp->resp.error);
  1264. ret = -resp->resp.result;
  1265. goto err_send;
  1266. }
  1267. remaining -= req->data_len;
  1268. temp += req->data_len;
  1269. req->seg_id++;
  1270. }
  1271. release_firmware(fw_entry);
  1272. kfree(req);
  1273. kfree(resp);
  1274. return 0;
  1275. err_send:
  1276. release_firmware(fw_entry);
  1277. err_req_fw:
  1278. kfree(req);
  1279. kfree(resp);
  1280. return ret;
  1281. }
  1282. static int wlfw_send_qdss_trace_mode_req
  1283. (struct cnss_plat_data *plat_priv,
  1284. enum wlfw_qdss_trace_mode_enum_v01 mode,
  1285. unsigned long long option)
  1286. {
  1287. int rc = 0;
  1288. int tmp = 0;
  1289. struct wlfw_qdss_trace_mode_req_msg_v01 *req;
  1290. struct wlfw_qdss_trace_mode_resp_msg_v01 *resp;
  1291. struct qmi_txn txn;
  1292. if (!plat_priv)
  1293. return -ENODEV;
  1294. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1295. if (!req)
  1296. return -ENOMEM;
  1297. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1298. if (!resp) {
  1299. kfree(req);
  1300. return -ENOMEM;
  1301. }
  1302. req->mode_valid = 1;
  1303. req->mode = mode;
  1304. req->option_valid = 1;
  1305. req->option = option;
  1306. tmp = plat_priv->hw_trc_override;
  1307. req->hw_trc_disable_override_valid = 1;
  1308. req->hw_trc_disable_override =
  1309. (tmp > QMI_PARAM_DISABLE_V01 ? QMI_PARAM_DISABLE_V01 :
  1310. (tmp < 0 ? QMI_PARAM_INVALID_V01 : tmp));
  1311. cnss_pr_dbg("%s: mode %u, option %llu, hw_trc_disable_override: %u",
  1312. __func__, mode, option, req->hw_trc_disable_override);
  1313. rc = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1314. wlfw_qdss_trace_mode_resp_msg_v01_ei, resp);
  1315. if (rc < 0) {
  1316. cnss_pr_err("Fail to init txn for QDSS Mode resp %d\n",
  1317. rc);
  1318. goto out;
  1319. }
  1320. rc = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1321. QMI_WLFW_QDSS_TRACE_MODE_REQ_V01,
  1322. WLFW_QDSS_TRACE_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1323. wlfw_qdss_trace_mode_req_msg_v01_ei, req);
  1324. if (rc < 0) {
  1325. qmi_txn_cancel(&txn);
  1326. cnss_pr_err("Fail to send QDSS Mode req %d\n", rc);
  1327. goto out;
  1328. }
  1329. rc = qmi_txn_wait(&txn, plat_priv->ctrl_params.qmi_timeout);
  1330. if (rc < 0) {
  1331. cnss_pr_err("QDSS Mode resp wait failed with rc %d\n",
  1332. rc);
  1333. goto out;
  1334. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1335. cnss_pr_err("QMI QDSS Mode request rejected, result:%d error:%d\n",
  1336. resp->resp.result, resp->resp.error);
  1337. rc = -resp->resp.result;
  1338. goto out;
  1339. }
  1340. kfree(resp);
  1341. kfree(req);
  1342. return rc;
  1343. out:
  1344. kfree(resp);
  1345. kfree(req);
  1346. CNSS_QMI_ASSERT();
  1347. return rc;
  1348. }
  1349. int wlfw_qdss_trace_start(struct cnss_plat_data *plat_priv)
  1350. {
  1351. return wlfw_send_qdss_trace_mode_req(plat_priv,
  1352. QMI_WLFW_QDSS_TRACE_ON_V01, 0);
  1353. }
  1354. int wlfw_qdss_trace_stop(struct cnss_plat_data *plat_priv, unsigned long long option)
  1355. {
  1356. return wlfw_send_qdss_trace_mode_req(plat_priv, QMI_WLFW_QDSS_TRACE_OFF_V01,
  1357. option);
  1358. }
  1359. int cnss_wlfw_wlan_mode_send_sync(struct cnss_plat_data *plat_priv,
  1360. enum cnss_driver_mode mode)
  1361. {
  1362. struct wlfw_wlan_mode_req_msg_v01 *req;
  1363. struct wlfw_wlan_mode_resp_msg_v01 *resp;
  1364. struct qmi_txn txn;
  1365. int ret = 0;
  1366. if (!plat_priv)
  1367. return -ENODEV;
  1368. cnss_pr_dbg("Sending mode message, mode: %s(%d), state: 0x%lx\n",
  1369. cnss_qmi_mode_to_str(mode), mode, plat_priv->driver_state);
  1370. if (mode == CNSS_OFF &&
  1371. test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1372. cnss_pr_dbg("Recovery is in progress, ignore mode off request\n");
  1373. return 0;
  1374. }
  1375. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1376. if (!req)
  1377. return -ENOMEM;
  1378. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1379. if (!resp) {
  1380. kfree(req);
  1381. return -ENOMEM;
  1382. }
  1383. req->mode = (enum wlfw_driver_mode_enum_v01)mode;
  1384. req->hw_debug_valid = 1;
  1385. req->hw_debug = 0;
  1386. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1387. wlfw_wlan_mode_resp_msg_v01_ei, resp);
  1388. if (ret < 0) {
  1389. cnss_pr_err("Failed to initialize txn for mode request, mode: %s(%d), err: %d\n",
  1390. cnss_qmi_mode_to_str(mode), mode, ret);
  1391. goto out;
  1392. }
  1393. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1394. QMI_WLFW_WLAN_MODE_REQ_V01,
  1395. WLFW_WLAN_MODE_REQ_MSG_V01_MAX_MSG_LEN,
  1396. wlfw_wlan_mode_req_msg_v01_ei, req);
  1397. if (ret < 0) {
  1398. qmi_txn_cancel(&txn);
  1399. cnss_pr_err("Failed to send mode request, mode: %s(%d), err: %d\n",
  1400. cnss_qmi_mode_to_str(mode), mode, ret);
  1401. goto out;
  1402. }
  1403. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1404. if (ret < 0) {
  1405. cnss_pr_err("Failed to wait for response of mode request, mode: %s(%d), err: %d\n",
  1406. cnss_qmi_mode_to_str(mode), mode, ret);
  1407. goto out;
  1408. }
  1409. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1410. cnss_pr_err("Mode request failed, mode: %s(%d), result: %d, err: %d\n",
  1411. cnss_qmi_mode_to_str(mode), mode, resp->resp.result,
  1412. resp->resp.error);
  1413. ret = -resp->resp.result;
  1414. goto out;
  1415. }
  1416. kfree(req);
  1417. kfree(resp);
  1418. return 0;
  1419. out:
  1420. if (mode == CNSS_OFF) {
  1421. cnss_pr_dbg("WLFW service is disconnected while sending mode off request\n");
  1422. ret = 0;
  1423. } else {
  1424. CNSS_QMI_ASSERT();
  1425. }
  1426. kfree(req);
  1427. kfree(resp);
  1428. return ret;
  1429. }
  1430. int cnss_wlfw_wlan_cfg_send_sync(struct cnss_plat_data *plat_priv,
  1431. struct cnss_wlan_enable_cfg *config,
  1432. const char *host_version)
  1433. {
  1434. struct wlfw_wlan_cfg_req_msg_v01 *req;
  1435. struct wlfw_wlan_cfg_resp_msg_v01 *resp;
  1436. struct qmi_txn txn;
  1437. u32 i, ce_id, num_vectors, user_base_data, base_vector;
  1438. int ret = 0;
  1439. if (!plat_priv)
  1440. return -ENODEV;
  1441. cnss_pr_dbg("Sending WLAN config message, state: 0x%lx\n",
  1442. plat_priv->driver_state);
  1443. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1444. if (!req)
  1445. return -ENOMEM;
  1446. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1447. if (!resp) {
  1448. kfree(req);
  1449. return -ENOMEM;
  1450. }
  1451. req->host_version_valid = 1;
  1452. strlcpy(req->host_version, host_version,
  1453. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  1454. req->tgt_cfg_valid = 1;
  1455. if (config->num_ce_tgt_cfg > QMI_WLFW_MAX_NUM_CE_V01)
  1456. req->tgt_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1457. else
  1458. req->tgt_cfg_len = config->num_ce_tgt_cfg;
  1459. for (i = 0; i < req->tgt_cfg_len; i++) {
  1460. req->tgt_cfg[i].pipe_num = config->ce_tgt_cfg[i].pipe_num;
  1461. req->tgt_cfg[i].pipe_dir = config->ce_tgt_cfg[i].pipe_dir;
  1462. req->tgt_cfg[i].nentries = config->ce_tgt_cfg[i].nentries;
  1463. req->tgt_cfg[i].nbytes_max = config->ce_tgt_cfg[i].nbytes_max;
  1464. req->tgt_cfg[i].flags = config->ce_tgt_cfg[i].flags;
  1465. }
  1466. req->svc_cfg_valid = 1;
  1467. if (config->num_ce_svc_pipe_cfg > QMI_WLFW_MAX_NUM_SVC_V01)
  1468. req->svc_cfg_len = QMI_WLFW_MAX_NUM_SVC_V01;
  1469. else
  1470. req->svc_cfg_len = config->num_ce_svc_pipe_cfg;
  1471. for (i = 0; i < req->svc_cfg_len; i++) {
  1472. req->svc_cfg[i].service_id = config->ce_svc_cfg[i].service_id;
  1473. req->svc_cfg[i].pipe_dir = config->ce_svc_cfg[i].pipe_dir;
  1474. req->svc_cfg[i].pipe_num = config->ce_svc_cfg[i].pipe_num;
  1475. }
  1476. if (plat_priv->device_id != KIWI_DEVICE_ID &&
  1477. plat_priv->device_id != MANGO_DEVICE_ID &&
  1478. plat_priv->device_id != PEACH_DEVICE_ID) {
  1479. if (plat_priv->device_id == QCN7605_DEVICE_ID &&
  1480. config->num_shadow_reg_cfg) {
  1481. req->shadow_reg_valid = 1;
  1482. if (config->num_shadow_reg_cfg >
  1483. QMI_WLFW_MAX_NUM_SHADOW_REG_V01)
  1484. req->shadow_reg_len =
  1485. QMI_WLFW_MAX_NUM_SHADOW_REG_V01;
  1486. else
  1487. req->shadow_reg_len =
  1488. config->num_shadow_reg_cfg;
  1489. memcpy(req->shadow_reg, config->shadow_reg_cfg,
  1490. sizeof(struct wlfw_shadow_reg_cfg_s_v01) *
  1491. req->shadow_reg_len);
  1492. } else {
  1493. req->shadow_reg_v2_valid = 1;
  1494. if (config->num_shadow_reg_v2_cfg >
  1495. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01)
  1496. req->shadow_reg_v2_len =
  1497. QMI_WLFW_MAX_NUM_SHADOW_REG_V2_V01;
  1498. else
  1499. req->shadow_reg_v2_len =
  1500. config->num_shadow_reg_v2_cfg;
  1501. memcpy(req->shadow_reg_v2, config->shadow_reg_v2_cfg,
  1502. sizeof(struct wlfw_shadow_reg_v2_cfg_s_v01) *
  1503. req->shadow_reg_v2_len);
  1504. }
  1505. } else {
  1506. req->shadow_reg_v3_valid = 1;
  1507. if (config->num_shadow_reg_v3_cfg >
  1508. MAX_NUM_SHADOW_REG_V3)
  1509. req->shadow_reg_v3_len = MAX_NUM_SHADOW_REG_V3;
  1510. else
  1511. req->shadow_reg_v3_len = config->num_shadow_reg_v3_cfg;
  1512. plat_priv->num_shadow_regs_v3 = req->shadow_reg_v3_len;
  1513. cnss_pr_dbg("Shadow reg v3 len: %d\n",
  1514. plat_priv->num_shadow_regs_v3);
  1515. memcpy(req->shadow_reg_v3, config->shadow_reg_v3_cfg,
  1516. sizeof(struct wlfw_shadow_reg_v3_cfg_s_v01) *
  1517. req->shadow_reg_v3_len);
  1518. }
  1519. if (config->rri_over_ddr_cfg_valid) {
  1520. req->rri_over_ddr_cfg_valid = 1;
  1521. req->rri_over_ddr_cfg.base_addr_low =
  1522. config->rri_over_ddr_cfg.base_addr_low;
  1523. req->rri_over_ddr_cfg.base_addr_high =
  1524. config->rri_over_ddr_cfg.base_addr_high;
  1525. }
  1526. if (config->send_msi_ce) {
  1527. ret = cnss_bus_get_msi_assignment(plat_priv,
  1528. CE_MSI_NAME,
  1529. &num_vectors,
  1530. &user_base_data,
  1531. &base_vector);
  1532. if (!ret) {
  1533. req->msi_cfg_valid = 1;
  1534. req->msi_cfg_len = QMI_WLFW_MAX_NUM_CE_V01;
  1535. for (ce_id = 0; ce_id < QMI_WLFW_MAX_NUM_CE_V01;
  1536. ce_id++) {
  1537. req->msi_cfg[ce_id].ce_id = ce_id;
  1538. req->msi_cfg[ce_id].msi_vector =
  1539. (ce_id % num_vectors) + base_vector;
  1540. }
  1541. }
  1542. }
  1543. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1544. wlfw_wlan_cfg_resp_msg_v01_ei, resp);
  1545. if (ret < 0) {
  1546. cnss_pr_err("Failed to initialize txn for WLAN config request, err: %d\n",
  1547. ret);
  1548. goto out;
  1549. }
  1550. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1551. QMI_WLFW_WLAN_CFG_REQ_V01,
  1552. WLFW_WLAN_CFG_REQ_MSG_V01_MAX_MSG_LEN,
  1553. wlfw_wlan_cfg_req_msg_v01_ei, req);
  1554. if (ret < 0) {
  1555. qmi_txn_cancel(&txn);
  1556. cnss_pr_err("Failed to send WLAN config request, err: %d\n",
  1557. ret);
  1558. goto out;
  1559. }
  1560. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1561. if (ret < 0) {
  1562. cnss_pr_err("Failed to wait for response of WLAN config request, err: %d\n",
  1563. ret);
  1564. goto out;
  1565. }
  1566. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1567. cnss_pr_err("WLAN config request failed, result: %d, err: %d\n",
  1568. resp->resp.result, resp->resp.error);
  1569. ret = -resp->resp.result;
  1570. goto out;
  1571. }
  1572. kfree(req);
  1573. kfree(resp);
  1574. return 0;
  1575. out:
  1576. CNSS_QMI_ASSERT();
  1577. kfree(req);
  1578. kfree(resp);
  1579. return ret;
  1580. }
  1581. int cnss_wlfw_athdiag_read_send_sync(struct cnss_plat_data *plat_priv,
  1582. u32 offset, u32 mem_type,
  1583. u32 data_len, u8 *data)
  1584. {
  1585. struct wlfw_athdiag_read_req_msg_v01 *req;
  1586. struct wlfw_athdiag_read_resp_msg_v01 *resp;
  1587. struct qmi_txn txn;
  1588. int ret = 0;
  1589. if (!plat_priv)
  1590. return -ENODEV;
  1591. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1592. cnss_pr_err("Invalid parameters for athdiag read: data %pK, data_len %u\n",
  1593. data, data_len);
  1594. return -EINVAL;
  1595. }
  1596. cnss_pr_dbg("athdiag read: state 0x%lx, offset %x, mem_type %x, data_len %u\n",
  1597. plat_priv->driver_state, offset, mem_type, data_len);
  1598. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1599. if (!req)
  1600. return -ENOMEM;
  1601. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1602. if (!resp) {
  1603. kfree(req);
  1604. return -ENOMEM;
  1605. }
  1606. req->offset = offset;
  1607. req->mem_type = mem_type;
  1608. req->data_len = data_len;
  1609. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1610. wlfw_athdiag_read_resp_msg_v01_ei, resp);
  1611. if (ret < 0) {
  1612. cnss_pr_err("Failed to initialize txn for athdiag read request, err: %d\n",
  1613. ret);
  1614. goto out;
  1615. }
  1616. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1617. QMI_WLFW_ATHDIAG_READ_REQ_V01,
  1618. WLFW_ATHDIAG_READ_REQ_MSG_V01_MAX_MSG_LEN,
  1619. wlfw_athdiag_read_req_msg_v01_ei, req);
  1620. if (ret < 0) {
  1621. qmi_txn_cancel(&txn);
  1622. cnss_pr_err("Failed to send athdiag read request, err: %d\n",
  1623. ret);
  1624. goto out;
  1625. }
  1626. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1627. if (ret < 0) {
  1628. cnss_pr_err("Failed to wait for response of athdiag read request, err: %d\n",
  1629. ret);
  1630. goto out;
  1631. }
  1632. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1633. cnss_pr_err("Athdiag read request failed, result: %d, err: %d\n",
  1634. resp->resp.result, resp->resp.error);
  1635. ret = -resp->resp.result;
  1636. goto out;
  1637. }
  1638. if (!resp->data_valid || resp->data_len != data_len) {
  1639. cnss_pr_err("athdiag read data is invalid, data_valid = %u, data_len = %u\n",
  1640. resp->data_valid, resp->data_len);
  1641. ret = -EINVAL;
  1642. goto out;
  1643. }
  1644. memcpy(data, resp->data, resp->data_len);
  1645. kfree(req);
  1646. kfree(resp);
  1647. return 0;
  1648. out:
  1649. kfree(req);
  1650. kfree(resp);
  1651. return ret;
  1652. }
  1653. int cnss_wlfw_athdiag_write_send_sync(struct cnss_plat_data *plat_priv,
  1654. u32 offset, u32 mem_type,
  1655. u32 data_len, u8 *data)
  1656. {
  1657. struct wlfw_athdiag_write_req_msg_v01 *req;
  1658. struct wlfw_athdiag_write_resp_msg_v01 *resp;
  1659. struct qmi_txn txn;
  1660. int ret = 0;
  1661. if (!plat_priv)
  1662. return -ENODEV;
  1663. if (!data || data_len == 0 || data_len > QMI_WLFW_MAX_DATA_SIZE_V01) {
  1664. cnss_pr_err("Invalid parameters for athdiag write: data %pK, data_len %u\n",
  1665. data, data_len);
  1666. return -EINVAL;
  1667. }
  1668. cnss_pr_dbg("athdiag write: state 0x%lx, offset %x, mem_type %x, data_len %u, data %pK\n",
  1669. plat_priv->driver_state, offset, mem_type, data_len, data);
  1670. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1671. if (!req)
  1672. return -ENOMEM;
  1673. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1674. if (!resp) {
  1675. kfree(req);
  1676. return -ENOMEM;
  1677. }
  1678. req->offset = offset;
  1679. req->mem_type = mem_type;
  1680. req->data_len = data_len;
  1681. memcpy(req->data, data, data_len);
  1682. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1683. wlfw_athdiag_write_resp_msg_v01_ei, resp);
  1684. if (ret < 0) {
  1685. cnss_pr_err("Failed to initialize txn for athdiag write request, err: %d\n",
  1686. ret);
  1687. goto out;
  1688. }
  1689. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1690. QMI_WLFW_ATHDIAG_WRITE_REQ_V01,
  1691. WLFW_ATHDIAG_WRITE_REQ_MSG_V01_MAX_MSG_LEN,
  1692. wlfw_athdiag_write_req_msg_v01_ei, req);
  1693. if (ret < 0) {
  1694. qmi_txn_cancel(&txn);
  1695. cnss_pr_err("Failed to send athdiag write request, err: %d\n",
  1696. ret);
  1697. goto out;
  1698. }
  1699. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1700. if (ret < 0) {
  1701. cnss_pr_err("Failed to wait for response of athdiag write request, err: %d\n",
  1702. ret);
  1703. goto out;
  1704. }
  1705. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1706. cnss_pr_err("Athdiag write request failed, result: %d, err: %d\n",
  1707. resp->resp.result, resp->resp.error);
  1708. ret = -resp->resp.result;
  1709. goto out;
  1710. }
  1711. kfree(req);
  1712. kfree(resp);
  1713. return 0;
  1714. out:
  1715. kfree(req);
  1716. kfree(resp);
  1717. return ret;
  1718. }
  1719. int cnss_wlfw_ini_send_sync(struct cnss_plat_data *plat_priv,
  1720. u8 fw_log_mode)
  1721. {
  1722. struct wlfw_ini_req_msg_v01 *req;
  1723. struct wlfw_ini_resp_msg_v01 *resp;
  1724. struct qmi_txn txn;
  1725. int ret = 0;
  1726. if (!plat_priv)
  1727. return -ENODEV;
  1728. cnss_pr_dbg("Sending ini sync request, state: 0x%lx, fw_log_mode: %d\n",
  1729. plat_priv->driver_state, fw_log_mode);
  1730. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1731. if (!req)
  1732. return -ENOMEM;
  1733. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1734. if (!resp) {
  1735. kfree(req);
  1736. return -ENOMEM;
  1737. }
  1738. req->enablefwlog_valid = 1;
  1739. req->enablefwlog = fw_log_mode;
  1740. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1741. wlfw_ini_resp_msg_v01_ei, resp);
  1742. if (ret < 0) {
  1743. cnss_pr_err("Failed to initialize txn for ini request, fw_log_mode: %d, err: %d\n",
  1744. fw_log_mode, ret);
  1745. goto out;
  1746. }
  1747. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1748. QMI_WLFW_INI_REQ_V01,
  1749. WLFW_INI_REQ_MSG_V01_MAX_MSG_LEN,
  1750. wlfw_ini_req_msg_v01_ei, req);
  1751. if (ret < 0) {
  1752. qmi_txn_cancel(&txn);
  1753. cnss_pr_err("Failed to send ini request, fw_log_mode: %d, err: %d\n",
  1754. fw_log_mode, ret);
  1755. goto out;
  1756. }
  1757. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1758. if (ret < 0) {
  1759. cnss_pr_err("Failed to wait for response of ini request, fw_log_mode: %d, err: %d\n",
  1760. fw_log_mode, ret);
  1761. goto out;
  1762. }
  1763. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1764. cnss_pr_err("Ini request failed, fw_log_mode: %d, result: %d, err: %d\n",
  1765. fw_log_mode, resp->resp.result, resp->resp.error);
  1766. ret = -resp->resp.result;
  1767. goto out;
  1768. }
  1769. kfree(req);
  1770. kfree(resp);
  1771. return 0;
  1772. out:
  1773. kfree(req);
  1774. kfree(resp);
  1775. return ret;
  1776. }
  1777. int cnss_wlfw_send_pcie_gen_speed_sync(struct cnss_plat_data *plat_priv)
  1778. {
  1779. struct wlfw_pcie_gen_switch_req_msg_v01 req;
  1780. struct wlfw_pcie_gen_switch_resp_msg_v01 resp = {0};
  1781. struct qmi_txn txn;
  1782. int ret = 0;
  1783. if (!plat_priv)
  1784. return -ENODEV;
  1785. if (plat_priv->pcie_gen_speed == QMI_PCIE_GEN_SPEED_INVALID_V01 ||
  1786. !plat_priv->fw_pcie_gen_switch) {
  1787. cnss_pr_dbg("PCIE Gen speed not setup\n");
  1788. return 0;
  1789. }
  1790. cnss_pr_dbg("Sending PCIE Gen speed: %d state: 0x%lx\n",
  1791. plat_priv->pcie_gen_speed, plat_priv->driver_state);
  1792. req.pcie_speed = (enum wlfw_pcie_gen_speed_v01)
  1793. plat_priv->pcie_gen_speed;
  1794. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1795. wlfw_pcie_gen_switch_resp_msg_v01_ei, &resp);
  1796. if (ret < 0) {
  1797. cnss_pr_err("Failed to initialize txn for PCIE speed switch err: %d\n",
  1798. ret);
  1799. goto out;
  1800. }
  1801. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1802. QMI_WLFW_PCIE_GEN_SWITCH_REQ_V01,
  1803. WLFW_PCIE_GEN_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1804. wlfw_pcie_gen_switch_req_msg_v01_ei, &req);
  1805. if (ret < 0) {
  1806. qmi_txn_cancel(&txn);
  1807. cnss_pr_err("Failed to send PCIE speed switch, err: %d\n", ret);
  1808. goto out;
  1809. }
  1810. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1811. if (ret < 0) {
  1812. cnss_pr_err("Failed to wait for PCIE Gen switch resp, err: %d\n",
  1813. ret);
  1814. goto out;
  1815. }
  1816. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  1817. cnss_pr_err("PCIE Gen Switch req failed, Speed: %d, result: %d, err: %d\n",
  1818. plat_priv->pcie_gen_speed, resp.resp.result,
  1819. resp.resp.error);
  1820. ret = -resp.resp.result;
  1821. }
  1822. out:
  1823. /* Reset PCIE Gen speed after one time use */
  1824. plat_priv->pcie_gen_speed = QMI_PCIE_GEN_SPEED_INVALID_V01;
  1825. return ret;
  1826. }
  1827. int cnss_wlfw_antenna_switch_send_sync(struct cnss_plat_data *plat_priv)
  1828. {
  1829. struct wlfw_antenna_switch_req_msg_v01 *req;
  1830. struct wlfw_antenna_switch_resp_msg_v01 *resp;
  1831. struct qmi_txn txn;
  1832. int ret = 0;
  1833. if (!plat_priv)
  1834. return -ENODEV;
  1835. cnss_pr_dbg("Sending antenna switch sync request, state: 0x%lx\n",
  1836. plat_priv->driver_state);
  1837. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1838. if (!req)
  1839. return -ENOMEM;
  1840. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1841. if (!resp) {
  1842. kfree(req);
  1843. return -ENOMEM;
  1844. }
  1845. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1846. wlfw_antenna_switch_resp_msg_v01_ei, resp);
  1847. if (ret < 0) {
  1848. cnss_pr_err("Failed to initialize txn for antenna switch request, err: %d\n",
  1849. ret);
  1850. goto out;
  1851. }
  1852. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1853. QMI_WLFW_ANTENNA_SWITCH_REQ_V01,
  1854. WLFW_ANTENNA_SWITCH_REQ_MSG_V01_MAX_MSG_LEN,
  1855. wlfw_antenna_switch_req_msg_v01_ei, req);
  1856. if (ret < 0) {
  1857. qmi_txn_cancel(&txn);
  1858. cnss_pr_err("Failed to send antenna switch request, err: %d\n",
  1859. ret);
  1860. goto out;
  1861. }
  1862. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1863. if (ret < 0) {
  1864. cnss_pr_err("Failed to wait for response of antenna switch request, err: %d\n",
  1865. ret);
  1866. goto out;
  1867. }
  1868. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1869. cnss_pr_dbg("Antenna switch request failed, result: %d, err: %d\n",
  1870. resp->resp.result, resp->resp.error);
  1871. ret = -resp->resp.result;
  1872. goto out;
  1873. }
  1874. if (resp->antenna_valid)
  1875. plat_priv->antenna = resp->antenna;
  1876. cnss_pr_dbg("Antenna valid: %u, antenna 0x%llx\n",
  1877. resp->antenna_valid, resp->antenna);
  1878. kfree(req);
  1879. kfree(resp);
  1880. return 0;
  1881. out:
  1882. kfree(req);
  1883. kfree(resp);
  1884. return ret;
  1885. }
  1886. int cnss_wlfw_antenna_grant_send_sync(struct cnss_plat_data *plat_priv)
  1887. {
  1888. struct wlfw_antenna_grant_req_msg_v01 *req;
  1889. struct wlfw_antenna_grant_resp_msg_v01 *resp;
  1890. struct qmi_txn txn;
  1891. int ret = 0;
  1892. if (!plat_priv)
  1893. return -ENODEV;
  1894. cnss_pr_dbg("Sending antenna grant sync request, state: 0x%lx, grant 0x%llx\n",
  1895. plat_priv->driver_state, plat_priv->grant);
  1896. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1897. if (!req)
  1898. return -ENOMEM;
  1899. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1900. if (!resp) {
  1901. kfree(req);
  1902. return -ENOMEM;
  1903. }
  1904. req->grant_valid = 1;
  1905. req->grant = plat_priv->grant;
  1906. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1907. wlfw_antenna_grant_resp_msg_v01_ei, resp);
  1908. if (ret < 0) {
  1909. cnss_pr_err("Failed to initialize txn for antenna grant request, err: %d\n",
  1910. ret);
  1911. goto out;
  1912. }
  1913. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1914. QMI_WLFW_ANTENNA_GRANT_REQ_V01,
  1915. WLFW_ANTENNA_GRANT_REQ_MSG_V01_MAX_MSG_LEN,
  1916. wlfw_antenna_grant_req_msg_v01_ei, req);
  1917. if (ret < 0) {
  1918. qmi_txn_cancel(&txn);
  1919. cnss_pr_err("Failed to send antenna grant request, err: %d\n",
  1920. ret);
  1921. goto out;
  1922. }
  1923. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1924. if (ret < 0) {
  1925. cnss_pr_err("Failed to wait for response of antenna grant request, err: %d\n",
  1926. ret);
  1927. goto out;
  1928. }
  1929. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1930. cnss_pr_err("Antenna grant request failed, result: %d, err: %d\n",
  1931. resp->resp.result, resp->resp.error);
  1932. ret = -resp->resp.result;
  1933. goto out;
  1934. }
  1935. kfree(req);
  1936. kfree(resp);
  1937. return 0;
  1938. out:
  1939. kfree(req);
  1940. kfree(resp);
  1941. return ret;
  1942. }
  1943. int cnss_wlfw_qdss_trace_mem_info_send_sync(struct cnss_plat_data *plat_priv)
  1944. {
  1945. struct wlfw_qdss_trace_mem_info_req_msg_v01 *req;
  1946. struct wlfw_qdss_trace_mem_info_resp_msg_v01 *resp;
  1947. struct qmi_txn txn;
  1948. struct cnss_fw_mem *qdss_mem = plat_priv->qdss_mem;
  1949. int ret = 0;
  1950. int i;
  1951. cnss_pr_dbg("Sending QDSS trace mem info, state: 0x%lx\n",
  1952. plat_priv->driver_state);
  1953. req = kzalloc(sizeof(*req), GFP_KERNEL);
  1954. if (!req)
  1955. return -ENOMEM;
  1956. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  1957. if (!resp) {
  1958. kfree(req);
  1959. return -ENOMEM;
  1960. }
  1961. if (plat_priv->qdss_mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  1962. cnss_pr_err("Invalid seg len %u\n", plat_priv->qdss_mem_seg_len);
  1963. ret = -EINVAL;
  1964. goto out;
  1965. }
  1966. req->mem_seg_len = plat_priv->qdss_mem_seg_len;
  1967. for (i = 0; i < req->mem_seg_len; i++) {
  1968. cnss_pr_dbg("Memory for FW, va: 0x%pK, pa: %pa, size: 0x%zx, type: %u\n",
  1969. qdss_mem[i].va, &qdss_mem[i].pa,
  1970. qdss_mem[i].size, qdss_mem[i].type);
  1971. req->mem_seg[i].addr = qdss_mem[i].pa;
  1972. req->mem_seg[i].size = qdss_mem[i].size;
  1973. req->mem_seg[i].type = qdss_mem[i].type;
  1974. }
  1975. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  1976. wlfw_qdss_trace_mem_info_resp_msg_v01_ei, resp);
  1977. if (ret < 0) {
  1978. cnss_pr_err("Fail to initialize txn for QDSS trace mem request: err %d\n",
  1979. ret);
  1980. goto out;
  1981. }
  1982. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  1983. QMI_WLFW_QDSS_TRACE_MEM_INFO_REQ_V01,
  1984. WLFW_QDSS_TRACE_MEM_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  1985. wlfw_qdss_trace_mem_info_req_msg_v01_ei, req);
  1986. if (ret < 0) {
  1987. qmi_txn_cancel(&txn);
  1988. cnss_pr_err("Fail to send QDSS trace mem info request: err %d\n",
  1989. ret);
  1990. goto out;
  1991. }
  1992. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  1993. if (ret < 0) {
  1994. cnss_pr_err("Fail to wait for response of QDSS trace mem info request, err %d\n",
  1995. ret);
  1996. goto out;
  1997. }
  1998. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  1999. cnss_pr_err("QDSS trace mem info request failed, result: %d, err: %d\n",
  2000. resp->resp.result, resp->resp.error);
  2001. ret = -resp->resp.result;
  2002. goto out;
  2003. }
  2004. kfree(req);
  2005. kfree(resp);
  2006. return 0;
  2007. out:
  2008. kfree(req);
  2009. kfree(resp);
  2010. return ret;
  2011. }
  2012. int cnss_wlfw_send_host_wfc_call_status(struct cnss_plat_data *plat_priv,
  2013. struct cnss_wfc_cfg cfg)
  2014. {
  2015. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2016. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2017. struct qmi_txn txn;
  2018. int ret = 0;
  2019. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2020. cnss_pr_err("Drop host WFC indication as FW not initialized\n");
  2021. return -EINVAL;
  2022. }
  2023. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2024. if (!req)
  2025. return -ENOMEM;
  2026. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2027. if (!resp) {
  2028. kfree(req);
  2029. return -ENOMEM;
  2030. }
  2031. req->wfc_call_active_valid = 1;
  2032. req->wfc_call_active = cfg.mode;
  2033. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2034. plat_priv->driver_state);
  2035. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2036. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2037. if (ret < 0) {
  2038. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2039. ret);
  2040. goto out;
  2041. }
  2042. cnss_pr_dbg("Send WFC Mode: %d\n", cfg.mode);
  2043. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2044. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2045. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2046. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2047. if (ret < 0) {
  2048. qmi_txn_cancel(&txn);
  2049. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2050. ret);
  2051. goto out;
  2052. }
  2053. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2054. if (ret < 0) {
  2055. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2056. ret);
  2057. goto out;
  2058. }
  2059. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2060. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2061. resp->resp.result, resp->resp.error);
  2062. ret = -EINVAL;
  2063. goto out;
  2064. }
  2065. ret = 0;
  2066. out:
  2067. kfree(req);
  2068. kfree(resp);
  2069. return ret;
  2070. }
  2071. static int cnss_wlfw_wfc_call_status_send_sync
  2072. (struct cnss_plat_data *plat_priv,
  2073. const struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg)
  2074. {
  2075. struct wlfw_wfc_call_status_req_msg_v01 *req;
  2076. struct wlfw_wfc_call_status_resp_msg_v01 *resp;
  2077. struct qmi_txn txn;
  2078. int ret = 0;
  2079. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2080. cnss_pr_err("Drop IMS WFC indication as FW not initialized\n");
  2081. return -EINVAL;
  2082. }
  2083. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2084. if (!req)
  2085. return -ENOMEM;
  2086. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2087. if (!resp) {
  2088. kfree(req);
  2089. return -ENOMEM;
  2090. }
  2091. /**
  2092. * WFC Call r1 design has CNSS as pass thru using opaque hex buffer.
  2093. * But in r2 update QMI structure is expanded and as an effect qmi
  2094. * decoded structures have padding. Thus we cannot use buffer design.
  2095. * For backward compatibility for r1 design copy only wfc_call_active
  2096. * value in hex buffer.
  2097. */
  2098. req->wfc_call_status_len = sizeof(ind_msg->wfc_call_active);
  2099. req->wfc_call_status[0] = ind_msg->wfc_call_active;
  2100. /* wfc_call_active is mandatory in IMS indication */
  2101. req->wfc_call_active_valid = 1;
  2102. req->wfc_call_active = ind_msg->wfc_call_active;
  2103. req->all_wfc_calls_held_valid = ind_msg->all_wfc_calls_held_valid;
  2104. req->all_wfc_calls_held = ind_msg->all_wfc_calls_held;
  2105. req->is_wfc_emergency_valid = ind_msg->is_wfc_emergency_valid;
  2106. req->is_wfc_emergency = ind_msg->is_wfc_emergency;
  2107. req->twt_ims_start_valid = ind_msg->twt_ims_start_valid;
  2108. req->twt_ims_start = ind_msg->twt_ims_start;
  2109. req->twt_ims_int_valid = ind_msg->twt_ims_int_valid;
  2110. req->twt_ims_int = ind_msg->twt_ims_int;
  2111. req->media_quality_valid = ind_msg->media_quality_valid;
  2112. req->media_quality =
  2113. (enum wlfw_wfc_media_quality_v01)ind_msg->media_quality;
  2114. cnss_pr_dbg("CNSS->FW: WFC_CALL_REQ: state: 0x%lx\n",
  2115. plat_priv->driver_state);
  2116. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2117. wlfw_wfc_call_status_resp_msg_v01_ei, resp);
  2118. if (ret < 0) {
  2119. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Txn Init: Err %d\n",
  2120. ret);
  2121. goto out;
  2122. }
  2123. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2124. QMI_WLFW_WFC_CALL_STATUS_REQ_V01,
  2125. WLFW_WFC_CALL_STATUS_REQ_MSG_V01_MAX_MSG_LEN,
  2126. wlfw_wfc_call_status_req_msg_v01_ei, req);
  2127. if (ret < 0) {
  2128. qmi_txn_cancel(&txn);
  2129. cnss_pr_err("CNSS->FW: WFC_CALL_REQ: QMI Send Err: %d\n",
  2130. ret);
  2131. goto out;
  2132. }
  2133. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2134. if (ret < 0) {
  2135. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: QMI Wait Err: %d\n",
  2136. ret);
  2137. goto out;
  2138. }
  2139. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2140. cnss_pr_err("FW->CNSS: WFC_CALL_RSP: Result: %d Err: %d\n",
  2141. resp->resp.result, resp->resp.error);
  2142. ret = -resp->resp.result;
  2143. goto out;
  2144. }
  2145. ret = 0;
  2146. out:
  2147. kfree(req);
  2148. kfree(resp);
  2149. return ret;
  2150. }
  2151. int cnss_wlfw_dynamic_feature_mask_send_sync(struct cnss_plat_data *plat_priv)
  2152. {
  2153. struct wlfw_dynamic_feature_mask_req_msg_v01 *req;
  2154. struct wlfw_dynamic_feature_mask_resp_msg_v01 *resp;
  2155. struct qmi_txn txn;
  2156. int ret = 0;
  2157. cnss_pr_dbg("Sending dynamic feature mask 0x%llx, state: 0x%lx\n",
  2158. plat_priv->dynamic_feature,
  2159. plat_priv->driver_state);
  2160. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2161. if (!req)
  2162. return -ENOMEM;
  2163. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2164. if (!resp) {
  2165. kfree(req);
  2166. return -ENOMEM;
  2167. }
  2168. req->mask_valid = 1;
  2169. req->mask = plat_priv->dynamic_feature;
  2170. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2171. wlfw_dynamic_feature_mask_resp_msg_v01_ei, resp);
  2172. if (ret < 0) {
  2173. cnss_pr_err("Fail to initialize txn for dynamic feature mask request: err %d\n",
  2174. ret);
  2175. goto out;
  2176. }
  2177. ret = qmi_send_request
  2178. (&plat_priv->qmi_wlfw, NULL, &txn,
  2179. QMI_WLFW_DYNAMIC_FEATURE_MASK_REQ_V01,
  2180. WLFW_DYNAMIC_FEATURE_MASK_REQ_MSG_V01_MAX_MSG_LEN,
  2181. wlfw_dynamic_feature_mask_req_msg_v01_ei, req);
  2182. if (ret < 0) {
  2183. qmi_txn_cancel(&txn);
  2184. cnss_pr_err("Fail to send dynamic feature mask request: err %d\n",
  2185. ret);
  2186. goto out;
  2187. }
  2188. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2189. if (ret < 0) {
  2190. cnss_pr_err("Fail to wait for response of dynamic feature mask request, err %d\n",
  2191. ret);
  2192. goto out;
  2193. }
  2194. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2195. cnss_pr_err("Dynamic feature mask request failed, result: %d, err: %d\n",
  2196. resp->resp.result, resp->resp.error);
  2197. ret = -resp->resp.result;
  2198. goto out;
  2199. }
  2200. out:
  2201. kfree(req);
  2202. kfree(resp);
  2203. return ret;
  2204. }
  2205. int cnss_wlfw_get_info_send_sync(struct cnss_plat_data *plat_priv, int type,
  2206. void *cmd, int cmd_len)
  2207. {
  2208. struct wlfw_get_info_req_msg_v01 *req;
  2209. struct wlfw_get_info_resp_msg_v01 *resp;
  2210. struct qmi_txn txn;
  2211. int ret = 0;
  2212. cnss_pr_buf("Sending get info message, type: %d, cmd length: %d, state: 0x%lx\n",
  2213. type, cmd_len, plat_priv->driver_state);
  2214. if (cmd_len > QMI_WLFW_MAX_DATA_SIZE_V01)
  2215. return -EINVAL;
  2216. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2217. if (!req)
  2218. return -ENOMEM;
  2219. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2220. if (!resp) {
  2221. kfree(req);
  2222. return -ENOMEM;
  2223. }
  2224. req->type = type;
  2225. req->data_len = cmd_len;
  2226. memcpy(req->data, cmd, req->data_len);
  2227. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2228. wlfw_get_info_resp_msg_v01_ei, resp);
  2229. if (ret < 0) {
  2230. cnss_pr_err("Failed to initialize txn for get info request, err: %d\n",
  2231. ret);
  2232. goto out;
  2233. }
  2234. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2235. QMI_WLFW_GET_INFO_REQ_V01,
  2236. WLFW_GET_INFO_REQ_MSG_V01_MAX_MSG_LEN,
  2237. wlfw_get_info_req_msg_v01_ei, req);
  2238. if (ret < 0) {
  2239. qmi_txn_cancel(&txn);
  2240. cnss_pr_err("Failed to send get info request, err: %d\n",
  2241. ret);
  2242. goto out;
  2243. }
  2244. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2245. if (ret < 0) {
  2246. cnss_pr_err("Failed to wait for response of get info request, err: %d\n",
  2247. ret);
  2248. goto out;
  2249. }
  2250. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2251. cnss_pr_err("Get info request failed, result: %d, err: %d\n",
  2252. resp->resp.result, resp->resp.error);
  2253. ret = -resp->resp.result;
  2254. goto out;
  2255. }
  2256. kfree(req);
  2257. kfree(resp);
  2258. return 0;
  2259. out:
  2260. kfree(req);
  2261. kfree(resp);
  2262. return ret;
  2263. }
  2264. unsigned int cnss_get_qmi_timeout(struct cnss_plat_data *plat_priv)
  2265. {
  2266. return QMI_WLFW_TIMEOUT_MS;
  2267. }
  2268. static void cnss_wlfw_request_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2269. struct sockaddr_qrtr *sq,
  2270. struct qmi_txn *txn, const void *data)
  2271. {
  2272. struct cnss_plat_data *plat_priv =
  2273. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2274. const struct wlfw_request_mem_ind_msg_v01 *ind_msg = data;
  2275. int i;
  2276. cnss_pr_dbg("Received QMI WLFW request memory indication\n");
  2277. if (!txn) {
  2278. cnss_pr_err("Spurious indication\n");
  2279. return;
  2280. }
  2281. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2282. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2283. return;
  2284. }
  2285. plat_priv->fw_mem_seg_len = ind_msg->mem_seg_len;
  2286. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  2287. cnss_pr_dbg("FW requests for memory, size: 0x%x, type: %u\n",
  2288. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2289. plat_priv->fw_mem[i].type = ind_msg->mem_seg[i].type;
  2290. plat_priv->fw_mem[i].size = ind_msg->mem_seg[i].size;
  2291. if (!plat_priv->fw_mem[i].va &&
  2292. plat_priv->fw_mem[i].type == CNSS_MEM_TYPE_DDR)
  2293. plat_priv->fw_mem[i].attrs |=
  2294. DMA_ATTR_FORCE_CONTIGUOUS;
  2295. if (plat_priv->fw_mem[i].type == CNSS_MEM_CAL_V01)
  2296. plat_priv->cal_mem = &plat_priv->fw_mem[i];
  2297. }
  2298. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_REQUEST_MEM,
  2299. 0, NULL);
  2300. }
  2301. static void cnss_wlfw_fw_mem_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2302. struct sockaddr_qrtr *sq,
  2303. struct qmi_txn *txn, const void *data)
  2304. {
  2305. struct cnss_plat_data *plat_priv =
  2306. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2307. cnss_pr_dbg("Received QMI WLFW FW memory ready indication\n");
  2308. if (!txn) {
  2309. cnss_pr_err("Spurious indication\n");
  2310. return;
  2311. }
  2312. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_READY,
  2313. 0, NULL);
  2314. }
  2315. /**
  2316. * cnss_wlfw_fw_ready_ind_cb: FW ready indication handler (Helium arch)
  2317. *
  2318. * This event is not required for HST/ HSP as FW calibration done is
  2319. * provided in QMI_WLFW_CAL_DONE_IND_V01
  2320. */
  2321. static void cnss_wlfw_fw_ready_ind_cb(struct qmi_handle *qmi_wlfw,
  2322. struct sockaddr_qrtr *sq,
  2323. struct qmi_txn *txn, const void *data)
  2324. {
  2325. struct cnss_plat_data *plat_priv =
  2326. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2327. struct cnss_cal_info *cal_info;
  2328. if (!txn) {
  2329. cnss_pr_err("Spurious indication\n");
  2330. return;
  2331. }
  2332. if (plat_priv->device_id == QCA6390_DEVICE_ID ||
  2333. plat_priv->device_id == QCA6490_DEVICE_ID) {
  2334. cnss_pr_dbg("Ignore FW Ready Indication for HST/HSP");
  2335. return;
  2336. }
  2337. cnss_pr_dbg("Received QMI WLFW FW ready indication.\n");
  2338. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2339. if (!cal_info)
  2340. return;
  2341. cal_info->cal_status = CNSS_CAL_DONE;
  2342. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2343. 0, cal_info);
  2344. }
  2345. static void cnss_wlfw_fw_init_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2346. struct sockaddr_qrtr *sq,
  2347. struct qmi_txn *txn, const void *data)
  2348. {
  2349. struct cnss_plat_data *plat_priv =
  2350. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2351. cnss_pr_dbg("Received QMI WLFW FW initialization done indication\n");
  2352. if (!txn) {
  2353. cnss_pr_err("Spurious indication\n");
  2354. return;
  2355. }
  2356. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_READY, 0, NULL);
  2357. }
  2358. static void cnss_wlfw_pin_result_ind_cb(struct qmi_handle *qmi_wlfw,
  2359. struct sockaddr_qrtr *sq,
  2360. struct qmi_txn *txn, const void *data)
  2361. {
  2362. struct cnss_plat_data *plat_priv =
  2363. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2364. const struct wlfw_pin_connect_result_ind_msg_v01 *ind_msg = data;
  2365. cnss_pr_dbg("Received QMI WLFW pin connect result indication\n");
  2366. if (!txn) {
  2367. cnss_pr_err("Spurious indication\n");
  2368. return;
  2369. }
  2370. if (ind_msg->pwr_pin_result_valid)
  2371. plat_priv->pin_result.fw_pwr_pin_result =
  2372. ind_msg->pwr_pin_result;
  2373. if (ind_msg->phy_io_pin_result_valid)
  2374. plat_priv->pin_result.fw_phy_io_pin_result =
  2375. ind_msg->phy_io_pin_result;
  2376. if (ind_msg->rf_pin_result_valid)
  2377. plat_priv->pin_result.fw_rf_pin_result = ind_msg->rf_pin_result;
  2378. cnss_pr_dbg("Pin connect Result: pwr_pin: 0x%x phy_io_pin: 0x%x rf_io_pin: 0x%x\n",
  2379. ind_msg->pwr_pin_result, ind_msg->phy_io_pin_result,
  2380. ind_msg->rf_pin_result);
  2381. }
  2382. int cnss_wlfw_cal_report_req_send_sync(struct cnss_plat_data *plat_priv,
  2383. u32 cal_file_download_size)
  2384. {
  2385. struct wlfw_cal_report_req_msg_v01 req = {0};
  2386. struct wlfw_cal_report_resp_msg_v01 resp = {0};
  2387. struct qmi_txn txn;
  2388. int ret = 0;
  2389. cnss_pr_dbg("Sending cal file report request. File size: %d, state: 0x%lx\n",
  2390. cal_file_download_size, plat_priv->driver_state);
  2391. req.cal_file_download_size_valid = 1;
  2392. req.cal_file_download_size = cal_file_download_size;
  2393. ret = qmi_txn_init(&plat_priv->qmi_wlfw, &txn,
  2394. wlfw_cal_report_resp_msg_v01_ei, &resp);
  2395. if (ret < 0) {
  2396. cnss_pr_err("Failed to initialize txn for Cal Report request, err: %d\n",
  2397. ret);
  2398. goto out;
  2399. }
  2400. ret = qmi_send_request(&plat_priv->qmi_wlfw, NULL, &txn,
  2401. QMI_WLFW_CAL_REPORT_REQ_V01,
  2402. WLFW_CAL_REPORT_REQ_MSG_V01_MAX_MSG_LEN,
  2403. wlfw_cal_report_req_msg_v01_ei, &req);
  2404. if (ret < 0) {
  2405. qmi_txn_cancel(&txn);
  2406. cnss_pr_err("Failed to send Cal Report request, err: %d\n",
  2407. ret);
  2408. goto out;
  2409. }
  2410. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2411. if (ret < 0) {
  2412. cnss_pr_err("Failed to wait for response of Cal Report request, err: %d\n",
  2413. ret);
  2414. goto out;
  2415. }
  2416. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2417. cnss_pr_err("Cal Report request failed, result: %d, err: %d\n",
  2418. resp.resp.result, resp.resp.error);
  2419. ret = -resp.resp.result;
  2420. goto out;
  2421. }
  2422. out:
  2423. return ret;
  2424. }
  2425. static void cnss_wlfw_cal_done_ind_cb(struct qmi_handle *qmi_wlfw,
  2426. struct sockaddr_qrtr *sq,
  2427. struct qmi_txn *txn, const void *data)
  2428. {
  2429. struct cnss_plat_data *plat_priv =
  2430. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2431. const struct wlfw_cal_done_ind_msg_v01 *ind = data;
  2432. struct cnss_cal_info *cal_info;
  2433. cnss_pr_dbg("Received Cal done indication. File size: %d\n",
  2434. ind->cal_file_upload_size);
  2435. cnss_pr_info("Calibration took %d ms\n",
  2436. jiffies_to_msecs(jiffies - plat_priv->cal_time));
  2437. if (!txn) {
  2438. cnss_pr_err("Spurious indication\n");
  2439. return;
  2440. }
  2441. if (ind->cal_file_upload_size_valid)
  2442. plat_priv->cal_file_size = ind->cal_file_upload_size;
  2443. cal_info = kzalloc(sizeof(*cal_info), GFP_KERNEL);
  2444. if (!cal_info)
  2445. return;
  2446. cal_info->cal_status = CNSS_CAL_DONE;
  2447. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE,
  2448. 0, cal_info);
  2449. }
  2450. static void cnss_wlfw_qdss_trace_req_mem_ind_cb(struct qmi_handle *qmi_wlfw,
  2451. struct sockaddr_qrtr *sq,
  2452. struct qmi_txn *txn,
  2453. const void *data)
  2454. {
  2455. struct cnss_plat_data *plat_priv =
  2456. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2457. const struct wlfw_qdss_trace_req_mem_ind_msg_v01 *ind_msg = data;
  2458. int i;
  2459. cnss_pr_dbg("Received QMI WLFW QDSS trace request mem indication\n");
  2460. if (!txn) {
  2461. cnss_pr_err("Spurious indication\n");
  2462. return;
  2463. }
  2464. if (plat_priv->qdss_mem_seg_len) {
  2465. cnss_pr_err("Ignore double allocation for QDSS trace, current len %u\n",
  2466. plat_priv->qdss_mem_seg_len);
  2467. return;
  2468. }
  2469. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_NUM_MEM_SEG_V01) {
  2470. cnss_pr_err("Invalid seg len %u\n", ind_msg->mem_seg_len);
  2471. return;
  2472. }
  2473. plat_priv->qdss_mem_seg_len = ind_msg->mem_seg_len;
  2474. for (i = 0; i < plat_priv->qdss_mem_seg_len; i++) {
  2475. cnss_pr_dbg("QDSS requests for memory, size: 0x%x, type: %u\n",
  2476. ind_msg->mem_seg[i].size, ind_msg->mem_seg[i].type);
  2477. plat_priv->qdss_mem[i].type = ind_msg->mem_seg[i].type;
  2478. plat_priv->qdss_mem[i].size = ind_msg->mem_seg[i].size;
  2479. }
  2480. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM,
  2481. 0, NULL);
  2482. }
  2483. /**
  2484. * cnss_wlfw_fw_mem_file_save_ind_cb: Save given FW mem to filesystem
  2485. *
  2486. * QDSS_TRACE_SAVE_IND feature is overloaded to provide any host allocated
  2487. * fw memory segment for dumping to file system. Only one type of mem can be
  2488. * saved per indication and is provided in mem seg index 0.
  2489. *
  2490. * Return: None
  2491. */
  2492. static void cnss_wlfw_fw_mem_file_save_ind_cb(struct qmi_handle *qmi_wlfw,
  2493. struct sockaddr_qrtr *sq,
  2494. struct qmi_txn *txn,
  2495. const void *data)
  2496. {
  2497. struct cnss_plat_data *plat_priv =
  2498. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2499. const struct wlfw_qdss_trace_save_ind_msg_v01 *ind_msg = data;
  2500. struct cnss_qmi_event_fw_mem_file_save_data *event_data;
  2501. int i = 0;
  2502. if (!txn || !data) {
  2503. cnss_pr_err("Spurious indication\n");
  2504. return;
  2505. }
  2506. cnss_pr_dbg_buf("QMI fw_mem_file_save: source: %d mem_seg: %d type: %u len: %u\n",
  2507. ind_msg->source, ind_msg->mem_seg_valid,
  2508. ind_msg->mem_seg[0].type, ind_msg->mem_seg_len);
  2509. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2510. if (!event_data)
  2511. return;
  2512. event_data->mem_type = ind_msg->mem_seg[0].type;
  2513. event_data->mem_seg_len = ind_msg->mem_seg_len;
  2514. event_data->total_size = ind_msg->total_size;
  2515. if (ind_msg->mem_seg_valid) {
  2516. if (ind_msg->mem_seg_len > QMI_WLFW_MAX_STR_LEN_V01) {
  2517. cnss_pr_err("Invalid seg len indication\n");
  2518. goto free_event_data;
  2519. }
  2520. for (i = 0; i < ind_msg->mem_seg_len; i++) {
  2521. event_data->mem_seg[i].addr = ind_msg->mem_seg[i].addr;
  2522. event_data->mem_seg[i].size = ind_msg->mem_seg[i].size;
  2523. if (event_data->mem_type != ind_msg->mem_seg[i].type) {
  2524. cnss_pr_err("FW Mem file save ind cannot have multiple mem types\n");
  2525. goto free_event_data;
  2526. }
  2527. cnss_pr_dbg_buf("seg-%d: addr 0x%llx size 0x%x\n",
  2528. i, ind_msg->mem_seg[i].addr,
  2529. ind_msg->mem_seg[i].size);
  2530. }
  2531. }
  2532. if (ind_msg->file_name_valid)
  2533. strlcpy(event_data->file_name, ind_msg->file_name,
  2534. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2535. if (ind_msg->source == 1) {
  2536. if (!ind_msg->file_name_valid)
  2537. strlcpy(event_data->file_name, "qdss_trace_wcss_etb",
  2538. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2539. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA,
  2540. 0, event_data);
  2541. } else {
  2542. if (event_data->mem_type == QMI_WLFW_MEM_QDSS_V01) {
  2543. if (!ind_msg->file_name_valid)
  2544. strlcpy(event_data->file_name, "qdss_trace_ddr",
  2545. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2546. } else {
  2547. if (!ind_msg->file_name_valid)
  2548. strlcpy(event_data->file_name, "fw_mem_dump",
  2549. QMI_WLFW_MAX_STR_LEN_V01 + 1);
  2550. }
  2551. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE,
  2552. 0, event_data);
  2553. }
  2554. return;
  2555. free_event_data:
  2556. kfree(event_data);
  2557. }
  2558. static void cnss_wlfw_qdss_trace_free_ind_cb(struct qmi_handle *qmi_wlfw,
  2559. struct sockaddr_qrtr *sq,
  2560. struct qmi_txn *txn,
  2561. const void *data)
  2562. {
  2563. struct cnss_plat_data *plat_priv =
  2564. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2565. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_QDSS_TRACE_FREE,
  2566. 0, NULL);
  2567. }
  2568. static void cnss_wlfw_respond_get_info_ind_cb(struct qmi_handle *qmi_wlfw,
  2569. struct sockaddr_qrtr *sq,
  2570. struct qmi_txn *txn,
  2571. const void *data)
  2572. {
  2573. struct cnss_plat_data *plat_priv =
  2574. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2575. const struct wlfw_respond_get_info_ind_msg_v01 *ind_msg = data;
  2576. cnss_pr_buf("Received QMI WLFW respond get info indication\n");
  2577. if (!txn) {
  2578. cnss_pr_err("Spurious indication\n");
  2579. return;
  2580. }
  2581. cnss_pr_buf("Extract message with event length: %d, type: %d, is last: %d, seq no: %d\n",
  2582. ind_msg->data_len, ind_msg->type,
  2583. ind_msg->is_last, ind_msg->seq_no);
  2584. if (plat_priv->get_info_cb_ctx && plat_priv->get_info_cb)
  2585. plat_priv->get_info_cb(plat_priv->get_info_cb_ctx,
  2586. (void *)ind_msg->data,
  2587. ind_msg->data_len);
  2588. }
  2589. static int cnss_ims_wfc_call_twt_cfg_send_sync
  2590. (struct cnss_plat_data *plat_priv,
  2591. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg)
  2592. {
  2593. struct ims_private_service_wfc_call_twt_config_req_msg_v01 *req;
  2594. struct ims_private_service_wfc_call_twt_config_rsp_msg_v01 *resp;
  2595. struct qmi_txn txn;
  2596. int ret = 0;
  2597. if (!test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  2598. cnss_pr_err("Drop FW WFC indication as IMS QMI not connected\n");
  2599. return -EINVAL;
  2600. }
  2601. req = kzalloc(sizeof(*req), GFP_KERNEL);
  2602. if (!req)
  2603. return -ENOMEM;
  2604. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  2605. if (!resp) {
  2606. kfree(req);
  2607. return -ENOMEM;
  2608. }
  2609. req->twt_sta_start_valid = ind_msg->twt_sta_start_valid;
  2610. req->twt_sta_start = ind_msg->twt_sta_start;
  2611. req->twt_sta_int_valid = ind_msg->twt_sta_int_valid;
  2612. req->twt_sta_int = ind_msg->twt_sta_int;
  2613. req->twt_sta_upo_valid = ind_msg->twt_sta_upo_valid;
  2614. req->twt_sta_upo = ind_msg->twt_sta_upo;
  2615. req->twt_sta_sp_valid = ind_msg->twt_sta_sp_valid;
  2616. req->twt_sta_sp = ind_msg->twt_sta_sp;
  2617. req->twt_sta_dl_valid = req->twt_sta_dl_valid;
  2618. req->twt_sta_dl = req->twt_sta_dl;
  2619. req->twt_sta_config_changed_valid =
  2620. ind_msg->twt_sta_config_changed_valid;
  2621. req->twt_sta_config_changed = ind_msg->twt_sta_config_changed;
  2622. cnss_pr_dbg("CNSS->IMS: TWT_CFG_REQ: state: 0x%lx\n",
  2623. plat_priv->driver_state);
  2624. ret =
  2625. qmi_txn_init(&plat_priv->ims_qmi, &txn,
  2626. ims_private_service_wfc_call_twt_config_rsp_msg_v01_ei,
  2627. resp);
  2628. if (ret < 0) {
  2629. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Txn Init Err: %d\n",
  2630. ret);
  2631. goto out;
  2632. }
  2633. ret =
  2634. qmi_send_request(&plat_priv->ims_qmi, NULL, &txn,
  2635. QMI_IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_V01,
  2636. IMS_PRIVATE_SERVICE_WFC_CALL_TWT_CONFIG_REQ_MSG_V01_MAX_MSG_LEN,
  2637. ims_private_service_wfc_call_twt_config_req_msg_v01_ei, req);
  2638. if (ret < 0) {
  2639. qmi_txn_cancel(&txn);
  2640. cnss_pr_err("CNSS->IMS: TWT_CFG_REQ: QMI Send Err: %d\n", ret);
  2641. goto out;
  2642. }
  2643. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2644. if (ret < 0) {
  2645. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: QMI Wait Err: %d\n", ret);
  2646. goto out;
  2647. }
  2648. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  2649. cnss_pr_err("IMS->CNSS: TWT_CFG_RSP: Result: %d Err: %d\n",
  2650. resp->resp.result, resp->resp.error);
  2651. ret = -resp->resp.result;
  2652. goto out;
  2653. }
  2654. ret = 0;
  2655. out:
  2656. kfree(req);
  2657. kfree(resp);
  2658. return ret;
  2659. }
  2660. int cnss_process_twt_cfg_ind_event(struct cnss_plat_data *plat_priv,
  2661. void *data)
  2662. {
  2663. int ret;
  2664. struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2665. ret = cnss_ims_wfc_call_twt_cfg_send_sync(plat_priv, ind_msg);
  2666. kfree(data);
  2667. return ret;
  2668. }
  2669. static void cnss_wlfw_process_twt_cfg_ind(struct qmi_handle *qmi_wlfw,
  2670. struct sockaddr_qrtr *sq,
  2671. struct qmi_txn *txn,
  2672. const void *data)
  2673. {
  2674. struct cnss_plat_data *plat_priv =
  2675. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2676. const struct wlfw_wfc_call_twt_config_ind_msg_v01 *ind_msg = data;
  2677. struct wlfw_wfc_call_twt_config_ind_msg_v01 *event_data;
  2678. if (!txn) {
  2679. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Spurious indication\n");
  2680. return;
  2681. }
  2682. if (!ind_msg) {
  2683. cnss_pr_err("FW->CNSS: TWT_CFG_IND: Invalid indication\n");
  2684. return;
  2685. }
  2686. cnss_pr_dbg("FW->CNSS: TWT_CFG_IND: %x %llx, %x %x, %x %x, %x %x, %x %x, %x %x\n",
  2687. ind_msg->twt_sta_start_valid, ind_msg->twt_sta_start,
  2688. ind_msg->twt_sta_int_valid, ind_msg->twt_sta_int,
  2689. ind_msg->twt_sta_upo_valid, ind_msg->twt_sta_upo,
  2690. ind_msg->twt_sta_sp_valid, ind_msg->twt_sta_sp,
  2691. ind_msg->twt_sta_dl_valid, ind_msg->twt_sta_dl,
  2692. ind_msg->twt_sta_config_changed_valid,
  2693. ind_msg->twt_sta_config_changed);
  2694. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  2695. if (!event_data)
  2696. return;
  2697. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND, 0,
  2698. event_data);
  2699. }
  2700. static struct qmi_msg_handler qmi_wlfw_msg_handlers[] = {
  2701. {
  2702. .type = QMI_INDICATION,
  2703. .msg_id = QMI_WLFW_REQUEST_MEM_IND_V01,
  2704. .ei = wlfw_request_mem_ind_msg_v01_ei,
  2705. .decoded_size = sizeof(struct wlfw_request_mem_ind_msg_v01),
  2706. .fn = cnss_wlfw_request_mem_ind_cb
  2707. },
  2708. {
  2709. .type = QMI_INDICATION,
  2710. .msg_id = QMI_WLFW_FW_MEM_READY_IND_V01,
  2711. .ei = wlfw_fw_mem_ready_ind_msg_v01_ei,
  2712. .decoded_size = sizeof(struct wlfw_fw_mem_ready_ind_msg_v01),
  2713. .fn = cnss_wlfw_fw_mem_ready_ind_cb
  2714. },
  2715. {
  2716. .type = QMI_INDICATION,
  2717. .msg_id = QMI_WLFW_FW_READY_IND_V01,
  2718. .ei = wlfw_fw_ready_ind_msg_v01_ei,
  2719. .decoded_size = sizeof(struct wlfw_fw_ready_ind_msg_v01),
  2720. .fn = cnss_wlfw_fw_ready_ind_cb
  2721. },
  2722. {
  2723. .type = QMI_INDICATION,
  2724. .msg_id = QMI_WLFW_FW_INIT_DONE_IND_V01,
  2725. .ei = wlfw_fw_init_done_ind_msg_v01_ei,
  2726. .decoded_size = sizeof(struct wlfw_fw_init_done_ind_msg_v01),
  2727. .fn = cnss_wlfw_fw_init_done_ind_cb
  2728. },
  2729. {
  2730. .type = QMI_INDICATION,
  2731. .msg_id = QMI_WLFW_PIN_CONNECT_RESULT_IND_V01,
  2732. .ei = wlfw_pin_connect_result_ind_msg_v01_ei,
  2733. .decoded_size =
  2734. sizeof(struct wlfw_pin_connect_result_ind_msg_v01),
  2735. .fn = cnss_wlfw_pin_result_ind_cb
  2736. },
  2737. {
  2738. .type = QMI_INDICATION,
  2739. .msg_id = QMI_WLFW_CAL_DONE_IND_V01,
  2740. .ei = wlfw_cal_done_ind_msg_v01_ei,
  2741. .decoded_size = sizeof(struct wlfw_cal_done_ind_msg_v01),
  2742. .fn = cnss_wlfw_cal_done_ind_cb
  2743. },
  2744. {
  2745. .type = QMI_INDICATION,
  2746. .msg_id = QMI_WLFW_QDSS_TRACE_REQ_MEM_IND_V01,
  2747. .ei = wlfw_qdss_trace_req_mem_ind_msg_v01_ei,
  2748. .decoded_size =
  2749. sizeof(struct wlfw_qdss_trace_req_mem_ind_msg_v01),
  2750. .fn = cnss_wlfw_qdss_trace_req_mem_ind_cb
  2751. },
  2752. {
  2753. .type = QMI_INDICATION,
  2754. .msg_id = QMI_WLFW_QDSS_TRACE_SAVE_IND_V01,
  2755. .ei = wlfw_qdss_trace_save_ind_msg_v01_ei,
  2756. .decoded_size =
  2757. sizeof(struct wlfw_qdss_trace_save_ind_msg_v01),
  2758. .fn = cnss_wlfw_fw_mem_file_save_ind_cb
  2759. },
  2760. {
  2761. .type = QMI_INDICATION,
  2762. .msg_id = QMI_WLFW_QDSS_TRACE_FREE_IND_V01,
  2763. .ei = wlfw_qdss_trace_free_ind_msg_v01_ei,
  2764. .decoded_size =
  2765. sizeof(struct wlfw_qdss_trace_free_ind_msg_v01),
  2766. .fn = cnss_wlfw_qdss_trace_free_ind_cb
  2767. },
  2768. {
  2769. .type = QMI_INDICATION,
  2770. .msg_id = QMI_WLFW_RESPOND_GET_INFO_IND_V01,
  2771. .ei = wlfw_respond_get_info_ind_msg_v01_ei,
  2772. .decoded_size =
  2773. sizeof(struct wlfw_respond_get_info_ind_msg_v01),
  2774. .fn = cnss_wlfw_respond_get_info_ind_cb
  2775. },
  2776. {
  2777. .type = QMI_INDICATION,
  2778. .msg_id = QMI_WLFW_WFC_CALL_TWT_CONFIG_IND_V01,
  2779. .ei = wlfw_wfc_call_twt_config_ind_msg_v01_ei,
  2780. .decoded_size =
  2781. sizeof(struct wlfw_wfc_call_twt_config_ind_msg_v01),
  2782. .fn = cnss_wlfw_process_twt_cfg_ind
  2783. },
  2784. {}
  2785. };
  2786. static int cnss_wlfw_connect_to_server(struct cnss_plat_data *plat_priv,
  2787. void *data)
  2788. {
  2789. struct cnss_qmi_event_server_arrive_data *event_data = data;
  2790. struct qmi_handle *qmi_wlfw = &plat_priv->qmi_wlfw;
  2791. struct sockaddr_qrtr sq = { 0 };
  2792. int ret = 0;
  2793. if (!event_data)
  2794. return -EINVAL;
  2795. sq.sq_family = AF_QIPCRTR;
  2796. sq.sq_node = event_data->node;
  2797. sq.sq_port = event_data->port;
  2798. ret = kernel_connect(qmi_wlfw->sock, (struct sockaddr *)&sq,
  2799. sizeof(sq), 0);
  2800. if (ret < 0) {
  2801. cnss_pr_err("Failed to connect to QMI WLFW remote service port\n");
  2802. goto out;
  2803. }
  2804. set_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2805. cnss_pr_info("QMI WLFW service connected, state: 0x%lx\n",
  2806. plat_priv->driver_state);
  2807. kfree(data);
  2808. return 0;
  2809. out:
  2810. CNSS_QMI_ASSERT();
  2811. kfree(data);
  2812. return ret;
  2813. }
  2814. int cnss_wlfw_server_arrive(struct cnss_plat_data *plat_priv, void *data)
  2815. {
  2816. int ret = 0;
  2817. if (!plat_priv)
  2818. return -ENODEV;
  2819. if (test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state)) {
  2820. cnss_pr_err("Unexpected WLFW server arrive\n");
  2821. CNSS_ASSERT(0);
  2822. return -EINVAL;
  2823. }
  2824. cnss_ignore_qmi_failure(false);
  2825. ret = cnss_wlfw_connect_to_server(plat_priv, data);
  2826. if (ret < 0)
  2827. goto out;
  2828. ret = cnss_wlfw_ind_register_send_sync(plat_priv);
  2829. if (ret < 0) {
  2830. if (ret == -EALREADY)
  2831. ret = 0;
  2832. goto out;
  2833. }
  2834. ret = cnss_wlfw_host_cap_send_sync(plat_priv);
  2835. if (ret < 0)
  2836. goto out;
  2837. return 0;
  2838. out:
  2839. return ret;
  2840. }
  2841. int cnss_wlfw_server_exit(struct cnss_plat_data *plat_priv)
  2842. {
  2843. int ret;
  2844. if (!plat_priv)
  2845. return -ENODEV;
  2846. clear_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state);
  2847. cnss_pr_info("QMI WLFW service disconnected, state: 0x%lx\n",
  2848. plat_priv->driver_state);
  2849. cnss_qmi_deinit(plat_priv);
  2850. clear_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2851. ret = cnss_qmi_init(plat_priv);
  2852. if (ret < 0) {
  2853. cnss_pr_err("QMI WLFW service registraton failed, ret\n", ret);
  2854. CNSS_ASSERT(0);
  2855. }
  2856. return 0;
  2857. }
  2858. static int wlfw_new_server(struct qmi_handle *qmi_wlfw,
  2859. struct qmi_service *service)
  2860. {
  2861. struct cnss_plat_data *plat_priv =
  2862. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2863. struct cnss_qmi_event_server_arrive_data *event_data;
  2864. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2865. cnss_pr_info("WLFW server delete in progress, Ignore server arrive, state: 0x%lx\n",
  2866. plat_priv->driver_state);
  2867. return 0;
  2868. }
  2869. cnss_pr_dbg("WLFW server arriving: node %u port %u\n",
  2870. service->node, service->port);
  2871. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2872. if (!event_data)
  2873. return -ENOMEM;
  2874. event_data->node = service->node;
  2875. event_data->port = service->port;
  2876. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_ARRIVE,
  2877. 0, event_data);
  2878. return 0;
  2879. }
  2880. static void wlfw_del_server(struct qmi_handle *qmi_wlfw,
  2881. struct qmi_service *service)
  2882. {
  2883. struct cnss_plat_data *plat_priv =
  2884. container_of(qmi_wlfw, struct cnss_plat_data, qmi_wlfw);
  2885. if (plat_priv && test_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state)) {
  2886. cnss_pr_info("WLFW server delete in progress, Ignore server delete, state: 0x%lx\n",
  2887. plat_priv->driver_state);
  2888. return;
  2889. }
  2890. cnss_pr_dbg("WLFW server exiting\n");
  2891. if (plat_priv) {
  2892. cnss_ignore_qmi_failure(true);
  2893. set_bit(CNSS_QMI_DEL_SERVER, &plat_priv->driver_state);
  2894. }
  2895. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_SERVER_EXIT,
  2896. 0, NULL);
  2897. }
  2898. static struct qmi_ops qmi_wlfw_ops = {
  2899. .new_server = wlfw_new_server,
  2900. .del_server = wlfw_del_server,
  2901. };
  2902. static int cnss_qmi_add_lookup(struct cnss_plat_data *plat_priv)
  2903. {
  2904. unsigned int id = WLFW_SERVICE_INS_ID_V01;
  2905. /* In order to support dual wlan card attach case,
  2906. * need separate qmi service instance id for each dev
  2907. */
  2908. if (cnss_is_dual_wlan_enabled() && plat_priv->qrtr_node_id != 0 &&
  2909. plat_priv->wlfw_service_instance_id != 0)
  2910. id = plat_priv->wlfw_service_instance_id;
  2911. return qmi_add_lookup(&plat_priv->qmi_wlfw, WLFW_SERVICE_ID_V01,
  2912. WLFW_SERVICE_VERS_V01, id);
  2913. }
  2914. int cnss_qmi_init(struct cnss_plat_data *plat_priv)
  2915. {
  2916. int ret = 0;
  2917. cnss_get_qrtr_info(plat_priv);
  2918. ret = qmi_handle_init(&plat_priv->qmi_wlfw,
  2919. QMI_WLFW_MAX_RECV_BUF_SIZE,
  2920. &qmi_wlfw_ops, qmi_wlfw_msg_handlers);
  2921. if (ret < 0) {
  2922. cnss_pr_err("Failed to initialize WLFW QMI handle, err: %d\n",
  2923. ret);
  2924. goto out;
  2925. }
  2926. ret = cnss_qmi_add_lookup(plat_priv);
  2927. if (ret < 0)
  2928. cnss_pr_err("Failed to add WLFW QMI lookup, err: %d\n", ret);
  2929. out:
  2930. return ret;
  2931. }
  2932. void cnss_qmi_deinit(struct cnss_plat_data *plat_priv)
  2933. {
  2934. qmi_handle_release(&plat_priv->qmi_wlfw);
  2935. }
  2936. int cnss_qmi_get_dms_mac(struct cnss_plat_data *plat_priv)
  2937. {
  2938. struct dms_get_mac_address_req_msg_v01 req;
  2939. struct dms_get_mac_address_resp_msg_v01 resp;
  2940. struct qmi_txn txn;
  2941. int ret = 0;
  2942. if (!test_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state)) {
  2943. cnss_pr_err("DMS QMI connection not established\n");
  2944. return -EINVAL;
  2945. }
  2946. cnss_pr_dbg("Requesting DMS MAC address");
  2947. memset(&resp, 0, sizeof(resp));
  2948. ret = qmi_txn_init(&plat_priv->qmi_dms, &txn,
  2949. dms_get_mac_address_resp_msg_v01_ei, &resp);
  2950. if (ret < 0) {
  2951. cnss_pr_err("Failed to initialize txn for dms, err: %d\n",
  2952. ret);
  2953. goto out;
  2954. }
  2955. req.device = DMS_DEVICE_MAC_WLAN_V01;
  2956. ret = qmi_send_request(&plat_priv->qmi_dms, NULL, &txn,
  2957. QMI_DMS_GET_MAC_ADDRESS_REQ_V01,
  2958. DMS_GET_MAC_ADDRESS_REQ_MSG_V01_MAX_MSG_LEN,
  2959. dms_get_mac_address_req_msg_v01_ei, &req);
  2960. if (ret < 0) {
  2961. qmi_txn_cancel(&txn);
  2962. cnss_pr_err("Failed to send QMI_DMS_GET_MAC_ADDRESS_REQ_V01, err: %d\n",
  2963. ret);
  2964. goto out;
  2965. }
  2966. ret = qmi_txn_wait(&txn, QMI_WLFW_TIMEOUT_JF);
  2967. if (ret < 0) {
  2968. cnss_pr_err("Failed to wait for QMI_DMS_GET_MAC_ADDRESS_RESP_V01, err: %d\n",
  2969. ret);
  2970. goto out;
  2971. }
  2972. if (resp.resp.result != QMI_RESULT_SUCCESS_V01) {
  2973. cnss_pr_err("QMI_DMS_GET_MAC_ADDRESS_REQ_V01 failed, result: %d, err: %d\n",
  2974. resp.resp.result, resp.resp.error);
  2975. ret = -resp.resp.result;
  2976. goto out;
  2977. }
  2978. if (!resp.mac_address_valid ||
  2979. resp.mac_address_len != QMI_WLFW_MAC_ADDR_SIZE_V01) {
  2980. cnss_pr_err("Invalid MAC address received from DMS\n");
  2981. plat_priv->dms.mac_valid = false;
  2982. goto out;
  2983. }
  2984. plat_priv->dms.mac_valid = true;
  2985. memcpy(plat_priv->dms.mac, resp.mac_address, QMI_WLFW_MAC_ADDR_SIZE_V01);
  2986. cnss_pr_info("Received DMS MAC: [%pM]\n", plat_priv->dms.mac);
  2987. out:
  2988. return ret;
  2989. }
  2990. static int cnss_dms_connect_to_server(struct cnss_plat_data *plat_priv,
  2991. unsigned int node, unsigned int port)
  2992. {
  2993. struct qmi_handle *qmi_dms = &plat_priv->qmi_dms;
  2994. struct sockaddr_qrtr sq = {0};
  2995. int ret = 0;
  2996. sq.sq_family = AF_QIPCRTR;
  2997. sq.sq_node = node;
  2998. sq.sq_port = port;
  2999. ret = kernel_connect(qmi_dms->sock, (struct sockaddr *)&sq,
  3000. sizeof(sq), 0);
  3001. if (ret < 0) {
  3002. cnss_pr_err("Failed to connect to QMI DMS remote service Node: %d Port: %d\n",
  3003. node, port);
  3004. goto out;
  3005. }
  3006. set_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3007. cnss_pr_info("QMI DMS service connected, state: 0x%lx\n",
  3008. plat_priv->driver_state);
  3009. out:
  3010. return ret;
  3011. }
  3012. static int dms_new_server(struct qmi_handle *qmi_dms,
  3013. struct qmi_service *service)
  3014. {
  3015. struct cnss_plat_data *plat_priv =
  3016. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3017. if (!service)
  3018. return -EINVAL;
  3019. return cnss_dms_connect_to_server(plat_priv, service->node,
  3020. service->port);
  3021. }
  3022. static void cnss_dms_server_exit_work(struct work_struct *work)
  3023. {
  3024. int ret;
  3025. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  3026. cnss_dms_deinit(plat_priv);
  3027. cnss_pr_info("QMI DMS Server Exit");
  3028. clear_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3029. ret = cnss_dms_init(plat_priv);
  3030. if (ret < 0)
  3031. cnss_pr_err("QMI DMS service registraton failed, ret\n", ret);
  3032. }
  3033. static DECLARE_WORK(cnss_dms_del_work, cnss_dms_server_exit_work);
  3034. static void dms_del_server(struct qmi_handle *qmi_dms,
  3035. struct qmi_service *service)
  3036. {
  3037. struct cnss_plat_data *plat_priv =
  3038. container_of(qmi_dms, struct cnss_plat_data, qmi_dms);
  3039. if (!plat_priv)
  3040. return;
  3041. if (test_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state)) {
  3042. cnss_pr_info("DMS server delete or cnss remove in progress, Ignore server delete: 0x%lx\n",
  3043. plat_priv->driver_state);
  3044. return;
  3045. }
  3046. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3047. clear_bit(CNSS_QMI_DMS_CONNECTED, &plat_priv->driver_state);
  3048. cnss_pr_info("QMI DMS service disconnected, state: 0x%lx\n",
  3049. plat_priv->driver_state);
  3050. schedule_work(&cnss_dms_del_work);
  3051. }
  3052. void cnss_cancel_dms_work(void)
  3053. {
  3054. cancel_work_sync(&cnss_dms_del_work);
  3055. }
  3056. static struct qmi_ops qmi_dms_ops = {
  3057. .new_server = dms_new_server,
  3058. .del_server = dms_del_server,
  3059. };
  3060. int cnss_dms_init(struct cnss_plat_data *plat_priv)
  3061. {
  3062. int ret = 0;
  3063. ret = qmi_handle_init(&plat_priv->qmi_dms, DMS_QMI_MAX_MSG_LEN,
  3064. &qmi_dms_ops, NULL);
  3065. if (ret < 0) {
  3066. cnss_pr_err("Failed to initialize DMS handle, err: %d\n", ret);
  3067. goto out;
  3068. }
  3069. ret = qmi_add_lookup(&plat_priv->qmi_dms, DMS_SERVICE_ID_V01,
  3070. DMS_SERVICE_VERS_V01, 0);
  3071. if (ret < 0)
  3072. cnss_pr_err("Failed to add DMS lookup, err: %d\n", ret);
  3073. out:
  3074. return ret;
  3075. }
  3076. void cnss_dms_deinit(struct cnss_plat_data *plat_priv)
  3077. {
  3078. set_bit(CNSS_DMS_DEL_SERVER, &plat_priv->driver_state);
  3079. qmi_handle_release(&plat_priv->qmi_dms);
  3080. }
  3081. int coex_antenna_switch_to_wlan_send_sync_msg(struct cnss_plat_data *plat_priv)
  3082. {
  3083. int ret;
  3084. struct coex_antenna_switch_to_wlan_req_msg_v01 *req;
  3085. struct coex_antenna_switch_to_wlan_resp_msg_v01 *resp;
  3086. struct qmi_txn txn;
  3087. if (!plat_priv)
  3088. return -ENODEV;
  3089. cnss_pr_dbg("Sending coex antenna switch_to_wlan\n");
  3090. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3091. if (!req)
  3092. return -ENOMEM;
  3093. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3094. if (!resp) {
  3095. kfree(req);
  3096. return -ENOMEM;
  3097. }
  3098. req->antenna = plat_priv->antenna;
  3099. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3100. coex_antenna_switch_to_wlan_resp_msg_v01_ei, resp);
  3101. if (ret < 0) {
  3102. cnss_pr_err("Fail to init txn for coex antenna switch_to_wlan resp %d\n",
  3103. ret);
  3104. goto out;
  3105. }
  3106. ret = qmi_send_request
  3107. (&plat_priv->coex_qmi, NULL, &txn,
  3108. QMI_COEX_SWITCH_ANTENNA_TO_WLAN_REQ_V01,
  3109. COEX_ANTENNA_SWITCH_TO_WLAN_REQ_MSG_V01_MAX_MSG_LEN,
  3110. coex_antenna_switch_to_wlan_req_msg_v01_ei, req);
  3111. if (ret < 0) {
  3112. qmi_txn_cancel(&txn);
  3113. cnss_pr_err("Fail to send coex antenna switch_to_wlan req %d\n",
  3114. ret);
  3115. goto out;
  3116. }
  3117. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3118. if (ret < 0) {
  3119. cnss_pr_err("Coex antenna switch_to_wlan resp wait failed with ret %d\n",
  3120. ret);
  3121. goto out;
  3122. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3123. cnss_pr_err("Coex antenna switch_to_wlan request rejected, result:%d error:%d\n",
  3124. resp->resp.result, resp->resp.error);
  3125. ret = -resp->resp.result;
  3126. goto out;
  3127. }
  3128. if (resp->grant_valid)
  3129. plat_priv->grant = resp->grant;
  3130. cnss_pr_dbg("Coex antenna grant: 0x%llx\n", resp->grant);
  3131. kfree(resp);
  3132. kfree(req);
  3133. return 0;
  3134. out:
  3135. kfree(resp);
  3136. kfree(req);
  3137. return ret;
  3138. }
  3139. int coex_antenna_switch_to_mdm_send_sync_msg(struct cnss_plat_data *plat_priv)
  3140. {
  3141. int ret;
  3142. struct coex_antenna_switch_to_mdm_req_msg_v01 *req;
  3143. struct coex_antenna_switch_to_mdm_resp_msg_v01 *resp;
  3144. struct qmi_txn txn;
  3145. if (!plat_priv)
  3146. return -ENODEV;
  3147. cnss_pr_dbg("Sending coex antenna switch_to_mdm\n");
  3148. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3149. if (!req)
  3150. return -ENOMEM;
  3151. resp = kzalloc(sizeof(*resp), GFP_KERNEL);
  3152. if (!resp) {
  3153. kfree(req);
  3154. return -ENOMEM;
  3155. }
  3156. req->antenna = plat_priv->antenna;
  3157. ret = qmi_txn_init(&plat_priv->coex_qmi, &txn,
  3158. coex_antenna_switch_to_mdm_resp_msg_v01_ei, resp);
  3159. if (ret < 0) {
  3160. cnss_pr_err("Fail to init txn for coex antenna switch_to_mdm resp %d\n",
  3161. ret);
  3162. goto out;
  3163. }
  3164. ret = qmi_send_request
  3165. (&plat_priv->coex_qmi, NULL, &txn,
  3166. QMI_COEX_SWITCH_ANTENNA_TO_MDM_REQ_V01,
  3167. COEX_ANTENNA_SWITCH_TO_MDM_REQ_MSG_V01_MAX_MSG_LEN,
  3168. coex_antenna_switch_to_mdm_req_msg_v01_ei, req);
  3169. if (ret < 0) {
  3170. qmi_txn_cancel(&txn);
  3171. cnss_pr_err("Fail to send coex antenna switch_to_mdm req %d\n",
  3172. ret);
  3173. goto out;
  3174. }
  3175. ret = qmi_txn_wait(&txn, COEX_TIMEOUT);
  3176. if (ret < 0) {
  3177. cnss_pr_err("Coex antenna switch_to_mdm resp wait failed with ret %d\n",
  3178. ret);
  3179. goto out;
  3180. } else if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3181. cnss_pr_err("Coex antenna switch_to_mdm request rejected, result:%d error:%d\n",
  3182. resp->resp.result, resp->resp.error);
  3183. ret = -resp->resp.result;
  3184. goto out;
  3185. }
  3186. kfree(resp);
  3187. kfree(req);
  3188. return 0;
  3189. out:
  3190. kfree(resp);
  3191. kfree(req);
  3192. return ret;
  3193. }
  3194. int cnss_send_subsys_restart_level_msg(struct cnss_plat_data *plat_priv)
  3195. {
  3196. int ret;
  3197. struct wlfw_subsys_restart_level_req_msg_v01 req;
  3198. struct wlfw_subsys_restart_level_resp_msg_v01 resp;
  3199. u8 pcss_enabled;
  3200. if (!plat_priv)
  3201. return -ENODEV;
  3202. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3203. cnss_pr_dbg("Can't send pcss cmd before fw ready\n");
  3204. return 0;
  3205. }
  3206. pcss_enabled = plat_priv->recovery_pcss_enabled;
  3207. cnss_pr_dbg("Sending pcss recovery status: %d\n", pcss_enabled);
  3208. req.restart_level_type_valid = 1;
  3209. req.restart_level_type = pcss_enabled;
  3210. ret = qmi_send_wait(&plat_priv->qmi_wlfw, &req, &resp,
  3211. wlfw_subsys_restart_level_req_msg_v01_ei,
  3212. wlfw_subsys_restart_level_resp_msg_v01_ei,
  3213. QMI_WLFW_SUBSYS_RESTART_LEVEL_REQ_V01,
  3214. WLFW_SUBSYS_RESTART_LEVEL_REQ_MSG_V01_MAX_MSG_LEN,
  3215. QMI_WLFW_TIMEOUT_JF);
  3216. if (ret < 0)
  3217. cnss_pr_err("pcss recovery setting failed with ret %d\n", ret);
  3218. return ret;
  3219. }
  3220. static int coex_new_server(struct qmi_handle *qmi,
  3221. struct qmi_service *service)
  3222. {
  3223. struct cnss_plat_data *plat_priv =
  3224. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3225. struct sockaddr_qrtr sq = { 0 };
  3226. int ret = 0;
  3227. cnss_pr_dbg("COEX server arrive: node %u port %u\n",
  3228. service->node, service->port);
  3229. sq.sq_family = AF_QIPCRTR;
  3230. sq.sq_node = service->node;
  3231. sq.sq_port = service->port;
  3232. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3233. if (ret < 0) {
  3234. cnss_pr_err("Fail to connect to remote service port\n");
  3235. return ret;
  3236. }
  3237. set_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3238. cnss_pr_dbg("COEX Server Connected: 0x%lx\n",
  3239. plat_priv->driver_state);
  3240. return 0;
  3241. }
  3242. static void coex_del_server(struct qmi_handle *qmi,
  3243. struct qmi_service *service)
  3244. {
  3245. struct cnss_plat_data *plat_priv =
  3246. container_of(qmi, struct cnss_plat_data, coex_qmi);
  3247. cnss_pr_dbg("COEX server exit\n");
  3248. clear_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state);
  3249. }
  3250. static struct qmi_ops coex_qmi_ops = {
  3251. .new_server = coex_new_server,
  3252. .del_server = coex_del_server,
  3253. };
  3254. int cnss_register_coex_service(struct cnss_plat_data *plat_priv)
  3255. { int ret;
  3256. ret = qmi_handle_init(&plat_priv->coex_qmi,
  3257. COEX_SERVICE_MAX_MSG_LEN,
  3258. &coex_qmi_ops, NULL);
  3259. if (ret < 0)
  3260. return ret;
  3261. ret = qmi_add_lookup(&plat_priv->coex_qmi, COEX_SERVICE_ID_V01,
  3262. COEX_SERVICE_VERS_V01, 0);
  3263. return ret;
  3264. }
  3265. void cnss_unregister_coex_service(struct cnss_plat_data *plat_priv)
  3266. {
  3267. qmi_handle_release(&plat_priv->coex_qmi);
  3268. }
  3269. /* IMS Service */
  3270. int ims_subscribe_for_indication_send_async(struct cnss_plat_data *plat_priv)
  3271. {
  3272. int ret;
  3273. struct ims_private_service_subscribe_for_indications_req_msg_v01 *req;
  3274. struct qmi_txn *txn;
  3275. if (!plat_priv)
  3276. return -ENODEV;
  3277. cnss_pr_dbg("Sending ASYNC ims subscribe for indication\n");
  3278. req = kzalloc(sizeof(*req), GFP_KERNEL);
  3279. if (!req)
  3280. return -ENOMEM;
  3281. req->wfc_call_status_valid = 1;
  3282. req->wfc_call_status = 1;
  3283. txn = &plat_priv->txn;
  3284. ret = qmi_txn_init(&plat_priv->ims_qmi, txn, NULL, NULL);
  3285. if (ret < 0) {
  3286. cnss_pr_err("Fail to init txn for ims subscribe for indication resp %d\n",
  3287. ret);
  3288. goto out;
  3289. }
  3290. ret = qmi_send_request
  3291. (&plat_priv->ims_qmi, NULL, txn,
  3292. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3293. IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_MSG_V01_MAX_MSG_LEN,
  3294. ims_private_service_subscribe_for_indications_req_msg_v01_ei, req);
  3295. if (ret < 0) {
  3296. qmi_txn_cancel(txn);
  3297. cnss_pr_err("Fail to send ims subscribe for indication req %d\n",
  3298. ret);
  3299. goto out;
  3300. }
  3301. kfree(req);
  3302. return 0;
  3303. out:
  3304. kfree(req);
  3305. return ret;
  3306. }
  3307. static void ims_subscribe_for_indication_resp_cb(struct qmi_handle *qmi,
  3308. struct sockaddr_qrtr *sq,
  3309. struct qmi_txn *txn,
  3310. const void *data)
  3311. {
  3312. const
  3313. struct ims_private_service_subscribe_for_indications_rsp_msg_v01 *resp =
  3314. data;
  3315. cnss_pr_dbg("Received IMS subscribe indication response\n");
  3316. if (!txn) {
  3317. cnss_pr_err("spurious response\n");
  3318. return;
  3319. }
  3320. if (resp->resp.result != QMI_RESULT_SUCCESS_V01) {
  3321. cnss_pr_err("IMS subscribe for indication request rejected, result:%d error:%d\n",
  3322. resp->resp.result, resp->resp.error);
  3323. txn->result = -resp->resp.result;
  3324. }
  3325. }
  3326. int cnss_process_wfc_call_ind_event(struct cnss_plat_data *plat_priv,
  3327. void *data)
  3328. {
  3329. int ret;
  3330. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3331. ret = cnss_wlfw_wfc_call_status_send_sync(plat_priv, ind_msg);
  3332. kfree(data);
  3333. return ret;
  3334. }
  3335. static void
  3336. cnss_ims_process_wfc_call_ind_cb(struct qmi_handle *ims_qmi,
  3337. struct sockaddr_qrtr *sq,
  3338. struct qmi_txn *txn, const void *data)
  3339. {
  3340. struct cnss_plat_data *plat_priv =
  3341. container_of(ims_qmi, struct cnss_plat_data, ims_qmi);
  3342. const
  3343. struct ims_private_service_wfc_call_status_ind_msg_v01 *ind_msg = data;
  3344. struct ims_private_service_wfc_call_status_ind_msg_v01 *event_data;
  3345. if (!txn) {
  3346. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Spurious indication\n");
  3347. return;
  3348. }
  3349. if (!ind_msg) {
  3350. cnss_pr_err("IMS->CNSS: WFC_CALL_IND: Invalid indication\n");
  3351. return;
  3352. }
  3353. cnss_pr_dbg("IMS->CNSS: WFC_CALL_IND: %x, %x %x, %x %x, %x %llx, %x %x, %x %x\n",
  3354. ind_msg->wfc_call_active, ind_msg->all_wfc_calls_held_valid,
  3355. ind_msg->all_wfc_calls_held,
  3356. ind_msg->is_wfc_emergency_valid, ind_msg->is_wfc_emergency,
  3357. ind_msg->twt_ims_start_valid, ind_msg->twt_ims_start,
  3358. ind_msg->twt_ims_int_valid, ind_msg->twt_ims_int,
  3359. ind_msg->media_quality_valid, ind_msg->media_quality);
  3360. event_data = kmemdup(ind_msg, sizeof(*event_data), GFP_KERNEL);
  3361. if (!event_data)
  3362. return;
  3363. cnss_driver_event_post(plat_priv, CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND,
  3364. 0, event_data);
  3365. }
  3366. static struct qmi_msg_handler qmi_ims_msg_handlers[] = {
  3367. {
  3368. .type = QMI_RESPONSE,
  3369. .msg_id =
  3370. QMI_IMS_PRIVATE_SERVICE_SUBSCRIBE_FOR_INDICATIONS_REQ_V01,
  3371. .ei =
  3372. ims_private_service_subscribe_for_indications_rsp_msg_v01_ei,
  3373. .decoded_size = sizeof(struct
  3374. ims_private_service_subscribe_for_indications_rsp_msg_v01),
  3375. .fn = ims_subscribe_for_indication_resp_cb
  3376. },
  3377. {
  3378. .type = QMI_INDICATION,
  3379. .msg_id = QMI_IMS_PRIVATE_SERVICE_WFC_CALL_STATUS_IND_V01,
  3380. .ei = ims_private_service_wfc_call_status_ind_msg_v01_ei,
  3381. .decoded_size =
  3382. sizeof(struct ims_private_service_wfc_call_status_ind_msg_v01),
  3383. .fn = cnss_ims_process_wfc_call_ind_cb
  3384. },
  3385. {}
  3386. };
  3387. static int ims_new_server(struct qmi_handle *qmi,
  3388. struct qmi_service *service)
  3389. {
  3390. struct cnss_plat_data *plat_priv =
  3391. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3392. struct sockaddr_qrtr sq = { 0 };
  3393. int ret = 0;
  3394. cnss_pr_dbg("IMS server arrive: node %u port %u\n",
  3395. service->node, service->port);
  3396. sq.sq_family = AF_QIPCRTR;
  3397. sq.sq_node = service->node;
  3398. sq.sq_port = service->port;
  3399. ret = kernel_connect(qmi->sock, (struct sockaddr *)&sq, sizeof(sq), 0);
  3400. if (ret < 0) {
  3401. cnss_pr_err("Fail to connect to remote service port\n");
  3402. return ret;
  3403. }
  3404. set_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3405. cnss_pr_dbg("IMS Server Connected: 0x%lx\n",
  3406. plat_priv->driver_state);
  3407. ret = ims_subscribe_for_indication_send_async(plat_priv);
  3408. return ret;
  3409. }
  3410. static void ims_del_server(struct qmi_handle *qmi,
  3411. struct qmi_service *service)
  3412. {
  3413. struct cnss_plat_data *plat_priv =
  3414. container_of(qmi, struct cnss_plat_data, ims_qmi);
  3415. cnss_pr_dbg("IMS server exit\n");
  3416. clear_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state);
  3417. }
  3418. static struct qmi_ops ims_qmi_ops = {
  3419. .new_server = ims_new_server,
  3420. .del_server = ims_del_server,
  3421. };
  3422. int cnss_register_ims_service(struct cnss_plat_data *plat_priv)
  3423. { int ret;
  3424. ret = qmi_handle_init(&plat_priv->ims_qmi,
  3425. IMSPRIVATE_SERVICE_MAX_MSG_LEN,
  3426. &ims_qmi_ops, qmi_ims_msg_handlers);
  3427. if (ret < 0)
  3428. return ret;
  3429. ret = qmi_add_lookup(&plat_priv->ims_qmi, IMSPRIVATE_SERVICE_ID_V01,
  3430. IMSPRIVATE_SERVICE_VERS_V01, 0);
  3431. return ret;
  3432. }
  3433. void cnss_unregister_ims_service(struct cnss_plat_data *plat_priv)
  3434. {
  3435. qmi_handle_release(&plat_priv->ims_qmi);
  3436. }