main.c 116 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <trace/hooks/remoteproc.h>
  46. #include <../drivers/soc/qcom/slatecom_interface.h>
  47. #include "main.h"
  48. #include "qmi.h"
  49. #include "debug.h"
  50. #include "power.h"
  51. #include "genl.h"
  52. #define MAX_PROP_SIZE 32
  53. #define NUM_LOG_PAGES 10
  54. #define NUM_LOG_LONG_PAGES 4
  55. #define ICNSS_MAGIC 0x5abc5abc
  56. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  57. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  58. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  59. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  60. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  61. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  62. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  63. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  64. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  65. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  66. #define ICNSS_MAX_PROBE_CNT 2
  67. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  68. #define PROBE_TIMEOUT 15000
  69. #define SMP2P_SOC_WAKE_TIMEOUT 500
  70. #ifdef CONFIG_ICNSS2_DEBUG
  71. static unsigned long qmi_timeout = 3000;
  72. module_param(qmi_timeout, ulong, 0600);
  73. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  74. #else
  75. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  76. #endif
  77. static struct icnss_priv *penv;
  78. static struct work_struct wpss_loader;
  79. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  80. #define ICNSS_EVENT_PENDING 2989
  81. #define ICNSS_EVENT_SYNC BIT(0)
  82. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  83. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  84. ICNSS_EVENT_SYNC)
  85. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  86. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  87. #define SMP2P_GET_MAX_RETRY 4
  88. #define SMP2P_GET_RETRY_DELAY_MS 500
  89. #define RAMDUMP_NUM_DEVICES 256
  90. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  91. #define WLAN_EN_TEMP_THRESHOLD 5000
  92. #define WLAN_EN_DELAY 500
  93. #define ICNSS_RPROC_LEN 10
  94. static DEFINE_IDA(rd_minor_id);
  95. enum icnss_pdr_cause_index {
  96. ICNSS_FW_CRASH,
  97. ICNSS_ROOT_PD_CRASH,
  98. ICNSS_ROOT_PD_SHUTDOWN,
  99. ICNSS_HOST_ERROR,
  100. };
  101. static const char * const icnss_pdr_cause[] = {
  102. [ICNSS_FW_CRASH] = "FW crash",
  103. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  104. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  105. [ICNSS_HOST_ERROR] = "Host error",
  106. };
  107. static void icnss_set_plat_priv(struct icnss_priv *priv)
  108. {
  109. penv = priv;
  110. }
  111. static struct icnss_priv *icnss_get_plat_priv(void)
  112. {
  113. return penv;
  114. }
  115. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  116. struct kobj_attribute *attr,
  117. const char *buf, size_t count)
  118. {
  119. struct icnss_priv *priv = icnss_get_plat_priv();
  120. atomic_set(&priv->is_shutdown, true);
  121. icnss_pr_dbg("Received shutdown indication");
  122. return count;
  123. }
  124. static struct kobj_attribute icnss_sysfs_attribute =
  125. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  126. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  127. {
  128. if (atomic_inc_return(&priv->pm_count) != 1)
  129. return;
  130. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  131. atomic_read(&priv->pm_count));
  132. pm_stay_awake(&priv->pdev->dev);
  133. priv->stats.pm_stay_awake++;
  134. }
  135. static void icnss_pm_relax(struct icnss_priv *priv)
  136. {
  137. int r = atomic_dec_return(&priv->pm_count);
  138. WARN_ON(r < 0);
  139. if (r != 0)
  140. return;
  141. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  142. atomic_read(&priv->pm_count));
  143. pm_relax(&priv->pdev->dev);
  144. priv->stats.pm_relax++;
  145. }
  146. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  147. {
  148. switch (type) {
  149. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  150. return "SERVER_ARRIVE";
  151. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  152. return "SERVER_EXIT";
  153. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  154. return "FW_READY";
  155. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  156. return "REGISTER_DRIVER";
  157. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  158. return "UNREGISTER_DRIVER";
  159. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  160. return "PD_SERVICE_DOWN";
  161. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  162. return "FW_EARLY_CRASH_IND";
  163. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  164. return "IDLE_SHUTDOWN";
  165. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  166. return "IDLE_RESTART";
  167. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  168. return "FW_INIT_DONE";
  169. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  170. return "QDSS_TRACE_REQ_MEM";
  171. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  172. return "QDSS_TRACE_SAVE";
  173. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  174. return "QDSS_TRACE_FREE";
  175. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  176. return "M3_DUMP_UPLOAD";
  177. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  178. return "QDSS_TRACE_REQ_DATA";
  179. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  180. return "SUBSYS_RESTART_LEVEL";
  181. case ICNSS_DRIVER_EVENT_MAX:
  182. return "EVENT_MAX";
  183. }
  184. return "UNKNOWN";
  185. };
  186. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  187. {
  188. switch (type) {
  189. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  190. return "SOC_WAKE_REQUEST";
  191. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  192. return "SOC_WAKE_RELEASE";
  193. case ICNSS_SOC_WAKE_EVENT_MAX:
  194. return "SOC_EVENT_MAX";
  195. }
  196. return "UNKNOWN";
  197. };
  198. int icnss_driver_event_post(struct icnss_priv *priv,
  199. enum icnss_driver_event_type type,
  200. u32 flags, void *data)
  201. {
  202. struct icnss_driver_event *event;
  203. unsigned long irq_flags;
  204. int gfp = GFP_KERNEL;
  205. int ret = 0;
  206. if (!priv)
  207. return -ENODEV;
  208. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  209. icnss_driver_event_to_str(type), type, current->comm,
  210. flags, priv->state);
  211. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  212. icnss_pr_err("Invalid Event type: %d, can't post", type);
  213. return -EINVAL;
  214. }
  215. if (in_interrupt() || irqs_disabled())
  216. gfp = GFP_ATOMIC;
  217. event = kzalloc(sizeof(*event), gfp);
  218. if (event == NULL)
  219. return -ENOMEM;
  220. icnss_pm_stay_awake(priv);
  221. event->type = type;
  222. event->data = data;
  223. init_completion(&event->complete);
  224. event->ret = ICNSS_EVENT_PENDING;
  225. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  226. spin_lock_irqsave(&priv->event_lock, irq_flags);
  227. list_add_tail(&event->list, &priv->event_list);
  228. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  229. priv->stats.events[type].posted++;
  230. queue_work(priv->event_wq, &priv->event_work);
  231. if (!(flags & ICNSS_EVENT_SYNC))
  232. goto out;
  233. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  234. wait_for_completion(&event->complete);
  235. else
  236. ret = wait_for_completion_interruptible(&event->complete);
  237. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  238. icnss_driver_event_to_str(type), type, priv->state, ret,
  239. event->ret);
  240. spin_lock_irqsave(&priv->event_lock, irq_flags);
  241. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  242. event->sync = false;
  243. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  244. ret = -EINTR;
  245. goto out;
  246. }
  247. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  248. ret = event->ret;
  249. kfree(event);
  250. out:
  251. icnss_pm_relax(priv);
  252. return ret;
  253. }
  254. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  255. enum icnss_soc_wake_event_type type,
  256. u32 flags, void *data)
  257. {
  258. struct icnss_soc_wake_event *event;
  259. unsigned long irq_flags;
  260. int gfp = GFP_KERNEL;
  261. int ret = 0;
  262. if (!priv)
  263. return -ENODEV;
  264. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  265. icnss_soc_wake_event_to_str(type),
  266. type, current->comm, flags, priv->state);
  267. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  268. icnss_pr_err("Invalid Event type: %d, can't post", type);
  269. return -EINVAL;
  270. }
  271. if (in_interrupt() || irqs_disabled())
  272. gfp = GFP_ATOMIC;
  273. event = kzalloc(sizeof(*event), gfp);
  274. if (!event)
  275. return -ENOMEM;
  276. icnss_pm_stay_awake(priv);
  277. event->type = type;
  278. event->data = data;
  279. init_completion(&event->complete);
  280. event->ret = ICNSS_EVENT_PENDING;
  281. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  282. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  283. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  284. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  285. priv->stats.soc_wake_events[type].posted++;
  286. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  287. if (!(flags & ICNSS_EVENT_SYNC))
  288. goto out;
  289. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  290. wait_for_completion(&event->complete);
  291. else
  292. ret = wait_for_completion_interruptible(&event->complete);
  293. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  294. icnss_soc_wake_event_to_str(type),
  295. type, priv->state, ret, event->ret);
  296. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  297. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  298. event->sync = false;
  299. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  300. ret = -EINTR;
  301. goto out;
  302. }
  303. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  304. ret = event->ret;
  305. kfree(event);
  306. out:
  307. icnss_pm_relax(priv);
  308. return ret;
  309. }
  310. bool icnss_is_fw_ready(void)
  311. {
  312. if (!penv)
  313. return false;
  314. else
  315. return test_bit(ICNSS_FW_READY, &penv->state);
  316. }
  317. EXPORT_SYMBOL(icnss_is_fw_ready);
  318. void icnss_block_shutdown(bool status)
  319. {
  320. if (!penv)
  321. return;
  322. if (status) {
  323. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  324. reinit_completion(&penv->unblock_shutdown);
  325. } else {
  326. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  327. complete(&penv->unblock_shutdown);
  328. }
  329. }
  330. EXPORT_SYMBOL(icnss_block_shutdown);
  331. bool icnss_is_fw_down(void)
  332. {
  333. struct icnss_priv *priv = icnss_get_plat_priv();
  334. if (!priv)
  335. return false;
  336. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  337. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  338. test_bit(ICNSS_REJUVENATE, &priv->state);
  339. }
  340. EXPORT_SYMBOL(icnss_is_fw_down);
  341. unsigned long icnss_get_device_config(void)
  342. {
  343. struct icnss_priv *priv = icnss_get_plat_priv();
  344. if (!priv)
  345. return 0;
  346. return priv->device_config;
  347. }
  348. EXPORT_SYMBOL(icnss_get_device_config);
  349. bool icnss_is_rejuvenate(void)
  350. {
  351. if (!penv)
  352. return false;
  353. else
  354. return test_bit(ICNSS_REJUVENATE, &penv->state);
  355. }
  356. EXPORT_SYMBOL(icnss_is_rejuvenate);
  357. bool icnss_is_pdr(void)
  358. {
  359. if (!penv)
  360. return false;
  361. else
  362. return test_bit(ICNSS_PDR, &penv->state);
  363. }
  364. EXPORT_SYMBOL(icnss_is_pdr);
  365. static int icnss_send_smp2p(struct icnss_priv *priv,
  366. enum icnss_smp2p_msg_id msg_id,
  367. enum smp2p_out_entry smp2p_entry)
  368. {
  369. unsigned int value = 0;
  370. int ret;
  371. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  372. return -EINVAL;
  373. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  374. if (msg_id == ICNSS_RESET_MSG) {
  375. priv->smp2p_info[smp2p_entry].seq = 0;
  376. ret = qcom_smem_state_update_bits(
  377. priv->smp2p_info[smp2p_entry].smem_state,
  378. ICNSS_SMEM_VALUE_MASK,
  379. 0);
  380. if (ret)
  381. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  382. ret, icnss_smp2p_str[smp2p_entry]);
  383. return ret;
  384. }
  385. if (test_bit(ICNSS_FW_DOWN, &priv->state))
  386. return -ENODEV;
  387. value |= priv->smp2p_info[smp2p_entry].seq++;
  388. value <<= ICNSS_SMEM_SEQ_NO_POS;
  389. value |= msg_id;
  390. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  391. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  392. reinit_completion(&penv->smp2p_soc_wake_wait);
  393. ret = qcom_smem_state_update_bits(
  394. priv->smp2p_info[smp2p_entry].smem_state,
  395. ICNSS_SMEM_VALUE_MASK,
  396. value);
  397. if (ret) {
  398. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  399. icnss_smp2p_str[smp2p_entry]);
  400. } else {
  401. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  402. msg_id == ICNSS_SOC_WAKE_REL) {
  403. if (!wait_for_completion_timeout(
  404. &priv->smp2p_soc_wake_wait,
  405. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  406. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  407. icnss_smp2p_str[smp2p_entry]);
  408. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  409. ICNSS_ASSERT(0);
  410. }
  411. }
  412. }
  413. return ret;
  414. }
  415. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  416. {
  417. struct icnss_priv *priv = ctx;
  418. if (priv)
  419. priv->force_err_fatal = true;
  420. icnss_pr_err("Received force error fatal request from FW\n");
  421. return IRQ_HANDLED;
  422. }
  423. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  424. {
  425. struct icnss_priv *priv = ctx;
  426. struct icnss_uevent_fw_down_data fw_down_data = {0};
  427. icnss_pr_err("Received early crash indication from FW\n");
  428. if (priv) {
  429. set_bit(ICNSS_FW_DOWN, &priv->state);
  430. icnss_ignore_fw_timeout(true);
  431. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  432. clear_bit(ICNSS_FW_READY, &priv->state);
  433. fw_down_data.crashed = true;
  434. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  435. &fw_down_data);
  436. }
  437. }
  438. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  439. 0, NULL);
  440. return IRQ_HANDLED;
  441. }
  442. static void register_fw_error_notifications(struct device *dev)
  443. {
  444. struct icnss_priv *priv = dev_get_drvdata(dev);
  445. struct device_node *dev_node;
  446. int irq = 0, ret = 0;
  447. if (!priv)
  448. return;
  449. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  450. if (!dev_node) {
  451. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  452. return;
  453. }
  454. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  455. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  456. ret = irq = of_irq_get_byname(dev_node,
  457. "qcom,smp2p-force-fatal-error");
  458. if (ret < 0) {
  459. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  460. irq);
  461. return;
  462. }
  463. }
  464. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  465. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  466. "wlanfw-err", priv);
  467. if (ret < 0) {
  468. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  469. irq, ret);
  470. return;
  471. }
  472. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  473. priv->fw_error_fatal_irq = irq;
  474. }
  475. static void register_early_crash_notifications(struct device *dev)
  476. {
  477. struct icnss_priv *priv = dev_get_drvdata(dev);
  478. struct device_node *dev_node;
  479. int irq = 0, ret = 0;
  480. if (!priv)
  481. return;
  482. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  483. if (!dev_node) {
  484. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  485. return;
  486. }
  487. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  488. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  489. ret = irq = of_irq_get_byname(dev_node,
  490. "qcom,smp2p-early-crash-ind");
  491. if (ret < 0) {
  492. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  493. irq);
  494. return;
  495. }
  496. }
  497. ret = devm_request_threaded_irq(dev, irq, NULL,
  498. fw_crash_indication_handler,
  499. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  500. "wlanfw-early-crash-ind", priv);
  501. if (ret < 0) {
  502. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  503. irq, ret);
  504. return;
  505. }
  506. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  507. priv->fw_early_crash_irq = irq;
  508. }
  509. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  510. {
  511. struct thermal_zone_device *thermal_dev;
  512. const char *tsens;
  513. int ret;
  514. ret = of_property_read_string(priv->pdev->dev.of_node,
  515. "tsens",
  516. &tsens);
  517. if (ret)
  518. return ret;
  519. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  520. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  521. if (IS_ERR(thermal_dev)) {
  522. icnss_pr_err("Fail to get thermal zone. ret: %d",
  523. PTR_ERR(thermal_dev));
  524. return PTR_ERR(thermal_dev);
  525. }
  526. ret = thermal_zone_get_temp(thermal_dev, temp);
  527. if (ret)
  528. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  529. return ret;
  530. }
  531. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  532. {
  533. struct icnss_priv *priv = ctx;
  534. if (priv)
  535. complete(&priv->smp2p_soc_wake_wait);
  536. return IRQ_HANDLED;
  537. }
  538. static void register_soc_wake_notif(struct device *dev)
  539. {
  540. struct icnss_priv *priv = dev_get_drvdata(dev);
  541. struct device_node *dev_node;
  542. int irq = 0, ret = 0;
  543. if (!priv)
  544. return;
  545. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  546. if (!dev_node) {
  547. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  548. return;
  549. }
  550. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  551. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  552. ret = irq = of_irq_get_byname(dev_node,
  553. "qcom,smp2p-soc-wake-ack");
  554. if (ret < 0) {
  555. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  556. irq);
  557. return;
  558. }
  559. }
  560. ret = devm_request_threaded_irq(dev, irq, NULL,
  561. fw_soc_wake_ack_handler,
  562. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  563. IRQF_TRIGGER_FALLING,
  564. "wlanfw-soc-wake-ack", priv);
  565. if (ret < 0) {
  566. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  567. irq, ret);
  568. return;
  569. }
  570. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  571. priv->fw_soc_wake_ack_irq = irq;
  572. }
  573. int icnss_call_driver_uevent(struct icnss_priv *priv,
  574. enum icnss_uevent uevent, void *data)
  575. {
  576. struct icnss_uevent_data uevent_data;
  577. if (!priv->ops || !priv->ops->uevent)
  578. return 0;
  579. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  580. priv->state, uevent);
  581. uevent_data.uevent = uevent;
  582. uevent_data.data = data;
  583. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  584. }
  585. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  586. {
  587. int i;
  588. int ret = 0;
  589. ret = icnss_qmi_get_dms_mac(priv);
  590. if (ret == 0 && priv->dms.mac_valid)
  591. goto qmi_send;
  592. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  593. * Thus assert on failure to get MAC from DMS even after retries
  594. */
  595. if (priv->use_nv_mac) {
  596. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  597. if (priv->dms.mac_valid)
  598. break;
  599. ret = icnss_qmi_get_dms_mac(priv);
  600. if (ret != -EAGAIN)
  601. break;
  602. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  603. }
  604. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  605. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  606. ICNSS_ASSERT(0);
  607. return -EINVAL;
  608. }
  609. }
  610. qmi_send:
  611. if (priv->dms.mac_valid)
  612. ret =
  613. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  614. ARRAY_SIZE(priv->dms.mac));
  615. return ret;
  616. }
  617. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  618. enum smp2p_out_entry smp2p_entry)
  619. {
  620. int retry = 0;
  621. int error;
  622. if (priv->smp2p_info[smp2p_entry].smem_state)
  623. return;
  624. retry:
  625. priv->smp2p_info[smp2p_entry].smem_state =
  626. qcom_smem_state_get(&priv->pdev->dev,
  627. icnss_smp2p_str[smp2p_entry],
  628. &priv->smp2p_info[smp2p_entry].smem_bit);
  629. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  630. if (retry++ < SMP2P_GET_MAX_RETRY) {
  631. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  632. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  633. error, icnss_smp2p_str[smp2p_entry]);
  634. msleep(SMP2P_GET_RETRY_DELAY_MS);
  635. goto retry;
  636. }
  637. ICNSS_ASSERT(0);
  638. return;
  639. }
  640. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  641. }
  642. static inline
  643. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  644. {
  645. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  646. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  647. } else {
  648. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  649. }
  650. }
  651. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  652. {
  653. switch (val) {
  654. case WLAN_RF_SLATE:
  655. return WLFW_WLAN_RF_SLATE_V01;
  656. case WLAN_RF_APACHE:
  657. return WLFW_WLAN_RF_APACHE_V01;
  658. default:
  659. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  660. }
  661. }
  662. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  663. void *data)
  664. {
  665. int ret = 0;
  666. int temp = 0;
  667. bool ignore_assert = false;
  668. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  669. if (!priv)
  670. return -ENODEV;
  671. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  672. clear_bit(ICNSS_FW_DOWN, &priv->state);
  673. clear_bit(ICNSS_FW_READY, &priv->state);
  674. icnss_ignore_fw_timeout(false);
  675. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  676. icnss_pr_err("QMI Server already in Connected State\n");
  677. ICNSS_ASSERT(0);
  678. }
  679. ret = icnss_connect_to_fw_server(priv, data);
  680. if (ret)
  681. goto fail;
  682. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  683. if (priv->is_slate_rfa) {
  684. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  685. reinit_completion(&priv->slate_boot_complete);
  686. icnss_pr_dbg("Waiting for slate boot up notification, 0x%lx\n",
  687. priv->state);
  688. wait_for_completion(&priv->slate_boot_complete);
  689. }
  690. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  691. icnss_pr_info("sent wlan boot init command\n");
  692. }
  693. ret = wlfw_ind_register_send_sync_msg(priv);
  694. if (ret < 0) {
  695. if (ret == -EALREADY) {
  696. ret = 0;
  697. goto qmi_registered;
  698. }
  699. ignore_assert = true;
  700. goto fail;
  701. }
  702. if (priv->is_rf_subtype_valid) {
  703. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  704. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  705. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  706. if (ret < 0)
  707. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  708. ret);
  709. } else {
  710. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  711. priv->rf_subtype);
  712. }
  713. }
  714. if (priv->device_id == WCN6750_DEVICE_ID) {
  715. if (!icnss_get_temperature(priv, &temp)) {
  716. icnss_pr_dbg("Temperature: %d\n", temp);
  717. if (temp < WLAN_EN_TEMP_THRESHOLD)
  718. icnss_set_wlan_en_delay(priv);
  719. }
  720. ret = wlfw_host_cap_send_sync(priv);
  721. if (ret < 0)
  722. goto fail;
  723. }
  724. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  725. if (!priv->msa_va) {
  726. icnss_pr_err("Invalid MSA address\n");
  727. ret = -EINVAL;
  728. goto fail;
  729. }
  730. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  731. if (ret < 0) {
  732. ignore_assert = true;
  733. goto fail;
  734. }
  735. ret = wlfw_msa_ready_send_sync_msg(priv);
  736. if (ret < 0) {
  737. ignore_assert = true;
  738. goto fail;
  739. }
  740. }
  741. ret = wlfw_cap_send_sync_msg(priv);
  742. if (ret < 0) {
  743. ignore_assert = true;
  744. goto fail;
  745. }
  746. ret = icnss_hw_power_on(priv);
  747. if (ret)
  748. goto fail;
  749. if (priv->device_id == WCN6750_DEVICE_ID) {
  750. ret = wlfw_device_info_send_msg(priv);
  751. if (ret < 0) {
  752. ignore_assert = true;
  753. goto device_info_failure;
  754. }
  755. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  756. priv->mem_base_pa,
  757. priv->mem_base_size);
  758. if (!priv->mem_base_va) {
  759. icnss_pr_err("Ioremap failed for bar address\n");
  760. goto device_info_failure;
  761. }
  762. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  763. &priv->mem_base_pa,
  764. priv->mem_base_va);
  765. if (priv->mhi_state_info_pa)
  766. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  767. priv->mhi_state_info_pa,
  768. PAGE_SIZE);
  769. if (!priv->mhi_state_info_va)
  770. icnss_pr_err("Ioremap failed for MHI info address\n");
  771. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  772. &priv->mhi_state_info_pa,
  773. priv->mhi_state_info_va);
  774. }
  775. if (priv->bdf_download_support) {
  776. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  777. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  778. priv->ctrl_params.bdf_type);
  779. if (ret < 0)
  780. goto device_info_failure;
  781. }
  782. if (priv->device_id == WCN6750_DEVICE_ID) {
  783. if (!priv->fw_soc_wake_ack_irq)
  784. register_soc_wake_notif(&priv->pdev->dev);
  785. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  786. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  787. }
  788. if (priv->wpss_supported)
  789. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  790. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  791. if (priv->bdf_download_support) {
  792. ret = wlfw_cal_report_req(priv);
  793. if (ret < 0)
  794. goto device_info_failure;
  795. }
  796. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  797. dynamic_feature_mask);
  798. }
  799. if (!priv->fw_error_fatal_irq)
  800. register_fw_error_notifications(&priv->pdev->dev);
  801. if (!priv->fw_early_crash_irq)
  802. register_early_crash_notifications(&priv->pdev->dev);
  803. if (priv->psf_supported)
  804. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  805. return ret;
  806. device_info_failure:
  807. icnss_hw_power_off(priv);
  808. fail:
  809. ICNSS_ASSERT(ignore_assert);
  810. qmi_registered:
  811. return ret;
  812. }
  813. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  814. {
  815. if (!priv)
  816. return -ENODEV;
  817. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  818. icnss_clear_server(priv);
  819. if (priv->psf_supported)
  820. priv->last_updated_voltage = 0;
  821. return 0;
  822. }
  823. static int icnss_call_driver_probe(struct icnss_priv *priv)
  824. {
  825. int ret = 0;
  826. int probe_cnt = 0;
  827. if (!priv->ops || !priv->ops->probe)
  828. return 0;
  829. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  830. return -EINVAL;
  831. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  832. icnss_hw_power_on(priv);
  833. icnss_block_shutdown(true);
  834. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  835. ret = priv->ops->probe(&priv->pdev->dev);
  836. probe_cnt++;
  837. if (ret != -EPROBE_DEFER)
  838. break;
  839. }
  840. if (ret < 0) {
  841. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  842. ret, priv->state, probe_cnt);
  843. icnss_block_shutdown(false);
  844. goto out;
  845. }
  846. icnss_block_shutdown(false);
  847. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  848. return 0;
  849. out:
  850. icnss_hw_power_off(priv);
  851. return ret;
  852. }
  853. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  854. {
  855. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  856. goto out;
  857. if (!priv->ops || !priv->ops->shutdown)
  858. goto out;
  859. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  860. goto out;
  861. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  862. priv->ops->shutdown(&priv->pdev->dev);
  863. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  864. out:
  865. return 0;
  866. }
  867. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  868. {
  869. int ret = 0;
  870. icnss_pm_relax(priv);
  871. icnss_call_driver_shutdown(priv);
  872. clear_bit(ICNSS_PDR, &priv->state);
  873. clear_bit(ICNSS_REJUVENATE, &priv->state);
  874. clear_bit(ICNSS_PD_RESTART, &priv->state);
  875. priv->early_crash_ind = false;
  876. priv->is_ssr = false;
  877. if (!priv->ops || !priv->ops->reinit)
  878. goto out;
  879. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  880. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  881. priv->state);
  882. goto out;
  883. }
  884. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  885. goto call_probe;
  886. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  887. icnss_hw_power_on(priv);
  888. icnss_block_shutdown(true);
  889. ret = priv->ops->reinit(&priv->pdev->dev);
  890. if (ret < 0) {
  891. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  892. ret, priv->state);
  893. if (!priv->allow_recursive_recovery)
  894. ICNSS_ASSERT(false);
  895. icnss_block_shutdown(false);
  896. goto out_power_off;
  897. }
  898. icnss_block_shutdown(false);
  899. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  900. return 0;
  901. call_probe:
  902. return icnss_call_driver_probe(priv);
  903. out_power_off:
  904. icnss_hw_power_off(priv);
  905. out:
  906. return ret;
  907. }
  908. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  909. {
  910. int ret = 0;
  911. if (!priv)
  912. return -ENODEV;
  913. set_bit(ICNSS_FW_READY, &priv->state);
  914. clear_bit(ICNSS_MODE_ON, &priv->state);
  915. atomic_set(&priv->soc_wake_ref_count, 0);
  916. if (priv->device_id == WCN6750_DEVICE_ID)
  917. icnss_free_qdss_mem(priv);
  918. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  919. icnss_hw_power_off(priv);
  920. if (!priv->pdev) {
  921. icnss_pr_err("Device is not ready\n");
  922. ret = -ENODEV;
  923. goto out;
  924. }
  925. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state)) {
  926. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  927. icnss_pr_info("sent wlan boot complete command\n");
  928. }
  929. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  930. ret = icnss_pd_restart_complete(priv);
  931. } else {
  932. if (priv->wpss_supported)
  933. icnss_setup_dms_mac(priv);
  934. ret = icnss_call_driver_probe(priv);
  935. }
  936. icnss_vreg_unvote(priv);
  937. out:
  938. return ret;
  939. }
  940. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  941. {
  942. int ret = 0;
  943. if (!priv)
  944. return -ENODEV;
  945. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  946. if (icnss_wlfw_qdss_dnld_send_sync(priv))
  947. icnss_pr_info("Failed to download qdss configuration file");
  948. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state))
  949. ret = wlfw_wlan_mode_send_sync_msg(priv,
  950. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  951. else
  952. icnss_driver_event_fw_ready_ind(priv, NULL);
  953. return ret;
  954. }
  955. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  956. {
  957. struct platform_device *pdev = priv->pdev;
  958. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  959. int i, j;
  960. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  961. if (!qdss_mem[i].va && qdss_mem[i].size) {
  962. qdss_mem[i].va =
  963. dma_alloc_coherent(&pdev->dev,
  964. qdss_mem[i].size,
  965. &qdss_mem[i].pa,
  966. GFP_KERNEL);
  967. if (!qdss_mem[i].va) {
  968. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  969. qdss_mem[i].size,
  970. qdss_mem[i].type, i);
  971. break;
  972. }
  973. }
  974. }
  975. /* Best-effort allocation for QDSS trace */
  976. if (i < priv->qdss_mem_seg_len) {
  977. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  978. qdss_mem[j].type = 0;
  979. qdss_mem[j].size = 0;
  980. }
  981. priv->qdss_mem_seg_len = i;
  982. }
  983. return 0;
  984. }
  985. void icnss_free_qdss_mem(struct icnss_priv *priv)
  986. {
  987. struct platform_device *pdev = priv->pdev;
  988. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  989. int i;
  990. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  991. if (qdss_mem[i].va && qdss_mem[i].size) {
  992. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  993. &qdss_mem[i].pa, qdss_mem[i].size,
  994. qdss_mem[i].type);
  995. dma_free_coherent(&pdev->dev,
  996. qdss_mem[i].size, qdss_mem[i].va,
  997. qdss_mem[i].pa);
  998. qdss_mem[i].va = NULL;
  999. qdss_mem[i].pa = 0;
  1000. qdss_mem[i].size = 0;
  1001. qdss_mem[i].type = 0;
  1002. }
  1003. }
  1004. priv->qdss_mem_seg_len = 0;
  1005. }
  1006. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1007. {
  1008. int ret = 0;
  1009. ret = icnss_alloc_qdss_mem(priv);
  1010. if (ret < 0)
  1011. return ret;
  1012. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1013. }
  1014. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1015. u64 pa, u32 size, int *seg_id)
  1016. {
  1017. int i = 0;
  1018. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1019. u64 offset = 0;
  1020. void *va = NULL;
  1021. u64 local_pa;
  1022. u32 local_size;
  1023. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1024. local_pa = (u64)qdss_mem[i].pa;
  1025. local_size = (u32)qdss_mem[i].size;
  1026. if (pa == local_pa && size <= local_size) {
  1027. va = qdss_mem[i].va;
  1028. break;
  1029. }
  1030. if (pa > local_pa &&
  1031. pa < local_pa + local_size &&
  1032. pa + size <= local_pa + local_size) {
  1033. offset = pa - local_pa;
  1034. va = qdss_mem[i].va + offset;
  1035. break;
  1036. }
  1037. }
  1038. *seg_id = i;
  1039. return va;
  1040. }
  1041. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1042. void *data)
  1043. {
  1044. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1045. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1046. int ret = 0;
  1047. int i;
  1048. void *va = NULL;
  1049. u64 pa;
  1050. u32 size;
  1051. int seg_id = 0;
  1052. if (!priv->qdss_mem_seg_len) {
  1053. icnss_pr_err("Memory for QDSS trace is not available\n");
  1054. return -ENOMEM;
  1055. }
  1056. if (event_data->mem_seg_len == 0) {
  1057. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1058. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1059. ICNSS_GENL_MSG_TYPE_QDSS,
  1060. event_data->file_name,
  1061. qdss_mem[i].size);
  1062. if (ret < 0) {
  1063. icnss_pr_err("Fail to save QDSS data: %d\n",
  1064. ret);
  1065. break;
  1066. }
  1067. }
  1068. } else {
  1069. for (i = 0; i < event_data->mem_seg_len; i++) {
  1070. pa = event_data->mem_seg[i].addr;
  1071. size = event_data->mem_seg[i].size;
  1072. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1073. size, &seg_id);
  1074. if (!va) {
  1075. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1076. &pa);
  1077. ret = -EINVAL;
  1078. break;
  1079. }
  1080. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1081. event_data->file_name, size);
  1082. if (ret < 0) {
  1083. icnss_pr_err("Fail to save QDSS data: %d\n",
  1084. ret);
  1085. break;
  1086. }
  1087. }
  1088. }
  1089. kfree(data);
  1090. return ret;
  1091. }
  1092. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1093. {
  1094. int dec, c = atomic_read(v);
  1095. do {
  1096. dec = c - 1;
  1097. if (unlikely(dec < 1))
  1098. break;
  1099. } while (!atomic_try_cmpxchg(v, &c, dec));
  1100. return dec;
  1101. }
  1102. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1103. void *data)
  1104. {
  1105. int ret = 0;
  1106. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1107. if (!priv)
  1108. return -ENODEV;
  1109. if (!data)
  1110. return -EINVAL;
  1111. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1112. event_data->total_size);
  1113. kfree(data);
  1114. return ret;
  1115. }
  1116. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1117. {
  1118. int ret = 0;
  1119. if (!priv)
  1120. return -ENODEV;
  1121. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1122. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1123. atomic_read(&priv->soc_wake_ref_count));
  1124. return 0;
  1125. }
  1126. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1127. ICNSS_SMP2P_OUT_SOC_WAKE);
  1128. if (!ret)
  1129. atomic_inc(&priv->soc_wake_ref_count);
  1130. return ret;
  1131. }
  1132. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1133. {
  1134. int ret = 0;
  1135. if (!priv)
  1136. return -ENODEV;
  1137. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1138. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1139. priv->soc_wake_ref_count);
  1140. return 0;
  1141. }
  1142. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1143. ICNSS_SMP2P_OUT_SOC_WAKE);
  1144. return ret;
  1145. }
  1146. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1147. void *data)
  1148. {
  1149. int ret = 0;
  1150. int probe_cnt = 0;
  1151. if (priv->ops)
  1152. return -EEXIST;
  1153. priv->ops = data;
  1154. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1155. set_bit(ICNSS_FW_READY, &priv->state);
  1156. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1157. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1158. priv->state);
  1159. return -ENODEV;
  1160. }
  1161. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1162. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1163. priv->state);
  1164. goto out;
  1165. }
  1166. ret = icnss_hw_power_on(priv);
  1167. if (ret)
  1168. goto out;
  1169. icnss_block_shutdown(true);
  1170. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1171. ret = priv->ops->probe(&priv->pdev->dev);
  1172. probe_cnt++;
  1173. if (ret != -EPROBE_DEFER)
  1174. break;
  1175. }
  1176. if (ret) {
  1177. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1178. ret, priv->state, probe_cnt);
  1179. icnss_block_shutdown(false);
  1180. goto power_off;
  1181. }
  1182. icnss_block_shutdown(false);
  1183. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1184. return 0;
  1185. power_off:
  1186. icnss_hw_power_off(priv);
  1187. out:
  1188. return ret;
  1189. }
  1190. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1191. void *data)
  1192. {
  1193. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1194. priv->ops = NULL;
  1195. goto out;
  1196. }
  1197. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1198. icnss_block_shutdown(true);
  1199. if (priv->ops)
  1200. priv->ops->remove(&priv->pdev->dev);
  1201. icnss_block_shutdown(false);
  1202. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1203. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1204. priv->ops = NULL;
  1205. icnss_hw_power_off(priv);
  1206. out:
  1207. return 0;
  1208. }
  1209. static int icnss_fw_crashed(struct icnss_priv *priv,
  1210. struct icnss_event_pd_service_down_data *event_data)
  1211. {
  1212. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1213. set_bit(ICNSS_PD_RESTART, &priv->state);
  1214. clear_bit(ICNSS_FW_READY, &priv->state);
  1215. icnss_pm_stay_awake(priv);
  1216. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  1217. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_CRASHED, NULL);
  1218. if (event_data && event_data->fw_rejuvenate)
  1219. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1220. return 0;
  1221. }
  1222. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1223. struct icnss_uevent_hang_data *hang_data)
  1224. {
  1225. if (!priv->hang_event_data_va)
  1226. return -EINVAL;
  1227. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1228. priv->hang_event_data_len,
  1229. GFP_ATOMIC);
  1230. if (!priv->hang_event_data)
  1231. return -ENOMEM;
  1232. // Update the hang event params
  1233. hang_data->hang_event_data = priv->hang_event_data;
  1234. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1235. return 0;
  1236. }
  1237. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1238. {
  1239. struct icnss_uevent_hang_data hang_data = {0};
  1240. int ret = 0xFF;
  1241. if (priv->early_crash_ind) {
  1242. ret = icnss_update_hang_event_data(priv, &hang_data);
  1243. if (ret)
  1244. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1245. }
  1246. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1247. &hang_data);
  1248. if (!ret) {
  1249. kfree(priv->hang_event_data);
  1250. priv->hang_event_data = NULL;
  1251. }
  1252. return 0;
  1253. }
  1254. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1255. void *data)
  1256. {
  1257. struct icnss_event_pd_service_down_data *event_data = data;
  1258. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1259. icnss_ignore_fw_timeout(false);
  1260. goto out;
  1261. }
  1262. if (priv->force_err_fatal)
  1263. ICNSS_ASSERT(0);
  1264. if (priv->device_id == WCN6750_DEVICE_ID) {
  1265. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1266. ICNSS_SMP2P_OUT_SOC_WAKE);
  1267. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1268. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1269. }
  1270. if (priv->wpss_supported)
  1271. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1272. ICNSS_SMP2P_OUT_POWER_SAVE);
  1273. icnss_send_hang_event_data(priv);
  1274. if (priv->early_crash_ind) {
  1275. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1276. event_data->crashed, priv->state);
  1277. goto out;
  1278. }
  1279. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1280. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1281. event_data->crashed, priv->state);
  1282. if (!priv->allow_recursive_recovery)
  1283. ICNSS_ASSERT(0);
  1284. goto out;
  1285. }
  1286. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1287. icnss_fw_crashed(priv, event_data);
  1288. out:
  1289. kfree(data);
  1290. return 0;
  1291. }
  1292. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1293. void *data)
  1294. {
  1295. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1296. icnss_ignore_fw_timeout(false);
  1297. goto out;
  1298. }
  1299. priv->early_crash_ind = true;
  1300. icnss_fw_crashed(priv, NULL);
  1301. out:
  1302. kfree(data);
  1303. return 0;
  1304. }
  1305. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1306. void *data)
  1307. {
  1308. int ret = 0;
  1309. if (!priv->ops || !priv->ops->idle_shutdown)
  1310. return 0;
  1311. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1312. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1313. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1314. ret = -EBUSY;
  1315. } else {
  1316. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1317. priv->state);
  1318. icnss_block_shutdown(true);
  1319. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1320. icnss_block_shutdown(false);
  1321. }
  1322. return ret;
  1323. }
  1324. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1325. void *data)
  1326. {
  1327. int ret = 0;
  1328. if (!priv->ops || !priv->ops->idle_restart)
  1329. return 0;
  1330. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1331. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1332. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1333. ret = -EBUSY;
  1334. } else {
  1335. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1336. priv->state);
  1337. icnss_block_shutdown(true);
  1338. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1339. icnss_block_shutdown(false);
  1340. }
  1341. return ret;
  1342. }
  1343. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1344. {
  1345. icnss_free_qdss_mem(priv);
  1346. return 0;
  1347. }
  1348. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1349. void *data)
  1350. {
  1351. struct icnss_m3_upload_segments_req_data *event_data = data;
  1352. struct qcom_dump_segment segment;
  1353. int i, status = 0, ret = 0;
  1354. struct list_head head;
  1355. if (!dump_enabled()) {
  1356. icnss_pr_info("Dump collection is not enabled\n");
  1357. return ret;
  1358. }
  1359. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1360. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1361. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1362. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1363. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1364. return ret;
  1365. INIT_LIST_HEAD(&head);
  1366. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1367. memset(&segment, 0, sizeof(segment));
  1368. segment.va = devm_ioremap(&priv->pdev->dev,
  1369. event_data->m3_segment[i].addr,
  1370. event_data->m3_segment[i].size);
  1371. if (!segment.va) {
  1372. icnss_pr_err("Failed to ioremap M3 Dump region");
  1373. ret = -ENOMEM;
  1374. goto send_resp;
  1375. }
  1376. segment.size = event_data->m3_segment[i].size;
  1377. list_add(&segment.node, &head);
  1378. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1379. event_data->m3_segment[i].name);
  1380. switch (event_data->m3_segment[i].type) {
  1381. case QMI_M3_SEGMENT_PHYAREG_V01:
  1382. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1383. break;
  1384. case QMI_M3_SEGMENT_PHYDBG_V01:
  1385. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1386. break;
  1387. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1388. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1389. break;
  1390. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1391. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1392. break;
  1393. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1394. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1395. break;
  1396. default:
  1397. icnss_pr_err("Invalid Segment type: %d",
  1398. event_data->m3_segment[i].type);
  1399. }
  1400. if (ret) {
  1401. status = ret;
  1402. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1403. event_data->m3_segment[i].name, ret);
  1404. }
  1405. list_del(&segment.node);
  1406. }
  1407. send_resp:
  1408. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1409. status);
  1410. return ret;
  1411. }
  1412. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1413. {
  1414. int ret = 0;
  1415. struct icnss_subsys_restart_level_data *event_data = data;
  1416. if (!priv)
  1417. return -ENODEV;
  1418. if (!data)
  1419. return -EINVAL;
  1420. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1421. kfree(data);
  1422. return ret;
  1423. }
  1424. static void icnss_driver_event_work(struct work_struct *work)
  1425. {
  1426. struct icnss_priv *priv =
  1427. container_of(work, struct icnss_priv, event_work);
  1428. struct icnss_driver_event *event;
  1429. unsigned long flags;
  1430. int ret;
  1431. icnss_pm_stay_awake(priv);
  1432. spin_lock_irqsave(&priv->event_lock, flags);
  1433. while (!list_empty(&priv->event_list)) {
  1434. event = list_first_entry(&priv->event_list,
  1435. struct icnss_driver_event, list);
  1436. list_del(&event->list);
  1437. spin_unlock_irqrestore(&priv->event_lock, flags);
  1438. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1439. icnss_driver_event_to_str(event->type),
  1440. event->sync ? "-sync" : "", event->type,
  1441. priv->state);
  1442. switch (event->type) {
  1443. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1444. ret = icnss_driver_event_server_arrive(priv,
  1445. event->data);
  1446. break;
  1447. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1448. ret = icnss_driver_event_server_exit(priv);
  1449. break;
  1450. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1451. ret = icnss_driver_event_fw_ready_ind(priv,
  1452. event->data);
  1453. break;
  1454. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1455. ret = icnss_driver_event_register_driver(priv,
  1456. event->data);
  1457. break;
  1458. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1459. ret = icnss_driver_event_unregister_driver(priv,
  1460. event->data);
  1461. break;
  1462. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1463. ret = icnss_driver_event_pd_service_down(priv,
  1464. event->data);
  1465. break;
  1466. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1467. ret = icnss_driver_event_early_crash_ind(priv,
  1468. event->data);
  1469. break;
  1470. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1471. ret = icnss_driver_event_idle_shutdown(priv,
  1472. event->data);
  1473. break;
  1474. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1475. ret = icnss_driver_event_idle_restart(priv,
  1476. event->data);
  1477. break;
  1478. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1479. ret = icnss_driver_event_fw_init_done(priv,
  1480. event->data);
  1481. break;
  1482. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1483. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1484. break;
  1485. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1486. ret = icnss_qdss_trace_save_hdlr(priv,
  1487. event->data);
  1488. break;
  1489. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1490. ret = icnss_qdss_trace_free_hdlr(priv);
  1491. break;
  1492. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1493. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1494. break;
  1495. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1496. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1497. event->data);
  1498. break;
  1499. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1500. ret = icnss_subsys_restart_level(priv, event->data);
  1501. break;
  1502. default:
  1503. icnss_pr_err("Invalid Event type: %d", event->type);
  1504. kfree(event);
  1505. continue;
  1506. }
  1507. priv->stats.events[event->type].processed++;
  1508. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1509. icnss_driver_event_to_str(event->type),
  1510. event->sync ? "-sync" : "", event->type, ret,
  1511. priv->state);
  1512. spin_lock_irqsave(&priv->event_lock, flags);
  1513. if (event->sync) {
  1514. event->ret = ret;
  1515. complete(&event->complete);
  1516. continue;
  1517. }
  1518. spin_unlock_irqrestore(&priv->event_lock, flags);
  1519. kfree(event);
  1520. spin_lock_irqsave(&priv->event_lock, flags);
  1521. }
  1522. spin_unlock_irqrestore(&priv->event_lock, flags);
  1523. icnss_pm_relax(priv);
  1524. }
  1525. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1526. {
  1527. struct icnss_priv *priv =
  1528. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1529. struct icnss_soc_wake_event *event;
  1530. unsigned long flags;
  1531. int ret;
  1532. icnss_pm_stay_awake(priv);
  1533. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1534. while (!list_empty(&priv->soc_wake_msg_list)) {
  1535. event = list_first_entry(&priv->soc_wake_msg_list,
  1536. struct icnss_soc_wake_event, list);
  1537. list_del(&event->list);
  1538. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1539. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1540. icnss_soc_wake_event_to_str(event->type),
  1541. event->sync ? "-sync" : "", event->type,
  1542. priv->state);
  1543. switch (event->type) {
  1544. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1545. ret = icnss_event_soc_wake_request(priv,
  1546. event->data);
  1547. break;
  1548. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1549. ret = icnss_event_soc_wake_release(priv,
  1550. event->data);
  1551. break;
  1552. default:
  1553. icnss_pr_err("Invalid Event type: %d", event->type);
  1554. kfree(event);
  1555. continue;
  1556. }
  1557. priv->stats.soc_wake_events[event->type].processed++;
  1558. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1559. icnss_soc_wake_event_to_str(event->type),
  1560. event->sync ? "-sync" : "", event->type, ret,
  1561. priv->state);
  1562. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1563. if (event->sync) {
  1564. event->ret = ret;
  1565. complete(&event->complete);
  1566. continue;
  1567. }
  1568. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1569. kfree(event);
  1570. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1571. }
  1572. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1573. icnss_pm_relax(priv);
  1574. }
  1575. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1576. {
  1577. int ret = 0;
  1578. struct qcom_dump_segment segment;
  1579. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1580. struct list_head head;
  1581. if (!dump_enabled()) {
  1582. icnss_pr_info("Dump collection is not enabled\n");
  1583. return ret;
  1584. }
  1585. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1586. return ret;
  1587. INIT_LIST_HEAD(&head);
  1588. memset(&segment, 0, sizeof(segment));
  1589. segment.va = priv->msa_va;
  1590. segment.size = priv->msa_mem_size;
  1591. list_add(&segment.node, &head);
  1592. if (!msa0_dump_dev->dev) {
  1593. icnss_pr_err("Created Dump Device not found\n");
  1594. return 0;
  1595. }
  1596. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1597. if (ret) {
  1598. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1599. return ret;
  1600. }
  1601. list_del(&segment.node);
  1602. return ret;
  1603. }
  1604. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1605. void *data)
  1606. {
  1607. struct qcom_ssr_notify_data *notif = data;
  1608. int ret = 0;
  1609. if (!notif->crashed) {
  1610. if (atomic_read(&priv->is_shutdown)) {
  1611. atomic_set(&priv->is_shutdown, false);
  1612. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1613. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1614. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1615. clear_bit(ICNSS_FW_READY, &priv->state);
  1616. icnss_driver_event_post(priv,
  1617. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1618. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1619. NULL);
  1620. }
  1621. }
  1622. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1623. if (!wait_for_completion_timeout(
  1624. &priv->unblock_shutdown,
  1625. msecs_to_jiffies(PROBE_TIMEOUT)))
  1626. icnss_pr_err("modem block shutdown timeout\n");
  1627. }
  1628. ret = wlfw_send_modem_shutdown_msg(priv);
  1629. if (ret < 0)
  1630. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1631. ret);
  1632. }
  1633. }
  1634. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1635. {
  1636. switch (code) {
  1637. case QCOM_SSR_BEFORE_POWERUP:
  1638. return "BEFORE_POWERUP";
  1639. case QCOM_SSR_AFTER_POWERUP:
  1640. return "AFTER_POWERUP";
  1641. case QCOM_SSR_BEFORE_SHUTDOWN:
  1642. return "BEFORE_SHUTDOWN";
  1643. case QCOM_SSR_AFTER_SHUTDOWN:
  1644. return "AFTER_SHUTDOWN";
  1645. default:
  1646. return "UNKNOWN";
  1647. }
  1648. };
  1649. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1650. unsigned long code,
  1651. void *data)
  1652. {
  1653. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1654. wpss_early_ssr_nb);
  1655. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1656. icnss_qcom_ssr_notify_state_to_str(code), code);
  1657. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1658. set_bit(ICNSS_FW_DOWN, &priv->state);
  1659. icnss_ignore_fw_timeout(true);
  1660. }
  1661. return NOTIFY_DONE;
  1662. }
  1663. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1664. unsigned long code,
  1665. void *data)
  1666. {
  1667. struct icnss_event_pd_service_down_data *event_data;
  1668. struct qcom_ssr_notify_data *notif = data;
  1669. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1670. wpss_ssr_nb);
  1671. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1672. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1673. icnss_qcom_ssr_notify_state_to_str(code), code);
  1674. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1675. icnss_pr_info("Collecting msa0 segment dump\n");
  1676. icnss_msa0_ramdump(priv);
  1677. goto out;
  1678. }
  1679. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1680. goto out;
  1681. priv->is_ssr = true;
  1682. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1683. priv->state, notif->crashed);
  1684. set_bit(ICNSS_FW_DOWN, &priv->state);
  1685. if (notif->crashed)
  1686. priv->stats.recovery.root_pd_crash++;
  1687. else
  1688. priv->stats.recovery.root_pd_shutdown++;
  1689. icnss_ignore_fw_timeout(true);
  1690. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1691. if (event_data == NULL)
  1692. return notifier_from_errno(-ENOMEM);
  1693. event_data->crashed = notif->crashed;
  1694. fw_down_data.crashed = !!notif->crashed;
  1695. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1696. clear_bit(ICNSS_FW_READY, &priv->state);
  1697. fw_down_data.crashed = !!notif->crashed;
  1698. icnss_call_driver_uevent(priv,
  1699. ICNSS_UEVENT_FW_DOWN,
  1700. &fw_down_data);
  1701. }
  1702. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1703. ICNSS_EVENT_SYNC, event_data);
  1704. out:
  1705. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1706. return NOTIFY_OK;
  1707. }
  1708. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1709. unsigned long code,
  1710. void *data)
  1711. {
  1712. struct icnss_event_pd_service_down_data *event_data;
  1713. struct qcom_ssr_notify_data *notif = data;
  1714. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1715. modem_ssr_nb);
  1716. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1717. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1718. icnss_qcom_ssr_notify_state_to_str(code), code);
  1719. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1720. icnss_pr_info("Collecting msa0 segment dump\n");
  1721. icnss_msa0_ramdump(priv);
  1722. goto out;
  1723. }
  1724. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1725. goto out;
  1726. priv->is_ssr = true;
  1727. if (notif->crashed) {
  1728. priv->stats.recovery.root_pd_crash++;
  1729. priv->root_pd_shutdown = false;
  1730. } else {
  1731. priv->stats.recovery.root_pd_shutdown++;
  1732. priv->root_pd_shutdown = true;
  1733. }
  1734. icnss_update_state_send_modem_shutdown(priv, data);
  1735. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1736. set_bit(ICNSS_FW_DOWN, &priv->state);
  1737. icnss_ignore_fw_timeout(true);
  1738. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1739. clear_bit(ICNSS_FW_READY, &priv->state);
  1740. fw_down_data.crashed = !!notif->crashed;
  1741. icnss_call_driver_uevent(priv,
  1742. ICNSS_UEVENT_FW_DOWN,
  1743. &fw_down_data);
  1744. }
  1745. goto out;
  1746. }
  1747. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1748. priv->state, notif->crashed);
  1749. set_bit(ICNSS_FW_DOWN, &priv->state);
  1750. icnss_ignore_fw_timeout(true);
  1751. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1752. if (event_data == NULL)
  1753. return notifier_from_errno(-ENOMEM);
  1754. event_data->crashed = notif->crashed;
  1755. fw_down_data.crashed = !!notif->crashed;
  1756. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1757. clear_bit(ICNSS_FW_READY, &priv->state);
  1758. fw_down_data.crashed = !!notif->crashed;
  1759. icnss_call_driver_uevent(priv,
  1760. ICNSS_UEVENT_FW_DOWN,
  1761. &fw_down_data);
  1762. }
  1763. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1764. ICNSS_EVENT_SYNC, event_data);
  1765. out:
  1766. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1767. return NOTIFY_OK;
  1768. }
  1769. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1770. {
  1771. int ret = 0;
  1772. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1773. priv->wpss_early_notify_handler =
  1774. qcom_register_early_ssr_notifier("wpss",
  1775. &priv->wpss_early_ssr_nb);
  1776. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1777. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1778. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1779. }
  1780. return ret;
  1781. }
  1782. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1783. {
  1784. int ret = 0;
  1785. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1786. /*
  1787. * Assign priority of icnss wpss notifier callback over IPA
  1788. * modem notifier callback which is 0
  1789. */
  1790. priv->wpss_ssr_nb.priority = 1;
  1791. priv->wpss_notify_handler =
  1792. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1793. if (IS_ERR(priv->wpss_notify_handler)) {
  1794. ret = PTR_ERR(priv->wpss_notify_handler);
  1795. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1796. }
  1797. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1798. return ret;
  1799. }
  1800. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1801. unsigned long code,
  1802. void *data)
  1803. {
  1804. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1805. slate_ssr_nb);
  1806. int ret = 0;
  1807. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  1808. if (code == QCOM_SSR_AFTER_POWERUP) {
  1809. set_bit(ICNSS_SLATE_UP, &priv->state);
  1810. complete(&priv->slate_boot_complete);
  1811. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  1812. priv->state);
  1813. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  1814. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  1815. clear_bit(ICNSS_SLATE_UP, &priv->state);
  1816. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1817. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  1818. priv->state);
  1819. goto skip_pdr;
  1820. }
  1821. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  1822. ret = icnss_trigger_recovery(&priv->pdev->dev);
  1823. if (ret < 0) {
  1824. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  1825. ret, priv->state);
  1826. goto skip_pdr;
  1827. }
  1828. }
  1829. skip_pdr:
  1830. return NOTIFY_OK;
  1831. }
  1832. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  1833. {
  1834. int ret = 0;
  1835. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  1836. priv->slate_notify_handler =
  1837. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  1838. if (IS_ERR(priv->slate_notify_handler)) {
  1839. ret = PTR_ERR(priv->slate_notify_handler);
  1840. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  1841. }
  1842. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  1843. return ret;
  1844. }
  1845. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  1846. {
  1847. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  1848. return 0;
  1849. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  1850. &priv->slate_ssr_nb);
  1851. priv->slate_notify_handler = NULL;
  1852. return 0;
  1853. }
  1854. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  1855. {
  1856. int ret = 0;
  1857. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  1858. /*
  1859. * Assign priority of icnss modem notifier callback over IPA
  1860. * modem notifier callback which is 0
  1861. */
  1862. priv->modem_ssr_nb.priority = 1;
  1863. priv->modem_notify_handler =
  1864. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  1865. if (IS_ERR(priv->modem_notify_handler)) {
  1866. ret = PTR_ERR(priv->modem_notify_handler);
  1867. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  1868. }
  1869. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1870. return ret;
  1871. }
  1872. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  1873. {
  1874. if (IS_ERR(priv->wpss_early_notify_handler))
  1875. return;
  1876. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  1877. &priv->wpss_early_ssr_nb);
  1878. priv->wpss_early_notify_handler = NULL;
  1879. }
  1880. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  1881. {
  1882. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1883. return 0;
  1884. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  1885. &priv->wpss_ssr_nb);
  1886. priv->wpss_notify_handler = NULL;
  1887. return 0;
  1888. }
  1889. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  1890. {
  1891. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  1892. return 0;
  1893. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  1894. &priv->modem_ssr_nb);
  1895. priv->modem_notify_handler = NULL;
  1896. return 0;
  1897. }
  1898. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  1899. {
  1900. struct icnss_priv *priv = priv_cb;
  1901. struct icnss_event_pd_service_down_data *event_data;
  1902. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1903. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  1904. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  1905. state, priv->state);
  1906. switch (state) {
  1907. case SERVREG_SERVICE_STATE_DOWN:
  1908. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1909. if (!event_data)
  1910. return;
  1911. event_data->crashed = true;
  1912. if (!priv->is_ssr) {
  1913. set_bit(ICNSS_PDR, &penv->state);
  1914. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  1915. cause = ICNSS_HOST_ERROR;
  1916. priv->stats.recovery.pdr_host_error++;
  1917. } else {
  1918. cause = ICNSS_FW_CRASH;
  1919. priv->stats.recovery.pdr_fw_crash++;
  1920. }
  1921. } else if (priv->root_pd_shutdown) {
  1922. cause = ICNSS_ROOT_PD_SHUTDOWN;
  1923. event_data->crashed = false;
  1924. }
  1925. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  1926. priv->state, icnss_pdr_cause[cause]);
  1927. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1928. set_bit(ICNSS_FW_DOWN, &priv->state);
  1929. icnss_ignore_fw_timeout(true);
  1930. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1931. clear_bit(ICNSS_FW_READY, &priv->state);
  1932. fw_down_data.crashed = event_data->crashed;
  1933. icnss_call_driver_uevent(priv,
  1934. ICNSS_UEVENT_FW_DOWN,
  1935. &fw_down_data);
  1936. }
  1937. }
  1938. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  1939. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1940. ICNSS_EVENT_SYNC, event_data);
  1941. break;
  1942. case SERVREG_SERVICE_STATE_UP:
  1943. clear_bit(ICNSS_FW_DOWN, &priv->state);
  1944. break;
  1945. default:
  1946. break;
  1947. }
  1948. return;
  1949. }
  1950. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  1951. {
  1952. struct pdr_handle *handle = NULL;
  1953. struct pdr_service *service = NULL;
  1954. int err = 0;
  1955. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  1956. if (IS_ERR_OR_NULL(handle)) {
  1957. err = PTR_ERR(handle);
  1958. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  1959. goto out;
  1960. }
  1961. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  1962. if (IS_ERR_OR_NULL(service)) {
  1963. err = PTR_ERR(service);
  1964. icnss_pr_err("Failed to add lookup, err %d", err);
  1965. goto out;
  1966. }
  1967. priv->pdr_handle = handle;
  1968. priv->pdr_service = service;
  1969. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  1970. icnss_pr_info("PDR registration happened");
  1971. out:
  1972. return err;
  1973. }
  1974. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  1975. {
  1976. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  1977. return;
  1978. pdr_handle_release(priv->pdr_handle);
  1979. }
  1980. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  1981. {
  1982. int ret = 0;
  1983. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  1984. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  1985. ret = PTR_ERR(priv->icnss_ramdump_class);
  1986. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  1987. return ret;
  1988. }
  1989. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  1990. ICNSS_RAMDUMP_NAME);
  1991. if (ret < 0) {
  1992. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  1993. goto fail_alloc_major;
  1994. }
  1995. return 0;
  1996. fail_alloc_major:
  1997. class_destroy(priv->icnss_ramdump_class);
  1998. return ret;
  1999. }
  2000. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2001. {
  2002. int ret = 0;
  2003. struct icnss_ramdump_info *ramdump_info;
  2004. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2005. if (!ramdump_info)
  2006. return ERR_PTR(-ENOMEM);
  2007. if (!dev_name) {
  2008. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2009. return NULL;
  2010. }
  2011. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2012. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2013. if (ramdump_info->minor < 0) {
  2014. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2015. ramdump_info->minor);
  2016. ret = -ENODEV;
  2017. goto fail_out_of_minors;
  2018. }
  2019. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2020. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2021. ramdump_info->minor),
  2022. ramdump_info, ramdump_info->name);
  2023. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2024. ret = PTR_ERR(ramdump_info->dev);
  2025. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2026. ramdump_info->name, ret);
  2027. goto fail_device_create;
  2028. }
  2029. return (void *)ramdump_info;
  2030. fail_device_create:
  2031. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2032. fail_out_of_minors:
  2033. kfree(ramdump_info);
  2034. return ERR_PTR(ret);
  2035. }
  2036. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2037. {
  2038. int ret = 0;
  2039. if (!priv || !priv->pdev) {
  2040. icnss_pr_err("Platform priv or pdev is NULL\n");
  2041. return -EINVAL;
  2042. }
  2043. ret = icnss_ramdump_devnode_init(priv);
  2044. if (ret)
  2045. return ret;
  2046. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2047. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2048. icnss_pr_err("Failed to create msa0 dump device!");
  2049. return -ENOMEM;
  2050. }
  2051. if (priv->device_id == WCN6750_DEVICE_ID) {
  2052. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2053. ICNSS_M3_SEGMENT(
  2054. ICNSS_M3_SEGMENT_PHYAREG));
  2055. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2056. !priv->m3_dump_phyareg->dev) {
  2057. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2058. return -ENOMEM;
  2059. }
  2060. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2061. ICNSS_M3_SEGMENT(
  2062. ICNSS_M3_SEGMENT_PHYA));
  2063. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2064. !priv->m3_dump_phydbg->dev) {
  2065. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2066. return -ENOMEM;
  2067. }
  2068. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2069. ICNSS_M3_SEGMENT(
  2070. ICNSS_M3_SEGMENT_WMACREG));
  2071. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2072. !priv->m3_dump_wmac0reg->dev) {
  2073. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2074. return -ENOMEM;
  2075. }
  2076. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2077. ICNSS_M3_SEGMENT(
  2078. ICNSS_M3_SEGMENT_WCSSDBG));
  2079. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2080. !priv->m3_dump_wcssdbg->dev) {
  2081. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2082. return -ENOMEM;
  2083. }
  2084. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2085. ICNSS_M3_SEGMENT(
  2086. ICNSS_M3_SEGMENT_PHYAM3));
  2087. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2088. !priv->m3_dump_phyapdmem->dev) {
  2089. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2090. return -ENOMEM;
  2091. }
  2092. }
  2093. return 0;
  2094. }
  2095. static int icnss_enable_recovery(struct icnss_priv *priv)
  2096. {
  2097. int ret;
  2098. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2099. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2100. return 0;
  2101. }
  2102. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2103. icnss_pr_dbg("SSR disabled through module parameter\n");
  2104. goto enable_pdr;
  2105. }
  2106. ret = icnss_register_ramdump_devices(priv);
  2107. if (ret)
  2108. return ret;
  2109. if (priv->wpss_supported) {
  2110. icnss_wpss_early_ssr_register_notifier(priv);
  2111. icnss_wpss_ssr_register_notifier(priv);
  2112. return 0;
  2113. }
  2114. icnss_modem_ssr_register_notifier(priv);
  2115. if (priv->is_slate_rfa)
  2116. icnss_slate_ssr_register_notifier(priv);
  2117. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2118. icnss_pr_dbg("PDR disabled through module parameter\n");
  2119. return 0;
  2120. }
  2121. enable_pdr:
  2122. ret = icnss_pd_restart_enable(priv);
  2123. if (ret)
  2124. return ret;
  2125. return 0;
  2126. }
  2127. static int icnss_dev_id_match(struct icnss_priv *priv,
  2128. struct device_info *dev_info)
  2129. {
  2130. while (dev_info->device_id) {
  2131. if (priv->device_id == dev_info->device_id)
  2132. return 1;
  2133. dev_info++;
  2134. }
  2135. return 0;
  2136. }
  2137. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2138. unsigned long *thermal_state)
  2139. {
  2140. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2141. *thermal_state = icnss_tcdev->max_thermal_state;
  2142. return 0;
  2143. }
  2144. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2145. unsigned long *thermal_state)
  2146. {
  2147. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2148. *thermal_state = icnss_tcdev->curr_thermal_state;
  2149. return 0;
  2150. }
  2151. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2152. unsigned long thermal_state)
  2153. {
  2154. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2155. struct device *dev = &penv->pdev->dev;
  2156. int ret = 0;
  2157. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2158. return 0;
  2159. if (thermal_state > icnss_tcdev->max_thermal_state)
  2160. return -EINVAL;
  2161. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2162. thermal_state, icnss_tcdev->tcdev_id);
  2163. mutex_lock(&penv->tcdev_lock);
  2164. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2165. icnss_tcdev->tcdev_id);
  2166. if (!ret)
  2167. icnss_tcdev->curr_thermal_state = thermal_state;
  2168. mutex_unlock(&penv->tcdev_lock);
  2169. if (ret) {
  2170. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2171. ret, icnss_tcdev->tcdev_id);
  2172. return ret;
  2173. }
  2174. return 0;
  2175. }
  2176. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2177. .get_max_state = icnss_tcdev_get_max_state,
  2178. .get_cur_state = icnss_tcdev_get_cur_state,
  2179. .set_cur_state = icnss_tcdev_set_cur_state,
  2180. };
  2181. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2182. int tcdev_id)
  2183. {
  2184. struct icnss_priv *priv = dev_get_drvdata(dev);
  2185. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2186. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2187. struct device_node *dev_node;
  2188. int ret = 0;
  2189. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2190. if (!icnss_tcdev)
  2191. return -ENOMEM;
  2192. icnss_tcdev->tcdev_id = tcdev_id;
  2193. icnss_tcdev->max_thermal_state = max_state;
  2194. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2195. "qcom,icnss_cdev%d", tcdev_id);
  2196. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2197. if (!dev_node) {
  2198. icnss_pr_err("Failed to get cooling device node\n");
  2199. return -EINVAL;
  2200. }
  2201. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2202. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2203. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2204. dev_node,
  2205. cdev_node_name, icnss_tcdev,
  2206. &icnss_cooling_ops);
  2207. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2208. ret = PTR_ERR(icnss_tcdev->tcdev);
  2209. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2210. ret, icnss_tcdev->tcdev_id);
  2211. } else {
  2212. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2213. icnss_tcdev->tcdev_id);
  2214. list_add(&icnss_tcdev->tcdev_list,
  2215. &priv->icnss_tcdev_list);
  2216. }
  2217. } else {
  2218. icnss_pr_dbg("Cooling device registration not supported");
  2219. ret = -EOPNOTSUPP;
  2220. }
  2221. return ret;
  2222. }
  2223. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2224. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2225. {
  2226. struct icnss_priv *priv = dev_get_drvdata(dev);
  2227. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2228. while (!list_empty(&priv->icnss_tcdev_list)) {
  2229. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2230. struct icnss_thermal_cdev,
  2231. tcdev_list);
  2232. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2233. list_del(&icnss_tcdev->tcdev_list);
  2234. kfree(icnss_tcdev);
  2235. }
  2236. }
  2237. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2238. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2239. unsigned long *thermal_state,
  2240. int tcdev_id)
  2241. {
  2242. struct icnss_priv *priv = dev_get_drvdata(dev);
  2243. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2244. mutex_lock(&priv->tcdev_lock);
  2245. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2246. if (icnss_tcdev->tcdev_id != tcdev_id)
  2247. continue;
  2248. *thermal_state = icnss_tcdev->curr_thermal_state;
  2249. mutex_unlock(&priv->tcdev_lock);
  2250. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2251. icnss_tcdev->curr_thermal_state, tcdev_id);
  2252. return 0;
  2253. }
  2254. mutex_unlock(&priv->tcdev_lock);
  2255. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2256. return -EINVAL;
  2257. }
  2258. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2259. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2260. int cmd_len, void *cb_ctx,
  2261. int (*cb)(void *ctx, void *event, int event_len))
  2262. {
  2263. struct icnss_priv *priv = icnss_get_plat_priv();
  2264. int ret;
  2265. if (!priv)
  2266. return -ENODEV;
  2267. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2268. return -EINVAL;
  2269. priv->get_info_cb = cb;
  2270. priv->get_info_cb_ctx = cb_ctx;
  2271. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2272. if (ret) {
  2273. priv->get_info_cb = NULL;
  2274. priv->get_info_cb_ctx = NULL;
  2275. }
  2276. return ret;
  2277. }
  2278. EXPORT_SYMBOL(icnss_qmi_send);
  2279. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2280. struct module *owner, const char *mod_name)
  2281. {
  2282. int ret = 0;
  2283. struct icnss_priv *priv = icnss_get_plat_priv();
  2284. if (!priv || !priv->pdev) {
  2285. ret = -ENODEV;
  2286. goto out;
  2287. }
  2288. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2289. if (priv->ops) {
  2290. icnss_pr_err("Driver already registered\n");
  2291. ret = -EEXIST;
  2292. goto out;
  2293. }
  2294. if (!ops->dev_info) {
  2295. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2296. return -EINVAL;
  2297. }
  2298. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2299. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2300. ops->dev_info->name);
  2301. return -ENODEV;
  2302. }
  2303. if (!ops->probe || !ops->remove) {
  2304. ret = -EINVAL;
  2305. goto out;
  2306. }
  2307. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2308. 0, ops);
  2309. if (ret == -EINTR)
  2310. ret = 0;
  2311. out:
  2312. return ret;
  2313. }
  2314. EXPORT_SYMBOL(__icnss_register_driver);
  2315. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2316. {
  2317. int ret;
  2318. struct icnss_priv *priv = icnss_get_plat_priv();
  2319. if (!priv || !priv->pdev) {
  2320. ret = -ENODEV;
  2321. goto out;
  2322. }
  2323. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2324. if (!priv->ops) {
  2325. icnss_pr_err("Driver not registered\n");
  2326. ret = -ENOENT;
  2327. goto out;
  2328. }
  2329. ret = icnss_driver_event_post(priv,
  2330. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2331. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2332. out:
  2333. return ret;
  2334. }
  2335. EXPORT_SYMBOL(icnss_unregister_driver);
  2336. static struct icnss_msi_config msi_config = {
  2337. .total_vectors = 28,
  2338. .total_users = 2,
  2339. .users = (struct icnss_msi_user[]) {
  2340. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2341. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2342. },
  2343. };
  2344. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2345. {
  2346. priv->msi_config = &msi_config;
  2347. return 0;
  2348. }
  2349. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2350. int *num_vectors, u32 *user_base_data,
  2351. u32 *base_vector)
  2352. {
  2353. struct icnss_priv *priv = dev_get_drvdata(dev);
  2354. struct icnss_msi_config *msi_config;
  2355. int idx;
  2356. if (!priv)
  2357. return -ENODEV;
  2358. msi_config = priv->msi_config;
  2359. if (!msi_config) {
  2360. icnss_pr_err("MSI is not supported.\n");
  2361. return -EINVAL;
  2362. }
  2363. for (idx = 0; idx < msi_config->total_users; idx++) {
  2364. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2365. *num_vectors = msi_config->users[idx].num_vectors;
  2366. *user_base_data = msi_config->users[idx].base_vector
  2367. + priv->msi_base_data;
  2368. *base_vector = msi_config->users[idx].base_vector;
  2369. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2370. user_name, *num_vectors, *user_base_data,
  2371. *base_vector);
  2372. return 0;
  2373. }
  2374. }
  2375. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2376. return -EINVAL;
  2377. }
  2378. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2379. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2380. {
  2381. struct icnss_priv *priv = dev_get_drvdata(dev);
  2382. int irq_num;
  2383. irq_num = priv->srng_irqs[vector];
  2384. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2385. irq_num, vector);
  2386. return irq_num;
  2387. }
  2388. EXPORT_SYMBOL(icnss_get_msi_irq);
  2389. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2390. u32 *msi_addr_high)
  2391. {
  2392. struct icnss_priv *priv = dev_get_drvdata(dev);
  2393. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2394. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2395. }
  2396. EXPORT_SYMBOL(icnss_get_msi_address);
  2397. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2398. irqreturn_t (*handler)(int, void *),
  2399. unsigned long flags, const char *name, void *ctx)
  2400. {
  2401. int ret = 0;
  2402. unsigned int irq;
  2403. struct ce_irq_list *irq_entry;
  2404. struct icnss_priv *priv = dev_get_drvdata(dev);
  2405. if (!priv || !priv->pdev) {
  2406. ret = -ENODEV;
  2407. goto out;
  2408. }
  2409. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2410. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2411. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2412. ret = -EINVAL;
  2413. goto out;
  2414. }
  2415. irq = priv->ce_irqs[ce_id];
  2416. irq_entry = &priv->ce_irq_list[ce_id];
  2417. if (irq_entry->handler || irq_entry->irq) {
  2418. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2419. irq, ce_id);
  2420. ret = -EEXIST;
  2421. goto out;
  2422. }
  2423. ret = request_irq(irq, handler, flags, name, ctx);
  2424. if (ret) {
  2425. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2426. irq, ce_id, ret);
  2427. goto out;
  2428. }
  2429. irq_entry->irq = irq;
  2430. irq_entry->handler = handler;
  2431. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2432. penv->stats.ce_irqs[ce_id].request++;
  2433. out:
  2434. return ret;
  2435. }
  2436. EXPORT_SYMBOL(icnss_ce_request_irq);
  2437. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2438. {
  2439. int ret = 0;
  2440. unsigned int irq;
  2441. struct ce_irq_list *irq_entry;
  2442. if (!penv || !penv->pdev || !dev) {
  2443. ret = -ENODEV;
  2444. goto out;
  2445. }
  2446. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2447. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2448. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2449. ret = -EINVAL;
  2450. goto out;
  2451. }
  2452. irq = penv->ce_irqs[ce_id];
  2453. irq_entry = &penv->ce_irq_list[ce_id];
  2454. if (!irq_entry->handler || !irq_entry->irq) {
  2455. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2456. ret = -EEXIST;
  2457. goto out;
  2458. }
  2459. free_irq(irq, ctx);
  2460. irq_entry->irq = 0;
  2461. irq_entry->handler = NULL;
  2462. penv->stats.ce_irqs[ce_id].free++;
  2463. out:
  2464. return ret;
  2465. }
  2466. EXPORT_SYMBOL(icnss_ce_free_irq);
  2467. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2468. {
  2469. unsigned int irq;
  2470. if (!penv || !penv->pdev || !dev) {
  2471. icnss_pr_err("Platform driver not initialized\n");
  2472. return;
  2473. }
  2474. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2475. penv->state);
  2476. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2477. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2478. return;
  2479. }
  2480. penv->stats.ce_irqs[ce_id].enable++;
  2481. irq = penv->ce_irqs[ce_id];
  2482. enable_irq(irq);
  2483. }
  2484. EXPORT_SYMBOL(icnss_enable_irq);
  2485. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2486. {
  2487. unsigned int irq;
  2488. if (!penv || !penv->pdev || !dev) {
  2489. icnss_pr_err("Platform driver not initialized\n");
  2490. return;
  2491. }
  2492. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2493. penv->state);
  2494. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2495. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2496. ce_id);
  2497. return;
  2498. }
  2499. irq = penv->ce_irqs[ce_id];
  2500. disable_irq(irq);
  2501. penv->stats.ce_irqs[ce_id].disable++;
  2502. }
  2503. EXPORT_SYMBOL(icnss_disable_irq);
  2504. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2505. {
  2506. char *fw_build_timestamp = NULL;
  2507. struct icnss_priv *priv = dev_get_drvdata(dev);
  2508. if (!priv) {
  2509. icnss_pr_err("Platform driver not initialized\n");
  2510. return -EINVAL;
  2511. }
  2512. info->v_addr = priv->mem_base_va;
  2513. info->p_addr = priv->mem_base_pa;
  2514. info->chip_id = priv->chip_info.chip_id;
  2515. info->chip_family = priv->chip_info.chip_family;
  2516. info->board_id = priv->board_id;
  2517. info->soc_id = priv->soc_id;
  2518. info->fw_version = priv->fw_version_info.fw_version;
  2519. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2520. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2521. strlcpy(info->fw_build_timestamp,
  2522. priv->fw_version_info.fw_build_timestamp,
  2523. WLFW_MAX_TIMESTAMP_LEN + 1);
  2524. strlcpy(info->fw_build_id, priv->fw_build_id,
  2525. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2526. return 0;
  2527. }
  2528. EXPORT_SYMBOL(icnss_get_soc_info);
  2529. int icnss_get_mhi_state(struct device *dev)
  2530. {
  2531. struct icnss_priv *priv = dev_get_drvdata(dev);
  2532. if (!priv) {
  2533. icnss_pr_err("Platform driver not initialized\n");
  2534. return -EINVAL;
  2535. }
  2536. if (!priv->mhi_state_info_va)
  2537. return -ENOMEM;
  2538. return ioread32(priv->mhi_state_info_va);
  2539. }
  2540. EXPORT_SYMBOL(icnss_get_mhi_state);
  2541. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2542. {
  2543. int ret;
  2544. struct icnss_priv *priv;
  2545. if (!dev)
  2546. return -ENODEV;
  2547. priv = dev_get_drvdata(dev);
  2548. if (!priv) {
  2549. icnss_pr_err("Platform driver not initialized\n");
  2550. return -EINVAL;
  2551. }
  2552. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2553. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2554. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2555. priv->state);
  2556. return -EINVAL;
  2557. }
  2558. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2559. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2560. if (ret)
  2561. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2562. ret, fw_log_mode);
  2563. return ret;
  2564. }
  2565. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2566. int icnss_force_wake_request(struct device *dev)
  2567. {
  2568. struct icnss_priv *priv;
  2569. if (!dev)
  2570. return -ENODEV;
  2571. priv = dev_get_drvdata(dev);
  2572. if (!priv) {
  2573. icnss_pr_err("Platform driver not initialized\n");
  2574. return -EINVAL;
  2575. }
  2576. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2577. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2578. atomic_read(&priv->soc_wake_ref_count));
  2579. return 0;
  2580. }
  2581. icnss_pr_soc_wake("Calling SOC Wake request");
  2582. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2583. 0, NULL);
  2584. return 0;
  2585. }
  2586. EXPORT_SYMBOL(icnss_force_wake_request);
  2587. int icnss_force_wake_release(struct device *dev)
  2588. {
  2589. struct icnss_priv *priv;
  2590. if (!dev)
  2591. return -ENODEV;
  2592. priv = dev_get_drvdata(dev);
  2593. if (!priv) {
  2594. icnss_pr_err("Platform driver not initialized\n");
  2595. return -EINVAL;
  2596. }
  2597. icnss_pr_soc_wake("Calling SOC Wake response");
  2598. if (atomic_read(&priv->soc_wake_ref_count) &&
  2599. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2600. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2601. atomic_read(&priv->soc_wake_ref_count));
  2602. return 0;
  2603. }
  2604. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2605. 0, NULL);
  2606. return 0;
  2607. }
  2608. EXPORT_SYMBOL(icnss_force_wake_release);
  2609. int icnss_is_device_awake(struct device *dev)
  2610. {
  2611. struct icnss_priv *priv = dev_get_drvdata(dev);
  2612. if (!priv) {
  2613. icnss_pr_err("Platform driver not initialized\n");
  2614. return -EINVAL;
  2615. }
  2616. return atomic_read(&priv->soc_wake_ref_count);
  2617. }
  2618. EXPORT_SYMBOL(icnss_is_device_awake);
  2619. int icnss_is_pci_ep_awake(struct device *dev)
  2620. {
  2621. struct icnss_priv *priv = dev_get_drvdata(dev);
  2622. if (!priv) {
  2623. icnss_pr_err("Platform driver not initialized\n");
  2624. return -EINVAL;
  2625. }
  2626. if (!priv->mhi_state_info_va)
  2627. return -ENOMEM;
  2628. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2629. }
  2630. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2631. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2632. uint32_t mem_type, uint32_t data_len,
  2633. uint8_t *output)
  2634. {
  2635. int ret = 0;
  2636. struct icnss_priv *priv = dev_get_drvdata(dev);
  2637. if (priv->magic != ICNSS_MAGIC) {
  2638. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2639. dev, priv, priv->magic);
  2640. return -EINVAL;
  2641. }
  2642. if (!output || data_len == 0
  2643. || data_len > WLFW_MAX_DATA_SIZE) {
  2644. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2645. output, data_len);
  2646. ret = -EINVAL;
  2647. goto out;
  2648. }
  2649. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2650. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2651. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2652. priv->state);
  2653. ret = -EINVAL;
  2654. goto out;
  2655. }
  2656. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2657. data_len, output);
  2658. out:
  2659. return ret;
  2660. }
  2661. EXPORT_SYMBOL(icnss_athdiag_read);
  2662. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2663. uint32_t mem_type, uint32_t data_len,
  2664. uint8_t *input)
  2665. {
  2666. int ret = 0;
  2667. struct icnss_priv *priv = dev_get_drvdata(dev);
  2668. if (priv->magic != ICNSS_MAGIC) {
  2669. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2670. dev, priv, priv->magic);
  2671. return -EINVAL;
  2672. }
  2673. if (!input || data_len == 0
  2674. || data_len > WLFW_MAX_DATA_SIZE) {
  2675. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2676. input, data_len);
  2677. ret = -EINVAL;
  2678. goto out;
  2679. }
  2680. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2681. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2682. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2683. priv->state);
  2684. ret = -EINVAL;
  2685. goto out;
  2686. }
  2687. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2688. data_len, input);
  2689. out:
  2690. return ret;
  2691. }
  2692. EXPORT_SYMBOL(icnss_athdiag_write);
  2693. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2694. enum icnss_driver_mode mode,
  2695. const char *host_version)
  2696. {
  2697. struct icnss_priv *priv = dev_get_drvdata(dev);
  2698. int temp = 0;
  2699. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2700. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2701. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2702. priv->state);
  2703. return -EINVAL;
  2704. }
  2705. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2706. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2707. priv->state);
  2708. return -EINVAL;
  2709. }
  2710. if (priv->wpss_supported &&
  2711. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2712. icnss_setup_dms_mac(priv);
  2713. if (priv->device_id == WCN6750_DEVICE_ID) {
  2714. if (!icnss_get_temperature(priv, &temp)) {
  2715. icnss_pr_dbg("Temperature: %d\n", temp);
  2716. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2717. icnss_set_wlan_en_delay(priv);
  2718. }
  2719. }
  2720. return icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2721. }
  2722. EXPORT_SYMBOL(icnss_wlan_enable);
  2723. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2724. {
  2725. struct icnss_priv *priv = dev_get_drvdata(dev);
  2726. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2727. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2728. priv->state);
  2729. return 0;
  2730. }
  2731. return icnss_send_wlan_disable_to_fw(priv);
  2732. }
  2733. EXPORT_SYMBOL(icnss_wlan_disable);
  2734. bool icnss_is_qmi_disable(struct device *dev)
  2735. {
  2736. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2737. }
  2738. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2739. int icnss_get_ce_id(struct device *dev, int irq)
  2740. {
  2741. int i;
  2742. if (!penv || !penv->pdev || !dev)
  2743. return -ENODEV;
  2744. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  2745. if (penv->ce_irqs[i] == irq)
  2746. return i;
  2747. }
  2748. icnss_pr_err("No matching CE id for irq %d\n", irq);
  2749. return -EINVAL;
  2750. }
  2751. EXPORT_SYMBOL(icnss_get_ce_id);
  2752. int icnss_get_irq(struct device *dev, int ce_id)
  2753. {
  2754. int irq;
  2755. if (!penv || !penv->pdev || !dev)
  2756. return -ENODEV;
  2757. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  2758. return -EINVAL;
  2759. irq = penv->ce_irqs[ce_id];
  2760. return irq;
  2761. }
  2762. EXPORT_SYMBOL(icnss_get_irq);
  2763. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  2764. {
  2765. struct icnss_priv *priv = dev_get_drvdata(dev);
  2766. if (!priv) {
  2767. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  2768. return NULL;
  2769. }
  2770. return priv->iommu_domain;
  2771. }
  2772. EXPORT_SYMBOL(icnss_smmu_get_domain);
  2773. int icnss_smmu_map(struct device *dev,
  2774. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  2775. {
  2776. struct icnss_priv *priv = dev_get_drvdata(dev);
  2777. int flag = IOMMU_READ | IOMMU_WRITE;
  2778. bool dma_coherent = false;
  2779. unsigned long iova;
  2780. int prop_len = 0;
  2781. size_t len;
  2782. int ret = 0;
  2783. if (!priv) {
  2784. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2785. dev, priv);
  2786. return -EINVAL;
  2787. }
  2788. if (!iova_addr) {
  2789. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  2790. &paddr, size);
  2791. return -EINVAL;
  2792. }
  2793. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  2794. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  2795. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  2796. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2797. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2798. iova,
  2799. &priv->smmu_iova_ipa_start,
  2800. priv->smmu_iova_ipa_len);
  2801. return -ENOMEM;
  2802. }
  2803. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  2804. icnss_pr_dbg("dma-coherent is %s\n",
  2805. dma_coherent ? "enabled" : "disabled");
  2806. if (dma_coherent)
  2807. flag |= IOMMU_CACHE;
  2808. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  2809. ret = iommu_map(priv->iommu_domain, iova,
  2810. rounddown(paddr, PAGE_SIZE), len,
  2811. flag);
  2812. if (ret) {
  2813. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  2814. return ret;
  2815. }
  2816. priv->smmu_iova_ipa_current = iova + len;
  2817. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  2818. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  2819. return 0;
  2820. }
  2821. EXPORT_SYMBOL(icnss_smmu_map);
  2822. int icnss_smmu_unmap(struct device *dev,
  2823. uint32_t iova_addr, size_t size)
  2824. {
  2825. struct icnss_priv *priv = dev_get_drvdata(dev);
  2826. unsigned long iova;
  2827. size_t len, unmapped_len;
  2828. if (!priv) {
  2829. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  2830. dev, priv);
  2831. return -EINVAL;
  2832. }
  2833. if (!iova_addr) {
  2834. icnss_pr_err("iova_addr is NULL, size %zu\n",
  2835. size);
  2836. return -EINVAL;
  2837. }
  2838. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  2839. PAGE_SIZE);
  2840. iova = rounddown(iova_addr, PAGE_SIZE);
  2841. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  2842. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  2843. iova,
  2844. &priv->smmu_iova_ipa_start,
  2845. priv->smmu_iova_ipa_len);
  2846. return -ENOMEM;
  2847. }
  2848. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  2849. iova, len);
  2850. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  2851. if (unmapped_len != len) {
  2852. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  2853. return -EINVAL;
  2854. }
  2855. priv->smmu_iova_ipa_current = iova;
  2856. return 0;
  2857. }
  2858. EXPORT_SYMBOL(icnss_smmu_unmap);
  2859. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  2860. {
  2861. return socinfo_get_serial_number();
  2862. }
  2863. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  2864. int icnss_trigger_recovery(struct device *dev)
  2865. {
  2866. int ret = 0;
  2867. struct icnss_priv *priv = dev_get_drvdata(dev);
  2868. if (priv->magic != ICNSS_MAGIC) {
  2869. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  2870. ret = -EINVAL;
  2871. goto out;
  2872. }
  2873. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2874. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  2875. priv->state);
  2876. ret = -EPERM;
  2877. goto out;
  2878. }
  2879. if (priv->wpss_supported) {
  2880. icnss_pr_vdbg("Initiate Root PD restart");
  2881. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  2882. ICNSS_SMP2P_OUT_POWER_SAVE);
  2883. if (!ret)
  2884. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2885. return ret;
  2886. }
  2887. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  2888. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  2889. priv->state);
  2890. ret = -EOPNOTSUPP;
  2891. goto out;
  2892. }
  2893. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  2894. priv->state);
  2895. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  2896. if (!ret)
  2897. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2898. out:
  2899. return ret;
  2900. }
  2901. EXPORT_SYMBOL(icnss_trigger_recovery);
  2902. int icnss_idle_shutdown(struct device *dev)
  2903. {
  2904. struct icnss_priv *priv = dev_get_drvdata(dev);
  2905. if (!priv) {
  2906. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2907. return -EINVAL;
  2908. }
  2909. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2910. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2911. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  2912. return -EBUSY;
  2913. }
  2914. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  2915. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2916. }
  2917. EXPORT_SYMBOL(icnss_idle_shutdown);
  2918. int icnss_idle_restart(struct device *dev)
  2919. {
  2920. struct icnss_priv *priv = dev_get_drvdata(dev);
  2921. if (!priv) {
  2922. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  2923. return -EINVAL;
  2924. }
  2925. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  2926. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  2927. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  2928. return -EBUSY;
  2929. }
  2930. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  2931. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2932. }
  2933. EXPORT_SYMBOL(icnss_idle_restart);
  2934. int icnss_exit_power_save(struct device *dev)
  2935. {
  2936. struct icnss_priv *priv = dev_get_drvdata(dev);
  2937. icnss_pr_vdbg("Calling Exit Power Save\n");
  2938. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2939. !test_bit(ICNSS_MODE_ON, &priv->state))
  2940. return 0;
  2941. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  2942. ICNSS_SMP2P_OUT_POWER_SAVE);
  2943. }
  2944. EXPORT_SYMBOL(icnss_exit_power_save);
  2945. int icnss_prevent_l1(struct device *dev)
  2946. {
  2947. struct icnss_priv *priv = dev_get_drvdata(dev);
  2948. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2949. !test_bit(ICNSS_MODE_ON, &priv->state))
  2950. return 0;
  2951. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  2952. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2953. }
  2954. EXPORT_SYMBOL(icnss_prevent_l1);
  2955. void icnss_allow_l1(struct device *dev)
  2956. {
  2957. struct icnss_priv *priv = dev_get_drvdata(dev);
  2958. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  2959. !test_bit(ICNSS_MODE_ON, &priv->state))
  2960. return;
  2961. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  2962. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  2963. }
  2964. EXPORT_SYMBOL(icnss_allow_l1);
  2965. void icnss_allow_recursive_recovery(struct device *dev)
  2966. {
  2967. struct icnss_priv *priv = dev_get_drvdata(dev);
  2968. priv->allow_recursive_recovery = true;
  2969. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  2970. }
  2971. void icnss_disallow_recursive_recovery(struct device *dev)
  2972. {
  2973. struct icnss_priv *priv = dev_get_drvdata(dev);
  2974. priv->allow_recursive_recovery = false;
  2975. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  2976. }
  2977. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  2978. {
  2979. struct kobject *icnss_kobject;
  2980. int ret = 0;
  2981. atomic_set(&priv->is_shutdown, false);
  2982. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  2983. if (!icnss_kobject) {
  2984. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  2985. return -EINVAL;
  2986. }
  2987. priv->icnss_kobject = icnss_kobject;
  2988. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  2989. if (ret) {
  2990. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  2991. return ret;
  2992. }
  2993. return ret;
  2994. }
  2995. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  2996. {
  2997. struct kobject *icnss_kobject;
  2998. icnss_kobject = priv->icnss_kobject;
  2999. if (icnss_kobject)
  3000. kobject_put(icnss_kobject);
  3001. }
  3002. static ssize_t qdss_tr_start_store(struct device *dev,
  3003. struct device_attribute *attr,
  3004. const char *buf, size_t count)
  3005. {
  3006. struct icnss_priv *priv = dev_get_drvdata(dev);
  3007. wlfw_qdss_trace_start(priv);
  3008. icnss_pr_dbg("Received QDSS start command\n");
  3009. return count;
  3010. }
  3011. static ssize_t qdss_tr_stop_store(struct device *dev,
  3012. struct device_attribute *attr,
  3013. const char *user_buf, size_t count)
  3014. {
  3015. struct icnss_priv *priv = dev_get_drvdata(dev);
  3016. u32 option = 0;
  3017. if (sscanf(user_buf, "%du", &option) != 1)
  3018. return -EINVAL;
  3019. wlfw_qdss_trace_stop(priv, option);
  3020. icnss_pr_dbg("Received QDSS stop command\n");
  3021. return count;
  3022. }
  3023. static ssize_t qdss_conf_download_store(struct device *dev,
  3024. struct device_attribute *attr,
  3025. const char *buf, size_t count)
  3026. {
  3027. struct icnss_priv *priv = dev_get_drvdata(dev);
  3028. icnss_wlfw_qdss_dnld_send_sync(priv);
  3029. icnss_pr_dbg("Received QDSS download config command\n");
  3030. return count;
  3031. }
  3032. static ssize_t hw_trc_override_store(struct device *dev,
  3033. struct device_attribute *attr,
  3034. const char *buf, size_t count)
  3035. {
  3036. struct icnss_priv *priv = dev_get_drvdata(dev);
  3037. int tmp = 0;
  3038. if (sscanf(buf, "%du", &tmp) != 1)
  3039. return -EINVAL;
  3040. priv->hw_trc_override = tmp;
  3041. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3042. return count;
  3043. }
  3044. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3045. {
  3046. struct icnss_priv *priv = icnss_get_plat_priv();
  3047. phandle rproc_phandle;
  3048. int ret;
  3049. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3050. &rproc_phandle)) {
  3051. icnss_pr_err("error reading rproc phandle\n");
  3052. return;
  3053. }
  3054. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3055. if (IS_ERR_OR_NULL(priv->rproc)) {
  3056. icnss_pr_err("rproc not found");
  3057. return;
  3058. }
  3059. ret = rproc_boot(priv->rproc);
  3060. if (ret) {
  3061. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3062. rproc_put(priv->rproc);
  3063. }
  3064. }
  3065. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  3066. {
  3067. if (priv && priv->rproc) {
  3068. rproc_shutdown(priv->rproc);
  3069. rproc_put(priv->rproc);
  3070. priv->rproc = NULL;
  3071. }
  3072. }
  3073. static ssize_t wpss_boot_store(struct device *dev,
  3074. struct device_attribute *attr,
  3075. const char *buf, size_t count)
  3076. {
  3077. struct icnss_priv *priv = dev_get_drvdata(dev);
  3078. int wpss_rproc = 0;
  3079. if (!priv->wpss_supported)
  3080. return count;
  3081. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3082. icnss_pr_err("Failed to read wpss rproc info");
  3083. return -EINVAL;
  3084. }
  3085. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3086. if (wpss_rproc == 1)
  3087. schedule_work(&wpss_loader);
  3088. else if (wpss_rproc == 0)
  3089. icnss_wpss_unload(priv);
  3090. return count;
  3091. }
  3092. static ssize_t wlan_en_delay_store(struct device *dev,
  3093. struct device_attribute *attr,
  3094. const char *buf, size_t count)
  3095. {
  3096. struct icnss_priv *priv = dev_get_drvdata(dev);
  3097. uint32_t wlan_en_delay = 0;
  3098. if (priv->device_id != WCN6750_DEVICE_ID)
  3099. return count;
  3100. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3101. icnss_pr_err("Failed to read wlan_en_delay");
  3102. return -EINVAL;
  3103. }
  3104. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3105. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3106. return count;
  3107. }
  3108. static DEVICE_ATTR_WO(qdss_tr_start);
  3109. static DEVICE_ATTR_WO(qdss_tr_stop);
  3110. static DEVICE_ATTR_WO(qdss_conf_download);
  3111. static DEVICE_ATTR_WO(hw_trc_override);
  3112. static DEVICE_ATTR_WO(wpss_boot);
  3113. static DEVICE_ATTR_WO(wlan_en_delay);
  3114. static struct attribute *icnss_attrs[] = {
  3115. &dev_attr_qdss_tr_start.attr,
  3116. &dev_attr_qdss_tr_stop.attr,
  3117. &dev_attr_qdss_conf_download.attr,
  3118. &dev_attr_hw_trc_override.attr,
  3119. &dev_attr_wpss_boot.attr,
  3120. &dev_attr_wlan_en_delay.attr,
  3121. NULL,
  3122. };
  3123. static struct attribute_group icnss_attr_group = {
  3124. .attrs = icnss_attrs,
  3125. };
  3126. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3127. {
  3128. struct device *dev = &priv->pdev->dev;
  3129. int ret;
  3130. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3131. if (ret) {
  3132. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3133. ret);
  3134. goto out;
  3135. }
  3136. return 0;
  3137. out:
  3138. return ret;
  3139. }
  3140. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3141. {
  3142. sysfs_remove_link(kernel_kobj, "icnss");
  3143. }
  3144. static int icnss_sysfs_create(struct icnss_priv *priv)
  3145. {
  3146. int ret = 0;
  3147. ret = devm_device_add_group(&priv->pdev->dev,
  3148. &icnss_attr_group);
  3149. if (ret) {
  3150. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3151. ret);
  3152. goto out;
  3153. }
  3154. icnss_create_sysfs_link(priv);
  3155. ret = icnss_create_shutdown_sysfs(priv);
  3156. if (ret)
  3157. goto remove_icnss_group;
  3158. return 0;
  3159. remove_icnss_group:
  3160. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3161. out:
  3162. return ret;
  3163. }
  3164. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3165. {
  3166. icnss_destroy_shutdown_sysfs(priv);
  3167. icnss_remove_sysfs_link(priv);
  3168. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3169. }
  3170. static int icnss_resource_parse(struct icnss_priv *priv)
  3171. {
  3172. int ret = 0, i = 0;
  3173. struct platform_device *pdev = priv->pdev;
  3174. struct device *dev = &pdev->dev;
  3175. struct resource *res;
  3176. u32 int_prop;
  3177. ret = icnss_get_vreg(priv);
  3178. if (ret) {
  3179. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3180. goto out;
  3181. }
  3182. ret = icnss_get_clk(priv);
  3183. if (ret) {
  3184. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3185. goto put_vreg;
  3186. }
  3187. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3188. ret = icnss_get_psf_info(priv);
  3189. if (ret < 0)
  3190. goto out;
  3191. priv->psf_supported = true;
  3192. }
  3193. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3194. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3195. "membase");
  3196. if (!res) {
  3197. icnss_pr_err("Memory base not found in DT\n");
  3198. ret = -EINVAL;
  3199. goto put_clk;
  3200. }
  3201. priv->mem_base_pa = res->start;
  3202. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3203. resource_size(res));
  3204. if (!priv->mem_base_va) {
  3205. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3206. &priv->mem_base_pa);
  3207. ret = -EINVAL;
  3208. goto put_clk;
  3209. }
  3210. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3211. &priv->mem_base_pa,
  3212. priv->mem_base_va);
  3213. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3214. res = platform_get_resource(priv->pdev,
  3215. IORESOURCE_IRQ, i);
  3216. if (!res) {
  3217. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3218. ret = -ENODEV;
  3219. goto put_clk;
  3220. } else {
  3221. priv->ce_irqs[i] = res->start;
  3222. }
  3223. }
  3224. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3225. &priv->rf_subtype) == 0) {
  3226. priv->is_rf_subtype_valid = true;
  3227. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3228. }
  3229. if (of_property_read_bool(pdev->dev.of_node,
  3230. "qcom,is_slate_rfa")) {
  3231. priv->is_slate_rfa = true;
  3232. icnss_pr_err("SLATE rfa is enabled\n");
  3233. }
  3234. } else if (priv->device_id == WCN6750_DEVICE_ID) {
  3235. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3236. "msi_addr");
  3237. if (!res) {
  3238. icnss_pr_err("MSI address not found in DT\n");
  3239. ret = -EINVAL;
  3240. goto put_clk;
  3241. }
  3242. priv->msi_addr_pa = res->start;
  3243. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3244. PAGE_SIZE,
  3245. DMA_FROM_DEVICE, 0);
  3246. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3247. icnss_pr_err("MSI: failed to map msi address\n");
  3248. priv->msi_addr_iova = 0;
  3249. ret = -ENOMEM;
  3250. goto put_clk;
  3251. }
  3252. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3253. &priv->msi_addr_pa,
  3254. priv->msi_addr_iova);
  3255. ret = of_property_read_u32_index(dev->of_node,
  3256. "interrupts",
  3257. 1,
  3258. &int_prop);
  3259. if (ret) {
  3260. icnss_pr_dbg("Read interrupt prop failed");
  3261. goto put_clk;
  3262. }
  3263. priv->msi_base_data = int_prop + 32;
  3264. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3265. priv->msi_base_data, int_prop);
  3266. icnss_get_msi_assignment(priv);
  3267. for (i = 0; i < msi_config.total_vectors; i++) {
  3268. res = platform_get_resource(priv->pdev,
  3269. IORESOURCE_IRQ, i);
  3270. if (!res) {
  3271. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3272. ret = -ENODEV;
  3273. goto put_clk;
  3274. } else {
  3275. priv->srng_irqs[i] = res->start;
  3276. }
  3277. }
  3278. }
  3279. return 0;
  3280. put_clk:
  3281. icnss_put_clk(priv);
  3282. put_vreg:
  3283. icnss_put_vreg(priv);
  3284. out:
  3285. return ret;
  3286. }
  3287. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3288. {
  3289. int ret = 0;
  3290. struct platform_device *pdev = priv->pdev;
  3291. struct device *dev = &pdev->dev;
  3292. struct device_node *np = NULL;
  3293. u64 prop_size = 0;
  3294. const __be32 *addrp = NULL;
  3295. np = of_parse_phandle(dev->of_node,
  3296. "qcom,wlan-msa-fixed-region", 0);
  3297. if (np) {
  3298. addrp = of_get_address(np, 0, &prop_size, NULL);
  3299. if (!addrp) {
  3300. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3301. ret = -EINVAL;
  3302. of_node_put(np);
  3303. goto out;
  3304. }
  3305. priv->msa_pa = of_translate_address(np, addrp);
  3306. if (priv->msa_pa == OF_BAD_ADDR) {
  3307. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3308. ret = -EINVAL;
  3309. of_node_put(np);
  3310. goto out;
  3311. }
  3312. of_node_put(np);
  3313. priv->msa_va = memremap(priv->msa_pa,
  3314. (unsigned long)prop_size, MEMREMAP_WT);
  3315. if (!priv->msa_va) {
  3316. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3317. &priv->msa_pa);
  3318. ret = -EINVAL;
  3319. goto out;
  3320. }
  3321. priv->msa_mem_size = prop_size;
  3322. } else {
  3323. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3324. &priv->msa_mem_size);
  3325. if (ret || priv->msa_mem_size == 0) {
  3326. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3327. priv->msa_mem_size, ret);
  3328. goto out;
  3329. }
  3330. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3331. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3332. if (!priv->msa_va) {
  3333. icnss_pr_err("DMA alloc failed for MSA\n");
  3334. ret = -ENOMEM;
  3335. goto out;
  3336. }
  3337. }
  3338. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3339. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3340. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3341. "qcom,fw-prefix");
  3342. return 0;
  3343. out:
  3344. return ret;
  3345. }
  3346. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3347. struct device *dev, unsigned long iova,
  3348. int flags, void *handler_token)
  3349. {
  3350. struct icnss_priv *priv = handler_token;
  3351. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3352. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3353. if (!priv) {
  3354. icnss_pr_err("priv is NULL\n");
  3355. return -ENODEV;
  3356. }
  3357. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3358. fw_down_data.crashed = true;
  3359. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3360. &fw_down_data);
  3361. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3362. &fw_down_data);
  3363. }
  3364. icnss_trigger_recovery(&priv->pdev->dev);
  3365. /* IOMMU driver requires non-zero return value to print debug info. */
  3366. return -EINVAL;
  3367. }
  3368. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3369. {
  3370. int ret = 0;
  3371. struct platform_device *pdev = priv->pdev;
  3372. struct device *dev = &pdev->dev;
  3373. const char *iommu_dma_type;
  3374. struct resource *res;
  3375. u32 addr_win[2];
  3376. ret = of_property_read_u32_array(dev->of_node,
  3377. "qcom,iommu-dma-addr-pool",
  3378. addr_win,
  3379. ARRAY_SIZE(addr_win));
  3380. if (ret) {
  3381. icnss_pr_err("SMMU IOVA base not found\n");
  3382. } else {
  3383. priv->smmu_iova_start = addr_win[0];
  3384. priv->smmu_iova_len = addr_win[1];
  3385. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3386. &priv->smmu_iova_start,
  3387. priv->smmu_iova_len);
  3388. priv->iommu_domain =
  3389. iommu_get_domain_for_dev(&pdev->dev);
  3390. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3391. &iommu_dma_type);
  3392. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3393. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3394. priv->smmu_s1_enable = true;
  3395. if (priv->device_id == WCN6750_DEVICE_ID)
  3396. iommu_set_fault_handler(priv->iommu_domain,
  3397. icnss_smmu_fault_handler,
  3398. priv);
  3399. }
  3400. res = platform_get_resource_byname(pdev,
  3401. IORESOURCE_MEM,
  3402. "smmu_iova_ipa");
  3403. if (!res) {
  3404. icnss_pr_err("SMMU IOVA IPA not found\n");
  3405. } else {
  3406. priv->smmu_iova_ipa_start = res->start;
  3407. priv->smmu_iova_ipa_current = res->start;
  3408. priv->smmu_iova_ipa_len = resource_size(res);
  3409. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3410. &priv->smmu_iova_ipa_start,
  3411. priv->smmu_iova_ipa_len);
  3412. }
  3413. }
  3414. return 0;
  3415. }
  3416. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3417. {
  3418. if (!priv)
  3419. return -ENODEV;
  3420. if (!priv->smmu_iova_len)
  3421. return -EINVAL;
  3422. *addr = priv->smmu_iova_start;
  3423. *size = priv->smmu_iova_len;
  3424. return 0;
  3425. }
  3426. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3427. {
  3428. if (!priv)
  3429. return -ENODEV;
  3430. if (!priv->smmu_iova_ipa_len)
  3431. return -EINVAL;
  3432. *addr = priv->smmu_iova_ipa_start;
  3433. *size = priv->smmu_iova_ipa_len;
  3434. return 0;
  3435. }
  3436. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3437. char *name)
  3438. {
  3439. if (!priv)
  3440. return;
  3441. if (!priv->use_prefix_path) {
  3442. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3443. return;
  3444. }
  3445. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3446. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3447. ADRASTEA_PATH_PREFIX "%s", name);
  3448. else
  3449. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3450. QCA6750_PATH_PREFIX "%s", name);
  3451. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3452. }
  3453. static const struct platform_device_id icnss_platform_id_table[] = {
  3454. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3455. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3456. { },
  3457. };
  3458. static const struct of_device_id icnss_dt_match[] = {
  3459. {
  3460. .compatible = "qcom,wcn6750",
  3461. .data = (void *)&icnss_platform_id_table[0]},
  3462. {
  3463. .compatible = "qcom,icnss",
  3464. .data = (void *)&icnss_platform_id_table[1]},
  3465. { },
  3466. };
  3467. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3468. static void icnss_init_control_params(struct icnss_priv *priv)
  3469. {
  3470. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3471. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3472. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3473. if (priv->device_id == WCN6750_DEVICE_ID ||
  3474. of_property_read_bool(priv->pdev->dev.of_node,
  3475. "wpss-support-enable"))
  3476. priv->wpss_supported = true;
  3477. if (of_property_read_bool(priv->pdev->dev.of_node,
  3478. "bdf-download-support"))
  3479. priv->bdf_download_support = true;
  3480. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3481. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3482. }
  3483. static void icnss_read_device_configs(struct icnss_priv *priv)
  3484. {
  3485. if (of_property_read_bool(priv->pdev->dev.of_node,
  3486. "wlan-ipa-disabled")) {
  3487. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3488. }
  3489. }
  3490. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3491. {
  3492. pm_runtime_get_sync(&priv->pdev->dev);
  3493. pm_runtime_forbid(&priv->pdev->dev);
  3494. pm_runtime_set_active(&priv->pdev->dev);
  3495. pm_runtime_enable(&priv->pdev->dev);
  3496. }
  3497. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3498. {
  3499. pm_runtime_disable(&priv->pdev->dev);
  3500. pm_runtime_allow(&priv->pdev->dev);
  3501. pm_runtime_put_sync(&priv->pdev->dev);
  3502. }
  3503. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3504. {
  3505. return of_property_read_bool(priv->pdev->dev.of_node,
  3506. "use-nv-mac");
  3507. }
  3508. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3509. {
  3510. struct icnss_subsys_restart_level_data *restart_level_data;
  3511. icnss_pr_info("rproc name: %s recovery disable: %d",
  3512. rproc->name, rproc->recovery_disabled);
  3513. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3514. if (!restart_level_data)
  3515. return;
  3516. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3517. if (rproc->recovery_disabled)
  3518. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3519. else
  3520. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3521. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3522. 0, restart_level_data);
  3523. }
  3524. }
  3525. static int icnss_probe(struct platform_device *pdev)
  3526. {
  3527. int ret = 0;
  3528. struct device *dev = &pdev->dev;
  3529. struct icnss_priv *priv;
  3530. const struct of_device_id *of_id;
  3531. const struct platform_device_id *device_id;
  3532. if (dev_get_drvdata(dev)) {
  3533. icnss_pr_err("Driver is already initialized\n");
  3534. return -EEXIST;
  3535. }
  3536. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3537. if (!of_id || !of_id->data) {
  3538. icnss_pr_err("Failed to find of match device!\n");
  3539. ret = -ENODEV;
  3540. goto out_reset_drvdata;
  3541. }
  3542. device_id = of_id->data;
  3543. icnss_pr_dbg("Platform driver probe\n");
  3544. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3545. if (!priv)
  3546. return -ENOMEM;
  3547. priv->magic = ICNSS_MAGIC;
  3548. dev_set_drvdata(dev, priv);
  3549. priv->pdev = pdev;
  3550. priv->device_id = device_id->driver_data;
  3551. priv->is_chain1_supported = true;
  3552. INIT_LIST_HEAD(&priv->vreg_list);
  3553. INIT_LIST_HEAD(&priv->clk_list);
  3554. icnss_allow_recursive_recovery(dev);
  3555. icnss_init_control_params(priv);
  3556. icnss_read_device_configs(priv);
  3557. ret = icnss_resource_parse(priv);
  3558. if (ret)
  3559. goto out_reset_drvdata;
  3560. ret = icnss_msa_dt_parse(priv);
  3561. if (ret)
  3562. goto out_free_resources;
  3563. ret = icnss_smmu_dt_parse(priv);
  3564. if (ret)
  3565. goto out_free_resources;
  3566. spin_lock_init(&priv->event_lock);
  3567. spin_lock_init(&priv->on_off_lock);
  3568. spin_lock_init(&priv->soc_wake_msg_lock);
  3569. mutex_init(&priv->dev_lock);
  3570. mutex_init(&priv->tcdev_lock);
  3571. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3572. if (!priv->event_wq) {
  3573. icnss_pr_err("Workqueue creation failed\n");
  3574. ret = -EFAULT;
  3575. goto smmu_cleanup;
  3576. }
  3577. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3578. INIT_LIST_HEAD(&priv->event_list);
  3579. ret = icnss_register_fw_service(priv);
  3580. if (ret < 0) {
  3581. icnss_pr_err("fw service registration failed: %d\n", ret);
  3582. goto out_destroy_wq;
  3583. }
  3584. icnss_enable_recovery(priv);
  3585. icnss_debugfs_create(priv);
  3586. icnss_sysfs_create(priv);
  3587. ret = device_init_wakeup(&priv->pdev->dev, true);
  3588. if (ret)
  3589. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3590. ret);
  3591. icnss_set_plat_priv(priv);
  3592. init_completion(&priv->unblock_shutdown);
  3593. if (priv->is_slate_rfa)
  3594. init_completion(&priv->slate_boot_complete);
  3595. if (priv->device_id == WCN6750_DEVICE_ID) {
  3596. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3597. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3598. if (!priv->soc_wake_wq) {
  3599. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3600. ret = -EFAULT;
  3601. goto out_unregister_fw_service;
  3602. }
  3603. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3604. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3605. ret = icnss_genl_init();
  3606. if (ret < 0)
  3607. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3608. init_completion(&priv->smp2p_soc_wake_wait);
  3609. icnss_runtime_pm_init(priv);
  3610. icnss_aop_mbox_init(priv);
  3611. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3612. priv->bdf_download_support = true;
  3613. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3614. }
  3615. if (priv->wpss_supported) {
  3616. ret = icnss_dms_init(priv);
  3617. if (ret)
  3618. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3619. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3620. icnss_pr_dbg("NV MAC feature is %s\n",
  3621. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3622. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3623. }
  3624. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3625. icnss_pr_info("Platform driver probed successfully\n");
  3626. return 0;
  3627. out_unregister_fw_service:
  3628. icnss_unregister_fw_service(priv);
  3629. out_destroy_wq:
  3630. destroy_workqueue(priv->event_wq);
  3631. smmu_cleanup:
  3632. priv->iommu_domain = NULL;
  3633. out_free_resources:
  3634. icnss_put_resources(priv);
  3635. out_reset_drvdata:
  3636. dev_set_drvdata(dev, NULL);
  3637. return ret;
  3638. }
  3639. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  3640. {
  3641. if (IS_ERR_OR_NULL(ramdump_info))
  3642. return;
  3643. device_unregister(ramdump_info->dev);
  3644. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  3645. kfree(ramdump_info);
  3646. }
  3647. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  3648. {
  3649. if (priv->batt_psy)
  3650. power_supply_put(penv->batt_psy);
  3651. if (priv->psf_supported) {
  3652. flush_workqueue(priv->soc_update_wq);
  3653. destroy_workqueue(priv->soc_update_wq);
  3654. power_supply_unreg_notifier(&priv->psf_nb);
  3655. }
  3656. }
  3657. static int icnss_remove(struct platform_device *pdev)
  3658. {
  3659. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  3660. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  3661. device_init_wakeup(&priv->pdev->dev, false);
  3662. icnss_debugfs_destroy(priv);
  3663. icnss_unregister_power_supply_notifier(penv);
  3664. icnss_sysfs_destroy(priv);
  3665. complete_all(&priv->unblock_shutdown);
  3666. if (priv->is_slate_rfa)
  3667. icnss_slate_ssr_unregister_notifier(priv);
  3668. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  3669. if (priv->wpss_supported) {
  3670. icnss_dms_deinit(priv);
  3671. icnss_wpss_early_ssr_unregister_notifier(priv);
  3672. icnss_wpss_ssr_unregister_notifier(priv);
  3673. } else {
  3674. icnss_modem_ssr_unregister_notifier(priv);
  3675. icnss_pdr_unregister_notifier(priv);
  3676. }
  3677. if (priv->device_id == WCN6750_DEVICE_ID) {
  3678. icnss_genl_exit();
  3679. icnss_runtime_pm_deinit(priv);
  3680. if (!IS_ERR_OR_NULL(priv->mbox_chan))
  3681. mbox_free_channel(priv->mbox_chan);
  3682. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3683. complete_all(&priv->smp2p_soc_wake_wait);
  3684. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  3685. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  3686. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  3687. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  3688. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  3689. if (priv->soc_wake_wq)
  3690. destroy_workqueue(priv->soc_wake_wq);
  3691. }
  3692. class_destroy(priv->icnss_ramdump_class);
  3693. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  3694. icnss_unregister_fw_service(priv);
  3695. if (priv->event_wq)
  3696. destroy_workqueue(priv->event_wq);
  3697. priv->iommu_domain = NULL;
  3698. icnss_hw_power_off(priv);
  3699. icnss_put_resources(priv);
  3700. dev_set_drvdata(&pdev->dev, NULL);
  3701. return 0;
  3702. }
  3703. #ifdef CONFIG_PM_SLEEP
  3704. static int icnss_pm_suspend(struct device *dev)
  3705. {
  3706. struct icnss_priv *priv = dev_get_drvdata(dev);
  3707. int ret = 0;
  3708. if (priv->magic != ICNSS_MAGIC) {
  3709. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  3710. dev, priv, priv->magic);
  3711. return -EINVAL;
  3712. }
  3713. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  3714. if (!priv->ops || !priv->ops->pm_suspend ||
  3715. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3716. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3717. return 0;
  3718. ret = priv->ops->pm_suspend(dev);
  3719. if (ret == 0) {
  3720. if (priv->device_id == WCN6750_DEVICE_ID) {
  3721. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3722. !test_bit(ICNSS_MODE_ON, &priv->state))
  3723. return 0;
  3724. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3725. ICNSS_SMP2P_OUT_POWER_SAVE);
  3726. }
  3727. priv->stats.pm_suspend++;
  3728. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  3729. } else {
  3730. priv->stats.pm_suspend_err++;
  3731. }
  3732. return ret;
  3733. }
  3734. static int icnss_pm_resume(struct device *dev)
  3735. {
  3736. struct icnss_priv *priv = dev_get_drvdata(dev);
  3737. int ret = 0;
  3738. if (priv->magic != ICNSS_MAGIC) {
  3739. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  3740. dev, priv, priv->magic);
  3741. return -EINVAL;
  3742. }
  3743. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  3744. if (!priv->ops || !priv->ops->pm_resume ||
  3745. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  3746. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3747. goto out;
  3748. ret = priv->ops->pm_resume(dev);
  3749. out:
  3750. if (ret == 0) {
  3751. priv->stats.pm_resume++;
  3752. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  3753. } else {
  3754. priv->stats.pm_resume_err++;
  3755. }
  3756. return ret;
  3757. }
  3758. static int icnss_pm_suspend_noirq(struct device *dev)
  3759. {
  3760. struct icnss_priv *priv = dev_get_drvdata(dev);
  3761. int ret = 0;
  3762. if (priv->magic != ICNSS_MAGIC) {
  3763. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  3764. dev, priv, priv->magic);
  3765. return -EINVAL;
  3766. }
  3767. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  3768. if (!priv->ops || !priv->ops->suspend_noirq ||
  3769. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3770. goto out;
  3771. ret = priv->ops->suspend_noirq(dev);
  3772. out:
  3773. if (ret == 0) {
  3774. priv->stats.pm_suspend_noirq++;
  3775. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3776. } else {
  3777. priv->stats.pm_suspend_noirq_err++;
  3778. }
  3779. return ret;
  3780. }
  3781. static int icnss_pm_resume_noirq(struct device *dev)
  3782. {
  3783. struct icnss_priv *priv = dev_get_drvdata(dev);
  3784. int ret = 0;
  3785. if (priv->magic != ICNSS_MAGIC) {
  3786. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  3787. dev, priv, priv->magic);
  3788. return -EINVAL;
  3789. }
  3790. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  3791. if (!priv->ops || !priv->ops->resume_noirq ||
  3792. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  3793. goto out;
  3794. ret = priv->ops->resume_noirq(dev);
  3795. out:
  3796. if (ret == 0) {
  3797. priv->stats.pm_resume_noirq++;
  3798. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  3799. } else {
  3800. priv->stats.pm_resume_noirq_err++;
  3801. }
  3802. return ret;
  3803. }
  3804. static int icnss_pm_runtime_suspend(struct device *dev)
  3805. {
  3806. struct icnss_priv *priv = dev_get_drvdata(dev);
  3807. int ret = 0;
  3808. if (priv->device_id != WCN6750_DEVICE_ID) {
  3809. icnss_pr_err("Ignore runtime suspend:\n");
  3810. goto out;
  3811. }
  3812. if (priv->magic != ICNSS_MAGIC) {
  3813. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  3814. dev, priv, priv->magic);
  3815. return -EINVAL;
  3816. }
  3817. if (!priv->ops || !priv->ops->runtime_suspend ||
  3818. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3819. goto out;
  3820. icnss_pr_vdbg("Runtime suspend\n");
  3821. ret = priv->ops->runtime_suspend(dev);
  3822. if (!ret) {
  3823. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3824. !test_bit(ICNSS_MODE_ON, &priv->state))
  3825. return 0;
  3826. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  3827. ICNSS_SMP2P_OUT_POWER_SAVE);
  3828. }
  3829. out:
  3830. return ret;
  3831. }
  3832. static int icnss_pm_runtime_resume(struct device *dev)
  3833. {
  3834. struct icnss_priv *priv = dev_get_drvdata(dev);
  3835. int ret = 0;
  3836. if (priv->device_id != WCN6750_DEVICE_ID) {
  3837. icnss_pr_err("Ignore runtime resume:\n");
  3838. goto out;
  3839. }
  3840. if (priv->magic != ICNSS_MAGIC) {
  3841. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  3842. dev, priv, priv->magic);
  3843. return -EINVAL;
  3844. }
  3845. if (!priv->ops || !priv->ops->runtime_resume ||
  3846. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  3847. goto out;
  3848. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  3849. ret = priv->ops->runtime_resume(dev);
  3850. out:
  3851. return ret;
  3852. }
  3853. static int icnss_pm_runtime_idle(struct device *dev)
  3854. {
  3855. struct icnss_priv *priv = dev_get_drvdata(dev);
  3856. if (priv->device_id != WCN6750_DEVICE_ID) {
  3857. icnss_pr_err("Ignore runtime idle:\n");
  3858. goto out;
  3859. }
  3860. icnss_pr_vdbg("Runtime idle\n");
  3861. pm_request_autosuspend(dev);
  3862. out:
  3863. return -EBUSY;
  3864. }
  3865. #endif
  3866. static const struct dev_pm_ops icnss_pm_ops = {
  3867. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  3868. icnss_pm_resume)
  3869. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  3870. icnss_pm_resume_noirq)
  3871. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  3872. icnss_pm_runtime_idle)
  3873. };
  3874. static struct platform_driver icnss_driver = {
  3875. .probe = icnss_probe,
  3876. .remove = icnss_remove,
  3877. .driver = {
  3878. .name = "icnss2",
  3879. .pm = &icnss_pm_ops,
  3880. .of_match_table = icnss_dt_match,
  3881. },
  3882. };
  3883. static int __init icnss_initialize(void)
  3884. {
  3885. icnss_debug_init();
  3886. return platform_driver_register(&icnss_driver);
  3887. }
  3888. static void __exit icnss_exit(void)
  3889. {
  3890. platform_driver_unregister(&icnss_driver);
  3891. icnss_debug_deinit();
  3892. }
  3893. module_init(icnss_initialize);
  3894. module_exit(icnss_exit);
  3895. MODULE_LICENSE("GPL v2");
  3896. MODULE_DESCRIPTION("iWCN CORE platform driver");