dp_tx.h 15 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef __DP_TX_H
  19. #define __DP_TX_H
  20. #include <qdf_types.h>
  21. #include <qdf_nbuf.h>
  22. #include "dp_types.h"
  23. #define DP_TX_MAX_NUM_FRAGS 6
  24. #define DP_TX_DESC_FLAG_SIMPLE 0x1
  25. #define DP_TX_DESC_FLAG_TO_FW 0x2
  26. #define DP_TX_DESC_FLAG_FRAG 0x4
  27. #define DP_TX_DESC_FLAG_RAW 0x8
  28. #define DP_TX_DESC_FLAG_MESH 0x10
  29. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  30. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  31. #define DP_TX_DESC_FLAG_ME 0x80
  32. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  33. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  34. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  35. do { \
  36. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  37. qdf_nbuf_free(buf); \
  38. } while (0)
  39. #define OCB_HEADER_VERSION 1
  40. #ifdef TX_PER_PDEV_DESC_POOL
  41. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  42. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  43. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  44. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  45. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  46. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  47. #else
  48. #ifdef TX_PER_VDEV_DESC_POOL
  49. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  50. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  51. #endif /* TX_PER_VDEV_DESC_POOL */
  52. #endif /* TX_PER_PDEV_DESC_POOL */
  53. #define DP_TX_QUEUE_MASK 0x3
  54. /**
  55. * struct dp_tx_frag_info_s
  56. * @vaddr: hlos vritual address for buffer
  57. * @paddr_lo: physical address lower 32bits
  58. * @paddr_hi: physical address higher bits
  59. * @len: length of the buffer
  60. */
  61. struct dp_tx_frag_info_s {
  62. uint8_t *vaddr;
  63. uint32_t paddr_lo;
  64. uint16_t paddr_hi;
  65. uint16_t len;
  66. };
  67. /**
  68. * struct dp_tx_seg_info_s - Segmentation Descriptor
  69. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  70. * @frag_cnt: Fragment count in this segment
  71. * @total_len: Total length of segment
  72. * @frags: per-Fragment information
  73. * @next: pointer to next MSDU segment
  74. */
  75. struct dp_tx_seg_info_s {
  76. qdf_nbuf_t nbuf;
  77. uint16_t frag_cnt;
  78. uint16_t total_len;
  79. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  80. struct dp_tx_seg_info_s *next;
  81. };
  82. /**
  83. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  84. * @num_segs: Number of segments (TSO/ME) in the frame
  85. * @total_len: Total length of the frame
  86. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  87. * descriptors for SG frames/multicast-unicast converted packets.
  88. *
  89. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  90. * carry fragmentation information
  91. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  92. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  93. * converted into set of skb sg (nr_frags) structures.
  94. */
  95. struct dp_tx_sg_info_s {
  96. uint32_t num_segs;
  97. uint32_t total_len;
  98. struct dp_tx_seg_info_s *curr_seg;
  99. };
  100. /**
  101. * struct dp_tx_queue - Tx queue
  102. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  103. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  104. *
  105. * Tx queue contains information of the software (Descriptor pool)
  106. * and hardware resources (TCL ring id) to be used for a particular
  107. * transmit queue (obtained from skb_queue_mapping in case of linux)
  108. */
  109. struct dp_tx_queue {
  110. uint8_t desc_pool_id;
  111. uint8_t ring_id;
  112. };
  113. /**
  114. * struct dp_tx_msdu_info_s - MSDU Descriptor
  115. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  116. * @tx_queue: Tx queue on which this MSDU should be transmitted
  117. * @num_seg: Number of segments (TSO)
  118. * @tid: TID (override) that is sent from HLOS
  119. * @u.tso_info: TSO information for TSO frame types
  120. * (chain of the TSO segments, number of segments)
  121. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  122. * @meta_data: Mesh meta header information
  123. * @exception_fw: Duplicate frame to be sent to firmware
  124. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  125. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  126. *
  127. * This structure holds the complete MSDU information needed to program the
  128. * Hardware TCL and MSDU extension descriptors for different frame types
  129. *
  130. */
  131. struct dp_tx_msdu_info_s {
  132. enum dp_tx_frm_type frm_type;
  133. struct dp_tx_queue tx_queue;
  134. uint32_t num_seg;
  135. uint8_t tid;
  136. union {
  137. struct qdf_tso_info_t tso_info;
  138. struct dp_tx_sg_info_s sg_info;
  139. } u;
  140. uint32_t meta_data[7];
  141. uint8_t exception_fw;
  142. uint16_t ppdu_cookie;
  143. uint8_t is_tx_sniffer;
  144. };
  145. /**
  146. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  147. * @soc: core txrx context
  148. * @index: index of ring to deinit
  149. *
  150. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  151. * index of the respective TCL/WBM2SW release in soc structure.
  152. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  153. * and &soc->tx_comp_ring[2] will be deinitialized.
  154. *
  155. * Return: none
  156. */
  157. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  158. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  159. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  160. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  161. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  162. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  163. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  164. uint8_t num_pool,
  165. uint16_t num_desc);
  166. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  167. uint8_t num_pool,
  168. uint16_t num_desc);
  169. QDF_STATUS dp_tx_pdev_detach(struct dp_pdev *pdev);
  170. QDF_STATUS dp_tx_pdev_attach(struct dp_pdev *pdev);
  171. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  172. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  173. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  174. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  175. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  176. uint8_t num_pool,
  177. uint16_t num_desc);
  178. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  179. uint8_t num_pool,
  180. uint16_t num_desc);
  181. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  182. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  183. /**
  184. * dp_tso_attach() - TSO Attach handler
  185. * @txrx_soc: Opaque Dp handle
  186. *
  187. * Reserve TSO descriptor buffers
  188. *
  189. * Return: QDF_STATUS_E_FAILURE on failure or
  190. * QDF_STATUS_SUCCESS on success
  191. */
  192. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  193. /**
  194. * dp_tso_detach() - TSO Detach handler
  195. * @txrx_soc: Opaque Dp handle
  196. *
  197. * Deallocate TSO descriptor buffers
  198. *
  199. * Return: QDF_STATUS_E_FAILURE on failure or
  200. * QDF_STATUS_SUCCESS on success
  201. */
  202. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  203. QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev);
  204. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  205. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  206. qdf_nbuf_t nbuf,
  207. struct cdp_tx_exception_metadata *tx_exc);
  208. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  209. qdf_nbuf_t nbuf);
  210. qdf_nbuf_t
  211. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  212. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  213. struct cdp_tx_exception_metadata *tx_exc_metadata);
  214. #if QDF_LOCK_STATS
  215. noinline qdf_nbuf_t
  216. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  217. struct dp_tx_msdu_info_s *msdu_info);
  218. #else
  219. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  220. struct dp_tx_msdu_info_s *msdu_info);
  221. #endif
  222. #ifdef FEATURE_WLAN_TDLS
  223. /**
  224. * dp_tx_non_std() - Allow the control-path SW to send data frames
  225. * @soc_hdl: Datapath soc handle
  226. * @vdev_id: id of vdev
  227. * @tx_spec: what non-standard handling to apply to the tx data frames
  228. * @msdu_list: NULL-terminated list of tx MSDUs
  229. *
  230. * Return: NULL on success,
  231. * nbuf when it fails to send
  232. */
  233. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  234. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  235. #endif
  236. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  237. /**
  238. * dp_tx_comp_handler() - Tx completion handler
  239. * @int_ctx: pointer to DP interrupt context
  240. * @soc: core txrx main context
  241. * @hal_srng: Opaque HAL SRNG pointer
  242. * @ring_id: completion ring id
  243. * @quota: No. of packets/descriptors that can be serviced in one loop
  244. *
  245. * This function will collect hardware release ring element contents and
  246. * handle descriptor contents. Based on contents, free packet or handle error
  247. * conditions
  248. *
  249. * Return: Number of TX completions processed
  250. */
  251. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  252. hal_ring_handle_t hal_srng, uint8_t ring_id,
  253. uint32_t quota);
  254. QDF_STATUS
  255. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  256. #ifndef FEATURE_WDS
  257. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  258. {
  259. return;
  260. }
  261. #endif
  262. #ifndef ATH_SUPPORT_IQUE
  263. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  264. {
  265. return;
  266. }
  267. #endif
  268. #ifndef QCA_MULTIPASS_SUPPORT
  269. static inline
  270. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  271. qdf_nbuf_t nbuf,
  272. struct dp_tx_msdu_info_s *msdu_info)
  273. {
  274. return true;
  275. }
  276. static inline
  277. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  278. {
  279. }
  280. #else
  281. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  282. qdf_nbuf_t nbuf,
  283. struct dp_tx_msdu_info_s *msdu_info);
  284. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  285. #endif
  286. /**
  287. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  288. * @vdev: DP Virtual device handle
  289. * @nbuf: Buffer pointer
  290. * @queue: queue ids container for nbuf
  291. *
  292. * TX packet queue has 2 instances, software descriptors id and dma ring id
  293. * Based on tx feature and hardware configuration queue id combination could be
  294. * different.
  295. * For example -
  296. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  297. * With no XPS,lock based resource protection, Descriptor pool ids are different
  298. * for each vdev, dma ring id will be same as single pdev id
  299. *
  300. * Return: None
  301. */
  302. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  303. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  304. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  305. {
  306. uint16_t queue_offset = qdf_nbuf_get_queue_mapping(nbuf) &
  307. DP_TX_QUEUE_MASK;
  308. queue->desc_pool_id = queue_offset;
  309. queue->ring_id = qdf_get_cpu();
  310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  311. "%s, pool_id:%d ring_id: %d",
  312. __func__, queue->desc_pool_id, queue->ring_id);
  313. }
  314. /*
  315. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  316. * @dp_soc - DP soc structure pointer
  317. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  318. *
  319. * Return - HAL ring handle
  320. */
  321. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  322. uint8_t ring_id)
  323. {
  324. if (ring_id == soc->num_tcl_data_rings)
  325. return soc->tcl_cmd_credit_ring.hal_srng;
  326. return soc->tcl_data_ring[ring_id].hal_srng;
  327. }
  328. /*
  329. * dp_tx_get_rbm_id()- Get the RBM ID for data transmission completion.
  330. * @dp_soc - DP soc structure pointer
  331. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  332. *
  333. * Return - HAL ring handle
  334. */
  335. static inline uint8_t dp_tx_get_rbm_id(struct dp_soc *doc,
  336. uint8_t ring_id)
  337. {
  338. return (ring_id ? HAL_WBM_SW0_BM_ID + (ring_id - 1) :
  339. HAL_WBM_SW2_BM_ID);
  340. }
  341. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  342. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  343. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  344. {
  345. /* get flow id */
  346. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  347. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  348. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  349. "%s, pool_id:%d ring_id: %d",
  350. __func__, queue->desc_pool_id, queue->ring_id);
  351. }
  352. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  353. uint8_t ring_id)
  354. {
  355. return soc->tcl_data_ring[ring_id].hal_srng;
  356. }
  357. static inline uint8_t dp_tx_get_rbm_id(struct dp_soc *soc,
  358. uint8_t ring_id)
  359. {
  360. return (ring_id + HAL_WBM_SW0_BM_ID);
  361. }
  362. #endif
  363. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  364. /*
  365. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  366. * @dp_soc - DP soc structure pointer
  367. * @hal_ring_hdl - HAL ring handle
  368. *
  369. * Return - None
  370. */
  371. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  372. hal_ring_handle_t hal_ring_hdl)
  373. {
  374. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  375. }
  376. /*
  377. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  378. * @dp_soc - DP soc structure pointer
  379. * @hal_ring_hdl - HAL ring handle
  380. *
  381. * Return - None
  382. */
  383. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  384. hal_ring_handle_t hal_ring_hdl)
  385. {
  386. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  387. }
  388. /*
  389. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  390. * @dp_soc - DP soc structure pointer
  391. * @hal_ring_hdl - HAL ring handle
  392. *
  393. * Return - None
  394. */
  395. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  396. hal_ring_handle_t
  397. hal_ring_hdl)
  398. {
  399. }
  400. #else
  401. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  402. hal_ring_handle_t hal_ring_hdl)
  403. {
  404. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  405. }
  406. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  407. hal_ring_handle_t hal_ring_hdl)
  408. {
  409. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  410. }
  411. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  412. hal_ring_handle_t
  413. hal_ring_hdl)
  414. {
  415. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  416. }
  417. #endif
  418. #ifdef FEATURE_PERPKT_INFO
  419. QDF_STATUS
  420. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  421. struct dp_pdev *pdev,
  422. struct dp_peer *peer,
  423. struct hal_tx_completion_status *ts,
  424. qdf_nbuf_t netbuf,
  425. uint64_t time_latency);
  426. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  427. uint16_t peer_id, uint32_t ppdu_id,
  428. qdf_nbuf_t netbuf);
  429. #endif
  430. void dp_iterate_update_peer_list(struct cdp_pdev *pdev_hdl);
  431. #ifdef ATH_TX_PRI_OVERRIDE
  432. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  433. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  434. #else
  435. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  436. #endif
  437. void
  438. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  439. uint32_t buf_type);
  440. /* TODO TX_FEATURE_NOT_YET */
  441. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  442. {
  443. return;
  444. }
  445. /* TODO TX_FEATURE_NOT_YET */
  446. #ifndef WLAN_TX_PKT_CAPTURE_ENH
  447. static inline
  448. QDF_STATUS dp_peer_set_tx_capture_enabled(struct dp_pdev *pdev,
  449. struct dp_peer *peer_handle,
  450. uint8_t value, uint8_t *peer_mac)
  451. {
  452. return QDF_STATUS_SUCCESS;
  453. }
  454. #endif
  455. #endif