dp_main.c 49 KB

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  1. /*
  2. * Copyright (c) 2016 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include "../../wlan_cfg/wlan_cfg.h"
  31. #define DP_INTR_POLL_TIMER_MS 100
  32. /**
  33. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  34. */
  35. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  36. int ring_type, int ring_num, int pdev_id, uint32_t num_entries)
  37. {
  38. void *hal_soc = soc->hal_soc;
  39. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  40. /* TODO: See if we should get align size from hal */
  41. uint32_t ring_base_align = 8;
  42. struct hal_srng_params ring_params;
  43. srng->hal_srng = NULL;
  44. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  45. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  46. soc->osdev, soc->osdev->dev, srng->alloc_size,
  47. &(srng->base_paddr_unaligned));
  48. if (!srng->base_vaddr_unaligned) {
  49. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  50. FL("alloc failed - ring_type: %d, ring_num %d"),
  51. ring_type, ring_num);
  52. return QDF_STATUS_E_NOMEM;
  53. }
  54. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  55. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  56. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  57. ((unsigned long)(ring_params.ring_base_vaddr) -
  58. (unsigned long)srng->base_vaddr_unaligned);
  59. ring_params.num_entries = num_entries;
  60. /* TODO: Check MSI support and get MSI settings from HIF layer */
  61. ring_params.msi_data = 0;
  62. ring_params.msi_addr = 0;
  63. /* TODO: Setup interrupt timer and batch counter thresholds for
  64. * interrupt mitigation based on ring type
  65. */
  66. ring_params.intr_timer_thres_us = 8;
  67. ring_params.intr_batch_cntr_thres_entries = 1;
  68. /* TODO: Currently hal layer takes care of endianness related settings.
  69. * See if these settings need to passed from DP layer
  70. */
  71. ring_params.flags = 0;
  72. /* Enable low threshold interrupts for rx buffer rings (regular and
  73. * monitor buffer rings.
  74. * TODO: See if this is required for any other ring
  75. */
  76. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  77. /* TODO: Setting low threshold to 1/8th of ring size
  78. * see if this needs to be configurable
  79. */
  80. ring_params.low_threshold = num_entries >> 3;
  81. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  82. }
  83. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  84. pdev_id, &ring_params);
  85. return 0;
  86. }
  87. /**
  88. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  89. * Any buffers allocated and attached to ring entries are expected to be freed
  90. * before calling this function.
  91. */
  92. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  93. int ring_type, int ring_num)
  94. {
  95. if (!srng->hal_srng) {
  96. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  97. FL("Ring type: %d, num:%d not setup"),
  98. ring_type, ring_num);
  99. return;
  100. }
  101. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  102. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  103. srng->alloc_size,
  104. srng->base_vaddr_unaligned,
  105. srng->base_paddr_unaligned, 0);
  106. }
  107. /* TODO: Need this interface from HIF */
  108. void *hif_get_hal_handle(void *hif_handle);
  109. /*
  110. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  111. * @dp_ctx: DP SOC handle
  112. * @budget: Number of frames/descriptors that can be processed in one shot
  113. *
  114. * Return: remaining budget/quota for the soc device
  115. */
  116. uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  117. {
  118. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  119. struct dp_soc *soc = int_ctx->soc;
  120. int ring = 0;
  121. uint32_t work_done = 0;
  122. uint32_t budget = dp_budget;
  123. uint8_t tx_mask = int_ctx->tx_ring_mask;
  124. uint8_t rx_mask = int_ctx->rx_ring_mask;
  125. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  126. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  127. /* Process Tx completion interrupts first to return back buffers */
  128. if (tx_mask) {
  129. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  130. if (tx_mask & (1 << ring)) {
  131. work_done =
  132. dp_tx_comp_handler(soc, ring, budget);
  133. budget -= work_done;
  134. if (work_done)
  135. QDF_TRACE(QDF_MODULE_ID_DP,
  136. QDF_TRACE_LEVEL_INFO,
  137. "tx mask 0x%x ring %d,"
  138. "budget %d",
  139. tx_mask, ring, budget);
  140. if (budget <= 0)
  141. goto budget_done;
  142. }
  143. }
  144. }
  145. /* Process REO Exception ring interrupt */
  146. if (rx_err_mask) {
  147. work_done = dp_rx_err_process(soc,
  148. soc->reo_exception_ring.hal_srng, budget);
  149. budget -= work_done;
  150. if (work_done)
  151. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  152. "REO Exception Ring: work_done %d budget %d",
  153. work_done, budget);
  154. if (budget <= 0) {
  155. goto budget_done;
  156. }
  157. }
  158. /* Process Rx WBM release ring interrupt */
  159. if (rx_wbm_rel_mask) {
  160. work_done = dp_rx_wbm_err_process(soc,
  161. soc->rx_rel_ring.hal_srng, budget);
  162. budget -= work_done;
  163. if (work_done)
  164. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  165. "WBM Release Ring: work_done %d budget %d",
  166. work_done, budget);
  167. if (budget <= 0) {
  168. goto budget_done;
  169. }
  170. }
  171. /* Process Rx interrupts */
  172. if (rx_mask) {
  173. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  174. if (rx_mask & (1 << ring)) {
  175. work_done =
  176. dp_rx_process(soc,
  177. soc->reo_dest_ring[ring].hal_srng,
  178. budget);
  179. budget -= work_done;
  180. if (work_done)
  181. QDF_TRACE(QDF_MODULE_ID_DP,
  182. QDF_TRACE_LEVEL_INFO,
  183. "rx mask 0x%x ring %d,"
  184. "budget %d",
  185. tx_mask, ring, budget);
  186. if (budget <= 0)
  187. goto budget_done;
  188. }
  189. }
  190. }
  191. budget_done:
  192. return dp_budget - budget;
  193. }
  194. /* dp_interrupt_timer()- timer poll for interrupts
  195. *
  196. * @arg: SoC Handle
  197. *
  198. * Return:
  199. *
  200. */
  201. #ifdef DP_INTR_POLL_BASED
  202. void dp_interrupt_timer(void *arg)
  203. {
  204. struct dp_soc *soc = (struct dp_soc *) arg;
  205. int i;
  206. for (i = 0 ; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  207. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  208. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  209. }
  210. /*
  211. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  212. * @txrx_soc: DP SOC handle
  213. *
  214. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  215. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  216. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  217. *
  218. * Return: 0 for success. nonzero for failure.
  219. */
  220. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  221. {
  222. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  223. int i;
  224. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  225. soc->intr_ctx[i].tx_ring_mask = 0xF;
  226. soc->intr_ctx[i].rx_ring_mask = 0xF;
  227. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  228. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  229. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  230. soc->intr_ctx[i].soc = soc;
  231. }
  232. qdf_timer_init(soc->osdev, &soc->int_timer,
  233. dp_interrupt_timer, (void *)soc,
  234. QDF_TIMER_TYPE_WAKE_APPS);
  235. return QDF_STATUS_SUCCESS;
  236. }
  237. /*
  238. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  239. * @txrx_soc: DP SOC handle
  240. *
  241. * Return: void
  242. */
  243. void dp_soc_interrupt_detach(void *txrx_soc)
  244. {
  245. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  246. qdf_timer_stop(&soc->int_timer);
  247. qdf_timer_free(&soc->int_timer);
  248. }
  249. #else
  250. /*
  251. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  252. * @txrx_soc: DP SOC handle
  253. *
  254. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  255. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  256. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  257. *
  258. * Return: 0 for success. nonzero for failure.
  259. */
  260. QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  261. {
  262. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  263. int i = 0;
  264. int num_irq = 0;
  265. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  266. int j = 0;
  267. int ret = 0;
  268. /* Map of IRQ ids registered with one interrupt context */
  269. int irq_id_map[HIF_MAX_GRP_IRQ];
  270. int tx_mask =
  271. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  272. int rx_mask =
  273. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  274. int rx_mon_mask =
  275. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  276. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  277. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  278. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  279. soc->intr_ctx[i].soc = soc;
  280. num_irq = 0;
  281. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  282. if (tx_mask & (1 << j)) {
  283. irq_id_map[num_irq++] =
  284. (wbm2host_tx_completions_ring1 - j);
  285. }
  286. if (rx_mask & (1 << j)) {
  287. irq_id_map[num_irq++] =
  288. (reo2host_destination_ring1 - j);
  289. }
  290. if (rx_mon_mask & (1 << j)) {
  291. irq_id_map[num_irq++] =
  292. (rxdma2host_monitor_destination_mac1
  293. - j);
  294. }
  295. }
  296. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  297. num_irq, irq_id_map,
  298. dp_service_srngs,
  299. &soc->intr_ctx[i]);
  300. if (ret) {
  301. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  302. FL("failed, ret = %d"), ret);
  303. return QDF_STATUS_E_FAILURE;
  304. }
  305. }
  306. return QDF_STATUS_SUCCESS;
  307. }
  308. /*
  309. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  310. * @txrx_soc: DP SOC handle
  311. *
  312. * Return: void
  313. */
  314. void dp_soc_interrupt_detach(void *txrx_soc)
  315. {
  316. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  317. int i;
  318. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  319. soc->intr_ctx[i].tx_ring_mask = 0;
  320. soc->intr_ctx[i].rx_ring_mask = 0;
  321. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  322. }
  323. }
  324. #endif
  325. #define AVG_MAX_MPDUS_PER_TID 128
  326. #define AVG_TIDS_PER_CLIENT 2
  327. #define AVG_FLOWS_PER_TID 2
  328. #define AVG_MSDUS_PER_FLOW 128
  329. #define AVG_MSDUS_PER_MPDU 4
  330. /*
  331. * Allocate and setup link descriptor pool that will be used by HW for
  332. * various link and queue descriptors and managed by WBM
  333. */
  334. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  335. {
  336. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  337. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  338. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  339. uint32_t num_mpdus_per_link_desc =
  340. hal_num_mpdus_per_link_desc(soc->hal_soc);
  341. uint32_t num_msdus_per_link_desc =
  342. hal_num_msdus_per_link_desc(soc->hal_soc);
  343. uint32_t num_mpdu_links_per_queue_desc =
  344. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  345. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  346. uint32_t total_link_descs, total_mem_size;
  347. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  348. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  349. uint32_t num_link_desc_banks;
  350. uint32_t last_bank_size = 0;
  351. uint32_t entry_size, num_entries;
  352. int i;
  353. /* Only Tx queue descriptors are allocated from common link descriptor
  354. * pool Rx queue descriptors are not included in this because (REO queue
  355. * extension descriptors) they are expected to be allocated contiguously
  356. * with REO queue descriptors
  357. */
  358. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  359. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  360. num_mpdu_queue_descs = num_mpdu_link_descs /
  361. num_mpdu_links_per_queue_desc;
  362. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  363. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  364. num_msdus_per_link_desc;
  365. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  366. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  367. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  368. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  369. /* Round up to power of 2 */
  370. total_link_descs = 1;
  371. while (total_link_descs < num_entries)
  372. total_link_descs <<= 1;
  373. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  374. FL("total_link_descs: %u, link_desc_size: %d"),
  375. total_link_descs, link_desc_size);
  376. total_mem_size = total_link_descs * link_desc_size;
  377. total_mem_size += link_desc_align;
  378. if (total_mem_size <= max_alloc_size) {
  379. num_link_desc_banks = 0;
  380. last_bank_size = total_mem_size;
  381. } else {
  382. num_link_desc_banks = (total_mem_size) /
  383. (max_alloc_size - link_desc_align);
  384. last_bank_size = total_mem_size %
  385. (max_alloc_size - link_desc_align);
  386. }
  387. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  388. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  389. total_mem_size, num_link_desc_banks);
  390. for (i = 0; i < num_link_desc_banks; i++) {
  391. soc->link_desc_banks[i].base_vaddr_unaligned =
  392. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  393. max_alloc_size,
  394. &(soc->link_desc_banks[i].base_paddr_unaligned));
  395. soc->link_desc_banks[i].size = max_alloc_size;
  396. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  397. soc->link_desc_banks[i].base_vaddr_unaligned) +
  398. ((unsigned long)(
  399. soc->link_desc_banks[i].base_vaddr_unaligned) %
  400. link_desc_align));
  401. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  402. soc->link_desc_banks[i].base_paddr_unaligned) +
  403. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  404. (unsigned long)(
  405. soc->link_desc_banks[i].base_vaddr_unaligned));
  406. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  407. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  408. FL("Link descriptor memory alloc failed"));
  409. goto fail;
  410. }
  411. }
  412. if (last_bank_size) {
  413. /* Allocate last bank in case total memory required is not exact
  414. * multiple of max_alloc_size
  415. */
  416. soc->link_desc_banks[i].base_vaddr_unaligned =
  417. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  418. last_bank_size,
  419. &(soc->link_desc_banks[i].base_paddr_unaligned));
  420. soc->link_desc_banks[i].size = last_bank_size;
  421. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  422. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  423. ((unsigned long)(
  424. soc->link_desc_banks[i].base_vaddr_unaligned) %
  425. link_desc_align));
  426. soc->link_desc_banks[i].base_paddr =
  427. (unsigned long)(
  428. soc->link_desc_banks[i].base_paddr_unaligned) +
  429. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  430. (unsigned long)(
  431. soc->link_desc_banks[i].base_vaddr_unaligned));
  432. }
  433. /* Allocate and setup link descriptor idle list for HW internal use */
  434. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  435. total_mem_size = entry_size * total_link_descs;
  436. if (total_mem_size <= max_alloc_size) {
  437. void *desc;
  438. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  439. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  440. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  441. FL("Link desc idle ring setup failed"));
  442. goto fail;
  443. }
  444. hal_srng_access_start_unlocked(soc->hal_soc,
  445. soc->wbm_idle_link_ring.hal_srng);
  446. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  447. soc->link_desc_banks[i].base_paddr; i++) {
  448. uint32_t num_entries = (soc->link_desc_banks[i].size -
  449. (unsigned long)(
  450. soc->link_desc_banks[i].base_vaddr) -
  451. (unsigned long)(
  452. soc->link_desc_banks[i].base_vaddr_unaligned))
  453. / link_desc_size;
  454. unsigned long paddr = (unsigned long)(
  455. soc->link_desc_banks[i].base_paddr);
  456. while (num_entries && (desc = hal_srng_src_get_next(
  457. soc->hal_soc,
  458. soc->wbm_idle_link_ring.hal_srng))) {
  459. hal_set_link_desc_addr(desc, i, paddr);
  460. num_entries--;
  461. paddr += link_desc_size;
  462. }
  463. }
  464. hal_srng_access_end_unlocked(soc->hal_soc,
  465. soc->wbm_idle_link_ring.hal_srng);
  466. } else {
  467. uint32_t num_scatter_bufs;
  468. uint32_t num_entries_per_buf;
  469. uint32_t rem_entries;
  470. uint8_t *scatter_buf_ptr;
  471. uint16_t scatter_buf_num;
  472. soc->wbm_idle_scatter_buf_size =
  473. hal_idle_list_scatter_buf_size(soc->hal_soc);
  474. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  475. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  476. num_scatter_bufs = (total_mem_size /
  477. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  478. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  479. for (i = 0; i < num_scatter_bufs; i++) {
  480. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  481. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  482. soc->wbm_idle_scatter_buf_size,
  483. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  484. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  485. QDF_TRACE(QDF_MODULE_ID_DP,
  486. QDF_TRACE_LEVEL_ERROR,
  487. FL("Scatter list memory alloc failed"));
  488. goto fail;
  489. }
  490. }
  491. /* Populate idle list scatter buffers with link descriptor
  492. * pointers
  493. */
  494. scatter_buf_num = 0;
  495. scatter_buf_ptr = (uint8_t *)(
  496. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  497. rem_entries = num_entries_per_buf;
  498. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  499. soc->link_desc_banks[i].base_paddr; i++) {
  500. uint32_t num_link_descs =
  501. (soc->link_desc_banks[i].size -
  502. (unsigned long)(
  503. soc->link_desc_banks[i].base_vaddr) -
  504. (unsigned long)(
  505. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  506. link_desc_size;
  507. unsigned long paddr = (unsigned long)(
  508. soc->link_desc_banks[i].base_paddr);
  509. void *desc = NULL;
  510. while (num_link_descs && (desc =
  511. hal_srng_src_get_next(soc->hal_soc,
  512. soc->wbm_idle_link_ring.hal_srng))) {
  513. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  514. i, paddr);
  515. num_link_descs--;
  516. paddr += link_desc_size;
  517. if (rem_entries) {
  518. rem_entries--;
  519. scatter_buf_ptr += link_desc_size;
  520. } else {
  521. rem_entries = num_entries_per_buf;
  522. scatter_buf_num++;
  523. scatter_buf_ptr = (uint8_t *)(
  524. soc->wbm_idle_scatter_buf_base_vaddr[
  525. scatter_buf_num]);
  526. }
  527. }
  528. }
  529. /* Setup link descriptor idle list in HW */
  530. hal_setup_link_idle_list(soc->hal_soc,
  531. soc->wbm_idle_scatter_buf_base_paddr,
  532. soc->wbm_idle_scatter_buf_base_vaddr,
  533. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  534. (uint32_t)(scatter_buf_ptr -
  535. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  536. scatter_buf_num])));
  537. }
  538. return 0;
  539. fail:
  540. if (soc->wbm_idle_link_ring.hal_srng) {
  541. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  542. WBM_IDLE_LINK, 0);
  543. }
  544. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  545. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  546. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  547. soc->wbm_idle_scatter_buf_size,
  548. soc->wbm_idle_scatter_buf_base_vaddr[i],
  549. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  550. }
  551. }
  552. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  553. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  554. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  555. soc->link_desc_banks[i].size,
  556. soc->link_desc_banks[i].base_vaddr_unaligned,
  557. soc->link_desc_banks[i].base_paddr_unaligned,
  558. 0);
  559. }
  560. }
  561. return QDF_STATUS_E_FAILURE;
  562. }
  563. /*
  564. * Free link descriptor pool that was setup HW
  565. */
  566. void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  567. {
  568. int i;
  569. if (soc->wbm_idle_link_ring.hal_srng) {
  570. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  571. WBM_IDLE_LINK, 0);
  572. }
  573. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  574. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  575. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  576. soc->wbm_idle_scatter_buf_size,
  577. soc->wbm_idle_scatter_buf_base_vaddr[i],
  578. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  579. }
  580. }
  581. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  582. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  583. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  584. soc->link_desc_banks[i].size,
  585. soc->link_desc_banks[i].base_vaddr_unaligned,
  586. soc->link_desc_banks[i].base_paddr_unaligned,
  587. 0);
  588. }
  589. }
  590. }
  591. /* TODO: Following should be configurable */
  592. #define WBM_RELEASE_RING_SIZE 64
  593. #define TCL_DATA_RING_SIZE 512
  594. #define TCL_CMD_RING_SIZE 32
  595. #define TCL_STATUS_RING_SIZE 32
  596. #define REO_DST_RING_SIZE 2048
  597. #define REO_REINJECT_RING_SIZE 32
  598. #define RX_RELEASE_RING_SIZE 256
  599. #define REO_EXCEPTION_RING_SIZE 128
  600. #define REO_CMD_RING_SIZE 32
  601. #define REO_STATUS_RING_SIZE 32
  602. #define RXDMA_BUF_RING_SIZE 8192
  603. #define RXDMA_MONITOR_BUF_RING_SIZE 8192
  604. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  605. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  606. /*
  607. * dp_soc_cmn_setup() - Common SoC level initializion
  608. * @soc: Datapath SOC handle
  609. *
  610. * This is an internal function used to setup common SOC data structures,
  611. * to be called from PDEV attach after receiving HW mode capabilities from FW
  612. */
  613. static int dp_soc_cmn_setup(struct dp_soc *soc)
  614. {
  615. int i;
  616. if (soc->cmn_init_done)
  617. return 0;
  618. if (dp_peer_find_attach(soc))
  619. goto fail0;
  620. if (dp_hw_link_desc_pool_setup(soc))
  621. goto fail1;
  622. /* Setup SRNG rings */
  623. /* Common rings */
  624. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  625. WBM_RELEASE_RING_SIZE)) {
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  627. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  628. goto fail1;
  629. }
  630. soc->num_tcl_data_rings = 0;
  631. /* Tx data rings */
  632. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  633. soc->num_tcl_data_rings =
  634. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  635. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  636. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  637. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  638. QDF_TRACE(QDF_MODULE_ID_DP,
  639. QDF_TRACE_LEVEL_ERROR,
  640. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  641. goto fail1;
  642. }
  643. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  644. WBM2SW_RELEASE, i, 0, TCL_DATA_RING_SIZE)) {
  645. QDF_TRACE(QDF_MODULE_ID_DP,
  646. QDF_TRACE_LEVEL_ERROR,
  647. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  648. goto fail1;
  649. }
  650. }
  651. } else {
  652. /* This will be incremented during per pdev ring setup */
  653. soc->num_tcl_data_rings = 0;
  654. }
  655. if (dp_tx_soc_attach(soc)) {
  656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  657. FL("dp_tx_soc_attach failed"));
  658. goto fail1;
  659. }
  660. /* TCL command and status rings */
  661. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  662. TCL_CMD_RING_SIZE)) {
  663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  664. FL("dp_srng_setup failed for tcl_cmd_ring"));
  665. goto fail1;
  666. }
  667. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  668. TCL_STATUS_RING_SIZE)) {
  669. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  670. FL("dp_srng_setup failed for tcl_status_ring"));
  671. goto fail1;
  672. }
  673. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  674. * descriptors
  675. */
  676. /* Rx data rings */
  677. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  678. soc->num_reo_dest_rings =
  679. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  680. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  681. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  682. i, 0, REO_DST_RING_SIZE)) {
  683. QDF_TRACE(QDF_MODULE_ID_DP,
  684. QDF_TRACE_LEVEL_ERROR,
  685. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  686. goto fail1;
  687. }
  688. }
  689. } else {
  690. /* This will be incremented during per pdev ring setup */
  691. soc->num_reo_dest_rings = 0;
  692. }
  693. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  694. /* REO reinjection ring */
  695. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  696. REO_REINJECT_RING_SIZE)) {
  697. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  698. FL("dp_srng_setup failed for reo_reinject_ring"));
  699. goto fail1;
  700. }
  701. /* Rx release ring */
  702. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  703. RX_RELEASE_RING_SIZE)) {
  704. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  705. FL("dp_srng_setup failed for rx_rel_ring"));
  706. goto fail1;
  707. }
  708. /* Rx exception ring */
  709. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  710. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  711. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  712. FL("dp_srng_setup failed for reo_exception_ring"));
  713. goto fail1;
  714. }
  715. /* REO command and status rings */
  716. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  717. REO_CMD_RING_SIZE)) {
  718. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  719. FL("dp_srng_setup failed for reo_cmd_ring"));
  720. goto fail1;
  721. }
  722. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  723. REO_STATUS_RING_SIZE)) {
  724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  725. FL("dp_srng_setup failed for reo_status_ring"));
  726. goto fail1;
  727. }
  728. dp_soc_interrupt_attach(soc);
  729. /* Setup HW REO */
  730. hal_reo_setup(soc->hal_soc);
  731. soc->cmn_init_done = 1;
  732. return 0;
  733. fail1:
  734. /*
  735. * Cleanup will be done as part of soc_detach, which will
  736. * be called on pdev attach failure
  737. */
  738. fail0:
  739. return QDF_STATUS_E_FAILURE;
  740. }
  741. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force);
  742. /*
  743. * dp_pdev_attach_wifi3() - attach txrx pdev
  744. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  745. * @txrx_soc: Datapath SOC handle
  746. * @htc_handle: HTC handle for host-target interface
  747. * @qdf_osdev: QDF OS device
  748. * @pdev_id: PDEV ID
  749. *
  750. * Return: DP PDEV handle on success, NULL on failure
  751. */
  752. void *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc, void *ctrl_pdev,
  753. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  754. {
  755. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  756. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  757. if (!pdev) {
  758. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  759. FL("DP PDEV memory allocation failed"));
  760. goto fail0;
  761. }
  762. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  763. if (!pdev->wlan_cfg_ctx) {
  764. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  765. FL("pdev cfg_attach failed"));
  766. qdf_mem_free(pdev);
  767. goto fail0;
  768. }
  769. pdev->soc = soc;
  770. pdev->osif_pdev = ctrl_pdev;
  771. pdev->pdev_id = pdev_id;
  772. soc->pdev_list[pdev_id] = pdev;
  773. TAILQ_INIT(&pdev->vdev_list);
  774. pdev->vdev_count = 0;
  775. if (dp_soc_cmn_setup(soc)) {
  776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  777. FL("dp_soc_cmn_setup failed"));
  778. goto fail1;
  779. }
  780. /* Setup per PDEV TCL rings if configured */
  781. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  782. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  783. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. FL("dp_srng_setup failed for tcl_data_ring"));
  786. goto fail1;
  787. }
  788. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  789. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  791. FL("dp_srng_setup failed for tx_comp_ring"));
  792. goto fail1;
  793. }
  794. soc->num_tcl_data_rings++;
  795. }
  796. /* Tx specific init */
  797. if (dp_tx_pdev_attach(pdev)) {
  798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  799. FL("dp_tx_pdev_attach failed"));
  800. goto fail1;
  801. }
  802. /* Setup per PDEV REO rings if configured */
  803. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  804. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  805. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  806. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  807. FL("dp_srng_setup failed for reo_dest_ringn"));
  808. goto fail1;
  809. }
  810. soc->num_reo_dest_rings++;
  811. }
  812. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  813. RXDMA_BUF_RING_SIZE)) {
  814. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  815. FL("dp_srng_setup failed rx refill ring"));
  816. goto fail1;
  817. }
  818. #ifdef QCA_HOST2FW_RXBUF_RING
  819. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1, pdev_id,
  820. RXDMA_BUF_RING_SIZE)) {
  821. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  822. FL("dp_srng_setup failed rx mac ring"));
  823. goto fail1;
  824. }
  825. #endif
  826. /* TODO: RXDMA destination ring is not planned to be used currently.
  827. * Setup the ring when required
  828. */
  829. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  830. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  831. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  832. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  833. goto fail1;
  834. }
  835. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  836. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  837. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  838. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  839. goto fail1;
  840. }
  841. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  842. RXDMA_MONITOR_STATUS, 0, pdev_id,
  843. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  844. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  845. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  846. goto fail1;
  847. }
  848. /* Rx specific init */
  849. if (dp_rx_pdev_attach(pdev)) {
  850. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  851. FL("dp_rx_pdev_attach failed "));
  852. goto fail0;
  853. }
  854. #ifndef CONFIG_WIN
  855. /* MCL */
  856. dp_local_peer_id_pool_init(pdev);
  857. #endif
  858. return (void *)pdev;
  859. fail1:
  860. dp_pdev_detach_wifi3((void *)pdev, 0);
  861. fail0:
  862. return NULL;
  863. }
  864. /*
  865. * dp_pdev_detach_wifi3() - detach txrx pdev
  866. * @txrx_pdev: Datapath PDEV handle
  867. * @force: Force detach
  868. *
  869. */
  870. static void dp_pdev_detach_wifi3(void *txrx_pdev, int force)
  871. {
  872. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  873. struct dp_soc *soc = pdev->soc;
  874. dp_tx_pdev_detach(pdev);
  875. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  876. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  877. TCL_DATA, pdev->pdev_id);
  878. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  879. WBM2SW_RELEASE, pdev->pdev_id);
  880. }
  881. dp_rx_pdev_detach(pdev);
  882. /* Setup per PDEV REO rings if configured */
  883. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  884. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  885. REO_DST, pdev->pdev_id);
  886. }
  887. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  888. #ifdef QCA_HOST2FW_RXBUF_RING
  889. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring, RXDMA_BUF, 1);
  890. #endif
  891. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  892. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  893. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  894. RXDMA_MONITOR_STATUS, 0);
  895. soc->pdev_list[pdev->pdev_id] = NULL;
  896. qdf_mem_free(pdev);
  897. }
  898. /*
  899. * dp_soc_detach_wifi3() - Detach txrx SOC
  900. * @txrx_soc: DP SOC handle
  901. *
  902. */
  903. void dp_soc_detach_wifi3(void *txrx_soc)
  904. {
  905. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  906. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  907. int i;
  908. soc->cmn_init_done = 0;
  909. dp_soc_interrupt_detach(soc);
  910. for (i = 0; i < MAX_PDEV_CNT; i++) {
  911. if (soc->pdev_list[i])
  912. dp_pdev_detach_wifi3((void *)pdev, 1);
  913. }
  914. dp_peer_find_detach(soc);
  915. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  916. * SW descriptors
  917. */
  918. /* Free the ring memories */
  919. /* Common rings */
  920. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  921. /* Tx data rings */
  922. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  923. dp_tx_soc_detach(soc);
  924. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  925. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  926. TCL_DATA, i);
  927. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  928. WBM2SW_RELEASE, i);
  929. }
  930. }
  931. /* TCL command and status rings */
  932. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  933. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  934. /* Rx data rings */
  935. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  936. soc->num_reo_dest_rings =
  937. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  938. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  939. /* TODO: Get number of rings and ring sizes
  940. * from wlan_cfg
  941. */
  942. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  943. REO_DST, i);
  944. }
  945. }
  946. /* REO reinjection ring */
  947. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  948. /* Rx release ring */
  949. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  950. /* Rx exception ring */
  951. /* TODO: Better to store ring_type and ring_num in
  952. * dp_srng during setup
  953. */
  954. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  955. /* REO command and status rings */
  956. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  957. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  958. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  959. htt_soc_detach(soc->htt_handle);
  960. }
  961. /*
  962. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  963. * @txrx_soc: Datapath SOC handle
  964. */
  965. int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  966. {
  967. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  968. int i;
  969. htt_soc_attach_target(soc->htt_handle);
  970. for (i = 0; i < MAX_PDEV_CNT; i++) {
  971. struct dp_pdev *pdev = soc->pdev_list[i];
  972. if (pdev) {
  973. htt_srng_setup(soc->htt_handle, i,
  974. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  975. #ifdef QCA_HOST2FW_RXBUF_RING
  976. htt_srng_setup(soc->htt_handle, i,
  977. pdev->rx_mac_buf_ring.hal_srng, RXDMA_BUF);
  978. #endif
  979. #ifdef notyet /* FW doesn't handle monitor rings yet */
  980. htt_srng_setup(soc->htt_handle, i,
  981. pdev->rxdma_mon_buf_ring.hal_srng,
  982. RXDMA_MONITOR_BUF);
  983. htt_srng_setup(soc->htt_handle, i,
  984. pdev->rxdma_mon_dst_ring.hal_srng,
  985. RXDMA_MONITOR_DST);
  986. htt_srng_setup(soc->htt_handle, i,
  987. pdev->rxdma_mon_status_ring.hal_srng,
  988. RXDMA_MONITOR_STATUS);
  989. #endif
  990. }
  991. }
  992. return 0;
  993. }
  994. /*
  995. * dp_vdev_attach_wifi3() - attach txrx vdev
  996. * @txrx_pdev: Datapath PDEV handle
  997. * @vdev_mac_addr: MAC address of the virtual interface
  998. * @vdev_id: VDEV Id
  999. * @wlan_op_mode: VDEV operating mode
  1000. *
  1001. * Return: DP VDEV handle on success, NULL on failure
  1002. */
  1003. void *dp_vdev_attach_wifi3(void *txrx_pdev,
  1004. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1005. {
  1006. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1007. struct dp_soc *soc = pdev->soc;
  1008. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1009. if (!vdev) {
  1010. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1011. FL("DP VDEV memory allocation failed"));
  1012. goto fail0;
  1013. }
  1014. vdev->pdev = pdev;
  1015. vdev->vdev_id = vdev_id;
  1016. vdev->opmode = op_mode;
  1017. vdev->osdev = soc->osdev;
  1018. vdev->osif_rx = NULL;
  1019. vdev->osif_rx_mon = NULL;
  1020. vdev->osif_vdev = NULL;
  1021. vdev->delete.pending = 0;
  1022. vdev->safemode = 0;
  1023. vdev->drop_unenc = 1;
  1024. #ifdef notyet
  1025. vdev->filters_num = 0;
  1026. #endif
  1027. qdf_mem_copy(
  1028. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1029. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1030. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1031. /* TODO: Initialize default HTT meta data that will be used in
  1032. * TCL descriptors for packets transmitted from this VDEV
  1033. */
  1034. TAILQ_INIT(&vdev->peer_list);
  1035. /* add this vdev into the pdev's list */
  1036. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1037. pdev->vdev_count++;
  1038. dp_tx_vdev_attach(vdev);
  1039. #ifdef DP_INTR_POLL_BASED
  1040. if (pdev->vdev_count == 1)
  1041. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1042. #endif
  1043. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1044. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1045. return (void *)vdev;
  1046. fail0:
  1047. return NULL;
  1048. }
  1049. /**
  1050. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1051. * @vdev: Datapath VDEV handle
  1052. * @osif_vdev: OSIF vdev handle
  1053. * @txrx_ops: Tx and Rx operations
  1054. *
  1055. * Return: DP VDEV handle on success, NULL on failure
  1056. */
  1057. void dp_vdev_register_wifi3(void *vdev_handle, void *osif_vdev,
  1058. struct ol_txrx_ops *txrx_ops)
  1059. {
  1060. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1061. vdev->osif_vdev = osif_vdev;
  1062. vdev->osif_rx = txrx_ops->rx.rx;
  1063. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1064. #ifdef notyet
  1065. #if ATH_SUPPORT_WAPI
  1066. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1067. #endif
  1068. #if UMAC_SUPPORT_PROXY_ARP
  1069. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1070. #endif
  1071. #endif
  1072. /* TODO: Enable the following once Tx code is integrated */
  1073. txrx_ops->tx.tx = dp_tx_send;
  1074. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1075. "DP Vdev Register success");
  1076. }
  1077. /*
  1078. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1079. * @txrx_vdev: Datapath VDEV handle
  1080. * @callback: Callback OL_IF on completion of detach
  1081. * @cb_context: Callback context
  1082. *
  1083. */
  1084. void dp_vdev_detach_wifi3(void *vdev_handle,
  1085. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1086. {
  1087. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1088. struct dp_pdev *pdev = vdev->pdev;
  1089. struct dp_soc *soc = pdev->soc;
  1090. /* preconditions */
  1091. qdf_assert(vdev);
  1092. /* remove the vdev from its parent pdev's list */
  1093. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1094. /*
  1095. * Use peer_ref_mutex while accessing peer_list, in case
  1096. * a peer is in the process of being removed from the list.
  1097. */
  1098. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1099. /* check that the vdev has no peers allocated */
  1100. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1101. /* debug print - will be removed later */
  1102. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1103. FL("not deleting vdev object %p (%pM)"
  1104. "until deletion finishes for all its peers"),
  1105. vdev, vdev->mac_addr.raw);
  1106. /* indicate that the vdev needs to be deleted */
  1107. vdev->delete.pending = 1;
  1108. vdev->delete.callback = callback;
  1109. vdev->delete.context = cb_context;
  1110. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1111. return;
  1112. }
  1113. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1114. dp_tx_vdev_detach(vdev);
  1115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1116. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1117. qdf_mem_free(vdev);
  1118. if (callback)
  1119. callback(cb_context);
  1120. }
  1121. /*
  1122. * dp_peer_create_wifi3() - attach txrx peer
  1123. * @txrx_vdev: Datapath VDEV handle
  1124. * @peer_mac_addr: Peer MAC address
  1125. *
  1126. * Return: DP peeer handle on success, NULL on failure
  1127. */
  1128. void *dp_peer_create_wifi3(void *vdev_handle, uint8_t *peer_mac_addr)
  1129. {
  1130. struct dp_peer *peer;
  1131. int i;
  1132. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1133. struct dp_pdev *pdev;
  1134. struct dp_soc *soc;
  1135. /* preconditions */
  1136. qdf_assert(vdev);
  1137. qdf_assert(peer_mac_addr);
  1138. pdev = vdev->pdev;
  1139. soc = pdev->soc;
  1140. #ifdef notyet
  1141. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1142. soc->mempool_ol_ath_peer);
  1143. #else
  1144. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1145. #endif
  1146. if (!peer)
  1147. return NULL; /* failure */
  1148. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1149. qdf_spinlock_create(&peer->peer_info_lock);
  1150. /* store provided params */
  1151. peer->vdev = vdev;
  1152. qdf_mem_copy(
  1153. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1154. /* TODO: See of rx_opt_proc is really required */
  1155. peer->rx_opt_proc = soc->rx_opt_proc;
  1156. /* initialize the peer_id */
  1157. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1158. peer->peer_ids[i] = HTT_INVALID_PEER;
  1159. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1160. qdf_atomic_init(&peer->ref_cnt);
  1161. /* keep one reference for attach */
  1162. qdf_atomic_inc(&peer->ref_cnt);
  1163. /* add this peer into the vdev's list */
  1164. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1165. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1166. /* TODO: See if hash based search is required */
  1167. dp_peer_find_hash_add(soc, peer);
  1168. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1169. "vdev %p created peer %p (%pM)",
  1170. vdev, peer, peer->mac_addr.raw);
  1171. /*
  1172. * For every peer MAp message search and set if bss_peer
  1173. */
  1174. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1175. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1176. "vdev bss_peer!!!!");
  1177. peer->bss_peer = 1;
  1178. vdev->vap_bss_peer = peer;
  1179. }
  1180. #ifndef CONFIG_WIN
  1181. dp_local_peer_id_alloc(pdev, peer);
  1182. #endif
  1183. return (void *)peer;
  1184. }
  1185. /*
  1186. * dp_peer_setup_wifi3() - initialize the peer
  1187. * @vdev_hdl: virtual device object
  1188. * @peer: Peer object
  1189. *
  1190. * Return: void
  1191. */
  1192. void dp_peer_setup_wifi3(void *vdev_hdl, void *peer_hdl)
  1193. {
  1194. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1195. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1196. struct dp_pdev *pdev;
  1197. struct dp_soc *soc;
  1198. /* preconditions */
  1199. qdf_assert(vdev);
  1200. qdf_assert(peer);
  1201. pdev = vdev->pdev;
  1202. soc = pdev->soc;
  1203. dp_peer_rx_init(pdev, peer);
  1204. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1205. /* TODO: Check the destination ring number to be passed to FW */
  1206. soc->cdp_soc.ol_ops->peer_set_default_routing(soc->osif_soc,
  1207. peer->mac_addr.raw, peer->vdev->vdev_id, 0, 1);
  1208. }
  1209. return;
  1210. }
  1211. /*
  1212. * dp_peer_authorize() - authorize txrx peer
  1213. * @peer_handle: Datapath peer handle
  1214. * @authorize
  1215. *
  1216. */
  1217. void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1218. {
  1219. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1220. struct dp_soc *soc;
  1221. if (peer != NULL) {
  1222. soc = peer->vdev->pdev->soc;
  1223. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1224. peer->authorize = authorize ? 1 : 0;
  1225. #ifdef notyet /* ATH_BAND_STEERING */
  1226. peer->peer_bs_inact_flag = 0;
  1227. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1228. #endif
  1229. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1230. }
  1231. }
  1232. /*
  1233. * dp_peer_unref_delete() - unref and delete peer
  1234. * @peer_handle: Datapath peer handle
  1235. *
  1236. */
  1237. void dp_peer_unref_delete(void *peer_handle)
  1238. {
  1239. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1240. struct dp_vdev *vdev = peer->vdev;
  1241. struct dp_soc *soc = vdev->pdev->soc;
  1242. struct dp_peer *tmppeer;
  1243. int found = 0;
  1244. uint16_t peer_id;
  1245. /*
  1246. * Hold the lock all the way from checking if the peer ref count
  1247. * is zero until the peer references are removed from the hash
  1248. * table and vdev list (if the peer ref count is zero).
  1249. * This protects against a new HL tx operation starting to use the
  1250. * peer object just after this function concludes it's done being used.
  1251. * Furthermore, the lock needs to be held while checking whether the
  1252. * vdev's list of peers is empty, to make sure that list is not modified
  1253. * concurrently with the empty check.
  1254. */
  1255. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1256. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1257. peer_id = peer->peer_ids[0];
  1258. /*
  1259. * Make sure that the reference to the peer in
  1260. * peer object map is removed
  1261. */
  1262. if (peer_id != HTT_INVALID_PEER)
  1263. soc->peer_id_to_obj_map[peer_id] = NULL;
  1264. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1265. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1266. /* remove the reference to the peer from the hash table */
  1267. dp_peer_find_hash_remove(soc, peer);
  1268. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1269. if (tmppeer == peer) {
  1270. found = 1;
  1271. break;
  1272. }
  1273. }
  1274. if (found) {
  1275. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1276. peer_list_elem);
  1277. } else {
  1278. /*Ignoring the remove operation as peer not found*/
  1279. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1280. "peer %p not found in vdev (%p)->peer_list:%p",
  1281. peer, vdev, &peer->vdev->peer_list);
  1282. }
  1283. /* cleanup the Rx reorder queues for this peer */
  1284. dp_peer_rx_cleanup(vdev, peer);
  1285. /* check whether the parent vdev has no peers left */
  1286. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1287. /*
  1288. * Now that there are no references to the peer, we can
  1289. * release the peer reference lock.
  1290. */
  1291. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1292. /*
  1293. * Check if the parent vdev was waiting for its peers
  1294. * to be deleted, in order for it to be deleted too.
  1295. */
  1296. if (vdev->delete.pending) {
  1297. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1298. vdev->delete.callback;
  1299. void *vdev_delete_context =
  1300. vdev->delete.context;
  1301. QDF_TRACE(QDF_MODULE_ID_DP,
  1302. QDF_TRACE_LEVEL_INFO_HIGH,
  1303. FL("deleting vdev object %p (%pM)"
  1304. " - its last peer is done"),
  1305. vdev, vdev->mac_addr.raw);
  1306. /* all peers are gone, go ahead and delete it */
  1307. qdf_mem_free(vdev);
  1308. if (vdev_delete_cb)
  1309. vdev_delete_cb(vdev_delete_context);
  1310. }
  1311. } else {
  1312. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1313. }
  1314. #ifdef notyet
  1315. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1316. #else
  1317. qdf_mem_free(peer);
  1318. #endif
  1319. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1320. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc);
  1321. }
  1322. } else {
  1323. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1324. }
  1325. }
  1326. /*
  1327. * dp_peer_detach_wifi3() – Detach txrx peer
  1328. * @peer_handle: Datapath peer handle
  1329. *
  1330. */
  1331. void dp_peer_delete_wifi3(void *peer_handle)
  1332. {
  1333. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1334. /* redirect the peer's rx delivery function to point to a
  1335. * discard func
  1336. */
  1337. peer->rx_opt_proc = dp_rx_discard;
  1338. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1339. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1340. /*
  1341. * Remove the reference added during peer_attach.
  1342. * The peer will still be left allocated until the
  1343. * PEER_UNMAP message arrives to remove the other
  1344. * reference, added by the PEER_MAP message.
  1345. */
  1346. dp_peer_unref_delete(peer_handle);
  1347. #ifndef CONFIG_WIN
  1348. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1349. #endif
  1350. qdf_spinlock_destroy(&peer->peer_info_lock);
  1351. }
  1352. /*
  1353. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1354. * @peer_handle: Datapath peer handle
  1355. *
  1356. */
  1357. uint8 *dp_get_vdev_mac_addr_wifi3(void *pvdev)
  1358. {
  1359. struct dp_vdev *vdev = pvdev;
  1360. return vdev->mac_addr.raw;
  1361. }
  1362. /*
  1363. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1364. * @peer_handle: Datapath peer handle
  1365. *
  1366. */
  1367. void *dp_get_vdev_from_vdev_id_wifi3(void *dev, uint8_t vdev_id)
  1368. {
  1369. struct dp_pdev *pdev = dev;
  1370. struct dp_vdev *vdev = NULL;
  1371. if (qdf_unlikely(!pdev))
  1372. return NULL;
  1373. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1374. if (vdev->vdev_id == vdev_id)
  1375. break;
  1376. }
  1377. return vdev;
  1378. }
  1379. int dp_get_opmode(void *vdev_handle)
  1380. {
  1381. struct dp_vdev *vdev = vdev_handle;
  1382. return vdev->opmode;
  1383. }
  1384. void *dp_get_ctrl_pdev_from_vdev_wifi3(void *pvdev)
  1385. {
  1386. struct dp_vdev *vdev = pvdev;
  1387. struct dp_pdev *pdev = vdev->pdev;
  1388. return (void *)pdev->wlan_cfg_ctx;
  1389. }
  1390. static struct cdp_cmn_ops dp_ops_cmn = {
  1391. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1392. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1393. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1394. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1395. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1396. .txrx_peer_create = dp_peer_create_wifi3,
  1397. .txrx_peer_setup = dp_peer_setup_wifi3,
  1398. .txrx_peer_teardown = NULL,
  1399. .txrx_peer_delete = dp_peer_delete_wifi3,
  1400. .txrx_vdev_register = dp_vdev_register_wifi3,
  1401. .txrx_soc_detach = dp_soc_detach_wifi3,
  1402. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1403. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1404. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1405. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  1406. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  1407. .delba_process = dp_delba_process_wifi3,
  1408. /* TODO: Add other functions */
  1409. };
  1410. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1411. .txrx_peer_authorize = dp_peer_authorize,
  1412. /* TODO: Add other functions */
  1413. };
  1414. static struct cdp_me_ops dp_ops_me = {
  1415. /* TODO */
  1416. };
  1417. static struct cdp_mon_ops dp_ops_mon = {
  1418. /* TODO */
  1419. };
  1420. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1421. /* TODO */
  1422. };
  1423. static struct cdp_wds_ops dp_ops_wds = {
  1424. /* TODO */
  1425. };
  1426. static struct cdp_raw_ops dp_ops_raw = {
  1427. /* TODO */
  1428. };
  1429. #ifdef CONFIG_WIN
  1430. static struct cdp_pflow_ops dp_ops_pflow = {
  1431. /* TODO */
  1432. };
  1433. #endif /* CONFIG_WIN */
  1434. #ifndef CONFIG_WIN
  1435. static struct cdp_misc_ops dp_ops_misc = {
  1436. .get_opmode = dp_get_opmode,
  1437. };
  1438. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1439. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1440. };
  1441. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1442. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1443. };
  1444. static struct cdp_ipa_ops dp_ops_ipa = {
  1445. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1446. };
  1447. static struct cdp_lro_ops dp_ops_lro = {
  1448. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1449. };
  1450. /**
  1451. * dp_dummy_bus_suspend() - dummy bus suspend op
  1452. *
  1453. * FIXME - This is a placeholder for the actual logic!
  1454. *
  1455. * Return: QDF_STATUS_SUCCESS
  1456. */
  1457. inline QDF_STATUS dp_dummy_bus_suspend(void)
  1458. {
  1459. return QDF_STATUS_SUCCESS;
  1460. }
  1461. /**
  1462. * dp_dummy_bus_resume() - dummy bus resume
  1463. *
  1464. * FIXME - This is a placeholder for the actual logic!
  1465. *
  1466. * Return: QDF_STATUS_SUCCESS
  1467. */
  1468. inline QDF_STATUS dp_dummy_bus_resume(void)
  1469. {
  1470. return QDF_STATUS_SUCCESS;
  1471. }
  1472. static struct cdp_bus_ops dp_ops_bus = {
  1473. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1474. .bus_suspend = dp_dummy_bus_suspend,
  1475. .bus_resume = dp_dummy_bus_resume
  1476. };
  1477. static struct cdp_ocb_ops dp_ops_ocb = {
  1478. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1479. };
  1480. static struct cdp_throttle_ops dp_ops_throttle = {
  1481. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1482. };
  1483. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1484. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1485. };
  1486. static struct cdp_cfg_ops dp_ops_cfg = {
  1487. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1488. };
  1489. static struct cdp_peer_ops dp_ops_peer = {
  1490. .register_peer = dp_register_peer,
  1491. .clear_peer = dp_clear_peer,
  1492. .find_peer_by_addr = dp_find_peer_by_addr,
  1493. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1494. .local_peer_id = dp_local_peer_id,
  1495. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1496. .peer_state_update = dp_peer_state_update,
  1497. .get_vdevid = dp_get_vdevid,
  1498. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1499. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1500. .get_peer_state = dp_get_peer_state,
  1501. };
  1502. #endif
  1503. static struct cdp_ops dp_txrx_ops = {
  1504. .cmn_drv_ops = &dp_ops_cmn,
  1505. .ctrl_ops = &dp_ops_ctrl,
  1506. .me_ops = &dp_ops_me,
  1507. .mon_ops = &dp_ops_mon,
  1508. .host_stats_ops = &dp_ops_host_stats,
  1509. .wds_ops = &dp_ops_wds,
  1510. .raw_ops = &dp_ops_raw,
  1511. #ifdef CONFIG_WIN
  1512. .pflow_ops = &dp_ops_pflow,
  1513. #endif /* CONFIG_WIN */
  1514. #ifndef CONFIG_WIN
  1515. .misc_ops = &dp_ops_misc,
  1516. .cfg_ops = &dp_ops_cfg,
  1517. .flowctl_ops = &dp_ops_flowctl,
  1518. .l_flowctl_ops = &dp_ops_l_flowctl,
  1519. .ipa_ops = &dp_ops_ipa,
  1520. .lro_ops = &dp_ops_lro,
  1521. .bus_ops = &dp_ops_bus,
  1522. .ocb_ops = &dp_ops_ocb,
  1523. .peer_ops = &dp_ops_peer,
  1524. .throttle_ops = &dp_ops_throttle,
  1525. .mob_stats_ops = &dp_ops_mob_stats,
  1526. #endif
  1527. };
  1528. /*
  1529. * dp_soc_attach_wifi3() - Attach txrx SOC
  1530. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1531. * @htc_handle: Opaque HTC handle
  1532. * @hif_handle: Opaque HIF handle
  1533. * @qdf_osdev: QDF device
  1534. *
  1535. * Return: DP SOC handle on success, NULL on failure
  1536. */
  1537. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1538. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1539. struct ol_if_ops *ol_ops)
  1540. {
  1541. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1542. if (!soc) {
  1543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1544. FL("DP SOC memory allocation failed"));
  1545. goto fail0;
  1546. }
  1547. soc->cdp_soc.ops = &dp_txrx_ops;
  1548. soc->cdp_soc.ol_ops = ol_ops;
  1549. soc->osif_soc = osif_soc;
  1550. soc->osdev = qdf_osdev;
  1551. soc->hif_handle = hif_handle;
  1552. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1553. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1554. soc->hal_soc, qdf_osdev);
  1555. if (!soc->htt_handle) {
  1556. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1557. FL("HTT attach failed"));
  1558. goto fail1;
  1559. }
  1560. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1561. if (!soc->wlan_cfg_ctx) {
  1562. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1563. FL("wlan_cfg_soc_attach failed"));
  1564. goto fail2;
  1565. }
  1566. qdf_spinlock_create(&soc->peer_ref_mutex);
  1567. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1568. goto fail2;
  1569. }
  1570. return (void *)soc;
  1571. fail2:
  1572. htt_soc_detach(soc->htt_handle);
  1573. fail1:
  1574. qdf_mem_free(soc);
  1575. fail0:
  1576. return NULL;
  1577. }