dp_main.c 83 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <hal_api.h>
  22. #include <hif.h>
  23. #include <htt.h>
  24. #include <wdi_event.h>
  25. #include <queue.h>
  26. #include "dp_htt.h"
  27. #include "dp_types.h"
  28. #include "dp_internal.h"
  29. #include "dp_tx.h"
  30. #include "dp_rx.h"
  31. #include <cdp_txrx_handle.h>
  32. #include <wlan_cfg.h>
  33. #include "cdp_txrx_cmn_struct.h"
  34. #include <qdf_util.h>
  35. #include "dp_peer.h"
  36. #define DP_INTR_POLL_TIMER_MS 100
  37. #define DP_MCS_LENGTH (6*MAX_MCS)
  38. #define DP_NSS_LENGTH (6*SS_COUNT)
  39. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  40. #define DP_REO_ERR_LENGTH (6*REO_ERROR_TYPE_MAX)
  41. /**
  42. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  43. */
  44. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  45. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  46. {
  47. void *hal_soc = soc->hal_soc;
  48. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  49. /* TODO: See if we should get align size from hal */
  50. uint32_t ring_base_align = 8;
  51. struct hal_srng_params ring_params;
  52. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  53. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  54. srng->hal_srng = NULL;
  55. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  56. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  57. soc->osdev, soc->osdev->dev, srng->alloc_size,
  58. &(srng->base_paddr_unaligned));
  59. if (!srng->base_vaddr_unaligned) {
  60. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  61. FL("alloc failed - ring_type: %d, ring_num %d"),
  62. ring_type, ring_num);
  63. return QDF_STATUS_E_NOMEM;
  64. }
  65. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  66. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  67. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  68. ((unsigned long)(ring_params.ring_base_vaddr) -
  69. (unsigned long)srng->base_vaddr_unaligned);
  70. ring_params.num_entries = num_entries;
  71. /* TODO: Check MSI support and get MSI settings from HIF layer */
  72. ring_params.msi_data = 0;
  73. ring_params.msi_addr = 0;
  74. /* TODO: Setup interrupt timer and batch counter thresholds for
  75. * interrupt mitigation based on ring type
  76. */
  77. ring_params.intr_timer_thres_us = 8;
  78. ring_params.intr_batch_cntr_thres_entries = 1;
  79. /* TODO: Currently hal layer takes care of endianness related settings.
  80. * See if these settings need to passed from DP layer
  81. */
  82. ring_params.flags = 0;
  83. /* Enable low threshold interrupts for rx buffer rings (regular and
  84. * monitor buffer rings.
  85. * TODO: See if this is required for any other ring
  86. */
  87. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  88. /* TODO: Setting low threshold to 1/8th of ring size
  89. * see if this needs to be configurable
  90. */
  91. ring_params.low_threshold = num_entries >> 3;
  92. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  93. }
  94. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  95. mac_id, &ring_params);
  96. return 0;
  97. }
  98. /**
  99. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  100. * Any buffers allocated and attached to ring entries are expected to be freed
  101. * before calling this function.
  102. */
  103. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  104. int ring_type, int ring_num)
  105. {
  106. if (!srng->hal_srng) {
  107. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  108. FL("Ring type: %d, num:%d not setup"),
  109. ring_type, ring_num);
  110. return;
  111. }
  112. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  113. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  114. srng->alloc_size,
  115. srng->base_vaddr_unaligned,
  116. srng->base_paddr_unaligned, 0);
  117. }
  118. /* TODO: Need this interface from HIF */
  119. void *hif_get_hal_handle(void *hif_handle);
  120. /*
  121. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  122. * @dp_ctx: DP SOC handle
  123. * @budget: Number of frames/descriptors that can be processed in one shot
  124. *
  125. * Return: remaining budget/quota for the soc device
  126. */
  127. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  128. {
  129. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  130. struct dp_soc *soc = int_ctx->soc;
  131. int ring = 0;
  132. uint32_t work_done = 0;
  133. uint32_t budget = dp_budget;
  134. uint8_t tx_mask = int_ctx->tx_ring_mask;
  135. uint8_t rx_mask = int_ctx->rx_ring_mask;
  136. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  137. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  138. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  139. /* Process Tx completion interrupts first to return back buffers */
  140. if (tx_mask) {
  141. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  142. if (tx_mask & (1 << ring)) {
  143. work_done =
  144. dp_tx_comp_handler(soc, ring, budget);
  145. budget -= work_done;
  146. if (work_done)
  147. QDF_TRACE(QDF_MODULE_ID_DP,
  148. QDF_TRACE_LEVEL_INFO,
  149. "tx mask 0x%x ring %d,"
  150. "budget %d",
  151. tx_mask, ring, budget);
  152. if (budget <= 0)
  153. goto budget_done;
  154. }
  155. }
  156. }
  157. /* Process REO Exception ring interrupt */
  158. if (rx_err_mask) {
  159. work_done = dp_rx_err_process(soc,
  160. soc->reo_exception_ring.hal_srng, budget);
  161. budget -= work_done;
  162. if (work_done)
  163. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  164. "REO Exception Ring: work_done %d budget %d",
  165. work_done, budget);
  166. if (budget <= 0) {
  167. goto budget_done;
  168. }
  169. }
  170. /* Process Rx WBM release ring interrupt */
  171. if (rx_wbm_rel_mask) {
  172. work_done = dp_rx_wbm_err_process(soc,
  173. soc->rx_rel_ring.hal_srng, budget);
  174. budget -= work_done;
  175. if (work_done)
  176. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  177. "WBM Release Ring: work_done %d budget %d",
  178. work_done, budget);
  179. if (budget <= 0) {
  180. goto budget_done;
  181. }
  182. }
  183. /* Process Rx interrupts */
  184. if (rx_mask) {
  185. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  186. if (rx_mask & (1 << ring)) {
  187. work_done =
  188. dp_rx_process(soc,
  189. soc->reo_dest_ring[ring].hal_srng,
  190. budget);
  191. budget -= work_done;
  192. if (work_done)
  193. QDF_TRACE(QDF_MODULE_ID_DP,
  194. QDF_TRACE_LEVEL_INFO,
  195. "rx mask 0x%x ring %d,"
  196. "budget %d",
  197. tx_mask, ring, budget);
  198. if (budget <= 0)
  199. goto budget_done;
  200. }
  201. }
  202. }
  203. if (reo_status_mask)
  204. dp_reo_status_ring_handler(soc);
  205. budget_done:
  206. return dp_budget - budget;
  207. }
  208. /* dp_interrupt_timer()- timer poll for interrupts
  209. *
  210. * @arg: SoC Handle
  211. *
  212. * Return:
  213. *
  214. */
  215. #ifdef DP_INTR_POLL_BASED
  216. static void dp_interrupt_timer(void *arg)
  217. {
  218. struct dp_soc *soc = (struct dp_soc *) arg;
  219. int i;
  220. if (qdf_atomic_read(&soc->cmn_init_done)) {
  221. for (i = 0;
  222. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  223. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  224. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  225. }
  226. }
  227. /*
  228. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  229. * @txrx_soc: DP SOC handle
  230. *
  231. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  232. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  233. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  234. *
  235. * Return: 0 for success. nonzero for failure.
  236. */
  237. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  238. {
  239. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  240. int i;
  241. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  242. soc->intr_ctx[i].tx_ring_mask = 0xF;
  243. soc->intr_ctx[i].rx_ring_mask = 0xF;
  244. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  245. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  246. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  247. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  248. soc->intr_ctx[i].soc = soc;
  249. }
  250. qdf_timer_init(soc->osdev, &soc->int_timer,
  251. dp_interrupt_timer, (void *)soc,
  252. QDF_TIMER_TYPE_WAKE_APPS);
  253. return QDF_STATUS_SUCCESS;
  254. }
  255. /*
  256. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  257. * @txrx_soc: DP SOC handle
  258. *
  259. * Return: void
  260. */
  261. static void dp_soc_interrupt_detach(void *txrx_soc)
  262. {
  263. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  264. qdf_timer_stop(&soc->int_timer);
  265. qdf_timer_free(&soc->int_timer);
  266. }
  267. #else
  268. /*
  269. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  270. * @txrx_soc: DP SOC handle
  271. *
  272. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  273. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  274. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  275. *
  276. * Return: 0 for success. nonzero for failure.
  277. */
  278. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  279. {
  280. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  281. int i = 0;
  282. int num_irq = 0;
  283. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  284. int j = 0;
  285. int ret = 0;
  286. /* Map of IRQ ids registered with one interrupt context */
  287. int irq_id_map[HIF_MAX_GRP_IRQ];
  288. int tx_mask =
  289. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  290. int rx_mask =
  291. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  292. int rx_mon_mask =
  293. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  294. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  295. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  296. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  297. soc->intr_ctx[i].soc = soc;
  298. num_irq = 0;
  299. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  300. if (tx_mask & (1 << j)) {
  301. irq_id_map[num_irq++] =
  302. (wbm2host_tx_completions_ring1 - j);
  303. }
  304. if (rx_mask & (1 << j)) {
  305. irq_id_map[num_irq++] =
  306. (reo2host_destination_ring1 - j);
  307. }
  308. if (rx_mon_mask & (1 << j)) {
  309. irq_id_map[num_irq++] =
  310. (rxdma2host_monitor_destination_mac1
  311. - j);
  312. }
  313. }
  314. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  315. num_irq, irq_id_map,
  316. dp_service_srngs,
  317. &soc->intr_ctx[i]);
  318. if (ret) {
  319. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  320. FL("failed, ret = %d"), ret);
  321. return QDF_STATUS_E_FAILURE;
  322. }
  323. }
  324. return QDF_STATUS_SUCCESS;
  325. }
  326. /*
  327. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  328. * @txrx_soc: DP SOC handle
  329. *
  330. * Return: void
  331. */
  332. static void dp_soc_interrupt_detach(void *txrx_soc)
  333. {
  334. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  335. int i;
  336. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  337. soc->intr_ctx[i].tx_ring_mask = 0;
  338. soc->intr_ctx[i].rx_ring_mask = 0;
  339. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  340. }
  341. }
  342. #endif
  343. #define AVG_MAX_MPDUS_PER_TID 128
  344. #define AVG_TIDS_PER_CLIENT 2
  345. #define AVG_FLOWS_PER_TID 2
  346. #define AVG_MSDUS_PER_FLOW 128
  347. #define AVG_MSDUS_PER_MPDU 4
  348. /*
  349. * Allocate and setup link descriptor pool that will be used by HW for
  350. * various link and queue descriptors and managed by WBM
  351. */
  352. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  353. {
  354. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  355. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  356. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  357. uint32_t num_mpdus_per_link_desc =
  358. hal_num_mpdus_per_link_desc(soc->hal_soc);
  359. uint32_t num_msdus_per_link_desc =
  360. hal_num_msdus_per_link_desc(soc->hal_soc);
  361. uint32_t num_mpdu_links_per_queue_desc =
  362. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  363. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  364. uint32_t total_link_descs, total_mem_size;
  365. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  366. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  367. uint32_t num_link_desc_banks;
  368. uint32_t last_bank_size = 0;
  369. uint32_t entry_size, num_entries;
  370. int i;
  371. /* Only Tx queue descriptors are allocated from common link descriptor
  372. * pool Rx queue descriptors are not included in this because (REO queue
  373. * extension descriptors) they are expected to be allocated contiguously
  374. * with REO queue descriptors
  375. */
  376. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  377. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  378. num_mpdu_queue_descs = num_mpdu_link_descs /
  379. num_mpdu_links_per_queue_desc;
  380. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  381. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  382. num_msdus_per_link_desc;
  383. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  384. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  385. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  386. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  387. /* Round up to power of 2 */
  388. total_link_descs = 1;
  389. while (total_link_descs < num_entries)
  390. total_link_descs <<= 1;
  391. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  392. FL("total_link_descs: %u, link_desc_size: %d"),
  393. total_link_descs, link_desc_size);
  394. total_mem_size = total_link_descs * link_desc_size;
  395. total_mem_size += link_desc_align;
  396. if (total_mem_size <= max_alloc_size) {
  397. num_link_desc_banks = 0;
  398. last_bank_size = total_mem_size;
  399. } else {
  400. num_link_desc_banks = (total_mem_size) /
  401. (max_alloc_size - link_desc_align);
  402. last_bank_size = total_mem_size %
  403. (max_alloc_size - link_desc_align);
  404. }
  405. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  406. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  407. total_mem_size, num_link_desc_banks);
  408. for (i = 0; i < num_link_desc_banks; i++) {
  409. soc->link_desc_banks[i].base_vaddr_unaligned =
  410. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  411. max_alloc_size,
  412. &(soc->link_desc_banks[i].base_paddr_unaligned));
  413. soc->link_desc_banks[i].size = max_alloc_size;
  414. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  415. soc->link_desc_banks[i].base_vaddr_unaligned) +
  416. ((unsigned long)(
  417. soc->link_desc_banks[i].base_vaddr_unaligned) %
  418. link_desc_align));
  419. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  420. soc->link_desc_banks[i].base_paddr_unaligned) +
  421. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  422. (unsigned long)(
  423. soc->link_desc_banks[i].base_vaddr_unaligned));
  424. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  425. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  426. FL("Link descriptor memory alloc failed"));
  427. goto fail;
  428. }
  429. }
  430. if (last_bank_size) {
  431. /* Allocate last bank in case total memory required is not exact
  432. * multiple of max_alloc_size
  433. */
  434. soc->link_desc_banks[i].base_vaddr_unaligned =
  435. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  436. last_bank_size,
  437. &(soc->link_desc_banks[i].base_paddr_unaligned));
  438. soc->link_desc_banks[i].size = last_bank_size;
  439. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  440. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  441. ((unsigned long)(
  442. soc->link_desc_banks[i].base_vaddr_unaligned) %
  443. link_desc_align));
  444. soc->link_desc_banks[i].base_paddr =
  445. (unsigned long)(
  446. soc->link_desc_banks[i].base_paddr_unaligned) +
  447. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  448. (unsigned long)(
  449. soc->link_desc_banks[i].base_vaddr_unaligned));
  450. }
  451. /* Allocate and setup link descriptor idle list for HW internal use */
  452. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  453. total_mem_size = entry_size * total_link_descs;
  454. if (total_mem_size <= max_alloc_size) {
  455. void *desc;
  456. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  457. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  458. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  459. FL("Link desc idle ring setup failed"));
  460. goto fail;
  461. }
  462. hal_srng_access_start_unlocked(soc->hal_soc,
  463. soc->wbm_idle_link_ring.hal_srng);
  464. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  465. soc->link_desc_banks[i].base_paddr; i++) {
  466. uint32_t num_entries = (soc->link_desc_banks[i].size -
  467. (unsigned long)(
  468. soc->link_desc_banks[i].base_vaddr) -
  469. (unsigned long)(
  470. soc->link_desc_banks[i].base_vaddr_unaligned))
  471. / link_desc_size;
  472. unsigned long paddr = (unsigned long)(
  473. soc->link_desc_banks[i].base_paddr);
  474. while (num_entries && (desc = hal_srng_src_get_next(
  475. soc->hal_soc,
  476. soc->wbm_idle_link_ring.hal_srng))) {
  477. hal_set_link_desc_addr(desc, i, paddr);
  478. num_entries--;
  479. paddr += link_desc_size;
  480. }
  481. }
  482. hal_srng_access_end_unlocked(soc->hal_soc,
  483. soc->wbm_idle_link_ring.hal_srng);
  484. } else {
  485. uint32_t num_scatter_bufs;
  486. uint32_t num_entries_per_buf;
  487. uint32_t rem_entries;
  488. uint8_t *scatter_buf_ptr;
  489. uint16_t scatter_buf_num;
  490. soc->wbm_idle_scatter_buf_size =
  491. hal_idle_list_scatter_buf_size(soc->hal_soc);
  492. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  493. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  494. num_scatter_bufs = (total_mem_size /
  495. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  496. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  497. for (i = 0; i < num_scatter_bufs; i++) {
  498. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  499. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  500. soc->wbm_idle_scatter_buf_size,
  501. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  502. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  503. QDF_TRACE(QDF_MODULE_ID_DP,
  504. QDF_TRACE_LEVEL_ERROR,
  505. FL("Scatter list memory alloc failed"));
  506. goto fail;
  507. }
  508. }
  509. /* Populate idle list scatter buffers with link descriptor
  510. * pointers
  511. */
  512. scatter_buf_num = 0;
  513. scatter_buf_ptr = (uint8_t *)(
  514. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  515. rem_entries = num_entries_per_buf;
  516. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  517. soc->link_desc_banks[i].base_paddr; i++) {
  518. uint32_t num_link_descs =
  519. (soc->link_desc_banks[i].size -
  520. (unsigned long)(
  521. soc->link_desc_banks[i].base_vaddr) -
  522. (unsigned long)(
  523. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  524. link_desc_size;
  525. unsigned long paddr = (unsigned long)(
  526. soc->link_desc_banks[i].base_paddr);
  527. void *desc = NULL;
  528. while (num_link_descs && (desc =
  529. hal_srng_src_get_next(soc->hal_soc,
  530. soc->wbm_idle_link_ring.hal_srng))) {
  531. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  532. i, paddr);
  533. num_link_descs--;
  534. paddr += link_desc_size;
  535. if (rem_entries) {
  536. rem_entries--;
  537. scatter_buf_ptr += link_desc_size;
  538. } else {
  539. rem_entries = num_entries_per_buf;
  540. scatter_buf_num++;
  541. scatter_buf_ptr = (uint8_t *)(
  542. soc->wbm_idle_scatter_buf_base_vaddr[
  543. scatter_buf_num]);
  544. }
  545. }
  546. }
  547. /* Setup link descriptor idle list in HW */
  548. hal_setup_link_idle_list(soc->hal_soc,
  549. soc->wbm_idle_scatter_buf_base_paddr,
  550. soc->wbm_idle_scatter_buf_base_vaddr,
  551. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  552. (uint32_t)(scatter_buf_ptr -
  553. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  554. scatter_buf_num])));
  555. }
  556. return 0;
  557. fail:
  558. if (soc->wbm_idle_link_ring.hal_srng) {
  559. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  560. WBM_IDLE_LINK, 0);
  561. }
  562. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  563. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  564. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  565. soc->wbm_idle_scatter_buf_size,
  566. soc->wbm_idle_scatter_buf_base_vaddr[i],
  567. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  568. }
  569. }
  570. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  571. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  572. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  573. soc->link_desc_banks[i].size,
  574. soc->link_desc_banks[i].base_vaddr_unaligned,
  575. soc->link_desc_banks[i].base_paddr_unaligned,
  576. 0);
  577. }
  578. }
  579. return QDF_STATUS_E_FAILURE;
  580. }
  581. #ifdef notused
  582. /*
  583. * Free link descriptor pool that was setup HW
  584. */
  585. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  586. {
  587. int i;
  588. if (soc->wbm_idle_link_ring.hal_srng) {
  589. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  590. WBM_IDLE_LINK, 0);
  591. }
  592. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  593. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  594. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  595. soc->wbm_idle_scatter_buf_size,
  596. soc->wbm_idle_scatter_buf_base_vaddr[i],
  597. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  598. }
  599. }
  600. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  601. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  602. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  603. soc->link_desc_banks[i].size,
  604. soc->link_desc_banks[i].base_vaddr_unaligned,
  605. soc->link_desc_banks[i].base_paddr_unaligned,
  606. 0);
  607. }
  608. }
  609. }
  610. #endif /* notused */
  611. /* TODO: Following should be configurable */
  612. #define WBM_RELEASE_RING_SIZE 64
  613. #define TCL_DATA_RING_SIZE 512
  614. #define TX_COMP_RING_SIZE 1024
  615. #define TCL_CMD_RING_SIZE 32
  616. #define TCL_STATUS_RING_SIZE 32
  617. #define REO_DST_RING_SIZE 2048
  618. #define REO_REINJECT_RING_SIZE 32
  619. #define RX_RELEASE_RING_SIZE 1024
  620. #define REO_EXCEPTION_RING_SIZE 128
  621. #define REO_CMD_RING_SIZE 32
  622. #define REO_STATUS_RING_SIZE 32
  623. #define RXDMA_BUF_RING_SIZE 1024
  624. #define RXDMA_REFILL_RING_SIZE 2048
  625. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  626. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  627. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  628. /*
  629. * dp_soc_cmn_setup() - Common SoC level initializion
  630. * @soc: Datapath SOC handle
  631. *
  632. * This is an internal function used to setup common SOC data structures,
  633. * to be called from PDEV attach after receiving HW mode capabilities from FW
  634. */
  635. static int dp_soc_cmn_setup(struct dp_soc *soc)
  636. {
  637. int i;
  638. struct hal_reo_params reo_params;
  639. if (qdf_atomic_read(&soc->cmn_init_done))
  640. return 0;
  641. if (dp_peer_find_attach(soc))
  642. goto fail0;
  643. if (dp_hw_link_desc_pool_setup(soc))
  644. goto fail1;
  645. /* Setup SRNG rings */
  646. /* Common rings */
  647. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  648. WBM_RELEASE_RING_SIZE)) {
  649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  650. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  651. goto fail1;
  652. }
  653. soc->num_tcl_data_rings = 0;
  654. /* Tx data rings */
  655. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  656. soc->num_tcl_data_rings =
  657. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  658. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  659. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  660. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  661. QDF_TRACE(QDF_MODULE_ID_DP,
  662. QDF_TRACE_LEVEL_ERROR,
  663. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  664. goto fail1;
  665. }
  666. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  667. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  668. QDF_TRACE(QDF_MODULE_ID_DP,
  669. QDF_TRACE_LEVEL_ERROR,
  670. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  671. goto fail1;
  672. }
  673. }
  674. } else {
  675. /* This will be incremented during per pdev ring setup */
  676. soc->num_tcl_data_rings = 0;
  677. }
  678. if (dp_tx_soc_attach(soc)) {
  679. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  680. FL("dp_tx_soc_attach failed"));
  681. goto fail1;
  682. }
  683. /* TCL command and status rings */
  684. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  685. TCL_CMD_RING_SIZE)) {
  686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  687. FL("dp_srng_setup failed for tcl_cmd_ring"));
  688. goto fail1;
  689. }
  690. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  691. TCL_STATUS_RING_SIZE)) {
  692. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  693. FL("dp_srng_setup failed for tcl_status_ring"));
  694. goto fail1;
  695. }
  696. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  697. * descriptors
  698. */
  699. /* Rx data rings */
  700. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  701. soc->num_reo_dest_rings =
  702. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  703. QDF_TRACE(QDF_MODULE_ID_DP,
  704. QDF_TRACE_LEVEL_ERROR,
  705. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  706. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  707. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  708. i, 0, REO_DST_RING_SIZE)) {
  709. QDF_TRACE(QDF_MODULE_ID_DP,
  710. QDF_TRACE_LEVEL_ERROR,
  711. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  712. goto fail1;
  713. }
  714. }
  715. } else {
  716. /* This will be incremented during per pdev ring setup */
  717. soc->num_reo_dest_rings = 0;
  718. }
  719. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  720. /* REO reinjection ring */
  721. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  722. REO_REINJECT_RING_SIZE)) {
  723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  724. FL("dp_srng_setup failed for reo_reinject_ring"));
  725. goto fail1;
  726. }
  727. /* Rx release ring */
  728. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  729. RX_RELEASE_RING_SIZE)) {
  730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  731. FL("dp_srng_setup failed for rx_rel_ring"));
  732. goto fail1;
  733. }
  734. /* Rx exception ring */
  735. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  736. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  738. FL("dp_srng_setup failed for reo_exception_ring"));
  739. goto fail1;
  740. }
  741. /* REO command and status rings */
  742. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  743. REO_CMD_RING_SIZE)) {
  744. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  745. FL("dp_srng_setup failed for reo_cmd_ring"));
  746. goto fail1;
  747. }
  748. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  749. TAILQ_INIT(&soc->rx.reo_cmd_list);
  750. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  751. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  752. REO_STATUS_RING_SIZE)) {
  753. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  754. FL("dp_srng_setup failed for reo_status_ring"));
  755. goto fail1;
  756. }
  757. dp_soc_interrupt_attach(soc);
  758. /* Setup HW REO */
  759. qdf_mem_zero(&reo_params, sizeof(reo_params));
  760. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx))
  761. reo_params.rx_hash_enabled = true;
  762. hal_reo_setup(soc->hal_soc, &reo_params);
  763. qdf_atomic_set(&soc->cmn_init_done, 1);
  764. return 0;
  765. fail1:
  766. /*
  767. * Cleanup will be done as part of soc_detach, which will
  768. * be called on pdev attach failure
  769. */
  770. fail0:
  771. return QDF_STATUS_E_FAILURE;
  772. }
  773. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  774. static void dp_lro_hash_setup(struct dp_soc *soc)
  775. {
  776. struct cdp_lro_hash_config lro_hash;
  777. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  778. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  780. FL("LRO disabled RX hash disabled"));
  781. return;
  782. }
  783. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  784. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  785. lro_hash.lro_enable = 1;
  786. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  787. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  788. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  789. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  790. }
  791. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, FL("enabled"));
  792. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  793. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  794. LRO_IPV4_SEED_ARR_SZ));
  795. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  796. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  797. LRO_IPV6_SEED_ARR_SZ));
  798. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  799. "lro_hash: lro_enable: 0x%x"
  800. "lro_hash: tcp_flag 0x%x tcp_flag_mask 0x%x",
  801. lro_hash.lro_enable, lro_hash.tcp_flag,
  802. lro_hash.tcp_flag_mask);
  803. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  804. FL("lro_hash: toeplitz_hash_ipv4:"));
  805. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  806. QDF_TRACE_LEVEL_ERROR,
  807. (void *)lro_hash.toeplitz_hash_ipv4,
  808. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  809. LRO_IPV4_SEED_ARR_SZ));
  810. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  811. FL("lro_hash: toeplitz_hash_ipv6:"));
  812. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  813. QDF_TRACE_LEVEL_ERROR,
  814. (void *)lro_hash.toeplitz_hash_ipv6,
  815. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  816. LRO_IPV6_SEED_ARR_SZ));
  817. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  818. if (soc->cdp_soc.ol_ops->lro_hash_config)
  819. (void)soc->cdp_soc.ol_ops->lro_hash_config
  820. (soc->osif_soc, &lro_hash);
  821. }
  822. /*
  823. * dp_rxdma_ring_setup() - configure the RX DMA rings
  824. * @soc: data path SoC handle
  825. * @pdev: Physical device handle
  826. *
  827. * Return: 0 - success, > 0 - failure
  828. */
  829. #ifdef QCA_HOST2FW_RXBUF_RING
  830. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  831. struct dp_pdev *pdev)
  832. {
  833. int max_mac_rings =
  834. wlan_cfg_get_num_mac_rings
  835. (pdev->wlan_cfg_ctx);
  836. int i;
  837. for (i = 0; i < max_mac_rings; i++) {
  838. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  839. "%s: pdev_id %d mac_id %d\n",
  840. __func__, pdev->pdev_id, i);
  841. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  842. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  843. QDF_TRACE(QDF_MODULE_ID_DP,
  844. QDF_TRACE_LEVEL_ERROR,
  845. FL("failed rx mac ring setup"));
  846. return QDF_STATUS_E_FAILURE;
  847. }
  848. }
  849. return QDF_STATUS_SUCCESS;
  850. }
  851. #else
  852. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  853. struct dp_pdev *pdev)
  854. {
  855. return QDF_STATUS_SUCCESS;
  856. }
  857. #endif
  858. /*
  859. * dp_pdev_attach_wifi3() - attach txrx pdev
  860. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  861. * @txrx_soc: Datapath SOC handle
  862. * @htc_handle: HTC handle for host-target interface
  863. * @qdf_osdev: QDF OS device
  864. * @pdev_id: PDEV ID
  865. *
  866. * Return: DP PDEV handle on success, NULL on failure
  867. */
  868. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  869. struct cdp_cfg *ctrl_pdev,
  870. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  871. {
  872. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  873. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  874. if (!pdev) {
  875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  876. FL("DP PDEV memory allocation failed"));
  877. goto fail0;
  878. }
  879. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  880. if (!pdev->wlan_cfg_ctx) {
  881. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  882. FL("pdev cfg_attach failed"));
  883. qdf_mem_free(pdev);
  884. goto fail0;
  885. }
  886. pdev->soc = soc;
  887. pdev->osif_pdev = ctrl_pdev;
  888. pdev->pdev_id = pdev_id;
  889. soc->pdev_list[pdev_id] = pdev;
  890. TAILQ_INIT(&pdev->vdev_list);
  891. pdev->vdev_count = 0;
  892. if (dp_soc_cmn_setup(soc)) {
  893. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  894. FL("dp_soc_cmn_setup failed"));
  895. goto fail1;
  896. }
  897. /* Setup per PDEV TCL rings if configured */
  898. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  899. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  900. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  901. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  902. FL("dp_srng_setup failed for tcl_data_ring"));
  903. goto fail1;
  904. }
  905. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  906. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  907. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  908. FL("dp_srng_setup failed for tx_comp_ring"));
  909. goto fail1;
  910. }
  911. soc->num_tcl_data_rings++;
  912. }
  913. /* Tx specific init */
  914. if (dp_tx_pdev_attach(pdev)) {
  915. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  916. FL("dp_tx_pdev_attach failed"));
  917. goto fail1;
  918. }
  919. /* Setup per PDEV REO rings if configured */
  920. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  921. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  922. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  924. FL("dp_srng_setup failed for reo_dest_ringn"));
  925. goto fail1;
  926. }
  927. soc->num_reo_dest_rings++;
  928. }
  929. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  930. RXDMA_REFILL_RING_SIZE)) {
  931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  932. FL("dp_srng_setup failed rx refill ring"));
  933. goto fail1;
  934. }
  935. if (dp_rxdma_ring_setup(soc, pdev)) {
  936. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  937. FL("RXDMA ring config failed"));
  938. goto fail1;
  939. }
  940. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  941. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  942. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  943. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  944. goto fail1;
  945. }
  946. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  947. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  948. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  949. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  950. goto fail1;
  951. }
  952. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  953. RXDMA_MONITOR_STATUS, 0, pdev_id,
  954. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  956. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  957. goto fail1;
  958. }
  959. /* Rx specific init */
  960. if (dp_rx_pdev_attach(pdev)) {
  961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  962. FL("dp_rx_pdev_attach failed "));
  963. goto fail0;
  964. }
  965. DP_STATS_INIT(pdev);
  966. #ifndef CONFIG_WIN
  967. /* MCL */
  968. dp_local_peer_id_pool_init(pdev);
  969. #endif
  970. dp_lro_hash_setup(soc);
  971. return (struct cdp_pdev *)pdev;
  972. fail1:
  973. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  974. fail0:
  975. return NULL;
  976. }
  977. /*
  978. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  979. * @soc: data path SoC handle
  980. * @pdev: Physical device handle
  981. *
  982. * Return: void
  983. */
  984. #ifdef QCA_HOST2FW_RXBUF_RING
  985. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  986. struct dp_pdev *pdev)
  987. {
  988. int max_mac_rings =
  989. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  990. int i;
  991. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  992. max_mac_rings : MAX_RX_MAC_RINGS;
  993. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  994. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  995. RXDMA_BUF, 1);
  996. }
  997. #else
  998. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  999. struct dp_pdev *pdev)
  1000. {
  1001. }
  1002. #endif
  1003. /*
  1004. * dp_pdev_detach_wifi3() - detach txrx pdev
  1005. * @txrx_pdev: Datapath PDEV handle
  1006. * @force: Force detach
  1007. *
  1008. */
  1009. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  1010. {
  1011. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1012. struct dp_soc *soc = pdev->soc;
  1013. dp_tx_pdev_detach(pdev);
  1014. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1015. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  1016. TCL_DATA, pdev->pdev_id);
  1017. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  1018. WBM2SW_RELEASE, pdev->pdev_id);
  1019. }
  1020. dp_rx_pdev_detach(pdev);
  1021. /* Setup per PDEV REO rings if configured */
  1022. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1023. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  1024. REO_DST, pdev->pdev_id);
  1025. }
  1026. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  1027. dp_rxdma_ring_cleanup(soc, pdev);
  1028. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  1029. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  1030. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  1031. RXDMA_MONITOR_STATUS, 0);
  1032. soc->pdev_list[pdev->pdev_id] = NULL;
  1033. qdf_mem_free(pdev);
  1034. }
  1035. /*
  1036. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  1037. * @soc: DP SOC handle
  1038. */
  1039. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  1040. {
  1041. struct reo_desc_list_node *desc;
  1042. struct dp_rx_tid *rx_tid;
  1043. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  1044. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  1045. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  1046. rx_tid = &desc->rx_tid;
  1047. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1048. rx_tid->hw_qdesc_alloc_size,
  1049. rx_tid->hw_qdesc_vaddr_unaligned,
  1050. rx_tid->hw_qdesc_paddr_unaligned, 0);
  1051. qdf_mem_free(desc);
  1052. }
  1053. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  1054. qdf_list_destroy(&soc->reo_desc_freelist);
  1055. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  1056. }
  1057. /*
  1058. * dp_soc_detach_wifi3() - Detach txrx SOC
  1059. * @txrx_soc: DP SOC handle
  1060. *
  1061. */
  1062. static void dp_soc_detach_wifi3(void *txrx_soc)
  1063. {
  1064. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1065. int i;
  1066. qdf_atomic_set(&soc->cmn_init_done, 0);
  1067. dp_soc_interrupt_detach(soc);
  1068. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1069. if (soc->pdev_list[i])
  1070. dp_pdev_detach_wifi3(
  1071. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1072. }
  1073. dp_peer_find_detach(soc);
  1074. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1075. * SW descriptors
  1076. */
  1077. /* Free the ring memories */
  1078. /* Common rings */
  1079. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1080. /* Tx data rings */
  1081. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1082. dp_tx_soc_detach(soc);
  1083. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1084. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1085. TCL_DATA, i);
  1086. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1087. WBM2SW_RELEASE, i);
  1088. }
  1089. }
  1090. /* TCL command and status rings */
  1091. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1092. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1093. /* Rx data rings */
  1094. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1095. soc->num_reo_dest_rings =
  1096. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1097. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1098. /* TODO: Get number of rings and ring sizes
  1099. * from wlan_cfg
  1100. */
  1101. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1102. REO_DST, i);
  1103. }
  1104. }
  1105. /* REO reinjection ring */
  1106. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1107. /* Rx release ring */
  1108. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1109. /* Rx exception ring */
  1110. /* TODO: Better to store ring_type and ring_num in
  1111. * dp_srng during setup
  1112. */
  1113. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1114. /* REO command and status rings */
  1115. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1116. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1117. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1118. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1119. htt_soc_detach(soc->htt_handle);
  1120. dp_reo_desc_freelist_destroy(soc);
  1121. }
  1122. /*
  1123. * dp_rxdma_ring_config() - configure the RX DMA rings
  1124. *
  1125. * This function is used to configure the MAC rings.
  1126. * On MCL host provides buffers in Host2FW ring
  1127. * FW refills (copies) buffers to the ring and updates
  1128. * ring_idx in register
  1129. *
  1130. * @soc: data path SoC handle
  1131. * @pdev: Physical device handle
  1132. *
  1133. * Return: void
  1134. */
  1135. #ifdef QCA_HOST2FW_RXBUF_RING
  1136. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1137. {
  1138. int i;
  1139. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1140. struct dp_pdev *pdev = soc->pdev_list[i];
  1141. if (pdev) {
  1142. int mac_id = 0;
  1143. int j;
  1144. int max_mac_rings =
  1145. wlan_cfg_get_num_mac_rings
  1146. (pdev->wlan_cfg_ctx);
  1147. htt_srng_setup(soc->htt_handle, 0,
  1148. pdev->rx_refill_buf_ring.hal_srng,
  1149. RXDMA_BUF);
  1150. if (!soc->cdp_soc.ol_ops->
  1151. is_hw_dbs_2x2_capable()) {
  1152. max_mac_rings = 1;
  1153. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1154. QDF_TRACE_LEVEL_ERROR,
  1155. FL("DBS enabled, max_mac_rings %d\n"),
  1156. max_mac_rings);
  1157. } else {
  1158. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1159. QDF_TRACE_LEVEL_ERROR,
  1160. FL("DBS disabled max_mac_rings %d\n"),
  1161. max_mac_rings);
  1162. }
  1163. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1164. FL("pdev_id %d max_mac_rings %d\n"),
  1165. pdev->pdev_id, max_mac_rings);
  1166. for (j = 0; j < max_mac_rings; j++) {
  1167. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1168. QDF_TRACE_LEVEL_ERROR,
  1169. FL("mac_id %d\n"), mac_id);
  1170. htt_srng_setup(soc->htt_handle, mac_id,
  1171. pdev->rx_mac_buf_ring[j]
  1172. .hal_srng,
  1173. RXDMA_BUF);
  1174. mac_id++;
  1175. }
  1176. }
  1177. }
  1178. }
  1179. #else
  1180. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1181. {
  1182. int i;
  1183. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1184. struct dp_pdev *pdev = soc->pdev_list[i];
  1185. if (pdev) {
  1186. htt_srng_setup(soc->htt_handle, i,
  1187. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1188. }
  1189. }
  1190. }
  1191. #endif
  1192. /*
  1193. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1194. * @txrx_soc: Datapath SOC handle
  1195. */
  1196. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1197. {
  1198. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1199. htt_soc_attach_target(soc->htt_handle);
  1200. dp_rxdma_ring_config(soc);
  1201. DP_STATS_INIT(soc);
  1202. return 0;
  1203. }
  1204. /*
  1205. * dp_vdev_attach_wifi3() - attach txrx vdev
  1206. * @txrx_pdev: Datapath PDEV handle
  1207. * @vdev_mac_addr: MAC address of the virtual interface
  1208. * @vdev_id: VDEV Id
  1209. * @wlan_op_mode: VDEV operating mode
  1210. *
  1211. * Return: DP VDEV handle on success, NULL on failure
  1212. */
  1213. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1214. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1215. {
  1216. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1217. struct dp_soc *soc = pdev->soc;
  1218. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1219. if (!vdev) {
  1220. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1221. FL("DP VDEV memory allocation failed"));
  1222. goto fail0;
  1223. }
  1224. vdev->pdev = pdev;
  1225. vdev->vdev_id = vdev_id;
  1226. vdev->opmode = op_mode;
  1227. vdev->osdev = soc->osdev;
  1228. vdev->osif_rx = NULL;
  1229. vdev->osif_rsim_rx_decap = NULL;
  1230. vdev->osif_rx_mon = NULL;
  1231. vdev->osif_tx_free_ext = NULL;
  1232. vdev->osif_vdev = NULL;
  1233. vdev->delete.pending = 0;
  1234. vdev->safemode = 0;
  1235. vdev->drop_unenc = 1;
  1236. #ifdef notyet
  1237. vdev->filters_num = 0;
  1238. #endif
  1239. qdf_mem_copy(
  1240. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1241. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1242. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1243. /* TODO: Initialize default HTT meta data that will be used in
  1244. * TCL descriptors for packets transmitted from this VDEV
  1245. */
  1246. TAILQ_INIT(&vdev->peer_list);
  1247. /* add this vdev into the pdev's list */
  1248. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1249. pdev->vdev_count++;
  1250. dp_tx_vdev_attach(vdev);
  1251. #ifdef DP_INTR_POLL_BASED
  1252. if (pdev->vdev_count == 1)
  1253. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1254. #endif
  1255. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1256. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1257. DP_STATS_INIT(vdev);
  1258. return (struct cdp_vdev *)vdev;
  1259. fail0:
  1260. return NULL;
  1261. }
  1262. /**
  1263. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1264. * @vdev: Datapath VDEV handle
  1265. * @osif_vdev: OSIF vdev handle
  1266. * @txrx_ops: Tx and Rx operations
  1267. *
  1268. * Return: DP VDEV handle on success, NULL on failure
  1269. */
  1270. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1271. void *osif_vdev,
  1272. struct ol_txrx_ops *txrx_ops)
  1273. {
  1274. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1275. vdev->osif_vdev = osif_vdev;
  1276. vdev->osif_rx = txrx_ops->rx.rx;
  1277. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1278. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1279. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1280. #ifdef notyet
  1281. #if ATH_SUPPORT_WAPI
  1282. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1283. #endif
  1284. #if UMAC_SUPPORT_PROXY_ARP
  1285. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1286. #endif
  1287. #endif
  1288. /* TODO: Enable the following once Tx code is integrated */
  1289. txrx_ops->tx.tx = dp_tx_send;
  1290. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1291. "DP Vdev Register success");
  1292. }
  1293. /*
  1294. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1295. * @txrx_vdev: Datapath VDEV handle
  1296. * @callback: Callback OL_IF on completion of detach
  1297. * @cb_context: Callback context
  1298. *
  1299. */
  1300. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1301. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1302. {
  1303. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1304. struct dp_pdev *pdev = vdev->pdev;
  1305. struct dp_soc *soc = pdev->soc;
  1306. /* preconditions */
  1307. qdf_assert(vdev);
  1308. /* remove the vdev from its parent pdev's list */
  1309. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1310. /*
  1311. * Use peer_ref_mutex while accessing peer_list, in case
  1312. * a peer is in the process of being removed from the list.
  1313. */
  1314. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1315. /* check that the vdev has no peers allocated */
  1316. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1317. /* debug print - will be removed later */
  1318. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1319. FL("not deleting vdev object %p (%pM)"
  1320. "until deletion finishes for all its peers"),
  1321. vdev, vdev->mac_addr.raw);
  1322. /* indicate that the vdev needs to be deleted */
  1323. vdev->delete.pending = 1;
  1324. vdev->delete.callback = callback;
  1325. vdev->delete.context = cb_context;
  1326. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1327. return;
  1328. }
  1329. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1330. dp_tx_vdev_detach(vdev);
  1331. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1332. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1333. qdf_mem_free(vdev);
  1334. if (callback)
  1335. callback(cb_context);
  1336. }
  1337. /*
  1338. * dp_peer_create_wifi3() - attach txrx peer
  1339. * @txrx_vdev: Datapath VDEV handle
  1340. * @peer_mac_addr: Peer MAC address
  1341. *
  1342. * Return: DP peeer handle on success, NULL on failure
  1343. */
  1344. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1345. uint8_t *peer_mac_addr)
  1346. {
  1347. struct dp_peer *peer;
  1348. int i;
  1349. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1350. struct dp_pdev *pdev;
  1351. struct dp_soc *soc;
  1352. /* preconditions */
  1353. qdf_assert(vdev);
  1354. qdf_assert(peer_mac_addr);
  1355. pdev = vdev->pdev;
  1356. soc = pdev->soc;
  1357. #ifdef notyet
  1358. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1359. soc->mempool_ol_ath_peer);
  1360. #else
  1361. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1362. #endif
  1363. if (!peer)
  1364. return NULL; /* failure */
  1365. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1366. qdf_spinlock_create(&peer->peer_info_lock);
  1367. /* store provided params */
  1368. peer->vdev = vdev;
  1369. qdf_mem_copy(
  1370. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1371. /* TODO: See of rx_opt_proc is really required */
  1372. peer->rx_opt_proc = soc->rx_opt_proc;
  1373. /* initialize the peer_id */
  1374. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1375. peer->peer_ids[i] = HTT_INVALID_PEER;
  1376. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1377. qdf_atomic_init(&peer->ref_cnt);
  1378. /* keep one reference for attach */
  1379. qdf_atomic_inc(&peer->ref_cnt);
  1380. /* add this peer into the vdev's list */
  1381. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1382. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1383. /* TODO: See if hash based search is required */
  1384. dp_peer_find_hash_add(soc, peer);
  1385. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1386. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1387. vdev, peer, peer->mac_addr.raw,
  1388. qdf_atomic_read(&peer->ref_cnt));
  1389. /*
  1390. * For every peer MAp message search and set if bss_peer
  1391. */
  1392. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1393. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1394. "vdev bss_peer!!!!");
  1395. peer->bss_peer = 1;
  1396. vdev->vap_bss_peer = peer;
  1397. }
  1398. #ifndef CONFIG_WIN
  1399. dp_local_peer_id_alloc(pdev, peer);
  1400. #endif
  1401. DP_STATS_INIT(peer);
  1402. return (void *)peer;
  1403. }
  1404. /*
  1405. * dp_peer_setup_wifi3() - initialize the peer
  1406. * @vdev_hdl: virtual device object
  1407. * @peer: Peer object
  1408. *
  1409. * Return: void
  1410. */
  1411. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1412. {
  1413. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1414. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1415. struct dp_pdev *pdev;
  1416. struct dp_soc *soc;
  1417. bool hash_based = 0;
  1418. /* preconditions */
  1419. qdf_assert(vdev);
  1420. qdf_assert(peer);
  1421. pdev = vdev->pdev;
  1422. soc = pdev->soc;
  1423. dp_peer_rx_init(pdev, peer);
  1424. peer->last_assoc_rcvd = 0;
  1425. peer->last_disassoc_rcvd = 0;
  1426. peer->last_deauth_rcvd = 0;
  1427. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  1428. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1429. FL("hash based steering %d\n"), hash_based);
  1430. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1431. /* TODO: Check the destination ring number to be passed to FW */
  1432. soc->cdp_soc.ol_ops->peer_set_default_routing(
  1433. pdev->osif_pdev, peer->mac_addr.raw,
  1434. peer->vdev->vdev_id, hash_based, 1);
  1435. }
  1436. return;
  1437. }
  1438. /*
  1439. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1440. * @vdev_handle: virtual device object
  1441. * @htt_pkt_type: type of pkt
  1442. *
  1443. * Return: void
  1444. */
  1445. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1446. enum htt_cmn_pkt_type val)
  1447. {
  1448. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1449. vdev->tx_encap_type = val;
  1450. }
  1451. /*
  1452. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1453. * @vdev_handle: virtual device object
  1454. * @htt_pkt_type: type of pkt
  1455. *
  1456. * Return: void
  1457. */
  1458. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1459. enum htt_cmn_pkt_type val)
  1460. {
  1461. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1462. vdev->rx_decap_type = val;
  1463. }
  1464. /*
  1465. * dp_peer_authorize() - authorize txrx peer
  1466. * @peer_handle: Datapath peer handle
  1467. * @authorize
  1468. *
  1469. */
  1470. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1471. {
  1472. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1473. struct dp_soc *soc;
  1474. if (peer != NULL) {
  1475. soc = peer->vdev->pdev->soc;
  1476. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1477. peer->authorize = authorize ? 1 : 0;
  1478. #ifdef notyet /* ATH_BAND_STEERING */
  1479. peer->peer_bs_inact_flag = 0;
  1480. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1481. #endif
  1482. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1483. }
  1484. }
  1485. /*
  1486. * dp_peer_unref_delete() - unref and delete peer
  1487. * @peer_handle: Datapath peer handle
  1488. *
  1489. */
  1490. void dp_peer_unref_delete(void *peer_handle)
  1491. {
  1492. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1493. struct dp_vdev *vdev = peer->vdev;
  1494. struct dp_soc *soc = vdev->pdev->soc;
  1495. struct dp_peer *tmppeer;
  1496. int found = 0;
  1497. uint16_t peer_id;
  1498. /*
  1499. * Hold the lock all the way from checking if the peer ref count
  1500. * is zero until the peer references are removed from the hash
  1501. * table and vdev list (if the peer ref count is zero).
  1502. * This protects against a new HL tx operation starting to use the
  1503. * peer object just after this function concludes it's done being used.
  1504. * Furthermore, the lock needs to be held while checking whether the
  1505. * vdev's list of peers is empty, to make sure that list is not modified
  1506. * concurrently with the empty check.
  1507. */
  1508. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1509. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1510. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1511. peer, qdf_atomic_read(&peer->ref_cnt));
  1512. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1513. peer_id = peer->peer_ids[0];
  1514. /*
  1515. * Make sure that the reference to the peer in
  1516. * peer object map is removed
  1517. */
  1518. if (peer_id != HTT_INVALID_PEER)
  1519. soc->peer_id_to_obj_map[peer_id] = NULL;
  1520. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1521. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1522. /* remove the reference to the peer from the hash table */
  1523. dp_peer_find_hash_remove(soc, peer);
  1524. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1525. if (tmppeer == peer) {
  1526. found = 1;
  1527. break;
  1528. }
  1529. }
  1530. if (found) {
  1531. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1532. peer_list_elem);
  1533. } else {
  1534. /*Ignoring the remove operation as peer not found*/
  1535. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1536. "peer %p not found in vdev (%p)->peer_list:%p",
  1537. peer, vdev, &peer->vdev->peer_list);
  1538. }
  1539. /* cleanup the peer data */
  1540. dp_peer_cleanup(vdev, peer);
  1541. /* check whether the parent vdev has no peers left */
  1542. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1543. /*
  1544. * Now that there are no references to the peer, we can
  1545. * release the peer reference lock.
  1546. */
  1547. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1548. /*
  1549. * Check if the parent vdev was waiting for its peers
  1550. * to be deleted, in order for it to be deleted too.
  1551. */
  1552. if (vdev->delete.pending) {
  1553. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1554. vdev->delete.callback;
  1555. void *vdev_delete_context =
  1556. vdev->delete.context;
  1557. QDF_TRACE(QDF_MODULE_ID_DP,
  1558. QDF_TRACE_LEVEL_INFO_HIGH,
  1559. FL("deleting vdev object %p (%pM)"
  1560. " - its last peer is done"),
  1561. vdev, vdev->mac_addr.raw);
  1562. /* all peers are gone, go ahead and delete it */
  1563. qdf_mem_free(vdev);
  1564. if (vdev_delete_cb)
  1565. vdev_delete_cb(vdev_delete_context);
  1566. }
  1567. } else {
  1568. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1569. }
  1570. #ifdef notyet
  1571. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1572. #else
  1573. qdf_mem_free(peer);
  1574. #endif
  1575. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1576. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc,
  1577. vdev->vdev_id, peer->mac_addr.raw);
  1578. }
  1579. } else {
  1580. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1581. }
  1582. }
  1583. /*
  1584. * dp_peer_detach_wifi3() – Detach txrx peer
  1585. * @peer_handle: Datapath peer handle
  1586. *
  1587. */
  1588. static void dp_peer_delete_wifi3(void *peer_handle)
  1589. {
  1590. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1591. /* redirect the peer's rx delivery function to point to a
  1592. * discard func
  1593. */
  1594. peer->rx_opt_proc = dp_rx_discard;
  1595. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1596. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1597. #ifndef CONFIG_WIN
  1598. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1599. #endif
  1600. qdf_spinlock_destroy(&peer->peer_info_lock);
  1601. /*
  1602. * Remove the reference added during peer_attach.
  1603. * The peer will still be left allocated until the
  1604. * PEER_UNMAP message arrives to remove the other
  1605. * reference, added by the PEER_MAP message.
  1606. */
  1607. dp_peer_unref_delete(peer_handle);
  1608. }
  1609. /*
  1610. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1611. * @peer_handle: Datapath peer handle
  1612. *
  1613. */
  1614. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1615. {
  1616. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1617. return vdev->mac_addr.raw;
  1618. }
  1619. /*
  1620. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1621. * @peer_handle: Datapath peer handle
  1622. *
  1623. */
  1624. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1625. uint8_t vdev_id)
  1626. {
  1627. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1628. struct dp_vdev *vdev = NULL;
  1629. if (qdf_unlikely(!pdev))
  1630. return NULL;
  1631. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1632. if (vdev->vdev_id == vdev_id)
  1633. break;
  1634. }
  1635. return (struct cdp_vdev *)vdev;
  1636. }
  1637. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1638. {
  1639. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1640. return vdev->opmode;
  1641. }
  1642. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1643. {
  1644. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1645. struct dp_pdev *pdev = vdev->pdev;
  1646. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1647. }
  1648. #ifdef MESH_MODE_SUPPORT
  1649. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  1650. {
  1651. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1652. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1653. FL("val %d"), val);
  1654. vdev->mesh_vdev = val;
  1655. }
  1656. /*
  1657. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  1658. * @vdev_hdl: virtual device object
  1659. * @val: value to be set
  1660. *
  1661. * Return: void
  1662. */
  1663. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  1664. {
  1665. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1666. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1667. FL("val %d"), val);
  1668. vdev->mesh_rx_filter = val;
  1669. }
  1670. #endif
  1671. /**
  1672. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  1673. * @vdev: DP VDEV handle
  1674. *
  1675. * return: void
  1676. */
  1677. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  1678. {
  1679. struct dp_peer *peer = NULL;
  1680. int i;
  1681. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  1682. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  1683. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  1684. if (!peer)
  1685. return;
  1686. for (i = 0; i <= MAX_MCS; i++) {
  1687. DP_STATS_AGGR(vdev, peer, tx.pkt_type[0].mcs_count[i]);
  1688. DP_STATS_AGGR(vdev, peer, tx.pkt_type[1].mcs_count[i]);
  1689. DP_STATS_AGGR(vdev, peer, tx.pkt_type[2].mcs_count[i]);
  1690. DP_STATS_AGGR(vdev, peer, tx.pkt_type[3].mcs_count[i]);
  1691. DP_STATS_AGGR(vdev, peer, tx.pkt_type[4].mcs_count[i]);
  1692. DP_STATS_AGGR(vdev, peer, rx.mcs_count[i]);
  1693. }
  1694. for (i = 0; i < SUPPORTED_BW; i++) {
  1695. DP_STATS_AGGR(vdev, peer, tx.bw[i]);
  1696. DP_STATS_AGGR(vdev, peer, rx.bw[i]);
  1697. }
  1698. for (i = 0; i < SS_COUNT; i++)
  1699. DP_STATS_AGGR(vdev, peer, rx.nss[i]);
  1700. for (i = 0; i < WME_AC_MAX; i++) {
  1701. DP_STATS_AGGR(vdev, peer, tx.wme_ac_type[i]);
  1702. DP_STATS_AGGR(vdev, peer, rx.wme_ac_type[i]);
  1703. DP_STATS_AGGR(vdev, peer, tx.excess_retries_ac[i]);
  1704. }
  1705. for (i = 0; i < MAX_MCS + 1; i++) {
  1706. DP_STATS_AGGR(vdev, peer, tx.sgi_count[i]);
  1707. DP_STATS_AGGR(vdev, peer, rx.sgi_count[i]);
  1708. }
  1709. DP_STATS_AGGR_PKT(vdev, peer, tx.comp_pkt);
  1710. DP_STATS_AGGR_PKT(vdev, peer, tx.ucast);
  1711. DP_STATS_AGGR_PKT(vdev, peer, tx.mcast);
  1712. DP_STATS_AGGR_PKT(vdev, peer, tx.tx_success);
  1713. DP_STATS_AGGR(vdev, peer, tx.tx_failed);
  1714. DP_STATS_AGGR(vdev, peer, tx.ofdma);
  1715. DP_STATS_AGGR(vdev, peer, tx.stbc);
  1716. DP_STATS_AGGR(vdev, peer, tx.ldpc);
  1717. DP_STATS_AGGR(vdev, peer, tx.retries);
  1718. DP_STATS_AGGR(vdev, peer, tx.non_amsdu_cnt);
  1719. DP_STATS_AGGR(vdev, peer, tx.amsdu_cnt);
  1720. DP_STATS_AGGR(vdev, peer, tx.dropped.dma_map_error);
  1721. DP_STATS_AGGR(vdev, peer, tx.dropped.ring_full);
  1722. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard);
  1723. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_retired);
  1724. DP_STATS_AGGR(vdev, peer, tx.dropped.mpdu_age_out);
  1725. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason1);
  1726. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason2);
  1727. DP_STATS_AGGR(vdev, peer, tx.dropped.fw_discard_reason3);
  1728. DP_STATS_AGGR(vdev, peer, rx.err.mic_err);
  1729. DP_STATS_AGGR(vdev, peer, rx.err.decrypt_err);
  1730. DP_STATS_AGGR(vdev, peer, rx.non_ampdu_cnt);
  1731. DP_STATS_AGGR(vdev, peer, rx.non_amsdu_cnt);
  1732. DP_STATS_AGGR(vdev, peer, rx.amsdu_cnt);
  1733. DP_STATS_AGGR_PKT(vdev, peer, rx.to_stack);
  1734. DP_STATS_AGGR_PKT(vdev, peer, rx.rcvd_reo);
  1735. DP_STATS_AGGR_PKT(vdev, peer, rx.unicast);
  1736. DP_STATS_AGGR_PKT(vdev, peer, rx.multicast);
  1737. DP_STATS_AGGR_PKT(vdev, peer, rx.wds);
  1738. DP_STATS_AGGR_PKT(vdev, peer, rx.raw);
  1739. DP_STATS_AGGR_PKT(vdev, peer, rx.intra_bss);
  1740. vdev->stats.tx.last_ack_rssi =
  1741. peer->stats.tx.last_ack_rssi;
  1742. }
  1743. }
  1744. /**
  1745. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  1746. * @pdev: DP PDEV handle
  1747. *
  1748. * return: void
  1749. */
  1750. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  1751. {
  1752. struct dp_vdev *vdev = NULL;
  1753. uint8_t i;
  1754. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  1755. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  1756. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  1757. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1758. if (!vdev)
  1759. return;
  1760. dp_aggregate_vdev_stats(vdev);
  1761. for (i = 0; i <= MAX_MCS; i++) {
  1762. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[0].mcs_count[i]);
  1763. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[1].mcs_count[i]);
  1764. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[2].mcs_count[i]);
  1765. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[3].mcs_count[i]);
  1766. DP_STATS_AGGR(pdev, vdev, tx.pkt_type[4].mcs_count[i]);
  1767. DP_STATS_AGGR(pdev, vdev, rx.mcs_count[i]);
  1768. }
  1769. for (i = 0; i < SUPPORTED_BW; i++) {
  1770. DP_STATS_AGGR(pdev, vdev, tx.bw[i]);
  1771. DP_STATS_AGGR(pdev, vdev, rx.bw[i]);
  1772. }
  1773. for (i = 0; i < SS_COUNT; i++)
  1774. DP_STATS_AGGR(pdev, vdev, rx.nss[i]);
  1775. for (i = 0; i < WME_AC_MAX; i++) {
  1776. DP_STATS_AGGR(pdev, vdev, tx.wme_ac_type[i]);
  1777. DP_STATS_AGGR(pdev, vdev, rx.wme_ac_type[i]);
  1778. DP_STATS_AGGR(pdev, vdev,
  1779. tx.excess_retries_ac[i]);
  1780. }
  1781. for (i = 0; i < MAX_MCS + 1; i++) {
  1782. DP_STATS_AGGR(pdev, vdev, tx.sgi_count[i]);
  1783. DP_STATS_AGGR(pdev, vdev, rx.sgi_count[i]);
  1784. }
  1785. DP_STATS_AGGR_PKT(pdev, vdev, tx.comp_pkt);
  1786. DP_STATS_AGGR_PKT(pdev, vdev, tx.ucast);
  1787. DP_STATS_AGGR_PKT(pdev, vdev, tx.mcast);
  1788. DP_STATS_AGGR_PKT(pdev, vdev, tx.tx_success);
  1789. DP_STATS_AGGR(pdev, vdev, tx.tx_failed);
  1790. DP_STATS_AGGR(pdev, vdev, tx.ofdma);
  1791. DP_STATS_AGGR(pdev, vdev, tx.stbc);
  1792. DP_STATS_AGGR(pdev, vdev, tx.ldpc);
  1793. DP_STATS_AGGR(pdev, vdev, tx.retries);
  1794. DP_STATS_AGGR(pdev, vdev, tx.non_amsdu_cnt);
  1795. DP_STATS_AGGR(pdev, vdev, tx.amsdu_cnt);
  1796. DP_STATS_AGGR(pdev, vdev, tx.dropped.dma_map_error);
  1797. DP_STATS_AGGR(pdev, vdev, tx.dropped.ring_full);
  1798. DP_STATS_AGGR(pdev, vdev, tx.dropped.fw_discard);
  1799. DP_STATS_AGGR(pdev, vdev,
  1800. tx.dropped.fw_discard_retired);
  1801. DP_STATS_AGGR(pdev, vdev, tx.dropped.mpdu_age_out);
  1802. DP_STATS_AGGR(pdev, vdev,
  1803. tx.dropped.fw_discard_reason1);
  1804. DP_STATS_AGGR(pdev, vdev,
  1805. tx.dropped.fw_discard_reason2);
  1806. DP_STATS_AGGR(pdev, vdev,
  1807. tx.dropped.fw_discard_reason3);
  1808. DP_STATS_AGGR(pdev, vdev, rx.err.mic_err);
  1809. DP_STATS_AGGR(pdev, vdev, rx.err.decrypt_err);
  1810. DP_STATS_AGGR(pdev, vdev, rx.non_ampdu_cnt);
  1811. DP_STATS_AGGR(pdev, vdev, rx.ampdu_cnt);
  1812. DP_STATS_AGGR(pdev, vdev, rx.non_amsdu_cnt);
  1813. DP_STATS_AGGR(pdev, vdev, rx.amsdu_cnt);
  1814. DP_STATS_AGGR_PKT(pdev, vdev, rx.to_stack);
  1815. DP_STATS_AGGR_PKT(pdev, vdev, rx.rcvd_reo);
  1816. DP_STATS_AGGR_PKT(pdev, vdev, rx.unicast);
  1817. DP_STATS_AGGR_PKT(pdev, vdev, rx.multicast);
  1818. DP_STATS_AGGR_PKT(pdev, vdev, rx.wds);
  1819. DP_STATS_AGGR_PKT(pdev, vdev, rx.intra_bss);
  1820. DP_STATS_AGGR_PKT(pdev, vdev, rx.raw);
  1821. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  1822. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.freed);
  1823. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  1824. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  1825. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  1826. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw_pkt);
  1827. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  1828. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  1829. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  1830. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  1831. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  1832. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  1833. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  1834. DP_STATS_AGGR(pdev, vdev,
  1835. tx_i.mcast_en.dropped_map_error);
  1836. DP_STATS_AGGR(pdev, vdev,
  1837. tx_i.mcast_en.dropped_self_mac);
  1838. DP_STATS_AGGR(pdev, vdev,
  1839. tx_i.mcast_en.dropped_send_fail);
  1840. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  1841. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.dropped.dropped_pkt);
  1842. pdev->stats.tx.last_ack_rssi =
  1843. vdev->stats.tx.last_ack_rssi;
  1844. pdev->stats.tx_i.tso.num_seg =
  1845. vdev->stats.tx_i.tso.num_seg;
  1846. }
  1847. }
  1848. /**
  1849. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  1850. * @pdev: DP_PDEV Handle
  1851. *
  1852. * Return:void
  1853. */
  1854. static inline void
  1855. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  1856. {
  1857. DP_TRACE(NONE, "WLAN Tx Stats:\n");
  1858. DP_TRACE(NONE, "Received From Stack:\n");
  1859. DP_TRACE(NONE, "Total Packets Received = %d",
  1860. pdev->stats.tx_i.rcvd.num);
  1861. DP_TRACE(NONE, "Bytes Sent = %d",
  1862. pdev->stats.tx_i.rcvd.bytes);
  1863. DP_TRACE(NONE, "Processed:\n");
  1864. DP_TRACE(NONE, "Msdu Processed = %d",
  1865. pdev->stats.tx_i.processed.num);
  1866. DP_TRACE(NONE, "Bytes Processed = %d",
  1867. pdev->stats.tx_i.processed.bytes);
  1868. DP_TRACE(NONE, "Completions:\n");
  1869. DP_TRACE(NONE, "Msdu Sent = %d",
  1870. pdev->stats.tx.comp_pkt.num);
  1871. DP_TRACE(NONE, "Bytes Sent = %d",
  1872. pdev->stats.tx.comp_pkt.bytes);
  1873. DP_TRACE(NONE, "Freed:\n");
  1874. DP_TRACE(NONE, "Msdus Freed = %d",
  1875. pdev->stats.tx_i.freed.num);
  1876. DP_TRACE(NONE, "Bytes Freed = %d",
  1877. pdev->stats.tx_i.freed.bytes);
  1878. DP_TRACE(NONE, "Dropped:\n");
  1879. DP_TRACE(NONE, "Total Packets Dropped = %d",
  1880. pdev->stats.tx_i.dropped.dropped_pkt.num);
  1881. DP_TRACE(NONE, "Bytes Dropped = %d",
  1882. pdev->stats.tx_i.dropped.dropped_pkt.bytes);
  1883. DP_TRACE(NONE, "Dma_map_error = %d",
  1884. pdev->stats.tx.dropped.dma_map_error);
  1885. DP_TRACE(NONE, "Ring Full = %d", pdev->stats.tx.dropped.ring_full);
  1886. DP_TRACE(NONE, "Fw Discard = %d",
  1887. pdev->stats.tx.dropped.fw_discard);
  1888. DP_TRACE(NONE, "Fw Discard Retired = %d",
  1889. pdev->stats.tx.dropped.fw_discard_retired);
  1890. DP_TRACE(NONE, "Firmware Discard Untransmitted = %d",
  1891. pdev->stats.tx.dropped.fw_discard_untransmitted);
  1892. DP_TRACE(NONE, "Mpdu Age Out = %d",
  1893. pdev->stats.tx.dropped.mpdu_age_out);
  1894. DP_TRACE(NONE, "Firmware Discard Reason1 = %d",
  1895. pdev->stats.tx.dropped.fw_discard_reason1);
  1896. DP_TRACE(NONE, "Firmware Discard Reason2 = %d",
  1897. pdev->stats.tx.dropped.fw_discard_reason2);
  1898. DP_TRACE(NONE, "Firmware Discard Reason3 = %d",
  1899. pdev->stats.tx.dropped.fw_discard_reason3);
  1900. DP_TRACE(NONE, "Scatter Gather:\n");
  1901. DP_TRACE(NONE, "Total Packets = %d",
  1902. pdev->stats.tx_i.sg.sg_pkt.num);
  1903. DP_TRACE(NONE, "Total Bytes = %d",
  1904. pdev->stats.tx_i.sg.sg_pkt.bytes);
  1905. DP_TRACE(NONE, "Dropped By Host = %d",
  1906. pdev->stats.tx_i.sg.dropped_host);
  1907. DP_TRACE(NONE, "Dropped By Target = %d",
  1908. pdev->stats.tx_i.sg.dropped_target);
  1909. DP_TRACE(NONE, "Tso:\n");
  1910. DP_TRACE(NONE, "Number of Segments = %d",
  1911. pdev->stats.tx_i.tso.num_seg);
  1912. DP_TRACE(NONE, "Number Packets = %d",
  1913. pdev->stats.tx_i.tso.tso_pkt.num);
  1914. DP_TRACE(NONE, "Total Bytes = %d",
  1915. pdev->stats.tx_i.tso.tso_pkt.bytes);
  1916. DP_TRACE(NONE, "Dropped By Host = %d",
  1917. pdev->stats.tx_i.tso.dropped_host);
  1918. DP_TRACE(NONE, "Mcast Enhancement:\n");
  1919. DP_TRACE(NONE, "Dropped: Map Errors = %d",
  1920. pdev->stats.tx_i.mcast_en.dropped_map_error);
  1921. DP_TRACE(NONE, "Dropped: Self Mac = %d",
  1922. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  1923. DP_TRACE(NONE, "Dropped: Send Fail = %d",
  1924. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  1925. DP_TRACE(NONE, "Total Unicast sent = %d",
  1926. pdev->stats.tx_i.mcast_en.ucast);
  1927. }
  1928. /**
  1929. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  1930. * @pdev: DP_PDEV Handle
  1931. *
  1932. * Return: void
  1933. */
  1934. static inline void
  1935. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  1936. {
  1937. DP_TRACE(NONE, "WLAN Rx Stats:\n");
  1938. DP_TRACE(NONE, "Received From HW (Reo Dest Ring):\n");
  1939. DP_TRACE(NONE, "Total Packets Received = %d",
  1940. pdev->stats.rx.rcvd_reo.num);
  1941. DP_TRACE(NONE, "Bytes Sent = %d",
  1942. pdev->stats.rx.rcvd_reo.bytes);
  1943. DP_TRACE(NONE, "Replenished:\n");
  1944. DP_TRACE(NONE, "Total Packets Replenished = %d",
  1945. pdev->stats.replenished.num);
  1946. DP_TRACE(NONE, "Bytes Sent = %d",
  1947. pdev->stats.replenished.bytes);
  1948. DP_TRACE(NONE, "Buffers Added To Freelist = %d",
  1949. pdev->stats.buf_freelist);
  1950. DP_TRACE(NONE, "Dropped:\n");
  1951. DP_TRACE(NONE, "Total Packets With No Peer = %d",
  1952. pdev->stats.dropped.no_peer.num);
  1953. DP_TRACE(NONE, "Bytes Sent With No Peer = %d",
  1954. pdev->stats.dropped.no_peer.bytes);
  1955. DP_TRACE(NONE, "Total Packets With Msdu Not Done = %d",
  1956. pdev->stats.dropped.msdu_not_done.num);
  1957. DP_TRACE(NONE, "Bytes Sent With Msdu Not Done = %d",
  1958. pdev->stats.dropped.msdu_not_done.bytes);
  1959. DP_TRACE(NONE, "Sent To Stack:\n");
  1960. DP_TRACE(NONE, "Packets Sent To Stack = %d",
  1961. pdev->stats.rx.to_stack.num);
  1962. DP_TRACE(NONE, "Bytes Sent To Stack = %d",
  1963. pdev->stats.rx.to_stack.bytes);
  1964. DP_TRACE(NONE, "Errors:\n");
  1965. DP_TRACE(NONE, "Rxdma Ring Unititalized: %d",
  1966. pdev->stats.err.rxdma_unitialized);
  1967. DP_TRACE(NONE, "Desc Alloc Failed: %d",
  1968. pdev->stats.err.desc_alloc_fail);
  1969. }
  1970. /**
  1971. * dp_print_soc_tx_stats(): Print SOC level stats
  1972. * @soc DP_SOC Handle
  1973. *
  1974. * Return: void
  1975. */
  1976. static inline void
  1977. dp_print_soc_tx_stats(struct dp_soc *soc)
  1978. {
  1979. DP_TRACE(NONE, "SOC Tx Stats:\n");
  1980. DP_TRACE(NONE, "Tx Descriptors In Use = %d",
  1981. soc->stats.tx.desc_in_use);
  1982. }
  1983. /**
  1984. * dp_print_soc_rx_stats: Print SOC level Rx stats
  1985. * @soc: DP_SOC Handle
  1986. *
  1987. * Return:void
  1988. */
  1989. static inline void
  1990. dp_print_soc_rx_stats(struct dp_soc *soc)
  1991. {
  1992. uint32_t i;
  1993. char reo_error[DP_REO_ERR_LENGTH];
  1994. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  1995. uint8_t index = 0;
  1996. DP_TRACE(NONE, "SOC Rx Stats:\n");
  1997. DP_TRACE(NONE, "Errors:\n");
  1998. DP_TRACE(NONE, "Invalid RBM = %d",
  1999. soc->stats.rx.err.invalid_rbm);
  2000. DP_TRACE(NONE, "Invalid Vdev = %d",
  2001. soc->stats.rx.err.invalid_vdev);
  2002. DP_TRACE(NONE, "Invalid Pdev = %d",
  2003. soc->stats.rx.err.invalid_pdev);
  2004. DP_TRACE(NONE, "HAL Ring Access Fail = %d",
  2005. soc->stats.rx.err.hal_ring_access_fail);
  2006. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2007. index += qdf_snprint(&rxdma_error[index],
  2008. DP_RXDMA_ERR_LENGTH - index,
  2009. " %d,", soc->stats.rx.err.rxdma_error[i]);
  2010. }
  2011. DP_TRACE(NONE, "RXDMA Error (0-31):%s",
  2012. rxdma_error);
  2013. index = 0;
  2014. for (i = 0; i < REO_ERROR_TYPE_MAX; i++) {
  2015. index += qdf_snprint(&reo_error[index],
  2016. DP_REO_ERR_LENGTH - index,
  2017. " %d,", soc->stats.rx.err.reo_error[i]);
  2018. }
  2019. DP_TRACE(NONE, "REO Error(0-14):%s",
  2020. reo_error);
  2021. }
  2022. /**
  2023. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2024. * @vdev: DP_VDEV handle
  2025. *
  2026. * Return:void
  2027. */
  2028. static inline void
  2029. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2030. {
  2031. struct dp_peer *peer = NULL;
  2032. DP_STATS_CLR(vdev->pdev);
  2033. DP_STATS_CLR(vdev->pdev->soc);
  2034. DP_STATS_CLR(vdev);
  2035. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2036. if (!peer)
  2037. return;
  2038. DP_STATS_CLR(peer);
  2039. }
  2040. }
  2041. /**
  2042. * dp_print_rx_rates(): Print Rx rate stats
  2043. * @vdev: DP_VDEV handle
  2044. *
  2045. * Return:void
  2046. */
  2047. static inline void
  2048. dp_print_rx_rates(struct dp_vdev *vdev)
  2049. {
  2050. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2051. uint8_t i;
  2052. uint8_t index = 0;
  2053. char mcs[DP_MCS_LENGTH];
  2054. char nss[DP_NSS_LENGTH];
  2055. DP_TRACE(NONE, "Rx Rate Info:\n");
  2056. for (i = 0; i < MAX_MCS; i++) {
  2057. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2058. " %d,", pdev->stats.rx.mcs_count[i]);
  2059. }
  2060. DP_TRACE(NONE, "MCS(0-11):%s",
  2061. mcs);
  2062. index = 0;
  2063. for (i = 0; i < SS_COUNT; i++) {
  2064. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2065. " %d,", pdev->stats.rx.nss[i]);
  2066. }
  2067. DP_TRACE(NONE, "NSS(0-7):%s",
  2068. nss);
  2069. DP_TRACE(NONE, "SGI:"
  2070. " 0.8us %d,"
  2071. " 0.4us %d,"
  2072. " 1.6us %d,"
  2073. " 3.2us %d,",
  2074. pdev->stats.rx.sgi_count[0],
  2075. pdev->stats.rx.sgi_count[1],
  2076. pdev->stats.rx.sgi_count[2],
  2077. pdev->stats.rx.sgi_count[3]);
  2078. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2079. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2080. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2081. DP_TRACE(NONE, "Reception Type:"
  2082. " SU: %d,"
  2083. " MU_MIMO:%d,"
  2084. " MU_OFDMA:%d,"
  2085. " MU_OFDMA_MIMO:%d",
  2086. pdev->stats.rx.reception_type[0],
  2087. pdev->stats.rx.reception_type[1],
  2088. pdev->stats.rx.reception_type[2],
  2089. pdev->stats.rx.reception_type[3]);
  2090. DP_TRACE(NONE, "Aggregation:\n");
  2091. DP_TRACE(NONE, "Number of Msdu's Part of Ampdu = %d",
  2092. pdev->stats.rx.ampdu_cnt);
  2093. DP_TRACE(NONE, "Number of Msdu's With No Mpdu Level Aggregation : %d",
  2094. pdev->stats.rx.non_ampdu_cnt);
  2095. DP_TRACE(NONE, "Number of Msdu's Part of Amsdu: %d",
  2096. pdev->stats.rx.amsdu_cnt);
  2097. DP_TRACE(NONE, "Number of Msdu's With No Msdu Level Aggregation: %d",
  2098. pdev->stats.rx.non_amsdu_cnt);
  2099. }
  2100. /**
  2101. * dp_print_tx_rates(): Print tx rates
  2102. * @vdev: DP_VDEV handle
  2103. *
  2104. * Return:void
  2105. */
  2106. static inline void
  2107. dp_print_tx_rates(struct dp_vdev *vdev)
  2108. {
  2109. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2110. uint8_t i, pkt_type;
  2111. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2112. uint32_t index;
  2113. DP_TRACE(NONE, "Tx Rate Info:\n");
  2114. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2115. index = 0;
  2116. for (i = 0; i < MAX_MCS; i++) {
  2117. index += qdf_snprint(&mcs[pkt_type][index],
  2118. DP_MCS_LENGTH - index,
  2119. " %d ",
  2120. pdev->stats.tx.pkt_type[pkt_type].
  2121. mcs_count[i]);
  2122. }
  2123. }
  2124. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2125. mcs[0]);
  2126. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2127. pdev->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2128. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2129. mcs[1]);
  2130. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2131. pdev->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2132. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2133. mcs[2]);
  2134. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2135. pdev->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2136. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2137. mcs[3]);
  2138. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2139. pdev->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2140. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2141. mcs[4]);
  2142. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2143. pdev->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2144. }
  2145. /**
  2146. * dp_print_peer_stats():print peer stats
  2147. * @peer: DP_PEER handle
  2148. *
  2149. * return void
  2150. */
  2151. static inline void dp_print_peer_stats(struct dp_peer *peer)
  2152. {
  2153. uint8_t i, pkt_type;
  2154. char mcs[DOT11_MAX][DP_MCS_LENGTH];
  2155. uint32_t index;
  2156. char nss[DP_NSS_LENGTH];
  2157. char mcs_rx[DP_MCS_LENGTH];
  2158. DP_TRACE(NONE, "Node Tx Stats:\n");
  2159. DP_TRACE(NONE, "Total Packet Completions %d",
  2160. peer->stats.tx.comp_pkt.num);
  2161. DP_TRACE(NONE, "Total Bytes Completions %d",
  2162. peer->stats.tx.comp_pkt.bytes);
  2163. DP_TRACE(NONE, "Success Packets %d",
  2164. peer->stats.tx.tx_success.num);
  2165. DP_TRACE(NONE, "Success Bytes %d",
  2166. peer->stats.tx.tx_success.bytes);
  2167. DP_TRACE(NONE, "Packets Failed %d",
  2168. peer->stats.tx.tx_failed);
  2169. DP_TRACE(NONE, "Packets In OFDMA %d",
  2170. peer->stats.tx.ofdma);
  2171. DP_TRACE(NONE, "Packets In STBC %d",
  2172. peer->stats.tx.stbc);
  2173. DP_TRACE(NONE, "Packets In LDPC %d",
  2174. peer->stats.tx.ldpc);
  2175. DP_TRACE(NONE, "Packet Retries %d",
  2176. peer->stats.tx.retries);
  2177. DP_TRACE(NONE, "Msdu's Not Part of Ampdu %d",
  2178. peer->stats.tx.non_amsdu_cnt);
  2179. DP_TRACE(NONE, "Mpdu's Part of Ampdu %d",
  2180. peer->stats.tx.amsdu_cnt);
  2181. DP_TRACE(NONE, "Last Packet RSSI %d",
  2182. peer->stats.tx.last_ack_rssi);
  2183. DP_TRACE(NONE, "Dropped At Host: Due To DMA Map Error %d",
  2184. peer->stats.tx.dropped.dma_map_error);
  2185. DP_TRACE(NONE, "Dropped At Host: Due To Ring Full %d",
  2186. peer->stats.tx.dropped.ring_full);
  2187. DP_TRACE(NONE, "Dropped At FW: FW Discard %d",
  2188. peer->stats.tx.dropped.fw_discard);
  2189. DP_TRACE(NONE, "Dropped At FW: FW Discard Retired %d",
  2190. peer->stats.tx.dropped.fw_discard_retired);
  2191. DP_TRACE(NONE, "Dropped At FW: FW Discard Untransmitted %d",
  2192. peer->stats.tx.dropped.fw_discard_untransmitted);
  2193. DP_TRACE(NONE, "Dropped : Mpdu Age Out %d",
  2194. peer->stats.tx.dropped.mpdu_age_out);
  2195. DP_TRACE(NONE, "Dropped : FW Discard Reason1 %d",
  2196. peer->stats.tx.dropped.fw_discard_reason1);
  2197. DP_TRACE(NONE, "Dropped : FW Discard Reason2 %d",
  2198. peer->stats.tx.dropped.fw_discard_reason2);
  2199. DP_TRACE(NONE, "Dropped : FW Discard Reason3 %d",
  2200. peer->stats.tx.dropped.fw_discard_reason3);
  2201. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  2202. index = 0;
  2203. for (i = 0; i < MAX_MCS; i++) {
  2204. index += qdf_snprint(&mcs[pkt_type][index],
  2205. DP_MCS_LENGTH - index,
  2206. " %d ",
  2207. peer->stats.tx.pkt_type[pkt_type].
  2208. mcs_count[i]);
  2209. }
  2210. }
  2211. DP_TRACE(NONE, "Packet Type 11A MCS(0-7):%s",
  2212. mcs[0]);
  2213. DP_TRACE(NONE, "Packet Type 11A MCS Invalid = %d",
  2214. peer->stats.tx.pkt_type[DOT11_A].mcs_count[MAX_MCS]);
  2215. DP_TRACE(NONE, "Packet Type 11B MCS(0-6):%s",
  2216. mcs[1]);
  2217. DP_TRACE(NONE, "Packet Type 11B MCS Invalid = %d",
  2218. peer->stats.tx.pkt_type[DOT11_B].mcs_count[MAX_MCS]);
  2219. DP_TRACE(NONE, "Packet Type 11N MCS(0-7):%s",
  2220. mcs[2]);
  2221. DP_TRACE(NONE, "Packet Type 11N MCS Invalid = %d",
  2222. peer->stats.tx.pkt_type[DOT11_N].mcs_count[MAX_MCS]);
  2223. DP_TRACE(NONE, "Packet Type 11AC MCS(0-9):%s",
  2224. mcs[3]);
  2225. DP_TRACE(NONE, "Packet Type 11AC MCS Invalid = %d",
  2226. peer->stats.tx.pkt_type[DOT11_AC].mcs_count[MAX_MCS]);
  2227. DP_TRACE(NONE, "Packet Type 11AX MCS(0-11):%s",
  2228. mcs[4]);
  2229. DP_TRACE(NONE, "Packet Type 11AX MCS Invalid = %d",
  2230. peer->stats.tx.pkt_type[DOT11_AX].mcs_count[MAX_MCS]);
  2231. DP_TRACE(NONE, "SGI:"
  2232. " 0.8us %d,"
  2233. " 0.4us %d,"
  2234. " 1.6us %d,"
  2235. " 3.2us %d,",
  2236. peer->stats.tx.sgi_count[0],
  2237. peer->stats.tx.sgi_count[1],
  2238. peer->stats.tx.sgi_count[2],
  2239. peer->stats.tx.sgi_count[3]);
  2240. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2241. peer->stats.tx.bw[0], peer->stats.tx.bw[1],
  2242. peer->stats.tx.bw[2], peer->stats.tx.bw[3]);
  2243. DP_TRACE(NONE, "Node Rx Stats:\n");
  2244. DP_TRACE(NONE, "Packets Sent To Stack %d",
  2245. peer->stats.rx.to_stack.num);
  2246. DP_TRACE(NONE, "Bytes Sent To Stack %d",
  2247. peer->stats.rx.to_stack.bytes);
  2248. DP_TRACE(NONE, "Packets Received %d", peer->stats.rx.rcvd_reo.num);
  2249. DP_TRACE(NONE, "Bytes Received %d", peer->stats.rx.rcvd_reo.bytes);
  2250. DP_TRACE(NONE, "Unicast Packets Received %d",
  2251. peer->stats.rx.unicast.num);
  2252. DP_TRACE(NONE, "Unicast Bytes Received %d",
  2253. peer->stats.rx.unicast.bytes);
  2254. DP_TRACE(NONE, "Multicast Packets Received %d",
  2255. peer->stats.rx.multicast.num);
  2256. DP_TRACE(NONE, "Multicast Bytes Received %d",
  2257. peer->stats.rx.multicast.bytes);
  2258. DP_TRACE(NONE, "WDS Packets Received %d",
  2259. peer->stats.rx.wds.num);
  2260. DP_TRACE(NONE, "WDS Bytes Received %d",
  2261. peer->stats.rx.wds.bytes);
  2262. DP_TRACE(NONE, "Intra BSS Packets Received %d",
  2263. peer->stats.rx.intra_bss.num);
  2264. DP_TRACE(NONE, "Intra BSS Bytes Received %d",
  2265. peer->stats.rx.intra_bss.bytes);
  2266. DP_TRACE(NONE, "Raw Packets Received %d",
  2267. peer->stats.rx.raw.num);
  2268. DP_TRACE(NONE, "Raw Bytes Received %d",
  2269. peer->stats.rx.raw.bytes);
  2270. DP_TRACE(NONE, "Errors: MIC Errors %d",
  2271. peer->stats.rx.err.mic_err);
  2272. DP_TRACE(NONE, "Erros: Decryption Errors %d",
  2273. peer->stats.rx.err.decrypt_err);
  2274. DP_TRACE(NONE, "Msdu's Received As Part of Ampdu %d",
  2275. peer->stats.rx.non_ampdu_cnt);
  2276. DP_TRACE(NONE, "Msdu's Recived As Ampdu %d", peer->stats.rx.ampdu_cnt);
  2277. DP_TRACE(NONE, "Msdu's Received Not Part of Amsdu's %d",
  2278. peer->stats.rx.non_amsdu_cnt);
  2279. DP_TRACE(NONE, "MSDUs Received As Part of Amsdu %d",
  2280. peer->stats.rx.amsdu_cnt);
  2281. DP_TRACE(NONE, "SGI:"
  2282. " 0.8us %d,"
  2283. " 0.4us %d,"
  2284. " 1.6us %d,"
  2285. " 3.2us %d,",
  2286. peer->stats.rx.sgi_count[0],
  2287. peer->stats.rx.sgi_count[1],
  2288. peer->stats.rx.sgi_count[2],
  2289. peer->stats.rx.sgi_count[3]);
  2290. DP_TRACE(NONE, "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2291. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  2292. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  2293. DP_TRACE(NONE, "Reception Type:"
  2294. " SU %d,"
  2295. " MU_MIMO %d,"
  2296. " MU_OFDMA %d,"
  2297. " MU_OFDMA_MIMO %d",
  2298. peer->stats.rx.reception_type[0],
  2299. peer->stats.rx.reception_type[1],
  2300. peer->stats.rx.reception_type[2],
  2301. peer->stats.rx.reception_type[3]);
  2302. index = 0;
  2303. for (i = 0; i < MAX_MCS; i++) {
  2304. index += qdf_snprint(&mcs_rx[index], DP_MCS_LENGTH - index,
  2305. " %d,", peer->stats.rx.mcs_count[i]);
  2306. }
  2307. DP_TRACE(NONE, "MCS(0-11):%s",
  2308. mcs_rx);
  2309. index = 0;
  2310. for (i = 0; i < SS_COUNT; i++) {
  2311. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2312. " %d,", peer->stats.rx.nss[i]);
  2313. }
  2314. DP_TRACE(NONE, "NSS(0-7):%s",
  2315. nss);
  2316. }
  2317. /**
  2318. * dp_print_host_stats()- Function to print the stats aggregated at host
  2319. * @vdev_handle: DP_VDEV handle
  2320. * @req: ol_txrx_stats_req
  2321. * @type: host stats type
  2322. *
  2323. * Available Stat types
  2324. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  2325. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  2326. * TXRX_TX_HOST_STATS: Print Tx Stats
  2327. * TXRX_RX_HOST_STATS: Print Rx Stats
  2328. * TXRX_CLEAR_STATS : Clear the stats
  2329. *
  2330. * Return: 0 on success, print error message in case of failure
  2331. */
  2332. static int
  2333. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  2334. enum cdp_host_txrx_stats type)
  2335. {
  2336. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2337. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2338. dp_aggregate_pdev_stats(pdev);
  2339. switch (type) {
  2340. case TXRX_RX_RATE_STATS:
  2341. dp_print_rx_rates(vdev);
  2342. break;
  2343. case TXRX_TX_RATE_STATS:
  2344. dp_print_tx_rates(vdev);
  2345. break;
  2346. case TXRX_TX_HOST_STATS:
  2347. dp_print_pdev_tx_stats(pdev);
  2348. dp_print_soc_tx_stats(pdev->soc);
  2349. break;
  2350. case TXRX_RX_HOST_STATS:
  2351. dp_print_pdev_rx_stats(pdev);
  2352. dp_print_soc_rx_stats(pdev->soc);
  2353. break;
  2354. case TXRX_CLEAR_STATS:
  2355. dp_txrx_host_stats_clr(vdev);
  2356. break;
  2357. default:
  2358. DP_TRACE(NONE, "Wrong Input For TxRx Host Stats");
  2359. break;
  2360. }
  2361. return 0;
  2362. }
  2363. /*
  2364. * dp_get_peer_stats()- function to print peer stats
  2365. * @pdev_handle: DP_PDEV handle
  2366. * @mac_addr: mac address of the peer
  2367. *
  2368. * Return: void
  2369. */
  2370. static void
  2371. dp_get_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  2372. {
  2373. struct dp_peer *peer;
  2374. uint8_t local_id;
  2375. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  2376. &local_id);
  2377. dp_print_peer_stats(peer);
  2378. return;
  2379. }
  2380. static struct cdp_cmn_ops dp_ops_cmn = {
  2381. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  2382. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  2383. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  2384. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  2385. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  2386. .txrx_peer_create = dp_peer_create_wifi3,
  2387. .txrx_peer_setup = dp_peer_setup_wifi3,
  2388. .txrx_peer_teardown = NULL,
  2389. .txrx_peer_delete = dp_peer_delete_wifi3,
  2390. .txrx_vdev_register = dp_vdev_register_wifi3,
  2391. .txrx_soc_detach = dp_soc_detach_wifi3,
  2392. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  2393. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  2394. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  2395. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  2396. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  2397. .delba_process = dp_delba_process_wifi3,
  2398. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  2399. /* TODO: Add other functions */
  2400. };
  2401. static struct cdp_ctrl_ops dp_ops_ctrl = {
  2402. .txrx_peer_authorize = dp_peer_authorize,
  2403. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  2404. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  2405. #ifdef MESH_MODE_SUPPORT
  2406. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  2407. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  2408. #endif
  2409. /* TODO: Add other functions */
  2410. };
  2411. static struct cdp_me_ops dp_ops_me = {
  2412. /* TODO */
  2413. };
  2414. static struct cdp_mon_ops dp_ops_mon = {
  2415. /* TODO */
  2416. };
  2417. static struct cdp_host_stats_ops dp_ops_host_stats = {
  2418. .txrx_host_stats_get = dp_print_host_stats,
  2419. .txrx_per_peer_stats = dp_get_peer_stats,
  2420. /* TODO */
  2421. };
  2422. static struct cdp_wds_ops dp_ops_wds = {
  2423. /* TODO */
  2424. };
  2425. static struct cdp_raw_ops dp_ops_raw = {
  2426. /* TODO */
  2427. };
  2428. #ifdef CONFIG_WIN
  2429. static struct cdp_pflow_ops dp_ops_pflow = {
  2430. /* TODO */
  2431. };
  2432. #endif /* CONFIG_WIN */
  2433. #ifndef CONFIG_WIN
  2434. static struct cdp_misc_ops dp_ops_misc = {
  2435. .get_opmode = dp_get_opmode,
  2436. };
  2437. static struct cdp_flowctl_ops dp_ops_flowctl = {
  2438. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2439. };
  2440. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  2441. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2442. };
  2443. static struct cdp_ipa_ops dp_ops_ipa = {
  2444. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2445. };
  2446. static struct cdp_lro_ops dp_ops_lro = {
  2447. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2448. };
  2449. /**
  2450. * dp_dummy_bus_suspend() - dummy bus suspend op
  2451. *
  2452. * FIXME - This is a placeholder for the actual logic!
  2453. *
  2454. * Return: QDF_STATUS_SUCCESS
  2455. */
  2456. inline QDF_STATUS dp_dummy_bus_suspend(void)
  2457. {
  2458. return QDF_STATUS_SUCCESS;
  2459. }
  2460. /**
  2461. * dp_dummy_bus_resume() - dummy bus resume
  2462. *
  2463. * FIXME - This is a placeholder for the actual logic!
  2464. *
  2465. * Return: QDF_STATUS_SUCCESS
  2466. */
  2467. inline QDF_STATUS dp_dummy_bus_resume(void)
  2468. {
  2469. return QDF_STATUS_SUCCESS;
  2470. }
  2471. static struct cdp_bus_ops dp_ops_bus = {
  2472. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2473. .bus_suspend = dp_dummy_bus_suspend,
  2474. .bus_resume = dp_dummy_bus_resume
  2475. };
  2476. static struct cdp_ocb_ops dp_ops_ocb = {
  2477. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2478. };
  2479. static struct cdp_throttle_ops dp_ops_throttle = {
  2480. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2481. };
  2482. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  2483. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2484. };
  2485. static struct cdp_cfg_ops dp_ops_cfg = {
  2486. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  2487. };
  2488. static struct cdp_peer_ops dp_ops_peer = {
  2489. .register_peer = dp_register_peer,
  2490. .clear_peer = dp_clear_peer,
  2491. .find_peer_by_addr = dp_find_peer_by_addr,
  2492. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  2493. .local_peer_id = dp_local_peer_id,
  2494. .peer_find_by_local_id = dp_peer_find_by_local_id,
  2495. .peer_state_update = dp_peer_state_update,
  2496. .get_vdevid = dp_get_vdevid,
  2497. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  2498. .get_vdev_for_peer = dp_get_vdev_for_peer,
  2499. .get_peer_state = dp_get_peer_state,
  2500. .last_assoc_received = dp_get_last_assoc_received,
  2501. .last_disassoc_received = dp_get_last_disassoc_received,
  2502. .last_deauth_received = dp_get_last_deauth_received,
  2503. };
  2504. #endif
  2505. static struct cdp_ops dp_txrx_ops = {
  2506. .cmn_drv_ops = &dp_ops_cmn,
  2507. .ctrl_ops = &dp_ops_ctrl,
  2508. .me_ops = &dp_ops_me,
  2509. .mon_ops = &dp_ops_mon,
  2510. .host_stats_ops = &dp_ops_host_stats,
  2511. .wds_ops = &dp_ops_wds,
  2512. .raw_ops = &dp_ops_raw,
  2513. #ifdef CONFIG_WIN
  2514. .pflow_ops = &dp_ops_pflow,
  2515. #endif /* CONFIG_WIN */
  2516. #ifndef CONFIG_WIN
  2517. .misc_ops = &dp_ops_misc,
  2518. .cfg_ops = &dp_ops_cfg,
  2519. .flowctl_ops = &dp_ops_flowctl,
  2520. .l_flowctl_ops = &dp_ops_l_flowctl,
  2521. .ipa_ops = &dp_ops_ipa,
  2522. .lro_ops = &dp_ops_lro,
  2523. .bus_ops = &dp_ops_bus,
  2524. .ocb_ops = &dp_ops_ocb,
  2525. .peer_ops = &dp_ops_peer,
  2526. .throttle_ops = &dp_ops_throttle,
  2527. .mob_stats_ops = &dp_ops_mob_stats,
  2528. #endif
  2529. };
  2530. /*
  2531. * dp_soc_attach_wifi3() - Attach txrx SOC
  2532. * @osif_soc: Opaque SOC handle from OSIF/HDD
  2533. * @htc_handle: Opaque HTC handle
  2534. * @hif_handle: Opaque HIF handle
  2535. * @qdf_osdev: QDF device
  2536. *
  2537. * Return: DP SOC handle on success, NULL on failure
  2538. */
  2539. /*
  2540. * Local prototype added to temporarily address warning caused by
  2541. * -Wmissing-prototypes. A more correct solution, namely to expose
  2542. * a prototype in an appropriate header file, will come later.
  2543. */
  2544. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  2545. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  2546. struct ol_if_ops *ol_ops);
  2547. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  2548. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  2549. struct ol_if_ops *ol_ops)
  2550. {
  2551. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  2552. if (!soc) {
  2553. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2554. FL("DP SOC memory allocation failed"));
  2555. goto fail0;
  2556. }
  2557. soc->cdp_soc.ops = &dp_txrx_ops;
  2558. soc->cdp_soc.ol_ops = ol_ops;
  2559. soc->osif_soc = osif_soc;
  2560. soc->osdev = qdf_osdev;
  2561. soc->hif_handle = hif_handle;
  2562. soc->hal_soc = hif_get_hal_handle(hif_handle);
  2563. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  2564. soc->hal_soc, qdf_osdev);
  2565. if (!soc->htt_handle) {
  2566. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2567. FL("HTT attach failed"));
  2568. goto fail1;
  2569. }
  2570. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  2571. if (!soc->wlan_cfg_ctx) {
  2572. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2573. FL("wlan_cfg_soc_attach failed"));
  2574. goto fail2;
  2575. }
  2576. qdf_spinlock_create(&soc->peer_ref_mutex);
  2577. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  2578. goto fail2;
  2579. }
  2580. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  2581. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  2582. return (void *)soc;
  2583. fail2:
  2584. htt_soc_detach(soc->htt_handle);
  2585. fail1:
  2586. qdf_mem_free(soc);
  2587. fail0:
  2588. return NULL;
  2589. }