1e60728ab8
1.Typecast to avoid distinct pointer type comparison 2.Keep DMA mask aligned with api definition. 3.Add Suffix for literals 4.Remove multfrac func to avoid uncompatible division. 5.64-bit division( operator "/") on 32-bit platforms is not supported. Using platform independent API's here Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
53 righe
1.3 KiB
C
53 righe
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef __MDSS_DSI_PLL_H
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#define __MDSS_DSI_PLL_H
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#include <linux/clk-provider.h>
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#include "pll_drv.h"
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#define MAX_DSI_PLL_EN_SEQS 10
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/* Register offsets for 20nm PHY PLL */
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#define MMSS_DSI_PHY_PLL_PLL_CNTRL (0x0014)
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#define MMSS_DSI_PHY_PLL_PLL_BKG_KVCO_CAL_EN (0x002C)
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#define MMSS_DSI_PHY_PLL_PLLLOCK_CMP_EN (0x009C)
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struct lpfr_cfg {
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unsigned long vco_rate;
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u32 r;
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};
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struct dsi_pll_vco_clk {
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struct clk_hw hw;
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unsigned long ref_clk_rate;
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u64 min_rate;
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u64 max_rate;
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u32 pll_en_seq_cnt;
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struct lpfr_cfg *lpfr_lut;
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u32 lpfr_lut_size;
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void *priv;
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int (*pll_enable_seqs[MAX_DSI_PLL_EN_SEQS])
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(struct mdss_pll_resources *dsi_pll_Res);
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};
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int dsi_pll_clock_register_10nm(struct platform_device *pdev,
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struct mdss_pll_resources *pll_res);
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int dsi_pll_clock_register_7nm(struct platform_device *pdev,
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struct mdss_pll_resources *pll_res);
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int dsi_pll_clock_register_28lpm(struct platform_device *pdev,
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struct mdss_pll_resources *pll_res);
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static inline struct dsi_pll_vco_clk *to_vco_clk_hw(struct clk_hw *hw)
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{
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return container_of(hw, struct dsi_pll_vco_clk, hw);
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}
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int dsi_pll_clock_register_14nm(struct platform_device *pdev,
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struct mdss_pll_resources *pll_res);
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#endif
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