synaptics_dsx_fw_update.c 138 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113511451155116511751185119512051215122512351245125512651275128512951305131513251335134513551365137513851395140514151425143514451455146514751485149515051515152515351545155515651575158515951605161516251635164516551665167516851695170517151725173517451755176517751785179518051815182518351845185518651875188518951905191519251935194519551965197519851995200520152025203520452055206520752085209521052115212521352145215521652175218521952205221522252235224522552265227522852295230523152325233523452355236523752385239524052415242524352445245524652475248524952505251525252535254525552565257525852595260526152625263526452655266526752685269527052715272527352745275527652775278527952805281528252835284528552865287528852895290529152925293529452955296529752985299530053015302530353045305530653075308530953105311531253135314531553165317531853195320532153225323532453255326532753285329533053315332533353345335533653375338533953405341534253435344534553465347534853495350535153525353535453555356535753585359536053615362536353645365536653675368536953705371537253735374537553765377537853795380538153825383538453855386538753885389539053915392539353945395539653975398539954005401540254035404540554065407540854095410541154125413541454155416541754185419542054215422542354245425542654275428542954305431543254335434543554365437543854395440544154425443544454455446544754485449545054515452545354545455545654575458545954605461546254635464546554665467546854695470547154725473547454755476547754785479548054815482548354845485548654875488548954905491549254935494549554965497549854995500550155025503550455055506550755085509551055115512551355145515551655175518551955205521552255235524552555265527552855295530553155325533553455355536553755385539554055415542554355445545554655475548554955505551555255535554555555565557555855595560556155625563556455655566556755685569557055715572557355745575557655775578557955805581558255835584558555865587558855895590559155925593559455955596559755985599560056015602560356045605560656075608560956105611561256135614561556165617561856195620562156225623562456255626562756285629563056315632563356345635563656375638563956405641564256435644564556465647564856495650565156525653565456555656565756585659566056615662566356645665566656675668566956705671567256735674567556765677567856795680568156825683568456855686568756885689569056915692569356945695569656975698569957005701570257035704570557065707570857095710571157125713571457155716571757185719572057215722572357245725572657275728572957305731573257335734573557365737573857395740574157425743574457455746574757485749575057515752575357545755575657575758575957605761576257635764576557665767576857695770577157725773577457755776577757785779578057815782578357845785578657875788578957905791579257935794579557965797
  1. /*
  2. * Synaptics DSX touchscreen driver
  3. *
  4. * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
  5. *
  6. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  7. * Copyright (C) 2012 Alexandra Chin <[email protected]>
  8. * Copyright (C) 2012 Scott Lin <[email protected]>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
  21. * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
  22. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
  23. * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
  24. * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25. * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
  26. * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
  27. * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  28. * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
  29. * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
  30. * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
  31. * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
  32. * DOLLARS.
  33. */
  34. #include <linux/kernel.h>
  35. #include <linux/module.h>
  36. #include <linux/slab.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/delay.h>
  39. #include <linux/input.h>
  40. #include <linux/firmware.h>
  41. #include <linux/platform_device.h>
  42. #include <linux/input/synaptics_dsx.h>
  43. #include "synaptics_dsx_core.h"
  44. #define FW_IHEX_NAME "synaptics/startup_fw_update.bin"
  45. #define FW_IMAGE_NAME "synaptics/startup_fw_update.img"
  46. #define ENABLE_SYS_REFLASH false
  47. #define FORCE_UPDATE false
  48. #define DO_LOCKDOWN false
  49. #define MAX_IMAGE_NAME_LEN 256
  50. #define MAX_FIRMWARE_ID_LEN 10
  51. #define IMAGE_HEADER_VERSION_05 0x05
  52. #define IMAGE_HEADER_VERSION_06 0x06
  53. #define IMAGE_HEADER_VERSION_10 0x10
  54. #define IMAGE_AREA_OFFSET 0x100
  55. #define LOCKDOWN_SIZE 0x50
  56. #define MAX_UTILITY_PARAMS 20
  57. #define V5V6_BOOTLOADER_ID_OFFSET 0
  58. #define V5V6_CONFIG_ID_SIZE 4
  59. #define V5_PROPERTIES_OFFSET 2
  60. #define V5_BLOCK_SIZE_OFFSET 3
  61. #define V5_BLOCK_COUNT_OFFSET 5
  62. #define V5_BLOCK_NUMBER_OFFSET 0
  63. #define V5_BLOCK_DATA_OFFSET 2
  64. #define V6_PROPERTIES_OFFSET 1
  65. #define V6_BLOCK_SIZE_OFFSET 2
  66. #define V6_BLOCK_COUNT_OFFSET 3
  67. #define V6_PROPERTIES_2_OFFSET 4
  68. #define V6_GUEST_CODE_BLOCK_COUNT_OFFSET 5
  69. #define V6_BLOCK_NUMBER_OFFSET 0
  70. #define V6_BLOCK_DATA_OFFSET 1
  71. #define V6_FLASH_COMMAND_OFFSET 2
  72. #define V6_FLASH_STATUS_OFFSET 3
  73. #define V7_CONFIG_ID_SIZE 32
  74. #define V7_FLASH_STATUS_OFFSET 0
  75. #define V7_PARTITION_ID_OFFSET 1
  76. #define V7_BLOCK_NUMBER_OFFSET 2
  77. #define V7_TRANSFER_LENGTH_OFFSET 3
  78. #define V7_COMMAND_OFFSET 4
  79. #define V7_PAYLOAD_OFFSET 5
  80. #define V7_PARTITION_SUPPORT_BYTES 4
  81. #define F35_ERROR_CODE_OFFSET 0
  82. #define F35_FLASH_STATUS_OFFSET 5
  83. #define F35_CHUNK_NUM_LSB_OFFSET 0
  84. #define F35_CHUNK_NUM_MSB_OFFSET 1
  85. #define F35_CHUNK_DATA_OFFSET 2
  86. #define F35_CHUNK_COMMAND_OFFSET 18
  87. #define F35_CHUNK_SIZE 16
  88. #define F35_ERASE_ALL_WAIT_MS 5000
  89. #define F35_RESET_WAIT_MS 250
  90. #define SLEEP_MODE_NORMAL (0x00)
  91. #define SLEEP_MODE_SENSOR_SLEEP (0x01)
  92. #define SLEEP_MODE_RESERVED0 (0x02)
  93. #define SLEEP_MODE_RESERVED1 (0x03)
  94. #define ENABLE_WAIT_MS (1 * 1000)
  95. #define WRITE_WAIT_MS (3 * 1000)
  96. #define ERASE_WAIT_MS (5 * 1000)
  97. #define MIN_SLEEP_TIME_US 50
  98. #define MAX_SLEEP_TIME_US 100
  99. #define INT_DISABLE_WAIT_MS 20
  100. #define ENTER_FLASH_PROG_WAIT_MS 20
  101. #define READ_CONFIG_WAIT_MS 20
  102. static int fwu_do_reflash(void);
  103. static int fwu_recovery_check_status(void);
  104. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  105. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  106. struct kobject *kobj, struct bin_attribute *attributes,
  107. char *buf, loff_t pos, size_t count);
  108. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  109. struct kobject *kobj, struct bin_attribute *attributes,
  110. char *buf, loff_t pos, size_t count);
  111. static ssize_t fwu_sysfs_do_recovery_store(struct device *dev,
  112. struct device_attribute *attr, const char *buf, size_t count);
  113. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  114. struct device_attribute *attr, const char *buf, size_t count);
  115. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  116. struct device_attribute *attr, const char *buf, size_t count);
  117. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  118. struct device_attribute *attr, const char *buf, size_t count);
  119. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  120. struct device_attribute *attr, const char *buf, size_t count);
  121. static ssize_t fwu_sysfs_image_name_store(struct device *dev,
  122. struct device_attribute *attr, const char *buf, size_t count);
  123. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  124. struct device_attribute *attr, const char *buf, size_t count);
  125. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  126. struct device_attribute *attr, char *buf);
  127. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  128. struct device_attribute *attr, char *buf);
  129. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  130. struct device_attribute *attr, char *buf);
  131. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  132. struct device_attribute *attr, char *buf);
  133. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  134. struct device_attribute *attr, char *buf);
  135. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  136. struct device_attribute *attr, char *buf);
  137. static ssize_t fwu_sysfs_utility_parameter_block_count_show(struct device *dev,
  138. struct device_attribute *attr, char *buf);
  139. static ssize_t fwu_sysfs_guest_code_block_count_show(struct device *dev,
  140. struct device_attribute *attr, char *buf);
  141. static ssize_t fwu_sysfs_write_guest_code_store(struct device *dev,
  142. struct device_attribute *attr, const char *buf, size_t count);
  143. #ifdef SYNA_TDDI
  144. static ssize_t fwu_sysfs_write_lockdown_code_store(struct device *dev,
  145. struct device_attribute *attr, const char *buf, size_t count);
  146. static ssize_t fwu_sysfs_read_lockdown_code_show(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. #endif
  149. #endif
  150. enum f34_version {
  151. F34_V0 = 0,
  152. F34_V1,
  153. F34_V2,
  154. };
  155. enum bl_version {
  156. BL_V5 = 5,
  157. BL_V6 = 6,
  158. BL_V7 = 7,
  159. BL_V8 = 8,
  160. };
  161. enum flash_area {
  162. NONE = 0,
  163. UI_FIRMWARE,
  164. UI_CONFIG,
  165. };
  166. enum update_mode {
  167. NORMAL = 1,
  168. FORCE = 2,
  169. LOCKDOWN = 8,
  170. };
  171. enum config_area {
  172. UI_CONFIG_AREA = 0,
  173. PM_CONFIG_AREA,
  174. BL_CONFIG_AREA,
  175. DP_CONFIG_AREA,
  176. FLASH_CONFIG_AREA,
  177. #ifdef SYNA_TDDI
  178. TDDI_FORCE_CONFIG_AREA,
  179. TDDI_LCM_DATA_AREA,
  180. TDDI_OEM_DATA_AREA,
  181. #endif
  182. UPP_AREA,
  183. };
  184. enum v7_status {
  185. SUCCESS = 0x00,
  186. DEVICE_NOT_IN_BOOTLOADER_MODE,
  187. INVALID_PARTITION,
  188. INVALID_COMMAND,
  189. INVALID_BLOCK_OFFSET,
  190. INVALID_TRANSFER,
  191. NOT_ERASED,
  192. FLASH_PROGRAMMING_KEY_INCORRECT,
  193. BAD_PARTITION_TABLE,
  194. CHECKSUM_FAILED,
  195. FLASH_HARDWARE_FAILURE = 0x1f,
  196. };
  197. enum v7_partition_id {
  198. BOOTLOADER_PARTITION = 0x01,
  199. DEVICE_CONFIG_PARTITION,
  200. FLASH_CONFIG_PARTITION,
  201. MANUFACTURING_BLOCK_PARTITION,
  202. GUEST_SERIALIZATION_PARTITION,
  203. GLOBAL_PARAMETERS_PARTITION,
  204. CORE_CODE_PARTITION,
  205. CORE_CONFIG_PARTITION,
  206. GUEST_CODE_PARTITION,
  207. DISPLAY_CONFIG_PARTITION,
  208. EXTERNAL_TOUCH_AFE_CONFIG_PARTITION,
  209. UTILITY_PARAMETER_PARTITION,
  210. };
  211. enum v7_flash_command {
  212. CMD_V7_IDLE = 0x00,
  213. CMD_V7_ENTER_BL,
  214. CMD_V7_READ,
  215. CMD_V7_WRITE,
  216. CMD_V7_ERASE,
  217. CMD_V7_ERASE_AP,
  218. CMD_V7_SENSOR_ID,
  219. };
  220. enum v5v6_flash_command {
  221. CMD_V5V6_IDLE = 0x0,
  222. CMD_V5V6_WRITE_FW = 0x2,
  223. CMD_V5V6_ERASE_ALL = 0x3,
  224. CMD_V5V6_WRITE_LOCKDOWN = 0x4,
  225. CMD_V5V6_READ_CONFIG = 0x5,
  226. CMD_V5V6_WRITE_CONFIG = 0x6,
  227. CMD_V5V6_ERASE_UI_CONFIG = 0x7,
  228. CMD_V5V6_ERASE_BL_CONFIG = 0x9,
  229. CMD_V5V6_ERASE_DISP_CONFIG = 0xa,
  230. CMD_V5V6_ERASE_GUEST_CODE = 0xb,
  231. CMD_V5V6_WRITE_GUEST_CODE = 0xc,
  232. CMD_V5V6_ERASE_CHIP = 0x0d,
  233. CMD_V5V6_ENABLE_FLASH_PROG = 0xf,
  234. #ifdef SYNA_TDDI
  235. CMD_V5V6_ERASE_FORCE_CONFIG = 0x11,
  236. CMD_V5V6_READ_FORCE_CONFIG = 0x12,
  237. CMD_V5V6_WRITE_FORCE_CONFIG = 0x13,
  238. CMD_V5V6_ERASE_LOCKDOWN_DATA = 0x1a,
  239. CMD_V5V6_READ_LOCKDOWN_DATA = 0x1b,
  240. CMD_V5V6_WRITE_LOCKDOWN_DATA = 0x1c,
  241. CMD_V5V6_ERASE_LCM_DATA = 0x1d,
  242. CMD_V5V6_ERASE_OEM_DATA = 0x1e,
  243. #endif
  244. };
  245. enum flash_command {
  246. CMD_IDLE = 0,
  247. CMD_WRITE_FW,
  248. CMD_WRITE_CONFIG,
  249. CMD_WRITE_LOCKDOWN,
  250. CMD_WRITE_GUEST_CODE,
  251. CMD_WRITE_BOOTLOADER,
  252. CMD_WRITE_UTILITY_PARAM,
  253. CMD_READ_CONFIG,
  254. CMD_ERASE_ALL,
  255. CMD_ERASE_UI_FIRMWARE,
  256. CMD_ERASE_UI_CONFIG,
  257. CMD_ERASE_BL_CONFIG,
  258. CMD_ERASE_DISP_CONFIG,
  259. CMD_ERASE_FLASH_CONFIG,
  260. CMD_ERASE_GUEST_CODE,
  261. CMD_ERASE_BOOTLOADER,
  262. CMD_ERASE_UTILITY_PARAMETER,
  263. CMD_ENABLE_FLASH_PROG,
  264. #ifdef SYNA_TDDI
  265. CMD_ERASE_CHIP,
  266. CMD_ERASE_FORCE_CONFIG,
  267. CMD_READ_FORCE_CONFIG,
  268. CMD_WRITE_FORCE_CONFIG,
  269. CMD_ERASE_LOCKDOWN_DATA,
  270. CMD_READ_LOCKDOWN_DATA,
  271. CMD_WRITE_LOCKDOWN_DATA,
  272. CMD_ERASE_LCM_DATA,
  273. CMD_READ_LCM_DATA,
  274. CMD_WRITE_LCM_DATA,
  275. CMD_ERASE_OEM_DATA,
  276. CMD_READ_OEM_DATA,
  277. CMD_WRITE_OEM_DATA,
  278. #endif
  279. };
  280. enum f35_flash_command {
  281. CMD_F35_IDLE = 0x0,
  282. CMD_F35_RESERVED = 0x1,
  283. CMD_F35_WRITE_CHUNK = 0x2,
  284. CMD_F35_ERASE_ALL = 0x3,
  285. CMD_F35_RESET = 0x10,
  286. };
  287. enum container_id {
  288. TOP_LEVEL_CONTAINER = 0,
  289. UI_CONTAINER,
  290. UI_CONFIG_CONTAINER,
  291. BL_CONTAINER,
  292. BL_IMAGE_CONTAINER,
  293. BL_CONFIG_CONTAINER,
  294. BL_LOCKDOWN_INFO_CONTAINER,
  295. PERMANENT_CONFIG_CONTAINER,
  296. GUEST_CODE_CONTAINER,
  297. BL_PROTOCOL_DESCRIPTOR_CONTAINER,
  298. UI_PROTOCOL_DESCRIPTOR_CONTAINER,
  299. RMI_SELF_DISCOVERY_CONTAINER,
  300. RMI_PAGE_CONTENT_CONTAINER,
  301. GENERAL_INFORMATION_CONTAINER,
  302. DEVICE_CONFIG_CONTAINER,
  303. FLASH_CONFIG_CONTAINER,
  304. GUEST_SERIALIZATION_CONTAINER,
  305. GLOBAL_PARAMETERS_CONTAINER,
  306. CORE_CODE_CONTAINER,
  307. CORE_CONFIG_CONTAINER,
  308. DISPLAY_CONFIG_CONTAINER,
  309. EXTERNAL_TOUCH_AFE_CONFIG_CONTAINER,
  310. UTILITY_CONTAINER,
  311. UTILITY_PARAMETER_CONTAINER,
  312. };
  313. enum utility_parameter_id {
  314. UNUSED = 0,
  315. FORCE_PARAMETER,
  316. ANTI_BENDING_PARAMETER,
  317. };
  318. struct pdt_properties {
  319. union {
  320. struct {
  321. unsigned char reserved_1:6;
  322. unsigned char has_bsr:1;
  323. unsigned char reserved_2:1;
  324. } __packed;
  325. unsigned char data[1];
  326. };
  327. };
  328. struct partition_table {
  329. unsigned char partition_id:5;
  330. unsigned char byte_0_reserved:3;
  331. unsigned char byte_1_reserved;
  332. unsigned char partition_length_7_0;
  333. unsigned char partition_length_15_8;
  334. unsigned char start_physical_address_7_0;
  335. unsigned char start_physical_address_15_8;
  336. unsigned char partition_properties_7_0;
  337. unsigned char partition_properties_15_8;
  338. } __packed;
  339. struct f01_device_control {
  340. union {
  341. struct {
  342. unsigned char sleep_mode:2;
  343. unsigned char nosleep:1;
  344. unsigned char reserved:2;
  345. unsigned char charger_connected:1;
  346. unsigned char report_rate:1;
  347. unsigned char configured:1;
  348. } __packed;
  349. unsigned char data[1];
  350. };
  351. };
  352. struct f34_v7_query_0 {
  353. union {
  354. struct {
  355. unsigned char subpacket_1_size:3;
  356. unsigned char has_config_id:1;
  357. unsigned char f34_query0_b4:1;
  358. unsigned char has_thqa:1;
  359. unsigned char f34_query0_b6__7:2;
  360. } __packed;
  361. unsigned char data[1];
  362. };
  363. };
  364. struct f34_v7_query_1_7 {
  365. union {
  366. struct {
  367. /* query 1 */
  368. unsigned char bl_minor_revision;
  369. unsigned char bl_major_revision;
  370. /* query 2 */
  371. unsigned char bl_fw_id_7_0;
  372. unsigned char bl_fw_id_15_8;
  373. unsigned char bl_fw_id_23_16;
  374. unsigned char bl_fw_id_31_24;
  375. /* query 3 */
  376. unsigned char minimum_write_size;
  377. unsigned char block_size_7_0;
  378. unsigned char block_size_15_8;
  379. unsigned char flash_page_size_7_0;
  380. unsigned char flash_page_size_15_8;
  381. /* query 4 */
  382. unsigned char adjustable_partition_area_size_7_0;
  383. unsigned char adjustable_partition_area_size_15_8;
  384. /* query 5 */
  385. unsigned char flash_config_length_7_0;
  386. unsigned char flash_config_length_15_8;
  387. /* query 6 */
  388. unsigned char payload_length_7_0;
  389. unsigned char payload_length_15_8;
  390. /* query 7 */
  391. unsigned char f34_query7_b0:1;
  392. unsigned char has_bootloader:1;
  393. unsigned char has_device_config:1;
  394. unsigned char has_flash_config:1;
  395. unsigned char has_manufacturing_block:1;
  396. unsigned char has_guest_serialization:1;
  397. unsigned char has_global_parameters:1;
  398. unsigned char has_core_code:1;
  399. unsigned char has_core_config:1;
  400. unsigned char has_guest_code:1;
  401. unsigned char has_display_config:1;
  402. unsigned char f34_query7_b11__15:5;
  403. unsigned char f34_query7_b16__23;
  404. unsigned char f34_query7_b24__31;
  405. } __packed;
  406. unsigned char data[21];
  407. };
  408. };
  409. struct f34_v7_data0 {
  410. union {
  411. struct {
  412. unsigned char operation_status:5;
  413. unsigned char device_cfg_status:2;
  414. unsigned char bl_mode:1;
  415. } __packed;
  416. unsigned char data[1];
  417. };
  418. };
  419. struct f34_v7_data_1_5 {
  420. union {
  421. struct {
  422. unsigned char partition_id:5;
  423. unsigned char f34_data1_b5__7:3;
  424. unsigned char block_offset_7_0;
  425. unsigned char block_offset_15_8;
  426. unsigned char transfer_length_7_0;
  427. unsigned char transfer_length_15_8;
  428. unsigned char command;
  429. unsigned char payload_0;
  430. unsigned char payload_1;
  431. } __packed;
  432. unsigned char data[8];
  433. };
  434. };
  435. struct f34_v5v6_flash_properties {
  436. union {
  437. struct {
  438. unsigned char reg_map:1;
  439. unsigned char unlocked:1;
  440. unsigned char has_config_id:1;
  441. unsigned char has_pm_config:1;
  442. unsigned char has_bl_config:1;
  443. unsigned char has_disp_config:1;
  444. unsigned char has_ctrl1:1;
  445. unsigned char has_query4:1;
  446. } __packed;
  447. unsigned char data[1];
  448. };
  449. };
  450. struct f34_v5v6_flash_properties_2 {
  451. union {
  452. struct {
  453. unsigned char has_guest_code:1;
  454. unsigned char f34_query4_b1:1;
  455. unsigned char has_gesture_config:1;
  456. unsigned char has_force_config:1;
  457. unsigned char has_lockdown_data:1;
  458. unsigned char has_lcm_data:1;
  459. unsigned char has_oem_data:1;
  460. unsigned char f34_query4_b7:1;
  461. } __packed;
  462. unsigned char data[1];
  463. };
  464. };
  465. struct register_offset {
  466. unsigned char properties;
  467. unsigned char properties_2;
  468. unsigned char block_size;
  469. unsigned char block_count;
  470. unsigned char gc_block_count;
  471. unsigned char flash_status;
  472. unsigned char partition_id;
  473. unsigned char block_number;
  474. unsigned char transfer_length;
  475. unsigned char flash_cmd;
  476. unsigned char payload;
  477. };
  478. struct block_count {
  479. unsigned short ui_firmware;
  480. unsigned short ui_config;
  481. unsigned short dp_config;
  482. unsigned short pm_config;
  483. unsigned short fl_config;
  484. unsigned short bl_image;
  485. unsigned short bl_config;
  486. unsigned short utility_param;
  487. unsigned short lockdown;
  488. unsigned short guest_code;
  489. #ifdef SYNA_TDDI
  490. unsigned short tddi_force_config;
  491. unsigned short tddi_lockdown_data;
  492. unsigned short tddi_lcm_data;
  493. unsigned short tddi_oem_data;
  494. #endif
  495. unsigned short total_count;
  496. };
  497. struct physical_address {
  498. unsigned short ui_firmware;
  499. unsigned short ui_config;
  500. unsigned short dp_config;
  501. unsigned short pm_config;
  502. unsigned short fl_config;
  503. unsigned short bl_image;
  504. unsigned short bl_config;
  505. unsigned short utility_param;
  506. unsigned short lockdown;
  507. unsigned short guest_code;
  508. };
  509. struct container_descriptor {
  510. unsigned char content_checksum[4];
  511. unsigned char container_id[2];
  512. unsigned char minor_version;
  513. unsigned char major_version;
  514. unsigned char reserved_08;
  515. unsigned char reserved_09;
  516. unsigned char reserved_0a;
  517. unsigned char reserved_0b;
  518. unsigned char container_option_flags[4];
  519. unsigned char content_options_length[4];
  520. unsigned char content_options_address[4];
  521. unsigned char content_length[4];
  522. unsigned char content_address[4];
  523. };
  524. struct image_header_10 {
  525. unsigned char checksum[4];
  526. unsigned char reserved_04;
  527. unsigned char reserved_05;
  528. unsigned char minor_header_version;
  529. unsigned char major_header_version;
  530. unsigned char reserved_08;
  531. unsigned char reserved_09;
  532. unsigned char reserved_0a;
  533. unsigned char reserved_0b;
  534. unsigned char top_level_container_start_addr[4];
  535. };
  536. struct image_header_05_06 {
  537. /* 0x00 - 0x0f */
  538. unsigned char checksum[4];
  539. unsigned char reserved_04;
  540. unsigned char reserved_05;
  541. unsigned char options_firmware_id:1;
  542. unsigned char options_bootloader:1;
  543. unsigned char options_guest_code:1;
  544. unsigned char options_tddi:1;
  545. unsigned char options_reserved:4;
  546. unsigned char header_version;
  547. unsigned char firmware_size[4];
  548. unsigned char config_size[4];
  549. /* 0x10 - 0x1f */
  550. unsigned char product_id[PRODUCT_ID_SIZE];
  551. unsigned char package_id[2];
  552. unsigned char package_id_revision[2];
  553. unsigned char product_info[PRODUCT_INFO_SIZE];
  554. /* 0x20 - 0x2f */
  555. unsigned char bootloader_addr[4];
  556. unsigned char bootloader_size[4];
  557. unsigned char ui_addr[4];
  558. unsigned char ui_size[4];
  559. /* 0x30 - 0x3f */
  560. unsigned char ds_id[16];
  561. /* 0x40 - 0x4f */
  562. union {
  563. struct {
  564. unsigned char cstmr_product_id[PRODUCT_ID_SIZE];
  565. unsigned char reserved_4a_4f[6];
  566. };
  567. struct {
  568. unsigned char dsp_cfg_addr[4];
  569. unsigned char dsp_cfg_size[4];
  570. unsigned char reserved_48_4f[8];
  571. };
  572. };
  573. /* 0x50 - 0x53 */
  574. unsigned char firmware_id[4];
  575. };
  576. struct block_data {
  577. unsigned int size;
  578. const unsigned char *data;
  579. };
  580. struct image_metadata {
  581. bool contains_firmware_id;
  582. bool contains_bootloader;
  583. bool contains_guest_code;
  584. bool contains_disp_config;
  585. bool contains_perm_config;
  586. bool contains_flash_config;
  587. bool contains_utility_param;
  588. unsigned int firmware_id;
  589. unsigned int checksum;
  590. unsigned int bootloader_size;
  591. unsigned int disp_config_offset;
  592. unsigned char bl_version;
  593. unsigned char product_id[PRODUCT_ID_SIZE + 1];
  594. unsigned char cstmr_product_id[PRODUCT_ID_SIZE + 1];
  595. unsigned char utility_param_id[MAX_UTILITY_PARAMS];
  596. struct block_data bootloader;
  597. struct block_data utility;
  598. struct block_data ui_firmware;
  599. struct block_data ui_config;
  600. struct block_data dp_config;
  601. struct block_data pm_config;
  602. struct block_data fl_config;
  603. struct block_data bl_image;
  604. struct block_data bl_config;
  605. struct block_data utility_param[MAX_UTILITY_PARAMS];
  606. struct block_data lockdown;
  607. struct block_data guest_code;
  608. struct block_count blkcount;
  609. struct physical_address phyaddr;
  610. };
  611. struct synaptics_rmi4_fwu_handle {
  612. enum bl_version bl_version;
  613. bool initialized;
  614. bool in_bl_mode;
  615. bool in_ub_mode;
  616. bool bl_mode_device;
  617. bool force_update;
  618. bool do_lockdown;
  619. bool has_guest_code;
  620. #ifdef SYNA_TDDI
  621. bool has_force_config;
  622. bool has_lockdown_data;
  623. bool has_lcm_data;
  624. bool has_oem_data;
  625. #endif
  626. bool has_utility_param;
  627. bool new_partition_table;
  628. bool incompatible_partition_tables;
  629. bool write_bootloader;
  630. unsigned int data_pos;
  631. unsigned char *ext_data_source;
  632. unsigned char *read_config_buf;
  633. unsigned char intr_mask;
  634. unsigned char command;
  635. unsigned char bootloader_id[2];
  636. unsigned char config_id[32];
  637. unsigned char flash_status;
  638. unsigned char partitions;
  639. #ifdef F51_DISCRETE_FORCE
  640. unsigned char *cal_data;
  641. unsigned short cal_data_off;
  642. unsigned short cal_data_size;
  643. unsigned short cal_data_buf_size;
  644. unsigned short cal_packet_data_size;
  645. #endif
  646. unsigned short block_size;
  647. unsigned short config_size;
  648. unsigned short config_area;
  649. unsigned short config_block_count;
  650. unsigned short flash_config_length;
  651. unsigned short payload_length;
  652. unsigned short partition_table_bytes;
  653. unsigned short read_config_buf_size;
  654. const unsigned char *config_data;
  655. const unsigned char *image;
  656. unsigned char *image_name;
  657. unsigned int image_size;
  658. struct image_metadata img;
  659. struct register_offset off;
  660. struct block_count blkcount;
  661. struct physical_address phyaddr;
  662. struct f34_v5v6_flash_properties flash_properties;
  663. struct synaptics_rmi4_fn_desc f34_fd;
  664. struct synaptics_rmi4_fn_desc f35_fd;
  665. struct synaptics_rmi4_data *rmi4_data;
  666. struct workqueue_struct *fwu_workqueue;
  667. struct work_struct fwu_work;
  668. };
  669. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  670. static struct bin_attribute dev_attr_data = {
  671. .attr = {
  672. .name = "data",
  673. .mode = 0664,
  674. },
  675. .size = 0,
  676. .read = fwu_sysfs_show_image,
  677. .write = fwu_sysfs_store_image,
  678. };
  679. #endif
  680. static struct device_attribute attrs[] = {
  681. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  682. __ATTR(dorecovery, 0220,
  683. synaptics_rmi4_show_error,
  684. fwu_sysfs_do_recovery_store),
  685. __ATTR(doreflash, 0220,
  686. synaptics_rmi4_show_error,
  687. fwu_sysfs_do_reflash_store),
  688. __ATTR(writeconfig, 0220,
  689. synaptics_rmi4_show_error,
  690. fwu_sysfs_write_config_store),
  691. __ATTR(readconfig, 0220,
  692. synaptics_rmi4_show_error,
  693. fwu_sysfs_read_config_store),
  694. __ATTR(configarea, 0220,
  695. synaptics_rmi4_show_error,
  696. fwu_sysfs_config_area_store),
  697. __ATTR(imagename, 0220,
  698. synaptics_rmi4_show_error,
  699. fwu_sysfs_image_name_store),
  700. __ATTR(imagesize, 0220,
  701. synaptics_rmi4_show_error,
  702. fwu_sysfs_image_size_store),
  703. __ATTR(blocksize, 0444,
  704. fwu_sysfs_block_size_show,
  705. synaptics_rmi4_store_error),
  706. __ATTR(fwblockcount, 0444,
  707. fwu_sysfs_firmware_block_count_show,
  708. synaptics_rmi4_store_error),
  709. __ATTR(configblockcount, 0444,
  710. fwu_sysfs_configuration_block_count_show,
  711. synaptics_rmi4_store_error),
  712. __ATTR(dispconfigblockcount, 0444,
  713. fwu_sysfs_disp_config_block_count_show,
  714. synaptics_rmi4_store_error),
  715. __ATTR(permconfigblockcount, 0444,
  716. fwu_sysfs_perm_config_block_count_show,
  717. synaptics_rmi4_store_error),
  718. __ATTR(blconfigblockcount, 0444,
  719. fwu_sysfs_bl_config_block_count_show,
  720. synaptics_rmi4_store_error),
  721. __ATTR(uppblockcount, 0444,
  722. fwu_sysfs_utility_parameter_block_count_show,
  723. synaptics_rmi4_store_error),
  724. __ATTR(guestcodeblockcount, 0444,
  725. fwu_sysfs_guest_code_block_count_show,
  726. synaptics_rmi4_store_error),
  727. __ATTR(writeguestcode, 0220,
  728. synaptics_rmi4_show_error,
  729. fwu_sysfs_write_guest_code_store),
  730. #ifdef SYNA_TDDI
  731. __ATTR(lockdowncode, 0664,
  732. fwu_sysfs_read_lockdown_code_show,
  733. fwu_sysfs_write_lockdown_code_store),
  734. #endif
  735. #endif
  736. };
  737. static struct synaptics_rmi4_fwu_handle *fwu;
  738. DECLARE_COMPLETION(fwu_remove_complete);
  739. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  740. DEFINE_MUTEX(fwu_sysfs_mutex);
  741. #endif
  742. static void calculate_checksum(unsigned short *data, unsigned long len,
  743. unsigned long *result)
  744. {
  745. unsigned long temp;
  746. unsigned long sum1 = 0xffff;
  747. unsigned long sum2 = 0xffff;
  748. *result = 0xffffffff;
  749. while (len--) {
  750. temp = *data;
  751. sum1 += temp;
  752. sum2 += sum1;
  753. sum1 = (sum1 & 0xffff) + (sum1 >> 16);
  754. sum2 = (sum2 & 0xffff) + (sum2 >> 16);
  755. data++;
  756. }
  757. *result = sum2 << 16 | sum1;
  758. }
  759. static void convert_to_little_endian(unsigned char *dest, unsigned long src)
  760. {
  761. dest[0] = (unsigned char)(src & 0xff);
  762. dest[1] = (unsigned char)((src >> 8) & 0xff);
  763. dest[2] = (unsigned char)((src >> 16) & 0xff);
  764. dest[3] = (unsigned char)((src >> 24) & 0xff);
  765. }
  766. static unsigned int le_to_uint(const unsigned char *ptr)
  767. {
  768. return (unsigned int)ptr[0] +
  769. (unsigned int)ptr[1] * 0x100 +
  770. (unsigned int)ptr[2] * 0x10000 +
  771. (unsigned int)ptr[3] * 0x1000000;
  772. }
  773. #ifdef F51_DISCRETE_FORCE
  774. static int fwu_f51_force_data_init(void)
  775. {
  776. int retval;
  777. unsigned char query_count;
  778. unsigned char packet_info;
  779. unsigned char offset[2];
  780. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  781. retval = synaptics_rmi4_reg_read(rmi4_data,
  782. rmi4_data->f51_query_base_addr + 7,
  783. offset,
  784. sizeof(offset));
  785. if (retval < 0) {
  786. dev_err(rmi4_data->pdev->dev.parent,
  787. "%s: Failed to read force data offset\n",
  788. __func__);
  789. return retval;
  790. }
  791. fwu->cal_data_off = offset[0] | offset[1] << 8;
  792. retval = synaptics_rmi4_reg_read(rmi4_data,
  793. rmi4_data->f51_query_base_addr,
  794. &query_count,
  795. sizeof(query_count));
  796. if (retval < 0) {
  797. dev_err(rmi4_data->pdev->dev.parent,
  798. "%s: Failed to read number of F51 query registers\n",
  799. __func__);
  800. return retval;
  801. }
  802. if (query_count >= 10) {
  803. retval = synaptics_rmi4_reg_read(rmi4_data,
  804. rmi4_data->f51_query_base_addr + 9,
  805. &packet_info,
  806. sizeof(packet_info));
  807. if (retval < 0) {
  808. dev_err(rmi4_data->pdev->dev.parent,
  809. "%s: Failed to read F51 packet register info\n",
  810. __func__);
  811. return retval;
  812. }
  813. if (packet_info & MASK_1BIT) {
  814. fwu->cal_packet_data_size = packet_info >> 1;
  815. fwu->cal_packet_data_size *= 2;
  816. } else {
  817. fwu->cal_packet_data_size = 0;
  818. }
  819. } else {
  820. fwu->cal_packet_data_size = 0;
  821. }
  822. fwu->cal_data_size = CAL_DATA_SIZE + fwu->cal_packet_data_size;
  823. if (fwu->cal_data_size > fwu->cal_data_buf_size) {
  824. kfree(fwu->cal_data);
  825. fwu->cal_data_buf_size = fwu->cal_data_size;
  826. fwu->cal_data = kmalloc(fwu->cal_data_buf_size, GFP_KERNEL);
  827. if (!fwu->cal_data) {
  828. dev_err(rmi4_data->pdev->dev.parent,
  829. "%s: Failed to alloc mem for fwu->cal_data\n",
  830. __func__);
  831. fwu->cal_data_buf_size = 0;
  832. return -ENOMEM;
  833. }
  834. }
  835. return 0;
  836. }
  837. #endif
  838. static int fwu_allocate_read_config_buf(unsigned int count)
  839. {
  840. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  841. if (count > fwu->read_config_buf_size) {
  842. kfree(fwu->read_config_buf);
  843. fwu->read_config_buf = kzalloc(count, GFP_KERNEL);
  844. if (!fwu->read_config_buf) {
  845. dev_err(rmi4_data->pdev->dev.parent,
  846. "%s: Failed to alloc mem for fwu->read_config_buf\n",
  847. __func__);
  848. fwu->read_config_buf_size = 0;
  849. return -ENOMEM;
  850. }
  851. fwu->read_config_buf_size = count;
  852. }
  853. return 0;
  854. }
  855. static void fwu_compare_partition_tables(void)
  856. {
  857. fwu->incompatible_partition_tables = false;
  858. if (fwu->phyaddr.bl_image != fwu->img.phyaddr.bl_image)
  859. fwu->incompatible_partition_tables = true;
  860. else if (fwu->phyaddr.lockdown != fwu->img.phyaddr.lockdown)
  861. fwu->incompatible_partition_tables = true;
  862. else if (fwu->phyaddr.bl_config != fwu->img.phyaddr.bl_config)
  863. fwu->incompatible_partition_tables = true;
  864. else if (fwu->phyaddr.utility_param != fwu->img.phyaddr.utility_param)
  865. fwu->incompatible_partition_tables = true;
  866. if (fwu->bl_version == BL_V7) {
  867. if (fwu->phyaddr.fl_config != fwu->img.phyaddr.fl_config)
  868. fwu->incompatible_partition_tables = true;
  869. }
  870. fwu->new_partition_table = false;
  871. if (fwu->phyaddr.ui_firmware != fwu->img.phyaddr.ui_firmware)
  872. fwu->new_partition_table = true;
  873. else if (fwu->phyaddr.ui_config != fwu->img.phyaddr.ui_config)
  874. fwu->new_partition_table = true;
  875. if (fwu->flash_properties.has_disp_config) {
  876. if (fwu->phyaddr.dp_config != fwu->img.phyaddr.dp_config)
  877. fwu->new_partition_table = true;
  878. }
  879. if (fwu->has_guest_code) {
  880. if (fwu->phyaddr.guest_code != fwu->img.phyaddr.guest_code)
  881. fwu->new_partition_table = true;
  882. }
  883. }
  884. static void fwu_parse_partition_table(const unsigned char *partition_table,
  885. struct block_count *blkcount, struct physical_address *phyaddr)
  886. {
  887. unsigned char ii;
  888. unsigned char index;
  889. unsigned char offset;
  890. unsigned short partition_length;
  891. unsigned short physical_address;
  892. struct partition_table *ptable;
  893. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  894. for (ii = 0; ii < fwu->partitions; ii++) {
  895. index = ii * 8 + 2;
  896. ptable = (struct partition_table *)&partition_table[index];
  897. partition_length = ptable->partition_length_15_8 << 8 |
  898. ptable->partition_length_7_0;
  899. physical_address = ptable->start_physical_address_15_8 << 8 |
  900. ptable->start_physical_address_7_0;
  901. dev_dbg(rmi4_data->pdev->dev.parent,
  902. "%s: Partition entry %d:\n",
  903. __func__, ii);
  904. for (offset = 0; offset < 8; offset++) {
  905. dev_dbg(rmi4_data->pdev->dev.parent,
  906. "%s: 0x%02x\n",
  907. __func__,
  908. partition_table[index + offset]);
  909. }
  910. switch (ptable->partition_id) {
  911. case CORE_CODE_PARTITION:
  912. blkcount->ui_firmware = partition_length;
  913. phyaddr->ui_firmware = physical_address;
  914. dev_dbg(rmi4_data->pdev->dev.parent,
  915. "%s: Core code block count: %d\n",
  916. __func__, blkcount->ui_firmware);
  917. blkcount->total_count += partition_length;
  918. break;
  919. case CORE_CONFIG_PARTITION:
  920. blkcount->ui_config = partition_length;
  921. phyaddr->ui_config = physical_address;
  922. dev_dbg(rmi4_data->pdev->dev.parent,
  923. "%s: Core config block count: %d\n",
  924. __func__, blkcount->ui_config);
  925. blkcount->total_count += partition_length;
  926. break;
  927. case BOOTLOADER_PARTITION:
  928. blkcount->bl_image = partition_length;
  929. phyaddr->bl_image = physical_address;
  930. dev_dbg(rmi4_data->pdev->dev.parent,
  931. "%s: Bootloader block count: %d\n",
  932. __func__, blkcount->bl_image);
  933. blkcount->total_count += partition_length;
  934. break;
  935. case UTILITY_PARAMETER_PARTITION:
  936. blkcount->utility_param = partition_length;
  937. phyaddr->utility_param = physical_address;
  938. dev_dbg(rmi4_data->pdev->dev.parent,
  939. "%s: Utility parameter block count: %d\n",
  940. __func__, blkcount->utility_param);
  941. blkcount->total_count += partition_length;
  942. break;
  943. case DISPLAY_CONFIG_PARTITION:
  944. blkcount->dp_config = partition_length;
  945. phyaddr->dp_config = physical_address;
  946. dev_dbg(rmi4_data->pdev->dev.parent,
  947. "%s: Display config block count: %d\n",
  948. __func__, blkcount->dp_config);
  949. blkcount->total_count += partition_length;
  950. break;
  951. case FLASH_CONFIG_PARTITION:
  952. blkcount->fl_config = partition_length;
  953. phyaddr->fl_config = physical_address;
  954. dev_dbg(rmi4_data->pdev->dev.parent,
  955. "%s: Flash config block count: %d\n",
  956. __func__, blkcount->fl_config);
  957. blkcount->total_count += partition_length;
  958. break;
  959. case GUEST_CODE_PARTITION:
  960. blkcount->guest_code = partition_length;
  961. phyaddr->guest_code = physical_address;
  962. dev_dbg(rmi4_data->pdev->dev.parent,
  963. "%s: Guest code block count: %d\n",
  964. __func__, blkcount->guest_code);
  965. blkcount->total_count += partition_length;
  966. break;
  967. case GUEST_SERIALIZATION_PARTITION:
  968. blkcount->pm_config = partition_length;
  969. phyaddr->pm_config = physical_address;
  970. dev_dbg(rmi4_data->pdev->dev.parent,
  971. "%s: Guest serialization block count: %d\n",
  972. __func__, blkcount->pm_config);
  973. blkcount->total_count += partition_length;
  974. break;
  975. case GLOBAL_PARAMETERS_PARTITION:
  976. blkcount->bl_config = partition_length;
  977. phyaddr->bl_config = physical_address;
  978. dev_dbg(rmi4_data->pdev->dev.parent,
  979. "%s: Global parameters block count: %d\n",
  980. __func__, blkcount->bl_config);
  981. blkcount->total_count += partition_length;
  982. break;
  983. case DEVICE_CONFIG_PARTITION:
  984. blkcount->lockdown = partition_length;
  985. phyaddr->lockdown = physical_address;
  986. dev_dbg(rmi4_data->pdev->dev.parent,
  987. "%s: Device config block count: %d\n",
  988. __func__, blkcount->lockdown);
  989. blkcount->total_count += partition_length;
  990. break;
  991. };
  992. }
  993. }
  994. static void fwu_parse_image_header_10_utility(const unsigned char *image)
  995. {
  996. unsigned char ii;
  997. unsigned char num_of_containers;
  998. unsigned int addr;
  999. unsigned int container_id;
  1000. unsigned int length;
  1001. const unsigned char *content;
  1002. struct container_descriptor *descriptor;
  1003. num_of_containers = fwu->img.utility.size / 4;
  1004. for (ii = 0; ii < num_of_containers; ii++) {
  1005. if (ii >= MAX_UTILITY_PARAMS)
  1006. continue;
  1007. addr = le_to_uint(fwu->img.utility.data + (ii * 4));
  1008. descriptor = (struct container_descriptor *)(image + addr);
  1009. container_id = descriptor->container_id[0] |
  1010. descriptor->container_id[1] << 8;
  1011. content = image + le_to_uint(descriptor->content_address);
  1012. length = le_to_uint(descriptor->content_length);
  1013. switch (container_id) {
  1014. case UTILITY_PARAMETER_CONTAINER:
  1015. fwu->img.utility_param[ii].data = content;
  1016. fwu->img.utility_param[ii].size = length;
  1017. fwu->img.utility_param_id[ii] = content[0];
  1018. break;
  1019. default:
  1020. break;
  1021. };
  1022. }
  1023. }
  1024. static void fwu_parse_image_header_10_bootloader(const unsigned char *image)
  1025. {
  1026. unsigned char ii;
  1027. unsigned char num_of_containers;
  1028. unsigned int addr;
  1029. unsigned int container_id;
  1030. unsigned int length;
  1031. const unsigned char *content;
  1032. struct container_descriptor *descriptor;
  1033. num_of_containers = (fwu->img.bootloader.size - 4) / 4;
  1034. for (ii = 1; ii <= num_of_containers; ii++) {
  1035. addr = le_to_uint(fwu->img.bootloader.data + (ii * 4));
  1036. descriptor = (struct container_descriptor *)(image + addr);
  1037. container_id = descriptor->container_id[0] |
  1038. descriptor->container_id[1] << 8;
  1039. content = image + le_to_uint(descriptor->content_address);
  1040. length = le_to_uint(descriptor->content_length);
  1041. switch (container_id) {
  1042. case BL_IMAGE_CONTAINER:
  1043. fwu->img.bl_image.data = content;
  1044. fwu->img.bl_image.size = length;
  1045. break;
  1046. case BL_CONFIG_CONTAINER:
  1047. case GLOBAL_PARAMETERS_CONTAINER:
  1048. fwu->img.bl_config.data = content;
  1049. fwu->img.bl_config.size = length;
  1050. break;
  1051. case BL_LOCKDOWN_INFO_CONTAINER:
  1052. case DEVICE_CONFIG_CONTAINER:
  1053. fwu->img.lockdown.data = content;
  1054. fwu->img.lockdown.size = length;
  1055. break;
  1056. default:
  1057. break;
  1058. };
  1059. }
  1060. }
  1061. static void fwu_parse_image_header_10(void)
  1062. {
  1063. unsigned char ii;
  1064. unsigned char num_of_containers;
  1065. unsigned int addr;
  1066. unsigned int offset;
  1067. unsigned int container_id;
  1068. unsigned int length;
  1069. const unsigned char *image;
  1070. const unsigned char *content;
  1071. struct container_descriptor *descriptor;
  1072. struct image_header_10 *header;
  1073. image = fwu->image;
  1074. header = (struct image_header_10 *)image;
  1075. fwu->img.checksum = le_to_uint(header->checksum);
  1076. /* address of top level container */
  1077. offset = le_to_uint(header->top_level_container_start_addr);
  1078. descriptor = (struct container_descriptor *)(image + offset);
  1079. /* address of top level container content */
  1080. offset = le_to_uint(descriptor->content_address);
  1081. num_of_containers = le_to_uint(descriptor->content_length) / 4;
  1082. for (ii = 0; ii < num_of_containers; ii++) {
  1083. addr = le_to_uint(image + offset);
  1084. offset += 4;
  1085. descriptor = (struct container_descriptor *)(image + addr);
  1086. container_id = descriptor->container_id[0] |
  1087. descriptor->container_id[1] << 8;
  1088. content = image + le_to_uint(descriptor->content_address);
  1089. length = le_to_uint(descriptor->content_length);
  1090. switch (container_id) {
  1091. case UI_CONTAINER:
  1092. case CORE_CODE_CONTAINER:
  1093. fwu->img.ui_firmware.data = content;
  1094. fwu->img.ui_firmware.size = length;
  1095. break;
  1096. case UI_CONFIG_CONTAINER:
  1097. case CORE_CONFIG_CONTAINER:
  1098. fwu->img.ui_config.data = content;
  1099. fwu->img.ui_config.size = length;
  1100. break;
  1101. case BL_CONTAINER:
  1102. fwu->img.bl_version = *content;
  1103. fwu->img.bootloader.data = content;
  1104. fwu->img.bootloader.size = length;
  1105. fwu_parse_image_header_10_bootloader(image);
  1106. break;
  1107. case UTILITY_CONTAINER:
  1108. fwu->img.utility.data = content;
  1109. fwu->img.utility.size = length;
  1110. fwu_parse_image_header_10_utility(image);
  1111. break;
  1112. case GUEST_CODE_CONTAINER:
  1113. fwu->img.contains_guest_code = true;
  1114. fwu->img.guest_code.data = content;
  1115. fwu->img.guest_code.size = length;
  1116. break;
  1117. case DISPLAY_CONFIG_CONTAINER:
  1118. fwu->img.contains_disp_config = true;
  1119. fwu->img.dp_config.data = content;
  1120. fwu->img.dp_config.size = length;
  1121. break;
  1122. case PERMANENT_CONFIG_CONTAINER:
  1123. case GUEST_SERIALIZATION_CONTAINER:
  1124. fwu->img.contains_perm_config = true;
  1125. fwu->img.pm_config.data = content;
  1126. fwu->img.pm_config.size = length;
  1127. break;
  1128. case FLASH_CONFIG_CONTAINER:
  1129. fwu->img.contains_flash_config = true;
  1130. fwu->img.fl_config.data = content;
  1131. fwu->img.fl_config.size = length;
  1132. break;
  1133. case GENERAL_INFORMATION_CONTAINER:
  1134. fwu->img.contains_firmware_id = true;
  1135. fwu->img.firmware_id = le_to_uint(content + 4);
  1136. break;
  1137. default:
  1138. break;
  1139. }
  1140. }
  1141. }
  1142. static void fwu_parse_image_header_05_06(void)
  1143. {
  1144. int retval;
  1145. const unsigned char *image;
  1146. struct image_header_05_06 *header;
  1147. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1148. image = fwu->image;
  1149. header = (struct image_header_05_06 *)image;
  1150. fwu->img.checksum = le_to_uint(header->checksum);
  1151. fwu->img.bl_version = header->header_version;
  1152. fwu->img.contains_bootloader = header->options_bootloader;
  1153. if (fwu->img.contains_bootloader)
  1154. fwu->img.bootloader_size = le_to_uint(header->bootloader_size);
  1155. fwu->img.ui_firmware.size = le_to_uint(header->firmware_size);
  1156. if (fwu->img.ui_firmware.size) {
  1157. fwu->img.ui_firmware.data = image + IMAGE_AREA_OFFSET;
  1158. if (fwu->img.contains_bootloader)
  1159. fwu->img.ui_firmware.data += fwu->img.bootloader_size;
  1160. }
  1161. if ((fwu->img.bl_version == BL_V6) && header->options_tddi)
  1162. fwu->img.ui_firmware.data = image + IMAGE_AREA_OFFSET;
  1163. fwu->img.ui_config.size = le_to_uint(header->config_size);
  1164. if (fwu->img.ui_config.size) {
  1165. fwu->img.ui_config.data = fwu->img.ui_firmware.data +
  1166. fwu->img.ui_firmware.size;
  1167. }
  1168. if (fwu->img.contains_bootloader || header->options_tddi)
  1169. fwu->img.contains_disp_config = true;
  1170. else
  1171. fwu->img.contains_disp_config = false;
  1172. if (fwu->img.contains_disp_config) {
  1173. fwu->img.disp_config_offset = le_to_uint(header->dsp_cfg_addr);
  1174. fwu->img.dp_config.size = le_to_uint(header->dsp_cfg_size);
  1175. fwu->img.dp_config.data = image + fwu->img.disp_config_offset;
  1176. } else {
  1177. retval = secure_memcpy(fwu->img.cstmr_product_id,
  1178. sizeof(fwu->img.cstmr_product_id),
  1179. header->cstmr_product_id,
  1180. sizeof(header->cstmr_product_id),
  1181. PRODUCT_ID_SIZE);
  1182. if (retval < 0) {
  1183. dev_err(rmi4_data->pdev->dev.parent,
  1184. "%s: Failed to copy custom product ID string\n",
  1185. __func__);
  1186. }
  1187. fwu->img.cstmr_product_id[PRODUCT_ID_SIZE] = 0;
  1188. }
  1189. fwu->img.contains_firmware_id = header->options_firmware_id;
  1190. if (fwu->img.contains_firmware_id)
  1191. fwu->img.firmware_id = le_to_uint(header->firmware_id);
  1192. retval = secure_memcpy(fwu->img.product_id,
  1193. sizeof(fwu->img.product_id),
  1194. header->product_id,
  1195. sizeof(header->product_id),
  1196. PRODUCT_ID_SIZE);
  1197. if (retval < 0) {
  1198. dev_err(rmi4_data->pdev->dev.parent,
  1199. "%s: Failed to copy product ID string\n",
  1200. __func__);
  1201. }
  1202. fwu->img.product_id[PRODUCT_ID_SIZE] = 0;
  1203. fwu->img.lockdown.size = LOCKDOWN_SIZE;
  1204. fwu->img.lockdown.data = image + IMAGE_AREA_OFFSET - LOCKDOWN_SIZE;
  1205. }
  1206. static int fwu_parse_image_info(void)
  1207. {
  1208. struct image_header_10 *header;
  1209. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1210. header = (struct image_header_10 *)fwu->image;
  1211. memset(&fwu->img, 0x00, sizeof(fwu->img));
  1212. switch (header->major_header_version) {
  1213. case IMAGE_HEADER_VERSION_10:
  1214. fwu_parse_image_header_10();
  1215. break;
  1216. case IMAGE_HEADER_VERSION_05:
  1217. case IMAGE_HEADER_VERSION_06:
  1218. fwu_parse_image_header_05_06();
  1219. break;
  1220. default:
  1221. dev_err(rmi4_data->pdev->dev.parent,
  1222. "%s: Unsupported image file format (0x%02x)\n",
  1223. __func__, header->major_header_version);
  1224. return -EINVAL;
  1225. }
  1226. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8) {
  1227. if (!fwu->img.contains_flash_config) {
  1228. dev_err(rmi4_data->pdev->dev.parent,
  1229. "%s: No flash config found in firmware image\n",
  1230. __func__);
  1231. return -EINVAL;
  1232. }
  1233. fwu_parse_partition_table(fwu->img.fl_config.data,
  1234. &fwu->img.blkcount, &fwu->img.phyaddr);
  1235. if (fwu->img.blkcount.utility_param)
  1236. fwu->img.contains_utility_param = true;
  1237. fwu_compare_partition_tables();
  1238. } else {
  1239. fwu->new_partition_table = false;
  1240. fwu->incompatible_partition_tables = false;
  1241. }
  1242. return 0;
  1243. }
  1244. static int fwu_read_flash_status(void)
  1245. {
  1246. int retval;
  1247. unsigned char status;
  1248. unsigned char command;
  1249. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1250. retval = synaptics_rmi4_reg_read(rmi4_data,
  1251. fwu->f34_fd.data_base_addr + fwu->off.flash_status,
  1252. &status,
  1253. sizeof(status));
  1254. if (retval < 0) {
  1255. dev_err(rmi4_data->pdev->dev.parent,
  1256. "%s: Failed to read flash status\n",
  1257. __func__);
  1258. return retval;
  1259. }
  1260. fwu->in_bl_mode = status >> 7;
  1261. if (fwu->bl_version == BL_V5)
  1262. fwu->flash_status = (status >> 4) & MASK_3BIT;
  1263. else if (fwu->bl_version == BL_V6)
  1264. fwu->flash_status = status & MASK_3BIT;
  1265. else if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  1266. fwu->flash_status = status & MASK_5BIT;
  1267. if (fwu->write_bootloader)
  1268. fwu->flash_status = 0x00;
  1269. if (fwu->flash_status != 0x00) {
  1270. dev_err(rmi4_data->pdev->dev.parent,
  1271. "%s: Flash status = %d, command = 0x%02x\n",
  1272. __func__, fwu->flash_status, fwu->command);
  1273. }
  1274. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8) {
  1275. if (fwu->flash_status == 0x08)
  1276. fwu->flash_status = 0x00;
  1277. }
  1278. retval = synaptics_rmi4_reg_read(rmi4_data,
  1279. fwu->f34_fd.data_base_addr + fwu->off.flash_cmd,
  1280. &command,
  1281. sizeof(command));
  1282. if (retval < 0) {
  1283. dev_err(rmi4_data->pdev->dev.parent,
  1284. "%s: Failed to read flash command\n",
  1285. __func__);
  1286. return retval;
  1287. }
  1288. if (fwu->bl_version == BL_V5)
  1289. fwu->command = command & MASK_4BIT;
  1290. else if (fwu->bl_version == BL_V6)
  1291. fwu->command = command & MASK_6BIT;
  1292. else if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  1293. fwu->command = command;
  1294. if (fwu->write_bootloader)
  1295. fwu->command = 0x00;
  1296. return 0;
  1297. }
  1298. static int fwu_wait_for_idle(int timeout_ms, bool poll)
  1299. {
  1300. int count = 0;
  1301. int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1;
  1302. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1303. do {
  1304. usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US);
  1305. count++;
  1306. if (poll || (count == timeout_count))
  1307. fwu_read_flash_status();
  1308. if ((fwu->command == CMD_IDLE) && (fwu->flash_status == 0x00))
  1309. return 0;
  1310. } while (count < timeout_count);
  1311. dev_err(rmi4_data->pdev->dev.parent,
  1312. "%s: Timed out waiting for idle status\n",
  1313. __func__);
  1314. return -ETIMEDOUT;
  1315. }
  1316. static int fwu_write_f34_v7_command_single_transaction(unsigned char cmd)
  1317. {
  1318. int retval;
  1319. unsigned char data_base;
  1320. struct f34_v7_data_1_5 data_1_5;
  1321. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1322. data_base = fwu->f34_fd.data_base_addr;
  1323. memset(data_1_5.data, 0x00, sizeof(data_1_5.data));
  1324. switch (cmd) {
  1325. case CMD_ERASE_ALL:
  1326. data_1_5.partition_id = CORE_CODE_PARTITION;
  1327. data_1_5.command = CMD_V7_ERASE_AP;
  1328. break;
  1329. case CMD_ERASE_UI_FIRMWARE:
  1330. data_1_5.partition_id = CORE_CODE_PARTITION;
  1331. data_1_5.command = CMD_V7_ERASE;
  1332. break;
  1333. case CMD_ERASE_BL_CONFIG:
  1334. data_1_5.partition_id = GLOBAL_PARAMETERS_PARTITION;
  1335. data_1_5.command = CMD_V7_ERASE;
  1336. break;
  1337. case CMD_ERASE_UI_CONFIG:
  1338. data_1_5.partition_id = CORE_CONFIG_PARTITION;
  1339. data_1_5.command = CMD_V7_ERASE;
  1340. break;
  1341. case CMD_ERASE_DISP_CONFIG:
  1342. data_1_5.partition_id = DISPLAY_CONFIG_PARTITION;
  1343. data_1_5.command = CMD_V7_ERASE;
  1344. break;
  1345. case CMD_ERASE_FLASH_CONFIG:
  1346. data_1_5.partition_id = FLASH_CONFIG_PARTITION;
  1347. data_1_5.command = CMD_V7_ERASE;
  1348. break;
  1349. case CMD_ERASE_GUEST_CODE:
  1350. data_1_5.partition_id = GUEST_CODE_PARTITION;
  1351. data_1_5.command = CMD_V7_ERASE;
  1352. break;
  1353. case CMD_ERASE_BOOTLOADER:
  1354. data_1_5.partition_id = BOOTLOADER_PARTITION;
  1355. data_1_5.command = CMD_V7_ERASE;
  1356. break;
  1357. case CMD_ERASE_UTILITY_PARAMETER:
  1358. data_1_5.partition_id = UTILITY_PARAMETER_PARTITION;
  1359. data_1_5.command = CMD_V7_ERASE;
  1360. break;
  1361. case CMD_ENABLE_FLASH_PROG:
  1362. data_1_5.partition_id = BOOTLOADER_PARTITION;
  1363. data_1_5.command = CMD_V7_ENTER_BL;
  1364. break;
  1365. };
  1366. data_1_5.payload_0 = fwu->bootloader_id[0];
  1367. data_1_5.payload_1 = fwu->bootloader_id[1];
  1368. retval = synaptics_rmi4_reg_write(rmi4_data,
  1369. data_base + fwu->off.partition_id,
  1370. data_1_5.data,
  1371. sizeof(data_1_5.data));
  1372. if (retval < 0) {
  1373. dev_err(rmi4_data->pdev->dev.parent,
  1374. "%s: Failed to write single transaction command\n",
  1375. __func__);
  1376. return retval;
  1377. }
  1378. return 0;
  1379. }
  1380. static int fwu_write_f34_v7_command(unsigned char cmd)
  1381. {
  1382. int retval;
  1383. unsigned char data_base;
  1384. unsigned char command;
  1385. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1386. data_base = fwu->f34_fd.data_base_addr;
  1387. switch (cmd) {
  1388. case CMD_WRITE_FW:
  1389. case CMD_WRITE_CONFIG:
  1390. case CMD_WRITE_LOCKDOWN:
  1391. case CMD_WRITE_GUEST_CODE:
  1392. case CMD_WRITE_BOOTLOADER:
  1393. case CMD_WRITE_UTILITY_PARAM:
  1394. command = CMD_V7_WRITE;
  1395. break;
  1396. case CMD_READ_CONFIG:
  1397. command = CMD_V7_READ;
  1398. break;
  1399. case CMD_ERASE_ALL:
  1400. command = CMD_V7_ERASE_AP;
  1401. break;
  1402. case CMD_ERASE_UI_FIRMWARE:
  1403. case CMD_ERASE_BL_CONFIG:
  1404. case CMD_ERASE_UI_CONFIG:
  1405. case CMD_ERASE_DISP_CONFIG:
  1406. case CMD_ERASE_FLASH_CONFIG:
  1407. case CMD_ERASE_GUEST_CODE:
  1408. case CMD_ERASE_BOOTLOADER:
  1409. case CMD_ERASE_UTILITY_PARAMETER:
  1410. command = CMD_V7_ERASE;
  1411. break;
  1412. case CMD_ENABLE_FLASH_PROG:
  1413. command = CMD_V7_ENTER_BL;
  1414. break;
  1415. default:
  1416. dev_err(rmi4_data->pdev->dev.parent,
  1417. "%s: Invalid command 0x%02x\n",
  1418. __func__, cmd);
  1419. return -EINVAL;
  1420. };
  1421. fwu->command = command;
  1422. switch (cmd) {
  1423. case CMD_ERASE_ALL:
  1424. case CMD_ERASE_UI_FIRMWARE:
  1425. case CMD_ERASE_BL_CONFIG:
  1426. case CMD_ERASE_UI_CONFIG:
  1427. case CMD_ERASE_DISP_CONFIG:
  1428. case CMD_ERASE_FLASH_CONFIG:
  1429. case CMD_ERASE_GUEST_CODE:
  1430. case CMD_ERASE_BOOTLOADER:
  1431. case CMD_ERASE_UTILITY_PARAMETER:
  1432. case CMD_ENABLE_FLASH_PROG:
  1433. retval = fwu_write_f34_v7_command_single_transaction(cmd);
  1434. if (retval < 0)
  1435. return retval;
  1436. else
  1437. return 0;
  1438. default:
  1439. break;
  1440. };
  1441. retval = synaptics_rmi4_reg_write(rmi4_data,
  1442. data_base + fwu->off.flash_cmd,
  1443. &command,
  1444. sizeof(command));
  1445. if (retval < 0) {
  1446. dev_err(rmi4_data->pdev->dev.parent,
  1447. "%s: Failed to write flash command\n",
  1448. __func__);
  1449. return retval;
  1450. }
  1451. return 0;
  1452. }
  1453. static int fwu_write_f34_v5v6_command(unsigned char cmd)
  1454. {
  1455. int retval;
  1456. unsigned char data_base;
  1457. unsigned char command;
  1458. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1459. data_base = fwu->f34_fd.data_base_addr;
  1460. switch (cmd) {
  1461. case CMD_IDLE:
  1462. command = CMD_V5V6_IDLE;
  1463. break;
  1464. case CMD_WRITE_FW:
  1465. command = CMD_V5V6_WRITE_FW;
  1466. break;
  1467. case CMD_WRITE_CONFIG:
  1468. command = CMD_V5V6_WRITE_CONFIG;
  1469. break;
  1470. case CMD_WRITE_LOCKDOWN:
  1471. command = CMD_V5V6_WRITE_LOCKDOWN;
  1472. break;
  1473. case CMD_WRITE_GUEST_CODE:
  1474. command = CMD_V5V6_WRITE_GUEST_CODE;
  1475. break;
  1476. case CMD_READ_CONFIG:
  1477. command = CMD_V5V6_READ_CONFIG;
  1478. break;
  1479. case CMD_ERASE_ALL:
  1480. command = CMD_V5V6_ERASE_ALL;
  1481. break;
  1482. case CMD_ERASE_UI_CONFIG:
  1483. command = CMD_V5V6_ERASE_UI_CONFIG;
  1484. break;
  1485. case CMD_ERASE_DISP_CONFIG:
  1486. command = CMD_V5V6_ERASE_DISP_CONFIG;
  1487. break;
  1488. case CMD_ERASE_GUEST_CODE:
  1489. command = CMD_V5V6_ERASE_GUEST_CODE;
  1490. break;
  1491. case CMD_ENABLE_FLASH_PROG:
  1492. command = CMD_V5V6_ENABLE_FLASH_PROG;
  1493. break;
  1494. #ifdef SYNA_TDDI
  1495. case CMD_ERASE_CHIP:
  1496. command = CMD_V5V6_ERASE_CHIP;
  1497. break;
  1498. case CMD_ERASE_FORCE_CONFIG:
  1499. command = CMD_V5V6_ERASE_FORCE_CONFIG;
  1500. break;
  1501. case CMD_READ_FORCE_CONFIG:
  1502. command = CMD_V5V6_READ_FORCE_CONFIG;
  1503. break;
  1504. case CMD_WRITE_FORCE_CONFIG:
  1505. command = CMD_V5V6_WRITE_CONFIG;
  1506. break;
  1507. case CMD_ERASE_LOCKDOWN_DATA:
  1508. command = CMD_V5V6_ERASE_LOCKDOWN_DATA;
  1509. break;
  1510. case CMD_READ_LOCKDOWN_DATA:
  1511. command = CMD_V5V6_READ_LOCKDOWN_DATA;
  1512. break;
  1513. case CMD_WRITE_LOCKDOWN_DATA:
  1514. command = CMD_V5V6_WRITE_LOCKDOWN_DATA;
  1515. break;
  1516. case CMD_ERASE_LCM_DATA:
  1517. command = CMD_V5V6_ERASE_LCM_DATA;
  1518. break;
  1519. case CMD_ERASE_OEM_DATA:
  1520. command = CMD_V5V6_ERASE_OEM_DATA;
  1521. break;
  1522. #endif
  1523. default:
  1524. dev_err(rmi4_data->pdev->dev.parent,
  1525. "%s: Invalid command 0x%02x\n",
  1526. __func__, cmd);
  1527. return -EINVAL;
  1528. }
  1529. switch (cmd) {
  1530. case CMD_ERASE_ALL:
  1531. case CMD_ERASE_UI_CONFIG:
  1532. case CMD_ERASE_DISP_CONFIG:
  1533. case CMD_ERASE_GUEST_CODE:
  1534. #ifdef SYNA_TDDI
  1535. case CMD_ERASE_CHIP:
  1536. case CMD_ERASE_FORCE_CONFIG:
  1537. case CMD_ERASE_LOCKDOWN_DATA:
  1538. case CMD_ERASE_LCM_DATA:
  1539. case CMD_ERASE_OEM_DATA:
  1540. #endif
  1541. case CMD_ENABLE_FLASH_PROG:
  1542. retval = synaptics_rmi4_reg_write(rmi4_data,
  1543. data_base + fwu->off.payload,
  1544. fwu->bootloader_id,
  1545. sizeof(fwu->bootloader_id));
  1546. if (retval < 0) {
  1547. dev_err(rmi4_data->pdev->dev.parent,
  1548. "%s: Failed to write bootloader ID\n",
  1549. __func__);
  1550. return retval;
  1551. }
  1552. break;
  1553. default:
  1554. break;
  1555. };
  1556. fwu->command = command;
  1557. retval = synaptics_rmi4_reg_write(rmi4_data,
  1558. data_base + fwu->off.flash_cmd,
  1559. &command,
  1560. sizeof(command));
  1561. if (retval < 0) {
  1562. dev_err(rmi4_data->pdev->dev.parent,
  1563. "%s: Failed to write command 0x%02x\n",
  1564. __func__, command);
  1565. return retval;
  1566. }
  1567. return 0;
  1568. }
  1569. static int fwu_write_f34_command(unsigned char cmd)
  1570. {
  1571. int retval;
  1572. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  1573. retval = fwu_write_f34_v7_command(cmd);
  1574. else
  1575. retval = fwu_write_f34_v5v6_command(cmd);
  1576. return retval;
  1577. }
  1578. static int fwu_write_f34_v7_partition_id(unsigned char cmd)
  1579. {
  1580. int retval;
  1581. unsigned char data_base;
  1582. unsigned char partition;
  1583. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1584. data_base = fwu->f34_fd.data_base_addr;
  1585. switch (cmd) {
  1586. case CMD_WRITE_FW:
  1587. partition = CORE_CODE_PARTITION;
  1588. break;
  1589. case CMD_WRITE_CONFIG:
  1590. case CMD_READ_CONFIG:
  1591. if (fwu->config_area == UI_CONFIG_AREA)
  1592. partition = CORE_CONFIG_PARTITION;
  1593. else if (fwu->config_area == DP_CONFIG_AREA)
  1594. partition = DISPLAY_CONFIG_PARTITION;
  1595. else if (fwu->config_area == PM_CONFIG_AREA)
  1596. partition = GUEST_SERIALIZATION_PARTITION;
  1597. else if (fwu->config_area == BL_CONFIG_AREA)
  1598. partition = GLOBAL_PARAMETERS_PARTITION;
  1599. else if (fwu->config_area == FLASH_CONFIG_AREA)
  1600. partition = FLASH_CONFIG_PARTITION;
  1601. else if (fwu->config_area == UPP_AREA)
  1602. partition = UTILITY_PARAMETER_PARTITION;
  1603. break;
  1604. case CMD_WRITE_LOCKDOWN:
  1605. partition = DEVICE_CONFIG_PARTITION;
  1606. break;
  1607. case CMD_WRITE_GUEST_CODE:
  1608. partition = GUEST_CODE_PARTITION;
  1609. break;
  1610. case CMD_WRITE_BOOTLOADER:
  1611. partition = BOOTLOADER_PARTITION;
  1612. break;
  1613. case CMD_WRITE_UTILITY_PARAM:
  1614. partition = UTILITY_PARAMETER_PARTITION;
  1615. break;
  1616. case CMD_ERASE_ALL:
  1617. partition = CORE_CODE_PARTITION;
  1618. break;
  1619. case CMD_ERASE_BL_CONFIG:
  1620. partition = GLOBAL_PARAMETERS_PARTITION;
  1621. break;
  1622. case CMD_ERASE_UI_CONFIG:
  1623. partition = CORE_CONFIG_PARTITION;
  1624. break;
  1625. case CMD_ERASE_DISP_CONFIG:
  1626. partition = DISPLAY_CONFIG_PARTITION;
  1627. break;
  1628. case CMD_ERASE_FLASH_CONFIG:
  1629. partition = FLASH_CONFIG_PARTITION;
  1630. break;
  1631. case CMD_ERASE_GUEST_CODE:
  1632. partition = GUEST_CODE_PARTITION;
  1633. break;
  1634. case CMD_ERASE_BOOTLOADER:
  1635. partition = BOOTLOADER_PARTITION;
  1636. break;
  1637. case CMD_ENABLE_FLASH_PROG:
  1638. partition = BOOTLOADER_PARTITION;
  1639. break;
  1640. default:
  1641. dev_err(rmi4_data->pdev->dev.parent,
  1642. "%s: Invalid command 0x%02x\n",
  1643. __func__, cmd);
  1644. return -EINVAL;
  1645. };
  1646. retval = synaptics_rmi4_reg_write(rmi4_data,
  1647. data_base + fwu->off.partition_id,
  1648. &partition,
  1649. sizeof(partition));
  1650. if (retval < 0) {
  1651. dev_err(rmi4_data->pdev->dev.parent,
  1652. "%s: Failed to write partition ID\n",
  1653. __func__);
  1654. return retval;
  1655. }
  1656. return 0;
  1657. }
  1658. static int fwu_write_f34_partition_id(unsigned char cmd)
  1659. {
  1660. int retval;
  1661. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  1662. retval = fwu_write_f34_v7_partition_id(cmd);
  1663. else
  1664. retval = 0;
  1665. return retval;
  1666. }
  1667. static int fwu_read_f34_v7_partition_table(unsigned char *partition_table)
  1668. {
  1669. int retval;
  1670. unsigned char data_base;
  1671. unsigned char length[2];
  1672. unsigned short block_number = 0;
  1673. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1674. data_base = fwu->f34_fd.data_base_addr;
  1675. fwu->config_area = FLASH_CONFIG_AREA;
  1676. retval = fwu_write_f34_partition_id(CMD_READ_CONFIG);
  1677. if (retval < 0)
  1678. return retval;
  1679. retval = synaptics_rmi4_reg_write(rmi4_data,
  1680. data_base + fwu->off.block_number,
  1681. (unsigned char *)&block_number,
  1682. sizeof(block_number));
  1683. if (retval < 0) {
  1684. dev_err(rmi4_data->pdev->dev.parent,
  1685. "%s: Failed to write block number\n",
  1686. __func__);
  1687. return retval;
  1688. }
  1689. length[0] = (unsigned char)(fwu->flash_config_length & MASK_8BIT);
  1690. length[1] = (unsigned char)(fwu->flash_config_length >> 8);
  1691. retval = synaptics_rmi4_reg_write(rmi4_data,
  1692. data_base + fwu->off.transfer_length,
  1693. length,
  1694. sizeof(length));
  1695. if (retval < 0) {
  1696. dev_err(rmi4_data->pdev->dev.parent,
  1697. "%s: Failed to write transfer length\n",
  1698. __func__);
  1699. return retval;
  1700. }
  1701. retval = fwu_write_f34_command(CMD_READ_CONFIG);
  1702. if (retval < 0) {
  1703. dev_err(rmi4_data->pdev->dev.parent,
  1704. "%s: Failed to write command\n",
  1705. __func__);
  1706. return retval;
  1707. }
  1708. msleep(READ_CONFIG_WAIT_MS);
  1709. retval = fwu_wait_for_idle(WRITE_WAIT_MS, true);
  1710. if (retval < 0) {
  1711. dev_err(rmi4_data->pdev->dev.parent,
  1712. "%s: Failed to wait for idle status\n",
  1713. __func__);
  1714. return retval;
  1715. }
  1716. retval = synaptics_rmi4_reg_read(rmi4_data,
  1717. data_base + fwu->off.payload,
  1718. partition_table,
  1719. fwu->partition_table_bytes);
  1720. if (retval < 0) {
  1721. dev_err(rmi4_data->pdev->dev.parent,
  1722. "%s: Failed to read block data\n",
  1723. __func__);
  1724. return retval;
  1725. }
  1726. return 0;
  1727. }
  1728. static int fwu_read_f34_v7_queries(void)
  1729. {
  1730. int retval;
  1731. unsigned char ii;
  1732. unsigned char query_base;
  1733. unsigned char index;
  1734. unsigned char offset;
  1735. unsigned char *ptable;
  1736. struct f34_v7_query_0 query_0;
  1737. struct f34_v7_query_1_7 query_1_7;
  1738. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1739. query_base = fwu->f34_fd.query_base_addr;
  1740. retval = synaptics_rmi4_reg_read(rmi4_data,
  1741. query_base,
  1742. query_0.data,
  1743. sizeof(query_0.data));
  1744. if (retval < 0) {
  1745. dev_err(rmi4_data->pdev->dev.parent,
  1746. "%s: Failed to read query 0\n",
  1747. __func__);
  1748. return retval;
  1749. }
  1750. offset = query_0.subpacket_1_size + 1;
  1751. retval = synaptics_rmi4_reg_read(rmi4_data,
  1752. query_base + offset,
  1753. query_1_7.data,
  1754. sizeof(query_1_7.data));
  1755. if (retval < 0) {
  1756. dev_err(rmi4_data->pdev->dev.parent,
  1757. "%s: Failed to read queries 1 to 7\n",
  1758. __func__);
  1759. return retval;
  1760. }
  1761. fwu->bootloader_id[0] = query_1_7.bl_minor_revision;
  1762. fwu->bootloader_id[1] = query_1_7.bl_major_revision;
  1763. if (fwu->bootloader_id[1] == BL_V8)
  1764. fwu->bl_version = BL_V8;
  1765. fwu->block_size = query_1_7.block_size_15_8 << 8 |
  1766. query_1_7.block_size_7_0;
  1767. fwu->flash_config_length = query_1_7.flash_config_length_15_8 << 8 |
  1768. query_1_7.flash_config_length_7_0;
  1769. fwu->payload_length = query_1_7.payload_length_15_8 << 8 |
  1770. query_1_7.payload_length_7_0;
  1771. fwu->off.flash_status = V7_FLASH_STATUS_OFFSET;
  1772. fwu->off.partition_id = V7_PARTITION_ID_OFFSET;
  1773. fwu->off.block_number = V7_BLOCK_NUMBER_OFFSET;
  1774. fwu->off.transfer_length = V7_TRANSFER_LENGTH_OFFSET;
  1775. fwu->off.flash_cmd = V7_COMMAND_OFFSET;
  1776. fwu->off.payload = V7_PAYLOAD_OFFSET;
  1777. index = sizeof(query_1_7.data) - V7_PARTITION_SUPPORT_BYTES;
  1778. fwu->partitions = 0;
  1779. for (offset = 0; offset < V7_PARTITION_SUPPORT_BYTES; offset++) {
  1780. for (ii = 0; ii < 8; ii++) {
  1781. if (query_1_7.data[index + offset] & (1 << ii))
  1782. fwu->partitions++;
  1783. }
  1784. dev_dbg(rmi4_data->pdev->dev.parent,
  1785. "%s: Supported partitions: 0x%02x\n",
  1786. __func__, query_1_7.data[index + offset]);
  1787. }
  1788. fwu->partition_table_bytes = fwu->partitions * 8 + 2;
  1789. ptable = kzalloc(fwu->partition_table_bytes, GFP_KERNEL);
  1790. if (!ptable) {
  1791. dev_err(rmi4_data->pdev->dev.parent,
  1792. "%s: Failed to alloc mem for partition table\n",
  1793. __func__);
  1794. return -ENOMEM;
  1795. }
  1796. retval = fwu_read_f34_v7_partition_table(ptable);
  1797. if (retval < 0) {
  1798. dev_err(rmi4_data->pdev->dev.parent,
  1799. "%s: Failed to read partition table\n",
  1800. __func__);
  1801. kfree(ptable);
  1802. return retval;
  1803. }
  1804. fwu_parse_partition_table(ptable, &fwu->blkcount, &fwu->phyaddr);
  1805. if (fwu->blkcount.dp_config)
  1806. fwu->flash_properties.has_disp_config = 1;
  1807. else
  1808. fwu->flash_properties.has_disp_config = 0;
  1809. if (fwu->blkcount.pm_config)
  1810. fwu->flash_properties.has_pm_config = 1;
  1811. else
  1812. fwu->flash_properties.has_pm_config = 0;
  1813. if (fwu->blkcount.bl_config)
  1814. fwu->flash_properties.has_bl_config = 1;
  1815. else
  1816. fwu->flash_properties.has_bl_config = 0;
  1817. if (fwu->blkcount.guest_code)
  1818. fwu->has_guest_code = 1;
  1819. else
  1820. fwu->has_guest_code = 0;
  1821. if (fwu->blkcount.utility_param)
  1822. fwu->has_utility_param = 1;
  1823. else
  1824. fwu->has_utility_param = 0;
  1825. kfree(ptable);
  1826. return 0;
  1827. }
  1828. static int fwu_read_f34_v5v6_queries(void)
  1829. {
  1830. int retval;
  1831. unsigned char count;
  1832. unsigned char base;
  1833. unsigned char offset;
  1834. unsigned char buf[10];
  1835. struct f34_v5v6_flash_properties_2 properties_2;
  1836. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1837. base = fwu->f34_fd.query_base_addr;
  1838. retval = synaptics_rmi4_reg_read(rmi4_data,
  1839. base + V5V6_BOOTLOADER_ID_OFFSET,
  1840. fwu->bootloader_id,
  1841. sizeof(fwu->bootloader_id));
  1842. if (retval < 0) {
  1843. dev_err(rmi4_data->pdev->dev.parent,
  1844. "%s: Failed to read bootloader ID\n",
  1845. __func__);
  1846. return retval;
  1847. }
  1848. if (fwu->bl_version == BL_V5) {
  1849. fwu->off.properties = V5_PROPERTIES_OFFSET;
  1850. fwu->off.block_size = V5_BLOCK_SIZE_OFFSET;
  1851. fwu->off.block_count = V5_BLOCK_COUNT_OFFSET;
  1852. fwu->off.block_number = V5_BLOCK_NUMBER_OFFSET;
  1853. fwu->off.payload = V5_BLOCK_DATA_OFFSET;
  1854. } else if (fwu->bl_version == BL_V6) {
  1855. fwu->off.properties = V6_PROPERTIES_OFFSET;
  1856. fwu->off.properties_2 = V6_PROPERTIES_2_OFFSET;
  1857. fwu->off.block_size = V6_BLOCK_SIZE_OFFSET;
  1858. fwu->off.block_count = V6_BLOCK_COUNT_OFFSET;
  1859. fwu->off.gc_block_count = V6_GUEST_CODE_BLOCK_COUNT_OFFSET;
  1860. fwu->off.block_number = V6_BLOCK_NUMBER_OFFSET;
  1861. fwu->off.payload = V6_BLOCK_DATA_OFFSET;
  1862. }
  1863. retval = synaptics_rmi4_reg_read(rmi4_data,
  1864. base + fwu->off.block_size,
  1865. buf,
  1866. 2);
  1867. if (retval < 0) {
  1868. dev_err(rmi4_data->pdev->dev.parent,
  1869. "%s: Failed to read block size info\n",
  1870. __func__);
  1871. return retval;
  1872. }
  1873. batohs(&fwu->block_size, &(buf[0]));
  1874. if (fwu->bl_version == BL_V5) {
  1875. fwu->off.flash_cmd = fwu->off.payload + fwu->block_size;
  1876. fwu->off.flash_status = fwu->off.flash_cmd;
  1877. } else if (fwu->bl_version == BL_V6) {
  1878. fwu->off.flash_cmd = V6_FLASH_COMMAND_OFFSET;
  1879. fwu->off.flash_status = V6_FLASH_STATUS_OFFSET;
  1880. }
  1881. retval = synaptics_rmi4_reg_read(rmi4_data,
  1882. base + fwu->off.properties,
  1883. fwu->flash_properties.data,
  1884. sizeof(fwu->flash_properties.data));
  1885. if (retval < 0) {
  1886. dev_err(rmi4_data->pdev->dev.parent,
  1887. "%s: Failed to read flash properties\n",
  1888. __func__);
  1889. return retval;
  1890. }
  1891. count = 4;
  1892. if (fwu->flash_properties.has_pm_config)
  1893. count += 2;
  1894. if (fwu->flash_properties.has_bl_config)
  1895. count += 2;
  1896. if (fwu->flash_properties.has_disp_config)
  1897. count += 2;
  1898. retval = synaptics_rmi4_reg_read(rmi4_data,
  1899. base + fwu->off.block_count,
  1900. buf,
  1901. count);
  1902. if (retval < 0) {
  1903. dev_err(rmi4_data->pdev->dev.parent,
  1904. "%s: Failed to read block count info\n",
  1905. __func__);
  1906. return retval;
  1907. }
  1908. batohs(&fwu->blkcount.ui_firmware, &(buf[0]));
  1909. batohs(&fwu->blkcount.ui_config, &(buf[2]));
  1910. count = 4;
  1911. if (fwu->flash_properties.has_pm_config) {
  1912. batohs(&fwu->blkcount.pm_config, &(buf[count]));
  1913. count += 2;
  1914. }
  1915. if (fwu->flash_properties.has_bl_config) {
  1916. batohs(&fwu->blkcount.bl_config, &(buf[count]));
  1917. count += 2;
  1918. }
  1919. if (fwu->flash_properties.has_disp_config)
  1920. batohs(&fwu->blkcount.dp_config, &(buf[count]));
  1921. fwu->has_guest_code = false;
  1922. #ifdef SYNA_TDDI
  1923. fwu->has_force_config = false;
  1924. fwu->has_lockdown_data = false;
  1925. fwu->has_lcm_data = false;
  1926. fwu->has_oem_data = false;
  1927. #endif
  1928. if (fwu->flash_properties.has_query4) {
  1929. retval = synaptics_rmi4_reg_read(rmi4_data,
  1930. base + fwu->off.properties_2,
  1931. properties_2.data,
  1932. sizeof(properties_2.data));
  1933. if (retval < 0) {
  1934. dev_err(rmi4_data->pdev->dev.parent,
  1935. "%s: Failed to read flash properties 2\n",
  1936. __func__);
  1937. return retval;
  1938. }
  1939. offset = fwu->off.properties_2 + 1;
  1940. count = 0;
  1941. if (properties_2.has_guest_code) {
  1942. retval = synaptics_rmi4_reg_read(rmi4_data,
  1943. base + offset + count,
  1944. buf,
  1945. 2);
  1946. if (retval < 0) {
  1947. dev_err(rmi4_data->pdev->dev.parent,
  1948. "%s: Failed to read guest code block count\n",
  1949. __func__);
  1950. return retval;
  1951. }
  1952. batohs(&fwu->blkcount.guest_code, &(buf[0]));
  1953. count++;
  1954. fwu->has_guest_code = true;
  1955. }
  1956. #ifdef SYNA_TDDI
  1957. if (properties_2.has_force_config) {
  1958. retval = synaptics_rmi4_reg_read(rmi4_data,
  1959. base + offset + count,
  1960. buf,
  1961. 2);
  1962. if (retval < 0) {
  1963. dev_err(rmi4_data->pdev->dev.parent,
  1964. "%s: Failed to read tddi force block count\n",
  1965. __func__);
  1966. return retval;
  1967. }
  1968. batohs(&fwu->blkcount.tddi_force_config, &(buf[0]));
  1969. count++;
  1970. fwu->has_force_config = true;
  1971. }
  1972. if (properties_2.has_lockdown_data) {
  1973. retval = synaptics_rmi4_reg_read(rmi4_data,
  1974. base + offset + count,
  1975. buf,
  1976. 2);
  1977. if (retval < 0) {
  1978. dev_err(rmi4_data->pdev->dev.parent,
  1979. "%s: Failed to read tddi lockdown block count\n",
  1980. __func__);
  1981. return retval;
  1982. }
  1983. batohs(&fwu->blkcount.tddi_lockdown_data, &(buf[0]));
  1984. count++;
  1985. fwu->has_lockdown_data = true;
  1986. }
  1987. if (properties_2.has_lcm_data) {
  1988. retval = synaptics_rmi4_reg_read(rmi4_data,
  1989. base + offset + count,
  1990. buf,
  1991. 2);
  1992. if (retval < 0) {
  1993. dev_err(rmi4_data->pdev->dev.parent,
  1994. "%s: Failed to read tddi lcm block count\n",
  1995. __func__);
  1996. return retval;
  1997. }
  1998. batohs(&fwu->blkcount.tddi_lcm_data, &(buf[0]));
  1999. count++;
  2000. fwu->has_lcm_data = true;
  2001. }
  2002. if (properties_2.has_oem_data) {
  2003. retval = synaptics_rmi4_reg_read(rmi4_data,
  2004. base + offset + count,
  2005. buf,
  2006. 2);
  2007. if (retval < 0) {
  2008. dev_err(rmi4_data->pdev->dev.parent,
  2009. "%s: Failed to read tddi oem block count\n",
  2010. __func__);
  2011. return retval;
  2012. }
  2013. batohs(&fwu->blkcount.tddi_oem_data, &(buf[0]));
  2014. fwu->has_oem_data = true;
  2015. }
  2016. #endif
  2017. }
  2018. fwu->has_utility_param = false;
  2019. return 0;
  2020. }
  2021. static int fwu_read_f34_queries(void)
  2022. {
  2023. int retval;
  2024. memset(&fwu->blkcount, 0x00, sizeof(fwu->blkcount));
  2025. memset(&fwu->phyaddr, 0x00, sizeof(fwu->phyaddr));
  2026. if (fwu->bl_version == BL_V7)
  2027. retval = fwu_read_f34_v7_queries();
  2028. else
  2029. retval = fwu_read_f34_v5v6_queries();
  2030. return retval;
  2031. }
  2032. static int fwu_write_f34_v7_blocks(unsigned char *block_ptr,
  2033. unsigned short block_cnt, unsigned char command)
  2034. {
  2035. int retval;
  2036. unsigned char data_base;
  2037. unsigned char length[2];
  2038. unsigned short transfer;
  2039. unsigned short remaining = block_cnt;
  2040. unsigned short block_number = 0;
  2041. unsigned short left_bytes;
  2042. unsigned short write_size;
  2043. unsigned short max_write_size;
  2044. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2045. data_base = fwu->f34_fd.data_base_addr;
  2046. retval = fwu_write_f34_partition_id(command);
  2047. if (retval < 0)
  2048. return retval;
  2049. retval = synaptics_rmi4_reg_write(rmi4_data,
  2050. data_base + fwu->off.block_number,
  2051. (unsigned char *)&block_number,
  2052. sizeof(block_number));
  2053. if (retval < 0) {
  2054. dev_err(rmi4_data->pdev->dev.parent,
  2055. "%s: Failed to write block number\n",
  2056. __func__);
  2057. return retval;
  2058. }
  2059. do {
  2060. if (remaining / fwu->payload_length)
  2061. transfer = fwu->payload_length;
  2062. else
  2063. transfer = remaining;
  2064. length[0] = (unsigned char)(transfer & MASK_8BIT);
  2065. length[1] = (unsigned char)(transfer >> 8);
  2066. retval = synaptics_rmi4_reg_write(rmi4_data,
  2067. data_base + fwu->off.transfer_length,
  2068. length,
  2069. sizeof(length));
  2070. if (retval < 0) {
  2071. dev_err(rmi4_data->pdev->dev.parent,
  2072. "%s: Failed to write transfer length (remaining = %d)\n",
  2073. __func__, remaining);
  2074. return retval;
  2075. }
  2076. retval = fwu_write_f34_command(command);
  2077. if (retval < 0) {
  2078. dev_err(rmi4_data->pdev->dev.parent,
  2079. "%s: Failed to write command (remaining = %d)\n",
  2080. __func__, remaining);
  2081. return retval;
  2082. }
  2083. #ifdef MAX_WRITE_SIZE
  2084. max_write_size = MAX_WRITE_SIZE;
  2085. if (max_write_size >= transfer * fwu->block_size)
  2086. max_write_size = transfer * fwu->block_size;
  2087. else if (max_write_size > fwu->block_size)
  2088. max_write_size -= max_write_size % fwu->block_size;
  2089. else
  2090. max_write_size = fwu->block_size;
  2091. #else
  2092. max_write_size = transfer * fwu->block_size;
  2093. #endif
  2094. left_bytes = transfer * fwu->block_size;
  2095. do {
  2096. if (left_bytes / max_write_size)
  2097. write_size = max_write_size;
  2098. else
  2099. write_size = left_bytes;
  2100. retval = synaptics_rmi4_reg_write(rmi4_data,
  2101. data_base + fwu->off.payload,
  2102. block_ptr,
  2103. write_size);
  2104. if (retval < 0) {
  2105. dev_err(rmi4_data->pdev->dev.parent,
  2106. "%s: Failed to write block data (remaining = %d)\n",
  2107. __func__, remaining);
  2108. return retval;
  2109. }
  2110. block_ptr += write_size;
  2111. left_bytes -= write_size;
  2112. } while (left_bytes);
  2113. retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
  2114. if (retval < 0) {
  2115. dev_err(rmi4_data->pdev->dev.parent,
  2116. "%s: Failed to wait for idle status (remaining = %d)\n",
  2117. __func__, remaining);
  2118. return retval;
  2119. }
  2120. remaining -= transfer;
  2121. } while (remaining);
  2122. return 0;
  2123. }
  2124. static int fwu_write_f34_v5v6_blocks(unsigned char *block_ptr,
  2125. unsigned short block_cnt, unsigned char command)
  2126. {
  2127. int retval;
  2128. unsigned char data_base;
  2129. unsigned char block_number[] = {0, 0};
  2130. unsigned short blk;
  2131. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2132. data_base = fwu->f34_fd.data_base_addr;
  2133. block_number[1] |= (fwu->config_area << 5);
  2134. retval = synaptics_rmi4_reg_write(rmi4_data,
  2135. data_base + fwu->off.block_number,
  2136. block_number,
  2137. sizeof(block_number));
  2138. if (retval < 0) {
  2139. dev_err(rmi4_data->pdev->dev.parent,
  2140. "%s: Failed to write block number\n",
  2141. __func__);
  2142. return retval;
  2143. }
  2144. for (blk = 0; blk < block_cnt; blk++) {
  2145. retval = synaptics_rmi4_reg_write(rmi4_data,
  2146. data_base + fwu->off.payload,
  2147. block_ptr,
  2148. fwu->block_size);
  2149. if (retval < 0) {
  2150. dev_err(rmi4_data->pdev->dev.parent,
  2151. "%s: Failed to write block data (block %d)\n",
  2152. __func__, blk);
  2153. return retval;
  2154. }
  2155. retval = fwu_write_f34_command(command);
  2156. if (retval < 0) {
  2157. dev_err(rmi4_data->pdev->dev.parent,
  2158. "%s: Failed to write command for block %d\n",
  2159. __func__, blk);
  2160. return retval;
  2161. }
  2162. retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
  2163. if (retval < 0) {
  2164. dev_err(rmi4_data->pdev->dev.parent,
  2165. "%s: Failed to wait for idle status (block %d)\n",
  2166. __func__, blk);
  2167. return retval;
  2168. }
  2169. block_ptr += fwu->block_size;
  2170. }
  2171. return 0;
  2172. }
  2173. static int fwu_write_f34_blocks(unsigned char *block_ptr,
  2174. unsigned short block_cnt, unsigned char cmd)
  2175. {
  2176. int retval;
  2177. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  2178. retval = fwu_write_f34_v7_blocks(block_ptr, block_cnt, cmd);
  2179. else
  2180. retval = fwu_write_f34_v5v6_blocks(block_ptr, block_cnt, cmd);
  2181. return retval;
  2182. }
  2183. static int fwu_read_f34_v7_blocks(unsigned short block_cnt,
  2184. unsigned char command)
  2185. {
  2186. int retval;
  2187. unsigned char data_base;
  2188. unsigned char length[2];
  2189. unsigned short transfer;
  2190. unsigned short remaining = block_cnt;
  2191. unsigned short block_number = 0;
  2192. unsigned short index = 0;
  2193. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2194. data_base = fwu->f34_fd.data_base_addr;
  2195. retval = fwu_write_f34_partition_id(command);
  2196. if (retval < 0)
  2197. return retval;
  2198. retval = synaptics_rmi4_reg_write(rmi4_data,
  2199. data_base + fwu->off.block_number,
  2200. (unsigned char *)&block_number,
  2201. sizeof(block_number));
  2202. if (retval < 0) {
  2203. dev_err(rmi4_data->pdev->dev.parent,
  2204. "%s: Failed to write block number\n",
  2205. __func__);
  2206. return retval;
  2207. }
  2208. do {
  2209. if (remaining / fwu->payload_length)
  2210. transfer = fwu->payload_length;
  2211. else
  2212. transfer = remaining;
  2213. length[0] = (unsigned char)(transfer & MASK_8BIT);
  2214. length[1] = (unsigned char)(transfer >> 8);
  2215. retval = synaptics_rmi4_reg_write(rmi4_data,
  2216. data_base + fwu->off.transfer_length,
  2217. length,
  2218. sizeof(length));
  2219. if (retval < 0) {
  2220. dev_err(rmi4_data->pdev->dev.parent,
  2221. "%s: Failed to write transfer length (remaining = %d)\n",
  2222. __func__, remaining);
  2223. return retval;
  2224. }
  2225. retval = fwu_write_f34_command(command);
  2226. if (retval < 0) {
  2227. dev_err(rmi4_data->pdev->dev.parent,
  2228. "%s: Failed to write command (remaining = %d)\n",
  2229. __func__, remaining);
  2230. return retval;
  2231. }
  2232. retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
  2233. if (retval < 0) {
  2234. dev_err(rmi4_data->pdev->dev.parent,
  2235. "%s: Failed to wait for idle status (remaining = %d)\n",
  2236. __func__, remaining);
  2237. return retval;
  2238. }
  2239. retval = synaptics_rmi4_reg_read(rmi4_data,
  2240. data_base + fwu->off.payload,
  2241. &fwu->read_config_buf[index],
  2242. transfer * fwu->block_size);
  2243. if (retval < 0) {
  2244. dev_err(rmi4_data->pdev->dev.parent,
  2245. "%s: Failed to read block data (remaining = %d)\n",
  2246. __func__, remaining);
  2247. return retval;
  2248. }
  2249. index += (transfer * fwu->block_size);
  2250. remaining -= transfer;
  2251. } while (remaining);
  2252. return 0;
  2253. }
  2254. static int fwu_read_f34_v5v6_blocks(unsigned short block_cnt,
  2255. unsigned char command)
  2256. {
  2257. int retval;
  2258. unsigned char data_base;
  2259. unsigned char block_number[] = {0, 0};
  2260. unsigned short blk;
  2261. unsigned short index = 0;
  2262. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2263. data_base = fwu->f34_fd.data_base_addr;
  2264. block_number[1] |= (fwu->config_area << 5);
  2265. retval = synaptics_rmi4_reg_write(rmi4_data,
  2266. data_base + fwu->off.block_number,
  2267. block_number,
  2268. sizeof(block_number));
  2269. if (retval < 0) {
  2270. dev_err(rmi4_data->pdev->dev.parent,
  2271. "%s: Failed to write block number\n",
  2272. __func__);
  2273. return retval;
  2274. }
  2275. for (blk = 0; blk < block_cnt; blk++) {
  2276. retval = fwu_write_f34_command(command);
  2277. if (retval < 0) {
  2278. dev_err(rmi4_data->pdev->dev.parent,
  2279. "%s: Failed to write read config command\n",
  2280. __func__);
  2281. return retval;
  2282. }
  2283. retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
  2284. if (retval < 0) {
  2285. dev_err(rmi4_data->pdev->dev.parent,
  2286. "%s: Failed to wait for idle status\n",
  2287. __func__);
  2288. return retval;
  2289. }
  2290. retval = synaptics_rmi4_reg_read(rmi4_data,
  2291. data_base + fwu->off.payload,
  2292. &fwu->read_config_buf[index],
  2293. fwu->block_size);
  2294. if (retval < 0) {
  2295. dev_err(rmi4_data->pdev->dev.parent,
  2296. "%s: Failed to read block data (block %d)\n",
  2297. __func__, blk);
  2298. return retval;
  2299. }
  2300. index += fwu->block_size;
  2301. }
  2302. return 0;
  2303. }
  2304. static int fwu_read_f34_blocks(unsigned short block_cnt, unsigned char cmd)
  2305. {
  2306. int retval;
  2307. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  2308. retval = fwu_read_f34_v7_blocks(block_cnt, cmd);
  2309. else
  2310. retval = fwu_read_f34_v5v6_blocks(block_cnt, cmd);
  2311. return retval;
  2312. }
  2313. static int fwu_get_image_firmware_id(unsigned int *fw_id)
  2314. {
  2315. int retval;
  2316. unsigned char index = 0;
  2317. char *strptr;
  2318. char *firmware_id;
  2319. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2320. if (fwu->img.contains_firmware_id) {
  2321. *fw_id = fwu->img.firmware_id;
  2322. } else {
  2323. strptr = strnstr(fwu->image_name, "PR", MAX_IMAGE_NAME_LEN);
  2324. if (!strptr) {
  2325. dev_err(rmi4_data->pdev->dev.parent,
  2326. "%s: No valid PR number (PRxxxxxxx) found in image file name (%s)\n",
  2327. __func__, fwu->image_name);
  2328. return -EINVAL;
  2329. }
  2330. strptr += 2;
  2331. firmware_id = kzalloc(MAX_FIRMWARE_ID_LEN, GFP_KERNEL);
  2332. if (!firmware_id) {
  2333. dev_err(rmi4_data->pdev->dev.parent,
  2334. "%s: Failed to alloc mem for firmware_id\n",
  2335. __func__);
  2336. return -ENOMEM;
  2337. }
  2338. while (strptr[index] >= '0' && strptr[index] <= '9') {
  2339. firmware_id[index] = strptr[index];
  2340. index++;
  2341. if (index == MAX_FIRMWARE_ID_LEN - 1)
  2342. break;
  2343. }
  2344. retval = sstrtoul(firmware_id, 10, (unsigned long *)fw_id);
  2345. kfree(firmware_id);
  2346. if (retval) {
  2347. dev_err(rmi4_data->pdev->dev.parent,
  2348. "%s: Failed to obtain image firmware ID\n",
  2349. __func__);
  2350. return -EINVAL;
  2351. }
  2352. }
  2353. return 0;
  2354. }
  2355. static int fwu_get_device_config_id(void)
  2356. {
  2357. int retval;
  2358. unsigned char config_id_size;
  2359. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2360. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  2361. config_id_size = V7_CONFIG_ID_SIZE;
  2362. else
  2363. config_id_size = V5V6_CONFIG_ID_SIZE;
  2364. retval = synaptics_rmi4_reg_read(rmi4_data,
  2365. fwu->f34_fd.ctrl_base_addr,
  2366. fwu->config_id,
  2367. config_id_size);
  2368. if (retval < 0)
  2369. return retval;
  2370. return 0;
  2371. }
  2372. static enum flash_area fwu_go_nogo(void)
  2373. {
  2374. int retval;
  2375. enum flash_area flash_area = NONE;
  2376. unsigned char ii;
  2377. unsigned char config_id_size;
  2378. unsigned int device_fw_id;
  2379. unsigned int image_fw_id;
  2380. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2381. if (fwu->force_update) {
  2382. flash_area = UI_FIRMWARE;
  2383. goto exit;
  2384. }
  2385. /* Update both UI and config if device is in bootloader mode */
  2386. if (fwu->bl_mode_device) {
  2387. flash_area = UI_FIRMWARE;
  2388. goto exit;
  2389. }
  2390. /* Get device firmware ID */
  2391. device_fw_id = rmi4_data->firmware_id;
  2392. dev_info(rmi4_data->pdev->dev.parent,
  2393. "%s: Device firmware ID = %d\n",
  2394. __func__, device_fw_id);
  2395. /* Get image firmware ID */
  2396. retval = fwu_get_image_firmware_id(&image_fw_id);
  2397. if (retval < 0) {
  2398. flash_area = NONE;
  2399. goto exit;
  2400. }
  2401. dev_info(rmi4_data->pdev->dev.parent,
  2402. "%s: Image firmware ID = %d\n",
  2403. __func__, image_fw_id);
  2404. if (image_fw_id > device_fw_id) {
  2405. flash_area = UI_FIRMWARE;
  2406. goto exit;
  2407. } else if (image_fw_id < device_fw_id) {
  2408. dev_info(rmi4_data->pdev->dev.parent,
  2409. "%s: Image firmware ID older than device firmware ID\n",
  2410. __func__);
  2411. flash_area = NONE;
  2412. goto exit;
  2413. }
  2414. /* Get device config ID */
  2415. retval = fwu_get_device_config_id();
  2416. if (retval < 0) {
  2417. dev_err(rmi4_data->pdev->dev.parent,
  2418. "%s: Failed to read device config ID\n",
  2419. __func__);
  2420. flash_area = NONE;
  2421. goto exit;
  2422. }
  2423. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  2424. config_id_size = V7_CONFIG_ID_SIZE;
  2425. else
  2426. config_id_size = V5V6_CONFIG_ID_SIZE;
  2427. for (ii = 0; ii < config_id_size; ii++) {
  2428. if (fwu->img.ui_config.data[ii] > fwu->config_id[ii]) {
  2429. flash_area = UI_CONFIG;
  2430. goto exit;
  2431. } else if (fwu->img.ui_config.data[ii] < fwu->config_id[ii]) {
  2432. flash_area = NONE;
  2433. goto exit;
  2434. }
  2435. }
  2436. flash_area = NONE;
  2437. exit:
  2438. if (flash_area == NONE) {
  2439. dev_info(rmi4_data->pdev->dev.parent,
  2440. "%s: No need to do reflash\n",
  2441. __func__);
  2442. } else {
  2443. dev_info(rmi4_data->pdev->dev.parent,
  2444. "%s: Updating %s\n",
  2445. __func__,
  2446. flash_area == UI_FIRMWARE ?
  2447. "UI firmware and config" :
  2448. "UI config only");
  2449. }
  2450. return flash_area;
  2451. }
  2452. static int fwu_scan_pdt(void)
  2453. {
  2454. int retval;
  2455. unsigned char ii;
  2456. unsigned char intr_count = 0;
  2457. unsigned char intr_off;
  2458. unsigned char intr_src;
  2459. unsigned short addr;
  2460. bool f01found = false;
  2461. bool f34found = false;
  2462. bool f35found = false;
  2463. struct synaptics_rmi4_fn_desc rmi_fd;
  2464. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2465. fwu->in_ub_mode = false;
  2466. for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
  2467. retval = synaptics_rmi4_reg_read(rmi4_data,
  2468. addr,
  2469. (unsigned char *)&rmi_fd,
  2470. sizeof(rmi_fd));
  2471. if (retval < 0)
  2472. return retval;
  2473. if (rmi_fd.fn_number) {
  2474. dev_dbg(rmi4_data->pdev->dev.parent,
  2475. "%s: Found F%02x\n",
  2476. __func__, rmi_fd.fn_number);
  2477. switch (rmi_fd.fn_number) {
  2478. case SYNAPTICS_RMI4_F01:
  2479. f01found = true;
  2480. rmi4_data->f01_query_base_addr =
  2481. rmi_fd.query_base_addr;
  2482. rmi4_data->f01_ctrl_base_addr =
  2483. rmi_fd.ctrl_base_addr;
  2484. rmi4_data->f01_data_base_addr =
  2485. rmi_fd.data_base_addr;
  2486. rmi4_data->f01_cmd_base_addr =
  2487. rmi_fd.cmd_base_addr;
  2488. break;
  2489. case SYNAPTICS_RMI4_F34:
  2490. f34found = true;
  2491. fwu->f34_fd.query_base_addr =
  2492. rmi_fd.query_base_addr;
  2493. fwu->f34_fd.ctrl_base_addr =
  2494. rmi_fd.ctrl_base_addr;
  2495. fwu->f34_fd.data_base_addr =
  2496. rmi_fd.data_base_addr;
  2497. switch (rmi_fd.fn_version) {
  2498. case F34_V0:
  2499. fwu->bl_version = BL_V5;
  2500. break;
  2501. case F34_V1:
  2502. fwu->bl_version = BL_V6;
  2503. break;
  2504. case F34_V2:
  2505. fwu->bl_version = BL_V7;
  2506. break;
  2507. default:
  2508. dev_err(rmi4_data->pdev->dev.parent,
  2509. "%s: Unrecognized F34 version\n",
  2510. __func__);
  2511. return -EINVAL;
  2512. }
  2513. fwu->intr_mask = 0;
  2514. intr_src = rmi_fd.intr_src_count;
  2515. intr_off = intr_count % 8;
  2516. for (ii = intr_off;
  2517. ii < (intr_src + intr_off);
  2518. ii++) {
  2519. fwu->intr_mask |= 1 << ii;
  2520. }
  2521. break;
  2522. case SYNAPTICS_RMI4_F35:
  2523. f35found = true;
  2524. fwu->f35_fd.query_base_addr =
  2525. rmi_fd.query_base_addr;
  2526. fwu->f35_fd.ctrl_base_addr =
  2527. rmi_fd.ctrl_base_addr;
  2528. fwu->f35_fd.data_base_addr =
  2529. rmi_fd.data_base_addr;
  2530. fwu->f35_fd.cmd_base_addr =
  2531. rmi_fd.cmd_base_addr;
  2532. break;
  2533. }
  2534. } else {
  2535. break;
  2536. }
  2537. intr_count += rmi_fd.intr_src_count;
  2538. }
  2539. if (!f01found || !f34found) {
  2540. dev_err(rmi4_data->pdev->dev.parent,
  2541. "%s: Failed to find both F01 and F34\n",
  2542. __func__);
  2543. if (!f35found) {
  2544. dev_err(rmi4_data->pdev->dev.parent,
  2545. "%s: Failed to find F35\n",
  2546. __func__);
  2547. return -EINVAL;
  2548. } else {
  2549. fwu->in_ub_mode = true;
  2550. dev_dbg(rmi4_data->pdev->dev.parent,
  2551. "%s: In microbootloader mode\n",
  2552. __func__);
  2553. fwu_recovery_check_status();
  2554. return 0;
  2555. }
  2556. }
  2557. rmi4_data->intr_mask[0] |= fwu->intr_mask;
  2558. addr = rmi4_data->f01_ctrl_base_addr + 1;
  2559. retval = synaptics_rmi4_reg_write(rmi4_data,
  2560. addr,
  2561. &(rmi4_data->intr_mask[0]),
  2562. sizeof(rmi4_data->intr_mask[0]));
  2563. if (retval < 0) {
  2564. dev_err(rmi4_data->pdev->dev.parent,
  2565. "%s: Failed to set interrupt enable bit\n",
  2566. __func__);
  2567. return retval;
  2568. }
  2569. return 0;
  2570. }
  2571. static int fwu_enter_flash_prog(void)
  2572. {
  2573. int retval;
  2574. struct f01_device_control f01_device_control;
  2575. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2576. retval = fwu_read_flash_status();
  2577. if (retval < 0)
  2578. return retval;
  2579. if (fwu->in_bl_mode)
  2580. return 0;
  2581. retval = rmi4_data->irq_enable(rmi4_data, false, true);
  2582. if (retval < 0)
  2583. return retval;
  2584. msleep(INT_DISABLE_WAIT_MS);
  2585. retval = fwu_write_f34_command(CMD_ENABLE_FLASH_PROG);
  2586. if (retval < 0)
  2587. return retval;
  2588. retval = fwu_wait_for_idle(ENABLE_WAIT_MS, false);
  2589. if (retval < 0)
  2590. return retval;
  2591. if (!fwu->in_bl_mode) {
  2592. dev_err(rmi4_data->pdev->dev.parent,
  2593. "%s: BL mode not entered\n",
  2594. __func__);
  2595. return -EINVAL;
  2596. }
  2597. if (rmi4_data->hw_if->bl_hw_init) {
  2598. retval = rmi4_data->hw_if->bl_hw_init(rmi4_data);
  2599. if (retval < 0)
  2600. return retval;
  2601. }
  2602. retval = fwu_scan_pdt();
  2603. if (retval < 0)
  2604. return retval;
  2605. retval = fwu_read_f34_queries();
  2606. if (retval < 0)
  2607. return retval;
  2608. retval = synaptics_rmi4_reg_read(rmi4_data,
  2609. rmi4_data->f01_ctrl_base_addr,
  2610. f01_device_control.data,
  2611. sizeof(f01_device_control.data));
  2612. if (retval < 0) {
  2613. dev_err(rmi4_data->pdev->dev.parent,
  2614. "%s: Failed to read F01 device control\n",
  2615. __func__);
  2616. return retval;
  2617. }
  2618. f01_device_control.nosleep = true;
  2619. f01_device_control.sleep_mode = SLEEP_MODE_NORMAL;
  2620. retval = synaptics_rmi4_reg_write(rmi4_data,
  2621. rmi4_data->f01_ctrl_base_addr,
  2622. f01_device_control.data,
  2623. sizeof(f01_device_control.data));
  2624. if (retval < 0) {
  2625. dev_err(rmi4_data->pdev->dev.parent,
  2626. "%s: Failed to write F01 device control\n",
  2627. __func__);
  2628. return retval;
  2629. }
  2630. msleep(ENTER_FLASH_PROG_WAIT_MS);
  2631. return retval;
  2632. }
  2633. static int fwu_check_ui_firmware_size(void)
  2634. {
  2635. unsigned short block_count;
  2636. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2637. block_count = fwu->img.ui_firmware.size / fwu->block_size;
  2638. if (block_count != fwu->blkcount.ui_firmware) {
  2639. dev_err(rmi4_data->pdev->dev.parent,
  2640. "%s: UI firmware size mismatch\n",
  2641. __func__);
  2642. return -EINVAL;
  2643. }
  2644. return 0;
  2645. }
  2646. static int fwu_check_ui_configuration_size(void)
  2647. {
  2648. unsigned short block_count;
  2649. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2650. block_count = fwu->img.ui_config.size / fwu->block_size;
  2651. if (block_count != fwu->blkcount.ui_config) {
  2652. dev_err(rmi4_data->pdev->dev.parent,
  2653. "%s: UI configuration size mismatch\n",
  2654. __func__);
  2655. return -EINVAL;
  2656. }
  2657. return 0;
  2658. }
  2659. static int fwu_check_dp_configuration_size(void)
  2660. {
  2661. unsigned short block_count;
  2662. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2663. block_count = fwu->img.dp_config.size / fwu->block_size;
  2664. if (block_count != fwu->blkcount.dp_config) {
  2665. dev_err(rmi4_data->pdev->dev.parent,
  2666. "%s: Display configuration size mismatch\n",
  2667. __func__);
  2668. return -EINVAL;
  2669. }
  2670. return 0;
  2671. }
  2672. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  2673. static int fwu_check_pm_configuration_size(void)
  2674. {
  2675. unsigned short block_count;
  2676. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2677. block_count = fwu->img.pm_config.size / fwu->block_size;
  2678. if (block_count != fwu->blkcount.pm_config) {
  2679. dev_err(rmi4_data->pdev->dev.parent,
  2680. "%s: Permanent configuration size mismatch\n",
  2681. __func__);
  2682. return -EINVAL;
  2683. }
  2684. return 0;
  2685. }
  2686. #endif
  2687. static int fwu_check_bl_configuration_size(void)
  2688. {
  2689. unsigned short block_count;
  2690. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2691. block_count = fwu->img.bl_config.size / fwu->block_size;
  2692. if (block_count != fwu->blkcount.bl_config) {
  2693. dev_err(rmi4_data->pdev->dev.parent,
  2694. "%s: Bootloader configuration size mismatch\n",
  2695. __func__);
  2696. return -EINVAL;
  2697. }
  2698. return 0;
  2699. }
  2700. static int fwu_check_guest_code_size(void)
  2701. {
  2702. unsigned short block_count;
  2703. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2704. block_count = fwu->img.guest_code.size / fwu->block_size;
  2705. if (block_count != fwu->blkcount.guest_code) {
  2706. dev_err(rmi4_data->pdev->dev.parent,
  2707. "%s: Guest code size mismatch\n",
  2708. __func__);
  2709. return -EINVAL;
  2710. }
  2711. return 0;
  2712. }
  2713. static int fwu_erase_configuration(void)
  2714. {
  2715. int retval;
  2716. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2717. switch (fwu->config_area) {
  2718. case UI_CONFIG_AREA:
  2719. retval = fwu_write_f34_command(CMD_ERASE_UI_CONFIG);
  2720. if (retval < 0)
  2721. return retval;
  2722. break;
  2723. case DP_CONFIG_AREA:
  2724. retval = fwu_write_f34_command(CMD_ERASE_DISP_CONFIG);
  2725. if (retval < 0)
  2726. return retval;
  2727. break;
  2728. case BL_CONFIG_AREA:
  2729. retval = fwu_write_f34_command(CMD_ERASE_BL_CONFIG);
  2730. if (retval < 0)
  2731. return retval;
  2732. break;
  2733. case FLASH_CONFIG_AREA:
  2734. retval = fwu_write_f34_command(CMD_ERASE_FLASH_CONFIG);
  2735. if (retval < 0)
  2736. return retval;
  2737. break;
  2738. case UPP_AREA:
  2739. retval = fwu_write_f34_command(CMD_ERASE_UTILITY_PARAMETER);
  2740. if (retval < 0)
  2741. return retval;
  2742. default:
  2743. dev_err(rmi4_data->pdev->dev.parent,
  2744. "%s: Invalid config area\n",
  2745. __func__);
  2746. return -EINVAL;
  2747. }
  2748. dev_dbg(rmi4_data->pdev->dev.parent,
  2749. "%s: Erase command written\n",
  2750. __func__);
  2751. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2752. if (retval < 0)
  2753. return retval;
  2754. dev_dbg(rmi4_data->pdev->dev.parent,
  2755. "%s: Idle status detected\n",
  2756. __func__);
  2757. return retval;
  2758. }
  2759. static int fwu_erase_bootloader(void)
  2760. {
  2761. int retval;
  2762. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2763. retval = fwu_write_f34_command(CMD_ERASE_BOOTLOADER);
  2764. if (retval < 0)
  2765. return retval;
  2766. dev_dbg(rmi4_data->pdev->dev.parent,
  2767. "%s: Erase command written\n",
  2768. __func__);
  2769. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2770. if (retval < 0)
  2771. return retval;
  2772. dev_dbg(rmi4_data->pdev->dev.parent,
  2773. "%s: Idle status detected\n",
  2774. __func__);
  2775. return 0;
  2776. }
  2777. #ifdef SYNA_TDDI
  2778. static int fwu_erase_lockdown_data(void)
  2779. {
  2780. int retval;
  2781. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2782. retval = fwu_write_f34_command(CMD_ERASE_LOCKDOWN_DATA);
  2783. if (retval < 0)
  2784. return retval;
  2785. dev_dbg(rmi4_data->pdev->dev.parent,
  2786. "%s: Erase command written\n",
  2787. __func__);
  2788. msleep(100);
  2789. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2790. if (retval < 0)
  2791. return retval;
  2792. dev_dbg(rmi4_data->pdev->dev.parent,
  2793. "%s: Idle status detected\n",
  2794. __func__);
  2795. return 0;
  2796. }
  2797. #endif
  2798. static int fwu_erase_guest_code(void)
  2799. {
  2800. int retval;
  2801. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2802. retval = fwu_write_f34_command(CMD_ERASE_GUEST_CODE);
  2803. if (retval < 0)
  2804. return retval;
  2805. dev_dbg(rmi4_data->pdev->dev.parent,
  2806. "%s: Erase command written\n",
  2807. __func__);
  2808. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2809. if (retval < 0)
  2810. return retval;
  2811. dev_dbg(rmi4_data->pdev->dev.parent,
  2812. "%s: Idle status detected\n",
  2813. __func__);
  2814. return 0;
  2815. }
  2816. static int fwu_erase_all(void)
  2817. {
  2818. int retval;
  2819. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2820. if (fwu->bl_version == BL_V7) {
  2821. retval = fwu_write_f34_command(CMD_ERASE_UI_FIRMWARE);
  2822. if (retval < 0)
  2823. return retval;
  2824. dev_dbg(rmi4_data->pdev->dev.parent,
  2825. "%s: Erase command written\n",
  2826. __func__);
  2827. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2828. if (retval < 0)
  2829. return retval;
  2830. dev_dbg(rmi4_data->pdev->dev.parent,
  2831. "%s: Idle status detected\n",
  2832. __func__);
  2833. fwu->config_area = UI_CONFIG_AREA;
  2834. retval = fwu_erase_configuration();
  2835. if (retval < 0)
  2836. return retval;
  2837. } else {
  2838. retval = fwu_write_f34_command(CMD_ERASE_ALL);
  2839. if (retval < 0)
  2840. return retval;
  2841. dev_dbg(rmi4_data->pdev->dev.parent,
  2842. "%s: Erase all command written\n",
  2843. __func__);
  2844. retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
  2845. if (!(fwu->bl_version == BL_V8 &&
  2846. fwu->flash_status == BAD_PARTITION_TABLE)) {
  2847. if (retval < 0)
  2848. return retval;
  2849. }
  2850. dev_dbg(rmi4_data->pdev->dev.parent,
  2851. "%s: Idle status detected\n",
  2852. __func__);
  2853. if (fwu->bl_version == BL_V8)
  2854. return 0;
  2855. }
  2856. if (fwu->flash_properties.has_disp_config) {
  2857. fwu->config_area = DP_CONFIG_AREA;
  2858. retval = fwu_erase_configuration();
  2859. if (retval < 0)
  2860. return retval;
  2861. }
  2862. if (fwu->has_guest_code) {
  2863. retval = fwu_erase_guest_code();
  2864. if (retval < 0)
  2865. return retval;
  2866. }
  2867. return 0;
  2868. }
  2869. static int fwu_write_firmware(void)
  2870. {
  2871. unsigned short firmware_block_count;
  2872. firmware_block_count = fwu->img.ui_firmware.size / fwu->block_size;
  2873. return fwu_write_f34_blocks((unsigned char *)fwu->img.ui_firmware.data,
  2874. firmware_block_count, CMD_WRITE_FW);
  2875. }
  2876. static int fwu_write_bootloader(void)
  2877. {
  2878. int retval;
  2879. unsigned short bootloader_block_count;
  2880. bootloader_block_count = fwu->img.bl_image.size / fwu->block_size;
  2881. fwu->write_bootloader = true;
  2882. retval = fwu_write_f34_blocks((unsigned char *)fwu->img.bl_image.data,
  2883. bootloader_block_count, CMD_WRITE_BOOTLOADER);
  2884. fwu->write_bootloader = false;
  2885. return retval;
  2886. }
  2887. static int fwu_write_utility_parameter(void)
  2888. {
  2889. int retval;
  2890. unsigned char ii;
  2891. unsigned char checksum_array[4];
  2892. unsigned char *pbuf;
  2893. unsigned short remaining_size;
  2894. unsigned short utility_param_size;
  2895. unsigned long checksum;
  2896. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2897. utility_param_size = fwu->blkcount.utility_param * fwu->block_size;
  2898. retval = fwu_allocate_read_config_buf(utility_param_size);
  2899. if (retval < 0)
  2900. return retval;
  2901. memset(fwu->read_config_buf, 0x00, utility_param_size);
  2902. pbuf = fwu->read_config_buf;
  2903. remaining_size = utility_param_size - 4;
  2904. for (ii = 0; ii < MAX_UTILITY_PARAMS; ii++) {
  2905. if (fwu->img.utility_param_id[ii] == UNUSED)
  2906. continue;
  2907. #ifdef F51_DISCRETE_FORCE
  2908. if (fwu->img.utility_param_id[ii] == FORCE_PARAMETER) {
  2909. if (fwu->bl_mode_device) {
  2910. dev_info(rmi4_data->pdev->dev.parent,
  2911. "%s: Device in bootloader mode, skipping calibration data restoration\n",
  2912. __func__);
  2913. goto image_param;
  2914. }
  2915. retval = secure_memcpy(&(pbuf[4]),
  2916. remaining_size - 4,
  2917. fwu->cal_data,
  2918. fwu->cal_data_buf_size,
  2919. fwu->cal_data_size);
  2920. if (retval < 0) {
  2921. dev_err(rmi4_data->pdev->dev.parent,
  2922. "%s: Failed to copy force calibration data\n",
  2923. __func__);
  2924. return retval;
  2925. }
  2926. pbuf[0] = FORCE_PARAMETER;
  2927. pbuf[1] = 0x00;
  2928. pbuf[2] = (4 + fwu->cal_data_size) / 2;
  2929. pbuf += (fwu->cal_data_size + 4);
  2930. remaining_size -= (fwu->cal_data_size + 4);
  2931. continue;
  2932. }
  2933. image_param:
  2934. #endif
  2935. retval = secure_memcpy(pbuf,
  2936. remaining_size,
  2937. fwu->img.utility_param[ii].data,
  2938. fwu->img.utility_param[ii].size,
  2939. fwu->img.utility_param[ii].size);
  2940. if (retval < 0) {
  2941. dev_err(rmi4_data->pdev->dev.parent,
  2942. "%s: Failed to copy utility parameter data\n",
  2943. __func__);
  2944. return retval;
  2945. }
  2946. pbuf += fwu->img.utility_param[ii].size;
  2947. remaining_size -= fwu->img.utility_param[ii].size;
  2948. }
  2949. calculate_checksum((unsigned short *)fwu->read_config_buf,
  2950. ((utility_param_size - 4) / 2),
  2951. &checksum);
  2952. convert_to_little_endian(checksum_array, checksum);
  2953. fwu->read_config_buf[utility_param_size - 4] = checksum_array[0];
  2954. fwu->read_config_buf[utility_param_size - 3] = checksum_array[1];
  2955. fwu->read_config_buf[utility_param_size - 2] = checksum_array[2];
  2956. fwu->read_config_buf[utility_param_size - 1] = checksum_array[3];
  2957. retval = fwu_write_f34_blocks((unsigned char *)fwu->read_config_buf,
  2958. fwu->blkcount.utility_param, CMD_WRITE_UTILITY_PARAM);
  2959. if (retval < 0)
  2960. return retval;
  2961. return 0;
  2962. }
  2963. static int fwu_write_configuration(void)
  2964. {
  2965. return fwu_write_f34_blocks((unsigned char *)fwu->config_data,
  2966. fwu->config_block_count, CMD_WRITE_CONFIG);
  2967. }
  2968. static int fwu_write_ui_configuration(void)
  2969. {
  2970. fwu->config_area = UI_CONFIG_AREA;
  2971. fwu->config_data = fwu->img.ui_config.data;
  2972. fwu->config_size = fwu->img.ui_config.size;
  2973. fwu->config_block_count = fwu->config_size / fwu->block_size;
  2974. return fwu_write_configuration();
  2975. }
  2976. static int fwu_write_dp_configuration(void)
  2977. {
  2978. fwu->config_area = DP_CONFIG_AREA;
  2979. fwu->config_data = fwu->img.dp_config.data;
  2980. fwu->config_size = fwu->img.dp_config.size;
  2981. fwu->config_block_count = fwu->config_size / fwu->block_size;
  2982. return fwu_write_configuration();
  2983. }
  2984. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  2985. static int fwu_write_pm_configuration(void)
  2986. {
  2987. fwu->config_area = PM_CONFIG_AREA;
  2988. fwu->config_data = fwu->img.pm_config.data;
  2989. fwu->config_size = fwu->img.pm_config.size;
  2990. fwu->config_block_count = fwu->config_size / fwu->block_size;
  2991. return fwu_write_configuration();
  2992. }
  2993. #ifdef SYNA_TDDI
  2994. static int fwu_write_tddi_lockdown_data(void)
  2995. {
  2996. int retval;
  2997. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  2998. retval = fwu_write_f34_blocks(fwu->read_config_buf,
  2999. fwu->blkcount.tddi_lockdown_data,
  3000. CMD_WRITE_LOCKDOWN_DATA);
  3001. if (retval < 0)
  3002. return retval;
  3003. rmi4_data->reset_device(rmi4_data, false);
  3004. return 0;
  3005. }
  3006. #endif
  3007. #endif
  3008. static int fwu_write_flash_configuration(void)
  3009. {
  3010. int retval;
  3011. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3012. fwu->config_area = FLASH_CONFIG_AREA;
  3013. fwu->config_data = fwu->img.fl_config.data;
  3014. fwu->config_size = fwu->img.fl_config.size;
  3015. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3016. if (fwu->config_block_count != fwu->blkcount.fl_config) {
  3017. dev_err(rmi4_data->pdev->dev.parent,
  3018. "%s: Flash configuration size mismatch\n",
  3019. __func__);
  3020. return -EINVAL;
  3021. }
  3022. retval = fwu_erase_configuration();
  3023. if (retval < 0)
  3024. return retval;
  3025. retval = fwu_write_configuration();
  3026. if (retval < 0)
  3027. return retval;
  3028. rmi4_data->reset_device(rmi4_data, false);
  3029. return 0;
  3030. }
  3031. static int fwu_write_guest_code(void)
  3032. {
  3033. int retval;
  3034. unsigned short guest_code_block_count;
  3035. guest_code_block_count = fwu->img.guest_code.size / fwu->block_size;
  3036. retval = fwu_write_f34_blocks((unsigned char *)fwu->img.guest_code.data,
  3037. guest_code_block_count, CMD_WRITE_GUEST_CODE);
  3038. if (retval < 0)
  3039. return retval;
  3040. return 0;
  3041. }
  3042. static int fwu_write_lockdown(void)
  3043. {
  3044. unsigned short lockdown_block_count;
  3045. lockdown_block_count = fwu->img.lockdown.size / fwu->block_size;
  3046. return fwu_write_f34_blocks((unsigned char *)fwu->img.lockdown.data,
  3047. lockdown_block_count, CMD_WRITE_LOCKDOWN);
  3048. }
  3049. static int fwu_write_partition_table_v8(void)
  3050. {
  3051. int retval;
  3052. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3053. fwu->config_area = FLASH_CONFIG_AREA;
  3054. fwu->config_data = fwu->img.fl_config.data;
  3055. fwu->config_size = fwu->img.fl_config.size;
  3056. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3057. if (fwu->config_block_count != fwu->blkcount.fl_config) {
  3058. dev_err(rmi4_data->pdev->dev.parent,
  3059. "%s: Flash configuration size mismatch\n",
  3060. __func__);
  3061. return -EINVAL;
  3062. }
  3063. retval = fwu_write_configuration();
  3064. if (retval < 0)
  3065. return retval;
  3066. rmi4_data->reset_device(rmi4_data, false);
  3067. return 0;
  3068. }
  3069. static int fwu_write_partition_table_v7(void)
  3070. {
  3071. int retval;
  3072. unsigned short block_count;
  3073. block_count = fwu->blkcount.bl_config;
  3074. fwu->config_area = BL_CONFIG_AREA;
  3075. fwu->config_size = fwu->block_size * block_count;
  3076. retval = fwu_allocate_read_config_buf(fwu->config_size);
  3077. if (retval < 0)
  3078. return retval;
  3079. retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
  3080. if (retval < 0)
  3081. return retval;
  3082. retval = fwu_erase_configuration();
  3083. if (retval < 0)
  3084. return retval;
  3085. retval = fwu_write_flash_configuration();
  3086. if (retval < 0)
  3087. return retval;
  3088. fwu->config_area = BL_CONFIG_AREA;
  3089. fwu->config_data = fwu->read_config_buf;
  3090. fwu->config_size = fwu->img.bl_config.size;
  3091. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3092. retval = fwu_write_configuration();
  3093. if (retval < 0)
  3094. return retval;
  3095. return 0;
  3096. }
  3097. static int fwu_write_bl_area_v7(void)
  3098. {
  3099. int retval;
  3100. bool has_utility_param;
  3101. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3102. has_utility_param = fwu->has_utility_param;
  3103. if (fwu->has_utility_param) {
  3104. fwu->config_area = UPP_AREA;
  3105. retval = fwu_erase_configuration();
  3106. if (retval < 0)
  3107. return retval;
  3108. }
  3109. fwu->config_area = BL_CONFIG_AREA;
  3110. retval = fwu_erase_configuration();
  3111. if (retval < 0)
  3112. return retval;
  3113. fwu->config_area = FLASH_CONFIG_AREA;
  3114. retval = fwu_erase_configuration();
  3115. if (retval < 0)
  3116. return retval;
  3117. retval = fwu_erase_bootloader();
  3118. if (retval < 0)
  3119. return retval;
  3120. retval = fwu_write_bootloader();
  3121. if (retval < 0)
  3122. return retval;
  3123. msleep(rmi4_data->hw_if->board_data->reset_delay_ms);
  3124. rmi4_data->reset_device(rmi4_data, false);
  3125. fwu->config_area = FLASH_CONFIG_AREA;
  3126. fwu->config_data = fwu->img.fl_config.data;
  3127. fwu->config_size = fwu->img.fl_config.size;
  3128. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3129. retval = fwu_write_configuration();
  3130. if (retval < 0)
  3131. return retval;
  3132. rmi4_data->reset_device(rmi4_data, false);
  3133. fwu->config_area = BL_CONFIG_AREA;
  3134. fwu->config_data = fwu->img.bl_config.data;
  3135. fwu->config_size = fwu->img.bl_config.size;
  3136. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3137. retval = fwu_write_configuration();
  3138. if (retval < 0)
  3139. return retval;
  3140. if (fwu->img.contains_utility_param) {
  3141. retval = fwu_write_utility_parameter();
  3142. if (retval < 0)
  3143. return retval;
  3144. }
  3145. return 0;
  3146. }
  3147. static int fwu_do_reflash(void)
  3148. {
  3149. int retval;
  3150. bool do_bl_update = false;
  3151. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3152. if (!fwu->new_partition_table) {
  3153. retval = fwu_check_ui_firmware_size();
  3154. if (retval < 0)
  3155. return retval;
  3156. retval = fwu_check_ui_configuration_size();
  3157. if (retval < 0)
  3158. return retval;
  3159. if (fwu->flash_properties.has_disp_config &&
  3160. fwu->img.contains_disp_config) {
  3161. retval = fwu_check_dp_configuration_size();
  3162. if (retval < 0)
  3163. return retval;
  3164. }
  3165. if (fwu->has_guest_code && fwu->img.contains_guest_code) {
  3166. retval = fwu_check_guest_code_size();
  3167. if (retval < 0)
  3168. return retval;
  3169. }
  3170. } else if (fwu->bl_version == BL_V7) {
  3171. retval = fwu_check_bl_configuration_size();
  3172. if (retval < 0)
  3173. return retval;
  3174. }
  3175. if (!fwu->has_utility_param && fwu->img.contains_utility_param) {
  3176. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  3177. do_bl_update = true;
  3178. }
  3179. if (fwu->has_utility_param && !fwu->img.contains_utility_param) {
  3180. if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
  3181. do_bl_update = true;
  3182. }
  3183. if (!do_bl_update && fwu->incompatible_partition_tables) {
  3184. dev_err(rmi4_data->pdev->dev.parent,
  3185. "%s: Incompatible partition tables\n",
  3186. __func__);
  3187. return -EINVAL;
  3188. } else if (!do_bl_update && fwu->new_partition_table) {
  3189. if (!fwu->force_update) {
  3190. dev_err(rmi4_data->pdev->dev.parent,
  3191. "%s: Partition table mismatch\n",
  3192. __func__);
  3193. return -EINVAL;
  3194. }
  3195. }
  3196. retval = fwu_erase_all();
  3197. if (retval < 0)
  3198. return retval;
  3199. if (do_bl_update) {
  3200. retval = fwu_write_bl_area_v7();
  3201. if (retval < 0)
  3202. return retval;
  3203. pr_notice("%s: Bootloader area programmed\n", __func__);
  3204. } else if (fwu->bl_version == BL_V7 && fwu->new_partition_table) {
  3205. retval = fwu_write_partition_table_v7();
  3206. if (retval < 0)
  3207. return retval;
  3208. pr_notice("%s: Partition table programmed\n", __func__);
  3209. } else if (fwu->bl_version == BL_V8) {
  3210. retval = fwu_write_partition_table_v8();
  3211. if (retval < 0)
  3212. return retval;
  3213. pr_notice("%s: Partition table programmed\n", __func__);
  3214. }
  3215. fwu->config_area = UI_CONFIG_AREA;
  3216. if (fwu->flash_properties.has_disp_config &&
  3217. fwu->img.contains_disp_config) {
  3218. retval = fwu_write_dp_configuration();
  3219. if (retval < 0)
  3220. return retval;
  3221. pr_notice("%s: Display configuration programmed\n", __func__);
  3222. }
  3223. retval = fwu_write_ui_configuration();
  3224. if (retval < 0)
  3225. return retval;
  3226. pr_notice("%s: Configuration programmed\n", __func__);
  3227. if (fwu->has_guest_code && fwu->img.contains_guest_code) {
  3228. retval = fwu_write_guest_code();
  3229. if (retval < 0)
  3230. return retval;
  3231. pr_notice("%s: Guest code programmed\n", __func__);
  3232. }
  3233. retval = fwu_write_firmware();
  3234. if (retval < 0)
  3235. return retval;
  3236. pr_notice("%s: Firmware programmed\n", __func__);
  3237. return retval;
  3238. }
  3239. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  3240. static int fwu_do_read_config(void)
  3241. {
  3242. int retval;
  3243. unsigned short block_count;
  3244. unsigned short config_area;
  3245. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3246. switch (fwu->config_area) {
  3247. case UI_CONFIG_AREA:
  3248. block_count = fwu->blkcount.ui_config;
  3249. break;
  3250. case DP_CONFIG_AREA:
  3251. if (!fwu->flash_properties.has_disp_config) {
  3252. dev_err(rmi4_data->pdev->dev.parent,
  3253. "%s: Display configuration not supported\n",
  3254. __func__);
  3255. return -EINVAL;
  3256. }
  3257. block_count = fwu->blkcount.dp_config;
  3258. break;
  3259. case PM_CONFIG_AREA:
  3260. if (!fwu->flash_properties.has_pm_config) {
  3261. dev_err(rmi4_data->pdev->dev.parent,
  3262. "%s: Permanent configuration not supported\n",
  3263. __func__);
  3264. return -EINVAL;
  3265. }
  3266. block_count = fwu->blkcount.pm_config;
  3267. break;
  3268. case BL_CONFIG_AREA:
  3269. if (!fwu->flash_properties.has_bl_config) {
  3270. dev_err(rmi4_data->pdev->dev.parent,
  3271. "%s: Bootloader configuration not supported\n",
  3272. __func__);
  3273. return -EINVAL;
  3274. }
  3275. block_count = fwu->blkcount.bl_config;
  3276. break;
  3277. case UPP_AREA:
  3278. if (!fwu->has_utility_param) {
  3279. dev_err(rmi4_data->pdev->dev.parent,
  3280. "%s: Utility parameter not supported\n",
  3281. __func__);
  3282. return -EINVAL;
  3283. }
  3284. block_count = fwu->blkcount.utility_param;
  3285. break;
  3286. #ifdef SYNA_TDDI
  3287. case TDDI_FORCE_CONFIG_AREA:
  3288. if (!fwu->has_force_config) {
  3289. dev_err(rmi4_data->pdev->dev.parent,
  3290. "%s: force configuration not supported\n",
  3291. __func__);
  3292. return -EINVAL;
  3293. }
  3294. block_count = fwu->blkcount.tddi_force_config;
  3295. break;
  3296. case TDDI_OEM_DATA_AREA:
  3297. if (!fwu->has_oem_data) {
  3298. dev_err(rmi4_data->pdev->dev.parent,
  3299. "%s: oem data not supported\n",
  3300. __func__);
  3301. return -EINVAL;
  3302. }
  3303. block_count = fwu->blkcount.tddi_oem_data;
  3304. break;
  3305. case TDDI_LCM_DATA_AREA:
  3306. if (!fwu->has_lcm_data) {
  3307. dev_err(rmi4_data->pdev->dev.parent,
  3308. "%s: lcm data not supported\n",
  3309. __func__);
  3310. return -EINVAL;
  3311. }
  3312. block_count = fwu->blkcount.tddi_lcm_data;
  3313. break;
  3314. #endif
  3315. default:
  3316. dev_err(rmi4_data->pdev->dev.parent,
  3317. "%s: Invalid config area\n",
  3318. __func__);
  3319. return -EINVAL;
  3320. }
  3321. if (block_count == 0) {
  3322. dev_err(rmi4_data->pdev->dev.parent,
  3323. "%s: Invalid block count\n",
  3324. __func__);
  3325. return -EINVAL;
  3326. }
  3327. mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
  3328. if (fwu->bl_version == BL_V5 || fwu->bl_version == BL_V6) {
  3329. config_area = fwu->config_area;
  3330. retval = fwu_enter_flash_prog();
  3331. fwu->config_area = config_area;
  3332. if (retval < 0)
  3333. goto exit;
  3334. }
  3335. fwu->config_size = fwu->block_size * block_count;
  3336. retval = fwu_allocate_read_config_buf(fwu->config_size);
  3337. if (retval < 0)
  3338. goto exit;
  3339. retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
  3340. exit:
  3341. if (fwu->bl_version == BL_V5 || fwu->bl_version == BL_V6)
  3342. rmi4_data->reset_device(rmi4_data, false);
  3343. mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
  3344. return retval;
  3345. }
  3346. #ifdef SYNA_TDDI
  3347. static int fwu_do_read_tddi_lockdown_data(void)
  3348. {
  3349. int retval = -EINVAL;
  3350. unsigned short block_count;
  3351. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3352. block_count = fwu->blkcount.tddi_lockdown_data;
  3353. fwu->config_size = fwu->block_size * block_count;
  3354. if (fwu->bl_version != BL_V6) {
  3355. dev_err(rmi4_data->pdev->dev.parent,
  3356. "%s: Not support lockdown data in bl v.%d\n",
  3357. __func__,
  3358. fwu->bl_version);
  3359. goto exit;
  3360. } else if (!fwu->has_lockdown_data) {
  3361. dev_err(rmi4_data->pdev->dev.parent,
  3362. "%s: Not support lockdown data\n", __func__);
  3363. goto exit;
  3364. }
  3365. kfree(fwu->read_config_buf);
  3366. fwu->read_config_buf = kzalloc(fwu->config_size, GFP_KERNEL);
  3367. if (!fwu->read_config_buf) {
  3368. dev_err(rmi4_data->pdev->dev.parent,
  3369. "%s: Failed to alloc mem for fwu->read_config_buf\n",
  3370. __func__);
  3371. fwu->read_config_buf_size = 0;
  3372. retval = -ENOMEM;
  3373. goto exit;
  3374. }
  3375. fwu->read_config_buf_size = fwu->config_size;
  3376. retval = fwu_read_f34_blocks(block_count, CMD_READ_LOCKDOWN_DATA);
  3377. exit:
  3378. return retval;
  3379. }
  3380. int get_tddi_lockdown_data(unsigned char *lockdown_data, unsigned short leng)
  3381. {
  3382. int retval;
  3383. retval = fwu_do_read_tddi_lockdown_data();
  3384. if (retval < 0)
  3385. return retval;
  3386. memcpy(lockdown_data, fwu->read_config_buf, leng);
  3387. return retval;
  3388. }
  3389. int set_tddi_lockdown_data(unsigned char *lockdown_data, unsigned short leng)
  3390. {
  3391. int retval = -EINVAL;
  3392. unsigned long checksum;
  3393. unsigned char checksum_array[4];
  3394. unsigned short blk_cnt;
  3395. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3396. if (fwu->bl_version != BL_V6) {
  3397. dev_err(rmi4_data->pdev->dev.parent,
  3398. "%s: Not support lockdown data in bl v.%d\n",
  3399. __func__,
  3400. fwu->bl_version);
  3401. goto exit;
  3402. } else if (!fwu->has_lockdown_data) {
  3403. dev_err(rmi4_data->pdev->dev.parent,
  3404. "%s: Not support lockdown data\n", __func__);
  3405. goto exit;
  3406. }
  3407. retval = fwu_enter_flash_prog();
  3408. if (retval < 0)
  3409. goto exit;
  3410. retval = fwu_erase_lockdown_data();
  3411. if (retval < 0)
  3412. goto exit;
  3413. blk_cnt = fwu->blkcount.tddi_lockdown_data;
  3414. fwu->config_size = fwu->blkcount.tddi_lockdown_data * fwu->block_size;
  3415. retval = fwu_allocate_read_config_buf(fwu->config_size);
  3416. if (retval < 0)
  3417. goto exit;
  3418. memset(fwu->read_config_buf, 0x00, fwu->config_size);
  3419. retval = secure_memcpy(fwu->read_config_buf, fwu->config_size,
  3420. lockdown_data, leng, leng);
  3421. if (retval < 0) {
  3422. dev_err(rmi4_data->pdev->dev.parent,
  3423. "%s: Failed to copy tddi lockdwon data\n",
  3424. __func__);
  3425. goto exit;
  3426. }
  3427. calculate_checksum((unsigned short *)fwu->read_config_buf,
  3428. ((fwu->config_size - 4) / 2),
  3429. &checksum);
  3430. convert_to_little_endian(checksum_array, checksum);
  3431. fwu->read_config_buf[blk_cnt * fwu->block_size - 4] = checksum_array[0];
  3432. fwu->read_config_buf[blk_cnt * fwu->block_size - 3] = checksum_array[1];
  3433. fwu->read_config_buf[blk_cnt * fwu->block_size - 2] = checksum_array[2];
  3434. fwu->read_config_buf[blk_cnt * fwu->block_size - 1] = checksum_array[3];
  3435. retval = fwu_write_tddi_lockdown_data();
  3436. exit:
  3437. return retval;
  3438. }
  3439. #endif
  3440. #endif
  3441. static int fwu_do_lockdown_v7(void)
  3442. {
  3443. int retval;
  3444. struct f34_v7_data0 status;
  3445. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3446. retval = fwu_enter_flash_prog();
  3447. if (retval < 0)
  3448. return retval;
  3449. retval = synaptics_rmi4_reg_read(rmi4_data,
  3450. fwu->f34_fd.data_base_addr + fwu->off.flash_status,
  3451. status.data,
  3452. sizeof(status.data));
  3453. if (retval < 0) {
  3454. dev_err(rmi4_data->pdev->dev.parent,
  3455. "%s: Failed to read flash status\n",
  3456. __func__);
  3457. return retval;
  3458. }
  3459. if (status.device_cfg_status == 2) {
  3460. dev_info(rmi4_data->pdev->dev.parent,
  3461. "%s: Device already locked down\n",
  3462. __func__);
  3463. return 0;
  3464. }
  3465. retval = fwu_write_lockdown();
  3466. if (retval < 0)
  3467. return retval;
  3468. pr_notice("%s: Lockdown programmed\n", __func__);
  3469. return retval;
  3470. }
  3471. static int fwu_do_lockdown_v5v6(void)
  3472. {
  3473. int retval;
  3474. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3475. #ifdef SYNA_TDDI
  3476. unsigned char *img_ld;
  3477. img_ld = (unsigned char *)fwu->img.lockdown.data;
  3478. if (fwu->has_lockdown_data) {
  3479. retval = set_tddi_lockdown_data(img_ld,
  3480. LOCKDOWN_SIZE);
  3481. if (retval < 0)
  3482. dev_err(rmi4_data->pdev->dev.parent,
  3483. "%s: Failed to write lockdown data\n",
  3484. __func__);
  3485. return retval;
  3486. }
  3487. #endif
  3488. retval = fwu_enter_flash_prog();
  3489. if (retval < 0)
  3490. return retval;
  3491. retval = synaptics_rmi4_reg_read(rmi4_data,
  3492. fwu->f34_fd.query_base_addr + fwu->off.properties,
  3493. fwu->flash_properties.data,
  3494. sizeof(fwu->flash_properties.data));
  3495. if (retval < 0) {
  3496. dev_err(rmi4_data->pdev->dev.parent,
  3497. "%s: Failed to read flash properties\n",
  3498. __func__);
  3499. return retval;
  3500. }
  3501. if (fwu->flash_properties.unlocked == 0) {
  3502. dev_info(rmi4_data->pdev->dev.parent,
  3503. "%s: Device already locked down\n",
  3504. __func__);
  3505. return 0;
  3506. }
  3507. retval = fwu_write_lockdown();
  3508. if (retval < 0)
  3509. return retval;
  3510. pr_notice("%s: Lockdown programmed\n", __func__);
  3511. return retval;
  3512. }
  3513. #ifdef F51_DISCRETE_FORCE
  3514. static int fwu_do_restore_f51_cal_data(void)
  3515. {
  3516. int retval;
  3517. unsigned char checksum_array[4];
  3518. unsigned short block_count;
  3519. unsigned long checksum;
  3520. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3521. block_count = fwu->blkcount.ui_config;
  3522. fwu->config_size = fwu->block_size * block_count;
  3523. fwu->config_area = UI_CONFIG_AREA;
  3524. retval = fwu_allocate_read_config_buf(fwu->config_size);
  3525. if (retval < 0)
  3526. return retval;
  3527. retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
  3528. if (retval < 0)
  3529. return retval;
  3530. retval = secure_memcpy(&fwu->read_config_buf[fwu->cal_data_off],
  3531. fwu->cal_data_size, fwu->cal_data,
  3532. fwu->cal_data_buf_size, fwu->cal_data_size);
  3533. if (retval < 0) {
  3534. dev_err(rmi4_data->pdev->dev.parent,
  3535. "%s: Failed to restore calibration data\n",
  3536. __func__);
  3537. return retval;
  3538. }
  3539. calculate_checksum((unsigned short *)fwu->read_config_buf,
  3540. ((fwu->config_size - 4) / 2),
  3541. &checksum);
  3542. convert_to_little_endian(checksum_array, checksum);
  3543. fwu->read_config_buf[fwu->config_size - 4] = checksum_array[0];
  3544. fwu->read_config_buf[fwu->config_size - 3] = checksum_array[1];
  3545. fwu->read_config_buf[fwu->config_size - 2] = checksum_array[2];
  3546. fwu->read_config_buf[fwu->config_size - 1] = checksum_array[3];
  3547. retval = fwu_enter_flash_prog();
  3548. if (retval < 0)
  3549. return retval;
  3550. fwu->config_area = UI_CONFIG_AREA;
  3551. fwu->config_data = fwu->read_config_buf;
  3552. fwu->config_block_count = fwu->config_size / fwu->block_size;
  3553. retval = fwu_erase_configuration();
  3554. if (retval < 0)
  3555. return retval;
  3556. retval = fwu_write_configuration();
  3557. if (retval < 0)
  3558. return retval;
  3559. return 0;
  3560. }
  3561. #endif
  3562. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  3563. static int fwu_start_write_guest_code(void)
  3564. {
  3565. int retval;
  3566. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3567. retval = fwu_parse_image_info();
  3568. if (retval < 0)
  3569. return -EINVAL;
  3570. if (!fwu->has_guest_code) {
  3571. dev_err(rmi4_data->pdev->dev.parent,
  3572. "%s: Guest code not supported\n",
  3573. __func__);
  3574. return -EINVAL;
  3575. }
  3576. if (!fwu->img.contains_guest_code) {
  3577. dev_err(rmi4_data->pdev->dev.parent,
  3578. "%s: No guest code in firmware image\n",
  3579. __func__);
  3580. return -EINVAL;
  3581. }
  3582. if (rmi4_data->sensor_sleep) {
  3583. dev_err(rmi4_data->pdev->dev.parent,
  3584. "%s: Sensor sleeping\n",
  3585. __func__);
  3586. return -ENODEV;
  3587. }
  3588. rmi4_data->stay_awake = true;
  3589. mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
  3590. pr_notice("%s: Start of write guest code process\n", __func__);
  3591. retval = fwu_enter_flash_prog();
  3592. if (retval < 0)
  3593. goto exit;
  3594. retval = fwu_check_guest_code_size();
  3595. if (retval < 0)
  3596. goto exit;
  3597. retval = fwu_erase_guest_code();
  3598. if (retval < 0)
  3599. goto exit;
  3600. retval = fwu_write_guest_code();
  3601. if (retval < 0)
  3602. goto exit;
  3603. pr_notice("%s: Guest code programmed\n", __func__);
  3604. exit:
  3605. rmi4_data->reset_device(rmi4_data, false);
  3606. pr_notice("%s: End of write guest code process\n", __func__);
  3607. mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
  3608. rmi4_data->stay_awake = false;
  3609. return retval;
  3610. }
  3611. static int fwu_start_write_config(void)
  3612. {
  3613. int retval;
  3614. unsigned short config_area;
  3615. unsigned int device_fw_id;
  3616. unsigned int image_fw_id;
  3617. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3618. retval = fwu_parse_image_info();
  3619. if (retval < 0)
  3620. return -EINVAL;
  3621. switch (fwu->config_area) {
  3622. case UI_CONFIG_AREA:
  3623. device_fw_id = rmi4_data->firmware_id;
  3624. retval = fwu_get_image_firmware_id(&image_fw_id);
  3625. if (retval < 0)
  3626. return retval;
  3627. if (device_fw_id != image_fw_id) {
  3628. dev_err(rmi4_data->pdev->dev.parent,
  3629. "%s: Device and image firmware IDs don't match\n",
  3630. __func__);
  3631. return -EINVAL;
  3632. }
  3633. retval = fwu_check_ui_configuration_size();
  3634. if (retval < 0)
  3635. return retval;
  3636. break;
  3637. case DP_CONFIG_AREA:
  3638. if (!fwu->flash_properties.has_disp_config) {
  3639. dev_err(rmi4_data->pdev->dev.parent,
  3640. "%s: Display configuration not supported\n",
  3641. __func__);
  3642. return -EINVAL;
  3643. }
  3644. if (!fwu->img.contains_disp_config) {
  3645. dev_err(rmi4_data->pdev->dev.parent,
  3646. "%s: No display configuration in firmware image\n",
  3647. __func__);
  3648. return -EINVAL;
  3649. }
  3650. retval = fwu_check_dp_configuration_size();
  3651. if (retval < 0)
  3652. return retval;
  3653. break;
  3654. case PM_CONFIG_AREA:
  3655. if (!fwu->flash_properties.has_pm_config) {
  3656. dev_err(rmi4_data->pdev->dev.parent,
  3657. "%s: Permanent configuration not supported\n",
  3658. __func__);
  3659. return -EINVAL;
  3660. }
  3661. if (!fwu->img.contains_perm_config) {
  3662. dev_err(rmi4_data->pdev->dev.parent,
  3663. "%s: No permanent configuration in firmware image\n",
  3664. __func__);
  3665. return -EINVAL;
  3666. }
  3667. retval = fwu_check_pm_configuration_size();
  3668. if (retval < 0)
  3669. return retval;
  3670. break;
  3671. default:
  3672. dev_err(rmi4_data->pdev->dev.parent,
  3673. "%s: Configuration not supported\n",
  3674. __func__);
  3675. return -EINVAL;
  3676. }
  3677. if (rmi4_data->sensor_sleep) {
  3678. dev_err(rmi4_data->pdev->dev.parent,
  3679. "%s: Sensor sleeping\n",
  3680. __func__);
  3681. return -ENODEV;
  3682. }
  3683. rmi4_data->stay_awake = true;
  3684. mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
  3685. pr_notice("%s: Start of write config process\n", __func__);
  3686. config_area = fwu->config_area;
  3687. retval = fwu_enter_flash_prog();
  3688. if (retval < 0)
  3689. goto exit;
  3690. fwu->config_area = config_area;
  3691. if (fwu->config_area != PM_CONFIG_AREA) {
  3692. retval = fwu_erase_configuration();
  3693. if (retval < 0) {
  3694. dev_err(rmi4_data->pdev->dev.parent,
  3695. "%s: Failed to erase config\n",
  3696. __func__);
  3697. goto exit;
  3698. }
  3699. }
  3700. switch (fwu->config_area) {
  3701. case UI_CONFIG_AREA:
  3702. retval = fwu_write_ui_configuration();
  3703. if (retval < 0)
  3704. goto exit;
  3705. break;
  3706. case DP_CONFIG_AREA:
  3707. retval = fwu_write_dp_configuration();
  3708. if (retval < 0)
  3709. goto exit;
  3710. break;
  3711. case PM_CONFIG_AREA:
  3712. retval = fwu_write_pm_configuration();
  3713. if (retval < 0)
  3714. goto exit;
  3715. break;
  3716. }
  3717. pr_notice("%s: Config written\n", __func__);
  3718. exit:
  3719. switch (fwu->config_area) {
  3720. case UI_CONFIG_AREA:
  3721. rmi4_data->reset_device(rmi4_data, true);
  3722. break;
  3723. case DP_CONFIG_AREA:
  3724. case PM_CONFIG_AREA:
  3725. rmi4_data->reset_device(rmi4_data, false);
  3726. break;
  3727. }
  3728. pr_notice("%s: End of write config process\n", __func__);
  3729. mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
  3730. rmi4_data->stay_awake = false;
  3731. return retval;
  3732. }
  3733. #endif
  3734. static int fwu_start_reflash(void)
  3735. {
  3736. int retval = 0;
  3737. enum flash_area flash_area;
  3738. bool do_rebuild = false;
  3739. const struct firmware *fw_entry = NULL;
  3740. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3741. if (rmi4_data->sensor_sleep) {
  3742. dev_err(rmi4_data->pdev->dev.parent,
  3743. "%s: Sensor sleeping\n",
  3744. __func__);
  3745. return -ENODEV;
  3746. }
  3747. rmi4_data->stay_awake = true;
  3748. mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
  3749. pr_notice("%s: Start of reflash process\n", __func__);
  3750. if (fwu->image == NULL) {
  3751. retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
  3752. FW_IMAGE_NAME, sizeof(FW_IMAGE_NAME),
  3753. sizeof(FW_IMAGE_NAME));
  3754. if (retval < 0) {
  3755. dev_err(rmi4_data->pdev->dev.parent,
  3756. "%s: Failed to copy image file name\n",
  3757. __func__);
  3758. goto exit;
  3759. }
  3760. dev_dbg(rmi4_data->pdev->dev.parent,
  3761. "%s: Requesting firmware image %s\n",
  3762. __func__, fwu->image_name);
  3763. retval = request_firmware(&fw_entry, fwu->image_name,
  3764. rmi4_data->pdev->dev.parent);
  3765. if (retval != 0) {
  3766. dev_err(rmi4_data->pdev->dev.parent,
  3767. "%s: Firmware image %s not available\n",
  3768. __func__, fwu->image_name);
  3769. retval = -EINVAL;
  3770. goto exit;
  3771. }
  3772. dev_dbg(rmi4_data->pdev->dev.parent,
  3773. "%s: Firmware image size = %d\n",
  3774. __func__, (unsigned int)fw_entry->size);
  3775. fwu->image = fw_entry->data;
  3776. }
  3777. retval = fwu_parse_image_info();
  3778. if (retval < 0)
  3779. goto exit;
  3780. if (fwu->blkcount.total_count != fwu->img.blkcount.total_count) {
  3781. dev_err(rmi4_data->pdev->dev.parent,
  3782. "%s: Flash size mismatch\n",
  3783. __func__);
  3784. retval = -EINVAL;
  3785. goto exit;
  3786. }
  3787. if (fwu->bl_version != fwu->img.bl_version) {
  3788. dev_err(rmi4_data->pdev->dev.parent,
  3789. "%s: Bootloader version mismatch\n",
  3790. __func__);
  3791. retval = -EINVAL;
  3792. goto exit;
  3793. }
  3794. retval = fwu_read_flash_status();
  3795. if (retval < 0)
  3796. goto exit;
  3797. if (fwu->in_bl_mode) {
  3798. fwu->bl_mode_device = true;
  3799. dev_info(rmi4_data->pdev->dev.parent,
  3800. "%s: Device in bootloader mode\n",
  3801. __func__);
  3802. } else {
  3803. fwu->bl_mode_device = false;
  3804. }
  3805. flash_area = fwu_go_nogo();
  3806. if (flash_area != NONE) {
  3807. retval = fwu_enter_flash_prog();
  3808. if (retval < 0) {
  3809. rmi4_data->reset_device(rmi4_data, false);
  3810. goto exit;
  3811. }
  3812. }
  3813. #ifdef F51_DISCRETE_FORCE
  3814. if (flash_area != NONE && !fwu->bl_mode_device) {
  3815. fwu->config_size = fwu->block_size * fwu->blkcount.ui_config;
  3816. fwu->config_area = UI_CONFIG_AREA;
  3817. retval = fwu_allocate_read_config_buf(fwu->config_size);
  3818. if (retval < 0) {
  3819. rmi4_data->reset_device(rmi4_data, false);
  3820. goto exit;
  3821. }
  3822. retval = fwu_read_f34_blocks(fwu->blkcount.ui_config,
  3823. CMD_READ_CONFIG);
  3824. if (retval < 0) {
  3825. rmi4_data->reset_device(rmi4_data, false);
  3826. goto exit;
  3827. }
  3828. retval = secure_memcpy(fwu->cal_data, fwu->cal_data_buf_size,
  3829. &fwu->read_config_buf[fwu->cal_data_off],
  3830. fwu->cal_data_size, fwu->cal_data_size);
  3831. if (retval < 0) {
  3832. dev_err(rmi4_data->pdev->dev.parent,
  3833. "%s: Failed to save calibration data\n",
  3834. __func__);
  3835. rmi4_data->reset_device(rmi4_data, false);
  3836. goto exit;
  3837. }
  3838. }
  3839. #endif
  3840. switch (flash_area) {
  3841. case UI_FIRMWARE:
  3842. do_rebuild = true;
  3843. retval = fwu_do_reflash();
  3844. #ifdef F51_DISCRETE_FORCE
  3845. if (retval < 0)
  3846. break;
  3847. if (fwu->has_utility_param || fwu->img.contains_utility_param)
  3848. break;
  3849. rmi4_data->reset_device(rmi4_data, false);
  3850. if (fwu->bl_mode_device || fwu->in_bl_mode) {
  3851. dev_info(rmi4_data->pdev->dev.parent,
  3852. "%s: Device in bootloader mode, skipping calibration data restoration\n",
  3853. __func__);
  3854. break;
  3855. }
  3856. retval = fwu_do_restore_f51_cal_data();
  3857. #endif
  3858. break;
  3859. case UI_CONFIG:
  3860. do_rebuild = true;
  3861. retval = fwu_check_ui_configuration_size();
  3862. if (retval < 0)
  3863. break;
  3864. fwu->config_area = UI_CONFIG_AREA;
  3865. retval = fwu_erase_configuration();
  3866. if (retval < 0)
  3867. break;
  3868. retval = fwu_write_ui_configuration();
  3869. #ifdef F51_DISCRETE_FORCE
  3870. if (retval < 0)
  3871. break;
  3872. if (fwu->has_utility_param)
  3873. break;
  3874. retval = fwu_do_restore_f51_cal_data();
  3875. #endif
  3876. break;
  3877. case NONE:
  3878. default:
  3879. break;
  3880. }
  3881. if (retval < 0) {
  3882. do_rebuild = false;
  3883. rmi4_data->reset_device(rmi4_data, false);
  3884. dev_err(rmi4_data->pdev->dev.parent,
  3885. "%s: Failed to do reflash\n",
  3886. __func__);
  3887. goto exit;
  3888. }
  3889. if (fwu->do_lockdown && (fwu->img.lockdown.data != NULL)) {
  3890. switch (fwu->bl_version) {
  3891. case BL_V5:
  3892. case BL_V6:
  3893. retval = fwu_do_lockdown_v5v6();
  3894. if (retval < 0) {
  3895. dev_err(rmi4_data->pdev->dev.parent,
  3896. "%s: Failed to do lockdown\n",
  3897. __func__);
  3898. }
  3899. rmi4_data->reset_device(rmi4_data, false);
  3900. break;
  3901. case BL_V7:
  3902. case BL_V8:
  3903. retval = fwu_do_lockdown_v7();
  3904. if (retval < 0) {
  3905. dev_err(rmi4_data->pdev->dev.parent,
  3906. "%s: Failed to do lockdown\n",
  3907. __func__);
  3908. }
  3909. rmi4_data->reset_device(rmi4_data, false);
  3910. break;
  3911. default:
  3912. break;
  3913. }
  3914. }
  3915. exit:
  3916. if (fw_entry)
  3917. release_firmware(fw_entry);
  3918. if (do_rebuild)
  3919. rmi4_data->reset_device(rmi4_data, true);
  3920. pr_notice("%s: End of reflash process\n", __func__);
  3921. mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
  3922. rmi4_data->stay_awake = false;
  3923. return retval;
  3924. }
  3925. static int fwu_recovery_check_status(void)
  3926. {
  3927. int retval;
  3928. unsigned char data_base;
  3929. unsigned char status;
  3930. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3931. data_base = fwu->f35_fd.data_base_addr;
  3932. retval = synaptics_rmi4_reg_read(rmi4_data,
  3933. data_base + F35_ERROR_CODE_OFFSET,
  3934. &status,
  3935. 1);
  3936. if (retval < 0) {
  3937. dev_err(rmi4_data->pdev->dev.parent,
  3938. "%s: Failed to read status\n",
  3939. __func__);
  3940. return retval;
  3941. }
  3942. status = status & MASK_5BIT;
  3943. if (status != 0x00) {
  3944. dev_err(rmi4_data->pdev->dev.parent,
  3945. "%s: Recovery mode status = %d\n",
  3946. __func__, status);
  3947. return -EINVAL;
  3948. }
  3949. return 0;
  3950. }
  3951. static int fwu_recovery_erase_completion(void)
  3952. {
  3953. int retval;
  3954. unsigned char data_base;
  3955. unsigned char command;
  3956. unsigned char status;
  3957. unsigned int timeout = F35_ERASE_ALL_WAIT_MS / 20;
  3958. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  3959. data_base = fwu->f35_fd.data_base_addr;
  3960. do {
  3961. command = 0x01;
  3962. retval = synaptics_rmi4_reg_write(rmi4_data,
  3963. fwu->f35_fd.cmd_base_addr,
  3964. &command,
  3965. sizeof(command));
  3966. if (retval < 0) {
  3967. dev_err(rmi4_data->pdev->dev.parent,
  3968. "%s: Failed to issue command\n",
  3969. __func__);
  3970. return retval;
  3971. }
  3972. do {
  3973. retval = synaptics_rmi4_reg_read(rmi4_data,
  3974. fwu->f35_fd.cmd_base_addr,
  3975. &command,
  3976. sizeof(command));
  3977. if (retval < 0) {
  3978. dev_err(rmi4_data->pdev->dev.parent,
  3979. "%s: Failed to read command status\n",
  3980. __func__);
  3981. return retval;
  3982. }
  3983. if ((command & 0x01) == 0x00)
  3984. break;
  3985. msleep(20);
  3986. timeout--;
  3987. } while (timeout > 0);
  3988. if (timeout == 0)
  3989. goto exit;
  3990. retval = synaptics_rmi4_reg_read(rmi4_data,
  3991. data_base + F35_FLASH_STATUS_OFFSET,
  3992. &status,
  3993. sizeof(status));
  3994. if (retval < 0) {
  3995. dev_err(rmi4_data->pdev->dev.parent,
  3996. "%s: Failed to read flash status\n",
  3997. __func__);
  3998. return retval;
  3999. }
  4000. if ((status & 0x01) == 0x00)
  4001. break;
  4002. msleep(20);
  4003. timeout--;
  4004. } while (timeout > 0);
  4005. exit:
  4006. if (timeout == 0) {
  4007. dev_err(rmi4_data->pdev->dev.parent,
  4008. "%s: Timed out waiting for flash erase completion\n",
  4009. __func__);
  4010. return -ETIMEDOUT;
  4011. }
  4012. return 0;
  4013. }
  4014. static int fwu_recovery_erase_all(void)
  4015. {
  4016. int retval;
  4017. unsigned char ctrl_base;
  4018. unsigned char command = CMD_F35_ERASE_ALL;
  4019. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4020. ctrl_base = fwu->f35_fd.ctrl_base_addr;
  4021. retval = synaptics_rmi4_reg_write(rmi4_data,
  4022. ctrl_base + F35_CHUNK_COMMAND_OFFSET,
  4023. &command,
  4024. sizeof(command));
  4025. if (retval < 0) {
  4026. dev_err(rmi4_data->pdev->dev.parent,
  4027. "%s: Failed to issue erase all command\n",
  4028. __func__);
  4029. return retval;
  4030. }
  4031. if (fwu->f35_fd.cmd_base_addr) {
  4032. retval = fwu_recovery_erase_completion();
  4033. if (retval < 0)
  4034. return retval;
  4035. } else {
  4036. msleep(F35_ERASE_ALL_WAIT_MS);
  4037. }
  4038. retval = fwu_recovery_check_status();
  4039. if (retval < 0)
  4040. return retval;
  4041. return 0;
  4042. }
  4043. static int fwu_recovery_write_chunk(void)
  4044. {
  4045. int retval;
  4046. unsigned char ctrl_base;
  4047. unsigned char chunk_number[] = {0, 0};
  4048. unsigned char chunk_spare;
  4049. unsigned char chunk_size;
  4050. unsigned char buf[F35_CHUNK_SIZE + 1];
  4051. unsigned short chunk;
  4052. unsigned short chunk_total;
  4053. unsigned short bytes_written = 0;
  4054. unsigned char *chunk_ptr = (unsigned char *)fwu->image;
  4055. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4056. ctrl_base = fwu->f35_fd.ctrl_base_addr;
  4057. retval = synaptics_rmi4_reg_write(rmi4_data,
  4058. ctrl_base + F35_CHUNK_NUM_LSB_OFFSET,
  4059. chunk_number,
  4060. sizeof(chunk_number));
  4061. if (retval < 0) {
  4062. dev_err(rmi4_data->pdev->dev.parent,
  4063. "%s: Failed to write chunk number\n",
  4064. __func__);
  4065. return retval;
  4066. }
  4067. buf[sizeof(buf) - 1] = CMD_F35_WRITE_CHUNK;
  4068. chunk_total = fwu->image_size / F35_CHUNK_SIZE;
  4069. chunk_spare = fwu->image_size % F35_CHUNK_SIZE;
  4070. if (chunk_spare)
  4071. chunk_total++;
  4072. for (chunk = 0; chunk < chunk_total; chunk++) {
  4073. if (chunk_spare && chunk == chunk_total - 1)
  4074. chunk_size = chunk_spare;
  4075. else
  4076. chunk_size = F35_CHUNK_SIZE;
  4077. memset(buf, 0x00, F35_CHUNK_SIZE);
  4078. secure_memcpy(buf, sizeof(buf), chunk_ptr,
  4079. fwu->image_size - bytes_written,
  4080. chunk_size);
  4081. retval = synaptics_rmi4_reg_write(rmi4_data,
  4082. ctrl_base + F35_CHUNK_DATA_OFFSET,
  4083. buf,
  4084. sizeof(buf));
  4085. if (retval < 0) {
  4086. dev_err(rmi4_data->pdev->dev.parent,
  4087. "%s: Failed to write chunk data (chunk %d)\n",
  4088. __func__, chunk);
  4089. return retval;
  4090. }
  4091. chunk_ptr += chunk_size;
  4092. bytes_written += chunk_size;
  4093. }
  4094. retval = fwu_recovery_check_status();
  4095. if (retval < 0) {
  4096. dev_err(rmi4_data->pdev->dev.parent,
  4097. "%s: Failed to write chunk data\n",
  4098. __func__);
  4099. return retval;
  4100. }
  4101. return 0;
  4102. }
  4103. static int fwu_recovery_reset(void)
  4104. {
  4105. int retval;
  4106. unsigned char ctrl_base;
  4107. unsigned char command = CMD_F35_RESET;
  4108. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4109. ctrl_base = fwu->f35_fd.ctrl_base_addr;
  4110. retval = synaptics_rmi4_reg_write(rmi4_data,
  4111. ctrl_base + F35_CHUNK_COMMAND_OFFSET,
  4112. &command,
  4113. sizeof(command));
  4114. if (retval < 0) {
  4115. dev_err(rmi4_data->pdev->dev.parent,
  4116. "%s: Failed to issue reset command\n",
  4117. __func__);
  4118. return retval;
  4119. }
  4120. msleep(F35_RESET_WAIT_MS);
  4121. return 0;
  4122. }
  4123. static int fwu_start_recovery(void)
  4124. {
  4125. int retval;
  4126. const struct firmware *fw_entry = NULL;
  4127. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4128. if (rmi4_data->sensor_sleep) {
  4129. dev_err(rmi4_data->pdev->dev.parent,
  4130. "%s: Sensor sleeping\n",
  4131. __func__);
  4132. return -ENODEV;
  4133. }
  4134. rmi4_data->stay_awake = true;
  4135. mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
  4136. pr_notice("%s: Start of recovery process\n", __func__);
  4137. if (fwu->image == NULL) {
  4138. retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
  4139. FW_IHEX_NAME, sizeof(FW_IHEX_NAME),
  4140. sizeof(FW_IHEX_NAME));
  4141. if (retval < 0) {
  4142. dev_err(rmi4_data->pdev->dev.parent,
  4143. "%s: Failed to copy ihex file name\n",
  4144. __func__);
  4145. goto exit;
  4146. }
  4147. dev_dbg(rmi4_data->pdev->dev.parent,
  4148. "%s: Requesting firmware ihex %s\n",
  4149. __func__, fwu->image_name);
  4150. retval = request_firmware(&fw_entry, fwu->image_name,
  4151. rmi4_data->pdev->dev.parent);
  4152. if (retval != 0) {
  4153. dev_err(rmi4_data->pdev->dev.parent,
  4154. "%s: Firmware ihex %s not available\n",
  4155. __func__, fwu->image_name);
  4156. retval = -EINVAL;
  4157. goto exit;
  4158. }
  4159. dev_dbg(rmi4_data->pdev->dev.parent,
  4160. "%s: Firmware image size = %d\n",
  4161. __func__, (unsigned int)fw_entry->size);
  4162. fwu->image = fw_entry->data;
  4163. fwu->image_size = fw_entry->size;
  4164. }
  4165. retval = rmi4_data->irq_enable(rmi4_data, false, false);
  4166. if (retval < 0) {
  4167. dev_err(rmi4_data->pdev->dev.parent,
  4168. "%s: Failed to disable interrupt\n",
  4169. __func__);
  4170. goto exit;
  4171. }
  4172. retval = fwu_recovery_erase_all();
  4173. if (retval < 0) {
  4174. dev_err(rmi4_data->pdev->dev.parent,
  4175. "%s: Failed to do erase all in recovery mode\n",
  4176. __func__);
  4177. goto exit;
  4178. }
  4179. pr_notice("%s: External flash erased\n", __func__);
  4180. retval = fwu_recovery_write_chunk();
  4181. if (retval < 0) {
  4182. dev_err(rmi4_data->pdev->dev.parent,
  4183. "%s: Failed to write chunk data in recovery mode\n",
  4184. __func__);
  4185. goto exit;
  4186. }
  4187. pr_notice("%s: Chunk data programmed\n", __func__);
  4188. retval = fwu_recovery_reset();
  4189. if (retval < 0) {
  4190. dev_err(rmi4_data->pdev->dev.parent,
  4191. "%s: Failed to reset device in recovery mode\n",
  4192. __func__);
  4193. goto exit;
  4194. }
  4195. pr_notice("%s: Recovery mode reset issued\n", __func__);
  4196. rmi4_data->reset_device(rmi4_data, true);
  4197. retval = 0;
  4198. exit:
  4199. if (fw_entry)
  4200. release_firmware(fw_entry);
  4201. pr_notice("%s: End of recovery process\n", __func__);
  4202. mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
  4203. rmi4_data->stay_awake = false;
  4204. return retval;
  4205. }
  4206. int synaptics_fw_updater(const unsigned char *fw_data)
  4207. {
  4208. int retval;
  4209. if (!fwu)
  4210. return -ENODEV;
  4211. if (!fwu->initialized)
  4212. return -ENODEV;
  4213. if (fwu->in_ub_mode) {
  4214. fwu->image = NULL;
  4215. retval = fwu_start_recovery();
  4216. if (retval < 0)
  4217. return retval;
  4218. }
  4219. fwu->image = fw_data;
  4220. retval = fwu_start_reflash();
  4221. fwu->image = NULL;
  4222. return retval;
  4223. }
  4224. EXPORT_SYMBOL(synaptics_fw_updater);
  4225. #ifdef DO_STARTUP_FW_UPDATE
  4226. static void fwu_startup_fw_update_work(struct work_struct *work)
  4227. {
  4228. static unsigned char do_once = 1;
  4229. #ifdef WAIT_FOR_FB_READY
  4230. unsigned int timeout;
  4231. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4232. #endif
  4233. if (!do_once)
  4234. return;
  4235. do_once = 0;
  4236. #ifdef WAIT_FOR_FB_READY
  4237. timeout = FB_READY_TIMEOUT_S * 1000 / FB_READY_WAIT_MS + 1;
  4238. while (!rmi4_data->fb_ready) {
  4239. msleep(FB_READY_WAIT_MS);
  4240. timeout--;
  4241. if (timeout == 0) {
  4242. dev_err(rmi4_data->pdev->dev.parent,
  4243. "%s: Timed out waiting for FB ready\n",
  4244. __func__);
  4245. return;
  4246. }
  4247. }
  4248. #endif
  4249. synaptics_fw_updater(NULL);
  4250. }
  4251. #endif
  4252. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  4253. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  4254. struct kobject *kobj, struct bin_attribute *attributes,
  4255. char *buf, loff_t pos, size_t count)
  4256. {
  4257. int retval;
  4258. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4259. if (!mutex_trylock(&fwu_sysfs_mutex))
  4260. return -EBUSY;
  4261. if (count < fwu->config_size) {
  4262. dev_err(rmi4_data->pdev->dev.parent,
  4263. "%s: Not enough space (%d bytes) in buffer\n",
  4264. __func__, (unsigned int)count);
  4265. retval = -EINVAL;
  4266. goto exit;
  4267. }
  4268. retval = secure_memcpy(buf, count, fwu->read_config_buf,
  4269. fwu->read_config_buf_size, fwu->config_size);
  4270. if (retval < 0) {
  4271. dev_err(rmi4_data->pdev->dev.parent,
  4272. "%s: Failed to copy config data\n",
  4273. __func__);
  4274. goto exit;
  4275. } else {
  4276. retval = fwu->config_size;
  4277. }
  4278. exit:
  4279. mutex_unlock(&fwu_sysfs_mutex);
  4280. return retval;
  4281. }
  4282. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  4283. struct kobject *kobj, struct bin_attribute *attributes,
  4284. char *buf, loff_t pos, size_t count)
  4285. {
  4286. int retval;
  4287. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4288. if (!mutex_trylock(&fwu_sysfs_mutex))
  4289. return -EBUSY;
  4290. retval = secure_memcpy(&fwu->ext_data_source[fwu->data_pos],
  4291. fwu->image_size - fwu->data_pos, buf, count, count);
  4292. if (retval < 0) {
  4293. dev_err(rmi4_data->pdev->dev.parent,
  4294. "%s: Failed to copy image data\n",
  4295. __func__);
  4296. goto exit;
  4297. } else {
  4298. retval = count;
  4299. }
  4300. fwu->data_pos += count;
  4301. exit:
  4302. mutex_unlock(&fwu_sysfs_mutex);
  4303. return retval;
  4304. }
  4305. static ssize_t fwu_sysfs_do_recovery_store(struct device *dev,
  4306. struct device_attribute *attr, const char *buf, size_t count)
  4307. {
  4308. int retval;
  4309. unsigned int input;
  4310. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4311. if (!mutex_trylock(&fwu_sysfs_mutex))
  4312. return -EBUSY;
  4313. if (kstrtouint(buf, 10, &input) != 1) {
  4314. retval = -EINVAL;
  4315. goto exit;
  4316. }
  4317. if (!fwu->in_ub_mode) {
  4318. dev_err(rmi4_data->pdev->dev.parent,
  4319. "%s: Not in microbootloader mode\n",
  4320. __func__);
  4321. retval = -EINVAL;
  4322. goto exit;
  4323. }
  4324. if (!fwu->ext_data_source) {
  4325. retval = -EINVAL;
  4326. goto exit;
  4327. } else {
  4328. fwu->image = fwu->ext_data_source;
  4329. }
  4330. retval = fwu_start_recovery();
  4331. if (retval < 0) {
  4332. dev_err(rmi4_data->pdev->dev.parent,
  4333. "%s: Failed to do recovery\n",
  4334. __func__);
  4335. goto exit;
  4336. }
  4337. retval = count;
  4338. exit:
  4339. kfree(fwu->ext_data_source);
  4340. fwu->ext_data_source = NULL;
  4341. fwu->image = NULL;
  4342. mutex_unlock(&fwu_sysfs_mutex);
  4343. return retval;
  4344. }
  4345. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  4346. struct device_attribute *attr, const char *buf, size_t count)
  4347. {
  4348. int retval;
  4349. unsigned int input;
  4350. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4351. if (!mutex_trylock(&fwu_sysfs_mutex))
  4352. return -EBUSY;
  4353. if (kstrtouint(buf, 10, &input) != 1) {
  4354. retval = -EINVAL;
  4355. goto exit;
  4356. }
  4357. if (fwu->in_ub_mode) {
  4358. dev_err(rmi4_data->pdev->dev.parent,
  4359. "%s: In microbootloader mode\n",
  4360. __func__);
  4361. retval = -EINVAL;
  4362. goto exit;
  4363. }
  4364. if (!fwu->ext_data_source) {
  4365. retval = -EINVAL;
  4366. goto exit;
  4367. } else {
  4368. fwu->image = fwu->ext_data_source;
  4369. }
  4370. if (input & LOCKDOWN) {
  4371. fwu->do_lockdown = true;
  4372. input &= ~LOCKDOWN;
  4373. }
  4374. if ((input != NORMAL) && (input != FORCE)) {
  4375. retval = -EINVAL;
  4376. goto exit;
  4377. }
  4378. if (input == FORCE)
  4379. fwu->force_update = true;
  4380. retval = synaptics_fw_updater(fwu->image);
  4381. if (retval < 0) {
  4382. dev_err(rmi4_data->pdev->dev.parent,
  4383. "%s: Failed to do reflash\n",
  4384. __func__);
  4385. goto exit;
  4386. }
  4387. retval = count;
  4388. exit:
  4389. kfree(fwu->ext_data_source);
  4390. fwu->ext_data_source = NULL;
  4391. fwu->image = NULL;
  4392. fwu->force_update = FORCE_UPDATE;
  4393. fwu->do_lockdown = DO_LOCKDOWN;
  4394. mutex_unlock(&fwu_sysfs_mutex);
  4395. return retval;
  4396. }
  4397. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  4398. struct device_attribute *attr, const char *buf, size_t count)
  4399. {
  4400. int retval;
  4401. unsigned int input;
  4402. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4403. if (!mutex_trylock(&fwu_sysfs_mutex))
  4404. return -EBUSY;
  4405. if (kstrtouint(buf, 10, &input) != 1) {
  4406. retval = -EINVAL;
  4407. goto exit;
  4408. }
  4409. if (input != 1) {
  4410. retval = -EINVAL;
  4411. goto exit;
  4412. }
  4413. if (fwu->in_ub_mode) {
  4414. dev_err(rmi4_data->pdev->dev.parent,
  4415. "%s: In microbootloader mode\n",
  4416. __func__);
  4417. retval = -EINVAL;
  4418. goto exit;
  4419. }
  4420. if (!fwu->ext_data_source) {
  4421. retval = -EINVAL;
  4422. goto exit;
  4423. } else {
  4424. fwu->image = fwu->ext_data_source;
  4425. }
  4426. retval = fwu_start_write_config();
  4427. if (retval < 0) {
  4428. dev_err(rmi4_data->pdev->dev.parent,
  4429. "%s: Failed to write config\n",
  4430. __func__);
  4431. goto exit;
  4432. }
  4433. retval = count;
  4434. exit:
  4435. kfree(fwu->ext_data_source);
  4436. fwu->ext_data_source = NULL;
  4437. fwu->image = NULL;
  4438. mutex_unlock(&fwu_sysfs_mutex);
  4439. return retval;
  4440. }
  4441. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  4442. struct device_attribute *attr, const char *buf, size_t count)
  4443. {
  4444. int retval;
  4445. unsigned int input;
  4446. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4447. if (kstrtouint(buf, 10, &input) != 1)
  4448. return -EINVAL;
  4449. if (input != 1)
  4450. return -EINVAL;
  4451. if (!mutex_trylock(&fwu_sysfs_mutex))
  4452. return -EBUSY;
  4453. if (fwu->in_ub_mode) {
  4454. dev_err(rmi4_data->pdev->dev.parent,
  4455. "%s: In microbootloader mode\n",
  4456. __func__);
  4457. retval = -EINVAL;
  4458. goto exit;
  4459. }
  4460. retval = fwu_do_read_config();
  4461. if (retval < 0) {
  4462. dev_err(rmi4_data->pdev->dev.parent,
  4463. "%s: Failed to read config\n",
  4464. __func__);
  4465. goto exit;
  4466. }
  4467. retval = count;
  4468. exit:
  4469. mutex_unlock(&fwu_sysfs_mutex);
  4470. return retval;
  4471. }
  4472. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  4473. struct device_attribute *attr, const char *buf, size_t count)
  4474. {
  4475. int retval;
  4476. unsigned long config_area;
  4477. retval = sstrtoul(buf, 10, &config_area);
  4478. if (retval)
  4479. return retval;
  4480. if (!mutex_trylock(&fwu_sysfs_mutex))
  4481. return -EBUSY;
  4482. fwu->config_area = config_area;
  4483. mutex_unlock(&fwu_sysfs_mutex);
  4484. return count;
  4485. }
  4486. static ssize_t fwu_sysfs_image_name_store(struct device *dev,
  4487. struct device_attribute *attr, const char *buf, size_t count)
  4488. {
  4489. int retval;
  4490. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4491. if (!mutex_trylock(&fwu_sysfs_mutex))
  4492. return -EBUSY;
  4493. retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
  4494. buf, count, count);
  4495. if (retval < 0) {
  4496. dev_err(rmi4_data->pdev->dev.parent,
  4497. "%s: Failed to copy image file name\n",
  4498. __func__);
  4499. } else {
  4500. retval = count;
  4501. }
  4502. mutex_unlock(&fwu_sysfs_mutex);
  4503. return retval;
  4504. }
  4505. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  4506. struct device_attribute *attr, const char *buf, size_t count)
  4507. {
  4508. int retval;
  4509. unsigned long size;
  4510. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4511. retval = sstrtoul(buf, 10, &size);
  4512. if (retval)
  4513. return retval;
  4514. if (!mutex_trylock(&fwu_sysfs_mutex))
  4515. return -EBUSY;
  4516. fwu->image_size = size;
  4517. fwu->data_pos = 0;
  4518. kfree(fwu->ext_data_source);
  4519. fwu->ext_data_source = kzalloc(fwu->image_size, GFP_KERNEL);
  4520. if (!fwu->ext_data_source) {
  4521. dev_err(rmi4_data->pdev->dev.parent,
  4522. "%s: Failed to alloc mem for image data\n",
  4523. __func__);
  4524. retval = -ENOMEM;
  4525. }
  4526. retval = count;
  4527. mutex_unlock(&fwu_sysfs_mutex);
  4528. return retval;
  4529. }
  4530. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  4531. struct device_attribute *attr, char *buf)
  4532. {
  4533. int retval;
  4534. if (!mutex_trylock(&fwu_sysfs_mutex))
  4535. return -EBUSY;
  4536. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->block_size);
  4537. mutex_unlock(&fwu_sysfs_mutex);
  4538. return retval;
  4539. }
  4540. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  4541. struct device_attribute *attr, char *buf)
  4542. {
  4543. int retval;
  4544. if (!mutex_trylock(&fwu_sysfs_mutex))
  4545. return -EBUSY;
  4546. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.ui_firmware);
  4547. mutex_unlock(&fwu_sysfs_mutex);
  4548. return retval;
  4549. }
  4550. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  4551. struct device_attribute *attr, char *buf)
  4552. {
  4553. int retval;
  4554. if (!mutex_trylock(&fwu_sysfs_mutex))
  4555. return -EBUSY;
  4556. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.ui_config);
  4557. mutex_unlock(&fwu_sysfs_mutex);
  4558. return retval;
  4559. }
  4560. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  4561. struct device_attribute *attr, char *buf)
  4562. {
  4563. int retval;
  4564. if (!mutex_trylock(&fwu_sysfs_mutex))
  4565. return -EBUSY;
  4566. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.dp_config);
  4567. mutex_unlock(&fwu_sysfs_mutex);
  4568. return retval;
  4569. }
  4570. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  4571. struct device_attribute *attr, char *buf)
  4572. {
  4573. int retval;
  4574. if (!mutex_trylock(&fwu_sysfs_mutex))
  4575. return -EBUSY;
  4576. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.pm_config);
  4577. mutex_unlock(&fwu_sysfs_mutex);
  4578. return retval;
  4579. }
  4580. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  4581. struct device_attribute *attr, char *buf)
  4582. {
  4583. int retval;
  4584. if (!mutex_trylock(&fwu_sysfs_mutex))
  4585. return -EBUSY;
  4586. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.bl_config);
  4587. mutex_unlock(&fwu_sysfs_mutex);
  4588. return retval;
  4589. }
  4590. static ssize_t fwu_sysfs_utility_parameter_block_count_show(struct device *dev,
  4591. struct device_attribute *attr, char *buf)
  4592. {
  4593. int retval;
  4594. if (!mutex_trylock(&fwu_sysfs_mutex))
  4595. return -EBUSY;
  4596. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.utility_param);
  4597. mutex_unlock(&fwu_sysfs_mutex);
  4598. return retval;
  4599. }
  4600. static ssize_t fwu_sysfs_guest_code_block_count_show(struct device *dev,
  4601. struct device_attribute *attr, char *buf)
  4602. {
  4603. int retval;
  4604. if (!mutex_trylock(&fwu_sysfs_mutex))
  4605. return -EBUSY;
  4606. retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.guest_code);
  4607. mutex_unlock(&fwu_sysfs_mutex);
  4608. return retval;
  4609. }
  4610. static ssize_t fwu_sysfs_write_guest_code_store(struct device *dev,
  4611. struct device_attribute *attr, const char *buf, size_t count)
  4612. {
  4613. int retval;
  4614. unsigned int input;
  4615. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  4616. if (!mutex_trylock(&fwu_sysfs_mutex))
  4617. return -EBUSY;
  4618. if (kstrtouint(buf, 10, &input) != 1) {
  4619. retval = -EINVAL;
  4620. goto exit;
  4621. }
  4622. if (input != 1) {
  4623. retval = -EINVAL;
  4624. goto exit;
  4625. }
  4626. if (fwu->in_ub_mode) {
  4627. dev_err(rmi4_data->pdev->dev.parent,
  4628. "%s: In microbootloader mode\n",
  4629. __func__);
  4630. retval = -EINVAL;
  4631. goto exit;
  4632. }
  4633. if (!fwu->ext_data_source) {
  4634. retval = -EINVAL;
  4635. goto exit;
  4636. } else {
  4637. fwu->image = fwu->ext_data_source;
  4638. }
  4639. retval = fwu_start_write_guest_code();
  4640. if (retval < 0) {
  4641. dev_err(rmi4_data->pdev->dev.parent,
  4642. "%s: Failed to write guest code\n",
  4643. __func__);
  4644. goto exit;
  4645. }
  4646. retval = count;
  4647. exit:
  4648. kfree(fwu->ext_data_source);
  4649. fwu->ext_data_source = NULL;
  4650. fwu->image = NULL;
  4651. mutex_unlock(&fwu_sysfs_mutex);
  4652. return retval;
  4653. }
  4654. #ifdef SYNA_TDDI
  4655. static ssize_t fwu_sysfs_read_lockdown_code_show(struct device *dev,
  4656. struct device_attribute *attr, char *buf)
  4657. {
  4658. unsigned short lockdown_data_size;
  4659. unsigned char *lockdown_data;
  4660. char ld_val[2];
  4661. int retval = 0;
  4662. int i = 0;
  4663. if (!mutex_trylock(&fwu_sysfs_mutex))
  4664. return -EBUSY;
  4665. lockdown_data_size = fwu->blkcount.tddi_lockdown_data * fwu->block_size;
  4666. lockdown_data = kzalloc(lockdown_data_size, GFP_KERNEL);
  4667. if (!lockdown_data) {
  4668. mutex_unlock(&fwu_sysfs_mutex);
  4669. return -ENOMEM;
  4670. }
  4671. if (get_tddi_lockdown_data(lockdown_data, lockdown_data_size) < 0) {
  4672. kfree(lockdown_data);
  4673. mutex_unlock(&fwu_sysfs_mutex);
  4674. return -EINVAL;
  4675. }
  4676. for (i = 0; i < lockdown_data_size; i++) {
  4677. retval += snprintf(ld_val, PAGE_SIZE, "%02x",
  4678. *(lockdown_data + i));
  4679. strlcat(buf, ld_val, lockdown_data_size);
  4680. }
  4681. *(buf + retval) = '\n';
  4682. kfree(lockdown_data);
  4683. mutex_unlock(&fwu_sysfs_mutex);
  4684. return retval + 1;
  4685. }
  4686. static ssize_t fwu_sysfs_write_lockdown_code_store(struct device *dev,
  4687. struct device_attribute *attr, const char *buf, size_t count)
  4688. {
  4689. unsigned short lockdown_data_size = (count - 1) / 2;
  4690. unsigned char *lockdown_data;
  4691. unsigned char temp[2];
  4692. int ld_val;
  4693. int i = 0;
  4694. for (i = 0; i < (count - 1); i++) {
  4695. if (((*buf >= '0') && (*buf <= '9')) ||
  4696. (('a' < *buf) && (*buf > 'f')) ||
  4697. (('A' < *buf) && (*buf > 'F')))
  4698. continue;
  4699. else
  4700. return -EINVAL;
  4701. }
  4702. if (count % 2 != 1)
  4703. return -EINVAL;
  4704. lockdown_data = kzalloc(lockdown_data_size, GFP_KERNEL);
  4705. if (!lockdown_data)
  4706. return -ENOMEM;
  4707. for (i = 0; i < lockdown_data_size; i++) {
  4708. memcpy(temp, (buf + 2 * i), sizeof(temp));
  4709. if (kstrtoint(temp, 16, &ld_val) == 1)
  4710. *(lockdown_data + i) = ld_val & 0xff;
  4711. }
  4712. if (!mutex_trylock(&fwu_sysfs_mutex))
  4713. return -EBUSY;
  4714. if (set_tddi_lockdown_data(lockdown_data, lockdown_data_size) < 0) {
  4715. kfree(lockdown_data);
  4716. mutex_unlock(&fwu_sysfs_mutex);
  4717. return -EINVAL;
  4718. }
  4719. kfree(lockdown_data);
  4720. mutex_unlock(&fwu_sysfs_mutex);
  4721. return count;
  4722. }
  4723. #endif
  4724. #endif
  4725. static void synaptics_rmi4_fwu_attn(struct synaptics_rmi4_data *rmi4_data,
  4726. unsigned char intr_mask)
  4727. {
  4728. if (!fwu)
  4729. return;
  4730. if (fwu->intr_mask & intr_mask)
  4731. fwu_read_flash_status();
  4732. return;
  4733. }
  4734. static int synaptics_rmi4_fwu_init(struct synaptics_rmi4_data *rmi4_data)
  4735. {
  4736. int retval;
  4737. unsigned char attr_count;
  4738. struct pdt_properties pdt_props;
  4739. if (fwu) {
  4740. dev_dbg(rmi4_data->pdev->dev.parent,
  4741. "%s: Handle already exists\n",
  4742. __func__);
  4743. return 0;
  4744. }
  4745. fwu = kzalloc(sizeof(*fwu), GFP_KERNEL);
  4746. if (!fwu) {
  4747. dev_err(rmi4_data->pdev->dev.parent,
  4748. "%s: Failed to alloc mem for fwu\n",
  4749. __func__);
  4750. retval = -ENOMEM;
  4751. goto exit;
  4752. }
  4753. fwu->image_name = kzalloc(MAX_IMAGE_NAME_LEN, GFP_KERNEL);
  4754. if (!fwu->image_name) {
  4755. dev_err(rmi4_data->pdev->dev.parent,
  4756. "%s: Failed to alloc mem for image name\n",
  4757. __func__);
  4758. retval = -ENOMEM;
  4759. goto exit_free_fwu;
  4760. }
  4761. fwu->rmi4_data = rmi4_data;
  4762. retval = synaptics_rmi4_reg_read(rmi4_data,
  4763. PDT_PROPS,
  4764. pdt_props.data,
  4765. sizeof(pdt_props.data));
  4766. if (retval < 0) {
  4767. dev_dbg(rmi4_data->pdev->dev.parent,
  4768. "%s: Failed to read PDT properties, assuming 0x00\n",
  4769. __func__);
  4770. } else if (pdt_props.has_bsr) {
  4771. dev_err(rmi4_data->pdev->dev.parent,
  4772. "%s: Reflash for LTS not currently supported\n",
  4773. __func__);
  4774. retval = -ENODEV;
  4775. goto exit_free_mem;
  4776. }
  4777. retval = fwu_scan_pdt();
  4778. if (retval < 0)
  4779. goto exit_free_mem;
  4780. if (!fwu->in_ub_mode) {
  4781. retval = fwu_read_f34_queries();
  4782. if (retval < 0)
  4783. goto exit_free_mem;
  4784. retval = fwu_get_device_config_id();
  4785. if (retval < 0) {
  4786. dev_err(rmi4_data->pdev->dev.parent,
  4787. "%s: Failed to read device config ID\n",
  4788. __func__);
  4789. goto exit_free_mem;
  4790. }
  4791. }
  4792. fwu->force_update = FORCE_UPDATE;
  4793. fwu->do_lockdown = DO_LOCKDOWN;
  4794. fwu->initialized = true;
  4795. #ifdef DO_STARTUP_FW_UPDATE
  4796. fwu->fwu_workqueue = create_singlethread_workqueue("fwu_workqueue");
  4797. INIT_WORK(&fwu->fwu_work, fwu_startup_fw_update_work);
  4798. queue_work(fwu->fwu_workqueue,
  4799. &fwu->fwu_work);
  4800. #endif
  4801. #ifdef F51_DISCRETE_FORCE
  4802. fwu_read_flash_status();
  4803. if (!fwu->in_bl_mode) {
  4804. retval = fwu_f51_force_data_init();
  4805. if (retval < 0)
  4806. goto exit_free_mem;
  4807. }
  4808. #endif
  4809. if (ENABLE_SYS_REFLASH == false)
  4810. return 0;
  4811. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  4812. retval = sysfs_create_bin_file(&rmi4_data->input_dev->dev.kobj,
  4813. &dev_attr_data);
  4814. if (retval < 0) {
  4815. dev_err(rmi4_data->pdev->dev.parent,
  4816. "%s: Failed to create sysfs bin file\n",
  4817. __func__);
  4818. goto exit_free_mem;
  4819. }
  4820. #endif
  4821. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  4822. retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
  4823. &attrs[attr_count].attr);
  4824. if (retval < 0) {
  4825. dev_err(rmi4_data->pdev->dev.parent,
  4826. "%s: Failed to create sysfs attributes\n",
  4827. __func__);
  4828. retval = -ENODEV;
  4829. goto exit_remove_attrs;
  4830. }
  4831. }
  4832. return 0;
  4833. exit_remove_attrs:
  4834. for (attr_count--; attr_count >= 0; attr_count--) {
  4835. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  4836. &attrs[attr_count].attr);
  4837. }
  4838. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  4839. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  4840. #endif
  4841. exit_free_mem:
  4842. kfree(fwu->image_name);
  4843. exit_free_fwu:
  4844. kfree(fwu);
  4845. fwu = NULL;
  4846. exit:
  4847. return retval;
  4848. }
  4849. static void synaptics_rmi4_fwu_remove(struct synaptics_rmi4_data *rmi4_data)
  4850. {
  4851. unsigned char attr_count;
  4852. if (!fwu)
  4853. goto exit;
  4854. #ifdef DO_STARTUP_FW_UPDATE
  4855. cancel_work_sync(&fwu->fwu_work);
  4856. flush_workqueue(fwu->fwu_workqueue);
  4857. destroy_workqueue(fwu->fwu_workqueue);
  4858. #endif
  4859. #ifdef F51_DISCRETE_FORCE
  4860. kfree(fwu->cal_data);
  4861. #endif
  4862. kfree(fwu->read_config_buf);
  4863. kfree(fwu->image_name);
  4864. kfree(fwu);
  4865. fwu = NULL;
  4866. if (ENABLE_SYS_REFLASH == false)
  4867. goto exit;
  4868. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  4869. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  4870. &attrs[attr_count].attr);
  4871. }
  4872. #ifdef CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE_EXTRA_SYSFS
  4873. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  4874. #endif
  4875. exit:
  4876. complete(&fwu_remove_complete);
  4877. }
  4878. static void synaptics_rmi4_fwu_reset(struct synaptics_rmi4_data *rmi4_data)
  4879. {
  4880. int retval;
  4881. if (!fwu) {
  4882. synaptics_rmi4_fwu_init(rmi4_data);
  4883. return;
  4884. }
  4885. retval = fwu_scan_pdt();
  4886. if (retval < 0)
  4887. return;
  4888. if (!fwu->in_ub_mode)
  4889. fwu_read_f34_queries();
  4890. #ifdef F51_DISCRETE_FORCE
  4891. fwu_read_flash_status();
  4892. if (!fwu->in_bl_mode)
  4893. fwu_f51_force_data_init();
  4894. #endif
  4895. return;
  4896. }
  4897. static struct synaptics_rmi4_exp_fn fwu_module = {
  4898. .fn_type = RMI_FW_UPDATER,
  4899. .init = synaptics_rmi4_fwu_init,
  4900. .remove = synaptics_rmi4_fwu_remove,
  4901. .reset = synaptics_rmi4_fwu_reset,
  4902. .reinit = NULL,
  4903. .early_suspend = NULL,
  4904. .suspend = NULL,
  4905. .resume = NULL,
  4906. .late_resume = NULL,
  4907. .attn = synaptics_rmi4_fwu_attn,
  4908. };
  4909. static int __init rmi4_fw_update_module_init(void)
  4910. {
  4911. synaptics_rmi4_new_function(&fwu_module, true);
  4912. return 0;
  4913. }
  4914. static void __exit rmi4_fw_update_module_exit(void)
  4915. {
  4916. synaptics_rmi4_new_function(&fwu_module, false);
  4917. wait_for_completion(&fwu_remove_complete);
  4918. }
  4919. module_init(rmi4_fw_update_module_init);
  4920. module_exit(rmi4_fw_update_module_exit);
  4921. MODULE_AUTHOR("Synaptics, Inc.");
  4922. MODULE_DESCRIPTION("Synaptics DSX FW Update Module");
  4923. MODULE_LICENSE("GPL v2");