1e60728ab8
1.Typecast to avoid distinct pointer type comparison 2.Keep DMA mask aligned with api definition. 3.Add Suffix for literals 4.Remove multfrac func to avoid uncompatible division. 5.64-bit division( operator "/") on 32-bit platforms is not supported. Using platform independent API's here Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
104 lignes
2.9 KiB
C
104 lignes
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
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*/
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#include "dsi_phy_timing_calc.h"
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void dsi_phy_hw_v4_0_get_default_phy_params(
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struct phy_clk_params *params)
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{
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params->clk_prep_buf = 50;
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params->clk_zero_buf = 2;
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params->clk_trail_buf = 30;
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params->hs_prep_buf = 50;
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params->hs_zero_buf = 10;
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params->hs_trail_buf = 30;
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params->hs_rqst_buf = 0;
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params->hs_exit_buf = 10;
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/* 1.25 is used in code for precision */
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params->clk_pre_buf = 1;
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params->clk_post_buf = 5;
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}
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int32_t dsi_phy_hw_v4_0_calc_clk_zero(s64 rec_temp1, s64 mult)
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{
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s64 rec_temp2, rec_temp3;
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rec_temp2 = rec_temp1;
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rec_temp3 = roundup64(div_s64(rec_temp2, 8), mult);
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return (div_s64(rec_temp3, mult) - 1);
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}
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int32_t dsi_phy_hw_v4_0_calc_clk_trail_rec_min(s64 temp_mul,
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s64 frac, s64 mult)
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{
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s64 rec_temp1, rec_temp2, rec_temp3;
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rec_temp1 = temp_mul;
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rec_temp2 = div_s64(rec_temp1, 8);
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rec_temp3 = roundup64(rec_temp2, mult);
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return (div_s64(rec_temp3, mult) - 1);
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}
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int32_t dsi_phy_hw_v4_0_calc_clk_trail_rec_max(s64 temp1, s64 mult)
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{
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s64 rec_temp2;
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rec_temp2 = temp1 / 8;
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return (div_s64(rec_temp2, mult) - 1);
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}
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int32_t dsi_phy_hw_v4_0_calc_hs_zero(s64 temp1, s64 mult)
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{
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s64 rec_temp2, rec_min;
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rec_temp2 = roundup64((temp1 / 8), mult);
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rec_min = rec_temp2 - (1 * mult);
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return div_s64(rec_min, mult);
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}
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void dsi_phy_hw_v4_0_calc_hs_trail(struct phy_clk_params *clk_params,
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struct phy_timing_desc *desc)
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{
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s64 rec_temp1;
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struct timing_entry *t = &desc->hs_trail;
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t->rec_min = DIV_ROUND_UP(
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(t->mipi_min * clk_params->bitclk_mbps),
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(8 * clk_params->tlpx_numer_ns)) - 1;
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rec_temp1 = (t->mipi_max * clk_params->bitclk_mbps);
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t->rec_max =
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(div_s64(rec_temp1, (8 * clk_params->tlpx_numer_ns))) - 1;
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}
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void dsi_phy_hw_v4_0_update_timing_params(
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struct dsi_phy_per_lane_cfgs *timing,
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struct phy_timing_desc *desc)
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{
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timing->lane_v4[0] = 0x00;
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timing->lane_v4[1] = desc->clk_zero.reg_value;
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timing->lane_v4[2] = desc->clk_prepare.reg_value;
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timing->lane_v4[3] = desc->clk_trail.reg_value;
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timing->lane_v4[4] = desc->hs_exit.reg_value;
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timing->lane_v4[5] = desc->hs_zero.reg_value;
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timing->lane_v4[6] = desc->hs_prepare.reg_value;
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timing->lane_v4[7] = desc->hs_trail.reg_value;
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timing->lane_v4[8] = desc->hs_rqst.reg_value;
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timing->lane_v4[9] = 0x02;
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timing->lane_v4[10] = 0x04;
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timing->lane_v4[11] = 0x00;
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timing->lane_v4[12] = desc->clk_pre.reg_value;
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timing->lane_v4[13] = desc->clk_post.reg_value;
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DSI_DEBUG("[%d %d %d %d]\n", timing->lane_v4[0],
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timing->lane_v4[1], timing->lane_v4[2], timing->lane_v4[3]);
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DSI_DEBUG("[%d %d %d %d]\n", timing->lane_v4[4],
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timing->lane_v4[5], timing->lane_v4[6], timing->lane_v4[7]);
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DSI_DEBUG("[%d %d %d %d]\n", timing->lane_v4[8],
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timing->lane_v4[9], timing->lane_v4[10], timing->lane_v4[11]);
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DSI_DEBUG("[%d %d]\n", timing->lane_v4[12], timing->lane_v4[13]);
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timing->count_per_lane = 14;
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}
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