dp_rx.c 25 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #include <ieee80211.h>
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. /*
  30. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  31. * called during dp rx initialization
  32. * and at the end of dp_rx_process.
  33. *
  34. * @soc: core txrx main context
  35. * @mac_id: mac_id which is one of 3 mac_ids
  36. * @dp_rxdma_srng: dp rxdma circular ring
  37. * @rx_desc_pool: Poiter to free Rx descriptor pool
  38. * @num_req_buffers: number of buffer to be replenished
  39. * @desc_list: list of descs if called from dp_rx_process
  40. * or NULL during dp rx initialization or out of buffer
  41. * interrupt.
  42. * @tail: tail of descs list
  43. * @owner: who owns the nbuf (host, NSS etc...)
  44. * Return: return success or failure
  45. */
  46. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  47. struct dp_srng *dp_rxdma_srng,
  48. struct rx_desc_pool *rx_desc_pool,
  49. uint32_t num_req_buffers,
  50. union dp_rx_desc_list_elem_t **desc_list,
  51. union dp_rx_desc_list_elem_t **tail,
  52. uint8_t owner)
  53. {
  54. uint32_t num_alloc_desc;
  55. uint16_t num_desc_to_free = 0;
  56. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  57. uint32_t num_entries_avail;
  58. uint32_t count;
  59. int sync_hw_ptr = 1;
  60. qdf_dma_addr_t paddr;
  61. qdf_nbuf_t rx_netbuf;
  62. void *rxdma_ring_entry;
  63. union dp_rx_desc_list_elem_t *next;
  64. QDF_STATUS ret;
  65. void *rxdma_srng;
  66. rxdma_srng = dp_rxdma_srng->hal_srng;
  67. if (!rxdma_srng) {
  68. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  69. "rxdma srng not initialized");
  70. DP_STATS_INC(dp_pdev, err.rxdma_unitialized, 1);
  71. return QDF_STATUS_E_FAILURE;
  72. }
  73. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  74. "requested %d buffers for replenish", num_req_buffers);
  75. /*
  76. * if desc_list is NULL, allocate the descs from freelist
  77. */
  78. if (!(*desc_list)) {
  79. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  80. rx_desc_pool,
  81. num_req_buffers,
  82. desc_list,
  83. tail);
  84. if (!num_alloc_desc) {
  85. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  86. "no free rx_descs in freelist");
  87. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  88. num_alloc_desc);
  89. return QDF_STATUS_E_NOMEM;
  90. }
  91. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  92. "%d rx desc allocated", num_alloc_desc);
  93. num_req_buffers = num_alloc_desc;
  94. }
  95. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  96. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  97. rxdma_srng,
  98. sync_hw_ptr);
  99. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  100. "no of availble entries in rxdma ring: %d",
  101. num_entries_avail);
  102. if (num_entries_avail < num_req_buffers) {
  103. num_desc_to_free = num_req_buffers - num_entries_avail;
  104. num_req_buffers = num_entries_avail;
  105. }
  106. count = 0;
  107. while (count < num_req_buffers) {
  108. rx_netbuf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  109. RX_BUFFER_SIZE,
  110. RX_BUFFER_RESERVATION,
  111. RX_BUFFER_ALIGNMENT,
  112. FALSE);
  113. if (rx_netbuf == NULL)
  114. continue;
  115. qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  116. QDF_DMA_BIDIRECTIONAL);
  117. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  118. /*
  119. * check if the physical address of nbuf->data is
  120. * less then 0x50000000 then free the nbuf and try
  121. * allocating new nbuf. We can try for 100 times.
  122. * this is a temp WAR till we fix it properly.
  123. */
  124. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  125. if (ret == QDF_STATUS_E_FAILURE)
  126. break;
  127. count++;
  128. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  129. rxdma_srng);
  130. next = (*desc_list)->next;
  131. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  132. DP_STATS_INC_PKT(dp_pdev, replenished, 1,
  133. qdf_nbuf_len(rx_netbuf));
  134. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  135. "rx_netbuf=%p, buf=%p, paddr=0x%llx, cookie=%d\n",
  136. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  137. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  138. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  139. (*desc_list)->rx_desc.cookie,
  140. owner);
  141. *desc_list = next;
  142. }
  143. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  144. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  145. "successfully replenished %d buffers", num_req_buffers);
  146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  147. "%d rx desc added back to free list", num_desc_to_free);
  148. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  149. /*
  150. * add any available free desc back to the free list
  151. */
  152. if (*desc_list)
  153. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  154. mac_id, rx_desc_pool);
  155. return QDF_STATUS_SUCCESS;
  156. }
  157. /*
  158. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  159. * pkts to RAW mode simulation to
  160. * decapsulate the pkt.
  161. *
  162. * @vdev: vdev on which RAW mode is enabled
  163. * @nbuf_list: list of RAW pkts to process
  164. *
  165. * Return: void
  166. */
  167. static void
  168. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list)
  169. {
  170. qdf_nbuf_t deliver_list_head = NULL;
  171. qdf_nbuf_t deliver_list_tail = NULL;
  172. qdf_nbuf_t nbuf;
  173. nbuf = nbuf_list;
  174. while (nbuf) {
  175. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  176. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  177. /*
  178. * reset the chfrag_start and chfrag_end bits in nbuf cb
  179. * as this is a non-amsdu pkt and RAW mode simulation expects
  180. * these bit s to be 0 for non-amsdu pkt.
  181. */
  182. if (qdf_nbuf_is_chfrag_start(nbuf) &&
  183. qdf_nbuf_is_chfrag_end(nbuf)) {
  184. qdf_nbuf_set_chfrag_start(nbuf, 0);
  185. qdf_nbuf_set_chfrag_end(nbuf, 0);
  186. }
  187. nbuf = next;
  188. }
  189. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  190. &deliver_list_tail);
  191. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  192. }
  193. #ifdef DP_LFR
  194. /*
  195. * In case of LFR, data of a new peer might be sent up
  196. * even before peer is added.
  197. */
  198. static inline struct dp_vdev *
  199. dp_get_vdev_from_peer(struct dp_soc *soc,
  200. uint16_t peer_id,
  201. struct dp_peer *peer,
  202. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  203. {
  204. struct dp_vdev *vdev;
  205. uint8_t vdev_id;
  206. if (unlikely(!peer)) {
  207. if (peer_id != HTT_INVALID_PEER) {
  208. vdev_id = DP_PEER_METADATA_ID_GET(
  209. mpdu_desc_info.peer_meta_data);
  210. QDF_TRACE(QDF_MODULE_ID_DP,
  211. QDF_TRACE_LEVEL_ERROR,
  212. FL("PeerID %d not found use vdevID %d"),
  213. peer_id, vdev_id);
  214. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  215. vdev_id);
  216. } else {
  217. QDF_TRACE(QDF_MODULE_ID_DP,
  218. QDF_TRACE_LEVEL_ERROR,
  219. FL("Invalid PeerID %d"),
  220. peer_id);
  221. return NULL;
  222. }
  223. } else {
  224. vdev = peer->vdev;
  225. }
  226. return vdev;
  227. }
  228. #else
  229. static inline struct dp_vdev *
  230. dp_get_vdev_from_peer(struct dp_soc *soc,
  231. uint16_t peer_id,
  232. struct dp_peer *peer,
  233. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  234. {
  235. if (unlikely(!peer)) {
  236. QDF_TRACE(QDF_MODULE_ID_DP,
  237. QDF_TRACE_LEVEL_ERROR,
  238. FL("Peer not found for peerID %d"),
  239. peer_id);
  240. return NULL;
  241. } else {
  242. return peer->vdev;
  243. }
  244. }
  245. #endif
  246. /**
  247. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  248. *
  249. * @soc: core txrx main context
  250. * @sa_peer : source peer entry
  251. * @rx_tlv_hdr : start address of rx tlvs
  252. * @nbuf : nbuf that has to be intrabss forwarded
  253. *
  254. * Return: bool: true if it is forwarded else false
  255. */
  256. static bool
  257. dp_rx_intrabss_fwd(struct dp_soc *soc,
  258. struct dp_peer *sa_peer,
  259. uint8_t *rx_tlv_hdr,
  260. qdf_nbuf_t nbuf)
  261. {
  262. uint16_t da_idx;
  263. uint16_t len;
  264. struct dp_peer *da_peer;
  265. struct dp_ast_entry *ast_entry;
  266. qdf_nbuf_t nbuf_copy;
  267. /* check if the destination peer is available in peer table
  268. * and also check if the source peer and destination peer
  269. * belong to the same vap and destination peer is not bss peer.
  270. */
  271. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  272. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  273. da_idx = hal_rx_msdu_end_da_idx_get(rx_tlv_hdr);
  274. ast_entry = soc->ast_table[da_idx];
  275. if (!ast_entry)
  276. return false;
  277. da_peer = ast_entry->peer;
  278. if (!da_peer)
  279. return false;
  280. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  281. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  282. len = qdf_nbuf_len(nbuf);
  283. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  284. DP_STATS_INC_PKT(sa_peer, rx.intra_bss, 1, len);
  285. return true;
  286. } else
  287. return false;
  288. }
  289. }
  290. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  291. * source, then clone the pkt and send the cloned pkt for
  292. * intra BSS forwarding and original pkt up the network stack
  293. * Note: how do we handle multicast pkts. do we forward
  294. * all multicast pkts as is or let a higher layer module
  295. * like igmpsnoop decide whether to forward or not with
  296. * Mcast enhancement.
  297. */
  298. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  299. !sa_peer->bss_peer))) {
  300. nbuf_copy = qdf_nbuf_copy(nbuf);
  301. if (!nbuf_copy)
  302. return false;
  303. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  304. len = qdf_nbuf_len(nbuf_copy);
  305. if (dp_tx_send(sa_peer->vdev, nbuf_copy))
  306. qdf_nbuf_free(nbuf_copy);
  307. else
  308. DP_STATS_INC_PKT(sa_peer, rx.intra_bss, 1, len);
  309. }
  310. /* return false as we have to still send the original pkt
  311. * up the stack
  312. */
  313. return false;
  314. }
  315. #ifdef MESH_MODE_SUPPORT
  316. /**
  317. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  318. *
  319. * @vdev: DP Virtual device handle
  320. * @nbuf: Buffer pointer
  321. *
  322. * This function allocated memory for mesh receive stats and fill the
  323. * required stats. Stores the memory address in skb cb.
  324. *
  325. * Return: void
  326. */
  327. static
  328. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  329. {
  330. struct mesh_recv_hdr_s *rx_info = NULL;
  331. uint32_t pkt_type;
  332. uint32_t nss;
  333. uint32_t rate_mcs;
  334. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  335. /* fill recv mesh stats */
  336. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  337. /* upper layers are resposible to free this memory */
  338. if (rx_info == NULL) {
  339. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  340. "Memory allocation failed for mesh rx stats");
  341. return;
  342. }
  343. if (qdf_nbuf_is_chfrag_start(nbuf))
  344. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  345. if (qdf_nbuf_is_chfrag_end(nbuf))
  346. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  347. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  348. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  349. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  350. rx_info->rs_flags |= MESH_KEY_NOTFILLED;
  351. }
  352. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  353. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  354. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  355. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  356. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  357. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x4) | (pkt_type << 6);
  358. qdf_nbuf_set_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  359. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  360. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  361. rx_info->rs_flags,
  362. rx_info->rs_rssi,
  363. rx_info->rs_channel,
  364. rx_info->rs_ratephy1,
  365. rx_info->rs_keyix);
  366. }
  367. /**
  368. * dp_rx_fill_mesh_stats() - Filters mesh unwanted packets
  369. *
  370. * @vdev: DP Virtual device handle
  371. * @nbuf: Buffer pointer
  372. *
  373. * This checks if the received packet is matching any filter out
  374. * catogery and and drop the packet if it matches.
  375. *
  376. * Return: status(0 indicates drop, 1 indicate to no drop)
  377. */
  378. static inline
  379. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  380. {
  381. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  382. union dp_align_mac_addr mac_addr;
  383. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  384. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  385. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  386. return QDF_STATUS_SUCCESS;
  387. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  388. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  389. return QDF_STATUS_SUCCESS;
  390. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  391. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  392. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  393. return QDF_STATUS_SUCCESS;
  394. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  395. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  396. &mac_addr.raw[0]))
  397. return QDF_STATUS_E_FAILURE;
  398. if (!qdf_mem_cmp(&mac_addr.raw[0],
  399. &vdev->mac_addr.raw[0],
  400. DP_MAC_ADDR_LEN))
  401. return QDF_STATUS_SUCCESS;
  402. }
  403. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  404. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  405. &mac_addr.raw[0]))
  406. return QDF_STATUS_E_FAILURE;
  407. if (!qdf_mem_cmp(&mac_addr.raw[0],
  408. &vdev->mac_addr.raw[0],
  409. DP_MAC_ADDR_LEN))
  410. return QDF_STATUS_SUCCESS;
  411. }
  412. }
  413. return QDF_STATUS_E_FAILURE;
  414. }
  415. #else
  416. static
  417. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  418. {
  419. }
  420. static inline
  421. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  422. {
  423. return QDF_STATUS_E_FAILURE;
  424. }
  425. #endif
  426. /**
  427. * dp_rx_process() - Brain of the Rx processing functionality
  428. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  429. * @soc: core txrx main context
  430. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  431. * @quota: No. of units (packets) that can be serviced in one shot.
  432. *
  433. * This function implements the core of Rx functionality. This is
  434. * expected to handle only non-error frames.
  435. *
  436. * Return: uint32_t: No. of elements processed
  437. */
  438. uint32_t
  439. dp_rx_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  440. {
  441. void *hal_soc;
  442. void *ring_desc;
  443. struct dp_rx_desc *rx_desc;
  444. qdf_nbuf_t nbuf;
  445. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  446. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  447. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  448. uint16_t msdu_len;
  449. uint16_t peer_id;
  450. struct dp_peer *peer = NULL;
  451. struct dp_vdev *vdev = NULL;
  452. struct dp_vdev *vdev_list[WLAN_UMAC_PSOC_MAX_VDEVS] = { NULL };
  453. uint32_t pkt_len;
  454. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  455. struct hal_rx_msdu_desc_info msdu_desc_info;
  456. enum hal_reo_error_status error;
  457. static uint32_t peer_mdata;
  458. uint8_t *rx_tlv_hdr;
  459. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  460. uint32_t sgi, rate_mcs, tid, nss, bw, reception_type;
  461. uint64_t vdev_map = 0;
  462. uint8_t mac_id;
  463. uint16_t i, vdev_cnt = 0;
  464. uint32_t ampdu_flag, amsdu_flag;
  465. struct ether_header *eh;
  466. struct dp_pdev *pdev;
  467. struct dp_srng *dp_rxdma_srng;
  468. struct rx_desc_pool *rx_desc_pool;
  469. /* Debug -- Remove later */
  470. qdf_assert(soc && hal_ring);
  471. hal_soc = soc->hal_soc;
  472. /* Debug -- Remove later */
  473. qdf_assert(hal_soc);
  474. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  475. /*
  476. * Need API to convert from hal_ring pointer to
  477. * Ring Type / Ring Id combo
  478. */
  479. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  480. FL("HAL RING Access Failed -- %p"), hal_ring);
  481. hal_srng_access_end(hal_soc, hal_ring);
  482. goto done;
  483. }
  484. /*
  485. * start reaping the buffers from reo ring and queue
  486. * them in per vdev queue.
  487. * Process the received pkts in a different per vdev loop.
  488. */
  489. while (qdf_likely((ring_desc =
  490. hal_srng_dst_get_next(hal_soc, hal_ring))
  491. && quota--)) {
  492. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  493. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  494. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  495. FL("HAL RING 0x%p:error %d"), hal_ring, error);
  496. /* Don't know how to deal with this -- assert */
  497. qdf_assert(0);
  498. }
  499. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  500. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  501. qdf_assert(rx_desc);
  502. rx_bufs_reaped[rx_desc->pool_id]++;
  503. /* TODO */
  504. /*
  505. * Need a separate API for unmapping based on
  506. * phyiscal address
  507. */
  508. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  509. QDF_DMA_BIDIRECTIONAL);
  510. /* Get MPDU DESC info */
  511. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  512. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  513. mpdu_desc_info.peer_meta_data);
  514. peer = dp_peer_find_by_id(soc, peer_id);
  515. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  516. mpdu_desc_info);
  517. if (!vdev) {
  518. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  519. FL("vdev is NULL"));
  520. qdf_nbuf_free(rx_desc->nbuf);
  521. goto fail;
  522. }
  523. if (!((vdev_map >> vdev->vdev_id) & 1)) {
  524. vdev_map |= 1 << vdev->vdev_id;
  525. vdev_list[vdev_cnt] = vdev;
  526. vdev_cnt++;
  527. }
  528. /* Get MSDU DESC info */
  529. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  530. /*
  531. * save msdu flags first, last and continuation msdu in
  532. * nbuf->cb
  533. */
  534. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  535. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  536. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  537. qdf_nbuf_set_chfrag_cont(rx_desc->nbuf, 1);
  538. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  539. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  540. DP_STATS_INC_PKT(peer, rx.rcvd_reo, 1,
  541. qdf_nbuf_len(rx_desc->nbuf));
  542. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  543. HAL_MPDU_F_AMPDU_FLAG);
  544. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, ampdu_flag);
  545. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  546. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  547. amsdu_flag = ((msdu_desc_info.msdu_flags &
  548. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  549. (msdu_desc_info.msdu_flags &
  550. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  551. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1,
  552. amsdu_flag);
  553. DP_STATS_INCC(peer, rx.amsdu_cnt, 1,
  554. !(amsdu_flag));
  555. qdf_nbuf_queue_add(&vdev->rxq, rx_desc->nbuf);
  556. fail:
  557. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  558. &tail[rx_desc->pool_id],
  559. rx_desc);
  560. }
  561. done:
  562. hal_srng_access_end(hal_soc, hal_ring);
  563. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  564. /*
  565. * continue with next mac_id if no pkts were reaped
  566. * from that pool
  567. */
  568. if (!rx_bufs_reaped[mac_id])
  569. continue;
  570. pdev = soc->pdev_list[mac_id];
  571. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  572. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  573. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  574. rx_desc_pool, rx_bufs_reaped[mac_id],
  575. &head[mac_id], &tail[mac_id],
  576. HAL_RX_BUF_RBM_SW3_BM);
  577. }
  578. for (i = 0; i < vdev_cnt; i++) {
  579. qdf_nbuf_t deliver_list_head = NULL;
  580. qdf_nbuf_t deliver_list_tail = NULL;
  581. vdev = vdev_list[i];
  582. while ((nbuf = qdf_nbuf_queue_remove(&vdev->rxq))) {
  583. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  584. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  585. /*
  586. * Check if DMA completed -- msdu_done is the last bit
  587. * to be written
  588. */
  589. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  590. QDF_TRACE(QDF_MODULE_ID_DP,
  591. QDF_TRACE_LEVEL_ERROR,
  592. FL("MSDU DONE failure"));
  593. hal_rx_dump_pkt_tlvs(rx_tlv_hdr,
  594. QDF_TRACE_LEVEL_INFO);
  595. qdf_assert(0);
  596. }
  597. if (qdf_nbuf_is_chfrag_start(nbuf))
  598. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  599. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  600. peer = dp_peer_find_by_id(soc, peer_id);
  601. /* TODO */
  602. /*
  603. * In case of roaming peer object may not be
  604. * immediately available -- need to handle this
  605. * Cannot drop these packets right away.
  606. */
  607. /* Peer lookup failed */
  608. if (!peer && !vdev) {
  609. /* Drop & free packet */
  610. qdf_nbuf_free(nbuf);
  611. /* Statistics */
  612. continue;
  613. }
  614. if (peer && qdf_unlikely(peer->bss_peer)) {
  615. QDF_TRACE(QDF_MODULE_ID_DP,
  616. QDF_TRACE_LEVEL_INFO,
  617. FL("received pkt with same src MAC"));
  618. /* Drop & free packet */
  619. qdf_nbuf_free(nbuf);
  620. /* Statistics */
  621. continue;
  622. }
  623. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  624. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  625. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  627. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  628. __func__, __LINE__, sgi, rate_mcs, tid);
  629. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  630. reception_type = hal_rx_msdu_start_reception_type_get(
  631. rx_tlv_hdr);
  632. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  633. DP_STATS_INC(vdev->pdev, rx.bw[bw], 1);
  634. DP_STATS_INC(vdev->pdev,
  635. rx.reception_type[reception_type], 1);
  636. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  637. ((reception_type == REPT_MU_MIMO) ||
  638. (reception_type == REPT_MU_OFDMA_MIMO))
  639. );
  640. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  641. DP_STATS_INC(peer, rx.mcs_count[rate_mcs], 1);
  642. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  643. hal_rx_mpdu_end_mic_err_get(
  644. rx_tlv_hdr));
  645. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  646. hal_rx_mpdu_end_decrypt_err_get(
  647. rx_tlv_hdr));
  648. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  649. 1);
  650. DP_STATS_INC(peer, rx.bw[bw], 1);
  651. DP_STATS_INC(peer, rx.reception_type[reception_type],
  652. 1);
  653. /*
  654. * HW structures call this L3 header padding --
  655. * even though this is actually the offset from
  656. * the buffer beginning where the L2 header
  657. * begins.
  658. */
  659. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  660. FL("rxhash: flow id toeplitz: 0x%x\n"),
  661. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  662. l2_hdr_offset =
  663. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  664. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  665. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  666. /* Set length in nbuf */
  667. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  668. if (qdf_unlikely(vdev->mesh_vdev)) {
  669. if (dp_rx_filter_mesh_packets(vdev, nbuf)
  670. == QDF_STATUS_SUCCESS) {
  671. QDF_TRACE(QDF_MODULE_ID_DP,
  672. QDF_TRACE_LEVEL_INFO_MED,
  673. FL("mesh pkt filtered"));
  674. qdf_nbuf_free(nbuf);
  675. continue;
  676. }
  677. dp_rx_fill_mesh_stats(vdev, nbuf);
  678. }
  679. /*
  680. * Advance the packet start pointer by total size of
  681. * pre-header TLV's
  682. */
  683. qdf_nbuf_pull_head(nbuf,
  684. RX_PKT_TLVS_LEN + l2_hdr_offset);
  685. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  687. "p_id %d msdu_len %d hdr_off %d",
  688. peer_id, msdu_len, l2_hdr_offset);
  689. print_hex_dump(KERN_ERR,
  690. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  691. qdf_nbuf_data(nbuf), 128, false);
  692. #endif /* NAPIER_EMULATION */
  693. /* WDS Source Port Learning */
  694. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  695. /* Intrabss-fwd */
  696. if (vdev->opmode != wlan_op_mode_sta)
  697. if (dp_rx_intrabss_fwd(soc, peer, rx_tlv_hdr,
  698. nbuf))
  699. continue; /* Get next descriptor */
  700. rx_bufs_used++;
  701. DP_RX_LIST_APPEND(deliver_list_head,
  702. deliver_list_tail,
  703. nbuf);
  704. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  705. DP_FRAME_IS_MULTICAST((eh)->ether_dhost
  706. ));
  707. DP_STATS_INCC_PKT(peer, rx.unicast, 1, pkt_len,
  708. !(DP_FRAME_IS_MULTICAST(
  709. (eh)->ether_dhost)));
  710. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  711. pkt_len);
  712. if (hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  713. if (soc->cdp_soc.ol_ops->update_dp_stats)
  714. soc->cdp_soc.ol_ops->update_dp_stats(
  715. vdev->pdev->osif_pdev,
  716. &peer->stats,
  717. peer_id,
  718. UPDATE_PEER_STATS);
  719. dp_aggregate_vdev_stats(peer->vdev);
  720. if (soc->cdp_soc.ol_ops->update_dp_stats)
  721. soc->cdp_soc.ol_ops->update_dp_stats(
  722. vdev->pdev->osif_pdev,
  723. &peer->vdev->stats,
  724. peer->vdev->vdev_id,
  725. UPDATE_VDEV_STATS);
  726. }
  727. }
  728. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw))
  729. dp_rx_deliver_raw(vdev, deliver_list_head);
  730. else if (qdf_likely(vdev->osif_rx) && deliver_list_head)
  731. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  732. }
  733. return rx_bufs_used; /* Assume no scale factor for now */
  734. }
  735. /**
  736. * dp_rx_detach() - detach dp rx
  737. * @pdev: core txrx pdev context
  738. *
  739. * This function will detach DP RX into main device context
  740. * will free DP Rx resources.
  741. *
  742. * Return: void
  743. */
  744. void
  745. dp_rx_pdev_detach(struct dp_pdev *pdev)
  746. {
  747. uint8_t pdev_id = pdev->pdev_id;
  748. struct dp_soc *soc = pdev->soc;
  749. struct rx_desc_pool *rx_desc_pool;
  750. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  751. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  752. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  753. return;
  754. }
  755. /**
  756. * dp_rx_attach() - attach DP RX
  757. * @pdev: core txrx pdev context
  758. *
  759. * This function will attach a DP RX instance into the main
  760. * device (SOC) context. Will allocate dp rx resource and
  761. * initialize resources.
  762. *
  763. * Return: QDF_STATUS_SUCCESS: success
  764. * QDF_STATUS_E_RESOURCES: Error return
  765. */
  766. QDF_STATUS
  767. dp_rx_pdev_attach(struct dp_pdev *pdev)
  768. {
  769. uint8_t pdev_id = pdev->pdev_id;
  770. struct dp_soc *soc = pdev->soc;
  771. struct dp_srng rxdma_srng;
  772. uint32_t rxdma_entries;
  773. union dp_rx_desc_list_elem_t *desc_list = NULL;
  774. union dp_rx_desc_list_elem_t *tail = NULL;
  775. struct dp_srng *dp_rxdma_srng;
  776. struct rx_desc_pool *rx_desc_pool;
  777. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  778. pdev = soc->pdev_list[pdev_id];
  779. rxdma_srng = pdev->rx_refill_buf_ring;
  780. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  781. soc->hal_soc, RXDMA_BUF);
  782. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  783. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  784. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  785. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  786. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  787. rxdma_entries, &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  788. return QDF_STATUS_SUCCESS;
  789. }