dp_rx.c 34 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_nbuf.h"
  24. #include <ieee80211.h>
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. /*
  31. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  32. * called during dp rx initialization
  33. * and at the end of dp_rx_process.
  34. *
  35. * @soc: core txrx main context
  36. * @mac_id: mac_id which is one of 3 mac_ids
  37. * @dp_rxdma_srng: dp rxdma circular ring
  38. * @rx_desc_pool: Poiter to free Rx descriptor pool
  39. * @num_req_buffers: number of buffer to be replenished
  40. * @desc_list: list of descs if called from dp_rx_process
  41. * or NULL during dp rx initialization or out of buffer
  42. * interrupt.
  43. * @tail: tail of descs list
  44. * @owner: who owns the nbuf (host, NSS etc...)
  45. * Return: return success or failure
  46. */
  47. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  48. struct dp_srng *dp_rxdma_srng,
  49. struct rx_desc_pool *rx_desc_pool,
  50. uint32_t num_req_buffers,
  51. union dp_rx_desc_list_elem_t **desc_list,
  52. union dp_rx_desc_list_elem_t **tail,
  53. uint8_t owner)
  54. {
  55. uint32_t num_alloc_desc;
  56. uint16_t num_desc_to_free = 0;
  57. struct dp_pdev *dp_pdev = dp_soc->pdev_list[mac_id];
  58. uint32_t num_entries_avail;
  59. uint32_t count;
  60. int sync_hw_ptr = 1;
  61. qdf_dma_addr_t paddr;
  62. qdf_nbuf_t rx_netbuf;
  63. void *rxdma_ring_entry;
  64. union dp_rx_desc_list_elem_t *next;
  65. QDF_STATUS ret;
  66. void *rxdma_srng;
  67. rxdma_srng = dp_rxdma_srng->hal_srng;
  68. if (!rxdma_srng) {
  69. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  70. "rxdma srng not initialized");
  71. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  72. return QDF_STATUS_E_FAILURE;
  73. }
  74. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  75. "requested %d buffers for replenish", num_req_buffers);
  76. /*
  77. * if desc_list is NULL, allocate the descs from freelist
  78. */
  79. if (!(*desc_list)) {
  80. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  81. rx_desc_pool,
  82. num_req_buffers,
  83. desc_list,
  84. tail);
  85. if (!num_alloc_desc) {
  86. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  87. "no free rx_descs in freelist");
  88. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  89. num_req_buffers);
  90. return QDF_STATUS_E_NOMEM;
  91. }
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  93. "%d rx desc allocated", num_alloc_desc);
  94. num_req_buffers = num_alloc_desc;
  95. }
  96. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  97. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  98. rxdma_srng,
  99. sync_hw_ptr);
  100. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  101. "no of availble entries in rxdma ring: %d",
  102. num_entries_avail);
  103. if (num_entries_avail < num_req_buffers) {
  104. num_desc_to_free = num_req_buffers - num_entries_avail;
  105. num_req_buffers = num_entries_avail;
  106. }
  107. count = 0;
  108. while (count < num_req_buffers) {
  109. rx_netbuf = qdf_nbuf_alloc(dp_pdev->osif_pdev,
  110. RX_BUFFER_SIZE,
  111. RX_BUFFER_RESERVATION,
  112. RX_BUFFER_ALIGNMENT,
  113. FALSE);
  114. if (rx_netbuf == NULL) {
  115. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  116. continue;
  117. }
  118. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  119. QDF_DMA_BIDIRECTIONAL);
  120. if (ret == QDF_STATUS_E_FAILURE) {
  121. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  122. continue;
  123. }
  124. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  125. /*
  126. * check if the physical address of nbuf->data is
  127. * less then 0x50000000 then free the nbuf and try
  128. * allocating new nbuf. We can try for 100 times.
  129. * this is a temp WAR till we fix it properly.
  130. */
  131. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  132. if (ret == QDF_STATUS_E_FAILURE) {
  133. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  134. break;
  135. }
  136. count++;
  137. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  138. rxdma_srng);
  139. next = (*desc_list)->next;
  140. (*desc_list)->rx_desc.nbuf = rx_netbuf;
  141. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  142. "rx_netbuf=%p, buf=%p, paddr=0x%llx, cookie=%d\n",
  143. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  144. (unsigned long long)paddr, (*desc_list)->rx_desc.cookie);
  145. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  146. (*desc_list)->rx_desc.cookie,
  147. owner);
  148. *desc_list = next;
  149. }
  150. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  151. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  152. "successfully replenished %d buffers", num_req_buffers);
  153. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  154. "%d rx desc added back to free list", num_desc_to_free);
  155. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  156. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  157. (RX_BUFFER_SIZE * num_req_buffers));
  158. /*
  159. * add any available free desc back to the free list
  160. */
  161. if (*desc_list)
  162. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  163. mac_id, rx_desc_pool);
  164. return QDF_STATUS_SUCCESS;
  165. }
  166. /*
  167. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  168. * pkts to RAW mode simulation to
  169. * decapsulate the pkt.
  170. *
  171. * @vdev: vdev on which RAW mode is enabled
  172. * @nbuf_list: list of RAW pkts to process
  173. *
  174. * Return: void
  175. */
  176. void
  177. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list)
  178. {
  179. qdf_nbuf_t deliver_list_head = NULL;
  180. qdf_nbuf_t deliver_list_tail = NULL;
  181. qdf_nbuf_t nbuf;
  182. nbuf = nbuf_list;
  183. while (nbuf) {
  184. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  185. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  186. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  187. /*
  188. * reset the chfrag_start and chfrag_end bits in nbuf cb
  189. * as this is a non-amsdu pkt and RAW mode simulation expects
  190. * these bit s to be 0 for non-amsdu pkt.
  191. */
  192. if (qdf_nbuf_is_chfrag_start(nbuf) &&
  193. qdf_nbuf_is_chfrag_end(nbuf)) {
  194. qdf_nbuf_set_chfrag_start(nbuf, 0);
  195. qdf_nbuf_set_chfrag_end(nbuf, 0);
  196. }
  197. nbuf = next;
  198. }
  199. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  200. &deliver_list_tail);
  201. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  202. }
  203. #ifdef DP_LFR
  204. /*
  205. * In case of LFR, data of a new peer might be sent up
  206. * even before peer is added.
  207. */
  208. static inline struct dp_vdev *
  209. dp_get_vdev_from_peer(struct dp_soc *soc,
  210. uint16_t peer_id,
  211. struct dp_peer *peer,
  212. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  213. {
  214. struct dp_vdev *vdev;
  215. uint8_t vdev_id;
  216. if (unlikely(!peer)) {
  217. if (peer_id != HTT_INVALID_PEER) {
  218. vdev_id = DP_PEER_METADATA_ID_GET(
  219. mpdu_desc_info.peer_meta_data);
  220. QDF_TRACE(QDF_MODULE_ID_DP,
  221. QDF_TRACE_LEVEL_ERROR,
  222. FL("PeerID %d not found use vdevID %d"),
  223. peer_id, vdev_id);
  224. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  225. vdev_id);
  226. } else {
  227. QDF_TRACE(QDF_MODULE_ID_DP,
  228. QDF_TRACE_LEVEL_ERROR,
  229. FL("Invalid PeerID %d"),
  230. peer_id);
  231. return NULL;
  232. }
  233. } else {
  234. vdev = peer->vdev;
  235. }
  236. return vdev;
  237. }
  238. #else
  239. static inline struct dp_vdev *
  240. dp_get_vdev_from_peer(struct dp_soc *soc,
  241. uint16_t peer_id,
  242. struct dp_peer *peer,
  243. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  244. {
  245. if (unlikely(!peer)) {
  246. QDF_TRACE(QDF_MODULE_ID_DP,
  247. QDF_TRACE_LEVEL_ERROR,
  248. FL("Peer not found for peerID %d"),
  249. peer_id);
  250. return NULL;
  251. } else {
  252. return peer->vdev;
  253. }
  254. }
  255. #endif
  256. /**
  257. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  258. *
  259. * @soc: core txrx main context
  260. * @sa_peer : source peer entry
  261. * @rx_tlv_hdr : start address of rx tlvs
  262. * @nbuf : nbuf that has to be intrabss forwarded
  263. *
  264. * Return: bool: true if it is forwarded else false
  265. */
  266. static bool
  267. dp_rx_intrabss_fwd(struct dp_soc *soc,
  268. struct dp_peer *sa_peer,
  269. uint8_t *rx_tlv_hdr,
  270. qdf_nbuf_t nbuf)
  271. {
  272. uint16_t da_idx;
  273. uint16_t len;
  274. struct dp_peer *da_peer;
  275. struct dp_ast_entry *ast_entry;
  276. qdf_nbuf_t nbuf_copy;
  277. /* check if the destination peer is available in peer table
  278. * and also check if the source peer and destination peer
  279. * belong to the same vap and destination peer is not bss peer.
  280. */
  281. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  282. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  283. da_idx = hal_rx_msdu_end_da_idx_get(rx_tlv_hdr);
  284. ast_entry = soc->ast_table[da_idx];
  285. if (!ast_entry)
  286. return false;
  287. da_peer = ast_entry->peer;
  288. if (!da_peer)
  289. return false;
  290. if (da_peer->vdev == sa_peer->vdev && !da_peer->bss_peer) {
  291. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  292. len = qdf_nbuf_len(nbuf);
  293. if (!dp_tx_send(sa_peer->vdev, nbuf)) {
  294. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts,
  295. 1, len);
  296. return true;
  297. } else {
  298. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.fail, 1,
  299. len);
  300. return false;
  301. }
  302. }
  303. }
  304. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  305. * source, then clone the pkt and send the cloned pkt for
  306. * intra BSS forwarding and original pkt up the network stack
  307. * Note: how do we handle multicast pkts. do we forward
  308. * all multicast pkts as is or let a higher layer module
  309. * like igmpsnoop decide whether to forward or not with
  310. * Mcast enhancement.
  311. */
  312. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  313. !sa_peer->bss_peer))) {
  314. nbuf_copy = qdf_nbuf_copy(nbuf);
  315. if (!nbuf_copy)
  316. return false;
  317. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  318. len = qdf_nbuf_len(nbuf_copy);
  319. if (dp_tx_send(sa_peer->vdev, nbuf_copy))
  320. qdf_nbuf_free(nbuf_copy);
  321. else
  322. DP_STATS_INC_PKT(sa_peer, rx.intra_bss.pkts, 1, len);
  323. }
  324. /* return false as we have to still send the original pkt
  325. * up the stack
  326. */
  327. return false;
  328. }
  329. #ifdef MESH_MODE_SUPPORT
  330. /**
  331. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  332. *
  333. * @vdev: DP Virtual device handle
  334. * @nbuf: Buffer pointer
  335. *
  336. * This function allocated memory for mesh receive stats and fill the
  337. * required stats. Stores the memory address in skb cb.
  338. *
  339. * Return: void
  340. */
  341. static
  342. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  343. {
  344. struct mesh_recv_hdr_s *rx_info = NULL;
  345. uint32_t pkt_type;
  346. uint32_t nss;
  347. uint32_t rate_mcs;
  348. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  349. /* fill recv mesh stats */
  350. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  351. /* upper layers are resposible to free this memory */
  352. if (rx_info == NULL) {
  353. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  354. "Memory allocation failed for mesh rx stats");
  355. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  356. return;
  357. }
  358. if (qdf_nbuf_is_chfrag_start(nbuf))
  359. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  360. if (qdf_nbuf_is_chfrag_end(nbuf))
  361. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  362. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  363. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  364. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  365. rx_info->rs_flags |= MESH_KEY_NOTFILLED;
  366. }
  367. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  368. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  369. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  370. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  371. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  372. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x4) | (pkt_type << 6);
  373. qdf_nbuf_set_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  374. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  375. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  376. rx_info->rs_flags,
  377. rx_info->rs_rssi,
  378. rx_info->rs_channel,
  379. rx_info->rs_ratephy1,
  380. rx_info->rs_keyix);
  381. }
  382. /**
  383. * dp_rx_fill_mesh_stats() - Filters mesh unwanted packets
  384. *
  385. * @vdev: DP Virtual device handle
  386. * @nbuf: Buffer pointer
  387. *
  388. * This checks if the received packet is matching any filter out
  389. * catogery and and drop the packet if it matches.
  390. *
  391. * Return: status(0 indicates drop, 1 indicate to no drop)
  392. */
  393. static inline
  394. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  395. {
  396. uint8_t *rx_tlv_hdr = qdf_nbuf_data(nbuf);
  397. union dp_align_mac_addr mac_addr;
  398. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  399. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  400. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  401. return QDF_STATUS_SUCCESS;
  402. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  403. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  404. return QDF_STATUS_SUCCESS;
  405. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  406. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  407. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  408. return QDF_STATUS_SUCCESS;
  409. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  410. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  411. &mac_addr.raw[0]))
  412. return QDF_STATUS_E_FAILURE;
  413. if (!qdf_mem_cmp(&mac_addr.raw[0],
  414. &vdev->mac_addr.raw[0],
  415. DP_MAC_ADDR_LEN))
  416. return QDF_STATUS_SUCCESS;
  417. }
  418. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  419. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  420. &mac_addr.raw[0]))
  421. return QDF_STATUS_E_FAILURE;
  422. if (!qdf_mem_cmp(&mac_addr.raw[0],
  423. &vdev->mac_addr.raw[0],
  424. DP_MAC_ADDR_LEN))
  425. return QDF_STATUS_SUCCESS;
  426. }
  427. }
  428. return QDF_STATUS_E_FAILURE;
  429. }
  430. #else
  431. static
  432. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  433. {
  434. }
  435. static inline
  436. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  437. {
  438. return QDF_STATUS_E_FAILURE;
  439. }
  440. #endif
  441. #ifdef CONFIG_WIN
  442. /**
  443. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  444. * clients
  445. * @pdev: DP pdev handle
  446. * @rx_pkt_hdr: Rx packet Header
  447. *
  448. * return: dp_vdev*
  449. */
  450. static
  451. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  452. uint8_t *rx_pkt_hdr)
  453. {
  454. struct ieee80211_frame *wh;
  455. struct dp_neighbour_peer *peer = NULL;
  456. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  457. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  458. return NULL;
  459. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  460. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  461. neighbour_peer_list_elem) {
  462. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  463. wh->i_addr2, DP_MAC_ADDR_LEN) == 0) {
  464. QDF_TRACE(
  465. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  466. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  467. peer->neighbour_peers_macaddr.raw[0],
  468. peer->neighbour_peers_macaddr.raw[1],
  469. peer->neighbour_peers_macaddr.raw[2],
  470. peer->neighbour_peers_macaddr.raw[3],
  471. peer->neighbour_peers_macaddr.raw[4],
  472. peer->neighbour_peers_macaddr.raw[5]);
  473. return pdev->monitor_vdev;
  474. }
  475. }
  476. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  477. return NULL;
  478. }
  479. /**
  480. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  481. * @soc: DP SOC handle
  482. * @mpdu: mpdu for which peer is invalid
  483. *
  484. * return: integer type
  485. */
  486. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  487. {
  488. struct dp_invalid_peer_msg msg;
  489. struct dp_vdev *vdev = NULL;
  490. struct dp_pdev *pdev = NULL;
  491. struct ieee80211_frame *wh;
  492. uint8_t i;
  493. uint8_t *rx_pkt_hdr;
  494. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(mpdu));
  495. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  496. if (!DP_FRAME_IS_DATA(wh)) {
  497. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  498. "NAWDS valid only for data frames");
  499. return 1;
  500. }
  501. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  502. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  503. "Invalid nbuf length");
  504. return 1;
  505. }
  506. for (i = 0; i < MAX_PDEV_CNT; i++) {
  507. pdev = soc->pdev_list[i];
  508. if (!pdev) {
  509. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  510. "PDEV not found");
  511. continue;
  512. }
  513. if (pdev->filter_neighbour_peers) {
  514. /* Next Hop scenario not yet handle */
  515. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  516. if (vdev) {
  517. dp_rx_mon_deliver(soc, i,
  518. soc->invalid_peer_head_msdu,
  519. soc->invalid_peer_tail_msdu);
  520. return 0;
  521. }
  522. }
  523. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  524. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  525. DP_MAC_ADDR_LEN) == 0) {
  526. goto out;
  527. }
  528. }
  529. }
  530. if (!vdev) {
  531. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  532. "VDEV not found");
  533. return 1;
  534. }
  535. out:
  536. msg.wh = wh;
  537. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  538. msg.nbuf = mpdu;
  539. msg.vdev_id = vdev->vdev_id;
  540. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  541. return pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  542. pdev->osif_pdev, &msg);
  543. return 0;
  544. }
  545. #else
  546. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  547. {
  548. return 0;
  549. }
  550. #endif
  551. #if defined(FEATURE_LRO)
  552. static void dp_rx_print_lro_info(uint8_t *rx_tlv)
  553. {
  554. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  555. FL("----------------------RX DESC LRO----------------------\n"));
  556. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  557. FL("lro_eligible 0x%x"), HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  558. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  559. FL("pure_ack 0x%x"), HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  560. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  561. FL("chksum 0x%x"), HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  562. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  563. FL("TCP seq num 0x%x"), HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  564. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  565. FL("TCP ack num 0x%x"), HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  566. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  567. FL("TCP window 0x%x"), HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  568. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  569. FL("TCP protocol 0x%x"), HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  570. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  571. FL("TCP offset 0x%x"), HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  572. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  573. FL("toeplitz 0x%x"), HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  574. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  575. FL("---------------------------------------------------------\n"));
  576. }
  577. /**
  578. * dp_rx_lro() - LRO related processing
  579. * @rx_tlv: TLV data extracted from the rx packet
  580. * @peer: destination peer of the msdu
  581. * @msdu: network buffer
  582. * @ctx: LRO context
  583. *
  584. * This function performs the LRO related processing of the msdu
  585. *
  586. * Return: true: LRO enabled false: LRO is not enabled
  587. */
  588. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  589. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  590. {
  591. if (!peer || !peer->vdev || !peer->vdev->lro_enable) {
  592. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  593. FL("no peer, no vdev or LRO disabled"));
  594. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = 0;
  595. return;
  596. }
  597. qdf_assert(rx_tlv);
  598. dp_rx_print_lro_info(rx_tlv);
  599. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  600. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  601. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  602. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  603. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  604. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  605. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  606. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  607. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  608. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  609. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  610. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  611. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  612. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  613. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  614. HAL_RX_TLV_GET_IPV6(rx_tlv);
  615. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  616. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  617. QDF_NBUF_CB_RX_FLOW_ID_TOEPLITZ(msdu) =
  618. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  619. QDF_NBUF_CB_RX_LRO_CTX(msdu) = (unsigned char *)ctx;
  620. }
  621. #else
  622. static void dp_rx_lro(uint8_t *rx_tlv, struct dp_peer *peer,
  623. qdf_nbuf_t msdu, qdf_lro_ctx_t ctx)
  624. {
  625. }
  626. #endif
  627. /**
  628. * dp_rx_process() - Brain of the Rx processing functionality
  629. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  630. * @soc: core txrx main context
  631. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  632. * @quota: No. of units (packets) that can be serviced in one shot.
  633. *
  634. * This function implements the core of Rx functionality. This is
  635. * expected to handle only non-error frames.
  636. *
  637. * Return: uint32_t: No. of elements processed
  638. */
  639. uint32_t
  640. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota)
  641. {
  642. void *hal_soc;
  643. void *ring_desc;
  644. struct dp_rx_desc *rx_desc = NULL;
  645. qdf_nbuf_t nbuf;
  646. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  647. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  648. uint32_t rx_bufs_used = 0, rx_buf_cookie, l2_hdr_offset;
  649. uint16_t msdu_len;
  650. uint16_t peer_id;
  651. struct dp_peer *peer = NULL;
  652. struct dp_vdev *vdev = NULL;
  653. struct dp_vdev *vdev_list[WLAN_UMAC_PSOC_MAX_VDEVS] = { NULL };
  654. uint32_t pkt_len;
  655. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  656. struct hal_rx_msdu_desc_info msdu_desc_info;
  657. enum hal_reo_error_status error;
  658. static uint32_t peer_mdata;
  659. uint8_t *rx_tlv_hdr;
  660. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  661. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  662. uint64_t vdev_map = 0;
  663. uint8_t mac_id;
  664. uint16_t i, vdev_cnt = 0;
  665. uint32_t ampdu_flag, amsdu_flag;
  666. struct ether_header *eh;
  667. struct dp_pdev *pdev;
  668. struct dp_srng *dp_rxdma_srng;
  669. struct rx_desc_pool *rx_desc_pool;
  670. struct dp_soc *soc = int_ctx->soc;
  671. uint8_t ring_id;
  672. uint8_t core_id;
  673. DP_HIST_INIT();
  674. /* Debug -- Remove later */
  675. qdf_assert(soc && hal_ring);
  676. hal_soc = soc->hal_soc;
  677. /* Debug -- Remove later */
  678. qdf_assert(hal_soc);
  679. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  680. /*
  681. * Need API to convert from hal_ring pointer to
  682. * Ring Type / Ring Id combo
  683. */
  684. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  685. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  686. FL("HAL RING Access Failed -- %p"), hal_ring);
  687. hal_srng_access_end(hal_soc, hal_ring);
  688. goto done;
  689. }
  690. /*
  691. * start reaping the buffers from reo ring and queue
  692. * them in per vdev queue.
  693. * Process the received pkts in a different per vdev loop.
  694. */
  695. while (qdf_likely((ring_desc =
  696. hal_srng_dst_get_next(hal_soc, hal_ring))
  697. && quota--)) {
  698. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  699. ring_id = hal_srng_ring_id_get(hal_ring);
  700. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  701. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  702. FL("HAL RING 0x%p:error %d"), hal_ring, error);
  703. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  704. /* Don't know how to deal with this -- assert */
  705. qdf_assert(0);
  706. }
  707. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  708. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  709. qdf_assert(rx_desc);
  710. rx_bufs_reaped[rx_desc->pool_id]++;
  711. /* TODO */
  712. /*
  713. * Need a separate API for unmapping based on
  714. * phyiscal address
  715. */
  716. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  717. QDF_DMA_BIDIRECTIONAL);
  718. core_id = smp_processor_id();
  719. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  720. /* Get MPDU DESC info */
  721. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  722. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  723. mpdu_desc_info.peer_meta_data);
  724. peer = dp_peer_find_by_id(soc, peer_id);
  725. vdev = dp_get_vdev_from_peer(soc, peer_id, peer,
  726. mpdu_desc_info);
  727. if (!vdev) {
  728. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  729. FL("vdev is NULL"));
  730. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  731. qdf_nbuf_free(rx_desc->nbuf);
  732. goto fail;
  733. }
  734. if (!((vdev_map >> vdev->vdev_id) & 1)) {
  735. vdev_map |= 1 << vdev->vdev_id;
  736. vdev_list[vdev_cnt] = vdev;
  737. vdev_cnt++;
  738. }
  739. /* Get MSDU DESC info */
  740. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  741. /*
  742. * save msdu flags first, last and continuation msdu in
  743. * nbuf->cb
  744. */
  745. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  746. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  747. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  748. qdf_nbuf_set_chfrag_cont(rx_desc->nbuf, 1);
  749. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  750. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  751. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1,
  752. qdf_nbuf_len(rx_desc->nbuf));
  753. ampdu_flag = (mpdu_desc_info.mpdu_flags &
  754. HAL_MPDU_F_AMPDU_FLAG);
  755. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, ampdu_flag);
  756. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(ampdu_flag));
  757. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  758. amsdu_flag = ((msdu_desc_info.msdu_flags &
  759. HAL_MSDU_F_FIRST_MSDU_IN_MPDU) &&
  760. (msdu_desc_info.msdu_flags &
  761. HAL_MSDU_F_LAST_MSDU_IN_MPDU));
  762. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1,
  763. amsdu_flag);
  764. DP_STATS_INCC(peer, rx.amsdu_cnt, 1,
  765. !(amsdu_flag));
  766. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  767. qdf_nbuf_queue_add(&vdev->rxq, rx_desc->nbuf);
  768. fail:
  769. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  770. &tail[rx_desc->pool_id],
  771. rx_desc);
  772. }
  773. done:
  774. hal_srng_access_end(hal_soc, hal_ring);
  775. /* Update histogram statistics by looping through pdev's */
  776. DP_RX_HIST_STATS_PER_PDEV();
  777. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  778. /*
  779. * continue with next mac_id if no pkts were reaped
  780. * from that pool
  781. */
  782. if (!rx_bufs_reaped[mac_id])
  783. continue;
  784. pdev = soc->pdev_list[mac_id];
  785. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  786. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  787. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  788. rx_desc_pool, rx_bufs_reaped[mac_id],
  789. &head[mac_id], &tail[mac_id],
  790. HAL_RX_BUF_RBM_SW3_BM);
  791. }
  792. for (i = 0; i < vdev_cnt; i++) {
  793. qdf_nbuf_t deliver_list_head = NULL;
  794. qdf_nbuf_t deliver_list_tail = NULL;
  795. vdev = vdev_list[i];
  796. while ((nbuf = qdf_nbuf_queue_remove(&vdev->rxq))) {
  797. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  798. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  799. /*
  800. * Check if DMA completed -- msdu_done is the last bit
  801. * to be written
  802. */
  803. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  804. QDF_TRACE(QDF_MODULE_ID_DP,
  805. QDF_TRACE_LEVEL_ERROR,
  806. FL("MSDU DONE failure"));
  807. DP_STATS_INC(vdev->pdev, dropped.msdu_not_done,
  808. 1);
  809. hal_rx_dump_pkt_tlvs(rx_tlv_hdr,
  810. QDF_TRACE_LEVEL_INFO);
  811. qdf_assert(0);
  812. }
  813. if (qdf_nbuf_is_chfrag_start(nbuf))
  814. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  815. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  816. peer = dp_peer_find_by_id(soc, peer_id);
  817. /* TODO */
  818. /*
  819. * In case of roaming peer object may not be
  820. * immediately available -- need to handle this
  821. * Cannot drop these packets right away.
  822. */
  823. /* Peer lookup failed */
  824. if (!peer && !vdev) {
  825. dp_rx_process_invalid_peer(soc, nbuf);
  826. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  827. qdf_nbuf_len(nbuf));
  828. /* Drop & free packet */
  829. qdf_nbuf_free(nbuf);
  830. /* Statistics */
  831. continue;
  832. }
  833. if (peer && qdf_unlikely(peer->bss_peer)) {
  834. QDF_TRACE(QDF_MODULE_ID_DP,
  835. QDF_TRACE_LEVEL_INFO,
  836. FL("received pkt with same src MAC"));
  837. DP_STATS_INC(vdev->pdev, dropped.mec, 1);
  838. /* Drop & free packet */
  839. qdf_nbuf_free(nbuf);
  840. /* Statistics */
  841. continue;
  842. }
  843. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  844. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  845. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  847. "%s: %d, SGI: %d, tid: %d",
  848. __func__, __LINE__, sgi, tid);
  849. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  850. reception_type = hal_rx_msdu_start_reception_type_get(
  851. rx_tlv_hdr);
  852. nss = hal_rx_msdu_start_nss_get(rx_tlv_hdr);
  853. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  854. DP_STATS_INC(vdev->pdev, rx.bw[bw], 1);
  855. DP_STATS_INC(vdev->pdev,
  856. rx.reception_type[reception_type], 1);
  857. DP_STATS_INCC(vdev->pdev, rx.nss[nss], 1,
  858. ((reception_type == REPT_MU_MIMO) ||
  859. (reception_type == REPT_MU_OFDMA_MIMO))
  860. );
  861. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  862. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  863. hal_rx_mpdu_end_mic_err_get(
  864. rx_tlv_hdr));
  865. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  866. hal_rx_mpdu_end_decrypt_err_get(
  867. rx_tlv_hdr));
  868. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)],
  869. 1);
  870. DP_STATS_INC(peer, rx.bw[bw], 1);
  871. DP_STATS_INC(peer, rx.reception_type[reception_type],
  872. 1);
  873. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  874. mcs_count[MAX_MCS], 1,
  875. ((mcs >= MAX_MCS_11A) && (pkt_type
  876. == DOT11_A)));
  877. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  878. mcs_count[mcs], 1,
  879. ((mcs <= MAX_MCS_11A) && (pkt_type
  880. == DOT11_A)));
  881. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  882. mcs_count[MAX_MCS], 1,
  883. ((mcs >= MAX_MCS_11B)
  884. && (pkt_type == DOT11_B)));
  885. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  886. mcs_count[mcs], 1,
  887. ((mcs <= MAX_MCS_11B)
  888. && (pkt_type == DOT11_B)));
  889. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  890. mcs_count[MAX_MCS], 1,
  891. ((mcs >= MAX_MCS_11A)
  892. && (pkt_type == DOT11_N)));
  893. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  894. mcs_count[mcs], 1,
  895. ((mcs <= MAX_MCS_11A)
  896. && (pkt_type == DOT11_N)));
  897. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  898. mcs_count[MAX_MCS], 1,
  899. ((mcs >= MAX_MCS_11AC)
  900. && (pkt_type == DOT11_AC)));
  901. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  902. mcs_count[mcs], 1,
  903. ((mcs <= MAX_MCS_11AC)
  904. && (pkt_type == DOT11_AC)));
  905. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  906. mcs_count[MAX_MCS], 1,
  907. ((mcs >= MAX_MCS)
  908. && (pkt_type == DOT11_AX)));
  909. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].
  910. mcs_count[mcs], 1,
  911. ((mcs <= MAX_MCS)
  912. && (pkt_type == DOT11_AX)));
  913. /*
  914. * HW structures call this L3 header padding --
  915. * even though this is actually the offset from
  916. * the buffer beginning where the L2 header
  917. * begins.
  918. */
  919. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  920. FL("rxhash: flow id toeplitz: 0x%x\n"),
  921. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  922. l2_hdr_offset =
  923. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  924. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  925. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  926. /* Set length in nbuf */
  927. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  928. if (qdf_unlikely(vdev->mesh_vdev)) {
  929. if (dp_rx_filter_mesh_packets(vdev, nbuf)
  930. == QDF_STATUS_SUCCESS) {
  931. QDF_TRACE(QDF_MODULE_ID_DP,
  932. QDF_TRACE_LEVEL_INFO_MED,
  933. FL("mesh pkt filtered"));
  934. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  935. 1);
  936. qdf_nbuf_free(nbuf);
  937. continue;
  938. }
  939. dp_rx_fill_mesh_stats(vdev, nbuf);
  940. }
  941. /*
  942. * Advance the packet start pointer by total size of
  943. * pre-header TLV's
  944. */
  945. qdf_nbuf_pull_head(nbuf,
  946. RX_PKT_TLVS_LEN + l2_hdr_offset);
  947. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  948. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  949. "p_id %d msdu_len %d hdr_off %d",
  950. peer_id, msdu_len, l2_hdr_offset);
  951. print_hex_dump(KERN_ERR,
  952. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  953. qdf_nbuf_data(nbuf), 128, false);
  954. #endif /* NAPIER_EMULATION */
  955. /* WDS Source Port Learning */
  956. if (qdf_likely((vdev->wds_enabled) &&
  957. (vdev->rx_decap_type ==
  958. htt_cmn_pkt_type_ethernet)))
  959. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer,
  960. nbuf);
  961. /* Intrabss-fwd */
  962. if (vdev->opmode != wlan_op_mode_sta)
  963. if (dp_rx_intrabss_fwd(soc, peer, rx_tlv_hdr,
  964. nbuf))
  965. continue; /* Get next descriptor */
  966. rx_bufs_used++;
  967. dp_rx_lro(rx_tlv_hdr, peer, nbuf, int_ctx->lro_ctx);
  968. DP_RX_LIST_APPEND(deliver_list_head,
  969. deliver_list_tail,
  970. nbuf);
  971. DP_STATS_INCC_PKT(peer, rx.multicast, 1, pkt_len,
  972. hal_rx_msdu_end_da_is_mcbc_get(
  973. rx_tlv_hdr));
  974. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  975. pkt_len);
  976. if (hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  977. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  978. soc->cdp_soc.ol_ops->update_dp_stats(
  979. vdev->pdev->osif_pdev,
  980. &peer->stats,
  981. peer_id,
  982. UPDATE_PEER_STATS);
  983. dp_aggregate_vdev_stats(peer->vdev);
  984. soc->cdp_soc.ol_ops->update_dp_stats(
  985. vdev->pdev->osif_pdev,
  986. &peer->vdev->stats,
  987. peer->vdev->vdev_id,
  988. UPDATE_VDEV_STATS);
  989. }
  990. }
  991. }
  992. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  993. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi))
  994. dp_rx_deliver_raw(vdev, deliver_list_head);
  995. else if (qdf_likely(vdev->osif_rx) && deliver_list_head)
  996. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  997. }
  998. return rx_bufs_used; /* Assume no scale factor for now */
  999. }
  1000. /**
  1001. * dp_rx_detach() - detach dp rx
  1002. * @pdev: core txrx pdev context
  1003. *
  1004. * This function will detach DP RX into main device context
  1005. * will free DP Rx resources.
  1006. *
  1007. * Return: void
  1008. */
  1009. void
  1010. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1011. {
  1012. uint8_t pdev_id = pdev->pdev_id;
  1013. struct dp_soc *soc = pdev->soc;
  1014. struct rx_desc_pool *rx_desc_pool;
  1015. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1016. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1017. qdf_spinlock_destroy(&soc->rx_desc_mutex[pdev_id]);
  1018. return;
  1019. }
  1020. /**
  1021. * dp_rx_attach() - attach DP RX
  1022. * @pdev: core txrx pdev context
  1023. *
  1024. * This function will attach a DP RX instance into the main
  1025. * device (SOC) context. Will allocate dp rx resource and
  1026. * initialize resources.
  1027. *
  1028. * Return: QDF_STATUS_SUCCESS: success
  1029. * QDF_STATUS_E_RESOURCES: Error return
  1030. */
  1031. QDF_STATUS
  1032. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1033. {
  1034. uint8_t pdev_id = pdev->pdev_id;
  1035. struct dp_soc *soc = pdev->soc;
  1036. struct dp_srng rxdma_srng;
  1037. uint32_t rxdma_entries;
  1038. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1039. union dp_rx_desc_list_elem_t *tail = NULL;
  1040. struct dp_srng *dp_rxdma_srng;
  1041. struct rx_desc_pool *rx_desc_pool;
  1042. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1043. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1044. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1045. return QDF_STATUS_SUCCESS;
  1046. }
  1047. qdf_spinlock_create(&soc->rx_desc_mutex[pdev_id]);
  1048. pdev = soc->pdev_list[pdev_id];
  1049. rxdma_srng = pdev->rx_refill_buf_ring;
  1050. rxdma_entries = rxdma_srng.alloc_size/hal_srng_get_entrysize(
  1051. soc->hal_soc, RXDMA_BUF);
  1052. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1053. dp_rx_desc_pool_alloc(soc, pdev_id, rxdma_entries*3, rx_desc_pool);
  1054. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1055. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1056. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng, rx_desc_pool,
  1057. rxdma_entries, &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  1058. return QDF_STATUS_SUCCESS;
  1059. }