c3fae0027c
Added qcn6432 target header files based on E3R47 under qcn6432 to make fw-api project compatible to host. Change-Id: I3bdf6298281323f4f0fe75aed04db93cd698ee1f CRs-Fixed: 3463782
82 satır
3.1 KiB
C
82 satır
3.1 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HE_SIG_B1_MU_INFO_H_
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#define _HE_SIG_B1_MU_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1
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struct he_sig_b1_mu_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t ru_allocation : 8, // [7:0]
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reserved_0 : 23, // [30:8]
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rx_integrity_check_passed : 1; // [31:31]
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#else
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uint32_t rx_integrity_check_passed : 1, // [31:31]
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reserved_0 : 23, // [30:8]
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ru_allocation : 8; // [7:0]
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#endif
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};
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/* Description RU_ALLOCATION
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RU allocation for the user(s) following this common portion
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of the SIG
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For details, refer to RU_TYPE description
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<legal all>
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*/
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#define HE_SIG_B1_MU_INFO_RU_ALLOCATION_OFFSET 0x00000000
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#define HE_SIG_B1_MU_INFO_RU_ALLOCATION_LSB 0
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#define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MSB 7
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#define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MASK 0x000000ff
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/* Description RESERVED_0
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<legal 0>
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*/
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#define HE_SIG_B1_MU_INFO_RESERVED_0_OFFSET 0x00000000
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#define HE_SIG_B1_MU_INFO_RESERVED_0_LSB 8
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#define HE_SIG_B1_MU_INFO_RESERVED_0_MSB 30
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#define HE_SIG_B1_MU_INFO_RESERVED_0_MASK 0x7fffff00
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/* Description RX_INTEGRITY_CHECK_PASSED
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TX side: Set to 0
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RX side: Set to 1 if PHY determines the CRC check of the
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codeblock containing the HE-SIG-B common info has passed,
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else set to 0
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<legal all>
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*/
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#define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
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#define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
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#define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
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#define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
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#endif // HE_SIG_B1_MU_INFO
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