rxpcu_ppdu_end_info.h 40 KB

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  1. /*
  2. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _RXPCU_PPDU_END_INFO_H_
  17. #define _RXPCU_PPDU_END_INFO_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #include "phyrx_abort_request_info.h"
  21. #include "macrx_abort_request_info.h"
  22. // ################ START SUMMARY #################
  23. //
  24. // Dword Fields
  25. // 0 wb_timestamp_lower_32[31:0]
  26. // 1 wb_timestamp_upper_32[31:0]
  27. // 2 rx_antenna[23:0], tx_ht_vht_ack[24], unsupported_mu_nc[25], otp_txbf_disable[26], previous_tlv_corrupted[27], phyrx_abort_request_info_valid[28], macrx_abort_request_info_valid[29], reserved[31:30]
  28. // 3 coex_bt_tx_from_start_of_rx[0], coex_bt_tx_after_start_of_rx[1], coex_wan_tx_from_start_of_rx[2], coex_wan_tx_after_start_of_rx[3], coex_wlan_tx_from_start_of_rx[4], coex_wlan_tx_after_start_of_rx[5], mpdu_delimiter_errors_seen[6], ftm_tm[8:7], dialog_token[16:9], follow_up_dialog_token[24:17], bb_captured_channel[25], bb_captured_reason[28:26], bb_captured_timeout[29], reserved_3[31:30]
  29. // 4 before_mpdu_count_passing_fcs[9:0], before_mpdu_count_failing_fcs[19:10], after_mpdu_count_passing_fcs[29:20], reserved_4[31:30]
  30. // 5 after_mpdu_count_failing_fcs[9:0], reserved_5[31:10]
  31. // 6 phy_timestamp_tx_lower_32[31:0]
  32. // 7 phy_timestamp_tx_upper_32[31:0]
  33. // 8 bb_length[15:0], bb_data[16], reserved_8[19:17], first_bt_broadcast_status_details[31:20]
  34. // 9 rx_ppdu_duration[23:0], reserved_9[31:24]
  35. // 10 ast_index[15:0], ast_index_valid[16], reserved_10[19:17], second_bt_broadcast_status_details[31:20]
  36. // 11 struct phyrx_abort_request_info phyrx_abort_request_info_details;
  37. // 12 struct macrx_abort_request_info macrx_abort_request_info_details;
  38. // 13 rx_ppdu_end_marker[31:0]
  39. //
  40. // ################ END SUMMARY #################
  41. #define NUM_OF_DWORDS_RXPCU_PPDU_END_INFO 14
  42. struct rxpcu_ppdu_end_info {
  43. uint32_t wb_timestamp_lower_32 : 32; //[31:0]
  44. uint32_t wb_timestamp_upper_32 : 32; //[31:0]
  45. uint32_t rx_antenna : 24, //[23:0]
  46. tx_ht_vht_ack : 1, //[24]
  47. unsupported_mu_nc : 1, //[25]
  48. otp_txbf_disable : 1, //[26]
  49. previous_tlv_corrupted : 1, //[27]
  50. phyrx_abort_request_info_valid : 1, //[28]
  51. macrx_abort_request_info_valid : 1, //[29]
  52. reserved : 2; //[31:30]
  53. uint32_t coex_bt_tx_from_start_of_rx : 1, //[0]
  54. coex_bt_tx_after_start_of_rx : 1, //[1]
  55. coex_wan_tx_from_start_of_rx : 1, //[2]
  56. coex_wan_tx_after_start_of_rx : 1, //[3]
  57. coex_wlan_tx_from_start_of_rx : 1, //[4]
  58. coex_wlan_tx_after_start_of_rx : 1, //[5]
  59. mpdu_delimiter_errors_seen : 1, //[6]
  60. ftm_tm : 2, //[8:7]
  61. dialog_token : 8, //[16:9]
  62. follow_up_dialog_token : 8, //[24:17]
  63. bb_captured_channel : 1, //[25]
  64. bb_captured_reason : 3, //[28:26]
  65. bb_captured_timeout : 1, //[29]
  66. reserved_3 : 2; //[31:30]
  67. uint32_t before_mpdu_count_passing_fcs : 10, //[9:0]
  68. before_mpdu_count_failing_fcs : 10, //[19:10]
  69. after_mpdu_count_passing_fcs : 10, //[29:20]
  70. reserved_4 : 2; //[31:30]
  71. uint32_t after_mpdu_count_failing_fcs : 10, //[9:0]
  72. reserved_5 : 22; //[31:10]
  73. uint32_t phy_timestamp_tx_lower_32 : 32; //[31:0]
  74. uint32_t phy_timestamp_tx_upper_32 : 32; //[31:0]
  75. uint32_t bb_length : 16, //[15:0]
  76. bb_data : 1, //[16]
  77. reserved_8 : 3, //[19:17]
  78. first_bt_broadcast_status_details: 12; //[31:20]
  79. uint32_t rx_ppdu_duration : 24, //[23:0]
  80. reserved_9 : 8; //[31:24]
  81. uint32_t ast_index : 16, //[15:0]
  82. ast_index_valid : 1, //[16]
  83. reserved_10 : 3, //[19:17]
  84. second_bt_broadcast_status_details: 12; //[31:20]
  85. struct phyrx_abort_request_info phyrx_abort_request_info_details;
  86. struct macrx_abort_request_info macrx_abort_request_info_details;
  87. uint16_t pre_bt_broadcast_status_details : 12, //[27:16]
  88. reserved_12a : 4; //[31:28]
  89. uint32_t rx_ppdu_end_marker : 32; //[31:0]
  90. };
  91. /*
  92. wb_timestamp_lower_32
  93. WLAN/BT timestamp is a 1 usec resolution timestamp which
  94. does not get updated based on receive beacon like TSF. The
  95. same rules for capturing tsf_timestamp are used to capture
  96. the wb_timestamp. This field represents the lower 32 bits of
  97. the 64-bit timestamp
  98. wb_timestamp_upper_32
  99. WLAN/BT timestamp is a 1 usec resolution timestamp which
  100. does not get updated based on receive beacon like TSF. The
  101. same rules for capturing tsf_timestamp are used to capture
  102. the wb_timestamp. This field represents the upper 32 bits of
  103. the 64-bit timestamp
  104. rx_antenna
  105. Receive antenna value ???
  106. tx_ht_vht_ack
  107. Indicates that a HT or VHT Ack/BA frame was transmitted
  108. in response to this receive packet.
  109. unsupported_mu_nc
  110. Set if MU Nc > 2 in received NDPA.
  111. If this bit is set, even though AID and BSSID are
  112. matched, MAC doesn't send tx_expect_ndp to PHY, because MU
  113. Nc > 2 is not supported in Helium.
  114. otp_txbf_disable
  115. Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is
  116. set and if RXPU receives directed NDPA frame. Then, RXPCU
  117. should not send TX_EXPECT_NDP TLV to SW but set this bit to
  118. inform SW.
  119. previous_tlv_corrupted
  120. When set, the TLV preceding this RXPCU_END_INFO TLV
  121. within the RX_PPDU_END TLV, is corrupted. Not the entire TLV
  122. was received.... Likely due to an abort scenario... If abort
  123. is to blame, see the abort data datastructure for details.
  124. <legal all>
  125. phyrx_abort_request_info_valid
  126. When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
  127. RXPCU. The abort fields embedded in this TLV contain valid
  128. info.
  129. <legal all>
  130. macrx_abort_request_info_valid
  131. When set, the MAC sent an MACRX_ABORT_REQUEST TLV to
  132. PHYRX. The abort fields embedded in this TLV contain valid
  133. info.
  134. <legal all>
  135. reserved
  136. <legal 0>
  137. coex_bt_tx_from_start_of_rx
  138. Set when BT TX was ongoing when WLAN RX started
  139. coex_bt_tx_after_start_of_rx
  140. coex_wan_tx_from_start_of_rx
  141. Set when WAN TX was ongoing when WLAN RX started
  142. coex_wan_tx_after_start_of_rx
  143. Set when WAN TX started while WLAN RX was already
  144. ongoing
  145. coex_wlan_tx_from_start_of_rx
  146. Set when other WLAN TX was ongoing when WLAN RX started
  147. coex_wlan_tx_after_start_of_rx
  148. Set when other WLAN TX started while WLAN RX was already
  149. ongoing
  150. mpdu_delimiter_errors_seen
  151. When set, MPDU delimiter errors have been detected
  152. during this PPDU reception
  153. ftm_tm
  154. Indicate the timestamp is for the FTM or TM frame
  155. 0: non TM or FTM frame
  156. 1: FTM frame
  157. 2: TM frame
  158. 3: reserved
  159. <legal all>
  160. dialog_token
  161. The dialog token in the FTM or TM frame. Only valid when
  162. the FTM is set. Clear to 254 for a non-FTM frame
  163. <legal all>
  164. follow_up_dialog_token
  165. The follow up dialog token in the FTM or TM frame. Only
  166. valid when the FTM is set. Clear to 0 for a non-FTM frame,
  167. The follow up dialog token in the FTM frame. Only valid when
  168. the FTM is set. Clear to 255 for a non-FTM frame<legal all>
  169. bb_captured_channel
  170. Set by RXPCU when MACRX_FREEZE_CAPTURE_CHANNEL TLV is
  171. sent to PHY, FW check it to correlate current PPDU TLVs with
  172. uploaded channel information.
  173. <legal all>
  174. bb_captured_reason
  175. Copy capture_reason of MACRX_FREEZE_CAPTURE_CHANNEL TLV
  176. to here for FW usage. Valid when bb_captured_channel or
  177. bb_captured_timeout is set.
  178. This field indicates why the MAC asked to capture the
  179. channel
  180. <enum 0 freeze_reason_TM>
  181. <enum 1 freeze_reason_FTM>
  182. <enum 2 freeze_reason_ACK_resp_to_TM_FTM>
  183. <enum 3 freeze_reason_TA_RA_TYPE_FILTER>
  184. <enum 4 freeze_reason_NDPA_NDP>
  185. <enum 5 freeze_reason_ALL_PACKET>
  186. <legal 0-5>
  187. bb_captured_timeout
  188. Set by RxPCU to indicate channel capture condition is
  189. meet, but MACRX_FREEZE_CAPTURE_CHANNEL is not sent to PHY
  190. due to AST long delay, which means the rx_frame_falling edge
  191. to FREEZE TLV ready time exceed the threshold time defined
  192. by RXPCU register FREEZE_TLV_DELAY_CNT_THRESH.
  193. Bb_captured_reason is still valid in this case.
  194. <legal all>
  195. reserved_3
  196. <legal 0>
  197. before_mpdu_count_passing_fcs
  198. Number of MPDUs received in this PPDU that passed the
  199. FCS check before the Coex TX started
  200. The counter saturates at 0x3FF.
  201. <legal all>
  202. before_mpdu_count_failing_fcs
  203. Number of MPDUs received in this PPDU that failed the
  204. FCS check before the Coex TX started
  205. The counter saturates at 0x3FF.
  206. <legal all>
  207. after_mpdu_count_passing_fcs
  208. Number of MPDUs received in this PPDU that passed the
  209. FCS check after the moment the Coex TX started
  210. (Note: The partially received MPDU when the COEX tx
  211. start event came in falls in the after category)
  212. The counter saturates at 0x3FF.
  213. <legal all>
  214. reserved_4
  215. <legal 0>
  216. after_mpdu_count_failing_fcs
  217. Number of MPDUs received in this PPDU that failed the
  218. FCS check after the moment the Coex TX started
  219. (Note: The partially received MPDU when the COEX tx
  220. start event came in falls in the after category)
  221. The counter saturates at 0x3FF.
  222. <legal all>
  223. reserved_5
  224. <legal 0>
  225. phy_timestamp_tx_lower_32
  226. The PHY timestamp in the AMPI of the most recent rising
  227. edge (TODO: of what ???) after the TX_PHY_DESC.  This field
  228. indicates the lower 32 bits of the timestamp
  229. phy_timestamp_tx_upper_32
  230. The PHY timestamp in the AMPI of the most recent rising
  231. edge (TODO: of what ???) after the TX_PHY_DESC.  This field
  232. indicates the upper 32 bits of the timestamp
  233. bb_length
  234. Indicates the number of bytes of baseband information
  235. for PPDUs where the BB descriptor preamble type is 0x80 to
  236. 0xFF which indicates that this is not a normal PPDU but
  237. rather contains baseband debug information.
  238. TODO: Is this still needed ???
  239. bb_data
  240. Indicates that BB data associated with this PPDU will
  241. exist in the receive buffer. The exact contents of this BB
  242. data can be found by decoding the BB TLV in the buffer
  243. associated with the BB data. See vector_fragment in the
  244. Helium_mac_phy_interface.docx
  245. reserved_8
  246. Reserved: HW should fill with 0, FW should ignore.
  247. first_bt_broadcast_status_details
  248. Same contents as field bt_broadcast_status_details for
  249. the first received COEX_STATUS_BROADCAST tlv during this
  250. PPDU reception.
  251. If no COEX_STATUS_BROADCAST tlv is received during this
  252. PPDU reception, this field will be set to 0
  253. For detailed info see doc: TBD
  254. <legal all>
  255. rx_ppdu_duration
  256. The length of this PPDU reception in us
  257. reserved_9
  258. <legal 0>
  259. ast_index
  260. The AST index of the receive Ack/BA. This information
  261. is provided from the TXPCU to the RXPCU for receive Ack/BA
  262. for implicit beamforming.
  263. <legal all>
  264. ast_index_valid
  265. Indicates that ast_index is valid. Should only be set
  266. for receive Ack/BA where single stream implicit sounding is
  267. captured.
  268. reserved_10
  269. <legal 0>
  270. second_bt_broadcast_status_details
  271. Same contents as field bt_broadcast_status_details for
  272. the second received COEX_STATUS_BROADCAST tlv during this
  273. PPDU reception.
  274. If no second COEX_STATUS_BROADCAST tlv is received
  275. during this PPDU reception, this field will be set to 0
  276. For detailed info see doc: TBD
  277. <legal all>
  278. struct phyrx_abort_request_info phyrx_abort_request_info_details
  279. Field only valid when Phyrx_abort_request_info_valid is
  280. set
  281. The reason why PHY generated an abort request
  282. struct macrx_abort_request_info macrx_abort_request_info_details
  283. Field only valid when macrx_abort_request_info_valid is
  284. set
  285. The reason why MACRX generated an abort request
  286. rx_ppdu_end_marker
  287. Field used by SW to double check that their structure
  288. alignment is in sync with what HW has done.
  289. <legal 0xAABBCCDD>
  290. */
  291. /* Description RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32
  292. WLAN/BT timestamp is a 1 usec resolution timestamp which
  293. does not get updated based on receive beacon like TSF. The
  294. same rules for capturing tsf_timestamp are used to capture
  295. the wb_timestamp. This field represents the lower 32 bits of
  296. the 64-bit timestamp
  297. */
  298. #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_OFFSET 0x00000000
  299. #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_LSB 0
  300. #define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_MASK 0xffffffff
  301. /* Description RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32
  302. WLAN/BT timestamp is a 1 usec resolution timestamp which
  303. does not get updated based on receive beacon like TSF. The
  304. same rules for capturing tsf_timestamp are used to capture
  305. the wb_timestamp. This field represents the upper 32 bits of
  306. the 64-bit timestamp
  307. */
  308. #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_OFFSET 0x00000004
  309. #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_LSB 0
  310. #define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_MASK 0xffffffff
  311. /* Description RXPCU_PPDU_END_INFO_2_RX_ANTENNA
  312. Receive antenna value ???
  313. */
  314. #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_OFFSET 0x00000008
  315. #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_LSB 0
  316. #define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_MASK 0x00ffffff
  317. /* Description RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK
  318. Indicates that a HT or VHT Ack/BA frame was transmitted
  319. in response to this receive packet.
  320. */
  321. #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_OFFSET 0x00000008
  322. #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_LSB 24
  323. #define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_MASK 0x01000000
  324. /* Description RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC
  325. Set if MU Nc > 2 in received NDPA.
  326. If this bit is set, even though AID and BSSID are
  327. matched, MAC doesn't send tx_expect_ndp to PHY, because MU
  328. Nc > 2 is not supported in Helium.
  329. */
  330. #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_OFFSET 0x00000008
  331. #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_LSB 25
  332. #define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_MASK 0x02000000
  333. /* Description RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE
  334. Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is
  335. set and if RXPU receives directed NDPA frame. Then, RXPCU
  336. should not send TX_EXPECT_NDP TLV to SW but set this bit to
  337. inform SW.
  338. */
  339. #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_OFFSET 0x00000008
  340. #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_LSB 26
  341. #define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_MASK 0x04000000
  342. /* Description RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED
  343. When set, the TLV preceding this RXPCU_END_INFO TLV
  344. within the RX_PPDU_END TLV, is corrupted. Not the entire TLV
  345. was received.... Likely due to an abort scenario... If abort
  346. is to blame, see the abort data datastructure for details.
  347. <legal all>
  348. */
  349. #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_OFFSET 0x00000008
  350. #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_LSB 27
  351. #define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_MASK 0x08000000
  352. /* Description RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID
  353. When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
  354. RXPCU. The abort fields embedded in this TLV contain valid
  355. info.
  356. <legal all>
  357. */
  358. #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008
  359. #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_LSB 28
  360. #define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_MASK 0x10000000
  361. /* Description RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID
  362. When set, the MAC sent an MACRX_ABORT_REQUEST TLV to
  363. PHYRX. The abort fields embedded in this TLV contain valid
  364. info.
  365. <legal all>
  366. */
  367. #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008
  368. #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_LSB 29
  369. #define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_MASK 0x20000000
  370. /* Description RXPCU_PPDU_END_INFO_2_RESERVED
  371. <legal 0>
  372. */
  373. #define RXPCU_PPDU_END_INFO_2_RESERVED_OFFSET 0x00000008
  374. #define RXPCU_PPDU_END_INFO_2_RESERVED_LSB 30
  375. #define RXPCU_PPDU_END_INFO_2_RESERVED_MASK 0xc0000000
  376. /* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX
  377. Set when BT TX was ongoing when WLAN RX started
  378. */
  379. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_OFFSET 0x0000000c
  380. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_LSB 0
  381. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_MASK 0x00000001
  382. /* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX
  383. */
  384. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
  385. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_LSB 1
  386. #define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_MASK 0x00000002
  387. /* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX
  388. Set when WAN TX was ongoing when WLAN RX started
  389. */
  390. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c
  391. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_LSB 2
  392. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_MASK 0x00000004
  393. /* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX
  394. Set when WAN TX started while WLAN RX was already
  395. ongoing
  396. */
  397. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
  398. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_LSB 3
  399. #define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_MASK 0x00000008
  400. /* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX
  401. Set when other WLAN TX was ongoing when WLAN RX started
  402. */
  403. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c
  404. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_LSB 4
  405. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_MASK 0x00000010
  406. /* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX
  407. Set when other WLAN TX started while WLAN RX was already
  408. ongoing
  409. */
  410. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
  411. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_LSB 5
  412. #define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_MASK 0x00000020
  413. /* Description RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN
  414. When set, MPDU delimiter errors have been detected
  415. during this PPDU reception
  416. */
  417. #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_OFFSET 0x0000000c
  418. #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_LSB 6
  419. #define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_MASK 0x00000040
  420. /* Description RXPCU_PPDU_END_INFO_3_FTM_TM
  421. Indicate the timestamp is for the FTM or TM frame
  422. 0: non TM or FTM frame
  423. 1: FTM frame
  424. 2: TM frame
  425. 3: reserved
  426. <legal all>
  427. */
  428. #define RXPCU_PPDU_END_INFO_3_FTM_TM_OFFSET 0x0000000c
  429. #define RXPCU_PPDU_END_INFO_3_FTM_TM_LSB 7
  430. #define RXPCU_PPDU_END_INFO_3_FTM_TM_MASK 0x00000180
  431. /* Description RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN
  432. The dialog token in the FTM or TM frame. Only valid when
  433. the FTM is set. Clear to 254 for a non-FTM frame
  434. <legal all>
  435. */
  436. #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_OFFSET 0x0000000c
  437. #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_LSB 9
  438. #define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_MASK 0x0001fe00
  439. /* Description RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN
  440. The follow up dialog token in the FTM or TM frame. Only
  441. valid when the FTM is set. Clear to 0 for a non-FTM frame,
  442. The follow up dialog token in the FTM frame. Only valid when
  443. the FTM is set. Clear to 255 for a non-FTM frame<legal all>
  444. */
  445. #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_OFFSET 0x0000000c
  446. #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_LSB 17
  447. #define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_MASK 0x01fe0000
  448. /* Description RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL
  449. Set by RXPCU when MACRX_FREEZE_CAPTURE_CHANNEL TLV is
  450. sent to PHY, FW check it to correlate current PPDU TLVs with
  451. uploaded channel information.
  452. <legal all>
  453. */
  454. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_OFFSET 0x0000000c
  455. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_LSB 25
  456. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_MASK 0x02000000
  457. /* Description RXPCU_PPDU_END_INFO_3_BB_CAPTURED_REASON
  458. Copy capture_reason of MACRX_FREEZE_CAPTURE_CHANNEL TLV
  459. to here for FW usage. Valid when bb_captured_channel or
  460. bb_captured_timeout is set.
  461. This field indicates why the MAC asked to capture the
  462. channel
  463. <enum 0 freeze_reason_TM>
  464. <enum 1 freeze_reason_FTM>
  465. <enum 2 freeze_reason_ACK_resp_to_TM_FTM>
  466. <enum 3 freeze_reason_TA_RA_TYPE_FILTER>
  467. <enum 4 freeze_reason_NDPA_NDP>
  468. <enum 5 freeze_reason_ALL_PACKET>
  469. <legal 0-5>
  470. */
  471. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_REASON_OFFSET 0x0000000c
  472. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_REASON_LSB 26
  473. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_REASON_MASK 0x1c000000
  474. /* Description RXPCU_PPDU_END_INFO_3_BB_CAPTURED_TIMEOUT
  475. Set by RxPCU to indicate channel capture condition is
  476. meet, but MACRX_FREEZE_CAPTURE_CHANNEL is not sent to PHY
  477. due to AST long delay, which means the rx_frame_falling edge
  478. to FREEZE TLV ready time exceed the threshold time defined
  479. by RXPCU register FREEZE_TLV_DELAY_CNT_THRESH.
  480. Bb_captured_reason is still valid in this case.
  481. <legal all>
  482. */
  483. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_TIMEOUT_OFFSET 0x0000000c
  484. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_TIMEOUT_LSB 29
  485. #define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_TIMEOUT_MASK 0x20000000
  486. /* Description RXPCU_PPDU_END_INFO_3_RESERVED_3
  487. <legal 0>
  488. */
  489. #define RXPCU_PPDU_END_INFO_3_RESERVED_3_OFFSET 0x0000000c
  490. #define RXPCU_PPDU_END_INFO_3_RESERVED_3_LSB 30
  491. #define RXPCU_PPDU_END_INFO_3_RESERVED_3_MASK 0xc0000000
  492. /* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS
  493. Number of MPDUs received in this PPDU that passed the
  494. FCS check before the Coex TX started
  495. The counter saturates at 0x3FF.
  496. <legal all>
  497. */
  498. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010
  499. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_LSB 0
  500. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_MASK 0x000003ff
  501. /* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS
  502. Number of MPDUs received in this PPDU that failed the
  503. FCS check before the Coex TX started
  504. The counter saturates at 0x3FF.
  505. <legal all>
  506. */
  507. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000010
  508. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_LSB 10
  509. #define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_MASK 0x000ffc00
  510. /* Description RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS
  511. Number of MPDUs received in this PPDU that passed the
  512. FCS check after the moment the Coex TX started
  513. (Note: The partially received MPDU when the COEX tx
  514. start event came in falls in the after category)
  515. The counter saturates at 0x3FF.
  516. <legal all>
  517. */
  518. #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010
  519. #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_LSB 20
  520. #define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_MASK 0x3ff00000
  521. /* Description RXPCU_PPDU_END_INFO_4_RESERVED_4
  522. <legal 0>
  523. */
  524. #define RXPCU_PPDU_END_INFO_4_RESERVED_4_OFFSET 0x00000010
  525. #define RXPCU_PPDU_END_INFO_4_RESERVED_4_LSB 30
  526. #define RXPCU_PPDU_END_INFO_4_RESERVED_4_MASK 0xc0000000
  527. /* Description RXPCU_PPDU_END_INFO_5_AFTER_MPDU_COUNT_FAILING_FCS
  528. Number of MPDUs received in this PPDU that failed the
  529. FCS check after the moment the Coex TX started
  530. (Note: The partially received MPDU when the COEX tx
  531. start event came in falls in the after category)
  532. The counter saturates at 0x3FF.
  533. <legal all>
  534. */
  535. #define RXPCU_PPDU_END_INFO_5_AFTER_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000014
  536. #define RXPCU_PPDU_END_INFO_5_AFTER_MPDU_COUNT_FAILING_FCS_LSB 0
  537. #define RXPCU_PPDU_END_INFO_5_AFTER_MPDU_COUNT_FAILING_FCS_MASK 0x000003ff
  538. /* Description RXPCU_PPDU_END_INFO_5_RESERVED_5
  539. <legal 0>
  540. */
  541. #define RXPCU_PPDU_END_INFO_5_RESERVED_5_OFFSET 0x00000014
  542. #define RXPCU_PPDU_END_INFO_5_RESERVED_5_LSB 10
  543. #define RXPCU_PPDU_END_INFO_5_RESERVED_5_MASK 0xfffffc00
  544. /* Description RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_LOWER_32
  545. The PHY timestamp in the AMPI of the most recent rising
  546. edge (TODO: of what ???) after the TX_PHY_DESC.  This field
  547. indicates the lower 32 bits of the timestamp
  548. */
  549. #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_LOWER_32_OFFSET 0x00000018
  550. #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_LOWER_32_LSB 0
  551. #define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_LOWER_32_MASK 0xffffffff
  552. /* Description RXPCU_PPDU_END_INFO_7_PHY_TIMESTAMP_TX_UPPER_32
  553. The PHY timestamp in the AMPI of the most recent rising
  554. edge (TODO: of what ???) after the TX_PHY_DESC.  This field
  555. indicates the upper 32 bits of the timestamp
  556. */
  557. #define RXPCU_PPDU_END_INFO_7_PHY_TIMESTAMP_TX_UPPER_32_OFFSET 0x0000001c
  558. #define RXPCU_PPDU_END_INFO_7_PHY_TIMESTAMP_TX_UPPER_32_LSB 0
  559. #define RXPCU_PPDU_END_INFO_7_PHY_TIMESTAMP_TX_UPPER_32_MASK 0xffffffff
  560. /* Description RXPCU_PPDU_END_INFO_8_BB_LENGTH
  561. Indicates the number of bytes of baseband information
  562. for PPDUs where the BB descriptor preamble type is 0x80 to
  563. 0xFF which indicates that this is not a normal PPDU but
  564. rather contains baseband debug information.
  565. TODO: Is this still needed ???
  566. */
  567. #define RXPCU_PPDU_END_INFO_8_BB_LENGTH_OFFSET 0x00000020
  568. #define RXPCU_PPDU_END_INFO_8_BB_LENGTH_LSB 0
  569. #define RXPCU_PPDU_END_INFO_8_BB_LENGTH_MASK 0x0000ffff
  570. /* Description RXPCU_PPDU_END_INFO_8_BB_DATA
  571. Indicates that BB data associated with this PPDU will
  572. exist in the receive buffer. The exact contents of this BB
  573. data can be found by decoding the BB TLV in the buffer
  574. associated with the BB data. See vector_fragment in the
  575. Helium_mac_phy_interface.docx
  576. */
  577. #define RXPCU_PPDU_END_INFO_8_BB_DATA_OFFSET 0x00000020
  578. #define RXPCU_PPDU_END_INFO_8_BB_DATA_LSB 16
  579. #define RXPCU_PPDU_END_INFO_8_BB_DATA_MASK 0x00010000
  580. /* Description RXPCU_PPDU_END_INFO_8_RESERVED_8
  581. Reserved: HW should fill with 0, FW should ignore.
  582. */
  583. #define RXPCU_PPDU_END_INFO_8_RESERVED_8_OFFSET 0x00000020
  584. #define RXPCU_PPDU_END_INFO_8_RESERVED_8_LSB 17
  585. #define RXPCU_PPDU_END_INFO_8_RESERVED_8_MASK 0x000e0000
  586. /* Description RXPCU_PPDU_END_INFO_8_FIRST_BT_BROADCAST_STATUS_DETAILS
  587. Same contents as field bt_broadcast_status_details for
  588. the first received COEX_STATUS_BROADCAST tlv during this
  589. PPDU reception.
  590. If no COEX_STATUS_BROADCAST tlv is received during this
  591. PPDU reception, this field will be set to 0
  592. For detailed info see doc: TBD
  593. <legal all>
  594. */
  595. #define RXPCU_PPDU_END_INFO_8_FIRST_BT_BROADCAST_STATUS_DETAILS_OFFSET 0x00000020
  596. #define RXPCU_PPDU_END_INFO_8_FIRST_BT_BROADCAST_STATUS_DETAILS_LSB 20
  597. #define RXPCU_PPDU_END_INFO_8_FIRST_BT_BROADCAST_STATUS_DETAILS_MASK 0xfff00000
  598. /* Description RXPCU_PPDU_END_INFO_9_RX_PPDU_DURATION
  599. The length of this PPDU reception in us
  600. */
  601. #define RXPCU_PPDU_END_INFO_9_RX_PPDU_DURATION_OFFSET 0x00000024
  602. #define RXPCU_PPDU_END_INFO_9_RX_PPDU_DURATION_LSB 0
  603. #define RXPCU_PPDU_END_INFO_9_RX_PPDU_DURATION_MASK 0x00ffffff
  604. /* Description RXPCU_PPDU_END_INFO_9_RESERVED_9
  605. <legal 0>
  606. */
  607. #define RXPCU_PPDU_END_INFO_9_RESERVED_9_OFFSET 0x00000024
  608. #define RXPCU_PPDU_END_INFO_9_RESERVED_9_LSB 24
  609. #define RXPCU_PPDU_END_INFO_9_RESERVED_9_MASK 0xff000000
  610. /* Description RXPCU_PPDU_END_INFO_10_AST_INDEX
  611. The AST index of the receive Ack/BA. This information
  612. is provided from the TXPCU to the RXPCU for receive Ack/BA
  613. for implicit beamforming.
  614. <legal all>
  615. */
  616. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_OFFSET 0x00000028
  617. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_LSB 0
  618. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_MASK 0x0000ffff
  619. /* Description RXPCU_PPDU_END_INFO_10_AST_INDEX_VALID
  620. Indicates that ast_index is valid. Should only be set
  621. for receive Ack/BA where single stream implicit sounding is
  622. captured.
  623. */
  624. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_VALID_OFFSET 0x00000028
  625. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_VALID_LSB 16
  626. #define RXPCU_PPDU_END_INFO_10_AST_INDEX_VALID_MASK 0x00010000
  627. /* Description RXPCU_PPDU_END_INFO_10_RESERVED_10
  628. <legal 0>
  629. */
  630. #define RXPCU_PPDU_END_INFO_10_RESERVED_10_OFFSET 0x00000028
  631. #define RXPCU_PPDU_END_INFO_10_RESERVED_10_LSB 17
  632. #define RXPCU_PPDU_END_INFO_10_RESERVED_10_MASK 0x000e0000
  633. /* Description RXPCU_PPDU_END_INFO_10_SECOND_BT_BROADCAST_STATUS_DETAILS
  634. Same contents as field bt_broadcast_status_details for
  635. the second received COEX_STATUS_BROADCAST tlv during this
  636. PPDU reception.
  637. If no second COEX_STATUS_BROADCAST tlv is received
  638. during this PPDU reception, this field will be set to 0
  639. For detailed info see doc: TBD
  640. <legal all>
  641. */
  642. #define RXPCU_PPDU_END_INFO_10_SECOND_BT_BROADCAST_STATUS_DETAILS_OFFSET 0x00000028
  643. #define RXPCU_PPDU_END_INFO_10_SECOND_BT_BROADCAST_STATUS_DETAILS_LSB 20
  644. #define RXPCU_PPDU_END_INFO_10_SECOND_BT_BROADCAST_STATUS_DETAILS_MASK 0xfff00000
  645. /* EXTERNAL REFERENCE : struct phyrx_abort_request_info phyrx_abort_request_info_details */
  646. /* Description RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHYRX_ABORT_REASON
  647. <enum 0 phyrx_err_phy_off> Reception aborted due to
  648. receiving a PHY_OFF TLV
  649. <enum 1 phyrx_err_synth_off>
  650. <enum 2 phyrx_err_ofdma_timing>
  651. <enum 3 phyrx_err_ofdma_signal_parity>
  652. <enum 4 phyrx_err_ofdma_rate_illegal>
  653. <enum 5 phyrx_err_ofdma_length_illegal>
  654. <enum 6 phyrx_err_ofdma_restart>
  655. <enum 7 phyrx_err_ofdma_service>
  656. <enum 8 phyrx_err_ppdu_ofdma_power_drop>
  657. <enum 9 phyrx_err_cck_blokker>
  658. <enum 10 phyrx_err_cck_timing>
  659. <enum 11 phyrx_err_cck_header_crc>
  660. <enum 12 phyrx_err_cck_rate_illegal>
  661. <enum 13 phyrx_err_cck_length_illegal>
  662. <enum 14 phyrx_err_cck_restart>
  663. <enum 15 phyrx_err_cck_service>
  664. <enum 16 phyrx_err_cck_power_drop>
  665. <enum 17 phyrx_err_ht_crc_err>
  666. <enum 18 phyrx_err_ht_length_illegal>
  667. <enum 19 phyrx_err_ht_rate_illegal>
  668. <enum 20 phyrx_err_ht_zlf>
  669. <enum 21 phyrx_err_false_radar_ext>
  670. <enum 22 phyrx_err_green_field>
  671. <enum 23 phyrx_err_bw_gt_dyn_bw>
  672. <enum 24 phyrx_err_leg_ht_mismatch>
  673. <enum 25 phyrx_err_vht_crc_error>
  674. <enum 26 phyrx_err_vht_siga_unsupported>
  675. <enum 27 phyrx_err_vht_lsig_len_invalid>
  676. <enum 28 phyrx_err_vht_ndp_or_zlf>
  677. <enum 29 phyrx_err_vht_nsym_lt_zero>
  678. <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
  679. <enum 31 phyrx_err_vht_rx_skip_group_id0>
  680. <enum 32 phyrx_err_vht_rx_skip_group_id1to62>
  681. <enum 33 phyrx_err_vht_rx_skip_group_id63>
  682. <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
  683. <enum 35 phyrx_err_defer_nap>
  684. <enum 36 phyrx_err_fdomain_timeout>
  685. <enum 37 phyrx_err_lsig_rel_check>
  686. <enum 38 phyrx_err_bt_collision>
  687. <enum 39 phyrx_err_unsupported_mu_feedback>
  688. <enum 40 phyrx_err_ppdu_tx_interrupt_rx>
  689. <enum 41 phyrx_err_unsupported_cbf>
  690. <enum 42 phyrx_err_other> Should not really be used. If
  691. needed, ask for documentation update
  692. <enum 43 phyrx_err_he_siga_unsupported > <enum 44
  693. phyrx_err_he_crc_error > <enum 45
  694. phyrx_err_he_sigb_unsupported > <enum 46
  695. phyrx_err_he_mu_mode_unsupported > <enum 47
  696. phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
  697. > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
  698. phyrx_err_he_num_users_unsupported ><enum 51
  699. phyrx_err_he_sounding_params_unsupported >
  700. <enum 52 phyrx_err_MU_UL_no_power_detected>
  701. <enum 53 phyrx_err_MU_UL_not_for_me>
  702. <legal 0 - 53>
  703. */
  704. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHYRX_ABORT_REASON_OFFSET 0x0000002c
  705. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHYRX_ABORT_REASON_LSB 0
  706. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHYRX_ABORT_REASON_MASK 0x000000ff
  707. /* Description RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_NAP_STATE
  708. When set, PHY enters PHY NAP state after sending this
  709. abort
  710. Note that nap and defer state are mutually exclusive.
  711. Field put pro-actively in place....usage still to be
  712. agreed upon.
  713. <legal all>
  714. */
  715. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_NAP_STATE_OFFSET 0x0000002c
  716. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_NAP_STATE_LSB 8
  717. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_NAP_STATE_MASK 0x00000100
  718. /* Description RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_DEFER_STATE
  719. When set, PHY enters PHY defer state after sending this
  720. abort
  721. Note that nap and defer state are mutually exclusive.
  722. Field put pro-actively in place....usage still to be
  723. agreed upon.
  724. <legal all>
  725. */
  726. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_DEFER_STATE_OFFSET 0x0000002c
  727. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_DEFER_STATE_LSB 9
  728. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_PHY_ENTERS_DEFER_STATE_MASK 0x00000200
  729. /* Description RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0
  730. <legal 0>
  731. */
  732. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_OFFSET 0x0000002c
  733. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_LSB 10
  734. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_MASK 0x0000fc00
  735. /* Description RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RECEIVE_DURATION
  736. The remaining receive duration of this PPDU in the
  737. medium (in us). When PHY does not know this duration when
  738. this TLV is generated, the field will be set to 0.
  739. The timing reference point is the reception by the MAC
  740. of this TLV. The value shall be accurate to within 2us.
  741. In case Phy_enters_nap_state and/or
  742. Phy_enters_defer_state is set, there is a possibility that
  743. MAC PMM can also decide to go into a low(er) power state.
  744. <legal all>
  745. */
  746. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RECEIVE_DURATION_OFFSET 0x0000002c
  747. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RECEIVE_DURATION_LSB 16
  748. #define RXPCU_PPDU_END_INFO_11_PHYRX_ABORT_REQUEST_INFO_DETAILS_RECEIVE_DURATION_MASK 0xffff0000
  749. /* EXTERNAL REFERENCE : struct macrx_abort_request_info macrx_abort_request_info_details */
  750. /* Description RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_MACRX_ABORT_REASON
  751. <enum 0 macrx_abort_sw_initiated>
  752. <enum 1 macrx_abort_obss_reception> Upon receiving this
  753. abort reason, PHY should stop reception of the current frame
  754. and go back into a search mode
  755. <enum 2 macrx_abort_other>
  756. <enum 3 macrx_abort_sw_initiated_channel_switch > MAC FW
  757. issued an abort for channel switch reasons
  758. <enum 4 macrx_abort_sw_initiated_power_save > MAC FW
  759. issued an abort power save reasons
  760. <enum 5 macrx_abort_too_much_bad_data > RXPCU is
  761. terminating the current ongoing reception, as the data that
  762. MAC is receiving seems to be all garbage... The PER is too
  763. high, or in case of MU UL, Likely the trigger frame never
  764. got properly received by any of the targeted MU UL devices.
  765. After the abort, PHYRX can resume a normal search mode.
  766. <legal 0-5>
  767. */
  768. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_MACRX_ABORT_REASON_OFFSET 0x00000030
  769. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_MACRX_ABORT_REASON_LSB 0
  770. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_MACRX_ABORT_REASON_MASK 0x000000ff
  771. /* Description RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0
  772. <legal 0>
  773. */
  774. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_OFFSET 0x00000030
  775. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_LSB 8
  776. #define RXPCU_PPDU_END_INFO_12_MACRX_ABORT_REQUEST_INFO_DETAILS_RESERVED_0_MASK 0x0000ff00
  777. /* Description RXPCU_PPDU_END_INFO_13_RX_PPDU_END_MARKER
  778. Field used by SW to double check that their structure
  779. alignment is in sync with what HW has done.
  780. <legal 0xAABBCCDD>
  781. */
  782. #define RXPCU_PPDU_END_INFO_13_RX_PPDU_END_MARKER_OFFSET 0x00000034
  783. #define RXPCU_PPDU_END_INFO_13_RX_PPDU_END_MARKER_LSB 0
  784. #define RXPCU_PPDU_END_INFO_13_RX_PPDU_END_MARKER_MASK 0xffffffff
  785. #endif // _RXPCU_PPDU_END_INFO_H_