android_kernel_samsung_sm8650-modules/hw/qca9574/wfss_ce_reg_seq_hwiobase.h

/*
 * Copyright (c) 2021 The Linux Foundation. All rights reserved.
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

///////////////////////////////////////////////////////////////////////////////////////////////
//
// wfss_ce_reg_seq_hwiobase.h : automatically generated by Autoseq  3.10 1/18/2021 
// User Name:c_bipink
//
// !! WARNING !!  DO NOT MANUALLY EDIT THIS FILE.
//
///////////////////////////////////////////////////////////////////////////////////////////////

#ifndef __WFSS_CE_REG_SEQ_BASE_H__
#define __WFSS_CE_REG_SEQ_BASE_H__

#ifdef SCALE_INCLUDES
	#include "HALhwio.h"
#else
	#include "msmhwio.h"
#endif


///////////////////////////////////////////////////////////////////////////////////////////////
// Instance Relative Offsets from Block wfss_ce_reg
///////////////////////////////////////////////////////////////////////////////////////////////

#define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET             0x00000000
#define SEQ_WFSS_CE_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET             0x00001000
#define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET             0x00002000
#define SEQ_WFSS_CE_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET             0x00003000
#define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_SRC_REG_OFFSET             0x00004000
#define SEQ_WFSS_CE_REG_WFSS_CE_2_CHANNEL_DST_REG_OFFSET             0x00005000
#define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_SRC_REG_OFFSET             0x00006000
#define SEQ_WFSS_CE_REG_WFSS_CE_3_CHANNEL_DST_REG_OFFSET             0x00007000
#define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_SRC_REG_OFFSET             0x00008000
#define SEQ_WFSS_CE_REG_WFSS_CE_4_CHANNEL_DST_REG_OFFSET             0x00009000
#define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_SRC_REG_OFFSET             0x0000a000
#define SEQ_WFSS_CE_REG_WFSS_CE_5_CHANNEL_DST_REG_OFFSET             0x0000b000
#define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_SRC_REG_OFFSET             0x0000c000
#define SEQ_WFSS_CE_REG_WFSS_CE_6_CHANNEL_DST_REG_OFFSET             0x0000d000
#define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_SRC_REG_OFFSET             0x0000e000
#define SEQ_WFSS_CE_REG_WFSS_CE_7_CHANNEL_DST_REG_OFFSET             0x0000f000
#define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_SRC_REG_OFFSET             0x00010000
#define SEQ_WFSS_CE_REG_WFSS_CE_8_CHANNEL_DST_REG_OFFSET             0x00011000
#define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_SRC_REG_OFFSET             0x00012000
#define SEQ_WFSS_CE_REG_WFSS_CE_9_CHANNEL_DST_REG_OFFSET             0x00013000
#define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_SRC_REG_OFFSET            0x00014000
#define SEQ_WFSS_CE_REG_WFSS_CE_10_CHANNEL_DST_REG_OFFSET            0x00015000
#define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_SRC_REG_OFFSET            0x00016000
#define SEQ_WFSS_CE_REG_WFSS_CE_11_CHANNEL_DST_REG_OFFSET            0x00017000
#define SEQ_WFSS_CE_REG_WFSS_CE_COMMON_REG_OFFSET                    0x00018000


#endif