buffer_addr_info.h 8.7 KB

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  1. /*
  2. * Copyright (c) 2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. // $ATH_LICENSE_HW_HDR_C$
  17. //
  18. // DO NOT EDIT! This file is automatically generated
  19. // These definitions are tied to a particular hardware layout
  20. #ifndef _BUFFER_ADDR_INFO_H_
  21. #define _BUFFER_ADDR_INFO_H_
  22. #if !defined(__ASSEMBLER__)
  23. #endif
  24. // ################ START SUMMARY #################
  25. //
  26. // Dword Fields
  27. // 0 buffer_addr_31_0[31:0]
  28. // 1 buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
  29. //
  30. // ################ END SUMMARY #################
  31. #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
  32. struct buffer_addr_info {
  33. uint32_t buffer_addr_31_0 : 32; //[31:0]
  34. uint32_t buffer_addr_39_32 : 8, //[7:0]
  35. return_buffer_manager : 3, //[10:8]
  36. sw_buffer_cookie : 21; //[31:11]
  37. };
  38. /*
  39. buffer_addr_31_0
  40. Address (lower 32 bits) of the MSDU buffer OR
  41. MSDU_EXTENSION descriptor OR Link Descriptor
  42. In case of 'NULL' pointer, this field is set to 0
  43. <legal all>
  44. buffer_addr_39_32
  45. Address (upper 8 bits) of the MSDU buffer OR
  46. MSDU_EXTENSION descriptor OR Link Descriptor
  47. In case of 'NULL' pointer, this field is set to 0
  48. <legal all>
  49. return_buffer_manager
  50. Consumer: WBM
  51. Producer: SW/FW
  52. In case of 'NULL' pointer, this field is set to 0
  53. Indicates to which buffer manager the buffer OR
  54. MSDU_EXTENSION descriptor OR link descriptor that is being
  55. pointed to shall be returned after the frame has been
  56. processed. It is used by WBM for routing purposes.
  57. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  58. to the WMB buffer idle list
  59. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  60. returned to the WMB idle link descriptor idle list
  61. <enum 2 FW_BM> This buffer shall be returned to the FW
  62. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  63. ring 0
  64. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  65. ring 1
  66. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  67. ring 2
  68. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  69. ring 3
  70. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  71. ring 3
  72. <legal all>
  73. sw_buffer_cookie
  74. Cookie field exclusively used by SW.
  75. In case of 'NULL' pointer, this field is set to 0
  76. HW ignores the contents, accept that it passes the
  77. programmed value on to other descriptors together with the
  78. physical address
  79. Field can be used by SW to for example associate the
  80. buffers physical address with the virtual address
  81. The bit definitions as used by SW are within SW HLD
  82. specification
  83. NOTE:
  84. The three most significant bits can have a special
  85. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  86. STRUCT, and field transmit_bw_restriction is set
  87. In case of NON punctured transmission:
  88. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  89. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  90. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  91. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  92. In case of punctured transmission:
  93. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  94. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  95. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  96. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  97. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  98. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  99. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  100. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  101. Note: a punctured transmission is indicated by the
  102. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  103. TLV
  104. <legal all>
  105. */
  106. /* Description BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
  107. Address (lower 32 bits) of the MSDU buffer OR
  108. MSDU_EXTENSION descriptor OR Link Descriptor
  109. In case of 'NULL' pointer, this field is set to 0
  110. <legal all>
  111. */
  112. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET 0x00000000
  113. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB 0
  114. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK 0xffffffff
  115. /* Description BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
  116. Address (upper 8 bits) of the MSDU buffer OR
  117. MSDU_EXTENSION descriptor OR Link Descriptor
  118. In case of 'NULL' pointer, this field is set to 0
  119. <legal all>
  120. */
  121. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET 0x00000004
  122. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB 0
  123. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK 0x000000ff
  124. /* Description BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
  125. Consumer: WBM
  126. Producer: SW/FW
  127. In case of 'NULL' pointer, this field is set to 0
  128. Indicates to which buffer manager the buffer OR
  129. MSDU_EXTENSION descriptor OR link descriptor that is being
  130. pointed to shall be returned after the frame has been
  131. processed. It is used by WBM for routing purposes.
  132. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  133. to the WMB buffer idle list
  134. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  135. returned to the WMB idle link descriptor idle list
  136. <enum 2 FW_BM> This buffer shall be returned to the FW
  137. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  138. ring 0
  139. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  140. ring 1
  141. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  142. ring 2
  143. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  144. ring 3
  145. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  146. ring 3
  147. <legal all>
  148. */
  149. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  150. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB 8
  151. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK 0x00000700
  152. /* Description BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
  153. Cookie field exclusively used by SW.
  154. In case of 'NULL' pointer, this field is set to 0
  155. HW ignores the contents, accept that it passes the
  156. programmed value on to other descriptors together with the
  157. physical address
  158. Field can be used by SW to for example associate the
  159. buffers physical address with the virtual address
  160. The bit definitions as used by SW are within SW HLD
  161. specification
  162. NOTE:
  163. The three most significant bits can have a special
  164. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  165. STRUCT, and field transmit_bw_restriction is set
  166. In case of NON punctured transmission:
  167. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  168. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  169. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  170. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  171. In case of punctured transmission:
  172. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  173. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  174. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  175. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  176. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  177. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  178. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  179. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  180. Note: a punctured transmission is indicated by the
  181. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  182. TLV
  183. <legal all>
  184. */
  185. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET 0x00000004
  186. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB 11
  187. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK 0xfffff800
  188. #endif // _BUFFER_ADDR_INFO_H_