reo_destination_ring.h 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729
  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. //
  19. // DO NOT EDIT! This file is automatically generated
  20. // These definitions are tied to a particular hardware layout
  21. #ifndef _REO_DESTINATION_RING_H_
  22. #define _REO_DESTINATION_RING_H_
  23. #if !defined(__ASSEMBLER__)
  24. #endif
  25. #include "buffer_addr_info.h"
  26. #include "rx_mpdu_desc_info.h"
  27. #include "rx_msdu_desc_info.h"
  28. // ################ START SUMMARY #################
  29. //
  30. // Dword Fields
  31. // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
  32. // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  33. // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  34. // 6 rx_reo_queue_desc_addr_31_0[31:0]
  35. // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
  36. // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], reserved_8a[31:13]
  37. // 9 reserved_9a[31:0]
  38. // 10 reserved_10a[31:0]
  39. // 11 reserved_11a[31:0]
  40. // 12 reserved_12a[31:0]
  41. // 13 reserved_13a[31:0]
  42. // 14 reserved_14a[31:0]
  43. // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
  44. //
  45. // ################ END SUMMARY #################
  46. #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
  47. struct reo_destination_ring {
  48. struct buffer_addr_info buf_or_link_desc_addr_info;
  49. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  50. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  51. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  52. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  53. reo_dest_buffer_type : 1, //[8]
  54. reo_push_reason : 2, //[10:9]
  55. reo_error_code : 5, //[15:11]
  56. receive_queue_number : 16; //[31:16]
  57. uint32_t soft_reorder_info_valid : 1, //[0]
  58. reorder_opcode : 4, //[4:1]
  59. reorder_slot_index : 8, //[12:5]
  60. reserved_8a : 19; //[31:13]
  61. uint32_t reserved_9a : 32; //[31:0]
  62. uint32_t reserved_10a : 32; //[31:0]
  63. uint32_t reserved_11a : 32; //[31:0]
  64. uint32_t reserved_12a : 32; //[31:0]
  65. uint32_t reserved_13a : 32; //[31:0]
  66. uint32_t reserved_14a : 32; //[31:0]
  67. uint32_t reserved_15 : 20, //[19:0]
  68. ring_id : 8, //[27:20]
  69. looping_count : 4; //[31:28]
  70. };
  71. /*
  72. struct buffer_addr_info buf_or_link_desc_addr_info
  73. Consumer: REO/SW/FW
  74. Producer: RXDMA
  75. Details of the physical address of the a buffer or MSDU
  76. link descriptor
  77. struct rx_mpdu_desc_info rx_mpdu_desc_info_details
  78. Consumer: REO/SW/FW
  79. Producer: RXDMA
  80. General information related to the MPDU that is passed
  81. on from REO entrance ring to the REO destination ring
  82. struct rx_msdu_desc_info rx_msdu_desc_info_details
  83. General information related to the MSDU that is passed
  84. on from RXDMA all the way to to the REO destination ring.
  85. rx_reo_queue_desc_addr_31_0
  86. Consumer: REO
  87. Producer: RXDMA
  88. Address (lower 32 bits) of the REO queue descriptor.
  89. <legal all>
  90. rx_reo_queue_desc_addr_39_32
  91. Consumer: REO
  92. Producer: RXDMA
  93. Address (upper 8 bits) of the REO queue descriptor.
  94. <legal all>
  95. reo_dest_buffer_type
  96. Indicates the type of address provided in the
  97. 'Buf_or_link_desc_addr_info'
  98. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  99. <enum 1 MSDU_link_desc_address> The address of the MSDU
  100. link descriptor.
  101. <legal all>
  102. reo_push_reason
  103. Indicates why REO pushed the frame to this exit ring
  104. <enum 0 reo_error_detected> Reo detected an error an
  105. pushed this frame to this queue
  106. <enum 1 reo_routing_instruction> Reo pushed the frame to
  107. this queue per received routing instructions. No error
  108. within REO was detected
  109. <legal 0 - 1>
  110. reo_error_code
  111. Field only valid when 'Reo_push_reason' set to
  112. 'reo_error_detected'.
  113. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  114. provided in the REO_ENTRANCE ring is set to 0
  115. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  116. valid bit is NOT set
  117. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  118. session having been setup.
  119. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  120. SSN, Retry bit set: duplicate frame
  121. <enum 4 ba_duplicate> BA session, duplicate frame
  122. <enum 5 regular_frame_2k_jump> A normal (management/data
  123. frame) received with 2K jump in SN
  124. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  125. in SSN
  126. <enum 7 regular_frame_OOR> A normal (management/data
  127. frame) received with SN falling within the OOR window
  128. <enum 8 bar_frame_OOR> A bar received with SSN falling
  129. within the OOR window
  130. <enum 9 bar_frame_no_ba_session> A bar received without
  131. a BA session
  132. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  133. SSN equal to SN
  134. <enum 11 pn_check_failed> PN Check Failed packet.
  135. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  136. as a result of the 'Seq_2k_error_detected_flag' been set in
  137. the REO Queue descriptor
  138. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  139. as a result of the 'pn_error_detected_flag' been set in the
  140. REO Queue descriptor
  141. <enum 14 queue_descriptor_blocked_set> Frame is
  142. forwarded as a result of the queue descriptor(address) being
  143. blocked as SW/FW seems to be currently in the process of
  144. making updates to this descriptor...
  145. <legal 0-14>
  146. receive_queue_number
  147. This field indicates the REO MPDU reorder queue ID from
  148. which this frame originated. This field is populated from a
  149. field with the same name in the RX_REO_QUEUE descriptor.
  150. <legal all>
  151. soft_reorder_info_valid
  152. When set, REO has been instructed to not perform the
  153. actual re-ordering of frames for this queue, but just to
  154. insert the reorder opcodes
  155. <legal all>
  156. reorder_opcode
  157. Field is valid when 'Soft_reorder_info_valid' is set.
  158. This field is always valid for debug purpose as well.
  159. Details are in the MLD.
  160. <enum 0 invalid>
  161. <enum 1 fwdcur_fwdbuf>
  162. <enum 2 fwdbuf_fwdcur>
  163. <enum 3 qcur>
  164. <enum 4 fwdbuf_qcur>
  165. <enum 5 fwdbuf_drop>
  166. <enum 6 fwdall_drop>
  167. <enum 7 fwdall_qcur>
  168. <enum 8 reserved_reo_opcode_1>
  169. <enum 9 dropcur> the error reason code is in
  170. reo_error_code field.
  171. <enum 10 reserved_reo_opcode_2>
  172. <enum 11 reserved_reo_opcode_3>
  173. <enum 12 reserved_reo_opcode_4>
  174. <enum 13 reserved_reo_opcode_5>
  175. <enum 14 reserved_reo_opcode_6>
  176. <enum 15 reserved_reo_opcode_7>
  177. <legal all>
  178. reorder_slot_index
  179. Field only valid when 'Soft_reorder_info_valid' is set.
  180. TODO: add description
  181. <legal all>
  182. reserved_8a
  183. <legal 0>
  184. reserved_9a
  185. <legal 0>
  186. reserved_10a
  187. <legal 0>
  188. reserved_11a
  189. <legal 0>
  190. reserved_12a
  191. <legal 0>
  192. reserved_13a
  193. <legal 0>
  194. reserved_14a
  195. <legal 0>
  196. reserved_15
  197. <legal 0>
  198. ring_id
  199. The buffer pointer ring ID.
  200. 0 refers to the IDLE ring
  201. 1 - N refers to other rings
  202. Helps with debugging when dumping ring contents.
  203. <legal all>
  204. looping_count
  205. A count value that indicates the number of times the
  206. producer of entries into this Ring has looped around the
  207. ring.
  208. At initialization time, this value is set to 0. On the
  209. first loop, this value is set to 1. After the max value is
  210. reached allowed by the number of bits for this field, the
  211. count value continues with 0 again.
  212. In case SW is the consumer of the ring entries, it can
  213. use this field to figure out up to where the producer of
  214. entries has created new entries. This eliminates the need to
  215. check where the head pointer' of the ring is located once
  216. the SW starts processing an interrupt indicating that new
  217. entries have been put into this ring...
  218. Also note that SW if it wants only needs to look at the
  219. LSB bit of this count value.
  220. <legal all>
  221. */
  222. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000000
  223. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
  224. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
  225. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000004
  226. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
  227. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
  228. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x00000008
  229. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
  230. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
  231. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x0000000c
  232. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
  233. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
  234. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000010
  235. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
  236. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
  237. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000014
  238. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
  239. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
  240. /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
  241. Consumer: REO
  242. Producer: RXDMA
  243. Address (lower 32 bits) of the REO queue descriptor.
  244. <legal all>
  245. */
  246. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
  247. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  248. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  249. /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
  250. Consumer: REO
  251. Producer: RXDMA
  252. Address (upper 8 bits) of the REO queue descriptor.
  253. <legal all>
  254. */
  255. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
  256. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  257. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  258. /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
  259. Indicates the type of address provided in the
  260. 'Buf_or_link_desc_addr_info'
  261. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  262. <enum 1 MSDU_link_desc_address> The address of the MSDU
  263. link descriptor.
  264. <legal all>
  265. */
  266. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  267. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
  268. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
  269. /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
  270. Indicates why REO pushed the frame to this exit ring
  271. <enum 0 reo_error_detected> Reo detected an error an
  272. pushed this frame to this queue
  273. <enum 1 reo_routing_instruction> Reo pushed the frame to
  274. this queue per received routing instructions. No error
  275. within REO was detected
  276. <legal 0 - 1>
  277. */
  278. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
  279. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
  280. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
  281. /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
  282. Field only valid when 'Reo_push_reason' set to
  283. 'reo_error_detected'.
  284. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  285. provided in the REO_ENTRANCE ring is set to 0
  286. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  287. valid bit is NOT set
  288. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  289. session having been setup.
  290. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  291. SSN, Retry bit set: duplicate frame
  292. <enum 4 ba_duplicate> BA session, duplicate frame
  293. <enum 5 regular_frame_2k_jump> A normal (management/data
  294. frame) received with 2K jump in SN
  295. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  296. in SSN
  297. <enum 7 regular_frame_OOR> A normal (management/data
  298. frame) received with SN falling within the OOR window
  299. <enum 8 bar_frame_OOR> A bar received with SSN falling
  300. within the OOR window
  301. <enum 9 bar_frame_no_ba_session> A bar received without
  302. a BA session
  303. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  304. SSN equal to SN
  305. <enum 11 pn_check_failed> PN Check Failed packet.
  306. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  307. as a result of the 'Seq_2k_error_detected_flag' been set in
  308. the REO Queue descriptor
  309. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  310. as a result of the 'pn_error_detected_flag' been set in the
  311. REO Queue descriptor
  312. <enum 14 queue_descriptor_blocked_set> Frame is
  313. forwarded as a result of the queue descriptor(address) being
  314. blocked as SW/FW seems to be currently in the process of
  315. making updates to this descriptor...
  316. <legal 0-14>
  317. */
  318. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
  319. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
  320. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
  321. /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
  322. This field indicates the REO MPDU reorder queue ID from
  323. which this frame originated. This field is populated from a
  324. field with the same name in the RX_REO_QUEUE descriptor.
  325. <legal all>
  326. */
  327. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
  328. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
  329. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
  330. /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
  331. When set, REO has been instructed to not perform the
  332. actual re-ordering of frames for this queue, but just to
  333. insert the reorder opcodes
  334. <legal all>
  335. */
  336. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
  337. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
  338. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
  339. /* Description REO_DESTINATION_RING_8_REORDER_OPCODE
  340. Field is valid when 'Soft_reorder_info_valid' is set.
  341. This field is always valid for debug purpose as well.
  342. Details are in the MLD.
  343. <enum 0 invalid>
  344. <enum 1 fwdcur_fwdbuf>
  345. <enum 2 fwdbuf_fwdcur>
  346. <enum 3 qcur>
  347. <enum 4 fwdbuf_qcur>
  348. <enum 5 fwdbuf_drop>
  349. <enum 6 fwdall_drop>
  350. <enum 7 fwdall_qcur>
  351. <enum 8 reserved_reo_opcode_1>
  352. <enum 9 dropcur> the error reason code is in
  353. reo_error_code field.
  354. <enum 10 reserved_reo_opcode_2>
  355. <enum 11 reserved_reo_opcode_3>
  356. <enum 12 reserved_reo_opcode_4>
  357. <enum 13 reserved_reo_opcode_5>
  358. <enum 14 reserved_reo_opcode_6>
  359. <enum 15 reserved_reo_opcode_7>
  360. <legal all>
  361. */
  362. #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
  363. #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
  364. #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
  365. /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
  366. Field only valid when 'Soft_reorder_info_valid' is set.
  367. TODO: add description
  368. <legal all>
  369. */
  370. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
  371. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
  372. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
  373. /* Description REO_DESTINATION_RING_8_RESERVED_8A
  374. <legal 0>
  375. */
  376. #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
  377. #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 13
  378. #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xffffe000
  379. /* Description REO_DESTINATION_RING_9_RESERVED_9A
  380. <legal 0>
  381. */
  382. #define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET 0x00000024
  383. #define REO_DESTINATION_RING_9_RESERVED_9A_LSB 0
  384. #define REO_DESTINATION_RING_9_RESERVED_9A_MASK 0xffffffff
  385. /* Description REO_DESTINATION_RING_10_RESERVED_10A
  386. <legal 0>
  387. */
  388. #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
  389. #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
  390. #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
  391. /* Description REO_DESTINATION_RING_11_RESERVED_11A
  392. <legal 0>
  393. */
  394. #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
  395. #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
  396. #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
  397. /* Description REO_DESTINATION_RING_12_RESERVED_12A
  398. <legal 0>
  399. */
  400. #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
  401. #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
  402. #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
  403. /* Description REO_DESTINATION_RING_13_RESERVED_13A
  404. <legal 0>
  405. */
  406. #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
  407. #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
  408. #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
  409. /* Description REO_DESTINATION_RING_14_RESERVED_14A
  410. <legal 0>
  411. */
  412. #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
  413. #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
  414. #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
  415. /* Description REO_DESTINATION_RING_15_RESERVED_15
  416. <legal 0>
  417. */
  418. #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
  419. #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
  420. #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
  421. /* Description REO_DESTINATION_RING_15_RING_ID
  422. The buffer pointer ring ID.
  423. 0 refers to the IDLE ring
  424. 1 - N refers to other rings
  425. Helps with debugging when dumping ring contents.
  426. <legal all>
  427. */
  428. #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
  429. #define REO_DESTINATION_RING_15_RING_ID_LSB 20
  430. #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
  431. /* Description REO_DESTINATION_RING_15_LOOPING_COUNT
  432. A count value that indicates the number of times the
  433. producer of entries into this Ring has looped around the
  434. ring.
  435. At initialization time, this value is set to 0. On the
  436. first loop, this value is set to 1. After the max value is
  437. reached allowed by the number of bits for this field, the
  438. count value continues with 0 again.
  439. In case SW is the consumer of the ring entries, it can
  440. use this field to figure out up to where the producer of
  441. entries has created new entries. This eliminates the need to
  442. check where the head pointer' of the ring is located once
  443. the SW starts processing an interrupt indicating that new
  444. entries have been put into this ring...
  445. Also note that SW if it wants only needs to look at the
  446. LSB bit of this count value.
  447. <legal all>
  448. */
  449. #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
  450. #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
  451. #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
  452. #endif // _REO_DESTINATION_RING_H_