reo_destination_ring.h 21 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. // $ATH_LICENSE_HW_HDR_C$
  19. //
  20. // DO NOT EDIT! This file is automatically generated
  21. // These definitions are tied to a particular hardware layout
  22. #ifndef _REO_DESTINATION_RING_H_
  23. #define _REO_DESTINATION_RING_H_
  24. #if !defined(__ASSEMBLER__)
  25. #endif
  26. #include "buffer_addr_info.h"
  27. #include "rx_mpdu_desc_info.h"
  28. #include "rx_msdu_desc_info.h"
  29. // ################ START SUMMARY #################
  30. //
  31. // Dword Fields
  32. // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
  33. // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  34. // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  35. // 6 rx_reo_queue_desc_addr_31_0[31:0]
  36. // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
  37. // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], reserved_8a[31:13]
  38. // 9 reserved_9a[31:0]
  39. // 10 reserved_10a[31:0]
  40. // 11 reserved_11a[31:0]
  41. // 12 reserved_12a[31:0]
  42. // 13 reserved_13a[31:0]
  43. // 14 reserved_14a[31:0]
  44. // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
  45. //
  46. // ################ END SUMMARY #################
  47. #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
  48. struct reo_destination_ring {
  49. struct buffer_addr_info buf_or_link_desc_addr_info;
  50. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  51. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  52. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  53. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  54. reo_dest_buffer_type : 1, //[8]
  55. reo_push_reason : 2, //[10:9]
  56. reo_error_code : 5, //[15:11]
  57. receive_queue_number : 16; //[31:16]
  58. uint32_t soft_reorder_info_valid : 1, //[0]
  59. reorder_opcode : 4, //[4:1]
  60. reorder_slot_index : 8, //[12:5]
  61. reserved_8a : 19; //[31:13]
  62. uint32_t reserved_9a : 32; //[31:0]
  63. uint32_t reserved_10a : 32; //[31:0]
  64. uint32_t reserved_11a : 32; //[31:0]
  65. uint32_t reserved_12a : 32; //[31:0]
  66. uint32_t reserved_13a : 32; //[31:0]
  67. uint32_t reserved_14a : 32; //[31:0]
  68. uint32_t reserved_15 : 20, //[19:0]
  69. ring_id : 8, //[27:20]
  70. looping_count : 4; //[31:28]
  71. };
  72. /*
  73. struct buffer_addr_info buf_or_link_desc_addr_info
  74. Consumer: REO/SW/FW
  75. Producer: RXDMA
  76. Details of the physical address of the a buffer or MSDU
  77. link descriptor
  78. struct rx_mpdu_desc_info rx_mpdu_desc_info_details
  79. Consumer: REO/SW/FW
  80. Producer: RXDMA
  81. General information related to the MPDU that is passed
  82. on from REO entrance ring to the REO destination ring
  83. struct rx_msdu_desc_info rx_msdu_desc_info_details
  84. General information related to the MSDU that is passed
  85. on from RXDMA all the way to to the REO destination ring.
  86. rx_reo_queue_desc_addr_31_0
  87. Consumer: REO
  88. Producer: RXDMA
  89. Address (lower 32 bits) of the REO queue descriptor.
  90. <legal all>
  91. rx_reo_queue_desc_addr_39_32
  92. Consumer: REO
  93. Producer: RXDMA
  94. Address (upper 8 bits) of the REO queue descriptor.
  95. <legal all>
  96. reo_dest_buffer_type
  97. Indicates the type of address provided in the
  98. 'Buf_or_link_desc_addr_info'
  99. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  100. <enum 1 MSDU_link_desc_address> The address of the MSDU
  101. link descriptor.
  102. <legal all>
  103. reo_push_reason
  104. Indicates why REO pushed the frame to this exit ring
  105. <enum 0 reo_error_detected> Reo detected an error an
  106. pushed this frame to this queue
  107. <enum 1 reo_routing_instruction> Reo pushed the frame to
  108. this queue per received routing instructions. No error
  109. within REO was detected
  110. <legal 0 - 1>
  111. reo_error_code
  112. Field only valid when 'Reo_push_reason' set to
  113. 'reo_error_detected'.
  114. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  115. provided in the REO_ENTRANCE ring is set to 0
  116. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  117. valid bit is NOT set
  118. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  119. session having been setup.
  120. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  121. SSN, Retry bit set: duplicate frame
  122. <enum 4 ba_duplicate> BA session, duplicate frame
  123. <enum 5 regular_frame_2k_jump> A normal (management/data
  124. frame) received with 2K jump in SN
  125. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  126. in SSN
  127. <enum 7 regular_frame_OOR> A normal (management/data
  128. frame) received with SN falling within the OOR window
  129. <enum 8 bar_frame_OOR> A bar received with SSN falling
  130. within the OOR window
  131. <enum 9 bar_frame_no_ba_session> A bar received without
  132. a BA session
  133. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  134. SSN equal to SN
  135. <enum 11 pn_check_failed> PN Check Failed packet.
  136. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  137. as a result of the 'Seq_2k_error_detected_flag' been set in
  138. the REO Queue descriptor
  139. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  140. as a result of the 'pn_error_detected_flag' been set in the
  141. REO Queue descriptor
  142. <enum 14 queue_descriptor_blocked_set> Frame is
  143. forwarded as a result of the queue descriptor(address) being
  144. blocked as SW/FW seems to be currently in the process of
  145. making updates to this descriptor...
  146. <legal 0-14>
  147. receive_queue_number
  148. This field indicates the REO MPDU reorder queue ID from
  149. which this frame originated. This field is populated from a
  150. field with the same name in the RX_REO_QUEUE descriptor.
  151. <legal all>
  152. soft_reorder_info_valid
  153. When set, REO has been instructed to not perform the
  154. actual re-ordering of frames for this queue, but just to
  155. insert the reorder opcodes
  156. <legal all>
  157. reorder_opcode
  158. Field is valid when 'Soft_reorder_info_valid' is set.
  159. This field is always valid for debug purpose as well.
  160. Details are in the MLD.
  161. <enum 0 invalid>
  162. <enum 1 fwdcur_fwdbuf>
  163. <enum 2 fwdbuf_fwdcur>
  164. <enum 3 qcur>
  165. <enum 4 fwdbuf_qcur>
  166. <enum 5 fwdbuf_drop>
  167. <enum 6 fwdall_drop>
  168. <enum 7 fwdall_qcur>
  169. <enum 8 reserved_reo_opcode_1>
  170. <enum 9 dropcur> the error reason code is in
  171. reo_error_code field.
  172. <enum 10 reserved_reo_opcode_2>
  173. <enum 11 reserved_reo_opcode_3>
  174. <enum 12 reserved_reo_opcode_4>
  175. <enum 13 reserved_reo_opcode_5>
  176. <enum 14 reserved_reo_opcode_6>
  177. <enum 15 reserved_reo_opcode_7>
  178. <legal all>
  179. reorder_slot_index
  180. Field only valid when 'Soft_reorder_info_valid' is set.
  181. TODO: add description
  182. <legal all>
  183. reserved_8a
  184. <legal 0>
  185. reserved_9a
  186. <legal 0>
  187. reserved_10a
  188. <legal 0>
  189. reserved_11a
  190. <legal 0>
  191. reserved_12a
  192. <legal 0>
  193. reserved_13a
  194. <legal 0>
  195. reserved_14a
  196. <legal 0>
  197. reserved_15
  198. <legal 0>
  199. ring_id
  200. The buffer pointer ring ID.
  201. 0 refers to the IDLE ring
  202. 1 - N refers to other rings
  203. Helps with debugging when dumping ring contents.
  204. <legal all>
  205. looping_count
  206. A count value that indicates the number of times the
  207. producer of entries into this Ring has looped around the
  208. ring.
  209. At initialization time, this value is set to 0. On the
  210. first loop, this value is set to 1. After the max value is
  211. reached allowed by the number of bits for this field, the
  212. count value continues with 0 again.
  213. In case SW is the consumer of the ring entries, it can
  214. use this field to figure out up to where the producer of
  215. entries has created new entries. This eliminates the need to
  216. check where the head pointer' of the ring is located once
  217. the SW starts processing an interrupt indicating that new
  218. entries have been put into this ring...
  219. Also note that SW if it wants only needs to look at the
  220. LSB bit of this count value.
  221. <legal all>
  222. */
  223. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000000
  224. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
  225. #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
  226. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000004
  227. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
  228. #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
  229. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x00000008
  230. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
  231. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
  232. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x0000000c
  233. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
  234. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
  235. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000010
  236. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
  237. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
  238. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000014
  239. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
  240. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
  241. /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
  242. Consumer: REO
  243. Producer: RXDMA
  244. Address (lower 32 bits) of the REO queue descriptor.
  245. <legal all>
  246. */
  247. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
  248. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  249. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  250. /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
  251. Consumer: REO
  252. Producer: RXDMA
  253. Address (upper 8 bits) of the REO queue descriptor.
  254. <legal all>
  255. */
  256. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
  257. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  258. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  259. /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
  260. Indicates the type of address provided in the
  261. 'Buf_or_link_desc_addr_info'
  262. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  263. <enum 1 MSDU_link_desc_address> The address of the MSDU
  264. link descriptor.
  265. <legal all>
  266. */
  267. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  268. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
  269. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
  270. /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
  271. Indicates why REO pushed the frame to this exit ring
  272. <enum 0 reo_error_detected> Reo detected an error an
  273. pushed this frame to this queue
  274. <enum 1 reo_routing_instruction> Reo pushed the frame to
  275. this queue per received routing instructions. No error
  276. within REO was detected
  277. <legal 0 - 1>
  278. */
  279. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
  280. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
  281. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
  282. /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
  283. Field only valid when 'Reo_push_reason' set to
  284. 'reo_error_detected'.
  285. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  286. provided in the REO_ENTRANCE ring is set to 0
  287. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  288. valid bit is NOT set
  289. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  290. session having been setup.
  291. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  292. SSN, Retry bit set: duplicate frame
  293. <enum 4 ba_duplicate> BA session, duplicate frame
  294. <enum 5 regular_frame_2k_jump> A normal (management/data
  295. frame) received with 2K jump in SN
  296. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  297. in SSN
  298. <enum 7 regular_frame_OOR> A normal (management/data
  299. frame) received with SN falling within the OOR window
  300. <enum 8 bar_frame_OOR> A bar received with SSN falling
  301. within the OOR window
  302. <enum 9 bar_frame_no_ba_session> A bar received without
  303. a BA session
  304. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  305. SSN equal to SN
  306. <enum 11 pn_check_failed> PN Check Failed packet.
  307. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  308. as a result of the 'Seq_2k_error_detected_flag' been set in
  309. the REO Queue descriptor
  310. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  311. as a result of the 'pn_error_detected_flag' been set in the
  312. REO Queue descriptor
  313. <enum 14 queue_descriptor_blocked_set> Frame is
  314. forwarded as a result of the queue descriptor(address) being
  315. blocked as SW/FW seems to be currently in the process of
  316. making updates to this descriptor...
  317. <legal 0-14>
  318. */
  319. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
  320. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
  321. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
  322. /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
  323. This field indicates the REO MPDU reorder queue ID from
  324. which this frame originated. This field is populated from a
  325. field with the same name in the RX_REO_QUEUE descriptor.
  326. <legal all>
  327. */
  328. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
  329. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
  330. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
  331. /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
  332. When set, REO has been instructed to not perform the
  333. actual re-ordering of frames for this queue, but just to
  334. insert the reorder opcodes
  335. <legal all>
  336. */
  337. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
  338. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
  339. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
  340. /* Description REO_DESTINATION_RING_8_REORDER_OPCODE
  341. Field is valid when 'Soft_reorder_info_valid' is set.
  342. This field is always valid for debug purpose as well.
  343. Details are in the MLD.
  344. <enum 0 invalid>
  345. <enum 1 fwdcur_fwdbuf>
  346. <enum 2 fwdbuf_fwdcur>
  347. <enum 3 qcur>
  348. <enum 4 fwdbuf_qcur>
  349. <enum 5 fwdbuf_drop>
  350. <enum 6 fwdall_drop>
  351. <enum 7 fwdall_qcur>
  352. <enum 8 reserved_reo_opcode_1>
  353. <enum 9 dropcur> the error reason code is in
  354. reo_error_code field.
  355. <enum 10 reserved_reo_opcode_2>
  356. <enum 11 reserved_reo_opcode_3>
  357. <enum 12 reserved_reo_opcode_4>
  358. <enum 13 reserved_reo_opcode_5>
  359. <enum 14 reserved_reo_opcode_6>
  360. <enum 15 reserved_reo_opcode_7>
  361. <legal all>
  362. */
  363. #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
  364. #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
  365. #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
  366. /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
  367. Field only valid when 'Soft_reorder_info_valid' is set.
  368. TODO: add description
  369. <legal all>
  370. */
  371. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
  372. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
  373. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
  374. /* Description REO_DESTINATION_RING_8_RESERVED_8A
  375. <legal 0>
  376. */
  377. #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
  378. #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 13
  379. #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xffffe000
  380. /* Description REO_DESTINATION_RING_9_RESERVED_9A
  381. <legal 0>
  382. */
  383. #define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET 0x00000024
  384. #define REO_DESTINATION_RING_9_RESERVED_9A_LSB 0
  385. #define REO_DESTINATION_RING_9_RESERVED_9A_MASK 0xffffffff
  386. /* Description REO_DESTINATION_RING_10_RESERVED_10A
  387. <legal 0>
  388. */
  389. #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
  390. #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
  391. #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
  392. /* Description REO_DESTINATION_RING_11_RESERVED_11A
  393. <legal 0>
  394. */
  395. #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
  396. #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
  397. #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
  398. /* Description REO_DESTINATION_RING_12_RESERVED_12A
  399. <legal 0>
  400. */
  401. #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
  402. #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
  403. #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
  404. /* Description REO_DESTINATION_RING_13_RESERVED_13A
  405. <legal 0>
  406. */
  407. #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
  408. #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
  409. #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
  410. /* Description REO_DESTINATION_RING_14_RESERVED_14A
  411. <legal 0>
  412. */
  413. #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
  414. #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
  415. #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
  416. /* Description REO_DESTINATION_RING_15_RESERVED_15
  417. <legal 0>
  418. */
  419. #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
  420. #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
  421. #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
  422. /* Description REO_DESTINATION_RING_15_RING_ID
  423. The buffer pointer ring ID.
  424. 0 refers to the IDLE ring
  425. 1 - N refers to other rings
  426. Helps with debugging when dumping ring contents.
  427. <legal all>
  428. */
  429. #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
  430. #define REO_DESTINATION_RING_15_RING_ID_LSB 20
  431. #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
  432. /* Description REO_DESTINATION_RING_15_LOOPING_COUNT
  433. A count value that indicates the number of times the
  434. producer of entries into this Ring has looped around the
  435. ring.
  436. At initialization time, this value is set to 0. On the
  437. first loop, this value is set to 1. After the max value is
  438. reached allowed by the number of bits for this field, the
  439. count value continues with 0 again.
  440. In case SW is the consumer of the ring entries, it can
  441. use this field to figure out up to where the producer of
  442. entries has created new entries. This eliminates the need to
  443. check where the head pointer' of the ring is located once
  444. the SW starts processing an interrupt indicating that new
  445. entries have been put into this ring...
  446. Also note that SW if it wants only needs to look at the
  447. LSB bit of this count value.
  448. <legal all>
  449. */
  450. #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
  451. #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
  452. #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
  453. #endif // _REO_DESTINATION_RING_H_