2d29d9afc7
Add HW header files to bring-in support for Peach WIFI. Change-Id: I73ee0a2c4f22a90013b441ecd5e666d673d77ae0 CRs-Fixed: 3580269
459 行
33 KiB
C
459 行
33 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _TX_CBF_INFO_H_
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#define _TX_CBF_INFO_H_
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#define NUM_OF_DWORDS_TX_CBF_INFO 15
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struct tx_cbf_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t sw_peer_id : 16,
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pre_cbf_duration : 16;
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uint32_t brpoll_info_valid : 1,
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trigger_brpoll_info_valid : 1,
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npda_info_11ac_valid : 1,
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npda_info_11ax_valid : 1,
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dot11ax_su_extended : 1,
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bandwidth : 3,
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brpoll_info : 8,
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cbf_response_table_base_index : 8,
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peer_index : 3,
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pkt_type : 4,
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txop_duration_all_ones : 1;
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uint32_t trigger_brpoll_common_info_15_0 : 16,
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trigger_brpoll_common_info_31_16 : 16;
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uint32_t trigger_brpoll_user_info_15_0 : 16,
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trigger_brpoll_user_info_31_16 : 16;
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uint32_t addr1_31_0 : 32;
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uint32_t addr1_47_32 : 16,
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addr2_15_0 : 16;
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uint32_t addr2_47_16 : 32;
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uint32_t addr3_31_0 : 32;
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uint32_t addr3_47_32 : 16,
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sta_partial_aid : 11,
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reserved_8a : 4,
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cbf_resp_pwr_mgmt : 1;
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uint32_t group_id : 6,
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rssi_comb : 8,
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reserved_9a : 2,
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vht_ndpa_sta_info : 16;
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uint32_t he_eht_sta_info_15_0 : 16,
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he_eht_sta_info_31_16 : 16;
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uint32_t dot11ax_received_format_indication : 1,
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dot11ax_received_dl_ul_flag : 1,
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dot11ax_received_bss_color_id : 6,
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dot11ax_received_spatial_reuse : 4,
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dot11ax_received_cp_size : 2,
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dot11ax_received_ltf_size : 2,
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dot11ax_received_coding : 1,
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dot11ax_received_dcm : 1,
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dot11ax_received_doppler_indication : 1,
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dot11ax_received_ext_ru_size : 4,
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dot11ax_dl_ul_flag : 1,
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reserved_11a : 8;
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uint32_t sw_response_frame_length : 16,
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sw_response_tlv_from_crypto : 1,
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wait_sifs_config_valid : 1,
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wait_sifs : 2,
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__reserved_g_0005 : 1,
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secure : 1,
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tb___reserved_g_0005_response_required : 2,
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emlsr_main_tlv_if : 1,
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reserved_12a : 1,
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u_sig_puncture_pattern_encoding : 6;
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uint32_t dot11be_puncture_bitmap : 16,
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dot11be_response : 1,
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punctured_response : 1,
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npda_info_11be_valid : 1,
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eht_duplicate_mode : 2,
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reserved_13a : 11;
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uint32_t eht_sta_info_39_32 : 8,
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reserved_14a : 24;
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#else
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uint32_t pre_cbf_duration : 16,
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sw_peer_id : 16;
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uint32_t txop_duration_all_ones : 1,
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pkt_type : 4,
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peer_index : 3,
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cbf_response_table_base_index : 8,
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brpoll_info : 8,
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bandwidth : 3,
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dot11ax_su_extended : 1,
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npda_info_11ax_valid : 1,
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npda_info_11ac_valid : 1,
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trigger_brpoll_info_valid : 1,
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brpoll_info_valid : 1;
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uint32_t trigger_brpoll_common_info_31_16 : 16,
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trigger_brpoll_common_info_15_0 : 16;
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uint32_t trigger_brpoll_user_info_31_16 : 16,
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trigger_brpoll_user_info_15_0 : 16;
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uint32_t addr1_31_0 : 32;
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uint32_t addr2_15_0 : 16,
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addr1_47_32 : 16;
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uint32_t addr2_47_16 : 32;
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uint32_t addr3_31_0 : 32;
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uint32_t cbf_resp_pwr_mgmt : 1,
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reserved_8a : 4,
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sta_partial_aid : 11,
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addr3_47_32 : 16;
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uint32_t vht_ndpa_sta_info : 16,
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reserved_9a : 2,
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rssi_comb : 8,
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group_id : 6;
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uint32_t he_eht_sta_info_31_16 : 16,
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he_eht_sta_info_15_0 : 16;
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uint32_t reserved_11a : 8,
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dot11ax_dl_ul_flag : 1,
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dot11ax_received_ext_ru_size : 4,
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dot11ax_received_doppler_indication : 1,
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dot11ax_received_dcm : 1,
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dot11ax_received_coding : 1,
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dot11ax_received_ltf_size : 2,
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dot11ax_received_cp_size : 2,
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dot11ax_received_spatial_reuse : 4,
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dot11ax_received_bss_color_id : 6,
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dot11ax_received_dl_ul_flag : 1,
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dot11ax_received_format_indication : 1;
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uint32_t u_sig_puncture_pattern_encoding : 6,
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reserved_12a : 1,
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emlsr_main_tlv_if : 1,
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tb___reserved_g_0005_response_required : 2,
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secure : 1,
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__reserved_g_0005 : 1,
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wait_sifs : 2,
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wait_sifs_config_valid : 1,
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sw_response_tlv_from_crypto : 1,
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sw_response_frame_length : 16;
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uint32_t reserved_13a : 11,
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eht_duplicate_mode : 2,
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npda_info_11be_valid : 1,
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punctured_response : 1,
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dot11be_response : 1,
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dot11be_puncture_bitmap : 16;
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uint32_t reserved_14a : 24,
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eht_sta_info_39_32 : 8;
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#endif
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};
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#define TX_CBF_INFO_SW_PEER_ID_OFFSET 0x00000000
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#define TX_CBF_INFO_SW_PEER_ID_LSB 0
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#define TX_CBF_INFO_SW_PEER_ID_MSB 15
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#define TX_CBF_INFO_SW_PEER_ID_MASK 0x0000ffff
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#define TX_CBF_INFO_PRE_CBF_DURATION_OFFSET 0x00000000
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#define TX_CBF_INFO_PRE_CBF_DURATION_LSB 16
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#define TX_CBF_INFO_PRE_CBF_DURATION_MSB 31
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#define TX_CBF_INFO_PRE_CBF_DURATION_MASK 0xffff0000
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#define TX_CBF_INFO_BRPOLL_INFO_VALID_OFFSET 0x00000004
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#define TX_CBF_INFO_BRPOLL_INFO_VALID_LSB 0
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#define TX_CBF_INFO_BRPOLL_INFO_VALID_MSB 0
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#define TX_CBF_INFO_BRPOLL_INFO_VALID_MASK 0x00000001
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#define TX_CBF_INFO_TRIGGER_BRPOLL_INFO_VALID_OFFSET 0x00000004
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#define TX_CBF_INFO_TRIGGER_BRPOLL_INFO_VALID_LSB 1
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#define TX_CBF_INFO_TRIGGER_BRPOLL_INFO_VALID_MSB 1
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#define TX_CBF_INFO_TRIGGER_BRPOLL_INFO_VALID_MASK 0x00000002
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#define TX_CBF_INFO_NPDA_INFO_11AC_VALID_OFFSET 0x00000004
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#define TX_CBF_INFO_NPDA_INFO_11AC_VALID_LSB 2
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#define TX_CBF_INFO_NPDA_INFO_11AC_VALID_MSB 2
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#define TX_CBF_INFO_NPDA_INFO_11AC_VALID_MASK 0x00000004
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#define TX_CBF_INFO_NPDA_INFO_11AX_VALID_OFFSET 0x00000004
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#define TX_CBF_INFO_NPDA_INFO_11AX_VALID_LSB 3
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#define TX_CBF_INFO_NPDA_INFO_11AX_VALID_MSB 3
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#define TX_CBF_INFO_NPDA_INFO_11AX_VALID_MASK 0x00000008
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#define TX_CBF_INFO_DOT11AX_SU_EXTENDED_OFFSET 0x00000004
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#define TX_CBF_INFO_DOT11AX_SU_EXTENDED_LSB 4
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#define TX_CBF_INFO_DOT11AX_SU_EXTENDED_MSB 4
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#define TX_CBF_INFO_DOT11AX_SU_EXTENDED_MASK 0x00000010
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#define TX_CBF_INFO_BANDWIDTH_OFFSET 0x00000004
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#define TX_CBF_INFO_BANDWIDTH_LSB 5
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#define TX_CBF_INFO_BANDWIDTH_MSB 7
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#define TX_CBF_INFO_BANDWIDTH_MASK 0x000000e0
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#define TX_CBF_INFO_BRPOLL_INFO_OFFSET 0x00000004
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#define TX_CBF_INFO_BRPOLL_INFO_LSB 8
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#define TX_CBF_INFO_BRPOLL_INFO_MSB 15
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#define TX_CBF_INFO_BRPOLL_INFO_MASK 0x0000ff00
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#define TX_CBF_INFO_CBF_RESPONSE_TABLE_BASE_INDEX_OFFSET 0x00000004
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#define TX_CBF_INFO_CBF_RESPONSE_TABLE_BASE_INDEX_LSB 16
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#define TX_CBF_INFO_CBF_RESPONSE_TABLE_BASE_INDEX_MSB 23
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#define TX_CBF_INFO_CBF_RESPONSE_TABLE_BASE_INDEX_MASK 0x00ff0000
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#define TX_CBF_INFO_PEER_INDEX_OFFSET 0x00000004
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#define TX_CBF_INFO_PEER_INDEX_LSB 24
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#define TX_CBF_INFO_PEER_INDEX_MSB 26
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#define TX_CBF_INFO_PEER_INDEX_MASK 0x07000000
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#define TX_CBF_INFO_PKT_TYPE_OFFSET 0x00000004
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#define TX_CBF_INFO_PKT_TYPE_LSB 27
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#define TX_CBF_INFO_PKT_TYPE_MSB 30
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#define TX_CBF_INFO_PKT_TYPE_MASK 0x78000000
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#define TX_CBF_INFO_TXOP_DURATION_ALL_ONES_OFFSET 0x00000004
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#define TX_CBF_INFO_TXOP_DURATION_ALL_ONES_LSB 31
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#define TX_CBF_INFO_TXOP_DURATION_ALL_ONES_MSB 31
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#define TX_CBF_INFO_TXOP_DURATION_ALL_ONES_MASK 0x80000000
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_15_0_OFFSET 0x00000008
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_15_0_LSB 0
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_15_0_MSB 15
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_15_0_MASK 0x0000ffff
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_31_16_OFFSET 0x00000008
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_31_16_LSB 16
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_31_16_MSB 31
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#define TX_CBF_INFO_TRIGGER_BRPOLL_COMMON_INFO_31_16_MASK 0xffff0000
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_15_0_OFFSET 0x0000000c
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_15_0_LSB 0
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_15_0_MSB 15
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_15_0_MASK 0x0000ffff
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_31_16_OFFSET 0x0000000c
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_31_16_LSB 16
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_31_16_MSB 31
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#define TX_CBF_INFO_TRIGGER_BRPOLL_USER_INFO_31_16_MASK 0xffff0000
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#define TX_CBF_INFO_ADDR1_31_0_OFFSET 0x00000010
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#define TX_CBF_INFO_ADDR1_31_0_LSB 0
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#define TX_CBF_INFO_ADDR1_31_0_MSB 31
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#define TX_CBF_INFO_ADDR1_31_0_MASK 0xffffffff
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#define TX_CBF_INFO_ADDR1_47_32_OFFSET 0x00000014
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#define TX_CBF_INFO_ADDR1_47_32_LSB 0
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#define TX_CBF_INFO_ADDR1_47_32_MSB 15
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#define TX_CBF_INFO_ADDR1_47_32_MASK 0x0000ffff
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#define TX_CBF_INFO_ADDR2_15_0_OFFSET 0x00000014
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#define TX_CBF_INFO_ADDR2_15_0_LSB 16
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#define TX_CBF_INFO_ADDR2_15_0_MSB 31
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#define TX_CBF_INFO_ADDR2_15_0_MASK 0xffff0000
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#define TX_CBF_INFO_ADDR2_47_16_OFFSET 0x00000018
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#define TX_CBF_INFO_ADDR2_47_16_LSB 0
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#define TX_CBF_INFO_ADDR2_47_16_MSB 31
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#define TX_CBF_INFO_ADDR2_47_16_MASK 0xffffffff
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#define TX_CBF_INFO_ADDR3_31_0_OFFSET 0x0000001c
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#define TX_CBF_INFO_ADDR3_31_0_LSB 0
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#define TX_CBF_INFO_ADDR3_31_0_MSB 31
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#define TX_CBF_INFO_ADDR3_31_0_MASK 0xffffffff
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#define TX_CBF_INFO_ADDR3_47_32_OFFSET 0x00000020
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#define TX_CBF_INFO_ADDR3_47_32_LSB 0
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#define TX_CBF_INFO_ADDR3_47_32_MSB 15
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#define TX_CBF_INFO_ADDR3_47_32_MASK 0x0000ffff
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#define TX_CBF_INFO_STA_PARTIAL_AID_OFFSET 0x00000020
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#define TX_CBF_INFO_STA_PARTIAL_AID_LSB 16
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#define TX_CBF_INFO_STA_PARTIAL_AID_MSB 26
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#define TX_CBF_INFO_STA_PARTIAL_AID_MASK 0x07ff0000
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#define TX_CBF_INFO_RESERVED_8A_OFFSET 0x00000020
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#define TX_CBF_INFO_RESERVED_8A_LSB 27
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#define TX_CBF_INFO_RESERVED_8A_MSB 30
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#define TX_CBF_INFO_RESERVED_8A_MASK 0x78000000
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#define TX_CBF_INFO_CBF_RESP_PWR_MGMT_OFFSET 0x00000020
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#define TX_CBF_INFO_CBF_RESP_PWR_MGMT_LSB 31
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#define TX_CBF_INFO_CBF_RESP_PWR_MGMT_MSB 31
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#define TX_CBF_INFO_CBF_RESP_PWR_MGMT_MASK 0x80000000
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#define TX_CBF_INFO_GROUP_ID_OFFSET 0x00000024
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#define TX_CBF_INFO_GROUP_ID_LSB 0
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#define TX_CBF_INFO_GROUP_ID_MSB 5
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#define TX_CBF_INFO_GROUP_ID_MASK 0x0000003f
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#define TX_CBF_INFO_RSSI_COMB_OFFSET 0x00000024
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#define TX_CBF_INFO_RSSI_COMB_LSB 6
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#define TX_CBF_INFO_RSSI_COMB_MSB 13
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#define TX_CBF_INFO_RSSI_COMB_MASK 0x00003fc0
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#define TX_CBF_INFO_RESERVED_9A_OFFSET 0x00000024
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#define TX_CBF_INFO_RESERVED_9A_LSB 14
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#define TX_CBF_INFO_RESERVED_9A_MSB 15
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#define TX_CBF_INFO_RESERVED_9A_MASK 0x0000c000
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#define TX_CBF_INFO_VHT_NDPA_STA_INFO_OFFSET 0x00000024
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#define TX_CBF_INFO_VHT_NDPA_STA_INFO_LSB 16
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#define TX_CBF_INFO_VHT_NDPA_STA_INFO_MSB 31
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#define TX_CBF_INFO_VHT_NDPA_STA_INFO_MASK 0xffff0000
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#define TX_CBF_INFO_HE_EHT_STA_INFO_15_0_OFFSET 0x00000028
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#define TX_CBF_INFO_HE_EHT_STA_INFO_15_0_LSB 0
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#define TX_CBF_INFO_HE_EHT_STA_INFO_15_0_MSB 15
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#define TX_CBF_INFO_HE_EHT_STA_INFO_15_0_MASK 0x0000ffff
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#define TX_CBF_INFO_HE_EHT_STA_INFO_31_16_OFFSET 0x00000028
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#define TX_CBF_INFO_HE_EHT_STA_INFO_31_16_LSB 16
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#define TX_CBF_INFO_HE_EHT_STA_INFO_31_16_MSB 31
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#define TX_CBF_INFO_HE_EHT_STA_INFO_31_16_MASK 0xffff0000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_LSB 0
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#define TX_CBF_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_MSB 0
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#define TX_CBF_INFO_DOT11AX_RECEIVED_FORMAT_INDICATION_MASK 0x00000001
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_LSB 1
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_MSB 1
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DL_UL_FLAG_MASK 0x00000002
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#define TX_CBF_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_LSB 2
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#define TX_CBF_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_MSB 7
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#define TX_CBF_INFO_DOT11AX_RECEIVED_BSS_COLOR_ID_MASK 0x000000fc
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#define TX_CBF_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_LSB 8
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#define TX_CBF_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_MSB 11
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#define TX_CBF_INFO_DOT11AX_RECEIVED_SPATIAL_REUSE_MASK 0x00000f00
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CP_SIZE_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CP_SIZE_LSB 12
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CP_SIZE_MSB 13
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CP_SIZE_MASK 0x00003000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_LTF_SIZE_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_LTF_SIZE_LSB 14
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#define TX_CBF_INFO_DOT11AX_RECEIVED_LTF_SIZE_MSB 15
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#define TX_CBF_INFO_DOT11AX_RECEIVED_LTF_SIZE_MASK 0x0000c000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CODING_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CODING_LSB 16
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CODING_MSB 16
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#define TX_CBF_INFO_DOT11AX_RECEIVED_CODING_MASK 0x00010000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DCM_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DCM_LSB 17
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DCM_MSB 17
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DCM_MASK 0x00020000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_LSB 18
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_MSB 18
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#define TX_CBF_INFO_DOT11AX_RECEIVED_DOPPLER_INDICATION_MASK 0x00040000
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#define TX_CBF_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_LSB 19
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#define TX_CBF_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_MSB 22
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#define TX_CBF_INFO_DOT11AX_RECEIVED_EXT_RU_SIZE_MASK 0x00780000
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#define TX_CBF_INFO_DOT11AX_DL_UL_FLAG_OFFSET 0x0000002c
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#define TX_CBF_INFO_DOT11AX_DL_UL_FLAG_LSB 23
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#define TX_CBF_INFO_DOT11AX_DL_UL_FLAG_MSB 23
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#define TX_CBF_INFO_DOT11AX_DL_UL_FLAG_MASK 0x00800000
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#define TX_CBF_INFO_RESERVED_11A_OFFSET 0x0000002c
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#define TX_CBF_INFO_RESERVED_11A_LSB 24
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#define TX_CBF_INFO_RESERVED_11A_MSB 31
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#define TX_CBF_INFO_RESERVED_11A_MASK 0xff000000
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#define TX_CBF_INFO_SW_RESPONSE_FRAME_LENGTH_OFFSET 0x00000030
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#define TX_CBF_INFO_SW_RESPONSE_FRAME_LENGTH_LSB 0
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#define TX_CBF_INFO_SW_RESPONSE_FRAME_LENGTH_MSB 15
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#define TX_CBF_INFO_SW_RESPONSE_FRAME_LENGTH_MASK 0x0000ffff
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#define TX_CBF_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_OFFSET 0x00000030
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#define TX_CBF_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_LSB 16
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#define TX_CBF_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_MSB 16
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#define TX_CBF_INFO_SW_RESPONSE_TLV_FROM_CRYPTO_MASK 0x00010000
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#define TX_CBF_INFO_WAIT_SIFS_CONFIG_VALID_OFFSET 0x00000030
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#define TX_CBF_INFO_WAIT_SIFS_CONFIG_VALID_LSB 17
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#define TX_CBF_INFO_WAIT_SIFS_CONFIG_VALID_MSB 17
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#define TX_CBF_INFO_WAIT_SIFS_CONFIG_VALID_MASK 0x00020000
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#define TX_CBF_INFO_WAIT_SIFS_OFFSET 0x00000030
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#define TX_CBF_INFO_WAIT_SIFS_LSB 18
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#define TX_CBF_INFO_WAIT_SIFS_MSB 19
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#define TX_CBF_INFO_WAIT_SIFS_MASK 0x000c0000
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#define TX_CBF_INFO_SECURE_OFFSET 0x00000030
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#define TX_CBF_INFO_SECURE_LSB 21
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#define TX_CBF_INFO_SECURE_MSB 21
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#define TX_CBF_INFO_SECURE_MASK 0x00200000
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#define TX_CBF_INFO_TB_RANGING_RESPONSE_REQUIRED_OFFSET 0x00000030
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#define TX_CBF_INFO_TB_RANGING_RESPONSE_REQUIRED_LSB 22
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#define TX_CBF_INFO_TB_RANGING_RESPONSE_REQUIRED_MSB 23
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#define TX_CBF_INFO_TB_RANGING_RESPONSE_REQUIRED_MASK 0x00c00000
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#define TX_CBF_INFO_EMLSR_MAIN_TLV_IF_OFFSET 0x00000030
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#define TX_CBF_INFO_EMLSR_MAIN_TLV_IF_LSB 24
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#define TX_CBF_INFO_EMLSR_MAIN_TLV_IF_MSB 24
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#define TX_CBF_INFO_EMLSR_MAIN_TLV_IF_MASK 0x01000000
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#define TX_CBF_INFO_RESERVED_12A_OFFSET 0x00000030
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#define TX_CBF_INFO_RESERVED_12A_LSB 25
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#define TX_CBF_INFO_RESERVED_12A_MSB 25
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#define TX_CBF_INFO_RESERVED_12A_MASK 0x02000000
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#define TX_CBF_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000030
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#define TX_CBF_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
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#define TX_CBF_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
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#define TX_CBF_INFO_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc000000
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#define TX_CBF_INFO_DOT11BE_PUNCTURE_BITMAP_OFFSET 0x00000034
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#define TX_CBF_INFO_DOT11BE_PUNCTURE_BITMAP_LSB 0
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#define TX_CBF_INFO_DOT11BE_PUNCTURE_BITMAP_MSB 15
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#define TX_CBF_INFO_DOT11BE_PUNCTURE_BITMAP_MASK 0x0000ffff
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#define TX_CBF_INFO_DOT11BE_RESPONSE_OFFSET 0x00000034
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#define TX_CBF_INFO_DOT11BE_RESPONSE_LSB 16
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#define TX_CBF_INFO_DOT11BE_RESPONSE_MSB 16
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#define TX_CBF_INFO_DOT11BE_RESPONSE_MASK 0x00010000
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#define TX_CBF_INFO_PUNCTURED_RESPONSE_OFFSET 0x00000034
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#define TX_CBF_INFO_PUNCTURED_RESPONSE_LSB 17
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#define TX_CBF_INFO_PUNCTURED_RESPONSE_MSB 17
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#define TX_CBF_INFO_PUNCTURED_RESPONSE_MASK 0x00020000
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#define TX_CBF_INFO_NPDA_INFO_11BE_VALID_OFFSET 0x00000034
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#define TX_CBF_INFO_NPDA_INFO_11BE_VALID_LSB 18
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#define TX_CBF_INFO_NPDA_INFO_11BE_VALID_MSB 18
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#define TX_CBF_INFO_NPDA_INFO_11BE_VALID_MASK 0x00040000
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#define TX_CBF_INFO_EHT_DUPLICATE_MODE_OFFSET 0x00000034
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#define TX_CBF_INFO_EHT_DUPLICATE_MODE_LSB 19
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#define TX_CBF_INFO_EHT_DUPLICATE_MODE_MSB 20
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#define TX_CBF_INFO_EHT_DUPLICATE_MODE_MASK 0x00180000
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#define TX_CBF_INFO_RESERVED_13A_OFFSET 0x00000034
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#define TX_CBF_INFO_RESERVED_13A_LSB 21
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#define TX_CBF_INFO_RESERVED_13A_MSB 31
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#define TX_CBF_INFO_RESERVED_13A_MASK 0xffe00000
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#define TX_CBF_INFO_EHT_STA_INFO_39_32_OFFSET 0x00000038
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#define TX_CBF_INFO_EHT_STA_INFO_39_32_LSB 0
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#define TX_CBF_INFO_EHT_STA_INFO_39_32_MSB 7
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#define TX_CBF_INFO_EHT_STA_INFO_39_32_MASK 0x000000ff
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#define TX_CBF_INFO_RESERVED_14A_OFFSET 0x00000038
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#define TX_CBF_INFO_RESERVED_14A_LSB 8
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#define TX_CBF_INFO_RESERVED_14A_MSB 31
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#define TX_CBF_INFO_RESERVED_14A_MASK 0xffffff00
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#endif
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