dc56b9d07a
Incremental hw header file update to fix compilation errors. Change-Id: I9c101255444ca892e1a6006a55f11c0de0fbffb4 CRs-Fixed: 3580269
144 行
9.5 KiB
C
144 行
9.5 KiB
C
/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _RX_MSDU_DESC_INFO_H_
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#define _RX_MSDU_DESC_INFO_H_
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#define NUM_OF_DWORDS_RX_MSDU_DESC_INFO 1
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struct rx_msdu_desc_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t first_msdu_in_mpdu_flag : 1,
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last_msdu_in_mpdu_flag : 1,
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msdu_continuation : 1,
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msdu_length : 14,
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msdu_drop : 1,
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sa_is_valid : 1,
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da_is_valid : 1,
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da_is_mcbc : 1,
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l3_header_padding_msb : 1,
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tcp_udp_chksum_fail : 1,
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ip_chksum_fail : 1,
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fr_ds : 1,
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to_ds : 1,
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intra_bss : 1,
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dest_chip_id : 2,
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decap_format : 2,
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reserved_0a : 1;
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#else
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uint32_t reserved_0a : 1,
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decap_format : 2,
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dest_chip_id : 2,
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intra_bss : 1,
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to_ds : 1,
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fr_ds : 1,
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ip_chksum_fail : 1,
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tcp_udp_chksum_fail : 1,
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l3_header_padding_msb : 1,
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da_is_mcbc : 1,
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da_is_valid : 1,
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sa_is_valid : 1,
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msdu_drop : 1,
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msdu_length : 14,
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msdu_continuation : 1,
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last_msdu_in_mpdu_flag : 1,
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first_msdu_in_mpdu_flag : 1;
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#endif
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};
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#define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
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#define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MSB 0
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#define RX_MSDU_DESC_INFO_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
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#define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_LSB 1
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#define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MSB 1
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#define RX_MSDU_DESC_INFO_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
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#define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_LSB 2
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#define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MSB 2
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#define RX_MSDU_DESC_INFO_MSDU_CONTINUATION_MASK 0x00000004
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#define RX_MSDU_DESC_INFO_MSDU_LENGTH_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_MSDU_LENGTH_LSB 3
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#define RX_MSDU_DESC_INFO_MSDU_LENGTH_MSB 16
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#define RX_MSDU_DESC_INFO_MSDU_LENGTH_MASK 0x0001fff8
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#define RX_MSDU_DESC_INFO_MSDU_DROP_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_MSDU_DROP_LSB 17
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#define RX_MSDU_DESC_INFO_MSDU_DROP_MSB 17
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#define RX_MSDU_DESC_INFO_MSDU_DROP_MASK 0x00020000
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#define RX_MSDU_DESC_INFO_SA_IS_VALID_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_SA_IS_VALID_LSB 18
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#define RX_MSDU_DESC_INFO_SA_IS_VALID_MSB 18
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#define RX_MSDU_DESC_INFO_SA_IS_VALID_MASK 0x00040000
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#define RX_MSDU_DESC_INFO_DA_IS_VALID_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_DA_IS_VALID_LSB 19
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#define RX_MSDU_DESC_INFO_DA_IS_VALID_MSB 19
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#define RX_MSDU_DESC_INFO_DA_IS_VALID_MASK 0x00080000
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#define RX_MSDU_DESC_INFO_DA_IS_MCBC_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_DA_IS_MCBC_LSB 20
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#define RX_MSDU_DESC_INFO_DA_IS_MCBC_MSB 20
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#define RX_MSDU_DESC_INFO_DA_IS_MCBC_MASK 0x00100000
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#define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_LSB 21
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#define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MSB 21
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#define RX_MSDU_DESC_INFO_L3_HEADER_PADDING_MSB_MASK 0x00200000
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#define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_LSB 22
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#define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MSB 22
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#define RX_MSDU_DESC_INFO_TCP_UDP_CHKSUM_FAIL_MASK 0x00400000
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#define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_LSB 23
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#define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MSB 23
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#define RX_MSDU_DESC_INFO_IP_CHKSUM_FAIL_MASK 0x00800000
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#define RX_MSDU_DESC_INFO_FR_DS_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_FR_DS_LSB 24
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#define RX_MSDU_DESC_INFO_FR_DS_MSB 24
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#define RX_MSDU_DESC_INFO_FR_DS_MASK 0x01000000
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#define RX_MSDU_DESC_INFO_TO_DS_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_TO_DS_LSB 25
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#define RX_MSDU_DESC_INFO_TO_DS_MSB 25
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#define RX_MSDU_DESC_INFO_TO_DS_MASK 0x02000000
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#define RX_MSDU_DESC_INFO_INTRA_BSS_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_INTRA_BSS_LSB 26
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#define RX_MSDU_DESC_INFO_INTRA_BSS_MSB 26
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#define RX_MSDU_DESC_INFO_INTRA_BSS_MASK 0x04000000
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#define RX_MSDU_DESC_INFO_DEST_CHIP_ID_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_DEST_CHIP_ID_LSB 27
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#define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MSB 28
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#define RX_MSDU_DESC_INFO_DEST_CHIP_ID_MASK 0x18000000
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#define RX_MSDU_DESC_INFO_DECAP_FORMAT_OFFSET 0x00000000
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#define RX_MSDU_DESC_INFO_DECAP_FORMAT_LSB 29
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#define RX_MSDU_DESC_INFO_DECAP_FORMAT_MSB 30
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#define RX_MSDU_DESC_INFO_DECAP_FORMAT_MASK 0x60000000
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#endif
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