sm6150.c 240 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <linux/soc/qcom/fsa4480-i2c.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/pcm.h>
  29. #include <sound/pcm_params.h>
  30. #include <sound/info.h>
  31. #include <soc/snd_event.h>
  32. #include <dsp/q6afe-v2.h>
  33. #include <dsp/q6core.h>
  34. #include "device_event.h"
  35. #include "msm-pcm-routing-v2.h"
  36. #include "codecs/msm-cdc-pinctrl.h"
  37. #include "codecs/wcd934x/wcd934x.h"
  38. #include "codecs/wcd934x/wcd934x-mbhc.h"
  39. #include "codecs/wcd937x/wcd937x-mbhc.h"
  40. #include "codecs/wsa881x.h"
  41. #include "codecs/bolero/bolero-cdc.h"
  42. #include <dt-bindings/sound/audio-codec-port-types.h>
  43. #include "codecs/bolero/wsa-macro.h"
  44. #include "codecs/wcd937x/internal.h"
  45. #define DRV_NAME "sm6150-asoc-snd"
  46. #define __CHIPSET__ "SM6150 "
  47. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  48. #define SAMPLING_RATE_8KHZ 8000
  49. #define SAMPLING_RATE_11P025KHZ 11025
  50. #define SAMPLING_RATE_16KHZ 16000
  51. #define SAMPLING_RATE_22P05KHZ 22050
  52. #define SAMPLING_RATE_32KHZ 32000
  53. #define SAMPLING_RATE_44P1KHZ 44100
  54. #define SAMPLING_RATE_48KHZ 48000
  55. #define SAMPLING_RATE_88P2KHZ 88200
  56. #define SAMPLING_RATE_96KHZ 96000
  57. #define SAMPLING_RATE_176P4KHZ 176400
  58. #define SAMPLING_RATE_192KHZ 192000
  59. #define SAMPLING_RATE_352P8KHZ 352800
  60. #define SAMPLING_RATE_384KHZ 384000
  61. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  62. #define WCD9XXX_MBHC_DEF_RLOADS 5
  63. #define CODEC_EXT_CLK_RATE 9600000
  64. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  65. #define DEV_NAME_STR_LEN 32
  66. #define WSA8810_NAME_1 "wsa881x.20170211"
  67. #define WSA8810_NAME_2 "wsa881x.20170212"
  68. #define WCN_CDC_SLIM_RX_CH_MAX 2
  69. #define WCN_CDC_SLIM_TX_CH_MAX 3
  70. #define TDM_CHANNEL_MAX 8
  71. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  72. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  73. #define MSM_HIFI_ON 1
  74. enum {
  75. SLIM_RX_0 = 0,
  76. SLIM_RX_1,
  77. SLIM_RX_2,
  78. SLIM_RX_3,
  79. SLIM_RX_4,
  80. SLIM_RX_5,
  81. SLIM_RX_6,
  82. SLIM_RX_7,
  83. SLIM_RX_MAX,
  84. };
  85. enum {
  86. SLIM_TX_0 = 0,
  87. SLIM_TX_1,
  88. SLIM_TX_2,
  89. SLIM_TX_3,
  90. SLIM_TX_4,
  91. SLIM_TX_5,
  92. SLIM_TX_6,
  93. SLIM_TX_7,
  94. SLIM_TX_8,
  95. SLIM_TX_MAX,
  96. };
  97. enum {
  98. PRIM_MI2S = 0,
  99. SEC_MI2S,
  100. TERT_MI2S,
  101. QUAT_MI2S,
  102. QUIN_MI2S,
  103. MI2S_MAX,
  104. };
  105. enum {
  106. PRIM_AUX_PCM = 0,
  107. SEC_AUX_PCM,
  108. TERT_AUX_PCM,
  109. QUAT_AUX_PCM,
  110. QUIN_AUX_PCM,
  111. AUX_PCM_MAX,
  112. };
  113. enum {
  114. WSA_CDC_DMA_RX_0 = 0,
  115. WSA_CDC_DMA_RX_1,
  116. RX_CDC_DMA_RX_0,
  117. RX_CDC_DMA_RX_1,
  118. RX_CDC_DMA_RX_2,
  119. RX_CDC_DMA_RX_3,
  120. RX_CDC_DMA_RX_5,
  121. CDC_DMA_RX_MAX,
  122. };
  123. enum {
  124. WSA_CDC_DMA_TX_0 = 0,
  125. WSA_CDC_DMA_TX_1,
  126. WSA_CDC_DMA_TX_2,
  127. TX_CDC_DMA_TX_0,
  128. TX_CDC_DMA_TX_3,
  129. TX_CDC_DMA_TX_4,
  130. CDC_DMA_TX_MAX,
  131. };
  132. struct mi2s_conf {
  133. struct mutex lock;
  134. u32 ref_cnt;
  135. u32 msm_is_mi2s_master;
  136. };
  137. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  138. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  142. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  143. };
  144. struct dev_config {
  145. u32 sample_rate;
  146. u32 bit_format;
  147. u32 channels;
  148. };
  149. enum {
  150. DP_RX_IDX = 0,
  151. EXT_DISP_RX_IDX_MAX,
  152. };
  153. struct msm_wsa881x_dev_info {
  154. struct device_node *of_node;
  155. u32 index;
  156. };
  157. struct aux_codec_dev_info {
  158. struct device_node *of_node;
  159. u32 index;
  160. };
  161. enum pinctrl_pin_state {
  162. STATE_DISABLE = 0, /* All pins are in sleep state */
  163. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  164. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  165. };
  166. struct msm_pinctrl_info {
  167. struct pinctrl *pinctrl;
  168. struct pinctrl_state *mi2s_disable;
  169. struct pinctrl_state *tdm_disable;
  170. struct pinctrl_state *mi2s_active;
  171. struct pinctrl_state *tdm_active;
  172. enum pinctrl_pin_state curr_state;
  173. };
  174. struct msm_asoc_mach_data {
  175. struct snd_info_entry *codec_root;
  176. struct msm_pinctrl_info pinctrl_info;
  177. int usbc_en2_gpio; /* used by gpio driver API */
  178. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  179. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  180. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  181. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  183. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  184. bool is_afe_config_done;
  185. struct device_node *fsa_handle;
  186. };
  187. struct msm_asoc_wcd93xx_codec {
  188. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  189. enum afe_config_type config_type);
  190. };
  191. static const char *const pin_states[] = {"sleep", "i2s-active",
  192. "tdm-active"};
  193. static struct snd_soc_card snd_soc_card_sm6150_msm;
  194. enum {
  195. TDM_0 = 0,
  196. TDM_1,
  197. TDM_2,
  198. TDM_3,
  199. TDM_4,
  200. TDM_5,
  201. TDM_6,
  202. TDM_7,
  203. TDM_PORT_MAX,
  204. };
  205. enum {
  206. TDM_PRI = 0,
  207. TDM_SEC,
  208. TDM_TERT,
  209. TDM_QUAT,
  210. TDM_QUIN,
  211. TDM_INTERFACE_MAX,
  212. };
  213. struct tdm_port {
  214. u32 mode;
  215. u32 channel;
  216. };
  217. /* TDM default config */
  218. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  219. { /* PRI TDM */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  228. },
  229. { /* SEC TDM */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  238. },
  239. { /* TERT TDM */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  248. },
  249. { /* QUAT TDM */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  258. },
  259. { /* QUIN TDM */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  268. }
  269. };
  270. /* TDM default config */
  271. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  272. { /* PRI TDM */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  281. },
  282. { /* SEC TDM */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  291. },
  292. { /* TERT TDM */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  301. },
  302. { /* QUAT TDM */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  311. },
  312. { /* QUIN TDM */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  319. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  320. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  321. }
  322. };
  323. /* Default configuration of slimbus channels */
  324. static struct dev_config slim_rx_cfg[] = {
  325. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. };
  334. static struct dev_config slim_tx_cfg[] = {
  335. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  341. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  342. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  343. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  344. };
  345. /* Default configuration of Codec DMA Interface Tx */
  346. static struct dev_config cdc_dma_rx_cfg[] = {
  347. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. };
  355. /* Default configuration of Codec DMA Interface Rx */
  356. static struct dev_config cdc_dma_tx_cfg[] = {
  357. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  363. };
  364. /* Default configuration of external display BE */
  365. static struct dev_config ext_disp_rx_cfg[] = {
  366. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  367. };
  368. static struct dev_config usb_rx_cfg = {
  369. .sample_rate = SAMPLING_RATE_48KHZ,
  370. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  371. .channels = 2,
  372. };
  373. static struct dev_config usb_tx_cfg = {
  374. .sample_rate = SAMPLING_RATE_48KHZ,
  375. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  376. .channels = 1,
  377. };
  378. static struct dev_config proxy_rx_cfg = {
  379. .sample_rate = SAMPLING_RATE_48KHZ,
  380. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  381. .channels = 2,
  382. };
  383. /* Default configuration of MI2S channels */
  384. static struct dev_config mi2s_rx_cfg[] = {
  385. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  388. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  389. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  390. };
  391. static struct dev_config mi2s_tx_cfg[] = {
  392. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  395. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. };
  398. static struct dev_config aux_pcm_rx_cfg[] = {
  399. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  402. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. };
  405. static struct dev_config aux_pcm_tx_cfg[] = {
  406. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  409. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  410. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  411. };
  412. static int msm_vi_feed_tx_ch = 2;
  413. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  414. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  415. "Five", "Six", "Seven",
  416. "Eight"};
  417. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  418. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  419. "S32_LE"};
  420. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  421. "S24_3LE"};
  422. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  423. "KHZ_32", "KHZ_44P1", "KHZ_48",
  424. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  425. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  426. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  427. "KHZ_44P1", "KHZ_48",
  428. "KHZ_88P2", "KHZ_96"};
  429. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  430. "KHZ_44P1", "KHZ_48",
  431. "KHZ_88P2", "KHZ_96"};
  432. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  433. "KHZ_44P1", "KHZ_48",
  434. "KHZ_88P2", "KHZ_96"};
  435. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  436. "Five", "Six", "Seven",
  437. "Eight"};
  438. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  439. "Six", "Seven", "Eight"};
  440. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  441. "KHZ_16", "KHZ_22P05",
  442. "KHZ_32", "KHZ_44P1", "KHZ_48",
  443. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  444. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  445. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  446. "KHZ_192", "KHZ_32", "KHZ_44P1",
  447. "KHZ_88P2", "KHZ_176P4" };
  448. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  449. "Five", "Six", "Seven", "Eight"};
  450. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  451. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  452. "KHZ_48", "KHZ_176P4",
  453. "KHZ_352P8"};
  454. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  455. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  456. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  457. "KHZ_48", "KHZ_96", "KHZ_192"};
  458. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  459. "Five", "Six", "Seven",
  460. "Eight"};
  461. static const char *const hifi_text[] = {"Off", "On"};
  462. static const char *const qos_text[] = {"Disable", "Enable"};
  463. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  464. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  465. "Five", "Six", "Seven",
  466. "Eight"};
  467. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  468. "KHZ_16", "KHZ_22P05",
  469. "KHZ_32", "KHZ_44P1", "KHZ_48",
  470. "KHZ_88P2", "KHZ_96",
  471. "KHZ_176P4", "KHZ_192",
  472. "KHZ_352P8", "KHZ_384"};
  473. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  502. ext_disp_sample_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  570. cdc_dma_sample_rate_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  572. cdc_dma_sample_rate_text);
  573. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  574. cdc_dma_sample_rate_text);
  575. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  576. cdc_dma_sample_rate_text);
  577. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  578. cdc_dma_sample_rate_text);
  579. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  580. cdc_dma_sample_rate_text);
  581. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  582. cdc_dma_sample_rate_text);
  583. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  584. cdc_dma_sample_rate_text);
  585. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  586. cdc_dma_sample_rate_text);
  587. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  588. cdc_dma_sample_rate_text);
  589. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  590. cdc_dma_sample_rate_text);
  591. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  592. cdc_dma_sample_rate_text);
  593. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  594. cdc_dma_sample_rate_text);
  595. static int msm_hifi_control;
  596. static bool codec_reg_done;
  597. static struct snd_soc_aux_dev *msm_aux_dev;
  598. static struct snd_soc_codec_conf *msm_codec_conf;
  599. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  600. static int dmic_0_1_gpio_cnt;
  601. static int dmic_2_3_gpio_cnt;
  602. static void *def_wcd_mbhc_cal(void);
  603. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  604. int enable, bool dapm);
  605. static int msm_wsa881x_init(struct snd_soc_component *component);
  606. static int msm_aux_codec_init(struct snd_soc_component *component);
  607. /*
  608. * Need to report LINEIN
  609. * if R/L channel impedance is larger than 5K ohm
  610. */
  611. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  612. .read_fw_bin = false,
  613. .calibration = NULL,
  614. .detect_extn_cable = true,
  615. .mono_stero_detection = false,
  616. .swap_gnd_mic = NULL,
  617. .hs_ext_micbias = true,
  618. .key_code[0] = KEY_MEDIA,
  619. .key_code[1] = KEY_VOICECOMMAND,
  620. .key_code[2] = KEY_VOLUMEUP,
  621. .key_code[3] = KEY_VOLUMEDOWN,
  622. .key_code[4] = 0,
  623. .key_code[5] = 0,
  624. .key_code[6] = 0,
  625. .key_code[7] = 0,
  626. .linein_th = 5000,
  627. .moisture_en = true,
  628. .mbhc_micbias = MIC_BIAS_2,
  629. .anc_micbias = MIC_BIAS_2,
  630. .enable_anc_mic_detect = false,
  631. };
  632. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  633. {"MIC BIAS1", NULL, "MCLK TX"},
  634. {"MIC BIAS2", NULL, "MCLK TX"},
  635. {"MIC BIAS3", NULL, "MCLK TX"},
  636. {"MIC BIAS4", NULL, "MCLK TX"},
  637. };
  638. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  639. {
  640. AFE_API_VERSION_I2S_CONFIG,
  641. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  642. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  643. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  644. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  645. 0,
  646. },
  647. {
  648. AFE_API_VERSION_I2S_CONFIG,
  649. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  650. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  651. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  652. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  653. 0,
  654. },
  655. {
  656. AFE_API_VERSION_I2S_CONFIG,
  657. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  658. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  659. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  660. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  661. 0,
  662. },
  663. {
  664. AFE_API_VERSION_I2S_CONFIG,
  665. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  666. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  667. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  668. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  669. 0,
  670. },
  671. {
  672. AFE_API_VERSION_I2S_CONFIG,
  673. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  674. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  675. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  676. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  677. 0,
  678. }
  679. };
  680. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  681. static int slim_get_sample_rate_val(int sample_rate)
  682. {
  683. int sample_rate_val = 0;
  684. switch (sample_rate) {
  685. case SAMPLING_RATE_8KHZ:
  686. sample_rate_val = 0;
  687. break;
  688. case SAMPLING_RATE_16KHZ:
  689. sample_rate_val = 1;
  690. break;
  691. case SAMPLING_RATE_32KHZ:
  692. sample_rate_val = 2;
  693. break;
  694. case SAMPLING_RATE_44P1KHZ:
  695. sample_rate_val = 3;
  696. break;
  697. case SAMPLING_RATE_48KHZ:
  698. sample_rate_val = 4;
  699. break;
  700. case SAMPLING_RATE_88P2KHZ:
  701. sample_rate_val = 5;
  702. break;
  703. case SAMPLING_RATE_96KHZ:
  704. sample_rate_val = 6;
  705. break;
  706. case SAMPLING_RATE_176P4KHZ:
  707. sample_rate_val = 7;
  708. break;
  709. case SAMPLING_RATE_192KHZ:
  710. sample_rate_val = 8;
  711. break;
  712. case SAMPLING_RATE_352P8KHZ:
  713. sample_rate_val = 9;
  714. break;
  715. case SAMPLING_RATE_384KHZ:
  716. sample_rate_val = 10;
  717. break;
  718. default:
  719. sample_rate_val = 4;
  720. break;
  721. }
  722. return sample_rate_val;
  723. }
  724. static int slim_get_sample_rate(int value)
  725. {
  726. int sample_rate = 0;
  727. switch (value) {
  728. case 0:
  729. sample_rate = SAMPLING_RATE_8KHZ;
  730. break;
  731. case 1:
  732. sample_rate = SAMPLING_RATE_16KHZ;
  733. break;
  734. case 2:
  735. sample_rate = SAMPLING_RATE_32KHZ;
  736. break;
  737. case 3:
  738. sample_rate = SAMPLING_RATE_44P1KHZ;
  739. break;
  740. case 4:
  741. sample_rate = SAMPLING_RATE_48KHZ;
  742. break;
  743. case 5:
  744. sample_rate = SAMPLING_RATE_88P2KHZ;
  745. break;
  746. case 6:
  747. sample_rate = SAMPLING_RATE_96KHZ;
  748. break;
  749. case 7:
  750. sample_rate = SAMPLING_RATE_176P4KHZ;
  751. break;
  752. case 8:
  753. sample_rate = SAMPLING_RATE_192KHZ;
  754. break;
  755. case 9:
  756. sample_rate = SAMPLING_RATE_352P8KHZ;
  757. break;
  758. case 10:
  759. sample_rate = SAMPLING_RATE_384KHZ;
  760. break;
  761. default:
  762. sample_rate = SAMPLING_RATE_48KHZ;
  763. break;
  764. }
  765. return sample_rate;
  766. }
  767. static int slim_get_bit_format_val(int bit_format)
  768. {
  769. int val = 0;
  770. switch (bit_format) {
  771. case SNDRV_PCM_FORMAT_S32_LE:
  772. val = 3;
  773. break;
  774. case SNDRV_PCM_FORMAT_S24_3LE:
  775. val = 2;
  776. break;
  777. case SNDRV_PCM_FORMAT_S24_LE:
  778. val = 1;
  779. break;
  780. case SNDRV_PCM_FORMAT_S16_LE:
  781. default:
  782. val = 0;
  783. break;
  784. }
  785. return val;
  786. }
  787. static int slim_get_bit_format(int val)
  788. {
  789. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  790. switch (val) {
  791. case 0:
  792. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  793. break;
  794. case 1:
  795. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  796. break;
  797. case 2:
  798. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  799. break;
  800. case 3:
  801. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  802. break;
  803. default:
  804. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  805. break;
  806. }
  807. return bit_fmt;
  808. }
  809. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  810. {
  811. int port_id = 0;
  812. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  813. port_id = SLIM_RX_0;
  814. } else if (strnstr(kcontrol->id.name,
  815. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  816. port_id = SLIM_RX_2;
  817. } else if (strnstr(kcontrol->id.name,
  818. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  819. port_id = SLIM_RX_5;
  820. } else if (strnstr(kcontrol->id.name,
  821. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  822. port_id = SLIM_RX_6;
  823. } else if (strnstr(kcontrol->id.name,
  824. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  825. port_id = SLIM_TX_0;
  826. } else if (strnstr(kcontrol->id.name,
  827. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  828. port_id = SLIM_TX_1;
  829. } else {
  830. pr_err("%s: unsupported channel: %s\n",
  831. __func__, kcontrol->id.name);
  832. return -EINVAL;
  833. }
  834. return port_id;
  835. }
  836. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  837. struct snd_ctl_elem_value *ucontrol)
  838. {
  839. int ch_num = slim_get_port_idx(kcontrol);
  840. if (ch_num < 0)
  841. return ch_num;
  842. ucontrol->value.enumerated.item[0] =
  843. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  844. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  845. ch_num, slim_rx_cfg[ch_num].sample_rate,
  846. ucontrol->value.enumerated.item[0]);
  847. return 0;
  848. }
  849. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  850. struct snd_ctl_elem_value *ucontrol)
  851. {
  852. int ch_num = slim_get_port_idx(kcontrol);
  853. if (ch_num < 0)
  854. return ch_num;
  855. slim_rx_cfg[ch_num].sample_rate =
  856. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  857. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  858. ch_num, slim_rx_cfg[ch_num].sample_rate,
  859. ucontrol->value.enumerated.item[0]);
  860. return 0;
  861. }
  862. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  863. struct snd_ctl_elem_value *ucontrol)
  864. {
  865. int ch_num = slim_get_port_idx(kcontrol);
  866. if (ch_num < 0)
  867. return ch_num;
  868. ucontrol->value.enumerated.item[0] =
  869. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  870. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  871. ch_num, slim_tx_cfg[ch_num].sample_rate,
  872. ucontrol->value.enumerated.item[0]);
  873. return 0;
  874. }
  875. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  876. struct snd_ctl_elem_value *ucontrol)
  877. {
  878. int sample_rate = 0;
  879. int ch_num = slim_get_port_idx(kcontrol);
  880. if (ch_num < 0)
  881. return ch_num;
  882. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  883. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  884. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  885. __func__, sample_rate);
  886. return -EINVAL;
  887. }
  888. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  889. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  890. ch_num, slim_tx_cfg[ch_num].sample_rate,
  891. ucontrol->value.enumerated.item[0]);
  892. return 0;
  893. }
  894. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  895. struct snd_ctl_elem_value *ucontrol)
  896. {
  897. int ch_num = slim_get_port_idx(kcontrol);
  898. if (ch_num < 0)
  899. return ch_num;
  900. ucontrol->value.enumerated.item[0] =
  901. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  902. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  903. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  904. ucontrol->value.enumerated.item[0]);
  905. return 0;
  906. }
  907. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  908. struct snd_ctl_elem_value *ucontrol)
  909. {
  910. int ch_num = slim_get_port_idx(kcontrol);
  911. if (ch_num < 0)
  912. return ch_num;
  913. slim_rx_cfg[ch_num].bit_format =
  914. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  915. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  916. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  917. ucontrol->value.enumerated.item[0]);
  918. return 0;
  919. }
  920. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  921. struct snd_ctl_elem_value *ucontrol)
  922. {
  923. int ch_num = slim_get_port_idx(kcontrol);
  924. if (ch_num < 0)
  925. return ch_num;
  926. ucontrol->value.enumerated.item[0] =
  927. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  928. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  929. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  930. ucontrol->value.enumerated.item[0]);
  931. return 0;
  932. }
  933. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  934. struct snd_ctl_elem_value *ucontrol)
  935. {
  936. int ch_num = slim_get_port_idx(kcontrol);
  937. if (ch_num < 0)
  938. return ch_num;
  939. slim_tx_cfg[ch_num].bit_format =
  940. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  941. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  942. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  943. ucontrol->value.enumerated.item[0]);
  944. return 0;
  945. }
  946. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  947. struct snd_ctl_elem_value *ucontrol)
  948. {
  949. int ch_num = slim_get_port_idx(kcontrol);
  950. if (ch_num < 0)
  951. return ch_num;
  952. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  953. ch_num, slim_rx_cfg[ch_num].channels);
  954. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  955. return 0;
  956. }
  957. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  958. struct snd_ctl_elem_value *ucontrol)
  959. {
  960. int ch_num = slim_get_port_idx(kcontrol);
  961. if (ch_num < 0)
  962. return ch_num;
  963. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  964. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  965. ch_num, slim_rx_cfg[ch_num].channels);
  966. return 1;
  967. }
  968. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  969. struct snd_ctl_elem_value *ucontrol)
  970. {
  971. int ch_num = slim_get_port_idx(kcontrol);
  972. if (ch_num < 0)
  973. return ch_num;
  974. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  975. ch_num, slim_tx_cfg[ch_num].channels);
  976. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  977. return 0;
  978. }
  979. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  980. struct snd_ctl_elem_value *ucontrol)
  981. {
  982. int ch_num = slim_get_port_idx(kcontrol);
  983. if (ch_num < 0)
  984. return ch_num;
  985. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  986. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  987. ch_num, slim_tx_cfg[ch_num].channels);
  988. return 1;
  989. }
  990. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  991. struct snd_ctl_elem_value *ucontrol)
  992. {
  993. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  994. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  995. ucontrol->value.integer.value[0]);
  996. return 0;
  997. }
  998. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  999. struct snd_ctl_elem_value *ucontrol)
  1000. {
  1001. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1002. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1003. return 1;
  1004. }
  1005. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1006. struct snd_ctl_elem_value *ucontrol)
  1007. {
  1008. /*
  1009. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1010. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1011. * value.
  1012. */
  1013. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1014. case SAMPLING_RATE_96KHZ:
  1015. ucontrol->value.integer.value[0] = 5;
  1016. break;
  1017. case SAMPLING_RATE_88P2KHZ:
  1018. ucontrol->value.integer.value[0] = 4;
  1019. break;
  1020. case SAMPLING_RATE_48KHZ:
  1021. ucontrol->value.integer.value[0] = 3;
  1022. break;
  1023. case SAMPLING_RATE_44P1KHZ:
  1024. ucontrol->value.integer.value[0] = 2;
  1025. break;
  1026. case SAMPLING_RATE_16KHZ:
  1027. ucontrol->value.integer.value[0] = 1;
  1028. break;
  1029. case SAMPLING_RATE_8KHZ:
  1030. default:
  1031. ucontrol->value.integer.value[0] = 0;
  1032. break;
  1033. }
  1034. pr_debug("%s: sample rate = %d\n", __func__,
  1035. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1036. return 0;
  1037. }
  1038. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1039. struct snd_ctl_elem_value *ucontrol)
  1040. {
  1041. switch (ucontrol->value.integer.value[0]) {
  1042. case 1:
  1043. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1044. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1045. break;
  1046. case 2:
  1047. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1048. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1049. break;
  1050. case 3:
  1051. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1052. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1053. break;
  1054. case 4:
  1055. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1056. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1057. break;
  1058. case 5:
  1059. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1060. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1061. break;
  1062. case 0:
  1063. default:
  1064. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1065. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1066. break;
  1067. }
  1068. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1069. __func__,
  1070. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1071. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1072. ucontrol->value.enumerated.item[0]);
  1073. return 0;
  1074. }
  1075. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1076. struct snd_ctl_elem_value *ucontrol)
  1077. {
  1078. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1079. case SAMPLING_RATE_96KHZ:
  1080. ucontrol->value.integer.value[0] = 5;
  1081. break;
  1082. case SAMPLING_RATE_88P2KHZ:
  1083. ucontrol->value.integer.value[0] = 4;
  1084. break;
  1085. case SAMPLING_RATE_48KHZ:
  1086. ucontrol->value.integer.value[0] = 3;
  1087. break;
  1088. case SAMPLING_RATE_44P1KHZ:
  1089. ucontrol->value.integer.value[0] = 2;
  1090. break;
  1091. case SAMPLING_RATE_16KHZ:
  1092. ucontrol->value.integer.value[0] = 1;
  1093. break;
  1094. case SAMPLING_RATE_8KHZ:
  1095. default:
  1096. ucontrol->value.integer.value[0] = 0;
  1097. break;
  1098. }
  1099. pr_debug("%s: sample rate rx = %d", __func__,
  1100. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1101. return 0;
  1102. }
  1103. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1104. struct snd_ctl_elem_value *ucontrol)
  1105. {
  1106. switch (ucontrol->value.integer.value[0]) {
  1107. case 1:
  1108. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1109. break;
  1110. case 2:
  1111. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1112. break;
  1113. case 3:
  1114. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1115. break;
  1116. case 4:
  1117. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1118. break;
  1119. case 5:
  1120. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1121. break;
  1122. case 0:
  1123. default:
  1124. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1125. break;
  1126. }
  1127. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1128. __func__,
  1129. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1130. ucontrol->value.enumerated.item[0]);
  1131. return 0;
  1132. }
  1133. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1134. struct snd_ctl_elem_value *ucontrol)
  1135. {
  1136. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1137. case SAMPLING_RATE_96KHZ:
  1138. ucontrol->value.integer.value[0] = 5;
  1139. break;
  1140. case SAMPLING_RATE_88P2KHZ:
  1141. ucontrol->value.integer.value[0] = 4;
  1142. break;
  1143. case SAMPLING_RATE_48KHZ:
  1144. ucontrol->value.integer.value[0] = 3;
  1145. break;
  1146. case SAMPLING_RATE_44P1KHZ:
  1147. ucontrol->value.integer.value[0] = 2;
  1148. break;
  1149. case SAMPLING_RATE_16KHZ:
  1150. ucontrol->value.integer.value[0] = 1;
  1151. break;
  1152. case SAMPLING_RATE_8KHZ:
  1153. default:
  1154. ucontrol->value.integer.value[0] = 0;
  1155. break;
  1156. }
  1157. pr_debug("%s: sample rate tx = %d", __func__,
  1158. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1159. return 0;
  1160. }
  1161. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1162. struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. switch (ucontrol->value.integer.value[0]) {
  1165. case 1:
  1166. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1167. break;
  1168. case 2:
  1169. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1170. break;
  1171. case 3:
  1172. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1173. break;
  1174. case 4:
  1175. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1176. break;
  1177. case 5:
  1178. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1179. break;
  1180. case 0:
  1181. default:
  1182. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1183. break;
  1184. }
  1185. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1186. __func__,
  1187. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1188. ucontrol->value.enumerated.item[0]);
  1189. return 0;
  1190. }
  1191. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1192. {
  1193. int idx = 0;
  1194. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1195. sizeof("WSA_CDC_DMA_RX_0")))
  1196. idx = WSA_CDC_DMA_RX_0;
  1197. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1198. sizeof("WSA_CDC_DMA_RX_0")))
  1199. idx = WSA_CDC_DMA_RX_1;
  1200. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1201. sizeof("RX_CDC_DMA_RX_0")))
  1202. idx = RX_CDC_DMA_RX_0;
  1203. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1204. sizeof("RX_CDC_DMA_RX_1")))
  1205. idx = RX_CDC_DMA_RX_1;
  1206. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1207. sizeof("RX_CDC_DMA_RX_2")))
  1208. idx = RX_CDC_DMA_RX_2;
  1209. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1210. sizeof("RX_CDC_DMA_RX_3")))
  1211. idx = RX_CDC_DMA_RX_3;
  1212. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1213. sizeof("RX_CDC_DMA_RX_5")))
  1214. idx = RX_CDC_DMA_RX_5;
  1215. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1216. sizeof("WSA_CDC_DMA_TX_0")))
  1217. idx = WSA_CDC_DMA_TX_0;
  1218. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1219. sizeof("WSA_CDC_DMA_TX_1")))
  1220. idx = WSA_CDC_DMA_TX_1;
  1221. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1222. sizeof("WSA_CDC_DMA_TX_2")))
  1223. idx = WSA_CDC_DMA_TX_2;
  1224. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1225. sizeof("TX_CDC_DMA_TX_0")))
  1226. idx = TX_CDC_DMA_TX_0;
  1227. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1228. sizeof("TX_CDC_DMA_TX_3")))
  1229. idx = TX_CDC_DMA_TX_3;
  1230. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1231. sizeof("TX_CDC_DMA_TX_4")))
  1232. idx = TX_CDC_DMA_TX_4;
  1233. else {
  1234. pr_err("%s: unsupported channel: %s\n",
  1235. __func__, kcontrol->id.name);
  1236. return -EINVAL;
  1237. }
  1238. return idx;
  1239. }
  1240. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1241. struct snd_ctl_elem_value *ucontrol)
  1242. {
  1243. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1244. if (ch_num < 0) {
  1245. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1246. return ch_num;
  1247. }
  1248. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1249. cdc_dma_rx_cfg[ch_num].channels - 1);
  1250. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1251. return 0;
  1252. }
  1253. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1254. struct snd_ctl_elem_value *ucontrol)
  1255. {
  1256. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1257. if (ch_num < 0) {
  1258. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1259. return ch_num;
  1260. }
  1261. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1262. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1263. cdc_dma_rx_cfg[ch_num].channels);
  1264. return 1;
  1265. }
  1266. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1267. struct snd_ctl_elem_value *ucontrol)
  1268. {
  1269. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1270. if (ch_num < 0) {
  1271. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1272. return ch_num;
  1273. }
  1274. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1275. case SNDRV_PCM_FORMAT_S32_LE:
  1276. ucontrol->value.integer.value[0] = 3;
  1277. break;
  1278. case SNDRV_PCM_FORMAT_S24_3LE:
  1279. ucontrol->value.integer.value[0] = 2;
  1280. break;
  1281. case SNDRV_PCM_FORMAT_S24_LE:
  1282. ucontrol->value.integer.value[0] = 1;
  1283. break;
  1284. case SNDRV_PCM_FORMAT_S16_LE:
  1285. default:
  1286. ucontrol->value.integer.value[0] = 0;
  1287. break;
  1288. }
  1289. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1290. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1291. ucontrol->value.integer.value[0]);
  1292. return 0;
  1293. }
  1294. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1295. struct snd_ctl_elem_value *ucontrol)
  1296. {
  1297. int rc = 0;
  1298. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1299. if (ch_num < 0) {
  1300. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1301. return ch_num;
  1302. }
  1303. switch (ucontrol->value.integer.value[0]) {
  1304. case 3:
  1305. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1306. break;
  1307. case 2:
  1308. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1309. break;
  1310. case 1:
  1311. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1312. break;
  1313. case 0:
  1314. default:
  1315. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1316. break;
  1317. }
  1318. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1319. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1320. ucontrol->value.integer.value[0]);
  1321. return rc;
  1322. }
  1323. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1324. {
  1325. int sample_rate_val = 0;
  1326. switch (sample_rate) {
  1327. case SAMPLING_RATE_8KHZ:
  1328. sample_rate_val = 0;
  1329. break;
  1330. case SAMPLING_RATE_11P025KHZ:
  1331. sample_rate_val = 1;
  1332. break;
  1333. case SAMPLING_RATE_16KHZ:
  1334. sample_rate_val = 2;
  1335. break;
  1336. case SAMPLING_RATE_22P05KHZ:
  1337. sample_rate_val = 3;
  1338. break;
  1339. case SAMPLING_RATE_32KHZ:
  1340. sample_rate_val = 4;
  1341. break;
  1342. case SAMPLING_RATE_44P1KHZ:
  1343. sample_rate_val = 5;
  1344. break;
  1345. case SAMPLING_RATE_48KHZ:
  1346. sample_rate_val = 6;
  1347. break;
  1348. case SAMPLING_RATE_88P2KHZ:
  1349. sample_rate_val = 7;
  1350. break;
  1351. case SAMPLING_RATE_96KHZ:
  1352. sample_rate_val = 8;
  1353. break;
  1354. case SAMPLING_RATE_176P4KHZ:
  1355. sample_rate_val = 9;
  1356. break;
  1357. case SAMPLING_RATE_192KHZ:
  1358. sample_rate_val = 10;
  1359. break;
  1360. case SAMPLING_RATE_352P8KHZ:
  1361. sample_rate_val = 11;
  1362. break;
  1363. case SAMPLING_RATE_384KHZ:
  1364. sample_rate_val = 12;
  1365. break;
  1366. default:
  1367. sample_rate_val = 6;
  1368. break;
  1369. }
  1370. return sample_rate_val;
  1371. }
  1372. static int cdc_dma_get_sample_rate(int value)
  1373. {
  1374. int sample_rate = 0;
  1375. switch (value) {
  1376. case 0:
  1377. sample_rate = SAMPLING_RATE_8KHZ;
  1378. break;
  1379. case 1:
  1380. sample_rate = SAMPLING_RATE_11P025KHZ;
  1381. break;
  1382. case 2:
  1383. sample_rate = SAMPLING_RATE_16KHZ;
  1384. break;
  1385. case 3:
  1386. sample_rate = SAMPLING_RATE_22P05KHZ;
  1387. break;
  1388. case 4:
  1389. sample_rate = SAMPLING_RATE_32KHZ;
  1390. break;
  1391. case 5:
  1392. sample_rate = SAMPLING_RATE_44P1KHZ;
  1393. break;
  1394. case 6:
  1395. sample_rate = SAMPLING_RATE_48KHZ;
  1396. break;
  1397. case 7:
  1398. sample_rate = SAMPLING_RATE_88P2KHZ;
  1399. break;
  1400. case 8:
  1401. sample_rate = SAMPLING_RATE_96KHZ;
  1402. break;
  1403. case 9:
  1404. sample_rate = SAMPLING_RATE_176P4KHZ;
  1405. break;
  1406. case 10:
  1407. sample_rate = SAMPLING_RATE_192KHZ;
  1408. break;
  1409. case 11:
  1410. sample_rate = SAMPLING_RATE_352P8KHZ;
  1411. break;
  1412. case 12:
  1413. sample_rate = SAMPLING_RATE_384KHZ;
  1414. break;
  1415. default:
  1416. sample_rate = SAMPLING_RATE_48KHZ;
  1417. break;
  1418. }
  1419. return sample_rate;
  1420. }
  1421. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1422. struct snd_ctl_elem_value *ucontrol)
  1423. {
  1424. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1425. if (ch_num < 0) {
  1426. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1427. return ch_num;
  1428. }
  1429. ucontrol->value.enumerated.item[0] =
  1430. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1431. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1432. cdc_dma_rx_cfg[ch_num].sample_rate);
  1433. return 0;
  1434. }
  1435. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1436. struct snd_ctl_elem_value *ucontrol)
  1437. {
  1438. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1439. if (ch_num < 0) {
  1440. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1441. return ch_num;
  1442. }
  1443. cdc_dma_rx_cfg[ch_num].sample_rate =
  1444. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1445. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1446. __func__, ucontrol->value.enumerated.item[0],
  1447. cdc_dma_rx_cfg[ch_num].sample_rate);
  1448. return 0;
  1449. }
  1450. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1451. struct snd_ctl_elem_value *ucontrol)
  1452. {
  1453. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1454. if (ch_num < 0) {
  1455. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1456. return ch_num;
  1457. }
  1458. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1459. cdc_dma_tx_cfg[ch_num].channels);
  1460. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1461. return 0;
  1462. }
  1463. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1464. struct snd_ctl_elem_value *ucontrol)
  1465. {
  1466. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1467. if (ch_num < 0) {
  1468. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1469. return ch_num;
  1470. }
  1471. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1472. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1473. cdc_dma_tx_cfg[ch_num].channels);
  1474. return 1;
  1475. }
  1476. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1477. struct snd_ctl_elem_value *ucontrol)
  1478. {
  1479. int sample_rate_val;
  1480. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1481. if (ch_num < 0) {
  1482. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1483. return ch_num;
  1484. }
  1485. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1486. case SAMPLING_RATE_384KHZ:
  1487. sample_rate_val = 12;
  1488. break;
  1489. case SAMPLING_RATE_352P8KHZ:
  1490. sample_rate_val = 11;
  1491. break;
  1492. case SAMPLING_RATE_192KHZ:
  1493. sample_rate_val = 10;
  1494. break;
  1495. case SAMPLING_RATE_176P4KHZ:
  1496. sample_rate_val = 9;
  1497. break;
  1498. case SAMPLING_RATE_96KHZ:
  1499. sample_rate_val = 8;
  1500. break;
  1501. case SAMPLING_RATE_88P2KHZ:
  1502. sample_rate_val = 7;
  1503. break;
  1504. case SAMPLING_RATE_48KHZ:
  1505. sample_rate_val = 6;
  1506. break;
  1507. case SAMPLING_RATE_44P1KHZ:
  1508. sample_rate_val = 5;
  1509. break;
  1510. case SAMPLING_RATE_32KHZ:
  1511. sample_rate_val = 4;
  1512. break;
  1513. case SAMPLING_RATE_22P05KHZ:
  1514. sample_rate_val = 3;
  1515. break;
  1516. case SAMPLING_RATE_16KHZ:
  1517. sample_rate_val = 2;
  1518. break;
  1519. case SAMPLING_RATE_11P025KHZ:
  1520. sample_rate_val = 1;
  1521. break;
  1522. case SAMPLING_RATE_8KHZ:
  1523. sample_rate_val = 0;
  1524. break;
  1525. default:
  1526. sample_rate_val = 6;
  1527. break;
  1528. }
  1529. ucontrol->value.integer.value[0] = sample_rate_val;
  1530. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1531. cdc_dma_tx_cfg[ch_num].sample_rate);
  1532. return 0;
  1533. }
  1534. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1535. struct snd_ctl_elem_value *ucontrol)
  1536. {
  1537. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1538. if (ch_num < 0) {
  1539. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1540. return ch_num;
  1541. }
  1542. switch (ucontrol->value.integer.value[0]) {
  1543. case 12:
  1544. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1545. break;
  1546. case 11:
  1547. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1548. break;
  1549. case 10:
  1550. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1551. break;
  1552. case 9:
  1553. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1554. break;
  1555. case 8:
  1556. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1557. break;
  1558. case 7:
  1559. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1560. break;
  1561. case 6:
  1562. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1563. break;
  1564. case 5:
  1565. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1566. break;
  1567. case 4:
  1568. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1569. break;
  1570. case 3:
  1571. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1572. break;
  1573. case 2:
  1574. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1575. break;
  1576. case 1:
  1577. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1578. break;
  1579. case 0:
  1580. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1581. break;
  1582. default:
  1583. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1584. break;
  1585. }
  1586. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1587. __func__, ucontrol->value.integer.value[0],
  1588. cdc_dma_tx_cfg[ch_num].sample_rate);
  1589. return 0;
  1590. }
  1591. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1592. struct snd_ctl_elem_value *ucontrol)
  1593. {
  1594. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1595. if (ch_num < 0) {
  1596. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1597. return ch_num;
  1598. }
  1599. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1600. case SNDRV_PCM_FORMAT_S32_LE:
  1601. ucontrol->value.integer.value[0] = 3;
  1602. break;
  1603. case SNDRV_PCM_FORMAT_S24_3LE:
  1604. ucontrol->value.integer.value[0] = 2;
  1605. break;
  1606. case SNDRV_PCM_FORMAT_S24_LE:
  1607. ucontrol->value.integer.value[0] = 1;
  1608. break;
  1609. case SNDRV_PCM_FORMAT_S16_LE:
  1610. default:
  1611. ucontrol->value.integer.value[0] = 0;
  1612. break;
  1613. }
  1614. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1615. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1616. ucontrol->value.integer.value[0]);
  1617. return 0;
  1618. }
  1619. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1620. struct snd_ctl_elem_value *ucontrol)
  1621. {
  1622. int rc = 0;
  1623. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1624. if (ch_num < 0) {
  1625. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1626. return ch_num;
  1627. }
  1628. switch (ucontrol->value.integer.value[0]) {
  1629. case 3:
  1630. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1631. break;
  1632. case 2:
  1633. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1634. break;
  1635. case 1:
  1636. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1637. break;
  1638. case 0:
  1639. default:
  1640. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1641. break;
  1642. }
  1643. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1644. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1645. ucontrol->value.integer.value[0]);
  1646. return rc;
  1647. }
  1648. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1649. struct snd_ctl_elem_value *ucontrol)
  1650. {
  1651. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1652. usb_rx_cfg.channels);
  1653. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1654. return 0;
  1655. }
  1656. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1657. struct snd_ctl_elem_value *ucontrol)
  1658. {
  1659. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1660. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1661. return 1;
  1662. }
  1663. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1664. struct snd_ctl_elem_value *ucontrol)
  1665. {
  1666. int sample_rate_val;
  1667. switch (usb_rx_cfg.sample_rate) {
  1668. case SAMPLING_RATE_384KHZ:
  1669. sample_rate_val = 12;
  1670. break;
  1671. case SAMPLING_RATE_352P8KHZ:
  1672. sample_rate_val = 11;
  1673. break;
  1674. case SAMPLING_RATE_192KHZ:
  1675. sample_rate_val = 10;
  1676. break;
  1677. case SAMPLING_RATE_176P4KHZ:
  1678. sample_rate_val = 9;
  1679. break;
  1680. case SAMPLING_RATE_96KHZ:
  1681. sample_rate_val = 8;
  1682. break;
  1683. case SAMPLING_RATE_88P2KHZ:
  1684. sample_rate_val = 7;
  1685. break;
  1686. case SAMPLING_RATE_48KHZ:
  1687. sample_rate_val = 6;
  1688. break;
  1689. case SAMPLING_RATE_44P1KHZ:
  1690. sample_rate_val = 5;
  1691. break;
  1692. case SAMPLING_RATE_32KHZ:
  1693. sample_rate_val = 4;
  1694. break;
  1695. case SAMPLING_RATE_22P05KHZ:
  1696. sample_rate_val = 3;
  1697. break;
  1698. case SAMPLING_RATE_16KHZ:
  1699. sample_rate_val = 2;
  1700. break;
  1701. case SAMPLING_RATE_11P025KHZ:
  1702. sample_rate_val = 1;
  1703. break;
  1704. case SAMPLING_RATE_8KHZ:
  1705. default:
  1706. sample_rate_val = 0;
  1707. break;
  1708. }
  1709. ucontrol->value.integer.value[0] = sample_rate_val;
  1710. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1711. usb_rx_cfg.sample_rate);
  1712. return 0;
  1713. }
  1714. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1715. struct snd_ctl_elem_value *ucontrol)
  1716. {
  1717. switch (ucontrol->value.integer.value[0]) {
  1718. case 12:
  1719. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1720. break;
  1721. case 11:
  1722. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1723. break;
  1724. case 10:
  1725. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1726. break;
  1727. case 9:
  1728. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1729. break;
  1730. case 8:
  1731. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1732. break;
  1733. case 7:
  1734. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1735. break;
  1736. case 6:
  1737. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1738. break;
  1739. case 5:
  1740. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1741. break;
  1742. case 4:
  1743. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1744. break;
  1745. case 3:
  1746. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1747. break;
  1748. case 2:
  1749. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1750. break;
  1751. case 1:
  1752. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1753. break;
  1754. case 0:
  1755. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1756. break;
  1757. default:
  1758. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1759. break;
  1760. }
  1761. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1762. __func__, ucontrol->value.integer.value[0],
  1763. usb_rx_cfg.sample_rate);
  1764. return 0;
  1765. }
  1766. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1767. struct snd_ctl_elem_value *ucontrol)
  1768. {
  1769. switch (usb_rx_cfg.bit_format) {
  1770. case SNDRV_PCM_FORMAT_S32_LE:
  1771. ucontrol->value.integer.value[0] = 3;
  1772. break;
  1773. case SNDRV_PCM_FORMAT_S24_3LE:
  1774. ucontrol->value.integer.value[0] = 2;
  1775. break;
  1776. case SNDRV_PCM_FORMAT_S24_LE:
  1777. ucontrol->value.integer.value[0] = 1;
  1778. break;
  1779. case SNDRV_PCM_FORMAT_S16_LE:
  1780. default:
  1781. ucontrol->value.integer.value[0] = 0;
  1782. break;
  1783. }
  1784. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1785. __func__, usb_rx_cfg.bit_format,
  1786. ucontrol->value.integer.value[0]);
  1787. return 0;
  1788. }
  1789. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1790. struct snd_ctl_elem_value *ucontrol)
  1791. {
  1792. int rc = 0;
  1793. switch (ucontrol->value.integer.value[0]) {
  1794. case 3:
  1795. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1796. break;
  1797. case 2:
  1798. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1799. break;
  1800. case 1:
  1801. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1802. break;
  1803. case 0:
  1804. default:
  1805. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1806. break;
  1807. }
  1808. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1809. __func__, usb_rx_cfg.bit_format,
  1810. ucontrol->value.integer.value[0]);
  1811. return rc;
  1812. }
  1813. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1814. struct snd_ctl_elem_value *ucontrol)
  1815. {
  1816. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1817. usb_tx_cfg.channels);
  1818. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1819. return 0;
  1820. }
  1821. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1822. struct snd_ctl_elem_value *ucontrol)
  1823. {
  1824. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1825. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1826. return 1;
  1827. }
  1828. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1829. struct snd_ctl_elem_value *ucontrol)
  1830. {
  1831. int sample_rate_val;
  1832. switch (usb_tx_cfg.sample_rate) {
  1833. case SAMPLING_RATE_384KHZ:
  1834. sample_rate_val = 12;
  1835. break;
  1836. case SAMPLING_RATE_352P8KHZ:
  1837. sample_rate_val = 11;
  1838. break;
  1839. case SAMPLING_RATE_192KHZ:
  1840. sample_rate_val = 10;
  1841. break;
  1842. case SAMPLING_RATE_176P4KHZ:
  1843. sample_rate_val = 9;
  1844. break;
  1845. case SAMPLING_RATE_96KHZ:
  1846. sample_rate_val = 8;
  1847. break;
  1848. case SAMPLING_RATE_88P2KHZ:
  1849. sample_rate_val = 7;
  1850. break;
  1851. case SAMPLING_RATE_48KHZ:
  1852. sample_rate_val = 6;
  1853. break;
  1854. case SAMPLING_RATE_44P1KHZ:
  1855. sample_rate_val = 5;
  1856. break;
  1857. case SAMPLING_RATE_32KHZ:
  1858. sample_rate_val = 4;
  1859. break;
  1860. case SAMPLING_RATE_22P05KHZ:
  1861. sample_rate_val = 3;
  1862. break;
  1863. case SAMPLING_RATE_16KHZ:
  1864. sample_rate_val = 2;
  1865. break;
  1866. case SAMPLING_RATE_11P025KHZ:
  1867. sample_rate_val = 1;
  1868. break;
  1869. case SAMPLING_RATE_8KHZ:
  1870. sample_rate_val = 0;
  1871. break;
  1872. default:
  1873. sample_rate_val = 6;
  1874. break;
  1875. }
  1876. ucontrol->value.integer.value[0] = sample_rate_val;
  1877. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1878. usb_tx_cfg.sample_rate);
  1879. return 0;
  1880. }
  1881. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1882. struct snd_ctl_elem_value *ucontrol)
  1883. {
  1884. switch (ucontrol->value.integer.value[0]) {
  1885. case 12:
  1886. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1887. break;
  1888. case 11:
  1889. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1890. break;
  1891. case 10:
  1892. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1893. break;
  1894. case 9:
  1895. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1896. break;
  1897. case 8:
  1898. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1899. break;
  1900. case 7:
  1901. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1902. break;
  1903. case 6:
  1904. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1905. break;
  1906. case 5:
  1907. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1908. break;
  1909. case 4:
  1910. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1911. break;
  1912. case 3:
  1913. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1914. break;
  1915. case 2:
  1916. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1917. break;
  1918. case 1:
  1919. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1920. break;
  1921. case 0:
  1922. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1923. break;
  1924. default:
  1925. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1926. break;
  1927. }
  1928. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1929. __func__, ucontrol->value.integer.value[0],
  1930. usb_tx_cfg.sample_rate);
  1931. return 0;
  1932. }
  1933. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1934. struct snd_ctl_elem_value *ucontrol)
  1935. {
  1936. switch (usb_tx_cfg.bit_format) {
  1937. case SNDRV_PCM_FORMAT_S32_LE:
  1938. ucontrol->value.integer.value[0] = 3;
  1939. break;
  1940. case SNDRV_PCM_FORMAT_S24_3LE:
  1941. ucontrol->value.integer.value[0] = 2;
  1942. break;
  1943. case SNDRV_PCM_FORMAT_S24_LE:
  1944. ucontrol->value.integer.value[0] = 1;
  1945. break;
  1946. case SNDRV_PCM_FORMAT_S16_LE:
  1947. default:
  1948. ucontrol->value.integer.value[0] = 0;
  1949. break;
  1950. }
  1951. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1952. __func__, usb_tx_cfg.bit_format,
  1953. ucontrol->value.integer.value[0]);
  1954. return 0;
  1955. }
  1956. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1957. struct snd_ctl_elem_value *ucontrol)
  1958. {
  1959. int rc = 0;
  1960. switch (ucontrol->value.integer.value[0]) {
  1961. case 3:
  1962. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1963. break;
  1964. case 2:
  1965. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1966. break;
  1967. case 1:
  1968. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1969. break;
  1970. case 0:
  1971. default:
  1972. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1973. break;
  1974. }
  1975. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1976. __func__, usb_tx_cfg.bit_format,
  1977. ucontrol->value.integer.value[0]);
  1978. return rc;
  1979. }
  1980. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1981. {
  1982. int idx;
  1983. if (strnstr(kcontrol->id.name, "Display Port RX",
  1984. sizeof("Display Port RX"))) {
  1985. idx = DP_RX_IDX;
  1986. } else {
  1987. pr_err("%s: unsupported BE: %s\n",
  1988. __func__, kcontrol->id.name);
  1989. idx = -EINVAL;
  1990. }
  1991. return idx;
  1992. }
  1993. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1994. struct snd_ctl_elem_value *ucontrol)
  1995. {
  1996. int idx = ext_disp_get_port_idx(kcontrol);
  1997. if (idx < 0)
  1998. return idx;
  1999. switch (ext_disp_rx_cfg[idx].bit_format) {
  2000. case SNDRV_PCM_FORMAT_S24_3LE:
  2001. ucontrol->value.integer.value[0] = 2;
  2002. break;
  2003. case SNDRV_PCM_FORMAT_S24_LE:
  2004. ucontrol->value.integer.value[0] = 1;
  2005. break;
  2006. case SNDRV_PCM_FORMAT_S16_LE:
  2007. default:
  2008. ucontrol->value.integer.value[0] = 0;
  2009. break;
  2010. }
  2011. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2012. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2013. ucontrol->value.integer.value[0]);
  2014. return 0;
  2015. }
  2016. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2017. struct snd_ctl_elem_value *ucontrol)
  2018. {
  2019. int idx = ext_disp_get_port_idx(kcontrol);
  2020. if (idx < 0)
  2021. return idx;
  2022. switch (ucontrol->value.integer.value[0]) {
  2023. case 2:
  2024. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2025. break;
  2026. case 1:
  2027. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2028. break;
  2029. case 0:
  2030. default:
  2031. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2032. break;
  2033. }
  2034. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2035. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2036. ucontrol->value.integer.value[0]);
  2037. return 0;
  2038. }
  2039. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2040. struct snd_ctl_elem_value *ucontrol)
  2041. {
  2042. int idx = ext_disp_get_port_idx(kcontrol);
  2043. if (idx < 0)
  2044. return idx;
  2045. ucontrol->value.integer.value[0] =
  2046. ext_disp_rx_cfg[idx].channels - 2;
  2047. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2048. idx, ext_disp_rx_cfg[idx].channels);
  2049. return 0;
  2050. }
  2051. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2052. struct snd_ctl_elem_value *ucontrol)
  2053. {
  2054. int idx = ext_disp_get_port_idx(kcontrol);
  2055. if (idx < 0)
  2056. return idx;
  2057. ext_disp_rx_cfg[idx].channels =
  2058. ucontrol->value.integer.value[0] + 2;
  2059. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2060. idx, ext_disp_rx_cfg[idx].channels);
  2061. return 1;
  2062. }
  2063. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2064. struct snd_ctl_elem_value *ucontrol)
  2065. {
  2066. int sample_rate_val;
  2067. int idx = ext_disp_get_port_idx(kcontrol);
  2068. if (idx < 0)
  2069. return idx;
  2070. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2071. case SAMPLING_RATE_176P4KHZ:
  2072. sample_rate_val = 6;
  2073. break;
  2074. case SAMPLING_RATE_88P2KHZ:
  2075. sample_rate_val = 5;
  2076. break;
  2077. case SAMPLING_RATE_44P1KHZ:
  2078. sample_rate_val = 4;
  2079. break;
  2080. case SAMPLING_RATE_32KHZ:
  2081. sample_rate_val = 3;
  2082. break;
  2083. case SAMPLING_RATE_192KHZ:
  2084. sample_rate_val = 2;
  2085. break;
  2086. case SAMPLING_RATE_96KHZ:
  2087. sample_rate_val = 1;
  2088. break;
  2089. case SAMPLING_RATE_48KHZ:
  2090. default:
  2091. sample_rate_val = 0;
  2092. break;
  2093. }
  2094. ucontrol->value.integer.value[0] = sample_rate_val;
  2095. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2096. idx, ext_disp_rx_cfg[idx].sample_rate);
  2097. return 0;
  2098. }
  2099. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2100. struct snd_ctl_elem_value *ucontrol)
  2101. {
  2102. int idx = ext_disp_get_port_idx(kcontrol);
  2103. if (idx < 0)
  2104. return idx;
  2105. switch (ucontrol->value.integer.value[0]) {
  2106. case 6:
  2107. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2108. break;
  2109. case 5:
  2110. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2111. break;
  2112. case 4:
  2113. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2114. break;
  2115. case 3:
  2116. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2117. break;
  2118. case 2:
  2119. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2120. break;
  2121. case 1:
  2122. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2123. break;
  2124. case 0:
  2125. default:
  2126. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2127. break;
  2128. }
  2129. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2130. __func__, ucontrol->value.integer.value[0], idx,
  2131. ext_disp_rx_cfg[idx].sample_rate);
  2132. return 0;
  2133. }
  2134. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2135. struct snd_ctl_elem_value *ucontrol)
  2136. {
  2137. pr_debug("%s: proxy_rx channels = %d\n",
  2138. __func__, proxy_rx_cfg.channels);
  2139. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2140. return 0;
  2141. }
  2142. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2143. struct snd_ctl_elem_value *ucontrol)
  2144. {
  2145. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2146. pr_debug("%s: proxy_rx channels = %d\n",
  2147. __func__, proxy_rx_cfg.channels);
  2148. return 1;
  2149. }
  2150. static int tdm_get_sample_rate(int value)
  2151. {
  2152. int sample_rate = 0;
  2153. switch (value) {
  2154. case 0:
  2155. sample_rate = SAMPLING_RATE_8KHZ;
  2156. break;
  2157. case 1:
  2158. sample_rate = SAMPLING_RATE_16KHZ;
  2159. break;
  2160. case 2:
  2161. sample_rate = SAMPLING_RATE_32KHZ;
  2162. break;
  2163. case 3:
  2164. sample_rate = SAMPLING_RATE_48KHZ;
  2165. break;
  2166. case 4:
  2167. sample_rate = SAMPLING_RATE_176P4KHZ;
  2168. break;
  2169. case 5:
  2170. sample_rate = SAMPLING_RATE_352P8KHZ;
  2171. break;
  2172. default:
  2173. sample_rate = SAMPLING_RATE_48KHZ;
  2174. break;
  2175. }
  2176. return sample_rate;
  2177. }
  2178. static int aux_pcm_get_sample_rate(int value)
  2179. {
  2180. int sample_rate;
  2181. switch (value) {
  2182. case 1:
  2183. sample_rate = SAMPLING_RATE_16KHZ;
  2184. break;
  2185. case 0:
  2186. default:
  2187. sample_rate = SAMPLING_RATE_8KHZ;
  2188. break;
  2189. }
  2190. return sample_rate;
  2191. }
  2192. static int tdm_get_sample_rate_val(int sample_rate)
  2193. {
  2194. int sample_rate_val = 0;
  2195. switch (sample_rate) {
  2196. case SAMPLING_RATE_8KHZ:
  2197. sample_rate_val = 0;
  2198. break;
  2199. case SAMPLING_RATE_16KHZ:
  2200. sample_rate_val = 1;
  2201. break;
  2202. case SAMPLING_RATE_32KHZ:
  2203. sample_rate_val = 2;
  2204. break;
  2205. case SAMPLING_RATE_48KHZ:
  2206. sample_rate_val = 3;
  2207. break;
  2208. case SAMPLING_RATE_176P4KHZ:
  2209. sample_rate_val = 4;
  2210. break;
  2211. case SAMPLING_RATE_352P8KHZ:
  2212. sample_rate_val = 5;
  2213. break;
  2214. default:
  2215. sample_rate_val = 3;
  2216. break;
  2217. }
  2218. return sample_rate_val;
  2219. }
  2220. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2221. {
  2222. int sample_rate_val;
  2223. switch (sample_rate) {
  2224. case SAMPLING_RATE_16KHZ:
  2225. sample_rate_val = 1;
  2226. break;
  2227. case SAMPLING_RATE_8KHZ:
  2228. default:
  2229. sample_rate_val = 0;
  2230. break;
  2231. }
  2232. return sample_rate_val;
  2233. }
  2234. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2235. struct tdm_port *port)
  2236. {
  2237. if (port) {
  2238. if (strnstr(kcontrol->id.name, "PRI",
  2239. sizeof(kcontrol->id.name))) {
  2240. port->mode = TDM_PRI;
  2241. } else if (strnstr(kcontrol->id.name, "SEC",
  2242. sizeof(kcontrol->id.name))) {
  2243. port->mode = TDM_SEC;
  2244. } else if (strnstr(kcontrol->id.name, "TERT",
  2245. sizeof(kcontrol->id.name))) {
  2246. port->mode = TDM_TERT;
  2247. } else if (strnstr(kcontrol->id.name, "QUAT",
  2248. sizeof(kcontrol->id.name))) {
  2249. port->mode = TDM_QUAT;
  2250. } else if (strnstr(kcontrol->id.name, "QUIN",
  2251. sizeof(kcontrol->id.name))) {
  2252. port->mode = TDM_QUIN;
  2253. } else {
  2254. pr_err("%s: unsupported mode in: %s\n",
  2255. __func__, kcontrol->id.name);
  2256. return -EINVAL;
  2257. }
  2258. if (strnstr(kcontrol->id.name, "RX_0",
  2259. sizeof(kcontrol->id.name)) ||
  2260. strnstr(kcontrol->id.name, "TX_0",
  2261. sizeof(kcontrol->id.name))) {
  2262. port->channel = TDM_0;
  2263. } else if (strnstr(kcontrol->id.name, "RX_1",
  2264. sizeof(kcontrol->id.name)) ||
  2265. strnstr(kcontrol->id.name, "TX_1",
  2266. sizeof(kcontrol->id.name))) {
  2267. port->channel = TDM_1;
  2268. } else if (strnstr(kcontrol->id.name, "RX_2",
  2269. sizeof(kcontrol->id.name)) ||
  2270. strnstr(kcontrol->id.name, "TX_2",
  2271. sizeof(kcontrol->id.name))) {
  2272. port->channel = TDM_2;
  2273. } else if (strnstr(kcontrol->id.name, "RX_3",
  2274. sizeof(kcontrol->id.name)) ||
  2275. strnstr(kcontrol->id.name, "TX_3",
  2276. sizeof(kcontrol->id.name))) {
  2277. port->channel = TDM_3;
  2278. } else if (strnstr(kcontrol->id.name, "RX_4",
  2279. sizeof(kcontrol->id.name)) ||
  2280. strnstr(kcontrol->id.name, "TX_4",
  2281. sizeof(kcontrol->id.name))) {
  2282. port->channel = TDM_4;
  2283. } else if (strnstr(kcontrol->id.name, "RX_5",
  2284. sizeof(kcontrol->id.name)) ||
  2285. strnstr(kcontrol->id.name, "TX_5",
  2286. sizeof(kcontrol->id.name))) {
  2287. port->channel = TDM_5;
  2288. } else if (strnstr(kcontrol->id.name, "RX_6",
  2289. sizeof(kcontrol->id.name)) ||
  2290. strnstr(kcontrol->id.name, "TX_6",
  2291. sizeof(kcontrol->id.name))) {
  2292. port->channel = TDM_6;
  2293. } else if (strnstr(kcontrol->id.name, "RX_7",
  2294. sizeof(kcontrol->id.name)) ||
  2295. strnstr(kcontrol->id.name, "TX_7",
  2296. sizeof(kcontrol->id.name))) {
  2297. port->channel = TDM_7;
  2298. } else {
  2299. pr_err("%s: unsupported channel in: %s\n",
  2300. __func__, kcontrol->id.name);
  2301. return -EINVAL;
  2302. }
  2303. } else {
  2304. return -EINVAL;
  2305. }
  2306. return 0;
  2307. }
  2308. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2309. struct snd_ctl_elem_value *ucontrol)
  2310. {
  2311. struct tdm_port port;
  2312. int ret = tdm_get_port_idx(kcontrol, &port);
  2313. if (ret) {
  2314. pr_err("%s: unsupported control: %s\n",
  2315. __func__, kcontrol->id.name);
  2316. } else {
  2317. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2318. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2319. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2320. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2321. ucontrol->value.enumerated.item[0]);
  2322. }
  2323. return ret;
  2324. }
  2325. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2326. struct snd_ctl_elem_value *ucontrol)
  2327. {
  2328. struct tdm_port port;
  2329. int ret = tdm_get_port_idx(kcontrol, &port);
  2330. if (ret) {
  2331. pr_err("%s: unsupported control: %s\n",
  2332. __func__, kcontrol->id.name);
  2333. } else {
  2334. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2335. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2336. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2337. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2338. ucontrol->value.enumerated.item[0]);
  2339. }
  2340. return ret;
  2341. }
  2342. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2343. struct snd_ctl_elem_value *ucontrol)
  2344. {
  2345. struct tdm_port port;
  2346. int ret = tdm_get_port_idx(kcontrol, &port);
  2347. if (ret) {
  2348. pr_err("%s: unsupported control: %s\n",
  2349. __func__, kcontrol->id.name);
  2350. } else {
  2351. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2352. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2353. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2354. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2355. ucontrol->value.enumerated.item[0]);
  2356. }
  2357. return ret;
  2358. }
  2359. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2360. struct snd_ctl_elem_value *ucontrol)
  2361. {
  2362. struct tdm_port port;
  2363. int ret = tdm_get_port_idx(kcontrol, &port);
  2364. if (ret) {
  2365. pr_err("%s: unsupported control: %s\n",
  2366. __func__, kcontrol->id.name);
  2367. } else {
  2368. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2369. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2370. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2371. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2372. ucontrol->value.enumerated.item[0]);
  2373. }
  2374. return ret;
  2375. }
  2376. static int tdm_get_format(int value)
  2377. {
  2378. int format = 0;
  2379. switch (value) {
  2380. case 0:
  2381. format = SNDRV_PCM_FORMAT_S16_LE;
  2382. break;
  2383. case 1:
  2384. format = SNDRV_PCM_FORMAT_S24_LE;
  2385. break;
  2386. case 2:
  2387. format = SNDRV_PCM_FORMAT_S32_LE;
  2388. break;
  2389. default:
  2390. format = SNDRV_PCM_FORMAT_S16_LE;
  2391. break;
  2392. }
  2393. return format;
  2394. }
  2395. static int tdm_get_format_val(int format)
  2396. {
  2397. int value = 0;
  2398. switch (format) {
  2399. case SNDRV_PCM_FORMAT_S16_LE:
  2400. value = 0;
  2401. break;
  2402. case SNDRV_PCM_FORMAT_S24_LE:
  2403. value = 1;
  2404. break;
  2405. case SNDRV_PCM_FORMAT_S32_LE:
  2406. value = 2;
  2407. break;
  2408. default:
  2409. value = 0;
  2410. break;
  2411. }
  2412. return value;
  2413. }
  2414. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2415. struct snd_ctl_elem_value *ucontrol)
  2416. {
  2417. struct tdm_port port;
  2418. int ret = tdm_get_port_idx(kcontrol, &port);
  2419. if (ret) {
  2420. pr_err("%s: unsupported control: %s\n",
  2421. __func__, kcontrol->id.name);
  2422. } else {
  2423. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2424. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2425. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2426. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2427. ucontrol->value.enumerated.item[0]);
  2428. }
  2429. return ret;
  2430. }
  2431. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2432. struct snd_ctl_elem_value *ucontrol)
  2433. {
  2434. struct tdm_port port;
  2435. int ret = tdm_get_port_idx(kcontrol, &port);
  2436. if (ret) {
  2437. pr_err("%s: unsupported control: %s\n",
  2438. __func__, kcontrol->id.name);
  2439. } else {
  2440. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2441. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2442. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2443. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2444. ucontrol->value.enumerated.item[0]);
  2445. }
  2446. return ret;
  2447. }
  2448. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2449. struct snd_ctl_elem_value *ucontrol)
  2450. {
  2451. struct tdm_port port;
  2452. int ret = tdm_get_port_idx(kcontrol, &port);
  2453. if (ret) {
  2454. pr_err("%s: unsupported control: %s\n",
  2455. __func__, kcontrol->id.name);
  2456. } else {
  2457. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2458. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2459. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2460. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2461. ucontrol->value.enumerated.item[0]);
  2462. }
  2463. return ret;
  2464. }
  2465. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2466. struct snd_ctl_elem_value *ucontrol)
  2467. {
  2468. struct tdm_port port;
  2469. int ret = tdm_get_port_idx(kcontrol, &port);
  2470. if (ret) {
  2471. pr_err("%s: unsupported control: %s\n",
  2472. __func__, kcontrol->id.name);
  2473. } else {
  2474. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2475. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2476. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2477. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2478. ucontrol->value.enumerated.item[0]);
  2479. }
  2480. return ret;
  2481. }
  2482. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2483. struct snd_ctl_elem_value *ucontrol)
  2484. {
  2485. struct tdm_port port;
  2486. int ret = tdm_get_port_idx(kcontrol, &port);
  2487. if (ret) {
  2488. pr_err("%s: unsupported control: %s\n",
  2489. __func__, kcontrol->id.name);
  2490. } else {
  2491. ucontrol->value.enumerated.item[0] =
  2492. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2493. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2494. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2495. ucontrol->value.enumerated.item[0]);
  2496. }
  2497. return ret;
  2498. }
  2499. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2500. struct snd_ctl_elem_value *ucontrol)
  2501. {
  2502. struct tdm_port port;
  2503. int ret = tdm_get_port_idx(kcontrol, &port);
  2504. if (ret) {
  2505. pr_err("%s: unsupported control: %s\n",
  2506. __func__, kcontrol->id.name);
  2507. } else {
  2508. tdm_rx_cfg[port.mode][port.channel].channels =
  2509. ucontrol->value.enumerated.item[0] + 1;
  2510. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2511. tdm_rx_cfg[port.mode][port.channel].channels,
  2512. ucontrol->value.enumerated.item[0] + 1);
  2513. }
  2514. return ret;
  2515. }
  2516. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2517. struct snd_ctl_elem_value *ucontrol)
  2518. {
  2519. struct tdm_port port;
  2520. int ret = tdm_get_port_idx(kcontrol, &port);
  2521. if (ret) {
  2522. pr_err("%s: unsupported control: %s\n",
  2523. __func__, kcontrol->id.name);
  2524. } else {
  2525. ucontrol->value.enumerated.item[0] =
  2526. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2527. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2528. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2529. ucontrol->value.enumerated.item[0]);
  2530. }
  2531. return ret;
  2532. }
  2533. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2534. struct snd_ctl_elem_value *ucontrol)
  2535. {
  2536. struct tdm_port port;
  2537. int ret = tdm_get_port_idx(kcontrol, &port);
  2538. if (ret) {
  2539. pr_err("%s: unsupported control: %s\n",
  2540. __func__, kcontrol->id.name);
  2541. } else {
  2542. tdm_tx_cfg[port.mode][port.channel].channels =
  2543. ucontrol->value.enumerated.item[0] + 1;
  2544. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2545. tdm_tx_cfg[port.mode][port.channel].channels,
  2546. ucontrol->value.enumerated.item[0] + 1);
  2547. }
  2548. return ret;
  2549. }
  2550. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2551. {
  2552. int idx;
  2553. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2554. sizeof("PRIM_AUX_PCM"))) {
  2555. idx = PRIM_AUX_PCM;
  2556. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2557. sizeof("SEC_AUX_PCM"))) {
  2558. idx = SEC_AUX_PCM;
  2559. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2560. sizeof("TERT_AUX_PCM"))) {
  2561. idx = TERT_AUX_PCM;
  2562. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2563. sizeof("QUAT_AUX_PCM"))) {
  2564. idx = QUAT_AUX_PCM;
  2565. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2566. sizeof("QUIN_AUX_PCM"))) {
  2567. idx = QUIN_AUX_PCM;
  2568. } else {
  2569. pr_err("%s: unsupported port: %s\n",
  2570. __func__, kcontrol->id.name);
  2571. idx = -EINVAL;
  2572. }
  2573. return idx;
  2574. }
  2575. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2576. struct snd_ctl_elem_value *ucontrol)
  2577. {
  2578. int idx = aux_pcm_get_port_idx(kcontrol);
  2579. if (idx < 0)
  2580. return idx;
  2581. aux_pcm_rx_cfg[idx].sample_rate =
  2582. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2583. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2584. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2585. ucontrol->value.enumerated.item[0]);
  2586. return 0;
  2587. }
  2588. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2589. struct snd_ctl_elem_value *ucontrol)
  2590. {
  2591. int idx = aux_pcm_get_port_idx(kcontrol);
  2592. if (idx < 0)
  2593. return idx;
  2594. ucontrol->value.enumerated.item[0] =
  2595. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2596. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2597. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2598. ucontrol->value.enumerated.item[0]);
  2599. return 0;
  2600. }
  2601. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2602. struct snd_ctl_elem_value *ucontrol)
  2603. {
  2604. int idx = aux_pcm_get_port_idx(kcontrol);
  2605. if (idx < 0)
  2606. return idx;
  2607. aux_pcm_tx_cfg[idx].sample_rate =
  2608. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2609. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2610. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2611. ucontrol->value.enumerated.item[0]);
  2612. return 0;
  2613. }
  2614. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2615. struct snd_ctl_elem_value *ucontrol)
  2616. {
  2617. int idx = aux_pcm_get_port_idx(kcontrol);
  2618. if (idx < 0)
  2619. return idx;
  2620. ucontrol->value.enumerated.item[0] =
  2621. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2622. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2623. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2624. ucontrol->value.enumerated.item[0]);
  2625. return 0;
  2626. }
  2627. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2628. {
  2629. int idx;
  2630. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2631. sizeof("PRIM_MI2S_RX"))) {
  2632. idx = PRIM_MI2S;
  2633. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2634. sizeof("SEC_MI2S_RX"))) {
  2635. idx = SEC_MI2S;
  2636. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2637. sizeof("TERT_MI2S_RX"))) {
  2638. idx = TERT_MI2S;
  2639. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2640. sizeof("QUAT_MI2S_RX"))) {
  2641. idx = QUAT_MI2S;
  2642. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2643. sizeof("QUIN_MI2S_RX"))) {
  2644. idx = QUIN_MI2S;
  2645. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2646. sizeof("PRIM_MI2S_TX"))) {
  2647. idx = PRIM_MI2S;
  2648. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2649. sizeof("SEC_MI2S_TX"))) {
  2650. idx = SEC_MI2S;
  2651. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2652. sizeof("TERT_MI2S_TX"))) {
  2653. idx = TERT_MI2S;
  2654. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2655. sizeof("QUAT_MI2S_TX"))) {
  2656. idx = QUAT_MI2S;
  2657. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2658. sizeof("QUIN_MI2S_TX"))) {
  2659. idx = QUIN_MI2S;
  2660. } else {
  2661. pr_err("%s: unsupported channel: %s\n",
  2662. __func__, kcontrol->id.name);
  2663. idx = -EINVAL;
  2664. }
  2665. return idx;
  2666. }
  2667. static int mi2s_get_sample_rate_val(int sample_rate)
  2668. {
  2669. int sample_rate_val;
  2670. switch (sample_rate) {
  2671. case SAMPLING_RATE_8KHZ:
  2672. sample_rate_val = 0;
  2673. break;
  2674. case SAMPLING_RATE_11P025KHZ:
  2675. sample_rate_val = 1;
  2676. break;
  2677. case SAMPLING_RATE_16KHZ:
  2678. sample_rate_val = 2;
  2679. break;
  2680. case SAMPLING_RATE_22P05KHZ:
  2681. sample_rate_val = 3;
  2682. break;
  2683. case SAMPLING_RATE_32KHZ:
  2684. sample_rate_val = 4;
  2685. break;
  2686. case SAMPLING_RATE_44P1KHZ:
  2687. sample_rate_val = 5;
  2688. break;
  2689. case SAMPLING_RATE_48KHZ:
  2690. sample_rate_val = 6;
  2691. break;
  2692. case SAMPLING_RATE_96KHZ:
  2693. sample_rate_val = 7;
  2694. break;
  2695. case SAMPLING_RATE_192KHZ:
  2696. sample_rate_val = 8;
  2697. break;
  2698. default:
  2699. sample_rate_val = 6;
  2700. break;
  2701. }
  2702. return sample_rate_val;
  2703. }
  2704. static int mi2s_get_sample_rate(int value)
  2705. {
  2706. int sample_rate;
  2707. switch (value) {
  2708. case 0:
  2709. sample_rate = SAMPLING_RATE_8KHZ;
  2710. break;
  2711. case 1:
  2712. sample_rate = SAMPLING_RATE_11P025KHZ;
  2713. break;
  2714. case 2:
  2715. sample_rate = SAMPLING_RATE_16KHZ;
  2716. break;
  2717. case 3:
  2718. sample_rate = SAMPLING_RATE_22P05KHZ;
  2719. break;
  2720. case 4:
  2721. sample_rate = SAMPLING_RATE_32KHZ;
  2722. break;
  2723. case 5:
  2724. sample_rate = SAMPLING_RATE_44P1KHZ;
  2725. break;
  2726. case 6:
  2727. sample_rate = SAMPLING_RATE_48KHZ;
  2728. break;
  2729. case 7:
  2730. sample_rate = SAMPLING_RATE_96KHZ;
  2731. break;
  2732. case 8:
  2733. sample_rate = SAMPLING_RATE_192KHZ;
  2734. break;
  2735. default:
  2736. sample_rate = SAMPLING_RATE_48KHZ;
  2737. break;
  2738. }
  2739. return sample_rate;
  2740. }
  2741. static int mi2s_auxpcm_get_format(int value)
  2742. {
  2743. int format;
  2744. switch (value) {
  2745. case 0:
  2746. format = SNDRV_PCM_FORMAT_S16_LE;
  2747. break;
  2748. case 1:
  2749. format = SNDRV_PCM_FORMAT_S24_LE;
  2750. break;
  2751. case 2:
  2752. format = SNDRV_PCM_FORMAT_S24_3LE;
  2753. break;
  2754. case 3:
  2755. format = SNDRV_PCM_FORMAT_S32_LE;
  2756. break;
  2757. default:
  2758. format = SNDRV_PCM_FORMAT_S16_LE;
  2759. break;
  2760. }
  2761. return format;
  2762. }
  2763. static int mi2s_auxpcm_get_format_value(int format)
  2764. {
  2765. int value;
  2766. switch (format) {
  2767. case SNDRV_PCM_FORMAT_S16_LE:
  2768. value = 0;
  2769. break;
  2770. case SNDRV_PCM_FORMAT_S24_LE:
  2771. value = 1;
  2772. break;
  2773. case SNDRV_PCM_FORMAT_S24_3LE:
  2774. value = 2;
  2775. break;
  2776. case SNDRV_PCM_FORMAT_S32_LE:
  2777. value = 3;
  2778. break;
  2779. default:
  2780. value = 0;
  2781. break;
  2782. }
  2783. return value;
  2784. }
  2785. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2786. struct snd_ctl_elem_value *ucontrol)
  2787. {
  2788. int idx = mi2s_get_port_idx(kcontrol);
  2789. if (idx < 0)
  2790. return idx;
  2791. mi2s_rx_cfg[idx].sample_rate =
  2792. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2793. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2794. idx, mi2s_rx_cfg[idx].sample_rate,
  2795. ucontrol->value.enumerated.item[0]);
  2796. return 0;
  2797. }
  2798. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2799. struct snd_ctl_elem_value *ucontrol)
  2800. {
  2801. int idx = mi2s_get_port_idx(kcontrol);
  2802. if (idx < 0)
  2803. return idx;
  2804. ucontrol->value.enumerated.item[0] =
  2805. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2806. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2807. idx, mi2s_rx_cfg[idx].sample_rate,
  2808. ucontrol->value.enumerated.item[0]);
  2809. return 0;
  2810. }
  2811. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2812. struct snd_ctl_elem_value *ucontrol)
  2813. {
  2814. int idx = mi2s_get_port_idx(kcontrol);
  2815. if (idx < 0)
  2816. return idx;
  2817. mi2s_tx_cfg[idx].sample_rate =
  2818. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2819. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2820. idx, mi2s_tx_cfg[idx].sample_rate,
  2821. ucontrol->value.enumerated.item[0]);
  2822. return 0;
  2823. }
  2824. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2825. struct snd_ctl_elem_value *ucontrol)
  2826. {
  2827. int idx = mi2s_get_port_idx(kcontrol);
  2828. if (idx < 0)
  2829. return idx;
  2830. ucontrol->value.enumerated.item[0] =
  2831. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2832. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2833. idx, mi2s_tx_cfg[idx].sample_rate,
  2834. ucontrol->value.enumerated.item[0]);
  2835. return 0;
  2836. }
  2837. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2838. struct snd_ctl_elem_value *ucontrol)
  2839. {
  2840. int idx = mi2s_get_port_idx(kcontrol);
  2841. if (idx < 0)
  2842. return idx;
  2843. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2844. idx, mi2s_rx_cfg[idx].channels);
  2845. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2846. return 0;
  2847. }
  2848. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2849. struct snd_ctl_elem_value *ucontrol)
  2850. {
  2851. int idx = mi2s_get_port_idx(kcontrol);
  2852. if (idx < 0)
  2853. return idx;
  2854. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2855. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2856. idx, mi2s_rx_cfg[idx].channels);
  2857. return 1;
  2858. }
  2859. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2860. struct snd_ctl_elem_value *ucontrol)
  2861. {
  2862. int idx = mi2s_get_port_idx(kcontrol);
  2863. if (idx < 0)
  2864. return idx;
  2865. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2866. idx, mi2s_tx_cfg[idx].channels);
  2867. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2868. return 0;
  2869. }
  2870. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2871. struct snd_ctl_elem_value *ucontrol)
  2872. {
  2873. int idx = mi2s_get_port_idx(kcontrol);
  2874. if (idx < 0)
  2875. return idx;
  2876. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2877. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2878. idx, mi2s_tx_cfg[idx].channels);
  2879. return 1;
  2880. }
  2881. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2882. struct snd_ctl_elem_value *ucontrol)
  2883. {
  2884. int idx = mi2s_get_port_idx(kcontrol);
  2885. if (idx < 0)
  2886. return idx;
  2887. ucontrol->value.enumerated.item[0] =
  2888. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2889. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2890. idx, mi2s_rx_cfg[idx].bit_format,
  2891. ucontrol->value.enumerated.item[0]);
  2892. return 0;
  2893. }
  2894. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2895. struct snd_ctl_elem_value *ucontrol)
  2896. {
  2897. int idx = mi2s_get_port_idx(kcontrol);
  2898. if (idx < 0)
  2899. return idx;
  2900. mi2s_rx_cfg[idx].bit_format =
  2901. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2902. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2903. idx, mi2s_rx_cfg[idx].bit_format,
  2904. ucontrol->value.enumerated.item[0]);
  2905. return 0;
  2906. }
  2907. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2908. struct snd_ctl_elem_value *ucontrol)
  2909. {
  2910. int idx = mi2s_get_port_idx(kcontrol);
  2911. if (idx < 0)
  2912. return idx;
  2913. ucontrol->value.enumerated.item[0] =
  2914. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2915. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2916. idx, mi2s_tx_cfg[idx].bit_format,
  2917. ucontrol->value.enumerated.item[0]);
  2918. return 0;
  2919. }
  2920. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2921. struct snd_ctl_elem_value *ucontrol)
  2922. {
  2923. int idx = mi2s_get_port_idx(kcontrol);
  2924. if (idx < 0)
  2925. return idx;
  2926. mi2s_tx_cfg[idx].bit_format =
  2927. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2928. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2929. idx, mi2s_tx_cfg[idx].bit_format,
  2930. ucontrol->value.enumerated.item[0]);
  2931. return 0;
  2932. }
  2933. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2934. struct snd_ctl_elem_value *ucontrol)
  2935. {
  2936. int idx = aux_pcm_get_port_idx(kcontrol);
  2937. if (idx < 0)
  2938. return idx;
  2939. ucontrol->value.enumerated.item[0] =
  2940. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2941. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2942. idx, aux_pcm_rx_cfg[idx].bit_format,
  2943. ucontrol->value.enumerated.item[0]);
  2944. return 0;
  2945. }
  2946. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2947. struct snd_ctl_elem_value *ucontrol)
  2948. {
  2949. int idx = aux_pcm_get_port_idx(kcontrol);
  2950. if (idx < 0)
  2951. return idx;
  2952. aux_pcm_rx_cfg[idx].bit_format =
  2953. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2954. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2955. idx, aux_pcm_rx_cfg[idx].bit_format,
  2956. ucontrol->value.enumerated.item[0]);
  2957. return 0;
  2958. }
  2959. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2960. struct snd_ctl_elem_value *ucontrol)
  2961. {
  2962. int idx = aux_pcm_get_port_idx(kcontrol);
  2963. if (idx < 0)
  2964. return idx;
  2965. ucontrol->value.enumerated.item[0] =
  2966. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2967. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2968. idx, aux_pcm_tx_cfg[idx].bit_format,
  2969. ucontrol->value.enumerated.item[0]);
  2970. return 0;
  2971. }
  2972. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2973. struct snd_ctl_elem_value *ucontrol)
  2974. {
  2975. int idx = aux_pcm_get_port_idx(kcontrol);
  2976. if (idx < 0)
  2977. return idx;
  2978. aux_pcm_tx_cfg[idx].bit_format =
  2979. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2980. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2981. idx, aux_pcm_tx_cfg[idx].bit_format,
  2982. ucontrol->value.enumerated.item[0]);
  2983. return 0;
  2984. }
  2985. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2986. {
  2987. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2988. struct snd_soc_card *card = codec->component.card;
  2989. struct msm_asoc_mach_data *pdata =
  2990. snd_soc_card_get_drvdata(card);
  2991. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2992. msm_hifi_control);
  2993. if (!pdata || !pdata->hph_en1_gpio_p) {
  2994. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2995. return -EINVAL;
  2996. }
  2997. if (msm_hifi_control == MSM_HIFI_ON) {
  2998. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2999. /* 5msec delay needed as per HW requirement */
  3000. usleep_range(5000, 5010);
  3001. } else {
  3002. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3003. }
  3004. snd_soc_dapm_sync(dapm);
  3005. return 0;
  3006. }
  3007. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3008. struct snd_ctl_elem_value *ucontrol)
  3009. {
  3010. pr_debug("%s: msm_hifi_control = %d\n",
  3011. __func__, msm_hifi_control);
  3012. ucontrol->value.integer.value[0] = msm_hifi_control;
  3013. return 0;
  3014. }
  3015. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3016. struct snd_ctl_elem_value *ucontrol)
  3017. {
  3018. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  3019. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3020. __func__, ucontrol->value.integer.value[0]);
  3021. msm_hifi_control = ucontrol->value.integer.value[0];
  3022. msm_hifi_ctrl(codec);
  3023. return 0;
  3024. }
  3025. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3026. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3027. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3028. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3029. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3030. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3031. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3032. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3033. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3034. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3035. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3036. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3037. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3038. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3039. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3040. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3041. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3042. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3043. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3044. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3045. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3046. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3047. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3048. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3049. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3050. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3051. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3052. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3053. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3054. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3055. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3056. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3057. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3058. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3059. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3060. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3061. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3062. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3063. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3064. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3065. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3066. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3067. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3068. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3069. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3070. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3071. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3072. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3073. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3074. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3075. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3076. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3077. wsa_cdc_dma_rx_0_sample_rate,
  3078. cdc_dma_rx_sample_rate_get,
  3079. cdc_dma_rx_sample_rate_put),
  3080. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3081. wsa_cdc_dma_rx_1_sample_rate,
  3082. cdc_dma_rx_sample_rate_get,
  3083. cdc_dma_rx_sample_rate_put),
  3084. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3085. rx_cdc_dma_rx_0_sample_rate,
  3086. cdc_dma_rx_sample_rate_get,
  3087. cdc_dma_rx_sample_rate_put),
  3088. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3089. rx_cdc_dma_rx_1_sample_rate,
  3090. cdc_dma_rx_sample_rate_get,
  3091. cdc_dma_rx_sample_rate_put),
  3092. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3093. rx_cdc_dma_rx_2_sample_rate,
  3094. cdc_dma_rx_sample_rate_get,
  3095. cdc_dma_rx_sample_rate_put),
  3096. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3097. rx_cdc_dma_rx_3_sample_rate,
  3098. cdc_dma_rx_sample_rate_get,
  3099. cdc_dma_rx_sample_rate_put),
  3100. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3101. rx_cdc_dma_rx_5_sample_rate,
  3102. cdc_dma_rx_sample_rate_get,
  3103. cdc_dma_rx_sample_rate_put),
  3104. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3105. wsa_cdc_dma_tx_0_sample_rate,
  3106. cdc_dma_tx_sample_rate_get,
  3107. cdc_dma_tx_sample_rate_put),
  3108. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3109. wsa_cdc_dma_tx_1_sample_rate,
  3110. cdc_dma_tx_sample_rate_get,
  3111. cdc_dma_tx_sample_rate_put),
  3112. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3113. wsa_cdc_dma_tx_2_sample_rate,
  3114. cdc_dma_tx_sample_rate_get,
  3115. cdc_dma_tx_sample_rate_put),
  3116. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3117. tx_cdc_dma_tx_0_sample_rate,
  3118. cdc_dma_tx_sample_rate_get,
  3119. cdc_dma_tx_sample_rate_put),
  3120. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3121. tx_cdc_dma_tx_3_sample_rate,
  3122. cdc_dma_tx_sample_rate_get,
  3123. cdc_dma_tx_sample_rate_put),
  3124. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3125. tx_cdc_dma_tx_4_sample_rate,
  3126. cdc_dma_tx_sample_rate_get,
  3127. cdc_dma_tx_sample_rate_put),
  3128. };
  3129. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3130. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3131. slim_rx_ch_get, slim_rx_ch_put),
  3132. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3133. slim_rx_ch_get, slim_rx_ch_put),
  3134. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3135. slim_tx_ch_get, slim_tx_ch_put),
  3136. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3137. slim_tx_ch_get, slim_tx_ch_put),
  3138. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3139. slim_rx_ch_get, slim_rx_ch_put),
  3140. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3141. slim_rx_ch_get, slim_rx_ch_put),
  3142. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3143. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3144. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3145. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3146. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3147. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3148. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3149. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3150. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3151. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3152. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3153. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3154. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3155. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3156. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3157. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3158. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3159. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3160. };
  3161. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3162. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3163. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3164. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3165. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3166. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3167. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3168. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3169. proxy_rx_ch_get, proxy_rx_ch_put),
  3170. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3171. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3172. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3173. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3174. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3175. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3176. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3177. usb_audio_rx_sample_rate_get,
  3178. usb_audio_rx_sample_rate_put),
  3179. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3180. usb_audio_tx_sample_rate_get,
  3181. usb_audio_tx_sample_rate_put),
  3182. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3183. ext_disp_rx_sample_rate_get,
  3184. ext_disp_rx_sample_rate_put),
  3185. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3186. tdm_rx_sample_rate_get,
  3187. tdm_rx_sample_rate_put),
  3188. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3189. tdm_tx_sample_rate_get,
  3190. tdm_tx_sample_rate_put),
  3191. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3192. tdm_rx_format_get,
  3193. tdm_rx_format_put),
  3194. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3195. tdm_tx_format_get,
  3196. tdm_tx_format_put),
  3197. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3198. tdm_rx_ch_get,
  3199. tdm_rx_ch_put),
  3200. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3201. tdm_tx_ch_get,
  3202. tdm_tx_ch_put),
  3203. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3204. tdm_rx_sample_rate_get,
  3205. tdm_rx_sample_rate_put),
  3206. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3207. tdm_tx_sample_rate_get,
  3208. tdm_tx_sample_rate_put),
  3209. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3210. tdm_rx_format_get,
  3211. tdm_rx_format_put),
  3212. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3213. tdm_tx_format_get,
  3214. tdm_tx_format_put),
  3215. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3216. tdm_rx_ch_get,
  3217. tdm_rx_ch_put),
  3218. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3219. tdm_tx_ch_get,
  3220. tdm_tx_ch_put),
  3221. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3222. tdm_rx_sample_rate_get,
  3223. tdm_rx_sample_rate_put),
  3224. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3225. tdm_tx_sample_rate_get,
  3226. tdm_tx_sample_rate_put),
  3227. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3228. tdm_rx_format_get,
  3229. tdm_rx_format_put),
  3230. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3231. tdm_tx_format_get,
  3232. tdm_tx_format_put),
  3233. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3234. tdm_rx_ch_get,
  3235. tdm_rx_ch_put),
  3236. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3237. tdm_tx_ch_get,
  3238. tdm_tx_ch_put),
  3239. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3240. tdm_rx_sample_rate_get,
  3241. tdm_rx_sample_rate_put),
  3242. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3243. tdm_tx_sample_rate_get,
  3244. tdm_tx_sample_rate_put),
  3245. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3246. tdm_rx_format_get,
  3247. tdm_rx_format_put),
  3248. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3249. tdm_tx_format_get,
  3250. tdm_tx_format_put),
  3251. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3252. tdm_rx_ch_get,
  3253. tdm_rx_ch_put),
  3254. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3255. tdm_tx_ch_get,
  3256. tdm_tx_ch_put),
  3257. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3258. tdm_rx_sample_rate_get,
  3259. tdm_rx_sample_rate_put),
  3260. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3261. tdm_tx_sample_rate_get,
  3262. tdm_tx_sample_rate_put),
  3263. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3264. tdm_rx_format_get,
  3265. tdm_rx_format_put),
  3266. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3267. tdm_tx_format_get,
  3268. tdm_tx_format_put),
  3269. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3270. tdm_rx_ch_get,
  3271. tdm_rx_ch_put),
  3272. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3273. tdm_tx_ch_get,
  3274. tdm_tx_ch_put),
  3275. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3276. aux_pcm_rx_sample_rate_get,
  3277. aux_pcm_rx_sample_rate_put),
  3278. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3279. aux_pcm_rx_sample_rate_get,
  3280. aux_pcm_rx_sample_rate_put),
  3281. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3282. aux_pcm_rx_sample_rate_get,
  3283. aux_pcm_rx_sample_rate_put),
  3284. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3285. aux_pcm_rx_sample_rate_get,
  3286. aux_pcm_rx_sample_rate_put),
  3287. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3288. aux_pcm_rx_sample_rate_get,
  3289. aux_pcm_rx_sample_rate_put),
  3290. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3291. aux_pcm_tx_sample_rate_get,
  3292. aux_pcm_tx_sample_rate_put),
  3293. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3294. aux_pcm_tx_sample_rate_get,
  3295. aux_pcm_tx_sample_rate_put),
  3296. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3297. aux_pcm_tx_sample_rate_get,
  3298. aux_pcm_tx_sample_rate_put),
  3299. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3300. aux_pcm_tx_sample_rate_get,
  3301. aux_pcm_tx_sample_rate_put),
  3302. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3303. aux_pcm_tx_sample_rate_get,
  3304. aux_pcm_tx_sample_rate_put),
  3305. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3306. mi2s_rx_sample_rate_get,
  3307. mi2s_rx_sample_rate_put),
  3308. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3309. mi2s_rx_sample_rate_get,
  3310. mi2s_rx_sample_rate_put),
  3311. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3312. mi2s_rx_sample_rate_get,
  3313. mi2s_rx_sample_rate_put),
  3314. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3315. mi2s_rx_sample_rate_get,
  3316. mi2s_rx_sample_rate_put),
  3317. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3318. mi2s_rx_sample_rate_get,
  3319. mi2s_rx_sample_rate_put),
  3320. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3321. mi2s_tx_sample_rate_get,
  3322. mi2s_tx_sample_rate_put),
  3323. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3324. mi2s_tx_sample_rate_get,
  3325. mi2s_tx_sample_rate_put),
  3326. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3327. mi2s_tx_sample_rate_get,
  3328. mi2s_tx_sample_rate_put),
  3329. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3330. mi2s_tx_sample_rate_get,
  3331. mi2s_tx_sample_rate_put),
  3332. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3333. mi2s_tx_sample_rate_get,
  3334. mi2s_tx_sample_rate_put),
  3335. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3336. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3337. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3338. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3339. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3340. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3341. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3342. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3343. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3344. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3345. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3346. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3347. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3348. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3349. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3350. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3351. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3352. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3353. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3354. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3355. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3356. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3357. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3358. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3359. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3360. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3361. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3362. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3363. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3364. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3365. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3366. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3367. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3368. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3369. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3370. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3371. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3372. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3373. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3374. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3375. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3376. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3377. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3378. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3379. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3380. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3381. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3382. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3383. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3384. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3385. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3386. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3387. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3388. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3389. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3390. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3391. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3392. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3393. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3394. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3395. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3396. msm_hifi_put),
  3397. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3398. msm_bt_sample_rate_get,
  3399. msm_bt_sample_rate_put),
  3400. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3401. msm_bt_sample_rate_rx_get,
  3402. msm_bt_sample_rate_rx_put),
  3403. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3404. msm_bt_sample_rate_tx_get,
  3405. msm_bt_sample_rate_tx_put),
  3406. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3407. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3408. };
  3409. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3410. int enable, bool dapm)
  3411. {
  3412. int ret = 0;
  3413. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3414. ret = tavil_cdc_mclk_enable(codec, enable);
  3415. } else {
  3416. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3417. __func__);
  3418. ret = -EINVAL;
  3419. }
  3420. return ret;
  3421. }
  3422. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3423. int enable, bool dapm)
  3424. {
  3425. int ret = 0;
  3426. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3427. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3428. } else {
  3429. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3430. __func__);
  3431. ret = -EINVAL;
  3432. }
  3433. return ret;
  3434. }
  3435. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3436. struct snd_kcontrol *kcontrol, int event)
  3437. {
  3438. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3439. pr_debug("%s: event = %d\n", __func__, event);
  3440. switch (event) {
  3441. case SND_SOC_DAPM_PRE_PMU:
  3442. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3443. case SND_SOC_DAPM_POST_PMD:
  3444. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3445. }
  3446. return 0;
  3447. }
  3448. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3449. struct snd_kcontrol *kcontrol, int event)
  3450. {
  3451. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3452. pr_debug("%s: event = %d\n", __func__, event);
  3453. switch (event) {
  3454. case SND_SOC_DAPM_PRE_PMU:
  3455. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3456. case SND_SOC_DAPM_POST_PMD:
  3457. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3458. }
  3459. return 0;
  3460. }
  3461. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3462. struct snd_kcontrol *k, int event)
  3463. {
  3464. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3465. struct snd_soc_card *card = codec->component.card;
  3466. struct msm_asoc_mach_data *pdata =
  3467. snd_soc_card_get_drvdata(card);
  3468. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3469. __func__, msm_hifi_control);
  3470. if (!pdata || !pdata->hph_en0_gpio_p) {
  3471. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3472. return -EINVAL;
  3473. }
  3474. if (msm_hifi_control != MSM_HIFI_ON) {
  3475. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3476. __func__);
  3477. return 0;
  3478. }
  3479. switch (event) {
  3480. case SND_SOC_DAPM_POST_PMU:
  3481. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3482. break;
  3483. case SND_SOC_DAPM_PRE_PMD:
  3484. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3485. break;
  3486. }
  3487. return 0;
  3488. }
  3489. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3490. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3491. msm_mclk_event,
  3492. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3493. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3494. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3495. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3496. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3497. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3498. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3499. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3500. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3501. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3502. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3503. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3504. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3505. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3506. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3507. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3508. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3509. };
  3510. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3511. struct snd_kcontrol *kcontrol, int event)
  3512. {
  3513. struct msm_asoc_mach_data *pdata = NULL;
  3514. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3515. int ret = 0;
  3516. u32 dmic_idx;
  3517. int *dmic_gpio_cnt;
  3518. struct device_node *dmic_gpio;
  3519. char *wname;
  3520. wname = strpbrk(w->name, "0123");
  3521. if (!wname) {
  3522. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3523. return -EINVAL;
  3524. }
  3525. ret = kstrtouint(wname, 10, &dmic_idx);
  3526. if (ret < 0) {
  3527. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3528. __func__);
  3529. return -EINVAL;
  3530. }
  3531. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3532. switch (dmic_idx) {
  3533. case 0:
  3534. case 1:
  3535. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3536. dmic_gpio = pdata->dmic01_gpio_p;
  3537. break;
  3538. case 2:
  3539. case 3:
  3540. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3541. dmic_gpio = pdata->dmic23_gpio_p;
  3542. break;
  3543. default:
  3544. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3545. __func__);
  3546. return -EINVAL;
  3547. }
  3548. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3549. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3550. switch (event) {
  3551. case SND_SOC_DAPM_PRE_PMU:
  3552. (*dmic_gpio_cnt)++;
  3553. if (*dmic_gpio_cnt == 1) {
  3554. ret = msm_cdc_pinctrl_select_active_state(
  3555. dmic_gpio);
  3556. if (ret < 0) {
  3557. pr_err("%s: gpio set cannot be activated %sd",
  3558. __func__, "dmic_gpio");
  3559. return ret;
  3560. }
  3561. }
  3562. break;
  3563. case SND_SOC_DAPM_POST_PMD:
  3564. (*dmic_gpio_cnt)--;
  3565. if (*dmic_gpio_cnt == 0) {
  3566. ret = msm_cdc_pinctrl_select_sleep_state(
  3567. dmic_gpio);
  3568. if (ret < 0) {
  3569. pr_err("%s: gpio set cannot be de-activated %sd",
  3570. __func__, "dmic_gpio");
  3571. return ret;
  3572. }
  3573. }
  3574. break;
  3575. default:
  3576. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3577. return -EINVAL;
  3578. }
  3579. return 0;
  3580. }
  3581. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3582. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3583. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3584. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3585. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3586. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3587. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3588. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3589. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3590. };
  3591. static inline int param_is_mask(int p)
  3592. {
  3593. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3594. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3595. }
  3596. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3597. int n)
  3598. {
  3599. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3600. }
  3601. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3602. unsigned int bit)
  3603. {
  3604. if (bit >= SNDRV_MASK_MAX)
  3605. return;
  3606. if (param_is_mask(n)) {
  3607. struct snd_mask *m = param_to_mask(p, n);
  3608. m->bits[0] = 0;
  3609. m->bits[1] = 0;
  3610. m->bits[bit >> 5] |= (1 << (bit & 31));
  3611. }
  3612. }
  3613. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3614. {
  3615. int ch_id = 0;
  3616. switch (be_id) {
  3617. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3618. ch_id = SLIM_RX_0;
  3619. break;
  3620. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3621. ch_id = SLIM_RX_1;
  3622. break;
  3623. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3624. ch_id = SLIM_RX_2;
  3625. break;
  3626. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3627. ch_id = SLIM_RX_3;
  3628. break;
  3629. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3630. ch_id = SLIM_RX_4;
  3631. break;
  3632. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3633. ch_id = SLIM_RX_6;
  3634. break;
  3635. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3636. ch_id = SLIM_TX_0;
  3637. break;
  3638. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3639. ch_id = SLIM_TX_3;
  3640. break;
  3641. default:
  3642. ch_id = SLIM_RX_0;
  3643. break;
  3644. }
  3645. return ch_id;
  3646. }
  3647. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3648. {
  3649. int idx = 0;
  3650. switch (be_id) {
  3651. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3652. idx = WSA_CDC_DMA_RX_0;
  3653. break;
  3654. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3655. idx = WSA_CDC_DMA_TX_0;
  3656. break;
  3657. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3658. idx = WSA_CDC_DMA_RX_1;
  3659. break;
  3660. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3661. idx = WSA_CDC_DMA_TX_1;
  3662. break;
  3663. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3664. idx = WSA_CDC_DMA_TX_2;
  3665. break;
  3666. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3667. idx = RX_CDC_DMA_RX_0;
  3668. break;
  3669. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3670. idx = RX_CDC_DMA_RX_1;
  3671. break;
  3672. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3673. idx = RX_CDC_DMA_RX_2;
  3674. break;
  3675. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3676. idx = RX_CDC_DMA_RX_3;
  3677. break;
  3678. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3679. idx = RX_CDC_DMA_RX_5;
  3680. break;
  3681. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3682. idx = TX_CDC_DMA_TX_0;
  3683. break;
  3684. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3685. idx = TX_CDC_DMA_TX_3;
  3686. break;
  3687. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3688. idx = TX_CDC_DMA_TX_4;
  3689. break;
  3690. default:
  3691. idx = RX_CDC_DMA_RX_0;
  3692. break;
  3693. }
  3694. return idx;
  3695. }
  3696. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3697. {
  3698. int idx = -EINVAL;
  3699. switch (be_id) {
  3700. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3701. idx = DP_RX_IDX;
  3702. break;
  3703. default:
  3704. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3705. idx = -EINVAL;
  3706. break;
  3707. }
  3708. return idx;
  3709. }
  3710. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3711. struct snd_pcm_hw_params *params)
  3712. {
  3713. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3714. struct snd_interval *rate = hw_param_interval(params,
  3715. SNDRV_PCM_HW_PARAM_RATE);
  3716. struct snd_interval *channels = hw_param_interval(params,
  3717. SNDRV_PCM_HW_PARAM_CHANNELS);
  3718. int rc = 0;
  3719. int idx;
  3720. void *config = NULL;
  3721. struct snd_soc_codec *codec = NULL;
  3722. pr_debug("%s: format = %d, rate = %d\n",
  3723. __func__, params_format(params), params_rate(params));
  3724. switch (dai_link->id) {
  3725. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3726. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3727. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3728. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3729. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3730. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3731. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3732. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3733. slim_rx_cfg[idx].bit_format);
  3734. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3735. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3736. break;
  3737. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3738. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3739. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3740. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3741. slim_tx_cfg[idx].bit_format);
  3742. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3743. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3744. break;
  3745. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3746. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3747. slim_tx_cfg[1].bit_format);
  3748. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3749. channels->min = channels->max = slim_tx_cfg[1].channels;
  3750. break;
  3751. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3752. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3753. SNDRV_PCM_FORMAT_S32_LE);
  3754. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3755. channels->min = channels->max = msm_vi_feed_tx_ch;
  3756. break;
  3757. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3758. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3759. slim_rx_cfg[5].bit_format);
  3760. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3761. channels->min = channels->max = slim_rx_cfg[5].channels;
  3762. break;
  3763. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3764. codec = rtd->codec;
  3765. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3766. channels->min = channels->max = 1;
  3767. config = msm_codec_fn.get_afe_config_fn(codec,
  3768. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3769. if (config) {
  3770. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3771. config, SLIMBUS_5_TX);
  3772. if (rc)
  3773. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3774. __func__, rc);
  3775. }
  3776. break;
  3777. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3778. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3779. slim_rx_cfg[SLIM_RX_7].bit_format);
  3780. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3781. channels->min = channels->max =
  3782. slim_rx_cfg[SLIM_RX_7].channels;
  3783. break;
  3784. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3785. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3786. channels->min = channels->max =
  3787. slim_tx_cfg[SLIM_TX_7].channels;
  3788. break;
  3789. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3790. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3791. channels->min = channels->max =
  3792. slim_tx_cfg[SLIM_TX_8].channels;
  3793. break;
  3794. case MSM_BACKEND_DAI_USB_RX:
  3795. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3796. usb_rx_cfg.bit_format);
  3797. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3798. channels->min = channels->max = usb_rx_cfg.channels;
  3799. break;
  3800. case MSM_BACKEND_DAI_USB_TX:
  3801. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3802. usb_tx_cfg.bit_format);
  3803. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3804. channels->min = channels->max = usb_tx_cfg.channels;
  3805. break;
  3806. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3807. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3808. if (idx < 0) {
  3809. pr_err("%s: Incorrect ext disp idx %d\n",
  3810. __func__, idx);
  3811. rc = idx;
  3812. goto done;
  3813. }
  3814. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3815. ext_disp_rx_cfg[idx].bit_format);
  3816. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3817. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3818. break;
  3819. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3820. channels->min = channels->max = proxy_rx_cfg.channels;
  3821. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3822. break;
  3823. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3824. channels->min = channels->max =
  3825. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3826. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3827. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3828. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3829. break;
  3830. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3831. channels->min = channels->max =
  3832. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3833. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3834. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3835. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3836. break;
  3837. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3838. channels->min = channels->max =
  3839. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3840. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3841. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3842. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3843. break;
  3844. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3845. channels->min = channels->max =
  3846. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3847. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3848. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3849. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3850. break;
  3851. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3852. channels->min = channels->max =
  3853. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3854. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3855. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3856. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3857. break;
  3858. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3859. channels->min = channels->max =
  3860. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3861. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3862. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3863. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3864. break;
  3865. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3866. channels->min = channels->max =
  3867. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3868. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3869. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3870. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3871. break;
  3872. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3873. channels->min = channels->max =
  3874. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3875. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3876. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3877. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3878. break;
  3879. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3880. channels->min = channels->max =
  3881. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3882. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3883. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3884. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3885. break;
  3886. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3887. channels->min = channels->max =
  3888. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3890. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3891. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3892. break;
  3893. case MSM_BACKEND_DAI_AUXPCM_RX:
  3894. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3895. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3896. rate->min = rate->max =
  3897. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3898. channels->min = channels->max =
  3899. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3900. break;
  3901. case MSM_BACKEND_DAI_AUXPCM_TX:
  3902. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3903. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3904. rate->min = rate->max =
  3905. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3906. channels->min = channels->max =
  3907. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3908. break;
  3909. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3910. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3911. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3912. rate->min = rate->max =
  3913. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3914. channels->min = channels->max =
  3915. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3916. break;
  3917. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3918. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3919. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3920. rate->min = rate->max =
  3921. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3922. channels->min = channels->max =
  3923. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3924. break;
  3925. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3926. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3927. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3928. rate->min = rate->max =
  3929. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3930. channels->min = channels->max =
  3931. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3932. break;
  3933. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3934. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3935. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3936. rate->min = rate->max =
  3937. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3938. channels->min = channels->max =
  3939. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3940. break;
  3941. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3942. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3943. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3944. rate->min = rate->max =
  3945. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3946. channels->min = channels->max =
  3947. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3948. break;
  3949. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3950. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3951. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3952. rate->min = rate->max =
  3953. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3954. channels->min = channels->max =
  3955. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3956. break;
  3957. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3958. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3959. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3960. rate->min = rate->max =
  3961. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3962. channels->min = channels->max =
  3963. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3964. break;
  3965. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3966. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3967. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3968. rate->min = rate->max =
  3969. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3970. channels->min = channels->max =
  3971. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3972. break;
  3973. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3974. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3975. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3976. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3977. channels->min = channels->max =
  3978. mi2s_rx_cfg[PRIM_MI2S].channels;
  3979. break;
  3980. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3981. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3982. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3983. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3984. channels->min = channels->max =
  3985. mi2s_tx_cfg[PRIM_MI2S].channels;
  3986. break;
  3987. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3988. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3989. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3990. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3991. channels->min = channels->max =
  3992. mi2s_rx_cfg[SEC_MI2S].channels;
  3993. break;
  3994. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3995. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3996. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3997. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3998. channels->min = channels->max =
  3999. mi2s_tx_cfg[SEC_MI2S].channels;
  4000. break;
  4001. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4002. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4003. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4004. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4005. channels->min = channels->max =
  4006. mi2s_rx_cfg[TERT_MI2S].channels;
  4007. break;
  4008. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4009. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4010. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4011. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4012. channels->min = channels->max =
  4013. mi2s_tx_cfg[TERT_MI2S].channels;
  4014. break;
  4015. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4016. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4017. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4018. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4019. channels->min = channels->max =
  4020. mi2s_rx_cfg[QUAT_MI2S].channels;
  4021. break;
  4022. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4023. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4024. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4025. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4026. channels->min = channels->max =
  4027. mi2s_tx_cfg[QUAT_MI2S].channels;
  4028. break;
  4029. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4030. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4031. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4032. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4033. channels->min = channels->max =
  4034. mi2s_rx_cfg[QUIN_MI2S].channels;
  4035. break;
  4036. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4037. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4038. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4039. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4040. channels->min = channels->max =
  4041. mi2s_tx_cfg[QUIN_MI2S].channels;
  4042. break;
  4043. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4044. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4045. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4046. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4047. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4048. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4049. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4050. cdc_dma_rx_cfg[idx].bit_format);
  4051. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4052. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4053. break;
  4054. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4055. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4056. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4057. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4058. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4059. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4060. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4061. cdc_dma_tx_cfg[idx].bit_format);
  4062. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4063. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4064. break;
  4065. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4066. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4067. SNDRV_PCM_FORMAT_S32_LE);
  4068. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4069. channels->min = channels->max = msm_vi_feed_tx_ch;
  4070. break;
  4071. default:
  4072. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4073. break;
  4074. }
  4075. done:
  4076. return rc;
  4077. }
  4078. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4079. {
  4080. struct snd_soc_card *card = codec->component.card;
  4081. struct msm_asoc_mach_data *pdata =
  4082. snd_soc_card_get_drvdata(card);
  4083. if (!pdata->fsa_handle)
  4084. return false;
  4085. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4086. }
  4087. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4088. {
  4089. int value = 0;
  4090. bool ret = false;
  4091. struct snd_soc_card *card;
  4092. struct msm_asoc_mach_data *pdata;
  4093. if (!codec) {
  4094. pr_err("%s codec is NULL\n", __func__);
  4095. return false;
  4096. }
  4097. card = codec->component.card;
  4098. pdata = snd_soc_card_get_drvdata(card);
  4099. if (!pdata)
  4100. return false;
  4101. if (wcd_mbhc_cfg.enable_usbc_analog)
  4102. return msm_usbc_swap_gnd_mic(codec, active);
  4103. /* if usbc is not defined, swap using us_euro_gpio_p */
  4104. if (pdata->us_euro_gpio_p) {
  4105. value = msm_cdc_pinctrl_get_state(
  4106. pdata->us_euro_gpio_p);
  4107. if (value)
  4108. msm_cdc_pinctrl_select_sleep_state(
  4109. pdata->us_euro_gpio_p);
  4110. else
  4111. msm_cdc_pinctrl_select_active_state(
  4112. pdata->us_euro_gpio_p);
  4113. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4114. __func__, value, !value);
  4115. ret = true;
  4116. }
  4117. return ret;
  4118. }
  4119. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4120. {
  4121. int ret = 0;
  4122. void *config_data = NULL;
  4123. if (!msm_codec_fn.get_afe_config_fn) {
  4124. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4125. __func__);
  4126. return -EINVAL;
  4127. }
  4128. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4129. AFE_CDC_REGISTERS_CONFIG);
  4130. if (config_data) {
  4131. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4132. if (ret) {
  4133. dev_err(codec->dev,
  4134. "%s: Failed to set codec registers config %d\n",
  4135. __func__, ret);
  4136. return ret;
  4137. }
  4138. }
  4139. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4140. AFE_CDC_REGISTER_PAGE_CONFIG);
  4141. if (config_data) {
  4142. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4143. 0);
  4144. if (ret)
  4145. dev_err(codec->dev,
  4146. "%s: Failed to set cdc register page config\n",
  4147. __func__);
  4148. }
  4149. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4150. AFE_SLIMBUS_SLAVE_CONFIG);
  4151. if (config_data) {
  4152. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4153. if (ret) {
  4154. dev_err(codec->dev,
  4155. "%s: Failed to set slimbus slave config %d\n",
  4156. __func__, ret);
  4157. return ret;
  4158. }
  4159. }
  4160. return 0;
  4161. }
  4162. static void msm_afe_clear_config(void)
  4163. {
  4164. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4165. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4166. }
  4167. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4168. {
  4169. int ret = 0;
  4170. void *config_data;
  4171. struct snd_soc_codec *codec = rtd->codec;
  4172. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4173. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4174. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4175. struct snd_soc_component *aux_comp;
  4176. struct snd_card *card;
  4177. struct snd_info_entry *entry;
  4178. struct msm_asoc_mach_data *pdata =
  4179. snd_soc_card_get_drvdata(rtd->card);
  4180. /*
  4181. * Codec SLIMBUS configuration
  4182. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4183. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4184. * TX14, TX15, TX16
  4185. */
  4186. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4187. 150, 151};
  4188. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4189. 134, 135, 136, 137, 138, 139,
  4190. 140, 141, 142, 143};
  4191. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4192. rtd->pmdown_time = 0;
  4193. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4194. ARRAY_SIZE(msm_tavil_snd_controls));
  4195. if (ret < 0) {
  4196. pr_err("%s: add_codec_controls failed, err %d\n",
  4197. __func__, ret);
  4198. return ret;
  4199. }
  4200. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4201. ARRAY_SIZE(msm_common_snd_controls));
  4202. if (ret < 0) {
  4203. pr_err("%s: add_codec_controls failed, err %d\n",
  4204. __func__, ret);
  4205. return ret;
  4206. }
  4207. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4208. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4209. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4210. ARRAY_SIZE(wcd_audio_paths_tavil));
  4211. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4212. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4213. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4214. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4216. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4217. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4220. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4221. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4222. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4223. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4224. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4225. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4226. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4227. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4228. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4229. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4230. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4231. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4232. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4233. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4234. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4235. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4236. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4237. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4238. snd_soc_dapm_sync(dapm);
  4239. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4240. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4241. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4242. ret = msm_afe_set_config(codec);
  4243. if (ret) {
  4244. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4245. goto err;
  4246. }
  4247. pdata->is_afe_config_done = true;
  4248. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4249. AFE_AANC_VERSION);
  4250. if (config_data) {
  4251. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4252. if (ret) {
  4253. pr_err("%s: Failed to set aanc version %d\n",
  4254. __func__, ret);
  4255. goto err;
  4256. }
  4257. }
  4258. /*
  4259. * Send speaker configuration only for WSA8810.
  4260. * Default configuration is for WSA8815.
  4261. */
  4262. pr_debug("%s: Number of aux devices: %d\n",
  4263. __func__, rtd->card->num_aux_devs);
  4264. if (rtd->card->num_aux_devs &&
  4265. !list_empty(&rtd->card->aux_comp_list)) {
  4266. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4267. struct snd_soc_component, card_aux_list);
  4268. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4269. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4270. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4271. tavil_set_spkr_gain_offset(rtd->codec,
  4272. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4273. }
  4274. }
  4275. card = rtd->card->snd_card;
  4276. entry = snd_info_create_subdir(card->module, "codecs",
  4277. card->proc_root);
  4278. if (!entry) {
  4279. pr_debug("%s: Cannot create codecs module entry\n",
  4280. __func__);
  4281. ret = 0;
  4282. goto err;
  4283. }
  4284. pdata->codec_root = entry;
  4285. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4286. codec_reg_done = true;
  4287. return 0;
  4288. err:
  4289. return ret;
  4290. }
  4291. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4292. {
  4293. int ret = 0;
  4294. struct snd_soc_codec *codec = rtd->codec;
  4295. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4296. struct snd_card *card;
  4297. struct snd_info_entry *entry;
  4298. struct snd_soc_component *aux_comp;
  4299. struct msm_asoc_mach_data *pdata =
  4300. snd_soc_card_get_drvdata(rtd->card);
  4301. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4302. ARRAY_SIZE(msm_int_snd_controls));
  4303. if (ret < 0) {
  4304. pr_err("%s: add_codec_controls failed: %d\n",
  4305. __func__, ret);
  4306. return ret;
  4307. }
  4308. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4309. ARRAY_SIZE(msm_common_snd_controls));
  4310. if (ret < 0) {
  4311. pr_err("%s: add common snd controls failed: %d\n",
  4312. __func__, ret);
  4313. return ret;
  4314. }
  4315. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4316. ARRAY_SIZE(msm_int_dapm_widgets));
  4317. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4318. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4319. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4320. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4322. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4323. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4324. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4325. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4326. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4327. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4328. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4329. snd_soc_dapm_sync(dapm);
  4330. /*
  4331. * Send speaker configuration only for WSA8810.
  4332. * Default configuration is for WSA8815.
  4333. */
  4334. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4335. __func__, rtd->card->num_aux_devs);
  4336. if (rtd->card->num_aux_devs &&
  4337. !list_empty(&rtd->card->component_dev_list)) {
  4338. aux_comp = list_first_entry(
  4339. &rtd->card->component_dev_list,
  4340. struct snd_soc_component,
  4341. card_aux_list);
  4342. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4343. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4344. wsa_macro_set_spkr_mode(rtd->codec,
  4345. WSA_MACRO_SPKR_MODE_1);
  4346. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4347. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4348. }
  4349. }
  4350. card = rtd->card->snd_card;
  4351. if (!pdata->codec_root) {
  4352. entry = snd_info_create_subdir(card->module, "codecs",
  4353. card->proc_root);
  4354. if (!entry) {
  4355. pr_debug("%s: Cannot create codecs module entry\n",
  4356. __func__);
  4357. ret = 0;
  4358. goto err;
  4359. }
  4360. pdata->codec_root = entry;
  4361. }
  4362. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4363. codec_reg_done = true;
  4364. return 0;
  4365. err:
  4366. return ret;
  4367. }
  4368. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4369. {
  4370. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4371. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4372. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4373. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4374. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4375. }
  4376. static void *def_wcd_mbhc_cal(void)
  4377. {
  4378. void *wcd_mbhc_cal;
  4379. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4380. u16 *btn_high;
  4381. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4382. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4383. if (!wcd_mbhc_cal)
  4384. return NULL;
  4385. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4386. S(v_hs_max, 1600);
  4387. #undef S
  4388. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4389. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4390. #undef S
  4391. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4392. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4393. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4394. btn_high[0] = 75;
  4395. btn_high[1] = 150;
  4396. btn_high[2] = 237;
  4397. btn_high[3] = 500;
  4398. btn_high[4] = 500;
  4399. btn_high[5] = 500;
  4400. btn_high[6] = 500;
  4401. btn_high[7] = 500;
  4402. return wcd_mbhc_cal;
  4403. }
  4404. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4405. struct snd_pcm_hw_params *params)
  4406. {
  4407. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4408. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4409. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4410. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4411. int ret = 0;
  4412. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4413. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4414. u32 user_set_tx_ch = 0;
  4415. u32 rx_ch_count;
  4416. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4417. ret = snd_soc_dai_get_channel_map(codec_dai,
  4418. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4419. if (ret < 0) {
  4420. pr_err("%s: failed to get codec chan map, err:%d\n",
  4421. __func__, ret);
  4422. goto err;
  4423. }
  4424. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4425. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4426. slim_rx_cfg[5].channels);
  4427. rx_ch_count = slim_rx_cfg[5].channels;
  4428. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4429. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4430. slim_rx_cfg[2].channels);
  4431. rx_ch_count = slim_rx_cfg[2].channels;
  4432. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4433. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4434. slim_rx_cfg[6].channels);
  4435. rx_ch_count = slim_rx_cfg[6].channels;
  4436. } else {
  4437. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4438. slim_rx_cfg[0].channels);
  4439. rx_ch_count = slim_rx_cfg[0].channels;
  4440. }
  4441. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4442. rx_ch_count, rx_ch);
  4443. if (ret < 0) {
  4444. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4445. __func__, ret);
  4446. goto err;
  4447. }
  4448. } else {
  4449. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4450. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4451. ret = snd_soc_dai_get_channel_map(codec_dai,
  4452. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4453. if (ret < 0) {
  4454. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4455. __func__, ret);
  4456. goto err;
  4457. }
  4458. /* For <codec>_tx1 case */
  4459. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4460. user_set_tx_ch = slim_tx_cfg[0].channels;
  4461. /* For <codec>_tx3 case */
  4462. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4463. user_set_tx_ch = slim_tx_cfg[1].channels;
  4464. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4465. user_set_tx_ch = msm_vi_feed_tx_ch;
  4466. else
  4467. user_set_tx_ch = tx_ch_cnt;
  4468. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4469. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4470. tx_ch_cnt, dai_link->id);
  4471. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4472. user_set_tx_ch, tx_ch, 0, 0);
  4473. if (ret < 0)
  4474. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4475. __func__, ret);
  4476. }
  4477. err:
  4478. return ret;
  4479. }
  4480. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4481. struct snd_pcm_hw_params *params)
  4482. {
  4483. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4484. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4485. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4486. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4487. int ret = 0;
  4488. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4489. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4490. u32 user_set_tx_ch = 0;
  4491. u32 user_set_rx_ch = 0;
  4492. u32 ch_id;
  4493. ret = snd_soc_dai_get_channel_map(codec_dai,
  4494. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4495. &rx_ch_cdc_dma);
  4496. if (ret < 0) {
  4497. pr_err("%s: failed to get codec chan map, err:%d\n",
  4498. __func__, ret);
  4499. goto err;
  4500. }
  4501. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4502. switch (dai_link->id) {
  4503. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4504. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4505. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4506. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4507. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4508. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4509. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4510. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4511. {
  4512. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4513. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4514. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4515. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4516. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4517. user_set_rx_ch, &rx_ch_cdc_dma);
  4518. if (ret < 0) {
  4519. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4520. __func__, ret);
  4521. goto err;
  4522. }
  4523. }
  4524. break;
  4525. }
  4526. } else {
  4527. switch (dai_link->id) {
  4528. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4529. {
  4530. user_set_tx_ch = msm_vi_feed_tx_ch;
  4531. }
  4532. break;
  4533. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4534. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4535. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4536. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4537. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4538. {
  4539. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4540. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4541. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4542. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4543. }
  4544. break;
  4545. }
  4546. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4547. &tx_ch_cdc_dma, 0, 0);
  4548. if (ret < 0) {
  4549. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4550. __func__, ret);
  4551. goto err;
  4552. }
  4553. }
  4554. err:
  4555. return ret;
  4556. }
  4557. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4558. struct snd_pcm_hw_params *params)
  4559. {
  4560. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4561. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4562. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4563. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4564. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4565. unsigned int num_tx_ch = 0;
  4566. unsigned int num_rx_ch = 0;
  4567. int ret = 0;
  4568. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4569. num_rx_ch = params_channels(params);
  4570. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4571. codec_dai->name, codec_dai->id, num_rx_ch);
  4572. ret = snd_soc_dai_get_channel_map(codec_dai,
  4573. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4574. if (ret < 0) {
  4575. pr_err("%s: failed to get codec chan map, err:%d\n",
  4576. __func__, ret);
  4577. goto err;
  4578. }
  4579. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4580. num_rx_ch, rx_ch);
  4581. if (ret < 0) {
  4582. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4583. __func__, ret);
  4584. goto err;
  4585. }
  4586. } else {
  4587. num_tx_ch = params_channels(params);
  4588. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4589. codec_dai->name, codec_dai->id, num_tx_ch);
  4590. ret = snd_soc_dai_get_channel_map(codec_dai,
  4591. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4592. if (ret < 0) {
  4593. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4594. __func__, ret);
  4595. goto err;
  4596. }
  4597. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4598. num_tx_ch, tx_ch, 0, 0);
  4599. if (ret < 0) {
  4600. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4601. __func__, ret);
  4602. goto err;
  4603. }
  4604. }
  4605. err:
  4606. return ret;
  4607. }
  4608. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4609. struct snd_pcm_hw_params *params)
  4610. {
  4611. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4612. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4613. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4614. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4615. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4616. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4617. int ret;
  4618. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4619. codec_dai->name, codec_dai->id);
  4620. ret = snd_soc_dai_get_channel_map(codec_dai,
  4621. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4622. if (ret) {
  4623. dev_err(rtd->dev,
  4624. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4625. __func__, ret);
  4626. goto err;
  4627. }
  4628. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4629. __func__, tx_ch_cnt, dai_link->id);
  4630. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4631. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4632. if (ret)
  4633. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4634. __func__, ret);
  4635. err:
  4636. return ret;
  4637. }
  4638. static int msm_get_port_id(int be_id)
  4639. {
  4640. int afe_port_id;
  4641. switch (be_id) {
  4642. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4643. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4644. break;
  4645. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4646. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4647. break;
  4648. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4649. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4650. break;
  4651. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4652. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4653. break;
  4654. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4655. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4656. break;
  4657. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4658. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4659. break;
  4660. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4661. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4662. break;
  4663. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4664. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4665. break;
  4666. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4667. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4668. break;
  4669. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4670. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4671. break;
  4672. default:
  4673. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4674. afe_port_id = -EINVAL;
  4675. }
  4676. return afe_port_id;
  4677. }
  4678. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4679. {
  4680. u32 bit_per_sample;
  4681. switch (bit_format) {
  4682. case SNDRV_PCM_FORMAT_S32_LE:
  4683. case SNDRV_PCM_FORMAT_S24_3LE:
  4684. case SNDRV_PCM_FORMAT_S24_LE:
  4685. bit_per_sample = 32;
  4686. break;
  4687. case SNDRV_PCM_FORMAT_S16_LE:
  4688. default:
  4689. bit_per_sample = 16;
  4690. break;
  4691. }
  4692. return bit_per_sample;
  4693. }
  4694. static void update_mi2s_clk_val(int dai_id, int stream)
  4695. {
  4696. u32 bit_per_sample;
  4697. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4698. bit_per_sample =
  4699. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4700. mi2s_clk[dai_id].clk_freq_in_hz =
  4701. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4702. } else {
  4703. bit_per_sample =
  4704. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4705. mi2s_clk[dai_id].clk_freq_in_hz =
  4706. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4707. }
  4708. }
  4709. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4710. {
  4711. int ret = 0;
  4712. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4713. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4714. int port_id = 0;
  4715. int index = cpu_dai->id;
  4716. port_id = msm_get_port_id(rtd->dai_link->id);
  4717. if (port_id < 0) {
  4718. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4719. ret = port_id;
  4720. goto err;
  4721. }
  4722. if (enable) {
  4723. update_mi2s_clk_val(index, substream->stream);
  4724. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4725. mi2s_clk[index].clk_freq_in_hz);
  4726. }
  4727. mi2s_clk[index].enable = enable;
  4728. ret = afe_set_lpass_clock_v2(port_id,
  4729. &mi2s_clk[index]);
  4730. if (ret < 0) {
  4731. dev_err(rtd->card->dev,
  4732. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4733. __func__, port_id, ret);
  4734. goto err;
  4735. }
  4736. err:
  4737. return ret;
  4738. }
  4739. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4740. enum pinctrl_pin_state new_state)
  4741. {
  4742. int ret = 0;
  4743. int curr_state = 0;
  4744. if (pinctrl_info == NULL) {
  4745. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4746. ret = -EINVAL;
  4747. goto err;
  4748. }
  4749. if (pinctrl_info->pinctrl == NULL) {
  4750. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4751. ret = -EINVAL;
  4752. goto err;
  4753. }
  4754. curr_state = pinctrl_info->curr_state;
  4755. pinctrl_info->curr_state = new_state;
  4756. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4757. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4758. if (curr_state == pinctrl_info->curr_state) {
  4759. pr_debug("%s: Already in same state\n", __func__);
  4760. goto err;
  4761. }
  4762. if (curr_state != STATE_DISABLE &&
  4763. pinctrl_info->curr_state != STATE_DISABLE) {
  4764. pr_debug("%s: state already active cannot switch\n", __func__);
  4765. ret = -EIO;
  4766. goto err;
  4767. }
  4768. switch (pinctrl_info->curr_state) {
  4769. case STATE_MI2S_ACTIVE:
  4770. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4771. pinctrl_info->mi2s_active);
  4772. if (ret) {
  4773. pr_err("%s: MI2S state select failed with %d\n",
  4774. __func__, ret);
  4775. ret = -EIO;
  4776. goto err;
  4777. }
  4778. break;
  4779. case STATE_TDM_ACTIVE:
  4780. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4781. pinctrl_info->tdm_active);
  4782. if (ret) {
  4783. pr_err("%s: TDM state select failed with %d\n",
  4784. __func__, ret);
  4785. ret = -EIO;
  4786. goto err;
  4787. }
  4788. break;
  4789. case STATE_DISABLE:
  4790. if (curr_state == STATE_MI2S_ACTIVE) {
  4791. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4792. pinctrl_info->mi2s_disable);
  4793. } else {
  4794. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4795. pinctrl_info->tdm_disable);
  4796. }
  4797. if (ret) {
  4798. pr_err("%s: state disable failed with %d\n",
  4799. __func__, ret);
  4800. ret = -EIO;
  4801. goto err;
  4802. }
  4803. break;
  4804. default:
  4805. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4806. return -EINVAL;
  4807. }
  4808. err:
  4809. return ret;
  4810. }
  4811. static int msm_get_pinctrl(struct platform_device *pdev)
  4812. {
  4813. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4814. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4815. struct msm_pinctrl_info *pinctrl_info = NULL;
  4816. struct pinctrl *pinctrl;
  4817. int ret = 0;
  4818. pinctrl_info = &pdata->pinctrl_info;
  4819. if (pinctrl_info == NULL) {
  4820. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4821. return -EINVAL;
  4822. }
  4823. pinctrl = devm_pinctrl_get(&pdev->dev);
  4824. if (IS_ERR_OR_NULL(pinctrl)) {
  4825. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4826. return -EINVAL;
  4827. }
  4828. pinctrl_info->pinctrl = pinctrl;
  4829. /* get all the states handles from Device Tree */
  4830. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4831. "quat-mi2s-sleep");
  4832. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4833. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4834. goto err;
  4835. }
  4836. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4837. "quat-mi2s-active");
  4838. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4839. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4840. goto err;
  4841. }
  4842. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4843. "quat-tdm-sleep");
  4844. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4845. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4846. goto err;
  4847. }
  4848. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4849. "quat-tdm-active");
  4850. if (IS_ERR(pinctrl_info->tdm_active)) {
  4851. pr_err("%s: could not get tdm_active pinstate\n",
  4852. __func__);
  4853. goto err;
  4854. }
  4855. /* Reset the TLMM pins to a default state */
  4856. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4857. pinctrl_info->mi2s_disable);
  4858. if (ret != 0) {
  4859. pr_err("%s: Disable TLMM pins failed with %d\n",
  4860. __func__, ret);
  4861. ret = -EIO;
  4862. goto err;
  4863. }
  4864. pinctrl_info->curr_state = STATE_DISABLE;
  4865. return 0;
  4866. err:
  4867. devm_pinctrl_put(pinctrl);
  4868. pinctrl_info->pinctrl = NULL;
  4869. return -EINVAL;
  4870. }
  4871. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4872. struct snd_pcm_hw_params *params)
  4873. {
  4874. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4875. struct snd_interval *rate = hw_param_interval(params,
  4876. SNDRV_PCM_HW_PARAM_RATE);
  4877. struct snd_interval *channels = hw_param_interval(params,
  4878. SNDRV_PCM_HW_PARAM_CHANNELS);
  4879. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4880. channels->min = channels->max =
  4881. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4882. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4883. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4884. rate->min = rate->max =
  4885. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4886. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4887. channels->min = channels->max =
  4888. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4889. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4890. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4891. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4892. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4893. channels->min = channels->max =
  4894. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4895. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4896. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4897. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4898. } else {
  4899. pr_err("%s: dai id 0x%x not supported\n",
  4900. __func__, cpu_dai->id);
  4901. return -EINVAL;
  4902. }
  4903. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4904. __func__, cpu_dai->id, channels->max, rate->max,
  4905. params_format(params));
  4906. return 0;
  4907. }
  4908. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4909. struct snd_pcm_hw_params *params)
  4910. {
  4911. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4912. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4913. int ret = 0;
  4914. int slot_width = 32;
  4915. int channels, slots;
  4916. unsigned int slot_mask, rate, clk_freq;
  4917. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4918. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4919. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4920. switch (cpu_dai->id) {
  4921. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4922. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4923. break;
  4924. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4925. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4926. break;
  4927. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4928. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4929. break;
  4930. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4931. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4932. break;
  4933. case AFE_PORT_ID_QUINARY_TDM_RX:
  4934. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4935. break;
  4936. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4937. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4938. break;
  4939. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4940. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4941. break;
  4942. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4943. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4944. break;
  4945. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4946. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4947. break;
  4948. case AFE_PORT_ID_QUINARY_TDM_TX:
  4949. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4950. break;
  4951. default:
  4952. pr_err("%s: dai id 0x%x not supported\n",
  4953. __func__, cpu_dai->id);
  4954. return -EINVAL;
  4955. }
  4956. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4957. /*2 slot config - bits 0 and 1 set for the first two slots */
  4958. slot_mask = 0x0000FFFF >> (16-slots);
  4959. channels = slots;
  4960. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4961. __func__, slot_width, slots);
  4962. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4963. slots, slot_width);
  4964. if (ret < 0) {
  4965. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4966. __func__, ret);
  4967. goto end;
  4968. }
  4969. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4970. 0, NULL, channels, slot_offset);
  4971. if (ret < 0) {
  4972. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4973. __func__, ret);
  4974. goto end;
  4975. }
  4976. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4977. /*2 slot config - bits 0 and 1 set for the first two slots */
  4978. slot_mask = 0x0000FFFF >> (16-slots);
  4979. channels = slots;
  4980. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4981. __func__, slot_width, slots);
  4982. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4983. slots, slot_width);
  4984. if (ret < 0) {
  4985. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  4986. __func__, ret);
  4987. goto end;
  4988. }
  4989. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4990. channels, slot_offset, 0, NULL);
  4991. if (ret < 0) {
  4992. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  4993. __func__, ret);
  4994. goto end;
  4995. }
  4996. } else {
  4997. ret = -EINVAL;
  4998. pr_err("%s: invalid use case, err:%d\n",
  4999. __func__, ret);
  5000. goto end;
  5001. }
  5002. rate = params_rate(params);
  5003. clk_freq = rate * slot_width * slots;
  5004. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5005. if (ret < 0)
  5006. pr_err("%s: failed to set tdm clk, err:%d\n",
  5007. __func__, ret);
  5008. end:
  5009. return ret;
  5010. }
  5011. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5012. {
  5013. int ret = 0;
  5014. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5015. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5016. struct snd_soc_card *card = rtd->card;
  5017. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5018. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5019. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5020. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5021. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5022. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5023. if (ret)
  5024. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5025. __func__, ret);
  5026. }
  5027. return ret;
  5028. }
  5029. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5030. {
  5031. int ret = 0;
  5032. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5033. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5034. struct snd_soc_card *card = rtd->card;
  5035. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5036. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5037. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5038. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5039. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5040. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5041. if (ret)
  5042. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5043. __func__, ret);
  5044. }
  5045. }
  5046. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5047. .hw_params = sm6150_tdm_snd_hw_params,
  5048. .startup = sm6150_tdm_snd_startup,
  5049. .shutdown = sm6150_tdm_snd_shutdown
  5050. };
  5051. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5052. {
  5053. cpumask_t mask;
  5054. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5055. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5056. cpumask_clear(&mask);
  5057. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5058. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5059. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5060. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5061. pm_qos_add_request(&substream->latency_pm_qos_req,
  5062. PM_QOS_CPU_DMA_LATENCY,
  5063. MSM_LL_QOS_VALUE);
  5064. return 0;
  5065. }
  5066. static struct snd_soc_ops msm_fe_qos_ops = {
  5067. .prepare = msm_fe_qos_prepare,
  5068. };
  5069. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5070. {
  5071. int ret = 0;
  5072. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5073. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5074. int index = cpu_dai->id;
  5075. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5076. struct snd_soc_card *card = rtd->card;
  5077. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5078. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5079. int ret_pinctrl = 0;
  5080. dev_dbg(rtd->card->dev,
  5081. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5082. __func__, substream->name, substream->stream,
  5083. cpu_dai->name, cpu_dai->id);
  5084. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5085. ret = -EINVAL;
  5086. dev_err(rtd->card->dev,
  5087. "%s: CPU DAI id (%d) out of range\n",
  5088. __func__, cpu_dai->id);
  5089. goto err;
  5090. }
  5091. /*
  5092. * Mutex protection in case the same MI2S
  5093. * interface using for both TX and RX so
  5094. * that the same clock won't be enable twice.
  5095. */
  5096. mutex_lock(&mi2s_intf_conf[index].lock);
  5097. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5098. /* Check if msm needs to provide the clock to the interface */
  5099. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5100. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5101. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5102. }
  5103. ret = msm_mi2s_set_sclk(substream, true);
  5104. if (ret < 0) {
  5105. dev_err(rtd->card->dev,
  5106. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5107. __func__, ret);
  5108. goto clean_up;
  5109. }
  5110. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5111. if (ret < 0) {
  5112. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5113. __func__, index, ret);
  5114. goto clk_off;
  5115. }
  5116. if (index == QUAT_MI2S) {
  5117. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5118. STATE_MI2S_ACTIVE);
  5119. if (ret_pinctrl)
  5120. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5121. __func__, ret_pinctrl);
  5122. }
  5123. }
  5124. clk_off:
  5125. if (ret < 0)
  5126. msm_mi2s_set_sclk(substream, false);
  5127. clean_up:
  5128. if (ret < 0)
  5129. mi2s_intf_conf[index].ref_cnt--;
  5130. mutex_unlock(&mi2s_intf_conf[index].lock);
  5131. err:
  5132. return ret;
  5133. }
  5134. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5135. {
  5136. int ret;
  5137. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5138. int index = rtd->cpu_dai->id;
  5139. struct snd_soc_card *card = rtd->card;
  5140. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5141. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5142. int ret_pinctrl = 0;
  5143. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5144. substream->name, substream->stream);
  5145. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5146. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5147. return;
  5148. }
  5149. mutex_lock(&mi2s_intf_conf[index].lock);
  5150. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5151. ret = msm_mi2s_set_sclk(substream, false);
  5152. if (ret < 0)
  5153. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5154. __func__, index, ret);
  5155. if (index == QUAT_MI2S) {
  5156. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5157. STATE_DISABLE);
  5158. if (ret_pinctrl)
  5159. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5160. __func__, ret_pinctrl);
  5161. }
  5162. }
  5163. mutex_unlock(&mi2s_intf_conf[index].lock);
  5164. }
  5165. static struct snd_soc_ops msm_mi2s_be_ops = {
  5166. .startup = msm_mi2s_snd_startup,
  5167. .shutdown = msm_mi2s_snd_shutdown,
  5168. };
  5169. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5170. .hw_params = msm_snd_cdc_dma_hw_params,
  5171. };
  5172. static struct snd_soc_ops msm_be_ops = {
  5173. .hw_params = msm_snd_hw_params,
  5174. };
  5175. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5176. .hw_params = msm_slimbus_2_hw_params,
  5177. };
  5178. static struct snd_soc_ops msm_wcn_ops = {
  5179. .hw_params = msm_wcn_hw_params,
  5180. };
  5181. /* Digital audio interface glue - connects codec <---> CPU */
  5182. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5183. /* FrontEnd DAI Links */
  5184. {/* hw:x,0 */
  5185. .name = MSM_DAILINK_NAME(Media1),
  5186. .stream_name = "MultiMedia1",
  5187. .cpu_dai_name = "MultiMedia1",
  5188. .platform_name = "msm-pcm-dsp.0",
  5189. .dynamic = 1,
  5190. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5191. .dpcm_playback = 1,
  5192. .dpcm_capture = 1,
  5193. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5194. SND_SOC_DPCM_TRIGGER_POST},
  5195. .codec_dai_name = "snd-soc-dummy-dai",
  5196. .codec_name = "snd-soc-dummy",
  5197. .ignore_suspend = 1,
  5198. /* this dainlink has playback support */
  5199. .ignore_pmdown_time = 1,
  5200. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5201. },
  5202. {/* hw:x,1 */
  5203. .name = MSM_DAILINK_NAME(Media2),
  5204. .stream_name = "MultiMedia2",
  5205. .cpu_dai_name = "MultiMedia2",
  5206. .platform_name = "msm-pcm-dsp.0",
  5207. .dynamic = 1,
  5208. .dpcm_playback = 1,
  5209. .dpcm_capture = 1,
  5210. .codec_dai_name = "snd-soc-dummy-dai",
  5211. .codec_name = "snd-soc-dummy",
  5212. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5213. SND_SOC_DPCM_TRIGGER_POST},
  5214. .ignore_suspend = 1,
  5215. /* this dainlink has playback support */
  5216. .ignore_pmdown_time = 1,
  5217. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5218. },
  5219. {/* hw:x,2 */
  5220. .name = "VoiceMMode1",
  5221. .stream_name = "VoiceMMode1",
  5222. .cpu_dai_name = "VoiceMMode1",
  5223. .platform_name = "msm-pcm-voice",
  5224. .dynamic = 1,
  5225. .dpcm_playback = 1,
  5226. .dpcm_capture = 1,
  5227. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5228. SND_SOC_DPCM_TRIGGER_POST},
  5229. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5230. .ignore_suspend = 1,
  5231. .ignore_pmdown_time = 1,
  5232. .codec_dai_name = "snd-soc-dummy-dai",
  5233. .codec_name = "snd-soc-dummy",
  5234. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5235. },
  5236. {/* hw:x,3 */
  5237. .name = "MSM VoIP",
  5238. .stream_name = "VoIP",
  5239. .cpu_dai_name = "VoIP",
  5240. .platform_name = "msm-voip-dsp",
  5241. .dynamic = 1,
  5242. .dpcm_playback = 1,
  5243. .dpcm_capture = 1,
  5244. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5245. SND_SOC_DPCM_TRIGGER_POST},
  5246. .codec_dai_name = "snd-soc-dummy-dai",
  5247. .codec_name = "snd-soc-dummy",
  5248. .ignore_suspend = 1,
  5249. /* this dainlink has playback support */
  5250. .ignore_pmdown_time = 1,
  5251. .id = MSM_FRONTEND_DAI_VOIP,
  5252. },
  5253. {/* hw:x,4 */
  5254. .name = MSM_DAILINK_NAME(ULL),
  5255. .stream_name = "MultiMedia3",
  5256. .cpu_dai_name = "MultiMedia3",
  5257. .platform_name = "msm-pcm-dsp.2",
  5258. .dynamic = 1,
  5259. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5260. .dpcm_playback = 1,
  5261. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5262. SND_SOC_DPCM_TRIGGER_POST},
  5263. .codec_dai_name = "snd-soc-dummy-dai",
  5264. .codec_name = "snd-soc-dummy",
  5265. .ignore_suspend = 1,
  5266. /* this dainlink has playback support */
  5267. .ignore_pmdown_time = 1,
  5268. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5269. },
  5270. /* Hostless PCM purpose */
  5271. {/* hw:x,5 */
  5272. .name = "SLIMBUS_0 Hostless",
  5273. .stream_name = "SLIMBUS_0 Hostless",
  5274. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5275. .platform_name = "msm-pcm-hostless",
  5276. .dynamic = 1,
  5277. .dpcm_playback = 1,
  5278. .dpcm_capture = 1,
  5279. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5280. SND_SOC_DPCM_TRIGGER_POST},
  5281. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5282. .ignore_suspend = 1,
  5283. /* this dailink has playback support */
  5284. .ignore_pmdown_time = 1,
  5285. .codec_dai_name = "snd-soc-dummy-dai",
  5286. .codec_name = "snd-soc-dummy",
  5287. },
  5288. {/* hw:x,6 */
  5289. .name = "MSM AFE-PCM RX",
  5290. .stream_name = "AFE-PROXY RX",
  5291. .cpu_dai_name = "msm-dai-q6-dev.241",
  5292. .codec_name = "msm-stub-codec.1",
  5293. .codec_dai_name = "msm-stub-rx",
  5294. .platform_name = "msm-pcm-afe",
  5295. .dpcm_playback = 1,
  5296. .ignore_suspend = 1,
  5297. /* this dainlink has playback support */
  5298. .ignore_pmdown_time = 1,
  5299. },
  5300. {/* hw:x,7 */
  5301. .name = "MSM AFE-PCM TX",
  5302. .stream_name = "AFE-PROXY TX",
  5303. .cpu_dai_name = "msm-dai-q6-dev.240",
  5304. .codec_name = "msm-stub-codec.1",
  5305. .codec_dai_name = "msm-stub-tx",
  5306. .platform_name = "msm-pcm-afe",
  5307. .dpcm_capture = 1,
  5308. .ignore_suspend = 1,
  5309. },
  5310. {/* hw:x,8 */
  5311. .name = MSM_DAILINK_NAME(Compress1),
  5312. .stream_name = "Compress1",
  5313. .cpu_dai_name = "MultiMedia4",
  5314. .platform_name = "msm-compress-dsp",
  5315. .dynamic = 1,
  5316. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5317. .dpcm_playback = 1,
  5318. .dpcm_capture = 1,
  5319. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5320. SND_SOC_DPCM_TRIGGER_POST},
  5321. .codec_dai_name = "snd-soc-dummy-dai",
  5322. .codec_name = "snd-soc-dummy",
  5323. .ignore_suspend = 1,
  5324. .ignore_pmdown_time = 1,
  5325. /* this dainlink has playback support */
  5326. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5327. },
  5328. {/* hw:x,9 */
  5329. .name = "AUXPCM Hostless",
  5330. .stream_name = "AUXPCM Hostless",
  5331. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5332. .platform_name = "msm-pcm-hostless",
  5333. .dynamic = 1,
  5334. .dpcm_playback = 1,
  5335. .dpcm_capture = 1,
  5336. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5337. SND_SOC_DPCM_TRIGGER_POST},
  5338. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5339. .ignore_suspend = 1,
  5340. /* this dainlink has playback support */
  5341. .ignore_pmdown_time = 1,
  5342. .codec_dai_name = "snd-soc-dummy-dai",
  5343. .codec_name = "snd-soc-dummy",
  5344. },
  5345. {/* hw:x,10 */
  5346. .name = "SLIMBUS_1 Hostless",
  5347. .stream_name = "SLIMBUS_1 Hostless",
  5348. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5349. .platform_name = "msm-pcm-hostless",
  5350. .dynamic = 1,
  5351. .dpcm_playback = 1,
  5352. .dpcm_capture = 1,
  5353. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5354. SND_SOC_DPCM_TRIGGER_POST},
  5355. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5356. .ignore_suspend = 1,
  5357. /* this dailink has playback support */
  5358. .ignore_pmdown_time = 1,
  5359. .codec_dai_name = "snd-soc-dummy-dai",
  5360. .codec_name = "snd-soc-dummy",
  5361. },
  5362. {/* hw:x,11 */
  5363. .name = "SLIMBUS_3 Hostless",
  5364. .stream_name = "SLIMBUS_3 Hostless",
  5365. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5366. .platform_name = "msm-pcm-hostless",
  5367. .dynamic = 1,
  5368. .dpcm_playback = 1,
  5369. .dpcm_capture = 1,
  5370. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5371. SND_SOC_DPCM_TRIGGER_POST},
  5372. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5373. .ignore_suspend = 1,
  5374. /* this dailink has playback support */
  5375. .ignore_pmdown_time = 1,
  5376. .codec_dai_name = "snd-soc-dummy-dai",
  5377. .codec_name = "snd-soc-dummy",
  5378. },
  5379. {/* hw:x,12 */
  5380. .name = "SLIMBUS_7 Hostless",
  5381. .stream_name = "SLIMBUS_7 Hostless",
  5382. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5383. .platform_name = "msm-pcm-hostless",
  5384. .dynamic = 1,
  5385. .dpcm_playback = 1,
  5386. .dpcm_capture = 1,
  5387. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5388. SND_SOC_DPCM_TRIGGER_POST},
  5389. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5390. .ignore_suspend = 1,
  5391. /* this dailink has playback support */
  5392. .ignore_pmdown_time = 1,
  5393. .codec_dai_name = "snd-soc-dummy-dai",
  5394. .codec_name = "snd-soc-dummy",
  5395. },
  5396. {/* hw:x,13 */
  5397. .name = MSM_DAILINK_NAME(LowLatency),
  5398. .stream_name = "MultiMedia5",
  5399. .cpu_dai_name = "MultiMedia5",
  5400. .platform_name = "msm-pcm-dsp.1",
  5401. .dynamic = 1,
  5402. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5403. .dpcm_playback = 1,
  5404. .dpcm_capture = 1,
  5405. .codec_dai_name = "snd-soc-dummy-dai",
  5406. .codec_name = "snd-soc-dummy",
  5407. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5408. SND_SOC_DPCM_TRIGGER_POST},
  5409. .ignore_suspend = 1,
  5410. /* this dainlink has playback support */
  5411. .ignore_pmdown_time = 1,
  5412. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5413. .ops = &msm_fe_qos_ops,
  5414. },
  5415. {/* hw:x,14 */
  5416. .name = "Listen 1 Audio Service",
  5417. .stream_name = "Listen 1 Audio Service",
  5418. .cpu_dai_name = "LSM1",
  5419. .platform_name = "msm-lsm-client",
  5420. .dynamic = 1,
  5421. .dpcm_capture = 1,
  5422. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5423. SND_SOC_DPCM_TRIGGER_POST },
  5424. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5425. .ignore_suspend = 1,
  5426. .codec_dai_name = "snd-soc-dummy-dai",
  5427. .codec_name = "snd-soc-dummy",
  5428. .id = MSM_FRONTEND_DAI_LSM1,
  5429. },
  5430. /* Multiple Tunnel instances */
  5431. {/* hw:x,15 */
  5432. .name = MSM_DAILINK_NAME(Compress2),
  5433. .stream_name = "Compress2",
  5434. .cpu_dai_name = "MultiMedia7",
  5435. .platform_name = "msm-compress-dsp",
  5436. .dynamic = 1,
  5437. .dpcm_playback = 1,
  5438. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5439. SND_SOC_DPCM_TRIGGER_POST},
  5440. .codec_dai_name = "snd-soc-dummy-dai",
  5441. .codec_name = "snd-soc-dummy",
  5442. .ignore_suspend = 1,
  5443. .ignore_pmdown_time = 1,
  5444. /* this dainlink has playback support */
  5445. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5446. },
  5447. {/* hw:x,16 */
  5448. .name = MSM_DAILINK_NAME(MultiMedia10),
  5449. .stream_name = "MultiMedia10",
  5450. .cpu_dai_name = "MultiMedia10",
  5451. .platform_name = "msm-pcm-dsp.1",
  5452. .dynamic = 1,
  5453. .dpcm_playback = 1,
  5454. .dpcm_capture = 1,
  5455. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5456. SND_SOC_DPCM_TRIGGER_POST},
  5457. .codec_dai_name = "snd-soc-dummy-dai",
  5458. .codec_name = "snd-soc-dummy",
  5459. .ignore_suspend = 1,
  5460. .ignore_pmdown_time = 1,
  5461. /* this dainlink has playback support */
  5462. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5463. },
  5464. {/* hw:x,17 */
  5465. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5466. .stream_name = "MM_NOIRQ",
  5467. .cpu_dai_name = "MultiMedia8",
  5468. .platform_name = "msm-pcm-dsp-noirq",
  5469. .dynamic = 1,
  5470. .dpcm_playback = 1,
  5471. .dpcm_capture = 1,
  5472. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5473. SND_SOC_DPCM_TRIGGER_POST},
  5474. .codec_dai_name = "snd-soc-dummy-dai",
  5475. .codec_name = "snd-soc-dummy",
  5476. .ignore_suspend = 1,
  5477. .ignore_pmdown_time = 1,
  5478. /* this dainlink has playback support */
  5479. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5480. .ops = &msm_fe_qos_ops,
  5481. },
  5482. /* HDMI Hostless */
  5483. {/* hw:x,18 */
  5484. .name = "HDMI_RX_HOSTLESS",
  5485. .stream_name = "HDMI_RX_HOSTLESS",
  5486. .cpu_dai_name = "HDMI_HOSTLESS",
  5487. .platform_name = "msm-pcm-hostless",
  5488. .dynamic = 1,
  5489. .dpcm_playback = 1,
  5490. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5491. SND_SOC_DPCM_TRIGGER_POST},
  5492. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5493. .ignore_suspend = 1,
  5494. .ignore_pmdown_time = 1,
  5495. .codec_dai_name = "snd-soc-dummy-dai",
  5496. .codec_name = "snd-soc-dummy",
  5497. },
  5498. {/* hw:x,19 */
  5499. .name = "VoiceMMode2",
  5500. .stream_name = "VoiceMMode2",
  5501. .cpu_dai_name = "VoiceMMode2",
  5502. .platform_name = "msm-pcm-voice",
  5503. .dynamic = 1,
  5504. .dpcm_playback = 1,
  5505. .dpcm_capture = 1,
  5506. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5507. SND_SOC_DPCM_TRIGGER_POST},
  5508. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5509. .ignore_suspend = 1,
  5510. .ignore_pmdown_time = 1,
  5511. .codec_dai_name = "snd-soc-dummy-dai",
  5512. .codec_name = "snd-soc-dummy",
  5513. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5514. },
  5515. /* LSM FE */
  5516. {/* hw:x,20 */
  5517. .name = "Listen 2 Audio Service",
  5518. .stream_name = "Listen 2 Audio Service",
  5519. .cpu_dai_name = "LSM2",
  5520. .platform_name = "msm-lsm-client",
  5521. .dynamic = 1,
  5522. .dpcm_capture = 1,
  5523. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5524. SND_SOC_DPCM_TRIGGER_POST },
  5525. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5526. .ignore_suspend = 1,
  5527. .codec_dai_name = "snd-soc-dummy-dai",
  5528. .codec_name = "snd-soc-dummy",
  5529. .id = MSM_FRONTEND_DAI_LSM2,
  5530. },
  5531. {/* hw:x,21 */
  5532. .name = "Listen 3 Audio Service",
  5533. .stream_name = "Listen 3 Audio Service",
  5534. .cpu_dai_name = "LSM3",
  5535. .platform_name = "msm-lsm-client",
  5536. .dynamic = 1,
  5537. .dpcm_capture = 1,
  5538. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5539. SND_SOC_DPCM_TRIGGER_POST },
  5540. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5541. .ignore_suspend = 1,
  5542. .codec_dai_name = "snd-soc-dummy-dai",
  5543. .codec_name = "snd-soc-dummy",
  5544. .id = MSM_FRONTEND_DAI_LSM3,
  5545. },
  5546. {/* hw:x,22 */
  5547. .name = "Listen 4 Audio Service",
  5548. .stream_name = "Listen 4 Audio Service",
  5549. .cpu_dai_name = "LSM4",
  5550. .platform_name = "msm-lsm-client",
  5551. .dynamic = 1,
  5552. .dpcm_capture = 1,
  5553. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5554. SND_SOC_DPCM_TRIGGER_POST },
  5555. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5556. .ignore_suspend = 1,
  5557. .codec_dai_name = "snd-soc-dummy-dai",
  5558. .codec_name = "snd-soc-dummy",
  5559. .id = MSM_FRONTEND_DAI_LSM4,
  5560. },
  5561. {/* hw:x,23 */
  5562. .name = "Listen 5 Audio Service",
  5563. .stream_name = "Listen 5 Audio Service",
  5564. .cpu_dai_name = "LSM5",
  5565. .platform_name = "msm-lsm-client",
  5566. .dynamic = 1,
  5567. .dpcm_capture = 1,
  5568. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5569. SND_SOC_DPCM_TRIGGER_POST },
  5570. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5571. .ignore_suspend = 1,
  5572. .codec_dai_name = "snd-soc-dummy-dai",
  5573. .codec_name = "snd-soc-dummy",
  5574. .id = MSM_FRONTEND_DAI_LSM5,
  5575. },
  5576. {/* hw:x,24 */
  5577. .name = "Listen 6 Audio Service",
  5578. .stream_name = "Listen 6 Audio Service",
  5579. .cpu_dai_name = "LSM6",
  5580. .platform_name = "msm-lsm-client",
  5581. .dynamic = 1,
  5582. .dpcm_capture = 1,
  5583. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5584. SND_SOC_DPCM_TRIGGER_POST },
  5585. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5586. .ignore_suspend = 1,
  5587. .codec_dai_name = "snd-soc-dummy-dai",
  5588. .codec_name = "snd-soc-dummy",
  5589. .id = MSM_FRONTEND_DAI_LSM6,
  5590. },
  5591. {/* hw:x,25 */
  5592. .name = "Listen 7 Audio Service",
  5593. .stream_name = "Listen 7 Audio Service",
  5594. .cpu_dai_name = "LSM7",
  5595. .platform_name = "msm-lsm-client",
  5596. .dynamic = 1,
  5597. .dpcm_capture = 1,
  5598. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5599. SND_SOC_DPCM_TRIGGER_POST },
  5600. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5601. .ignore_suspend = 1,
  5602. .codec_dai_name = "snd-soc-dummy-dai",
  5603. .codec_name = "snd-soc-dummy",
  5604. .id = MSM_FRONTEND_DAI_LSM7,
  5605. },
  5606. {/* hw:x,26 */
  5607. .name = "Listen 8 Audio Service",
  5608. .stream_name = "Listen 8 Audio Service",
  5609. .cpu_dai_name = "LSM8",
  5610. .platform_name = "msm-lsm-client",
  5611. .dynamic = 1,
  5612. .dpcm_capture = 1,
  5613. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5614. SND_SOC_DPCM_TRIGGER_POST },
  5615. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5616. .ignore_suspend = 1,
  5617. .codec_dai_name = "snd-soc-dummy-dai",
  5618. .codec_name = "snd-soc-dummy",
  5619. .id = MSM_FRONTEND_DAI_LSM8,
  5620. },
  5621. {/* hw:x,27 */
  5622. .name = MSM_DAILINK_NAME(Media9),
  5623. .stream_name = "MultiMedia9",
  5624. .cpu_dai_name = "MultiMedia9",
  5625. .platform_name = "msm-pcm-dsp.0",
  5626. .dynamic = 1,
  5627. .dpcm_playback = 1,
  5628. .dpcm_capture = 1,
  5629. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5630. SND_SOC_DPCM_TRIGGER_POST},
  5631. .codec_dai_name = "snd-soc-dummy-dai",
  5632. .codec_name = "snd-soc-dummy",
  5633. .ignore_suspend = 1,
  5634. /* this dainlink has playback support */
  5635. .ignore_pmdown_time = 1,
  5636. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5637. },
  5638. {/* hw:x,28 */
  5639. .name = MSM_DAILINK_NAME(Compress4),
  5640. .stream_name = "Compress4",
  5641. .cpu_dai_name = "MultiMedia11",
  5642. .platform_name = "msm-compress-dsp",
  5643. .dynamic = 1,
  5644. .dpcm_playback = 1,
  5645. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5646. SND_SOC_DPCM_TRIGGER_POST},
  5647. .codec_dai_name = "snd-soc-dummy-dai",
  5648. .codec_name = "snd-soc-dummy",
  5649. .ignore_suspend = 1,
  5650. .ignore_pmdown_time = 1,
  5651. /* this dainlink has playback support */
  5652. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5653. },
  5654. {/* hw:x,29 */
  5655. .name = MSM_DAILINK_NAME(Compress5),
  5656. .stream_name = "Compress5",
  5657. .cpu_dai_name = "MultiMedia12",
  5658. .platform_name = "msm-compress-dsp",
  5659. .dynamic = 1,
  5660. .dpcm_playback = 1,
  5661. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5662. SND_SOC_DPCM_TRIGGER_POST},
  5663. .codec_dai_name = "snd-soc-dummy-dai",
  5664. .codec_name = "snd-soc-dummy",
  5665. .ignore_suspend = 1,
  5666. .ignore_pmdown_time = 1,
  5667. /* this dainlink has playback support */
  5668. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5669. },
  5670. {/* hw:x,30 */
  5671. .name = MSM_DAILINK_NAME(Compress6),
  5672. .stream_name = "Compress6",
  5673. .cpu_dai_name = "MultiMedia13",
  5674. .platform_name = "msm-compress-dsp",
  5675. .dynamic = 1,
  5676. .dpcm_playback = 1,
  5677. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5678. SND_SOC_DPCM_TRIGGER_POST},
  5679. .codec_dai_name = "snd-soc-dummy-dai",
  5680. .codec_name = "snd-soc-dummy",
  5681. .ignore_suspend = 1,
  5682. .ignore_pmdown_time = 1,
  5683. /* this dainlink has playback support */
  5684. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5685. },
  5686. {/* hw:x,31 */
  5687. .name = MSM_DAILINK_NAME(Compress7),
  5688. .stream_name = "Compress7",
  5689. .cpu_dai_name = "MultiMedia14",
  5690. .platform_name = "msm-compress-dsp",
  5691. .dynamic = 1,
  5692. .dpcm_playback = 1,
  5693. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5694. SND_SOC_DPCM_TRIGGER_POST},
  5695. .codec_dai_name = "snd-soc-dummy-dai",
  5696. .codec_name = "snd-soc-dummy",
  5697. .ignore_suspend = 1,
  5698. .ignore_pmdown_time = 1,
  5699. /* this dainlink has playback support */
  5700. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5701. },
  5702. {/* hw:x,32 */
  5703. .name = MSM_DAILINK_NAME(Compress8),
  5704. .stream_name = "Compress8",
  5705. .cpu_dai_name = "MultiMedia15",
  5706. .platform_name = "msm-compress-dsp",
  5707. .dynamic = 1,
  5708. .dpcm_playback = 1,
  5709. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5710. SND_SOC_DPCM_TRIGGER_POST},
  5711. .codec_dai_name = "snd-soc-dummy-dai",
  5712. .codec_name = "snd-soc-dummy",
  5713. .ignore_suspend = 1,
  5714. .ignore_pmdown_time = 1,
  5715. /* this dainlink has playback support */
  5716. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5717. },
  5718. {/* hw:x,33 */
  5719. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5720. .stream_name = "MM_NOIRQ_2",
  5721. .cpu_dai_name = "MultiMedia16",
  5722. .platform_name = "msm-pcm-dsp-noirq",
  5723. .dynamic = 1,
  5724. .dpcm_playback = 1,
  5725. .dpcm_capture = 1,
  5726. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5727. SND_SOC_DPCM_TRIGGER_POST},
  5728. .codec_dai_name = "snd-soc-dummy-dai",
  5729. .codec_name = "snd-soc-dummy",
  5730. .ignore_suspend = 1,
  5731. .ignore_pmdown_time = 1,
  5732. /* this dainlink has playback support */
  5733. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5734. },
  5735. {/* hw:x,34 */
  5736. .name = "SLIMBUS_8 Hostless",
  5737. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5738. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5739. .platform_name = "msm-pcm-hostless",
  5740. .dynamic = 1,
  5741. .dpcm_capture = 1,
  5742. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5743. SND_SOC_DPCM_TRIGGER_POST},
  5744. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5745. .ignore_suspend = 1,
  5746. .codec_dai_name = "snd-soc-dummy-dai",
  5747. .codec_name = "snd-soc-dummy",
  5748. },
  5749. {/* hw:x,35 */
  5750. .name = "CDC_DMA Hostless",
  5751. .stream_name = "CDC_DMA Hostless",
  5752. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5753. .platform_name = "msm-pcm-hostless",
  5754. .dynamic = 1,
  5755. .dpcm_playback = 1,
  5756. .dpcm_capture = 1,
  5757. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5758. SND_SOC_DPCM_TRIGGER_POST},
  5759. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5760. .ignore_suspend = 1,
  5761. /* this dailink has playback support */
  5762. .ignore_pmdown_time = 1,
  5763. .codec_dai_name = "snd-soc-dummy-dai",
  5764. .codec_name = "snd-soc-dummy",
  5765. },
  5766. {/* hw:x,36 */
  5767. .name = "TX3_CDC_DMA Hostless",
  5768. .stream_name = "TX3_CDC_DMA Hostless",
  5769. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5770. .platform_name = "msm-pcm-hostless",
  5771. .dynamic = 1,
  5772. .dpcm_capture = 1,
  5773. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5774. SND_SOC_DPCM_TRIGGER_POST},
  5775. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5776. .ignore_suspend = 1,
  5777. .codec_dai_name = "snd-soc-dummy-dai",
  5778. .codec_name = "snd-soc-dummy",
  5779. },
  5780. };
  5781. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5782. {/* hw:x,37 */
  5783. .name = LPASS_BE_SLIMBUS_4_TX,
  5784. .stream_name = "Slimbus4 Capture",
  5785. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5786. .platform_name = "msm-pcm-hostless",
  5787. .codec_name = "tavil_codec",
  5788. .codec_dai_name = "tavil_vifeedback",
  5789. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5790. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5791. .ops = &msm_be_ops,
  5792. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5793. .ignore_suspend = 1,
  5794. },
  5795. /* Ultrasound RX DAI Link */
  5796. {/* hw:x,38 */
  5797. .name = "SLIMBUS_2 Hostless Playback",
  5798. .stream_name = "SLIMBUS_2 Hostless Playback",
  5799. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5800. .platform_name = "msm-pcm-hostless",
  5801. .codec_name = "tavil_codec",
  5802. .codec_dai_name = "tavil_rx2",
  5803. .ignore_suspend = 1,
  5804. .ignore_pmdown_time = 1,
  5805. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5806. .ops = &msm_slimbus_2_be_ops,
  5807. },
  5808. /* Ultrasound TX DAI Link */
  5809. {/* hw:x,39 */
  5810. .name = "SLIMBUS_2 Hostless Capture",
  5811. .stream_name = "SLIMBUS_2 Hostless Capture",
  5812. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5813. .platform_name = "msm-pcm-hostless",
  5814. .codec_name = "tavil_codec",
  5815. .codec_dai_name = "tavil_tx2",
  5816. .ignore_suspend = 1,
  5817. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5818. .ops = &msm_slimbus_2_be_ops,
  5819. },
  5820. };
  5821. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5822. {/* hw:x,37 */
  5823. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5824. .stream_name = "WSA CDC DMA0 Capture",
  5825. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5826. .platform_name = "msm-pcm-hostless",
  5827. .codec_name = "bolero_codec",
  5828. .codec_dai_name = "wsa_macro_vifeedback",
  5829. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5830. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5831. .ignore_suspend = 1,
  5832. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5833. .ops = &msm_cdc_dma_be_ops,
  5834. },
  5835. };
  5836. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5837. {
  5838. .name = MSM_DAILINK_NAME(ASM Loopback),
  5839. .stream_name = "MultiMedia6",
  5840. .cpu_dai_name = "MultiMedia6",
  5841. .platform_name = "msm-pcm-loopback",
  5842. .dynamic = 1,
  5843. .dpcm_playback = 1,
  5844. .dpcm_capture = 1,
  5845. .codec_dai_name = "snd-soc-dummy-dai",
  5846. .codec_name = "snd-soc-dummy",
  5847. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5848. SND_SOC_DPCM_TRIGGER_POST},
  5849. .ignore_suspend = 1,
  5850. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5851. .ignore_pmdown_time = 1,
  5852. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5853. },
  5854. {
  5855. .name = "USB Audio Hostless",
  5856. .stream_name = "USB Audio Hostless",
  5857. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5858. .platform_name = "msm-pcm-hostless",
  5859. .dynamic = 1,
  5860. .dpcm_playback = 1,
  5861. .dpcm_capture = 1,
  5862. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5863. SND_SOC_DPCM_TRIGGER_POST},
  5864. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5865. .ignore_suspend = 1,
  5866. .ignore_pmdown_time = 1,
  5867. .codec_dai_name = "snd-soc-dummy-dai",
  5868. .codec_name = "snd-soc-dummy",
  5869. },
  5870. };
  5871. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5872. /* Backend AFE DAI Links */
  5873. {
  5874. .name = LPASS_BE_AFE_PCM_RX,
  5875. .stream_name = "AFE Playback",
  5876. .cpu_dai_name = "msm-dai-q6-dev.224",
  5877. .platform_name = "msm-pcm-routing",
  5878. .codec_name = "msm-stub-codec.1",
  5879. .codec_dai_name = "msm-stub-rx",
  5880. .no_pcm = 1,
  5881. .dpcm_playback = 1,
  5882. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5883. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5884. /* this dainlink has playback support */
  5885. .ignore_pmdown_time = 1,
  5886. .ignore_suspend = 1,
  5887. },
  5888. {
  5889. .name = LPASS_BE_AFE_PCM_TX,
  5890. .stream_name = "AFE Capture",
  5891. .cpu_dai_name = "msm-dai-q6-dev.225",
  5892. .platform_name = "msm-pcm-routing",
  5893. .codec_name = "msm-stub-codec.1",
  5894. .codec_dai_name = "msm-stub-tx",
  5895. .no_pcm = 1,
  5896. .dpcm_capture = 1,
  5897. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5898. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5899. .ignore_suspend = 1,
  5900. },
  5901. /* Incall Record Uplink BACK END DAI Link */
  5902. {
  5903. .name = LPASS_BE_INCALL_RECORD_TX,
  5904. .stream_name = "Voice Uplink Capture",
  5905. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5906. .platform_name = "msm-pcm-routing",
  5907. .codec_name = "msm-stub-codec.1",
  5908. .codec_dai_name = "msm-stub-tx",
  5909. .no_pcm = 1,
  5910. .dpcm_capture = 1,
  5911. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5912. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5913. .ignore_suspend = 1,
  5914. },
  5915. /* Incall Record Downlink BACK END DAI Link */
  5916. {
  5917. .name = LPASS_BE_INCALL_RECORD_RX,
  5918. .stream_name = "Voice Downlink Capture",
  5919. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5920. .platform_name = "msm-pcm-routing",
  5921. .codec_name = "msm-stub-codec.1",
  5922. .codec_dai_name = "msm-stub-tx",
  5923. .no_pcm = 1,
  5924. .dpcm_capture = 1,
  5925. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5926. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5927. .ignore_suspend = 1,
  5928. },
  5929. /* Incall Music BACK END DAI Link */
  5930. {
  5931. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5932. .stream_name = "Voice Farend Playback",
  5933. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5934. .platform_name = "msm-pcm-routing",
  5935. .codec_name = "msm-stub-codec.1",
  5936. .codec_dai_name = "msm-stub-rx",
  5937. .no_pcm = 1,
  5938. .dpcm_playback = 1,
  5939. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5940. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5941. .ignore_suspend = 1,
  5942. .ignore_pmdown_time = 1,
  5943. },
  5944. /* Incall Music 2 BACK END DAI Link */
  5945. {
  5946. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5947. .stream_name = "Voice2 Farend Playback",
  5948. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5949. .platform_name = "msm-pcm-routing",
  5950. .codec_name = "msm-stub-codec.1",
  5951. .codec_dai_name = "msm-stub-rx",
  5952. .no_pcm = 1,
  5953. .dpcm_playback = 1,
  5954. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5955. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5956. .ignore_suspend = 1,
  5957. .ignore_pmdown_time = 1,
  5958. },
  5959. {
  5960. .name = LPASS_BE_USB_AUDIO_RX,
  5961. .stream_name = "USB Audio Playback",
  5962. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5963. .platform_name = "msm-pcm-routing",
  5964. .codec_name = "msm-stub-codec.1",
  5965. .codec_dai_name = "msm-stub-rx",
  5966. .no_pcm = 1,
  5967. .dpcm_playback = 1,
  5968. .id = MSM_BACKEND_DAI_USB_RX,
  5969. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5970. .ignore_pmdown_time = 1,
  5971. .ignore_suspend = 1,
  5972. },
  5973. {
  5974. .name = LPASS_BE_USB_AUDIO_TX,
  5975. .stream_name = "USB Audio Capture",
  5976. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5977. .platform_name = "msm-pcm-routing",
  5978. .codec_name = "msm-stub-codec.1",
  5979. .codec_dai_name = "msm-stub-tx",
  5980. .no_pcm = 1,
  5981. .dpcm_capture = 1,
  5982. .id = MSM_BACKEND_DAI_USB_TX,
  5983. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5984. .ignore_suspend = 1,
  5985. },
  5986. {
  5987. .name = LPASS_BE_PRI_TDM_RX_0,
  5988. .stream_name = "Primary TDM0 Playback",
  5989. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  5990. .platform_name = "msm-pcm-routing",
  5991. .codec_name = "msm-stub-codec.1",
  5992. .codec_dai_name = "msm-stub-rx",
  5993. .no_pcm = 1,
  5994. .dpcm_playback = 1,
  5995. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  5996. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5997. .ops = &sm6150_tdm_be_ops,
  5998. .ignore_suspend = 1,
  5999. .ignore_pmdown_time = 1,
  6000. },
  6001. {
  6002. .name = LPASS_BE_PRI_TDM_TX_0,
  6003. .stream_name = "Primary TDM0 Capture",
  6004. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6005. .platform_name = "msm-pcm-routing",
  6006. .codec_name = "msm-stub-codec.1",
  6007. .codec_dai_name = "msm-stub-tx",
  6008. .no_pcm = 1,
  6009. .dpcm_capture = 1,
  6010. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6012. .ops = &sm6150_tdm_be_ops,
  6013. .ignore_suspend = 1,
  6014. },
  6015. {
  6016. .name = LPASS_BE_SEC_TDM_RX_0,
  6017. .stream_name = "Secondary TDM0 Playback",
  6018. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6019. .platform_name = "msm-pcm-routing",
  6020. .codec_name = "msm-stub-codec.1",
  6021. .codec_dai_name = "msm-stub-rx",
  6022. .no_pcm = 1,
  6023. .dpcm_playback = 1,
  6024. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6025. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6026. .ops = &sm6150_tdm_be_ops,
  6027. .ignore_suspend = 1,
  6028. .ignore_pmdown_time = 1,
  6029. },
  6030. {
  6031. .name = LPASS_BE_SEC_TDM_TX_0,
  6032. .stream_name = "Secondary TDM0 Capture",
  6033. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6034. .platform_name = "msm-pcm-routing",
  6035. .codec_name = "msm-stub-codec.1",
  6036. .codec_dai_name = "msm-stub-tx",
  6037. .no_pcm = 1,
  6038. .dpcm_capture = 1,
  6039. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6040. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6041. .ops = &sm6150_tdm_be_ops,
  6042. .ignore_suspend = 1,
  6043. },
  6044. {
  6045. .name = LPASS_BE_TERT_TDM_RX_0,
  6046. .stream_name = "Tertiary TDM0 Playback",
  6047. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6048. .platform_name = "msm-pcm-routing",
  6049. .codec_name = "msm-stub-codec.1",
  6050. .codec_dai_name = "msm-stub-rx",
  6051. .no_pcm = 1,
  6052. .dpcm_playback = 1,
  6053. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6054. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6055. .ops = &sm6150_tdm_be_ops,
  6056. .ignore_suspend = 1,
  6057. .ignore_pmdown_time = 1,
  6058. },
  6059. {
  6060. .name = LPASS_BE_TERT_TDM_TX_0,
  6061. .stream_name = "Tertiary TDM0 Capture",
  6062. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6063. .platform_name = "msm-pcm-routing",
  6064. .codec_name = "msm-stub-codec.1",
  6065. .codec_dai_name = "msm-stub-tx",
  6066. .no_pcm = 1,
  6067. .dpcm_capture = 1,
  6068. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6069. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6070. .ops = &sm6150_tdm_be_ops,
  6071. .ignore_suspend = 1,
  6072. },
  6073. {
  6074. .name = LPASS_BE_QUAT_TDM_RX_0,
  6075. .stream_name = "Quaternary TDM0 Playback",
  6076. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6077. .platform_name = "msm-pcm-routing",
  6078. .codec_name = "msm-stub-codec.1",
  6079. .codec_dai_name = "msm-stub-rx",
  6080. .no_pcm = 1,
  6081. .dpcm_playback = 1,
  6082. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6083. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6084. .ops = &sm6150_tdm_be_ops,
  6085. .ignore_suspend = 1,
  6086. .ignore_pmdown_time = 1,
  6087. },
  6088. {
  6089. .name = LPASS_BE_QUAT_TDM_TX_0,
  6090. .stream_name = "Quaternary TDM0 Capture",
  6091. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6092. .platform_name = "msm-pcm-routing",
  6093. .codec_name = "msm-stub-codec.1",
  6094. .codec_dai_name = "msm-stub-tx",
  6095. .no_pcm = 1,
  6096. .dpcm_capture = 1,
  6097. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6098. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6099. .ops = &sm6150_tdm_be_ops,
  6100. .ignore_suspend = 1,
  6101. },
  6102. };
  6103. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6104. {
  6105. .name = LPASS_BE_SLIMBUS_0_RX,
  6106. .stream_name = "Slimbus Playback",
  6107. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6108. .platform_name = "msm-pcm-routing",
  6109. .codec_name = "tavil_codec",
  6110. .codec_dai_name = "tavil_rx1",
  6111. .no_pcm = 1,
  6112. .dpcm_playback = 1,
  6113. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6114. .init = &msm_audrx_tavil_init,
  6115. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6116. /* this dainlink has playback support */
  6117. .ignore_pmdown_time = 1,
  6118. .ignore_suspend = 1,
  6119. .ops = &msm_be_ops,
  6120. },
  6121. {
  6122. .name = LPASS_BE_SLIMBUS_0_TX,
  6123. .stream_name = "Slimbus Capture",
  6124. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6125. .platform_name = "msm-pcm-routing",
  6126. .codec_name = "tavil_codec",
  6127. .codec_dai_name = "tavil_tx1",
  6128. .no_pcm = 1,
  6129. .dpcm_capture = 1,
  6130. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6131. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6132. .ignore_suspend = 1,
  6133. .ops = &msm_be_ops,
  6134. },
  6135. {
  6136. .name = LPASS_BE_SLIMBUS_1_RX,
  6137. .stream_name = "Slimbus1 Playback",
  6138. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6139. .platform_name = "msm-pcm-routing",
  6140. .codec_name = "tavil_codec",
  6141. .codec_dai_name = "tavil_rx1",
  6142. .no_pcm = 1,
  6143. .dpcm_playback = 1,
  6144. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6145. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6146. .ops = &msm_be_ops,
  6147. /* dai link has playback support */
  6148. .ignore_pmdown_time = 1,
  6149. .ignore_suspend = 1,
  6150. },
  6151. {
  6152. .name = LPASS_BE_SLIMBUS_1_TX,
  6153. .stream_name = "Slimbus1 Capture",
  6154. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6155. .platform_name = "msm-pcm-routing",
  6156. .codec_name = "tavil_codec",
  6157. .codec_dai_name = "tavil_tx3",
  6158. .no_pcm = 1,
  6159. .dpcm_capture = 1,
  6160. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6161. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6162. .ops = &msm_be_ops,
  6163. .ignore_suspend = 1,
  6164. },
  6165. {
  6166. .name = LPASS_BE_SLIMBUS_2_RX,
  6167. .stream_name = "Slimbus2 Playback",
  6168. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6169. .platform_name = "msm-pcm-routing",
  6170. .codec_name = "tavil_codec",
  6171. .codec_dai_name = "tavil_rx2",
  6172. .no_pcm = 1,
  6173. .dpcm_playback = 1,
  6174. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6175. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6176. .ops = &msm_be_ops,
  6177. .ignore_pmdown_time = 1,
  6178. .ignore_suspend = 1,
  6179. },
  6180. {
  6181. .name = LPASS_BE_SLIMBUS_3_RX,
  6182. .stream_name = "Slimbus3 Playback",
  6183. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6184. .platform_name = "msm-pcm-routing",
  6185. .codec_name = "tavil_codec",
  6186. .codec_dai_name = "tavil_rx1",
  6187. .no_pcm = 1,
  6188. .dpcm_playback = 1,
  6189. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6190. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6191. .ops = &msm_be_ops,
  6192. /* dai link has playback support */
  6193. .ignore_pmdown_time = 1,
  6194. .ignore_suspend = 1,
  6195. },
  6196. {
  6197. .name = LPASS_BE_SLIMBUS_3_TX,
  6198. .stream_name = "Slimbus3 Capture",
  6199. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6200. .platform_name = "msm-pcm-routing",
  6201. .codec_name = "tavil_codec",
  6202. .codec_dai_name = "tavil_tx1",
  6203. .no_pcm = 1,
  6204. .dpcm_capture = 1,
  6205. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6206. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6207. .ops = &msm_be_ops,
  6208. .ignore_suspend = 1,
  6209. },
  6210. {
  6211. .name = LPASS_BE_SLIMBUS_4_RX,
  6212. .stream_name = "Slimbus4 Playback",
  6213. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6214. .platform_name = "msm-pcm-routing",
  6215. .codec_name = "tavil_codec",
  6216. .codec_dai_name = "tavil_rx1",
  6217. .no_pcm = 1,
  6218. .dpcm_playback = 1,
  6219. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6220. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6221. .ops = &msm_be_ops,
  6222. /* dai link has playback support */
  6223. .ignore_pmdown_time = 1,
  6224. .ignore_suspend = 1,
  6225. },
  6226. {
  6227. .name = LPASS_BE_SLIMBUS_5_RX,
  6228. .stream_name = "Slimbus5 Playback",
  6229. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6230. .platform_name = "msm-pcm-routing",
  6231. .codec_name = "tavil_codec",
  6232. .codec_dai_name = "tavil_rx3",
  6233. .no_pcm = 1,
  6234. .dpcm_playback = 1,
  6235. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6236. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6237. .ops = &msm_be_ops,
  6238. /* dai link has playback support */
  6239. .ignore_pmdown_time = 1,
  6240. .ignore_suspend = 1,
  6241. },
  6242. /* MAD BE */
  6243. {
  6244. .name = LPASS_BE_SLIMBUS_5_TX,
  6245. .stream_name = "Slimbus5 Capture",
  6246. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6247. .platform_name = "msm-pcm-routing",
  6248. .codec_name = "tavil_codec",
  6249. .codec_dai_name = "tavil_mad1",
  6250. .no_pcm = 1,
  6251. .dpcm_capture = 1,
  6252. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6253. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6254. .ops = &msm_be_ops,
  6255. .ignore_suspend = 1,
  6256. },
  6257. {
  6258. .name = LPASS_BE_SLIMBUS_6_RX,
  6259. .stream_name = "Slimbus6 Playback",
  6260. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6261. .platform_name = "msm-pcm-routing",
  6262. .codec_name = "tavil_codec",
  6263. .codec_dai_name = "tavil_rx4",
  6264. .no_pcm = 1,
  6265. .dpcm_playback = 1,
  6266. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6267. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6268. .ops = &msm_be_ops,
  6269. /* dai link has playback support */
  6270. .ignore_pmdown_time = 1,
  6271. .ignore_suspend = 1,
  6272. },
  6273. /* Slimbus VI Recording */
  6274. {
  6275. .name = LPASS_BE_SLIMBUS_TX_VI,
  6276. .stream_name = "Slimbus4 Capture",
  6277. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6278. .platform_name = "msm-pcm-routing",
  6279. .codec_name = "tavil_codec",
  6280. .codec_dai_name = "tavil_vifeedback",
  6281. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6282. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6283. .ops = &msm_be_ops,
  6284. .ignore_suspend = 1,
  6285. .no_pcm = 1,
  6286. .dpcm_capture = 1,
  6287. },
  6288. };
  6289. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6290. {
  6291. .name = LPASS_BE_SLIMBUS_7_RX,
  6292. .stream_name = "Slimbus7 Playback",
  6293. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6294. .platform_name = "msm-pcm-routing",
  6295. .codec_name = "btfmslim_slave",
  6296. /* BT codec driver determines capabilities based on
  6297. * dai name, bt codecdai name should always contains
  6298. * supported usecase information
  6299. */
  6300. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6301. .no_pcm = 1,
  6302. .dpcm_playback = 1,
  6303. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6304. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6305. .ops = &msm_wcn_ops,
  6306. /* dai link has playback support */
  6307. .ignore_pmdown_time = 1,
  6308. .ignore_suspend = 1,
  6309. },
  6310. {
  6311. .name = LPASS_BE_SLIMBUS_7_TX,
  6312. .stream_name = "Slimbus7 Capture",
  6313. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6314. .platform_name = "msm-pcm-routing",
  6315. .codec_name = "btfmslim_slave",
  6316. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6317. .no_pcm = 1,
  6318. .dpcm_capture = 1,
  6319. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6320. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6321. .ops = &msm_wcn_ops,
  6322. .ignore_suspend = 1,
  6323. },
  6324. {
  6325. .name = LPASS_BE_SLIMBUS_8_TX,
  6326. .stream_name = "Slimbus8 Capture",
  6327. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6328. .platform_name = "msm-pcm-routing",
  6329. .codec_name = "btfmslim_slave",
  6330. .codec_dai_name = "btfm_fm_slim_tx",
  6331. .no_pcm = 1,
  6332. .dpcm_capture = 1,
  6333. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6334. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6335. .init = &msm_wcn_init,
  6336. .ops = &msm_wcn_ops,
  6337. .ignore_suspend = 1,
  6338. },
  6339. };
  6340. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6341. /* DISP PORT BACK END DAI Link */
  6342. {
  6343. .name = LPASS_BE_DISPLAY_PORT,
  6344. .stream_name = "Display Port Playback",
  6345. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6346. .platform_name = "msm-pcm-routing",
  6347. .codec_name = "msm-ext-disp-audio-codec-rx",
  6348. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6349. .no_pcm = 1,
  6350. .dpcm_playback = 1,
  6351. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6352. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6353. .ignore_pmdown_time = 1,
  6354. .ignore_suspend = 1,
  6355. },
  6356. };
  6357. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6358. {
  6359. .name = LPASS_BE_PRI_MI2S_RX,
  6360. .stream_name = "Primary MI2S Playback",
  6361. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6362. .platform_name = "msm-pcm-routing",
  6363. .codec_name = "msm-stub-codec.1",
  6364. .codec_dai_name = "msm-stub-rx",
  6365. .no_pcm = 1,
  6366. .dpcm_playback = 1,
  6367. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6368. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6369. .ops = &msm_mi2s_be_ops,
  6370. .ignore_suspend = 1,
  6371. .ignore_pmdown_time = 1,
  6372. },
  6373. {
  6374. .name = LPASS_BE_PRI_MI2S_TX,
  6375. .stream_name = "Primary MI2S Capture",
  6376. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6377. .platform_name = "msm-pcm-routing",
  6378. .codec_name = "msm-stub-codec.1",
  6379. .codec_dai_name = "msm-stub-tx",
  6380. .no_pcm = 1,
  6381. .dpcm_capture = 1,
  6382. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6383. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6384. .ops = &msm_mi2s_be_ops,
  6385. .ignore_suspend = 1,
  6386. },
  6387. {
  6388. .name = LPASS_BE_SEC_MI2S_RX,
  6389. .stream_name = "Secondary MI2S Playback",
  6390. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6391. .platform_name = "msm-pcm-routing",
  6392. .codec_name = "msm-stub-codec.1",
  6393. .codec_dai_name = "msm-stub-rx",
  6394. .no_pcm = 1,
  6395. .dpcm_playback = 1,
  6396. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6397. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6398. .ops = &msm_mi2s_be_ops,
  6399. .ignore_suspend = 1,
  6400. .ignore_pmdown_time = 1,
  6401. },
  6402. {
  6403. .name = LPASS_BE_SEC_MI2S_TX,
  6404. .stream_name = "Secondary MI2S Capture",
  6405. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6406. .platform_name = "msm-pcm-routing",
  6407. .codec_name = "msm-stub-codec.1",
  6408. .codec_dai_name = "msm-stub-tx",
  6409. .no_pcm = 1,
  6410. .dpcm_capture = 1,
  6411. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6412. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6413. .ops = &msm_mi2s_be_ops,
  6414. .ignore_suspend = 1,
  6415. },
  6416. {
  6417. .name = LPASS_BE_TERT_MI2S_RX,
  6418. .stream_name = "Tertiary MI2S Playback",
  6419. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6420. .platform_name = "msm-pcm-routing",
  6421. .codec_name = "msm-stub-codec.1",
  6422. .codec_dai_name = "msm-stub-rx",
  6423. .no_pcm = 1,
  6424. .dpcm_playback = 1,
  6425. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6426. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6427. .ops = &msm_mi2s_be_ops,
  6428. .ignore_suspend = 1,
  6429. .ignore_pmdown_time = 1,
  6430. },
  6431. {
  6432. .name = LPASS_BE_TERT_MI2S_TX,
  6433. .stream_name = "Tertiary MI2S Capture",
  6434. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6435. .platform_name = "msm-pcm-routing",
  6436. .codec_name = "msm-stub-codec.1",
  6437. .codec_dai_name = "msm-stub-tx",
  6438. .no_pcm = 1,
  6439. .dpcm_capture = 1,
  6440. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6441. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6442. .ops = &msm_mi2s_be_ops,
  6443. .ignore_suspend = 1,
  6444. },
  6445. {
  6446. .name = LPASS_BE_QUAT_MI2S_RX,
  6447. .stream_name = "Quaternary MI2S Playback",
  6448. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6449. .platform_name = "msm-pcm-routing",
  6450. .codec_name = "msm-stub-codec.1",
  6451. .codec_dai_name = "msm-stub-rx",
  6452. .no_pcm = 1,
  6453. .dpcm_playback = 1,
  6454. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6455. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6456. .ops = &msm_mi2s_be_ops,
  6457. .ignore_suspend = 1,
  6458. .ignore_pmdown_time = 1,
  6459. },
  6460. {
  6461. .name = LPASS_BE_QUAT_MI2S_TX,
  6462. .stream_name = "Quaternary MI2S Capture",
  6463. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6464. .platform_name = "msm-pcm-routing",
  6465. .codec_name = "msm-stub-codec.1",
  6466. .codec_dai_name = "msm-stub-tx",
  6467. .no_pcm = 1,
  6468. .dpcm_capture = 1,
  6469. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6470. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6471. .ops = &msm_mi2s_be_ops,
  6472. .ignore_suspend = 1,
  6473. },
  6474. {
  6475. .name = LPASS_BE_QUIN_MI2S_RX,
  6476. .stream_name = "Quinary MI2S Playback",
  6477. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6478. .platform_name = "msm-pcm-routing",
  6479. .codec_name = "msm-stub-codec.1",
  6480. .codec_dai_name = "msm-stub-rx",
  6481. .no_pcm = 1,
  6482. .dpcm_playback = 1,
  6483. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6484. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6485. .ops = &msm_mi2s_be_ops,
  6486. .ignore_suspend = 1,
  6487. .ignore_pmdown_time = 1,
  6488. },
  6489. {
  6490. .name = LPASS_BE_QUIN_MI2S_TX,
  6491. .stream_name = "Quinary MI2S Capture",
  6492. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6493. .platform_name = "msm-pcm-routing",
  6494. .codec_name = "msm-stub-codec.1",
  6495. .codec_dai_name = "msm-stub-tx",
  6496. .no_pcm = 1,
  6497. .dpcm_capture = 1,
  6498. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6499. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6500. .ops = &msm_mi2s_be_ops,
  6501. .ignore_suspend = 1,
  6502. },
  6503. };
  6504. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6505. /* Primary AUX PCM Backend DAI Links */
  6506. {
  6507. .name = LPASS_BE_AUXPCM_RX,
  6508. .stream_name = "AUX PCM Playback",
  6509. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6510. .platform_name = "msm-pcm-routing",
  6511. .codec_name = "msm-stub-codec.1",
  6512. .codec_dai_name = "msm-stub-rx",
  6513. .no_pcm = 1,
  6514. .dpcm_playback = 1,
  6515. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6516. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6517. .ignore_pmdown_time = 1,
  6518. .ignore_suspend = 1,
  6519. },
  6520. {
  6521. .name = LPASS_BE_AUXPCM_TX,
  6522. .stream_name = "AUX PCM Capture",
  6523. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6524. .platform_name = "msm-pcm-routing",
  6525. .codec_name = "msm-stub-codec.1",
  6526. .codec_dai_name = "msm-stub-tx",
  6527. .no_pcm = 1,
  6528. .dpcm_capture = 1,
  6529. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6530. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6531. .ignore_suspend = 1,
  6532. },
  6533. /* Secondary AUX PCM Backend DAI Links */
  6534. {
  6535. .name = LPASS_BE_SEC_AUXPCM_RX,
  6536. .stream_name = "Sec AUX PCM Playback",
  6537. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6538. .platform_name = "msm-pcm-routing",
  6539. .codec_name = "msm-stub-codec.1",
  6540. .codec_dai_name = "msm-stub-rx",
  6541. .no_pcm = 1,
  6542. .dpcm_playback = 1,
  6543. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6544. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6545. .ignore_pmdown_time = 1,
  6546. .ignore_suspend = 1,
  6547. },
  6548. {
  6549. .name = LPASS_BE_SEC_AUXPCM_TX,
  6550. .stream_name = "Sec AUX PCM Capture",
  6551. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6552. .platform_name = "msm-pcm-routing",
  6553. .codec_name = "msm-stub-codec.1",
  6554. .codec_dai_name = "msm-stub-tx",
  6555. .no_pcm = 1,
  6556. .dpcm_capture = 1,
  6557. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6558. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6559. .ignore_suspend = 1,
  6560. },
  6561. /* Tertiary AUX PCM Backend DAI Links */
  6562. {
  6563. .name = LPASS_BE_TERT_AUXPCM_RX,
  6564. .stream_name = "Tert AUX PCM Playback",
  6565. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6566. .platform_name = "msm-pcm-routing",
  6567. .codec_name = "msm-stub-codec.1",
  6568. .codec_dai_name = "msm-stub-rx",
  6569. .no_pcm = 1,
  6570. .dpcm_playback = 1,
  6571. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6572. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6573. .ignore_suspend = 1,
  6574. },
  6575. {
  6576. .name = LPASS_BE_TERT_AUXPCM_TX,
  6577. .stream_name = "Tert AUX PCM Capture",
  6578. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6579. .platform_name = "msm-pcm-routing",
  6580. .codec_name = "msm-stub-codec.1",
  6581. .codec_dai_name = "msm-stub-tx",
  6582. .no_pcm = 1,
  6583. .dpcm_capture = 1,
  6584. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6585. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6586. .ignore_suspend = 1,
  6587. },
  6588. /* Quaternary AUX PCM Backend DAI Links */
  6589. {
  6590. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6591. .stream_name = "Quat AUX PCM Playback",
  6592. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6593. .platform_name = "msm-pcm-routing",
  6594. .codec_name = "msm-stub-codec.1",
  6595. .codec_dai_name = "msm-stub-rx",
  6596. .no_pcm = 1,
  6597. .dpcm_playback = 1,
  6598. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6599. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6600. .ignore_pmdown_time = 1,
  6601. .ignore_suspend = 1,
  6602. },
  6603. {
  6604. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6605. .stream_name = "Quat AUX PCM Capture",
  6606. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6607. .platform_name = "msm-pcm-routing",
  6608. .codec_name = "msm-stub-codec.1",
  6609. .codec_dai_name = "msm-stub-tx",
  6610. .no_pcm = 1,
  6611. .dpcm_capture = 1,
  6612. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6613. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6614. .ignore_suspend = 1,
  6615. },
  6616. /* Quinary AUX PCM Backend DAI Links */
  6617. {
  6618. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6619. .stream_name = "Quin AUX PCM Playback",
  6620. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6621. .platform_name = "msm-pcm-routing",
  6622. .codec_name = "msm-stub-codec.1",
  6623. .codec_dai_name = "msm-stub-rx",
  6624. .no_pcm = 1,
  6625. .dpcm_playback = 1,
  6626. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6627. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6628. .ignore_pmdown_time = 1,
  6629. .ignore_suspend = 1,
  6630. },
  6631. {
  6632. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6633. .stream_name = "Quin AUX PCM Capture",
  6634. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6635. .platform_name = "msm-pcm-routing",
  6636. .codec_name = "msm-stub-codec.1",
  6637. .codec_dai_name = "msm-stub-tx",
  6638. .no_pcm = 1,
  6639. .dpcm_capture = 1,
  6640. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6641. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6642. .ignore_suspend = 1,
  6643. },
  6644. };
  6645. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6646. /* WSA CDC DMA Backend DAI Links */
  6647. {
  6648. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6649. .stream_name = "WSA CDC DMA0 Playback",
  6650. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6651. .platform_name = "msm-pcm-routing",
  6652. .codec_name = "bolero_codec",
  6653. .codec_dai_name = "wsa_macro_rx1",
  6654. .no_pcm = 1,
  6655. .dpcm_playback = 1,
  6656. .init = &msm_int_audrx_init,
  6657. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6658. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6659. .ignore_pmdown_time = 1,
  6660. .ignore_suspend = 1,
  6661. .ops = &msm_cdc_dma_be_ops,
  6662. },
  6663. {
  6664. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6665. .stream_name = "WSA CDC DMA1 Playback",
  6666. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6667. .platform_name = "msm-pcm-routing",
  6668. .codec_name = "bolero_codec",
  6669. .codec_dai_name = "wsa_macro_rx_mix",
  6670. .no_pcm = 1,
  6671. .dpcm_playback = 1,
  6672. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6673. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6674. .ignore_pmdown_time = 1,
  6675. .ignore_suspend = 1,
  6676. .ops = &msm_cdc_dma_be_ops,
  6677. },
  6678. {
  6679. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6680. .stream_name = "WSA CDC DMA1 Capture",
  6681. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6682. .platform_name = "msm-pcm-routing",
  6683. .codec_name = "bolero_codec",
  6684. .codec_dai_name = "wsa_macro_echo",
  6685. .no_pcm = 1,
  6686. .dpcm_capture = 1,
  6687. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6688. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6689. .ignore_suspend = 1,
  6690. .ops = &msm_cdc_dma_be_ops,
  6691. },
  6692. };
  6693. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6694. /* RX CDC DMA Backend DAI Links */
  6695. {
  6696. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6697. .stream_name = "RX CDC DMA0 Playback",
  6698. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6699. .platform_name = "msm-pcm-routing",
  6700. .codec_name = "bolero_codec",
  6701. .codec_dai_name = "rx_macro_rx1",
  6702. .no_pcm = 1,
  6703. .dpcm_playback = 1,
  6704. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6705. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6706. .ignore_pmdown_time = 1,
  6707. .ignore_suspend = 1,
  6708. .ops = &msm_cdc_dma_be_ops,
  6709. },
  6710. {
  6711. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6712. .stream_name = "RX CDC DMA1 Playback",
  6713. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6714. .platform_name = "msm-pcm-routing",
  6715. .codec_name = "bolero_codec",
  6716. .codec_dai_name = "rx_macro_rx2",
  6717. .no_pcm = 1,
  6718. .dpcm_playback = 1,
  6719. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6720. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6721. .ignore_pmdown_time = 1,
  6722. .ignore_suspend = 1,
  6723. .ops = &msm_cdc_dma_be_ops,
  6724. },
  6725. {
  6726. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6727. .stream_name = "RX CDC DMA2 Playback",
  6728. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6729. .platform_name = "msm-pcm-routing",
  6730. .codec_name = "bolero_codec",
  6731. .codec_dai_name = "rx_macro_rx3",
  6732. .no_pcm = 1,
  6733. .dpcm_playback = 1,
  6734. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6735. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6736. .ignore_pmdown_time = 1,
  6737. .ignore_suspend = 1,
  6738. .ops = &msm_cdc_dma_be_ops,
  6739. },
  6740. {
  6741. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6742. .stream_name = "RX CDC DMA3 Playback",
  6743. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6744. .platform_name = "msm-pcm-routing",
  6745. .codec_name = "bolero_codec",
  6746. .codec_dai_name = "rx_macro_rx4",
  6747. .no_pcm = 1,
  6748. .dpcm_playback = 1,
  6749. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6750. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6751. .ignore_pmdown_time = 1,
  6752. .ignore_suspend = 1,
  6753. .ops = &msm_cdc_dma_be_ops,
  6754. },
  6755. /* TX CDC DMA Backend DAI Links */
  6756. {
  6757. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6758. .stream_name = "TX CDC DMA3 Capture",
  6759. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6760. .platform_name = "msm-pcm-routing",
  6761. .codec_name = "bolero_codec",
  6762. .codec_dai_name = "tx_macro_tx1",
  6763. .no_pcm = 1,
  6764. .dpcm_capture = 1,
  6765. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6766. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6767. .ignore_suspend = 1,
  6768. .ops = &msm_cdc_dma_be_ops,
  6769. },
  6770. {
  6771. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6772. .stream_name = "TX CDC DMA4 Capture",
  6773. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6774. .platform_name = "msm-pcm-routing",
  6775. .codec_name = "bolero_codec",
  6776. .codec_dai_name = "tx_macro_tx2",
  6777. .no_pcm = 1,
  6778. .dpcm_capture = 1,
  6779. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6780. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6781. .ignore_suspend = 1,
  6782. .ops = &msm_cdc_dma_be_ops,
  6783. },
  6784. };
  6785. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6786. ARRAY_SIZE(msm_common_dai_links) +
  6787. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6788. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6789. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6790. ARRAY_SIZE(msm_common_be_dai_links) +
  6791. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6792. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6793. ARRAY_SIZE(ext_disp_be_dai_link) +
  6794. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6795. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6796. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6797. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6798. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6799. {
  6800. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6801. struct snd_soc_pcm_runtime *rtd;
  6802. int ret = 0;
  6803. void *mbhc_calibration;
  6804. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6805. if (!rtd) {
  6806. dev_err(card->dev,
  6807. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6808. __func__, be_dl_name);
  6809. ret = -EINVAL;
  6810. goto err_pcm_runtime;
  6811. }
  6812. mbhc_calibration = def_wcd_mbhc_cal();
  6813. if (!mbhc_calibration) {
  6814. ret = -ENOMEM;
  6815. goto err_mbhc_cal;
  6816. }
  6817. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6818. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6819. if (ret) {
  6820. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6821. __func__, ret);
  6822. goto err_hs_detect;
  6823. }
  6824. return 0;
  6825. err_hs_detect:
  6826. kfree(mbhc_calibration);
  6827. err_mbhc_cal:
  6828. err_pcm_runtime:
  6829. return ret;
  6830. }
  6831. static int msm_populate_dai_link_component_of_node(
  6832. struct snd_soc_card *card)
  6833. {
  6834. int i, index, ret = 0;
  6835. struct device *cdev = card->dev;
  6836. struct snd_soc_dai_link *dai_link = card->dai_link;
  6837. struct device_node *np;
  6838. if (!cdev) {
  6839. pr_err("%s: Sound card device memory NULL\n", __func__);
  6840. return -ENODEV;
  6841. }
  6842. for (i = 0; i < card->num_links; i++) {
  6843. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6844. continue;
  6845. /* populate platform_of_node for snd card dai links */
  6846. if (dai_link[i].platform_name &&
  6847. !dai_link[i].platform_of_node) {
  6848. index = of_property_match_string(cdev->of_node,
  6849. "asoc-platform-names",
  6850. dai_link[i].platform_name);
  6851. if (index < 0) {
  6852. pr_err("%s: No match found for platform name: %s\n",
  6853. __func__, dai_link[i].platform_name);
  6854. ret = index;
  6855. goto err;
  6856. }
  6857. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6858. index);
  6859. if (!np) {
  6860. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6861. __func__, dai_link[i].platform_name,
  6862. index);
  6863. ret = -ENODEV;
  6864. goto err;
  6865. }
  6866. dai_link[i].platform_of_node = np;
  6867. dai_link[i].platform_name = NULL;
  6868. }
  6869. /* populate cpu_of_node for snd card dai links */
  6870. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6871. index = of_property_match_string(cdev->of_node,
  6872. "asoc-cpu-names",
  6873. dai_link[i].cpu_dai_name);
  6874. if (index >= 0) {
  6875. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6876. index);
  6877. if (!np) {
  6878. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6879. __func__,
  6880. dai_link[i].cpu_dai_name);
  6881. ret = -ENODEV;
  6882. goto err;
  6883. }
  6884. dai_link[i].cpu_of_node = np;
  6885. dai_link[i].cpu_dai_name = NULL;
  6886. }
  6887. }
  6888. /* populate codec_of_node for snd card dai links */
  6889. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6890. index = of_property_match_string(cdev->of_node,
  6891. "asoc-codec-names",
  6892. dai_link[i].codec_name);
  6893. if (index < 0)
  6894. continue;
  6895. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6896. index);
  6897. if (!np) {
  6898. pr_err("%s: retrieving phandle for codec %s failed\n",
  6899. __func__, dai_link[i].codec_name);
  6900. ret = -ENODEV;
  6901. goto err;
  6902. }
  6903. dai_link[i].codec_of_node = np;
  6904. dai_link[i].codec_name = NULL;
  6905. }
  6906. }
  6907. err:
  6908. return ret;
  6909. }
  6910. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6911. {
  6912. int ret = 0;
  6913. struct snd_soc_codec *codec = rtd->codec;
  6914. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6915. ARRAY_SIZE(msm_tavil_snd_controls));
  6916. if (ret < 0) {
  6917. dev_err(codec->dev,
  6918. "%s: add_codec_controls failed, err = %d\n",
  6919. __func__, ret);
  6920. return ret;
  6921. }
  6922. return 0;
  6923. }
  6924. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6925. struct snd_pcm_hw_params *params)
  6926. {
  6927. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6928. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6929. int ret = 0;
  6930. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6931. 151};
  6932. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6933. 134, 135, 136, 137, 138, 139,
  6934. 140, 141, 142, 143};
  6935. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6936. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6937. slim_rx_cfg[SLIM_RX_0].channels,
  6938. rx_ch);
  6939. if (ret < 0)
  6940. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6941. __func__, ret);
  6942. } else {
  6943. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6944. slim_tx_cfg[SLIM_TX_0].channels,
  6945. tx_ch, 0, 0);
  6946. if (ret < 0)
  6947. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6948. __func__, ret);
  6949. }
  6950. return ret;
  6951. }
  6952. static struct snd_soc_ops msm_stub_be_ops = {
  6953. .hw_params = msm_snd_stub_hw_params,
  6954. };
  6955. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6956. /* FrontEnd DAI Links */
  6957. {
  6958. .name = "MSMSTUB Media1",
  6959. .stream_name = "MultiMedia1",
  6960. .cpu_dai_name = "MultiMedia1",
  6961. .platform_name = "msm-pcm-dsp.0",
  6962. .dynamic = 1,
  6963. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6964. .dpcm_playback = 1,
  6965. .dpcm_capture = 1,
  6966. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6967. SND_SOC_DPCM_TRIGGER_POST},
  6968. .codec_dai_name = "snd-soc-dummy-dai",
  6969. .codec_name = "snd-soc-dummy",
  6970. .ignore_suspend = 1,
  6971. /* this dainlink has playback support */
  6972. .ignore_pmdown_time = 1,
  6973. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6974. },
  6975. };
  6976. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6977. /* Backend DAI Links */
  6978. {
  6979. .name = LPASS_BE_SLIMBUS_0_RX,
  6980. .stream_name = "Slimbus Playback",
  6981. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6982. .platform_name = "msm-pcm-routing",
  6983. .codec_name = "msm-stub-codec.1",
  6984. .codec_dai_name = "msm-stub-rx",
  6985. .no_pcm = 1,
  6986. .dpcm_playback = 1,
  6987. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6988. .init = &msm_audrx_stub_init,
  6989. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6990. .ignore_pmdown_time = 1, /* dai link has playback support */
  6991. .ignore_suspend = 1,
  6992. .ops = &msm_stub_be_ops,
  6993. },
  6994. {
  6995. .name = LPASS_BE_SLIMBUS_0_TX,
  6996. .stream_name = "Slimbus Capture",
  6997. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6998. .platform_name = "msm-pcm-routing",
  6999. .codec_name = "msm-stub-codec.1",
  7000. .codec_dai_name = "msm-stub-tx",
  7001. .no_pcm = 1,
  7002. .dpcm_capture = 1,
  7003. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7004. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7005. .ignore_suspend = 1,
  7006. .ops = &msm_stub_be_ops,
  7007. },
  7008. };
  7009. static struct snd_soc_dai_link msm_stub_dai_links[
  7010. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7011. ARRAY_SIZE(msm_stub_be_dai_links)];
  7012. struct snd_soc_card snd_soc_card_stub_msm = {
  7013. .name = "sm6150-stub-snd-card",
  7014. };
  7015. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7016. { .compatible = "qcom,sm6150-asoc-snd",
  7017. .data = "codec"},
  7018. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7019. .data = "stub_codec"},
  7020. {},
  7021. };
  7022. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7023. {
  7024. struct snd_soc_card *card = NULL;
  7025. struct snd_soc_dai_link *dailink;
  7026. int total_links = 0, rc = 0;
  7027. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7028. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7029. u32 wcn_btfm_intf = 0;
  7030. const struct of_device_id *match;
  7031. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7032. if (!match) {
  7033. dev_err(dev, "%s: No DT match found for sound card\n",
  7034. __func__);
  7035. return NULL;
  7036. }
  7037. if (!strcmp(match->data, "codec")) {
  7038. card = &snd_soc_card_sm6150_msm;
  7039. memcpy(msm_sm6150_dai_links + total_links,
  7040. msm_common_dai_links,
  7041. sizeof(msm_common_dai_links));
  7042. total_links += ARRAY_SIZE(msm_common_dai_links);
  7043. memcpy(msm_sm6150_dai_links + total_links,
  7044. msm_common_misc_fe_dai_links,
  7045. sizeof(msm_common_misc_fe_dai_links));
  7046. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7047. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7048. &tavil_codec);
  7049. if (rc) {
  7050. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7051. __func__);
  7052. } else {
  7053. if (tavil_codec) {
  7054. card->late_probe =
  7055. msm_snd_card_tavil_late_probe;
  7056. memcpy(msm_sm6150_dai_links + total_links,
  7057. msm_tavil_fe_dai_links,
  7058. sizeof(msm_tavil_fe_dai_links));
  7059. total_links +=
  7060. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7061. }
  7062. }
  7063. if (!tavil_codec) {
  7064. memcpy(msm_sm6150_dai_links + total_links,
  7065. msm_bolero_fe_dai_links,
  7066. sizeof(msm_bolero_fe_dai_links));
  7067. total_links +=
  7068. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7069. }
  7070. memcpy(msm_sm6150_dai_links + total_links,
  7071. msm_common_be_dai_links,
  7072. sizeof(msm_common_be_dai_links));
  7073. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7074. if (tavil_codec) {
  7075. memcpy(msm_sm6150_dai_links + total_links,
  7076. msm_tavil_be_dai_links,
  7077. sizeof(msm_tavil_be_dai_links));
  7078. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7079. } else {
  7080. memcpy(msm_sm6150_dai_links + total_links,
  7081. msm_wsa_cdc_dma_be_dai_links,
  7082. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7083. total_links +=
  7084. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7085. memcpy(msm_sm6150_dai_links + total_links,
  7086. msm_rx_tx_cdc_dma_be_dai_links,
  7087. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7088. total_links +=
  7089. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7090. }
  7091. rc = of_property_read_u32(dev->of_node,
  7092. "qcom,ext-disp-audio-rx",
  7093. &ext_disp_audio_intf);
  7094. if (rc) {
  7095. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7096. __func__);
  7097. } else {
  7098. if (ext_disp_audio_intf) {
  7099. memcpy(msm_sm6150_dai_links + total_links,
  7100. ext_disp_be_dai_link,
  7101. sizeof(ext_disp_be_dai_link));
  7102. total_links +=
  7103. ARRAY_SIZE(ext_disp_be_dai_link);
  7104. }
  7105. }
  7106. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7107. &mi2s_audio_intf);
  7108. if (rc) {
  7109. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7110. __func__);
  7111. } else {
  7112. if (mi2s_audio_intf) {
  7113. memcpy(msm_sm6150_dai_links + total_links,
  7114. msm_mi2s_be_dai_links,
  7115. sizeof(msm_mi2s_be_dai_links));
  7116. total_links +=
  7117. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7118. }
  7119. }
  7120. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7121. &wcn_btfm_intf);
  7122. if (rc) {
  7123. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7124. __func__);
  7125. } else {
  7126. if (wcn_btfm_intf) {
  7127. memcpy(msm_sm6150_dai_links + total_links,
  7128. msm_wcn_be_dai_links,
  7129. sizeof(msm_wcn_be_dai_links));
  7130. total_links +=
  7131. ARRAY_SIZE(msm_wcn_be_dai_links);
  7132. }
  7133. }
  7134. rc = of_property_read_u32(dev->of_node,
  7135. "qcom,auxpcm-audio-intf",
  7136. &auxpcm_audio_intf);
  7137. if (rc) {
  7138. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7139. __func__);
  7140. } else {
  7141. if (auxpcm_audio_intf) {
  7142. memcpy(msm_sm6150_dai_links + total_links,
  7143. msm_auxpcm_be_dai_links,
  7144. sizeof(msm_auxpcm_be_dai_links));
  7145. total_links +=
  7146. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7147. }
  7148. }
  7149. dailink = msm_sm6150_dai_links;
  7150. } else if (!strcmp(match->data, "stub_codec")) {
  7151. card = &snd_soc_card_stub_msm;
  7152. memcpy(msm_stub_dai_links + total_links,
  7153. msm_stub_fe_dai_links,
  7154. sizeof(msm_stub_fe_dai_links));
  7155. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7156. memcpy(msm_stub_dai_links + total_links,
  7157. msm_stub_be_dai_links,
  7158. sizeof(msm_stub_be_dai_links));
  7159. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7160. dailink = msm_stub_dai_links;
  7161. }
  7162. if (card) {
  7163. card->dai_link = dailink;
  7164. card->num_links = total_links;
  7165. }
  7166. return card;
  7167. }
  7168. static int msm_wsa881x_init(struct snd_soc_component *component)
  7169. {
  7170. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7171. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7172. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7173. SPKR_L_BOOST, SPKR_L_VI};
  7174. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7175. SPKR_R_BOOST, SPKR_R_VI};
  7176. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7177. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7178. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7179. struct msm_asoc_mach_data *pdata;
  7180. struct snd_soc_dapm_context *dapm;
  7181. struct snd_card *card = component->card->snd_card;
  7182. struct snd_info_entry *entry;
  7183. int ret = 0;
  7184. if (!codec) {
  7185. pr_err("%s codec is NULL\n", __func__);
  7186. return -EINVAL;
  7187. }
  7188. dapm = snd_soc_codec_get_dapm(codec);
  7189. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7190. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7191. __func__, codec->component.name);
  7192. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7193. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7194. &ch_rate[0], &spkleft_port_types[0]);
  7195. if (dapm->component) {
  7196. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7197. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7198. }
  7199. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7200. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7201. __func__, codec->component.name);
  7202. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7203. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7204. &ch_rate[0], &spkright_port_types[0]);
  7205. if (dapm->component) {
  7206. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7207. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7208. }
  7209. } else {
  7210. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7211. codec->component.name);
  7212. ret = -EINVAL;
  7213. goto err;
  7214. }
  7215. pdata = snd_soc_card_get_drvdata(component->card);
  7216. if (!pdata->codec_root) {
  7217. entry = snd_info_create_subdir(card->module, "codecs",
  7218. card->proc_root);
  7219. if (!entry) {
  7220. pr_err("%s: Cannot create codecs module entry\n",
  7221. __func__);
  7222. ret = 0;
  7223. goto err;
  7224. }
  7225. pdata->codec_root = entry;
  7226. }
  7227. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7228. codec);
  7229. err:
  7230. return ret;
  7231. }
  7232. static int msm_aux_codec_init(struct snd_soc_component *component)
  7233. {
  7234. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7235. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7236. int ret = 0;
  7237. void *mbhc_calibration;
  7238. struct snd_info_entry *entry;
  7239. struct snd_card *card = component->card->snd_card;
  7240. struct msm_asoc_mach_data *pdata;
  7241. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7242. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7243. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7244. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7245. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7246. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7247. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7248. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7249. snd_soc_dapm_sync(dapm);
  7250. pdata = snd_soc_card_get_drvdata(component->card);
  7251. if (!pdata->codec_root) {
  7252. entry = snd_info_create_subdir(card->module, "codecs",
  7253. card->proc_root);
  7254. if (!entry) {
  7255. pr_err("%s: Cannot create codecs module entry\n",
  7256. __func__);
  7257. ret = 0;
  7258. goto codec_root_err;
  7259. }
  7260. pdata->codec_root = entry;
  7261. }
  7262. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7263. codec_root_err:
  7264. mbhc_calibration = def_wcd_mbhc_cal();
  7265. if (!mbhc_calibration) {
  7266. return -ENOMEM;
  7267. }
  7268. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7269. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7270. return ret;
  7271. }
  7272. static int msm_init_aux_dev(struct platform_device *pdev,
  7273. struct snd_soc_card *card)
  7274. {
  7275. struct device_node *wsa_of_node;
  7276. struct device_node *aux_codec_of_node;
  7277. u32 wsa_max_devs;
  7278. u32 wsa_dev_cnt;
  7279. u32 codec_aux_dev_cnt = 0;
  7280. int i;
  7281. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7282. struct aux_codec_dev_info *aux_cdc_dev_info;
  7283. const char *auxdev_name_prefix[1];
  7284. char *dev_name_str = NULL;
  7285. int found = 0;
  7286. int codecs_found = 0;
  7287. int ret = 0;
  7288. /* Get maximum WSA device count for this platform */
  7289. ret = of_property_read_u32(pdev->dev.of_node,
  7290. "qcom,wsa-max-devs", &wsa_max_devs);
  7291. if (ret) {
  7292. dev_info(&pdev->dev,
  7293. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7294. __func__, pdev->dev.of_node->full_name, ret);
  7295. wsa_max_devs = 0;
  7296. goto codec_aux_dev;
  7297. }
  7298. if (wsa_max_devs == 0) {
  7299. dev_warn(&pdev->dev,
  7300. "%s: Max WSA devices is 0 for this target?\n",
  7301. __func__);
  7302. goto codec_aux_dev;
  7303. }
  7304. /* Get count of WSA device phandles for this platform */
  7305. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7306. "qcom,wsa-devs", NULL);
  7307. if (wsa_dev_cnt == -ENOENT) {
  7308. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7309. __func__);
  7310. goto err;
  7311. } else if (wsa_dev_cnt <= 0) {
  7312. dev_err(&pdev->dev,
  7313. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7314. __func__, wsa_dev_cnt);
  7315. ret = -EINVAL;
  7316. goto err;
  7317. }
  7318. /*
  7319. * Expect total phandles count to be NOT less than maximum possible
  7320. * WSA count. However, if it is less, then assign same value to
  7321. * max count as well.
  7322. */
  7323. if (wsa_dev_cnt < wsa_max_devs) {
  7324. dev_dbg(&pdev->dev,
  7325. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7326. __func__, wsa_max_devs, wsa_dev_cnt);
  7327. wsa_max_devs = wsa_dev_cnt;
  7328. }
  7329. /* Make sure prefix string passed for each WSA device */
  7330. ret = of_property_count_strings(pdev->dev.of_node,
  7331. "qcom,wsa-aux-dev-prefix");
  7332. if (ret != wsa_dev_cnt) {
  7333. dev_err(&pdev->dev,
  7334. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7335. __func__, wsa_dev_cnt, ret);
  7336. ret = -EINVAL;
  7337. goto err;
  7338. }
  7339. /*
  7340. * Alloc mem to store phandle and index info of WSA device, if already
  7341. * registered with ALSA core
  7342. */
  7343. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7344. sizeof(struct msm_wsa881x_dev_info),
  7345. GFP_KERNEL);
  7346. if (!wsa881x_dev_info) {
  7347. ret = -ENOMEM;
  7348. goto err;
  7349. }
  7350. /*
  7351. * search and check whether all WSA devices are already
  7352. * registered with ALSA core or not. If found a node, store
  7353. * the node and the index in a local array of struct for later
  7354. * use.
  7355. */
  7356. for (i = 0; i < wsa_dev_cnt; i++) {
  7357. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7358. "qcom,wsa-devs", i);
  7359. if (unlikely(!wsa_of_node)) {
  7360. /* we should not be here */
  7361. dev_err(&pdev->dev,
  7362. "%s: wsa dev node is not present\n",
  7363. __func__);
  7364. ret = -EINVAL;
  7365. goto err;
  7366. }
  7367. if (soc_find_component(wsa_of_node, NULL)) {
  7368. /* WSA device registered with ALSA core */
  7369. wsa881x_dev_info[found].of_node = wsa_of_node;
  7370. wsa881x_dev_info[found].index = i;
  7371. found++;
  7372. if (found == wsa_max_devs)
  7373. break;
  7374. }
  7375. }
  7376. if (found < wsa_max_devs) {
  7377. dev_dbg(&pdev->dev,
  7378. "%s: failed to find %d components. Found only %d\n",
  7379. __func__, wsa_max_devs, found);
  7380. return -EPROBE_DEFER;
  7381. }
  7382. dev_info(&pdev->dev,
  7383. "%s: found %d wsa881x devices registered with ALSA core\n",
  7384. __func__, found);
  7385. codec_aux_dev:
  7386. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7387. /* Get count of aux codec device phandles for this platform */
  7388. codec_aux_dev_cnt = of_count_phandle_with_args(
  7389. pdev->dev.of_node,
  7390. "qcom,codec-aux-devs", NULL);
  7391. if (codec_aux_dev_cnt == -ENOENT) {
  7392. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7393. __func__);
  7394. goto err;
  7395. } else if (codec_aux_dev_cnt <= 0) {
  7396. dev_err(&pdev->dev,
  7397. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7398. __func__, codec_aux_dev_cnt);
  7399. ret = -EINVAL;
  7400. goto err;
  7401. }
  7402. /*
  7403. * Alloc mem to store phandle and index info of aux codec
  7404. * if already registered with ALSA core
  7405. */
  7406. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7407. sizeof(struct aux_codec_dev_info),
  7408. GFP_KERNEL);
  7409. if (!aux_cdc_dev_info) {
  7410. ret = -ENOMEM;
  7411. goto err;
  7412. }
  7413. /*
  7414. * search and check whether all aux codecs are already
  7415. * registered with ALSA core or not. If found a node, store
  7416. * the node and the index in a local array of struct for later
  7417. * use.
  7418. */
  7419. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7420. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7421. "qcom,codec-aux-devs", i);
  7422. if (unlikely(!aux_codec_of_node)) {
  7423. /* we should not be here */
  7424. dev_err(&pdev->dev,
  7425. "%s: aux codec dev node is not present\n",
  7426. __func__);
  7427. ret = -EINVAL;
  7428. goto err;
  7429. }
  7430. if (soc_find_component(aux_codec_of_node, NULL)) {
  7431. /* AUX codec registered with ALSA core */
  7432. aux_cdc_dev_info[codecs_found].of_node =
  7433. aux_codec_of_node;
  7434. aux_cdc_dev_info[codecs_found].index = i;
  7435. codecs_found++;
  7436. }
  7437. }
  7438. if (codecs_found < codec_aux_dev_cnt) {
  7439. dev_dbg(&pdev->dev,
  7440. "%s: failed to find %d components. Found only %d\n",
  7441. __func__, codec_aux_dev_cnt, codecs_found);
  7442. return -EPROBE_DEFER;
  7443. }
  7444. dev_info(&pdev->dev,
  7445. "%s: found %d AUX codecs registered with ALSA core\n",
  7446. __func__, codecs_found);
  7447. }
  7448. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7449. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7450. /* Alloc array of AUX devs struct */
  7451. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7452. sizeof(struct snd_soc_aux_dev),
  7453. GFP_KERNEL);
  7454. if (!msm_aux_dev) {
  7455. ret = -ENOMEM;
  7456. goto err;
  7457. }
  7458. /* Alloc array of codec conf struct */
  7459. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7460. sizeof(struct snd_soc_codec_conf),
  7461. GFP_KERNEL);
  7462. if (!msm_codec_conf) {
  7463. ret = -ENOMEM;
  7464. goto err;
  7465. }
  7466. for (i = 0; i < wsa_max_devs; i++) {
  7467. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7468. GFP_KERNEL);
  7469. if (!dev_name_str) {
  7470. ret = -ENOMEM;
  7471. goto err;
  7472. }
  7473. ret = of_property_read_string_index(pdev->dev.of_node,
  7474. "qcom,wsa-aux-dev-prefix",
  7475. wsa881x_dev_info[i].index,
  7476. auxdev_name_prefix);
  7477. if (ret) {
  7478. dev_err(&pdev->dev,
  7479. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7480. __func__, ret);
  7481. ret = -EINVAL;
  7482. goto err;
  7483. }
  7484. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7485. msm_aux_dev[i].name = dev_name_str;
  7486. msm_aux_dev[i].codec_name = NULL;
  7487. msm_aux_dev[i].codec_of_node =
  7488. wsa881x_dev_info[i].of_node;
  7489. msm_aux_dev[i].init = msm_wsa881x_init;
  7490. msm_codec_conf[i].dev_name = NULL;
  7491. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7492. msm_codec_conf[i].of_node =
  7493. wsa881x_dev_info[i].of_node;
  7494. }
  7495. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7496. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7497. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7498. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7499. aux_cdc_dev_info[i].of_node;
  7500. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7501. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7502. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7503. NULL;
  7504. msm_codec_conf[wsa_max_devs + i].of_node =
  7505. aux_cdc_dev_info[i].of_node;
  7506. }
  7507. card->codec_conf = msm_codec_conf;
  7508. card->aux_dev = msm_aux_dev;
  7509. err:
  7510. return ret;
  7511. }
  7512. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7513. {
  7514. int count;
  7515. u32 mi2s_master_slave[MI2S_MAX];
  7516. int ret;
  7517. for (count = 0; count < MI2S_MAX; count++) {
  7518. mutex_init(&mi2s_intf_conf[count].lock);
  7519. mi2s_intf_conf[count].ref_cnt = 0;
  7520. }
  7521. ret = of_property_read_u32_array(pdev->dev.of_node,
  7522. "qcom,msm-mi2s-master",
  7523. mi2s_master_slave, MI2S_MAX);
  7524. if (ret) {
  7525. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7526. __func__);
  7527. } else {
  7528. for (count = 0; count < MI2S_MAX; count++) {
  7529. mi2s_intf_conf[count].msm_is_mi2s_master =
  7530. mi2s_master_slave[count];
  7531. }
  7532. }
  7533. }
  7534. static void msm_i2s_auxpcm_deinit(void)
  7535. {
  7536. int count;
  7537. for (count = 0; count < MI2S_MAX; count++) {
  7538. mutex_destroy(&mi2s_intf_conf[count].lock);
  7539. mi2s_intf_conf[count].ref_cnt = 0;
  7540. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7541. }
  7542. }
  7543. static int sm6150_ssr_enable(struct device *dev, void *data)
  7544. {
  7545. struct platform_device *pdev = to_platform_device(dev);
  7546. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7547. struct msm_asoc_mach_data *pdata;
  7548. int ret = 0;
  7549. if (!card) {
  7550. dev_err(dev, "%s: card is NULL\n", __func__);
  7551. ret = -EINVAL;
  7552. goto err;
  7553. }
  7554. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7555. pdata = snd_soc_card_get_drvdata(card);
  7556. if (!pdata->is_afe_config_done) {
  7557. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7558. struct snd_soc_pcm_runtime *rtd;
  7559. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7560. if (!rtd) {
  7561. dev_err(dev,
  7562. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7563. __func__, be_dl_name);
  7564. ret = -EINVAL;
  7565. goto err;
  7566. }
  7567. ret = msm_afe_set_config(rtd->codec);
  7568. if (ret)
  7569. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7570. __func__, ret);
  7571. else
  7572. pdata->is_afe_config_done = true;
  7573. }
  7574. }
  7575. snd_soc_card_change_online_state(card, 1);
  7576. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7577. err:
  7578. return ret;
  7579. }
  7580. static void sm6150_ssr_disable(struct device *dev, void *data)
  7581. {
  7582. struct platform_device *pdev = to_platform_device(dev);
  7583. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7584. struct msm_asoc_mach_data *pdata;
  7585. if (!card) {
  7586. dev_err(dev, "%s: card is NULL\n", __func__);
  7587. return;
  7588. }
  7589. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7590. snd_soc_card_change_online_state(card, 0);
  7591. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7592. pdata = snd_soc_card_get_drvdata(card);
  7593. msm_afe_clear_config();
  7594. pdata->is_afe_config_done = false;
  7595. }
  7596. }
  7597. static const struct snd_event_ops sm6150_ssr_ops = {
  7598. .enable = sm6150_ssr_enable,
  7599. .disable = sm6150_ssr_disable,
  7600. };
  7601. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7602. {
  7603. struct device_node *node = data;
  7604. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7605. __func__, dev->of_node, node);
  7606. return (dev->of_node && dev->of_node == node);
  7607. }
  7608. static int msm_audio_ssr_register(struct device *dev)
  7609. {
  7610. struct device_node *np = dev->of_node;
  7611. struct snd_event_clients *ssr_clients = NULL;
  7612. struct device_node *node;
  7613. int ret;
  7614. int i;
  7615. for (i = 0; ; i++) {
  7616. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7617. if (!node)
  7618. break;
  7619. snd_event_mstr_add_client(&ssr_clients,
  7620. msm_audio_ssr_compare, node);
  7621. }
  7622. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7623. ssr_clients, NULL);
  7624. if (!ret)
  7625. snd_event_notify(dev, SND_EVENT_UP);
  7626. return ret;
  7627. }
  7628. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7629. {
  7630. struct snd_soc_card *card;
  7631. struct msm_asoc_mach_data *pdata;
  7632. const char *mbhc_audio_jack_type = NULL;
  7633. int ret;
  7634. if (!pdev->dev.of_node) {
  7635. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7636. return -EINVAL;
  7637. }
  7638. pdata = devm_kzalloc(&pdev->dev,
  7639. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7640. if (!pdata)
  7641. return -ENOMEM;
  7642. card = populate_snd_card_dailinks(&pdev->dev);
  7643. if (!card) {
  7644. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7645. ret = -EINVAL;
  7646. goto err;
  7647. }
  7648. card->dev = &pdev->dev;
  7649. platform_set_drvdata(pdev, card);
  7650. snd_soc_card_set_drvdata(card, pdata);
  7651. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7652. if (ret) {
  7653. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7654. ret);
  7655. goto err;
  7656. }
  7657. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7658. if (ret) {
  7659. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7660. ret);
  7661. goto err;
  7662. }
  7663. ret = msm_populate_dai_link_component_of_node(card);
  7664. if (ret) {
  7665. ret = -EPROBE_DEFER;
  7666. goto err;
  7667. }
  7668. ret = msm_init_aux_dev(pdev, card);
  7669. if (ret)
  7670. goto err;
  7671. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7672. if (ret == -EPROBE_DEFER) {
  7673. if (codec_reg_done)
  7674. ret = -EINVAL;
  7675. goto err;
  7676. } else if (ret) {
  7677. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7678. ret);
  7679. goto err;
  7680. }
  7681. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7682. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7683. "qcom,hph-en1-gpio", 0);
  7684. if (!pdata->hph_en1_gpio_p) {
  7685. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7686. "qcom,hph-en1-gpio",
  7687. pdev->dev.of_node->full_name);
  7688. }
  7689. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7690. "qcom,hph-en0-gpio", 0);
  7691. if (!pdata->hph_en0_gpio_p) {
  7692. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7693. "qcom,hph-en0-gpio",
  7694. pdev->dev.of_node->full_name);
  7695. }
  7696. ret = of_property_read_string(pdev->dev.of_node,
  7697. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7698. if (ret) {
  7699. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7700. "qcom,mbhc-audio-jack-type",
  7701. pdev->dev.of_node->full_name);
  7702. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7703. } else {
  7704. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7705. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7706. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7707. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7708. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7709. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7710. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7711. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7712. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7713. } else {
  7714. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7715. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7716. }
  7717. }
  7718. /*
  7719. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7720. * entry is not found in DT file as some targets do not support
  7721. * US-Euro detection
  7722. */
  7723. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7724. "qcom,us-euro-gpios", 0);
  7725. if (!pdata->us_euro_gpio_p) {
  7726. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7727. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7728. } else {
  7729. dev_dbg(&pdev->dev, "%s detected\n",
  7730. "qcom,us-euro-gpios");
  7731. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7732. }
  7733. if (wcd_mbhc_cfg.enable_usbc_analog) {
  7734. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  7735. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  7736. "fsa4480-i2c-handle", 0);
  7737. if (!pdata->fsa_handle)
  7738. dev_err(&pdev->dev,
  7739. "property %s not detected in node %s\n",
  7740. "fsa4480-i2c-handle",
  7741. pdev->dev.of_node->full_name);
  7742. }
  7743. /* Parse pinctrl info from devicetree */
  7744. ret = msm_get_pinctrl(pdev);
  7745. if (!ret) {
  7746. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7747. } else {
  7748. dev_dbg(&pdev->dev,
  7749. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7750. __func__, ret);
  7751. ret = 0;
  7752. }
  7753. msm_i2s_auxpcm_init(pdev);
  7754. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7755. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7756. "qcom,cdc-dmic01-gpios",
  7757. 0);
  7758. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7759. "qcom,cdc-dmic23-gpios",
  7760. 0);
  7761. }
  7762. ret = msm_audio_ssr_register(&pdev->dev);
  7763. if (ret)
  7764. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7765. __func__, ret);
  7766. err:
  7767. return ret;
  7768. }
  7769. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7770. {
  7771. snd_event_master_deregister(&pdev->dev);
  7772. msm_i2s_auxpcm_deinit();
  7773. return 0;
  7774. }
  7775. static struct platform_driver sm6150_asoc_machine_driver = {
  7776. .driver = {
  7777. .name = DRV_NAME,
  7778. .owner = THIS_MODULE,
  7779. .pm = &snd_soc_pm_ops,
  7780. .of_match_table = sm6150_asoc_machine_of_match,
  7781. },
  7782. .probe = msm_asoc_machine_probe,
  7783. .remove = msm_asoc_machine_remove,
  7784. };
  7785. module_platform_driver(sm6150_asoc_machine_driver);
  7786. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7787. MODULE_LICENSE("GPL v2");
  7788. MODULE_ALIAS("platform:" DRV_NAME);
  7789. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);