dp_main.c 212 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr, void *ol_peer);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /* PPDU stats mask sent to FW to support BPR feature*/
  92. #define DP_PPDU_STATS_CFG_BPR 0x2000
  93. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  94. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  95. DP_PPDU_STATS_CFG_ENH_STATS)
  96. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  97. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  98. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  99. /**
  100. * default_dscp_tid_map - Default DSCP-TID mapping
  101. *
  102. * DSCP TID
  103. * 000000 0
  104. * 001000 1
  105. * 010000 2
  106. * 011000 3
  107. * 100000 4
  108. * 101000 5
  109. * 110000 6
  110. * 111000 7
  111. */
  112. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  113. 0, 0, 0, 0, 0, 0, 0, 0,
  114. 1, 1, 1, 1, 1, 1, 1, 1,
  115. 2, 2, 2, 2, 2, 2, 2, 2,
  116. 3, 3, 3, 3, 3, 3, 3, 3,
  117. 4, 4, 4, 4, 4, 4, 4, 4,
  118. 5, 5, 5, 5, 5, 5, 5, 5,
  119. 6, 6, 6, 6, 6, 6, 6, 6,
  120. 7, 7, 7, 7, 7, 7, 7, 7,
  121. };
  122. /*
  123. * struct dp_rate_debug
  124. *
  125. * @mcs_type: print string for a given mcs
  126. * @valid: valid mcs rate?
  127. */
  128. struct dp_rate_debug {
  129. char mcs_type[DP_MAX_MCS_STRING_LEN];
  130. uint8_t valid;
  131. };
  132. #define MCS_VALID 1
  133. #define MCS_INVALID 0
  134. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  135. {
  136. {"OFDM 48 Mbps", MCS_VALID},
  137. {"OFDM 24 Mbps", MCS_VALID},
  138. {"OFDM 12 Mbps", MCS_VALID},
  139. {"OFDM 6 Mbps ", MCS_VALID},
  140. {"OFDM 54 Mbps", MCS_VALID},
  141. {"OFDM 36 Mbps", MCS_VALID},
  142. {"OFDM 18 Mbps", MCS_VALID},
  143. {"OFDM 9 Mbps ", MCS_VALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_INVALID},
  147. {"INVALID ", MCS_INVALID},
  148. {"INVALID ", MCS_VALID},
  149. },
  150. {
  151. {"CCK 11 Mbps Long ", MCS_VALID},
  152. {"CCK 5.5 Mbps Long ", MCS_VALID},
  153. {"CCK 2 Mbps Long ", MCS_VALID},
  154. {"CCK 1 Mbps Long ", MCS_VALID},
  155. {"CCK 11 Mbps Short ", MCS_VALID},
  156. {"CCK 5.5 Mbps Short", MCS_VALID},
  157. {"CCK 2 Mbps Short ", MCS_VALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_VALID},
  164. },
  165. {
  166. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  167. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  168. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  169. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  170. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  171. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  172. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  173. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  174. {"INVALID ", MCS_INVALID},
  175. {"INVALID ", MCS_INVALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_VALID},
  179. },
  180. {
  181. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  182. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  183. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  184. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  185. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  186. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  187. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  188. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  189. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  190. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  191. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  192. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  193. {"INVALID ", MCS_VALID},
  194. },
  195. {
  196. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  197. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  198. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  199. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  200. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  201. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  202. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  203. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  204. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  205. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  206. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  207. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  208. {"INVALID ", MCS_VALID},
  209. }
  210. };
  211. /**
  212. * @brief Cpu ring map types
  213. */
  214. enum dp_cpu_ring_map_types {
  215. DP_DEFAULT_MAP,
  216. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  217. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  218. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  219. DP_CPU_RING_MAP_MAX
  220. };
  221. /**
  222. * @brief Cpu to tx ring map
  223. */
  224. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  225. {0x0, 0x1, 0x2, 0x0},
  226. {0x1, 0x2, 0x1, 0x2},
  227. {0x0, 0x2, 0x0, 0x2},
  228. {0x2, 0x2, 0x2, 0x2}
  229. };
  230. /**
  231. * @brief Select the type of statistics
  232. */
  233. enum dp_stats_type {
  234. STATS_FW = 0,
  235. STATS_HOST = 1,
  236. STATS_TYPE_MAX = 2,
  237. };
  238. /**
  239. * @brief General Firmware statistics options
  240. *
  241. */
  242. enum dp_fw_stats {
  243. TXRX_FW_STATS_INVALID = -1,
  244. };
  245. /**
  246. * dp_stats_mapping_table - Firmware and Host statistics
  247. * currently supported
  248. */
  249. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  250. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  253. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  261. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  263. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  264. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  265. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  269. /* Last ENUM for HTT FW STATS */
  270. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  271. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  272. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  273. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  274. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  275. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  279. };
  280. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  281. struct cdp_peer *peer_hdl,
  282. uint8_t *mac_addr,
  283. enum cdp_txrx_ast_entry_type type,
  284. uint32_t flags)
  285. {
  286. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  287. (struct dp_peer *)peer_hdl,
  288. mac_addr,
  289. type,
  290. flags);
  291. }
  292. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. void *ast_entry_hdl)
  294. {
  295. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  296. qdf_spin_lock_bh(&soc->ast_lock);
  297. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  298. (struct dp_ast_entry *)ast_entry_hdl);
  299. qdf_spin_unlock_bh(&soc->ast_lock);
  300. }
  301. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  302. struct cdp_peer *peer_hdl,
  303. uint8_t *wds_macaddr,
  304. uint32_t flags)
  305. {
  306. int status;
  307. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  308. struct dp_ast_entry *ast_entry = NULL;
  309. qdf_spin_lock_bh(&soc->ast_lock);
  310. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  311. status = dp_peer_update_ast(soc,
  312. (struct dp_peer *)peer_hdl,
  313. ast_entry,
  314. flags);
  315. qdf_spin_unlock_bh(&soc->ast_lock);
  316. return status;
  317. }
  318. /*
  319. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  320. * @soc_handle: Datapath SOC handle
  321. * @wds_macaddr: MAC address of the WDS entry to be added
  322. * @vdev_hdl: vdev handle
  323. * Return: None
  324. */
  325. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  326. uint8_t *wds_macaddr, void *vdev_hdl)
  327. {
  328. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  329. struct dp_ast_entry *ast_entry = NULL;
  330. qdf_spin_lock_bh(&soc->ast_lock);
  331. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  332. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) {
  333. ast_entry->is_active = TRUE;
  334. }
  335. qdf_spin_unlock_bh(&soc->ast_lock);
  336. }
  337. /*
  338. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  339. * @soc: Datapath SOC handle
  340. * @vdev_hdl: vdev handle
  341. *
  342. * Return: None
  343. */
  344. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  345. void *vdev_hdl)
  346. {
  347. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  348. struct dp_pdev *pdev;
  349. struct dp_vdev *vdev;
  350. struct dp_peer *peer;
  351. struct dp_ast_entry *ase, *temp_ase;
  352. int i;
  353. qdf_spin_lock_bh(&soc->ast_lock);
  354. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  355. pdev = soc->pdev_list[i];
  356. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  357. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  358. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  359. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  360. if (ase->type ==
  361. CDP_TXRX_AST_TYPE_STATIC)
  362. continue;
  363. ase->is_active = TRUE;
  364. }
  365. }
  366. }
  367. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  368. }
  369. qdf_spin_unlock_bh(&soc->ast_lock);
  370. }
  371. /*
  372. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  373. * @soc: Datapath SOC handle
  374. *
  375. * Return: None
  376. */
  377. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  378. {
  379. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  380. struct dp_pdev *pdev;
  381. struct dp_vdev *vdev;
  382. struct dp_peer *peer;
  383. struct dp_ast_entry *ase, *temp_ase;
  384. int i;
  385. qdf_spin_lock_bh(&soc->ast_lock);
  386. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  387. pdev = soc->pdev_list[i];
  388. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  389. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  390. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  391. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  392. if (ase->type ==
  393. CDP_TXRX_AST_TYPE_STATIC)
  394. continue;
  395. dp_peer_del_ast(soc, ase);
  396. }
  397. }
  398. }
  399. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  400. }
  401. qdf_spin_unlock_bh(&soc->ast_lock);
  402. }
  403. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  404. uint8_t *ast_mac_addr)
  405. {
  406. struct dp_ast_entry *ast_entry;
  407. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  408. qdf_spin_lock_bh(&soc->ast_lock);
  409. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  410. qdf_spin_unlock_bh(&soc->ast_lock);
  411. return (void *)ast_entry;
  412. }
  413. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  414. void *ast_entry_hdl)
  415. {
  416. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  417. (struct dp_ast_entry *)ast_entry_hdl);
  418. }
  419. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  420. void *ast_entry_hdl)
  421. {
  422. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  423. (struct dp_ast_entry *)ast_entry_hdl);
  424. }
  425. static void dp_peer_ast_set_type_wifi3(
  426. struct cdp_soc_t *soc_hdl,
  427. void *ast_entry_hdl,
  428. enum cdp_txrx_ast_entry_type type)
  429. {
  430. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  431. (struct dp_ast_entry *)ast_entry_hdl,
  432. type);
  433. }
  434. /**
  435. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  436. * @ring_num: ring num of the ring being queried
  437. * @grp_mask: the grp_mask array for the ring type in question.
  438. *
  439. * The grp_mask array is indexed by group number and the bit fields correspond
  440. * to ring numbers. We are finding which interrupt group a ring belongs to.
  441. *
  442. * Return: the index in the grp_mask array with the ring number.
  443. * -QDF_STATUS_E_NOENT if no entry is found
  444. */
  445. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  446. {
  447. int ext_group_num;
  448. int mask = 1 << ring_num;
  449. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  450. ext_group_num++) {
  451. if (mask & grp_mask[ext_group_num])
  452. return ext_group_num;
  453. }
  454. return -QDF_STATUS_E_NOENT;
  455. }
  456. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  457. enum hal_ring_type ring_type,
  458. int ring_num)
  459. {
  460. int *grp_mask;
  461. switch (ring_type) {
  462. case WBM2SW_RELEASE:
  463. /* dp_tx_comp_handler - soc->tx_comp_ring */
  464. if (ring_num < 3)
  465. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  466. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  467. else if (ring_num == 3) {
  468. /* sw treats this as a separate ring type */
  469. grp_mask = &soc->wlan_cfg_ctx->
  470. int_rx_wbm_rel_ring_mask[0];
  471. ring_num = 0;
  472. } else {
  473. qdf_assert(0);
  474. return -QDF_STATUS_E_NOENT;
  475. }
  476. break;
  477. case REO_EXCEPTION:
  478. /* dp_rx_err_process - &soc->reo_exception_ring */
  479. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  480. break;
  481. case REO_DST:
  482. /* dp_rx_process - soc->reo_dest_ring */
  483. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  484. break;
  485. case REO_STATUS:
  486. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  487. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  488. break;
  489. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  490. case RXDMA_MONITOR_STATUS:
  491. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  492. case RXDMA_MONITOR_DST:
  493. /* dp_mon_process */
  494. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  495. break;
  496. case RXDMA_DST:
  497. /* dp_rxdma_err_process */
  498. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  499. break;
  500. case RXDMA_BUF:
  501. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  502. break;
  503. case RXDMA_MONITOR_BUF:
  504. /* TODO: support low_thresh interrupt */
  505. return -QDF_STATUS_E_NOENT;
  506. break;
  507. case TCL_DATA:
  508. case TCL_CMD:
  509. case REO_CMD:
  510. case SW2WBM_RELEASE:
  511. case WBM_IDLE_LINK:
  512. /* normally empty SW_TO_HW rings */
  513. return -QDF_STATUS_E_NOENT;
  514. break;
  515. case TCL_STATUS:
  516. case REO_REINJECT:
  517. /* misc unused rings */
  518. return -QDF_STATUS_E_NOENT;
  519. break;
  520. case CE_SRC:
  521. case CE_DST:
  522. case CE_DST_STATUS:
  523. /* CE_rings - currently handled by hif */
  524. default:
  525. return -QDF_STATUS_E_NOENT;
  526. break;
  527. }
  528. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  529. }
  530. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  531. *ring_params, int ring_type, int ring_num)
  532. {
  533. int msi_group_number;
  534. int msi_data_count;
  535. int ret;
  536. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  537. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  538. &msi_data_count, &msi_data_start,
  539. &msi_irq_start);
  540. if (ret)
  541. return;
  542. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  543. ring_num);
  544. if (msi_group_number < 0) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  546. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  547. ring_type, ring_num);
  548. ring_params->msi_addr = 0;
  549. ring_params->msi_data = 0;
  550. return;
  551. }
  552. if (msi_group_number > msi_data_count) {
  553. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  554. FL("2 msi_groups will share an msi; msi_group_num %d"),
  555. msi_group_number);
  556. QDF_ASSERT(0);
  557. }
  558. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  559. ring_params->msi_addr = addr_low;
  560. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  561. ring_params->msi_data = (msi_group_number % msi_data_count)
  562. + msi_data_start;
  563. ring_params->flags |= HAL_SRNG_MSI_INTR;
  564. }
  565. /**
  566. * dp_print_ast_stats() - Dump AST table contents
  567. * @soc: Datapath soc handle
  568. *
  569. * return void
  570. */
  571. #ifdef FEATURE_AST
  572. static void dp_print_ast_stats(struct dp_soc *soc)
  573. {
  574. uint8_t i;
  575. uint8_t num_entries = 0;
  576. struct dp_vdev *vdev;
  577. struct dp_pdev *pdev;
  578. struct dp_peer *peer;
  579. struct dp_ast_entry *ase, *tmp_ase;
  580. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  581. DP_PRINT_STATS("AST Stats:");
  582. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  583. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  584. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  585. DP_PRINT_STATS("AST Table:");
  586. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  587. pdev = soc->pdev_list[i];
  588. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  589. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  590. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  591. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  592. DP_PRINT_STATS("%6d mac_addr = %pM"
  593. " peer_mac_addr = %pM"
  594. " type = %s"
  595. " next_hop = %d"
  596. " is_active = %d"
  597. " is_bss = %d"
  598. " ast_idx = %d"
  599. " pdev_id = %d"
  600. " vdev_id = %d",
  601. ++num_entries,
  602. ase->mac_addr.raw,
  603. ase->peer->mac_addr.raw,
  604. type[ase->type],
  605. ase->next_hop,
  606. ase->is_active,
  607. ase->is_bss,
  608. ase->ast_idx,
  609. ase->pdev_id,
  610. ase->vdev_id);
  611. }
  612. }
  613. }
  614. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  615. }
  616. }
  617. #else
  618. static void dp_print_ast_stats(struct dp_soc *soc)
  619. {
  620. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  621. return;
  622. }
  623. #endif
  624. static void dp_print_peer_table(struct dp_vdev *vdev)
  625. {
  626. struct dp_peer *peer = NULL;
  627. DP_PRINT_STATS("Dumping Peer Table Stats:");
  628. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  629. if (!peer) {
  630. DP_PRINT_STATS("Invalid Peer");
  631. return;
  632. }
  633. DP_PRINT_STATS(" peer_mac_addr = %pM"
  634. " nawds_enabled = %d"
  635. " bss_peer = %d"
  636. " wapi = %d"
  637. " wds_enabled = %d"
  638. " delete in progress = %d",
  639. peer->mac_addr.raw,
  640. peer->nawds_enabled,
  641. peer->bss_peer,
  642. peer->wapi,
  643. peer->wds_enabled,
  644. peer->delete_in_progress);
  645. }
  646. }
  647. /*
  648. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  649. */
  650. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  651. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  652. {
  653. void *hal_soc = soc->hal_soc;
  654. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  655. /* TODO: See if we should get align size from hal */
  656. uint32_t ring_base_align = 8;
  657. struct hal_srng_params ring_params;
  658. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  659. /* TODO: Currently hal layer takes care of endianness related settings.
  660. * See if these settings need to passed from DP layer
  661. */
  662. ring_params.flags = 0;
  663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  664. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  665. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  666. srng->hal_srng = NULL;
  667. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  668. srng->num_entries = num_entries;
  669. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  670. soc->osdev, soc->osdev->dev, srng->alloc_size,
  671. &(srng->base_paddr_unaligned));
  672. if (!srng->base_vaddr_unaligned) {
  673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  674. FL("alloc failed - ring_type: %d, ring_num %d"),
  675. ring_type, ring_num);
  676. return QDF_STATUS_E_NOMEM;
  677. }
  678. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  679. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  680. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  681. ((unsigned long)(ring_params.ring_base_vaddr) -
  682. (unsigned long)srng->base_vaddr_unaligned);
  683. ring_params.num_entries = num_entries;
  684. if (soc->intr_mode == DP_INTR_MSI) {
  685. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  687. FL("Using MSI for ring_type: %d, ring_num %d"),
  688. ring_type, ring_num);
  689. } else {
  690. ring_params.msi_data = 0;
  691. ring_params.msi_addr = 0;
  692. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  693. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  694. ring_type, ring_num);
  695. }
  696. /*
  697. * Setup interrupt timer and batch counter thresholds for
  698. * interrupt mitigation based on ring type
  699. */
  700. if (ring_type == REO_DST) {
  701. ring_params.intr_timer_thres_us =
  702. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  703. ring_params.intr_batch_cntr_thres_entries =
  704. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  705. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  706. ring_params.intr_timer_thres_us =
  707. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  708. ring_params.intr_batch_cntr_thres_entries =
  709. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  710. } else {
  711. ring_params.intr_timer_thres_us =
  712. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  713. ring_params.intr_batch_cntr_thres_entries =
  714. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  715. }
  716. /* Enable low threshold interrupts for rx buffer rings (regular and
  717. * monitor buffer rings.
  718. * TODO: See if this is required for any other ring
  719. */
  720. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  721. (ring_type == RXDMA_MONITOR_STATUS)) {
  722. /* TODO: Setting low threshold to 1/8th of ring size
  723. * see if this needs to be configurable
  724. */
  725. ring_params.low_threshold = num_entries >> 3;
  726. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  727. ring_params.intr_timer_thres_us =
  728. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  729. ring_params.intr_batch_cntr_thres_entries = 0;
  730. }
  731. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  732. mac_id, &ring_params);
  733. if (!srng->hal_srng) {
  734. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  735. srng->alloc_size,
  736. srng->base_vaddr_unaligned,
  737. srng->base_paddr_unaligned, 0);
  738. }
  739. return 0;
  740. }
  741. /**
  742. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  743. * Any buffers allocated and attached to ring entries are expected to be freed
  744. * before calling this function.
  745. */
  746. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  747. int ring_type, int ring_num)
  748. {
  749. if (!srng->hal_srng) {
  750. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  751. FL("Ring type: %d, num:%d not setup"),
  752. ring_type, ring_num);
  753. return;
  754. }
  755. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  756. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  757. srng->alloc_size,
  758. srng->base_vaddr_unaligned,
  759. srng->base_paddr_unaligned, 0);
  760. srng->hal_srng = NULL;
  761. }
  762. /* TODO: Need this interface from HIF */
  763. void *hif_get_hal_handle(void *hif_handle);
  764. /*
  765. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  766. * @dp_ctx: DP SOC handle
  767. * @budget: Number of frames/descriptors that can be processed in one shot
  768. *
  769. * Return: remaining budget/quota for the soc device
  770. */
  771. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  772. {
  773. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  774. struct dp_soc *soc = int_ctx->soc;
  775. int ring = 0;
  776. uint32_t work_done = 0;
  777. int budget = dp_budget;
  778. uint8_t tx_mask = int_ctx->tx_ring_mask;
  779. uint8_t rx_mask = int_ctx->rx_ring_mask;
  780. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  781. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  782. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  783. uint32_t remaining_quota = dp_budget;
  784. struct dp_pdev *pdev = NULL;
  785. int mac_id;
  786. /* Process Tx completion interrupts first to return back buffers */
  787. while (tx_mask) {
  788. if (tx_mask & 0x1) {
  789. work_done = dp_tx_comp_handler(soc,
  790. soc->tx_comp_ring[ring].hal_srng,
  791. remaining_quota);
  792. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  793. "tx mask 0x%x ring %d, budget %d, work_done %d",
  794. tx_mask, ring, budget, work_done);
  795. budget -= work_done;
  796. if (budget <= 0)
  797. goto budget_done;
  798. remaining_quota = budget;
  799. }
  800. tx_mask = tx_mask >> 1;
  801. ring++;
  802. }
  803. /* Process REO Exception ring interrupt */
  804. if (rx_err_mask) {
  805. work_done = dp_rx_err_process(soc,
  806. soc->reo_exception_ring.hal_srng,
  807. remaining_quota);
  808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  809. "REO Exception Ring: work_done %d budget %d",
  810. work_done, budget);
  811. budget -= work_done;
  812. if (budget <= 0) {
  813. goto budget_done;
  814. }
  815. remaining_quota = budget;
  816. }
  817. /* Process Rx WBM release ring interrupt */
  818. if (rx_wbm_rel_mask) {
  819. work_done = dp_rx_wbm_err_process(soc,
  820. soc->rx_rel_ring.hal_srng, remaining_quota);
  821. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  822. "WBM Release Ring: work_done %d budget %d",
  823. work_done, budget);
  824. budget -= work_done;
  825. if (budget <= 0) {
  826. goto budget_done;
  827. }
  828. remaining_quota = budget;
  829. }
  830. /* Process Rx interrupts */
  831. if (rx_mask) {
  832. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  833. if (rx_mask & (1 << ring)) {
  834. work_done = dp_rx_process(int_ctx,
  835. soc->reo_dest_ring[ring].hal_srng,
  836. remaining_quota);
  837. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  838. "rx mask 0x%x ring %d, work_done %d budget %d",
  839. rx_mask, ring, work_done, budget);
  840. budget -= work_done;
  841. if (budget <= 0)
  842. goto budget_done;
  843. remaining_quota = budget;
  844. }
  845. }
  846. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  847. work_done = dp_rxdma_err_process(soc, ring,
  848. remaining_quota);
  849. budget -= work_done;
  850. }
  851. }
  852. if (reo_status_mask)
  853. dp_reo_status_ring_handler(soc);
  854. /* Process LMAC interrupts */
  855. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  856. pdev = soc->pdev_list[ring];
  857. if (pdev == NULL)
  858. continue;
  859. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  860. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  861. pdev->pdev_id);
  862. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  863. work_done = dp_mon_process(soc, mac_for_pdev,
  864. remaining_quota);
  865. budget -= work_done;
  866. if (budget <= 0)
  867. goto budget_done;
  868. remaining_quota = budget;
  869. }
  870. if (int_ctx->rxdma2host_ring_mask &
  871. (1 << mac_for_pdev)) {
  872. work_done = dp_rxdma_err_process(soc,
  873. mac_for_pdev,
  874. remaining_quota);
  875. budget -= work_done;
  876. if (budget <= 0)
  877. goto budget_done;
  878. remaining_quota = budget;
  879. }
  880. if (int_ctx->host2rxdma_ring_mask &
  881. (1 << mac_for_pdev)) {
  882. union dp_rx_desc_list_elem_t *desc_list = NULL;
  883. union dp_rx_desc_list_elem_t *tail = NULL;
  884. struct dp_srng *rx_refill_buf_ring =
  885. &pdev->rx_refill_buf_ring;
  886. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  887. 1);
  888. dp_rx_buffers_replenish(soc, mac_for_pdev,
  889. rx_refill_buf_ring,
  890. &soc->rx_desc_buf[mac_for_pdev], 0,
  891. &desc_list, &tail);
  892. }
  893. }
  894. }
  895. qdf_lro_flush(int_ctx->lro_ctx);
  896. budget_done:
  897. return dp_budget - budget;
  898. }
  899. #ifdef DP_INTR_POLL_BASED
  900. /* dp_interrupt_timer()- timer poll for interrupts
  901. *
  902. * @arg: SoC Handle
  903. *
  904. * Return:
  905. *
  906. */
  907. static void dp_interrupt_timer(void *arg)
  908. {
  909. struct dp_soc *soc = (struct dp_soc *) arg;
  910. int i;
  911. if (qdf_atomic_read(&soc->cmn_init_done)) {
  912. for (i = 0;
  913. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  914. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  915. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  916. }
  917. }
  918. /*
  919. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  920. * @txrx_soc: DP SOC handle
  921. *
  922. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  923. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  924. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  925. *
  926. * Return: 0 for success. nonzero for failure.
  927. */
  928. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  929. {
  930. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  931. int i;
  932. soc->intr_mode = DP_INTR_POLL;
  933. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  934. soc->intr_ctx[i].dp_intr_id = i;
  935. soc->intr_ctx[i].tx_ring_mask =
  936. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  937. soc->intr_ctx[i].rx_ring_mask =
  938. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  939. soc->intr_ctx[i].rx_mon_ring_mask =
  940. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  941. soc->intr_ctx[i].rx_err_ring_mask =
  942. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  943. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  944. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  945. soc->intr_ctx[i].reo_status_ring_mask =
  946. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  947. soc->intr_ctx[i].rxdma2host_ring_mask =
  948. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  949. soc->intr_ctx[i].soc = soc;
  950. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  951. }
  952. qdf_timer_init(soc->osdev, &soc->int_timer,
  953. dp_interrupt_timer, (void *)soc,
  954. QDF_TIMER_TYPE_WAKE_APPS);
  955. return QDF_STATUS_SUCCESS;
  956. }
  957. #if defined(CONFIG_MCL)
  958. extern int con_mode_monitor;
  959. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  960. /*
  961. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  962. * @txrx_soc: DP SOC handle
  963. *
  964. * Call the appropriate attach function based on the mode of operation.
  965. * This is a WAR for enabling monitor mode.
  966. *
  967. * Return: 0 for success. nonzero for failure.
  968. */
  969. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  970. {
  971. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  972. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  973. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  974. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  975. "%s: Poll mode", __func__);
  976. return dp_soc_interrupt_attach_poll(txrx_soc);
  977. } else {
  978. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  979. "%s: Interrupt mode", __func__);
  980. return dp_soc_interrupt_attach(txrx_soc);
  981. }
  982. }
  983. #else
  984. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  985. {
  986. return dp_soc_interrupt_attach_poll(txrx_soc);
  987. }
  988. #endif
  989. #endif
  990. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  991. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  992. {
  993. int j;
  994. int num_irq = 0;
  995. int tx_mask =
  996. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  997. int rx_mask =
  998. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  999. int rx_mon_mask =
  1000. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1001. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1002. soc->wlan_cfg_ctx, intr_ctx_num);
  1003. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1004. soc->wlan_cfg_ctx, intr_ctx_num);
  1005. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1006. soc->wlan_cfg_ctx, intr_ctx_num);
  1007. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1008. soc->wlan_cfg_ctx, intr_ctx_num);
  1009. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1010. soc->wlan_cfg_ctx, intr_ctx_num);
  1011. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1012. if (tx_mask & (1 << j)) {
  1013. irq_id_map[num_irq++] =
  1014. (wbm2host_tx_completions_ring1 - j);
  1015. }
  1016. if (rx_mask & (1 << j)) {
  1017. irq_id_map[num_irq++] =
  1018. (reo2host_destination_ring1 - j);
  1019. }
  1020. if (rxdma2host_ring_mask & (1 << j)) {
  1021. irq_id_map[num_irq++] =
  1022. rxdma2host_destination_ring_mac1 -
  1023. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1024. }
  1025. if (host2rxdma_ring_mask & (1 << j)) {
  1026. irq_id_map[num_irq++] =
  1027. host2rxdma_host_buf_ring_mac1 -
  1028. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1029. }
  1030. if (rx_mon_mask & (1 << j)) {
  1031. irq_id_map[num_irq++] =
  1032. ppdu_end_interrupts_mac1 -
  1033. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1034. irq_id_map[num_irq++] =
  1035. rxdma2host_monitor_status_ring_mac1 -
  1036. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1037. }
  1038. if (rx_wbm_rel_ring_mask & (1 << j))
  1039. irq_id_map[num_irq++] = wbm2host_rx_release;
  1040. if (rx_err_ring_mask & (1 << j))
  1041. irq_id_map[num_irq++] = reo2host_exception;
  1042. if (reo_status_ring_mask & (1 << j))
  1043. irq_id_map[num_irq++] = reo2host_status;
  1044. }
  1045. *num_irq_r = num_irq;
  1046. }
  1047. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1048. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1049. int msi_vector_count, int msi_vector_start)
  1050. {
  1051. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1052. soc->wlan_cfg_ctx, intr_ctx_num);
  1053. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1054. soc->wlan_cfg_ctx, intr_ctx_num);
  1055. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1056. soc->wlan_cfg_ctx, intr_ctx_num);
  1057. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1058. soc->wlan_cfg_ctx, intr_ctx_num);
  1059. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1060. soc->wlan_cfg_ctx, intr_ctx_num);
  1061. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1062. soc->wlan_cfg_ctx, intr_ctx_num);
  1063. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1064. soc->wlan_cfg_ctx, intr_ctx_num);
  1065. unsigned int vector =
  1066. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1067. int num_irq = 0;
  1068. soc->intr_mode = DP_INTR_MSI;
  1069. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1070. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1071. irq_id_map[num_irq++] =
  1072. pld_get_msi_irq(soc->osdev->dev, vector);
  1073. *num_irq_r = num_irq;
  1074. }
  1075. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1076. int *irq_id_map, int *num_irq)
  1077. {
  1078. int msi_vector_count, ret;
  1079. uint32_t msi_base_data, msi_vector_start;
  1080. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1081. &msi_vector_count,
  1082. &msi_base_data,
  1083. &msi_vector_start);
  1084. if (ret)
  1085. return dp_soc_interrupt_map_calculate_integrated(soc,
  1086. intr_ctx_num, irq_id_map, num_irq);
  1087. else
  1088. dp_soc_interrupt_map_calculate_msi(soc,
  1089. intr_ctx_num, irq_id_map, num_irq,
  1090. msi_vector_count, msi_vector_start);
  1091. }
  1092. /*
  1093. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1094. * @txrx_soc: DP SOC handle
  1095. *
  1096. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1097. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1098. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1099. *
  1100. * Return: 0 for success. nonzero for failure.
  1101. */
  1102. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1103. {
  1104. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1105. int i = 0;
  1106. int num_irq = 0;
  1107. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1108. int ret = 0;
  1109. /* Map of IRQ ids registered with one interrupt context */
  1110. int irq_id_map[HIF_MAX_GRP_IRQ];
  1111. int tx_mask =
  1112. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1113. int rx_mask =
  1114. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1115. int rx_mon_mask =
  1116. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1117. int rx_err_ring_mask =
  1118. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1119. int rx_wbm_rel_ring_mask =
  1120. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1121. int reo_status_ring_mask =
  1122. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1123. int rxdma2host_ring_mask =
  1124. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1125. int host2rxdma_ring_mask =
  1126. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1127. soc->intr_ctx[i].dp_intr_id = i;
  1128. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1129. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1130. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1131. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1132. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1133. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1134. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1135. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1136. soc->intr_ctx[i].soc = soc;
  1137. num_irq = 0;
  1138. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1139. &num_irq);
  1140. ret = hif_register_ext_group(soc->hif_handle,
  1141. num_irq, irq_id_map, dp_service_srngs,
  1142. &soc->intr_ctx[i], "dp_intr",
  1143. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1144. if (ret) {
  1145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1146. FL("failed, ret = %d"), ret);
  1147. return QDF_STATUS_E_FAILURE;
  1148. }
  1149. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1150. }
  1151. hif_configure_ext_group_interrupts(soc->hif_handle);
  1152. return QDF_STATUS_SUCCESS;
  1153. }
  1154. /*
  1155. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1156. * @txrx_soc: DP SOC handle
  1157. *
  1158. * Return: void
  1159. */
  1160. static void dp_soc_interrupt_detach(void *txrx_soc)
  1161. {
  1162. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1163. int i;
  1164. if (soc->intr_mode == DP_INTR_POLL) {
  1165. qdf_timer_stop(&soc->int_timer);
  1166. qdf_timer_free(&soc->int_timer);
  1167. } else {
  1168. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1169. }
  1170. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1171. soc->intr_ctx[i].tx_ring_mask = 0;
  1172. soc->intr_ctx[i].rx_ring_mask = 0;
  1173. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1174. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1175. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1176. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1177. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1178. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1179. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1180. }
  1181. }
  1182. #define AVG_MAX_MPDUS_PER_TID 128
  1183. #define AVG_TIDS_PER_CLIENT 2
  1184. #define AVG_FLOWS_PER_TID 2
  1185. #define AVG_MSDUS_PER_FLOW 128
  1186. #define AVG_MSDUS_PER_MPDU 4
  1187. /*
  1188. * Allocate and setup link descriptor pool that will be used by HW for
  1189. * various link and queue descriptors and managed by WBM
  1190. */
  1191. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1192. {
  1193. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1194. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1195. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1196. uint32_t num_mpdus_per_link_desc =
  1197. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1198. uint32_t num_msdus_per_link_desc =
  1199. hal_num_msdus_per_link_desc(soc->hal_soc);
  1200. uint32_t num_mpdu_links_per_queue_desc =
  1201. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1202. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1203. uint32_t total_link_descs, total_mem_size;
  1204. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1205. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1206. uint32_t num_link_desc_banks;
  1207. uint32_t last_bank_size = 0;
  1208. uint32_t entry_size, num_entries;
  1209. int i;
  1210. uint32_t desc_id = 0;
  1211. /* Only Tx queue descriptors are allocated from common link descriptor
  1212. * pool Rx queue descriptors are not included in this because (REO queue
  1213. * extension descriptors) they are expected to be allocated contiguously
  1214. * with REO queue descriptors
  1215. */
  1216. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1217. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1218. num_mpdu_queue_descs = num_mpdu_link_descs /
  1219. num_mpdu_links_per_queue_desc;
  1220. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1221. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1222. num_msdus_per_link_desc;
  1223. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1224. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1225. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1226. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1227. /* Round up to power of 2 */
  1228. total_link_descs = 1;
  1229. while (total_link_descs < num_entries)
  1230. total_link_descs <<= 1;
  1231. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1232. FL("total_link_descs: %u, link_desc_size: %d"),
  1233. total_link_descs, link_desc_size);
  1234. total_mem_size = total_link_descs * link_desc_size;
  1235. total_mem_size += link_desc_align;
  1236. if (total_mem_size <= max_alloc_size) {
  1237. num_link_desc_banks = 0;
  1238. last_bank_size = total_mem_size;
  1239. } else {
  1240. num_link_desc_banks = (total_mem_size) /
  1241. (max_alloc_size - link_desc_align);
  1242. last_bank_size = total_mem_size %
  1243. (max_alloc_size - link_desc_align);
  1244. }
  1245. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1246. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1247. total_mem_size, num_link_desc_banks);
  1248. for (i = 0; i < num_link_desc_banks; i++) {
  1249. soc->link_desc_banks[i].base_vaddr_unaligned =
  1250. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1251. max_alloc_size,
  1252. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1253. soc->link_desc_banks[i].size = max_alloc_size;
  1254. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1255. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1256. ((unsigned long)(
  1257. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1258. link_desc_align));
  1259. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1260. soc->link_desc_banks[i].base_paddr_unaligned) +
  1261. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1262. (unsigned long)(
  1263. soc->link_desc_banks[i].base_vaddr_unaligned));
  1264. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1265. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1266. FL("Link descriptor memory alloc failed"));
  1267. goto fail;
  1268. }
  1269. }
  1270. if (last_bank_size) {
  1271. /* Allocate last bank in case total memory required is not exact
  1272. * multiple of max_alloc_size
  1273. */
  1274. soc->link_desc_banks[i].base_vaddr_unaligned =
  1275. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1276. last_bank_size,
  1277. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1278. soc->link_desc_banks[i].size = last_bank_size;
  1279. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1280. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1281. ((unsigned long)(
  1282. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1283. link_desc_align));
  1284. soc->link_desc_banks[i].base_paddr =
  1285. (unsigned long)(
  1286. soc->link_desc_banks[i].base_paddr_unaligned) +
  1287. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1288. (unsigned long)(
  1289. soc->link_desc_banks[i].base_vaddr_unaligned));
  1290. }
  1291. /* Allocate and setup link descriptor idle list for HW internal use */
  1292. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1293. total_mem_size = entry_size * total_link_descs;
  1294. if (total_mem_size <= max_alloc_size) {
  1295. void *desc;
  1296. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1297. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1298. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1299. FL("Link desc idle ring setup failed"));
  1300. goto fail;
  1301. }
  1302. hal_srng_access_start_unlocked(soc->hal_soc,
  1303. soc->wbm_idle_link_ring.hal_srng);
  1304. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1305. soc->link_desc_banks[i].base_paddr; i++) {
  1306. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1307. ((unsigned long)(
  1308. soc->link_desc_banks[i].base_vaddr) -
  1309. (unsigned long)(
  1310. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1311. / link_desc_size;
  1312. unsigned long paddr = (unsigned long)(
  1313. soc->link_desc_banks[i].base_paddr);
  1314. while (num_entries && (desc = hal_srng_src_get_next(
  1315. soc->hal_soc,
  1316. soc->wbm_idle_link_ring.hal_srng))) {
  1317. hal_set_link_desc_addr(desc,
  1318. LINK_DESC_COOKIE(desc_id, i), paddr);
  1319. num_entries--;
  1320. desc_id++;
  1321. paddr += link_desc_size;
  1322. }
  1323. }
  1324. hal_srng_access_end_unlocked(soc->hal_soc,
  1325. soc->wbm_idle_link_ring.hal_srng);
  1326. } else {
  1327. uint32_t num_scatter_bufs;
  1328. uint32_t num_entries_per_buf;
  1329. uint32_t rem_entries;
  1330. uint8_t *scatter_buf_ptr;
  1331. uint16_t scatter_buf_num;
  1332. soc->wbm_idle_scatter_buf_size =
  1333. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1334. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1335. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1336. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1337. soc->hal_soc, total_mem_size,
  1338. soc->wbm_idle_scatter_buf_size);
  1339. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1340. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1341. FL("scatter bufs size out of bounds"));
  1342. goto fail;
  1343. }
  1344. for (i = 0; i < num_scatter_bufs; i++) {
  1345. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1346. qdf_mem_alloc_consistent(soc->osdev,
  1347. soc->osdev->dev,
  1348. soc->wbm_idle_scatter_buf_size,
  1349. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1350. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1351. QDF_TRACE(QDF_MODULE_ID_DP,
  1352. QDF_TRACE_LEVEL_ERROR,
  1353. FL("Scatter list memory alloc failed"));
  1354. goto fail;
  1355. }
  1356. }
  1357. /* Populate idle list scatter buffers with link descriptor
  1358. * pointers
  1359. */
  1360. scatter_buf_num = 0;
  1361. scatter_buf_ptr = (uint8_t *)(
  1362. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1363. rem_entries = num_entries_per_buf;
  1364. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1365. soc->link_desc_banks[i].base_paddr; i++) {
  1366. uint32_t num_link_descs =
  1367. (soc->link_desc_banks[i].size -
  1368. ((unsigned long)(
  1369. soc->link_desc_banks[i].base_vaddr) -
  1370. (unsigned long)(
  1371. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1372. / link_desc_size;
  1373. unsigned long paddr = (unsigned long)(
  1374. soc->link_desc_banks[i].base_paddr);
  1375. while (num_link_descs) {
  1376. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1377. LINK_DESC_COOKIE(desc_id, i), paddr);
  1378. num_link_descs--;
  1379. desc_id++;
  1380. paddr += link_desc_size;
  1381. rem_entries--;
  1382. if (rem_entries) {
  1383. scatter_buf_ptr += entry_size;
  1384. } else {
  1385. rem_entries = num_entries_per_buf;
  1386. scatter_buf_num++;
  1387. if (scatter_buf_num >= num_scatter_bufs)
  1388. break;
  1389. scatter_buf_ptr = (uint8_t *)(
  1390. soc->wbm_idle_scatter_buf_base_vaddr[
  1391. scatter_buf_num]);
  1392. }
  1393. }
  1394. }
  1395. /* Setup link descriptor idle list in HW */
  1396. hal_setup_link_idle_list(soc->hal_soc,
  1397. soc->wbm_idle_scatter_buf_base_paddr,
  1398. soc->wbm_idle_scatter_buf_base_vaddr,
  1399. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1400. (uint32_t)(scatter_buf_ptr -
  1401. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1402. scatter_buf_num-1])), total_link_descs);
  1403. }
  1404. return 0;
  1405. fail:
  1406. if (soc->wbm_idle_link_ring.hal_srng) {
  1407. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1408. WBM_IDLE_LINK, 0);
  1409. }
  1410. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1411. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1412. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1413. soc->wbm_idle_scatter_buf_size,
  1414. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1415. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1416. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1417. }
  1418. }
  1419. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1420. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1421. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1422. soc->link_desc_banks[i].size,
  1423. soc->link_desc_banks[i].base_vaddr_unaligned,
  1424. soc->link_desc_banks[i].base_paddr_unaligned,
  1425. 0);
  1426. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1427. }
  1428. }
  1429. return QDF_STATUS_E_FAILURE;
  1430. }
  1431. /*
  1432. * Free link descriptor pool that was setup HW
  1433. */
  1434. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1435. {
  1436. int i;
  1437. if (soc->wbm_idle_link_ring.hal_srng) {
  1438. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1439. WBM_IDLE_LINK, 0);
  1440. }
  1441. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1442. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1443. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1444. soc->wbm_idle_scatter_buf_size,
  1445. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1446. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1447. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1448. }
  1449. }
  1450. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1451. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1452. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1453. soc->link_desc_banks[i].size,
  1454. soc->link_desc_banks[i].base_vaddr_unaligned,
  1455. soc->link_desc_banks[i].base_paddr_unaligned,
  1456. 0);
  1457. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1458. }
  1459. }
  1460. }
  1461. /* TODO: Following should be configurable */
  1462. #define WBM_RELEASE_RING_SIZE 64
  1463. #define TCL_CMD_RING_SIZE 32
  1464. #define TCL_STATUS_RING_SIZE 32
  1465. #if defined(QCA_WIFI_QCA6290)
  1466. #define REO_DST_RING_SIZE 1024
  1467. #else
  1468. #define REO_DST_RING_SIZE 2048
  1469. #endif
  1470. #define REO_REINJECT_RING_SIZE 32
  1471. #define RX_RELEASE_RING_SIZE 1024
  1472. #define REO_EXCEPTION_RING_SIZE 128
  1473. #define REO_CMD_RING_SIZE 64
  1474. #define REO_STATUS_RING_SIZE 128
  1475. #define RXDMA_BUF_RING_SIZE 1024
  1476. #define RXDMA_REFILL_RING_SIZE 4096
  1477. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1478. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1479. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1480. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1481. #define RXDMA_ERR_DST_RING_SIZE 1024
  1482. /*
  1483. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1484. * @soc: Datapath SOC handle
  1485. *
  1486. * This is a timer function used to age out stale AST nodes from
  1487. * AST table
  1488. */
  1489. #ifdef FEATURE_WDS
  1490. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1491. {
  1492. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1493. struct dp_pdev *pdev;
  1494. struct dp_vdev *vdev;
  1495. struct dp_peer *peer;
  1496. struct dp_ast_entry *ase, *temp_ase;
  1497. int i;
  1498. qdf_spin_lock_bh(&soc->ast_lock);
  1499. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1500. pdev = soc->pdev_list[i];
  1501. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1502. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1503. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1504. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1505. /*
  1506. * Do not expire static ast entries
  1507. * and HM WDS entries
  1508. */
  1509. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1510. continue;
  1511. if (ase->is_active) {
  1512. ase->is_active = FALSE;
  1513. continue;
  1514. }
  1515. DP_STATS_INC(soc, ast.aged_out, 1);
  1516. dp_peer_del_ast(soc, ase);
  1517. }
  1518. }
  1519. }
  1520. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1521. }
  1522. qdf_spin_unlock_bh(&soc->ast_lock);
  1523. if (qdf_atomic_read(&soc->cmn_init_done))
  1524. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1525. }
  1526. /*
  1527. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1528. * @soc: Datapath SOC handle
  1529. *
  1530. * Return: None
  1531. */
  1532. static void dp_soc_wds_attach(struct dp_soc *soc)
  1533. {
  1534. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1535. dp_wds_aging_timer_fn, (void *)soc,
  1536. QDF_TIMER_TYPE_WAKE_APPS);
  1537. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1538. }
  1539. /*
  1540. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1541. * @txrx_soc: DP SOC handle
  1542. *
  1543. * Return: None
  1544. */
  1545. static void dp_soc_wds_detach(struct dp_soc *soc)
  1546. {
  1547. qdf_timer_stop(&soc->wds_aging_timer);
  1548. qdf_timer_free(&soc->wds_aging_timer);
  1549. }
  1550. #else
  1551. static void dp_soc_wds_attach(struct dp_soc *soc)
  1552. {
  1553. }
  1554. static void dp_soc_wds_detach(struct dp_soc *soc)
  1555. {
  1556. }
  1557. #endif
  1558. /*
  1559. * dp_soc_reset_ring_map() - Reset cpu ring map
  1560. * @soc: Datapath soc handler
  1561. *
  1562. * This api resets the default cpu ring map
  1563. */
  1564. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1565. {
  1566. uint8_t i;
  1567. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1568. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1569. if (nss_config == 1) {
  1570. /*
  1571. * Setting Tx ring map for one nss offloaded radio
  1572. */
  1573. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1574. } else if (nss_config == 2) {
  1575. /*
  1576. * Setting Tx ring for two nss offloaded radios
  1577. */
  1578. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1579. } else {
  1580. /*
  1581. * Setting Tx ring map for all nss offloaded radios
  1582. */
  1583. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1584. }
  1585. }
  1586. }
  1587. /*
  1588. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1589. * @dp_soc - DP soc handle
  1590. * @ring_type - ring type
  1591. * @ring_num - ring_num
  1592. *
  1593. * return 0 or 1
  1594. */
  1595. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1596. {
  1597. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1598. uint8_t status = 0;
  1599. switch (ring_type) {
  1600. case WBM2SW_RELEASE:
  1601. case REO_DST:
  1602. case RXDMA_BUF:
  1603. status = ((nss_config) & (1 << ring_num));
  1604. break;
  1605. default:
  1606. break;
  1607. }
  1608. return status;
  1609. }
  1610. /*
  1611. * dp_soc_reset_intr_mask() - reset interrupt mask
  1612. * @dp_soc - DP Soc handle
  1613. *
  1614. * Return: Return void
  1615. */
  1616. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1617. {
  1618. uint8_t j;
  1619. int *grp_mask = NULL;
  1620. int group_number, mask, num_ring;
  1621. /* number of tx ring */
  1622. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1623. /*
  1624. * group mask for tx completion ring.
  1625. */
  1626. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1627. /* loop and reset the mask for only offloaded ring */
  1628. for (j = 0; j < num_ring; j++) {
  1629. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1630. continue;
  1631. }
  1632. /*
  1633. * Group number corresponding to tx offloaded ring.
  1634. */
  1635. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1636. if (group_number < 0) {
  1637. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1638. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1639. WBM2SW_RELEASE, j);
  1640. return;
  1641. }
  1642. /* reset the tx mask for offloaded ring */
  1643. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1644. mask &= (~(1 << j));
  1645. /*
  1646. * reset the interrupt mask for offloaded ring.
  1647. */
  1648. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1649. }
  1650. /* number of rx rings */
  1651. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1652. /*
  1653. * group mask for reo destination ring.
  1654. */
  1655. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1656. /* loop and reset the mask for only offloaded ring */
  1657. for (j = 0; j < num_ring; j++) {
  1658. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1659. continue;
  1660. }
  1661. /*
  1662. * Group number corresponding to rx offloaded ring.
  1663. */
  1664. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1665. if (group_number < 0) {
  1666. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1667. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1668. REO_DST, j);
  1669. return;
  1670. }
  1671. /* set the interrupt mask for offloaded ring */
  1672. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1673. mask &= (~(1 << j));
  1674. /*
  1675. * set the interrupt mask to zero for rx offloaded radio.
  1676. */
  1677. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1678. }
  1679. /*
  1680. * group mask for Rx buffer refill ring
  1681. */
  1682. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1683. /* loop and reset the mask for only offloaded ring */
  1684. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1685. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1686. continue;
  1687. }
  1688. /*
  1689. * Group number corresponding to rx offloaded ring.
  1690. */
  1691. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1692. if (group_number < 0) {
  1693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1694. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1695. REO_DST, j);
  1696. return;
  1697. }
  1698. /* set the interrupt mask for offloaded ring */
  1699. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1700. group_number);
  1701. mask &= (~(1 << j));
  1702. /*
  1703. * set the interrupt mask to zero for rx offloaded radio.
  1704. */
  1705. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1706. group_number, mask);
  1707. }
  1708. }
  1709. #ifdef IPA_OFFLOAD
  1710. /**
  1711. * dp_reo_remap_config() - configure reo remap register value based
  1712. * nss configuration.
  1713. * based on offload_radio value below remap configuration
  1714. * get applied.
  1715. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1716. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1717. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1718. * 3 - both Radios handled by NSS (remap not required)
  1719. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1720. *
  1721. * @remap1: output parameter indicates reo remap 1 register value
  1722. * @remap2: output parameter indicates reo remap 2 register value
  1723. * Return: bool type, true if remap is configured else false.
  1724. */
  1725. static bool dp_reo_remap_config(struct dp_soc *soc,
  1726. uint32_t *remap1,
  1727. uint32_t *remap2)
  1728. {
  1729. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1730. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1731. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1732. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1733. return true;
  1734. }
  1735. #else
  1736. static bool dp_reo_remap_config(struct dp_soc *soc,
  1737. uint32_t *remap1,
  1738. uint32_t *remap2)
  1739. {
  1740. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1741. switch (offload_radio) {
  1742. case 0:
  1743. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1744. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1745. (0x3 << 18) | (0x4 << 21)) << 8;
  1746. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1747. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1748. (0x3 << 18) | (0x4 << 21)) << 8;
  1749. break;
  1750. case 1:
  1751. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1752. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1753. (0x2 << 18) | (0x3 << 21)) << 8;
  1754. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1755. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1756. (0x4 << 18) | (0x2 << 21)) << 8;
  1757. break;
  1758. case 2:
  1759. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1760. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1761. (0x1 << 18) | (0x3 << 21)) << 8;
  1762. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1763. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1764. (0x4 << 18) | (0x1 << 21)) << 8;
  1765. break;
  1766. case 3:
  1767. /* return false if both radios are offloaded to NSS */
  1768. return false;
  1769. }
  1770. return true;
  1771. }
  1772. #endif
  1773. /*
  1774. * dp_reo_frag_dst_set() - configure reo register to set the
  1775. * fragment destination ring
  1776. * @soc : Datapath soc
  1777. * @frag_dst_ring : output parameter to set fragment destination ring
  1778. *
  1779. * Based on offload_radio below fragment destination rings is selected
  1780. * 0 - TCL
  1781. * 1 - SW1
  1782. * 2 - SW2
  1783. * 3 - SW3
  1784. * 4 - SW4
  1785. * 5 - Release
  1786. * 6 - FW
  1787. * 7 - alternate select
  1788. *
  1789. * return: void
  1790. */
  1791. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1792. {
  1793. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1794. switch (offload_radio) {
  1795. case 0:
  1796. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1797. break;
  1798. case 3:
  1799. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1800. break;
  1801. default:
  1802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1803. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1804. break;
  1805. }
  1806. }
  1807. /*
  1808. * dp_soc_cmn_setup() - Common SoC level initializion
  1809. * @soc: Datapath SOC handle
  1810. *
  1811. * This is an internal function used to setup common SOC data structures,
  1812. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1813. */
  1814. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1815. {
  1816. int i;
  1817. struct hal_reo_params reo_params;
  1818. int tx_ring_size;
  1819. int tx_comp_ring_size;
  1820. if (qdf_atomic_read(&soc->cmn_init_done))
  1821. return 0;
  1822. if (dp_hw_link_desc_pool_setup(soc))
  1823. goto fail1;
  1824. /* Setup SRNG rings */
  1825. /* Common rings */
  1826. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1827. WBM_RELEASE_RING_SIZE)) {
  1828. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1829. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1830. goto fail1;
  1831. }
  1832. soc->num_tcl_data_rings = 0;
  1833. /* Tx data rings */
  1834. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1835. soc->num_tcl_data_rings =
  1836. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1837. tx_comp_ring_size =
  1838. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1839. tx_ring_size =
  1840. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1841. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1842. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1843. TCL_DATA, i, 0, tx_ring_size)) {
  1844. QDF_TRACE(QDF_MODULE_ID_DP,
  1845. QDF_TRACE_LEVEL_ERROR,
  1846. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1847. goto fail1;
  1848. }
  1849. /*
  1850. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1851. * count
  1852. */
  1853. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1854. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1855. QDF_TRACE(QDF_MODULE_ID_DP,
  1856. QDF_TRACE_LEVEL_ERROR,
  1857. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1858. goto fail1;
  1859. }
  1860. }
  1861. } else {
  1862. /* This will be incremented during per pdev ring setup */
  1863. soc->num_tcl_data_rings = 0;
  1864. }
  1865. if (dp_tx_soc_attach(soc)) {
  1866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1867. FL("dp_tx_soc_attach failed"));
  1868. goto fail1;
  1869. }
  1870. /* TCL command and status rings */
  1871. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1872. TCL_CMD_RING_SIZE)) {
  1873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1874. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1875. goto fail1;
  1876. }
  1877. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1878. TCL_STATUS_RING_SIZE)) {
  1879. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1880. FL("dp_srng_setup failed for tcl_status_ring"));
  1881. goto fail1;
  1882. }
  1883. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1884. * descriptors
  1885. */
  1886. /* Rx data rings */
  1887. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1888. soc->num_reo_dest_rings =
  1889. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1890. QDF_TRACE(QDF_MODULE_ID_DP,
  1891. QDF_TRACE_LEVEL_ERROR,
  1892. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1893. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1894. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1895. i, 0, REO_DST_RING_SIZE)) {
  1896. QDF_TRACE(QDF_MODULE_ID_DP,
  1897. QDF_TRACE_LEVEL_ERROR,
  1898. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1899. goto fail1;
  1900. }
  1901. }
  1902. } else {
  1903. /* This will be incremented during per pdev ring setup */
  1904. soc->num_reo_dest_rings = 0;
  1905. }
  1906. /* LMAC RxDMA to SW Rings configuration */
  1907. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1908. /* Only valid for MCL */
  1909. struct dp_pdev *pdev = soc->pdev_list[0];
  1910. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1911. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1912. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1913. QDF_TRACE(QDF_MODULE_ID_DP,
  1914. QDF_TRACE_LEVEL_ERROR,
  1915. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1916. goto fail1;
  1917. }
  1918. }
  1919. }
  1920. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1921. /* REO reinjection ring */
  1922. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1923. REO_REINJECT_RING_SIZE)) {
  1924. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1925. FL("dp_srng_setup failed for reo_reinject_ring"));
  1926. goto fail1;
  1927. }
  1928. /* Rx release ring */
  1929. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1930. RX_RELEASE_RING_SIZE)) {
  1931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1932. FL("dp_srng_setup failed for rx_rel_ring"));
  1933. goto fail1;
  1934. }
  1935. /* Rx exception ring */
  1936. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1937. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1939. FL("dp_srng_setup failed for reo_exception_ring"));
  1940. goto fail1;
  1941. }
  1942. /* REO command and status rings */
  1943. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1944. REO_CMD_RING_SIZE)) {
  1945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1946. FL("dp_srng_setup failed for reo_cmd_ring"));
  1947. goto fail1;
  1948. }
  1949. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1950. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1951. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1952. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1953. REO_STATUS_RING_SIZE)) {
  1954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1955. FL("dp_srng_setup failed for reo_status_ring"));
  1956. goto fail1;
  1957. }
  1958. qdf_spinlock_create(&soc->ast_lock);
  1959. dp_soc_wds_attach(soc);
  1960. /* Reset the cpu ring map if radio is NSS offloaded */
  1961. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1962. dp_soc_reset_cpu_ring_map(soc);
  1963. dp_soc_reset_intr_mask(soc);
  1964. }
  1965. /* Setup HW REO */
  1966. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1967. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1968. /*
  1969. * Reo ring remap is not required if both radios
  1970. * are offloaded to NSS
  1971. */
  1972. if (!dp_reo_remap_config(soc,
  1973. &reo_params.remap1,
  1974. &reo_params.remap2))
  1975. goto out;
  1976. reo_params.rx_hash_enabled = true;
  1977. }
  1978. /* setup the global rx defrag waitlist */
  1979. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1980. soc->rx.defrag.timeout_ms =
  1981. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1982. soc->rx.flags.defrag_timeout_check =
  1983. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1984. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  1985. out:
  1986. /*
  1987. * set the fragment destination ring
  1988. */
  1989. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1990. hal_reo_setup(soc->hal_soc, &reo_params);
  1991. qdf_atomic_set(&soc->cmn_init_done, 1);
  1992. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1993. return 0;
  1994. fail1:
  1995. /*
  1996. * Cleanup will be done as part of soc_detach, which will
  1997. * be called on pdev attach failure
  1998. */
  1999. return QDF_STATUS_E_FAILURE;
  2000. }
  2001. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2002. static void dp_lro_hash_setup(struct dp_soc *soc)
  2003. {
  2004. struct cdp_lro_hash_config lro_hash;
  2005. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2006. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2008. FL("LRO disabled RX hash disabled"));
  2009. return;
  2010. }
  2011. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2012. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2013. lro_hash.lro_enable = 1;
  2014. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2015. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2016. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2017. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2018. }
  2019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2020. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2021. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2022. LRO_IPV4_SEED_ARR_SZ));
  2023. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2024. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2025. LRO_IPV6_SEED_ARR_SZ));
  2026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2027. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2028. lro_hash.lro_enable, lro_hash.tcp_flag,
  2029. lro_hash.tcp_flag_mask);
  2030. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2031. QDF_TRACE_LEVEL_ERROR,
  2032. (void *)lro_hash.toeplitz_hash_ipv4,
  2033. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2034. LRO_IPV4_SEED_ARR_SZ));
  2035. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2036. QDF_TRACE_LEVEL_ERROR,
  2037. (void *)lro_hash.toeplitz_hash_ipv6,
  2038. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2039. LRO_IPV6_SEED_ARR_SZ));
  2040. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2041. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2042. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2043. (soc->ctrl_psoc, &lro_hash);
  2044. }
  2045. /*
  2046. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2047. * @soc: data path SoC handle
  2048. * @pdev: Physical device handle
  2049. *
  2050. * Return: 0 - success, > 0 - failure
  2051. */
  2052. #ifdef QCA_HOST2FW_RXBUF_RING
  2053. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2054. struct dp_pdev *pdev)
  2055. {
  2056. int max_mac_rings =
  2057. wlan_cfg_get_num_mac_rings
  2058. (pdev->wlan_cfg_ctx);
  2059. int i;
  2060. for (i = 0; i < max_mac_rings; i++) {
  2061. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2062. "%s: pdev_id %d mac_id %d\n",
  2063. __func__, pdev->pdev_id, i);
  2064. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2065. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2066. QDF_TRACE(QDF_MODULE_ID_DP,
  2067. QDF_TRACE_LEVEL_ERROR,
  2068. FL("failed rx mac ring setup"));
  2069. return QDF_STATUS_E_FAILURE;
  2070. }
  2071. }
  2072. return QDF_STATUS_SUCCESS;
  2073. }
  2074. #else
  2075. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2076. struct dp_pdev *pdev)
  2077. {
  2078. return QDF_STATUS_SUCCESS;
  2079. }
  2080. #endif
  2081. /**
  2082. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2083. * @pdev - DP_PDEV handle
  2084. *
  2085. * Return: void
  2086. */
  2087. static inline void
  2088. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2089. {
  2090. uint8_t map_id;
  2091. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2092. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2093. sizeof(default_dscp_tid_map));
  2094. }
  2095. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2096. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2097. pdev->dscp_tid_map[map_id],
  2098. map_id);
  2099. }
  2100. }
  2101. #ifdef QCA_SUPPORT_SON
  2102. /**
  2103. * dp_mark_peer_inact(): Update peer inactivity status
  2104. * @peer_handle - datapath peer handle
  2105. *
  2106. * Return: void
  2107. */
  2108. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2109. {
  2110. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2111. struct dp_pdev *pdev;
  2112. struct dp_soc *soc;
  2113. bool inactive_old;
  2114. if (!peer)
  2115. return;
  2116. pdev = peer->vdev->pdev;
  2117. soc = pdev->soc;
  2118. inactive_old = peer->peer_bs_inact_flag == 1;
  2119. if (!inactive)
  2120. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2121. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2122. if (inactive_old != inactive) {
  2123. /**
  2124. * Note: a node lookup can happen in RX datapath context
  2125. * when a node changes from inactive to active (at most once
  2126. * per inactivity timeout threshold)
  2127. */
  2128. if (soc->cdp_soc.ol_ops->record_act_change) {
  2129. soc->cdp_soc.ol_ops->record_act_change(
  2130. (void *)pdev->ctrl_pdev,
  2131. peer->mac_addr.raw, !inactive);
  2132. }
  2133. }
  2134. }
  2135. /**
  2136. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2137. *
  2138. * Periodically checks the inactivity status
  2139. */
  2140. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2141. {
  2142. struct dp_pdev *pdev;
  2143. struct dp_vdev *vdev;
  2144. struct dp_peer *peer;
  2145. struct dp_soc *soc;
  2146. int i;
  2147. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2148. qdf_spin_lock(&soc->peer_ref_mutex);
  2149. for (i = 0; i < soc->pdev_count; i++) {
  2150. pdev = soc->pdev_list[i];
  2151. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2152. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2153. if (vdev->opmode != wlan_op_mode_ap)
  2154. continue;
  2155. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2156. if (!peer->authorize) {
  2157. /**
  2158. * Inactivity check only interested in
  2159. * connected node
  2160. */
  2161. continue;
  2162. }
  2163. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2164. /**
  2165. * This check ensures we do not wait extra long
  2166. * due to the potential race condition
  2167. */
  2168. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2169. }
  2170. if (peer->peer_bs_inact > 0) {
  2171. /* Do not let it wrap around */
  2172. peer->peer_bs_inact--;
  2173. }
  2174. if (peer->peer_bs_inact == 0)
  2175. dp_mark_peer_inact(peer, true);
  2176. }
  2177. }
  2178. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2179. }
  2180. qdf_spin_unlock(&soc->peer_ref_mutex);
  2181. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2182. soc->pdev_bs_inact_interval * 1000);
  2183. }
  2184. /**
  2185. * dp_free_inact_timer(): free inact timer
  2186. * @timer - inact timer handle
  2187. *
  2188. * Return: bool
  2189. */
  2190. void dp_free_inact_timer(struct dp_soc *soc)
  2191. {
  2192. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2193. }
  2194. #else
  2195. void dp_mark_peer_inact(void *peer, bool inactive)
  2196. {
  2197. return;
  2198. }
  2199. void dp_free_inact_timer(struct dp_soc *soc)
  2200. {
  2201. return;
  2202. }
  2203. #endif
  2204. #ifdef IPA_OFFLOAD
  2205. /**
  2206. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2207. * @soc: data path instance
  2208. * @pdev: core txrx pdev context
  2209. *
  2210. * Return: QDF_STATUS_SUCCESS: success
  2211. * QDF_STATUS_E_RESOURCES: Error return
  2212. */
  2213. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2214. struct dp_pdev *pdev)
  2215. {
  2216. /* Setup second Rx refill buffer ring */
  2217. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2218. IPA_RX_REFILL_BUF_RING_IDX,
  2219. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2220. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2221. FL("dp_srng_setup failed second rx refill ring"));
  2222. return QDF_STATUS_E_FAILURE;
  2223. }
  2224. return QDF_STATUS_SUCCESS;
  2225. }
  2226. /**
  2227. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2228. * @soc: data path instance
  2229. * @pdev: core txrx pdev context
  2230. *
  2231. * Return: void
  2232. */
  2233. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2234. struct dp_pdev *pdev)
  2235. {
  2236. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2237. IPA_RX_REFILL_BUF_RING_IDX);
  2238. }
  2239. #else
  2240. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2241. struct dp_pdev *pdev)
  2242. {
  2243. return QDF_STATUS_SUCCESS;
  2244. }
  2245. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2246. struct dp_pdev *pdev)
  2247. {
  2248. }
  2249. #endif
  2250. /*
  2251. * dp_pdev_attach_wifi3() - attach txrx pdev
  2252. * @ctrl_pdev: Opaque PDEV object
  2253. * @txrx_soc: Datapath SOC handle
  2254. * @htc_handle: HTC handle for host-target interface
  2255. * @qdf_osdev: QDF OS device
  2256. * @pdev_id: PDEV ID
  2257. *
  2258. * Return: DP PDEV handle on success, NULL on failure
  2259. */
  2260. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2261. struct cdp_ctrl_objmgr_pdev *ctrl_pdev,
  2262. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2263. {
  2264. int tx_ring_size;
  2265. int tx_comp_ring_size;
  2266. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2267. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2268. int mac_id;
  2269. if (!pdev) {
  2270. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2271. FL("DP PDEV memory allocation failed"));
  2272. goto fail0;
  2273. }
  2274. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2275. if (!pdev->wlan_cfg_ctx) {
  2276. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2277. FL("pdev cfg_attach failed"));
  2278. qdf_mem_free(pdev);
  2279. goto fail0;
  2280. }
  2281. /*
  2282. * set nss pdev config based on soc config
  2283. */
  2284. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2285. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2286. pdev->soc = soc;
  2287. pdev->ctrl_pdev = ctrl_pdev;
  2288. pdev->pdev_id = pdev_id;
  2289. soc->pdev_list[pdev_id] = pdev;
  2290. soc->pdev_count++;
  2291. TAILQ_INIT(&pdev->vdev_list);
  2292. qdf_spinlock_create(&pdev->vdev_list_lock);
  2293. pdev->vdev_count = 0;
  2294. qdf_spinlock_create(&pdev->tx_mutex);
  2295. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2296. TAILQ_INIT(&pdev->neighbour_peers_list);
  2297. if (dp_soc_cmn_setup(soc)) {
  2298. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2299. FL("dp_soc_cmn_setup failed"));
  2300. goto fail1;
  2301. }
  2302. /* Setup per PDEV TCL rings if configured */
  2303. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2304. tx_ring_size =
  2305. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2306. tx_comp_ring_size =
  2307. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2308. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2309. pdev_id, pdev_id, tx_ring_size)) {
  2310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2311. FL("dp_srng_setup failed for tcl_data_ring"));
  2312. goto fail1;
  2313. }
  2314. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2315. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2317. FL("dp_srng_setup failed for tx_comp_ring"));
  2318. goto fail1;
  2319. }
  2320. soc->num_tcl_data_rings++;
  2321. }
  2322. /* Tx specific init */
  2323. if (dp_tx_pdev_attach(pdev)) {
  2324. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2325. FL("dp_tx_pdev_attach failed"));
  2326. goto fail1;
  2327. }
  2328. /* Setup per PDEV REO rings if configured */
  2329. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2330. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2331. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2332. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2333. FL("dp_srng_setup failed for reo_dest_ringn"));
  2334. goto fail1;
  2335. }
  2336. soc->num_reo_dest_rings++;
  2337. }
  2338. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2339. RXDMA_REFILL_RING_SIZE)) {
  2340. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2341. FL("dp_srng_setup failed rx refill ring"));
  2342. goto fail1;
  2343. }
  2344. if (dp_rxdma_ring_setup(soc, pdev)) {
  2345. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2346. FL("RXDMA ring config failed"));
  2347. goto fail1;
  2348. }
  2349. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2350. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2351. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2352. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2353. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2355. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2356. goto fail1;
  2357. }
  2358. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2359. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2360. RXDMA_MONITOR_DST_RING_SIZE)) {
  2361. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2362. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2363. goto fail1;
  2364. }
  2365. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2366. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2367. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2368. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2369. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2370. goto fail1;
  2371. }
  2372. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2373. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2374. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2375. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2376. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2377. goto fail1;
  2378. }
  2379. }
  2380. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2381. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2382. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2383. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2384. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2385. goto fail1;
  2386. }
  2387. }
  2388. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2389. goto fail1;
  2390. if (dp_ipa_ring_resource_setup(soc, pdev))
  2391. goto fail1;
  2392. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2393. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2394. FL("dp_ipa_uc_attach failed"));
  2395. goto fail1;
  2396. }
  2397. /* Rx specific init */
  2398. if (dp_rx_pdev_attach(pdev)) {
  2399. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2400. FL("dp_rx_pdev_attach failed"));
  2401. goto fail0;
  2402. }
  2403. DP_STATS_INIT(pdev);
  2404. /* Monitor filter init */
  2405. pdev->mon_filter_mode = MON_FILTER_ALL;
  2406. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2407. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2408. pdev->fp_data_filter = FILTER_DATA_ALL;
  2409. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2410. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2411. pdev->mo_data_filter = FILTER_DATA_ALL;
  2412. dp_local_peer_id_pool_init(pdev);
  2413. dp_dscp_tid_map_setup(pdev);
  2414. /* Rx monitor mode specific init */
  2415. if (dp_rx_pdev_mon_attach(pdev)) {
  2416. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2417. "dp_rx_pdev_attach failed\n");
  2418. goto fail1;
  2419. }
  2420. if (dp_wdi_event_attach(pdev)) {
  2421. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2422. "dp_wdi_evet_attach failed\n");
  2423. goto fail1;
  2424. }
  2425. /* set the reo destination during initialization */
  2426. pdev->reo_dest = pdev->pdev_id + 1;
  2427. /*
  2428. * initialize ppdu tlv list
  2429. */
  2430. TAILQ_INIT(&pdev->ppdu_info_list);
  2431. pdev->tlv_count = 0;
  2432. pdev->list_depth = 0;
  2433. return (struct cdp_pdev *)pdev;
  2434. fail1:
  2435. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2436. fail0:
  2437. return NULL;
  2438. }
  2439. /*
  2440. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2441. * @soc: data path SoC handle
  2442. * @pdev: Physical device handle
  2443. *
  2444. * Return: void
  2445. */
  2446. #ifdef QCA_HOST2FW_RXBUF_RING
  2447. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2448. struct dp_pdev *pdev)
  2449. {
  2450. int max_mac_rings =
  2451. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2452. int i;
  2453. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2454. max_mac_rings : MAX_RX_MAC_RINGS;
  2455. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2456. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2457. RXDMA_BUF, 1);
  2458. qdf_timer_free(&soc->mon_reap_timer);
  2459. }
  2460. #else
  2461. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2462. struct dp_pdev *pdev)
  2463. {
  2464. }
  2465. #endif
  2466. /*
  2467. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2468. * @pdev: device object
  2469. *
  2470. * Return: void
  2471. */
  2472. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2473. {
  2474. struct dp_neighbour_peer *peer = NULL;
  2475. struct dp_neighbour_peer *temp_peer = NULL;
  2476. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2477. neighbour_peer_list_elem, temp_peer) {
  2478. /* delete this peer from the list */
  2479. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2480. peer, neighbour_peer_list_elem);
  2481. qdf_mem_free(peer);
  2482. }
  2483. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2484. }
  2485. /**
  2486. * dp_htt_ppdu_stats_detach() - detach stats resources
  2487. * @pdev: Datapath PDEV handle
  2488. *
  2489. * Return: void
  2490. */
  2491. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2492. {
  2493. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2494. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2495. ppdu_info_list_elem, ppdu_info_next) {
  2496. if (!ppdu_info)
  2497. break;
  2498. qdf_assert_always(ppdu_info->nbuf);
  2499. qdf_nbuf_free(ppdu_info->nbuf);
  2500. qdf_mem_free(ppdu_info);
  2501. }
  2502. }
  2503. /*
  2504. * dp_pdev_detach_wifi3() - detach txrx pdev
  2505. * @txrx_pdev: Datapath PDEV handle
  2506. * @force: Force detach
  2507. *
  2508. */
  2509. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2510. {
  2511. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2512. struct dp_soc *soc = pdev->soc;
  2513. qdf_nbuf_t curr_nbuf, next_nbuf;
  2514. int mac_id;
  2515. dp_wdi_event_detach(pdev);
  2516. dp_tx_pdev_detach(pdev);
  2517. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2518. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2519. TCL_DATA, pdev->pdev_id);
  2520. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2521. WBM2SW_RELEASE, pdev->pdev_id);
  2522. }
  2523. dp_pktlogmod_exit(pdev);
  2524. dp_rx_pdev_detach(pdev);
  2525. dp_rx_pdev_mon_detach(pdev);
  2526. dp_neighbour_peers_detach(pdev);
  2527. qdf_spinlock_destroy(&pdev->tx_mutex);
  2528. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2529. dp_ipa_uc_detach(soc, pdev);
  2530. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2531. /* Cleanup per PDEV REO rings if configured */
  2532. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2533. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2534. REO_DST, pdev->pdev_id);
  2535. }
  2536. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2537. dp_rxdma_ring_cleanup(soc, pdev);
  2538. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2539. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2540. RXDMA_MONITOR_BUF, 0);
  2541. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2542. RXDMA_MONITOR_DST, 0);
  2543. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2544. RXDMA_MONITOR_STATUS, 0);
  2545. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2546. RXDMA_MONITOR_DESC, 0);
  2547. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2548. RXDMA_DST, 0);
  2549. }
  2550. curr_nbuf = pdev->invalid_peer_head_msdu;
  2551. while (curr_nbuf) {
  2552. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2553. qdf_nbuf_free(curr_nbuf);
  2554. curr_nbuf = next_nbuf;
  2555. }
  2556. dp_htt_ppdu_stats_detach(pdev);
  2557. soc->pdev_list[pdev->pdev_id] = NULL;
  2558. soc->pdev_count--;
  2559. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2560. qdf_mem_free(pdev->dp_txrx_handle);
  2561. qdf_mem_free(pdev);
  2562. }
  2563. /*
  2564. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2565. * @soc: DP SOC handle
  2566. */
  2567. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2568. {
  2569. struct reo_desc_list_node *desc;
  2570. struct dp_rx_tid *rx_tid;
  2571. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2572. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2573. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2574. rx_tid = &desc->rx_tid;
  2575. qdf_mem_unmap_nbytes_single(soc->osdev,
  2576. rx_tid->hw_qdesc_paddr,
  2577. QDF_DMA_BIDIRECTIONAL,
  2578. rx_tid->hw_qdesc_alloc_size);
  2579. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2580. qdf_mem_free(desc);
  2581. }
  2582. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2583. qdf_list_destroy(&soc->reo_desc_freelist);
  2584. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2585. }
  2586. /*
  2587. * dp_soc_detach_wifi3() - Detach txrx SOC
  2588. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2589. */
  2590. static void dp_soc_detach_wifi3(void *txrx_soc)
  2591. {
  2592. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2593. int i;
  2594. qdf_atomic_set(&soc->cmn_init_done, 0);
  2595. qdf_flush_work(&soc->htt_stats.work);
  2596. qdf_disable_work(&soc->htt_stats.work);
  2597. /* Free pending htt stats messages */
  2598. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2599. dp_free_inact_timer(soc);
  2600. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2601. if (soc->pdev_list[i])
  2602. dp_pdev_detach_wifi3(
  2603. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2604. }
  2605. dp_peer_find_detach(soc);
  2606. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2607. * SW descriptors
  2608. */
  2609. /* Free the ring memories */
  2610. /* Common rings */
  2611. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2612. dp_tx_soc_detach(soc);
  2613. /* Tx data rings */
  2614. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2615. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2616. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2617. TCL_DATA, i);
  2618. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2619. WBM2SW_RELEASE, i);
  2620. }
  2621. }
  2622. /* TCL command and status rings */
  2623. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2624. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2625. /* Rx data rings */
  2626. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2627. soc->num_reo_dest_rings =
  2628. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2629. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2630. /* TODO: Get number of rings and ring sizes
  2631. * from wlan_cfg
  2632. */
  2633. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2634. REO_DST, i);
  2635. }
  2636. }
  2637. /* REO reinjection ring */
  2638. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2639. /* Rx release ring */
  2640. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2641. /* Rx exception ring */
  2642. /* TODO: Better to store ring_type and ring_num in
  2643. * dp_srng during setup
  2644. */
  2645. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2646. /* REO command and status rings */
  2647. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2648. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2649. dp_hw_link_desc_pool_cleanup(soc);
  2650. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2651. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2652. htt_soc_detach(soc->htt_handle);
  2653. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2654. dp_reo_cmdlist_destroy(soc);
  2655. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2656. dp_reo_desc_freelist_destroy(soc);
  2657. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2658. dp_soc_wds_detach(soc);
  2659. qdf_spinlock_destroy(&soc->ast_lock);
  2660. qdf_mem_free(soc);
  2661. }
  2662. /*
  2663. * dp_rxdma_ring_config() - configure the RX DMA rings
  2664. *
  2665. * This function is used to configure the MAC rings.
  2666. * On MCL host provides buffers in Host2FW ring
  2667. * FW refills (copies) buffers to the ring and updates
  2668. * ring_idx in register
  2669. *
  2670. * @soc: data path SoC handle
  2671. *
  2672. * Return: void
  2673. */
  2674. #ifdef QCA_HOST2FW_RXBUF_RING
  2675. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2676. {
  2677. int i;
  2678. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2679. struct dp_pdev *pdev = soc->pdev_list[i];
  2680. if (pdev) {
  2681. int mac_id;
  2682. bool dbs_enable = 0;
  2683. int max_mac_rings =
  2684. wlan_cfg_get_num_mac_rings
  2685. (pdev->wlan_cfg_ctx);
  2686. htt_srng_setup(soc->htt_handle, 0,
  2687. pdev->rx_refill_buf_ring.hal_srng,
  2688. RXDMA_BUF);
  2689. if (pdev->rx_refill_buf_ring2.hal_srng)
  2690. htt_srng_setup(soc->htt_handle, 0,
  2691. pdev->rx_refill_buf_ring2.hal_srng,
  2692. RXDMA_BUF);
  2693. if (soc->cdp_soc.ol_ops->
  2694. is_hw_dbs_2x2_capable) {
  2695. dbs_enable = soc->cdp_soc.ol_ops->
  2696. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2697. }
  2698. if (dbs_enable) {
  2699. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2700. QDF_TRACE_LEVEL_ERROR,
  2701. FL("DBS enabled max_mac_rings %d\n"),
  2702. max_mac_rings);
  2703. } else {
  2704. max_mac_rings = 1;
  2705. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2706. QDF_TRACE_LEVEL_ERROR,
  2707. FL("DBS disabled, max_mac_rings %d\n"),
  2708. max_mac_rings);
  2709. }
  2710. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2711. FL("pdev_id %d max_mac_rings %d\n"),
  2712. pdev->pdev_id, max_mac_rings);
  2713. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2714. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2715. mac_id, pdev->pdev_id);
  2716. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2717. QDF_TRACE_LEVEL_ERROR,
  2718. FL("mac_id %d\n"), mac_for_pdev);
  2719. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2720. pdev->rx_mac_buf_ring[mac_id]
  2721. .hal_srng,
  2722. RXDMA_BUF);
  2723. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2724. pdev->rxdma_err_dst_ring[mac_id]
  2725. .hal_srng,
  2726. RXDMA_DST);
  2727. /* Configure monitor mode rings */
  2728. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2729. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2730. RXDMA_MONITOR_BUF);
  2731. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2732. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2733. RXDMA_MONITOR_DST);
  2734. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2735. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2736. RXDMA_MONITOR_STATUS);
  2737. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2738. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2739. RXDMA_MONITOR_DESC);
  2740. }
  2741. }
  2742. }
  2743. /*
  2744. * Timer to reap rxdma status rings.
  2745. * Needed until we enable ppdu end interrupts
  2746. */
  2747. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2748. dp_service_mon_rings, (void *)soc,
  2749. QDF_TIMER_TYPE_WAKE_APPS);
  2750. soc->reap_timer_init = 1;
  2751. }
  2752. #else
  2753. /* This is only for WIN */
  2754. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2755. {
  2756. int i;
  2757. int mac_id;
  2758. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2759. struct dp_pdev *pdev = soc->pdev_list[i];
  2760. if (pdev == NULL)
  2761. continue;
  2762. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2763. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2764. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2765. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2766. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2767. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2768. RXDMA_MONITOR_BUF);
  2769. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2770. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2771. RXDMA_MONITOR_DST);
  2772. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2773. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2774. RXDMA_MONITOR_STATUS);
  2775. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2776. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2777. RXDMA_MONITOR_DESC);
  2778. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2779. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2780. RXDMA_DST);
  2781. }
  2782. }
  2783. }
  2784. #endif
  2785. /*
  2786. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2787. * @txrx_soc: Datapath SOC handle
  2788. */
  2789. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2790. {
  2791. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2792. htt_soc_attach_target(soc->htt_handle);
  2793. dp_rxdma_ring_config(soc);
  2794. DP_STATS_INIT(soc);
  2795. /* initialize work queue for stats processing */
  2796. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2797. return 0;
  2798. }
  2799. /*
  2800. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2801. * @txrx_soc: Datapath SOC handle
  2802. */
  2803. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2804. {
  2805. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2806. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2807. }
  2808. /*
  2809. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2810. * @txrx_soc: Datapath SOC handle
  2811. * @nss_cfg: nss config
  2812. */
  2813. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2814. {
  2815. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2816. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2817. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2818. /*
  2819. * TODO: masked out based on the per offloaded radio
  2820. */
  2821. if (config == dp_nss_cfg_dbdc) {
  2822. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2823. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2824. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2825. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2826. }
  2827. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2828. FL("nss-wifi<0> nss config is enabled"));
  2829. }
  2830. /*
  2831. * dp_vdev_attach_wifi3() - attach txrx vdev
  2832. * @txrx_pdev: Datapath PDEV handle
  2833. * @vdev_mac_addr: MAC address of the virtual interface
  2834. * @vdev_id: VDEV Id
  2835. * @wlan_op_mode: VDEV operating mode
  2836. *
  2837. * Return: DP VDEV handle on success, NULL on failure
  2838. */
  2839. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2840. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2841. {
  2842. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2843. struct dp_soc *soc = pdev->soc;
  2844. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2845. if (!vdev) {
  2846. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2847. FL("DP VDEV memory allocation failed"));
  2848. goto fail0;
  2849. }
  2850. vdev->pdev = pdev;
  2851. vdev->vdev_id = vdev_id;
  2852. vdev->opmode = op_mode;
  2853. vdev->osdev = soc->osdev;
  2854. vdev->osif_rx = NULL;
  2855. vdev->osif_rsim_rx_decap = NULL;
  2856. vdev->osif_get_key = NULL;
  2857. vdev->osif_rx_mon = NULL;
  2858. vdev->osif_tx_free_ext = NULL;
  2859. vdev->osif_vdev = NULL;
  2860. vdev->delete.pending = 0;
  2861. vdev->safemode = 0;
  2862. vdev->drop_unenc = 1;
  2863. vdev->sec_type = cdp_sec_type_none;
  2864. #ifdef notyet
  2865. vdev->filters_num = 0;
  2866. #endif
  2867. qdf_mem_copy(
  2868. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2869. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2870. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2871. vdev->dscp_tid_map_id = 0;
  2872. vdev->mcast_enhancement_en = 0;
  2873. /* TODO: Initialize default HTT meta data that will be used in
  2874. * TCL descriptors for packets transmitted from this VDEV
  2875. */
  2876. TAILQ_INIT(&vdev->peer_list);
  2877. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2878. /* add this vdev into the pdev's list */
  2879. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2880. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2881. pdev->vdev_count++;
  2882. dp_tx_vdev_attach(vdev);
  2883. if ((soc->intr_mode == DP_INTR_POLL) &&
  2884. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2885. if (pdev->vdev_count == 1)
  2886. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2887. }
  2888. dp_lro_hash_setup(soc);
  2889. /* LRO */
  2890. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2891. wlan_op_mode_sta == vdev->opmode)
  2892. vdev->lro_enable = true;
  2893. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2894. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2895. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2896. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2897. DP_STATS_INIT(vdev);
  2898. if (wlan_op_mode_sta == vdev->opmode)
  2899. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2900. vdev->mac_addr.raw, NULL);
  2901. return (struct cdp_vdev *)vdev;
  2902. fail0:
  2903. return NULL;
  2904. }
  2905. /**
  2906. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2907. * @vdev: Datapath VDEV handle
  2908. * @osif_vdev: OSIF vdev handle
  2909. * @txrx_ops: Tx and Rx operations
  2910. *
  2911. * Return: DP VDEV handle on success, NULL on failure
  2912. */
  2913. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2914. void *osif_vdev,
  2915. struct ol_txrx_ops *txrx_ops)
  2916. {
  2917. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2918. vdev->osif_vdev = osif_vdev;
  2919. vdev->osif_rx = txrx_ops->rx.rx;
  2920. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2921. vdev->osif_get_key = txrx_ops->get_key;
  2922. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2923. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2924. #ifdef notyet
  2925. #if ATH_SUPPORT_WAPI
  2926. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2927. #endif
  2928. #endif
  2929. #ifdef UMAC_SUPPORT_PROXY_ARP
  2930. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2931. #endif
  2932. vdev->me_convert = txrx_ops->me_convert;
  2933. /* TODO: Enable the following once Tx code is integrated */
  2934. if (vdev->mesh_vdev)
  2935. txrx_ops->tx.tx = dp_tx_send_mesh;
  2936. else
  2937. txrx_ops->tx.tx = dp_tx_send;
  2938. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2939. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2940. "DP Vdev Register success");
  2941. }
  2942. /**
  2943. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2944. * @vdev: Datapath VDEV handle
  2945. *
  2946. * Return: void
  2947. */
  2948. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2949. {
  2950. struct dp_pdev *pdev = vdev->pdev;
  2951. struct dp_soc *soc = pdev->soc;
  2952. struct dp_peer *peer;
  2953. uint16_t *peer_ids;
  2954. uint8_t i = 0, j = 0;
  2955. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2956. if (!peer_ids) {
  2957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2958. "DP alloc failure - unable to flush peers");
  2959. return;
  2960. }
  2961. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2962. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2963. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2964. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2965. if (j < soc->max_peers)
  2966. peer_ids[j++] = peer->peer_ids[i];
  2967. }
  2968. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2969. for (i = 0; i < j ; i++)
  2970. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2971. qdf_mem_free(peer_ids);
  2972. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2973. FL("Flushed peers for vdev object %pK "), vdev);
  2974. }
  2975. /*
  2976. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2977. * @txrx_vdev: Datapath VDEV handle
  2978. * @callback: Callback OL_IF on completion of detach
  2979. * @cb_context: Callback context
  2980. *
  2981. */
  2982. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2983. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2984. {
  2985. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2986. struct dp_pdev *pdev = vdev->pdev;
  2987. struct dp_soc *soc = pdev->soc;
  2988. /* preconditions */
  2989. qdf_assert(vdev);
  2990. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2991. /* remove the vdev from its parent pdev's list */
  2992. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2993. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2994. if (wlan_op_mode_sta == vdev->opmode)
  2995. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2996. /*
  2997. * If Target is hung, flush all peers before detaching vdev
  2998. * this will free all references held due to missing
  2999. * unmap commands from Target
  3000. */
  3001. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3002. dp_vdev_flush_peers(vdev);
  3003. /*
  3004. * Use peer_ref_mutex while accessing peer_list, in case
  3005. * a peer is in the process of being removed from the list.
  3006. */
  3007. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3008. /* check that the vdev has no peers allocated */
  3009. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3010. /* debug print - will be removed later */
  3011. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3012. FL("not deleting vdev object %pK (%pM)"
  3013. "until deletion finishes for all its peers"),
  3014. vdev, vdev->mac_addr.raw);
  3015. /* indicate that the vdev needs to be deleted */
  3016. vdev->delete.pending = 1;
  3017. vdev->delete.callback = callback;
  3018. vdev->delete.context = cb_context;
  3019. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3020. return;
  3021. }
  3022. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3023. dp_tx_vdev_detach(vdev);
  3024. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3025. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3026. qdf_mem_free(vdev);
  3027. if (callback)
  3028. callback(cb_context);
  3029. }
  3030. /*
  3031. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  3032. * @soc - datapath soc handle
  3033. * @peer - datapath peer handle
  3034. *
  3035. * Delete the AST entries belonging to a peer
  3036. */
  3037. #ifdef FEATURE_AST
  3038. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3039. struct dp_peer *peer)
  3040. {
  3041. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  3042. qdf_spin_lock_bh(&soc->ast_lock);
  3043. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  3044. dp_peer_del_ast(soc, ast_entry);
  3045. TAILQ_INIT(&peer->ast_entry_list);
  3046. qdf_spin_unlock_bh(&soc->ast_lock);
  3047. }
  3048. #else
  3049. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  3050. struct dp_peer *peer)
  3051. {
  3052. }
  3053. #endif
  3054. /*
  3055. * dp_peer_create_wifi3() - attach txrx peer
  3056. * @txrx_vdev: Datapath VDEV handle
  3057. * @peer_mac_addr: Peer MAC address
  3058. *
  3059. * Return: DP peeer handle on success, NULL on failure
  3060. */
  3061. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3062. uint8_t *peer_mac_addr, void *ol_peer)
  3063. {
  3064. struct dp_peer *peer;
  3065. int i;
  3066. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3067. struct dp_pdev *pdev;
  3068. struct dp_soc *soc;
  3069. struct dp_ast_entry *ast_entry;
  3070. /* preconditions */
  3071. qdf_assert(vdev);
  3072. qdf_assert(peer_mac_addr);
  3073. pdev = vdev->pdev;
  3074. soc = pdev->soc;
  3075. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3076. 0, vdev->vdev_id);
  3077. if (peer) {
  3078. peer->delete_in_progress = false;
  3079. dp_peer_delete_ast_entries(soc, peer);
  3080. /*
  3081. * on peer create, peer ref count decrements, sice new peer is not
  3082. * getting created earlier reference is reused, peer_unref_delete will
  3083. * take care of incrementing count
  3084. * */
  3085. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3086. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3087. vdev->vdev_id, peer->mac_addr.raw);
  3088. }
  3089. dp_local_peer_id_alloc(pdev, peer);
  3090. DP_STATS_INIT(peer);
  3091. return (void *)peer;
  3092. } else {
  3093. /*
  3094. * When a STA roams from RPTR AP to ROOT AP and vice versa, we
  3095. * need to remove the AST entry which was earlier added as a WDS
  3096. * entry.
  3097. */
  3098. ast_entry = dp_peer_ast_hash_find(soc, peer_mac_addr);
  3099. if (ast_entry)
  3100. dp_peer_del_ast(soc, ast_entry);
  3101. }
  3102. #ifdef notyet
  3103. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3104. soc->mempool_ol_ath_peer);
  3105. #else
  3106. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3107. #endif
  3108. if (!peer)
  3109. return NULL; /* failure */
  3110. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3111. TAILQ_INIT(&peer->ast_entry_list);
  3112. /* store provided params */
  3113. peer->vdev = vdev;
  3114. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3115. qdf_spinlock_create(&peer->peer_info_lock);
  3116. qdf_mem_copy(
  3117. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3118. /* TODO: See of rx_opt_proc is really required */
  3119. peer->rx_opt_proc = soc->rx_opt_proc;
  3120. /* initialize the peer_id */
  3121. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3122. peer->peer_ids[i] = HTT_INVALID_PEER;
  3123. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3124. qdf_atomic_init(&peer->ref_cnt);
  3125. /* keep one reference for attach */
  3126. qdf_atomic_inc(&peer->ref_cnt);
  3127. /* add this peer into the vdev's list */
  3128. if (wlan_op_mode_sta == vdev->opmode)
  3129. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3130. else
  3131. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3132. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3133. /* TODO: See if hash based search is required */
  3134. dp_peer_find_hash_add(soc, peer);
  3135. /* Initialize the peer state */
  3136. peer->state = OL_TXRX_PEER_STATE_DISC;
  3137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3138. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3139. vdev, peer, peer->mac_addr.raw,
  3140. qdf_atomic_read(&peer->ref_cnt));
  3141. /*
  3142. * For every peer MAp message search and set if bss_peer
  3143. */
  3144. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3146. "vdev bss_peer!!!!");
  3147. peer->bss_peer = 1;
  3148. vdev->vap_bss_peer = peer;
  3149. }
  3150. dp_local_peer_id_alloc(pdev, peer);
  3151. DP_STATS_INIT(peer);
  3152. peer->ol_peer = ol_peer;
  3153. return (void *)peer;
  3154. }
  3155. /*
  3156. * dp_peer_setup_wifi3() - initialize the peer
  3157. * @vdev_hdl: virtual device object
  3158. * @peer: Peer object
  3159. *
  3160. * Return: void
  3161. */
  3162. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3163. {
  3164. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3165. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3166. struct dp_pdev *pdev;
  3167. struct dp_soc *soc;
  3168. bool hash_based = 0;
  3169. enum cdp_host_reo_dest_ring reo_dest;
  3170. /* preconditions */
  3171. qdf_assert(vdev);
  3172. qdf_assert(peer);
  3173. pdev = vdev->pdev;
  3174. soc = pdev->soc;
  3175. peer->last_assoc_rcvd = 0;
  3176. peer->last_disassoc_rcvd = 0;
  3177. peer->last_deauth_rcvd = 0;
  3178. /*
  3179. * hash based steering is disabled for Radios which are offloaded
  3180. * to NSS
  3181. */
  3182. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3183. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3185. FL("hash based steering for pdev: %d is %d\n"),
  3186. pdev->pdev_id, hash_based);
  3187. /*
  3188. * Below line of code will ensure the proper reo_dest ring is chosen
  3189. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3190. */
  3191. reo_dest = pdev->reo_dest;
  3192. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3193. /* TODO: Check the destination ring number to be passed to FW */
  3194. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3195. pdev->ctrl_pdev, peer->mac_addr.raw,
  3196. peer->vdev->vdev_id, hash_based, reo_dest);
  3197. }
  3198. dp_peer_rx_init(pdev, peer);
  3199. return;
  3200. }
  3201. /*
  3202. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3203. * @vdev_handle: virtual device object
  3204. * @htt_pkt_type: type of pkt
  3205. *
  3206. * Return: void
  3207. */
  3208. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3209. enum htt_cmn_pkt_type val)
  3210. {
  3211. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3212. vdev->tx_encap_type = val;
  3213. }
  3214. /*
  3215. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3216. * @vdev_handle: virtual device object
  3217. * @htt_pkt_type: type of pkt
  3218. *
  3219. * Return: void
  3220. */
  3221. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3222. enum htt_cmn_pkt_type val)
  3223. {
  3224. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3225. vdev->rx_decap_type = val;
  3226. }
  3227. /*
  3228. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3229. * @pdev_handle: physical device object
  3230. * @val: reo destination ring index (1 - 4)
  3231. *
  3232. * Return: void
  3233. */
  3234. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3235. enum cdp_host_reo_dest_ring val)
  3236. {
  3237. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3238. if (pdev)
  3239. pdev->reo_dest = val;
  3240. }
  3241. /*
  3242. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3243. * @pdev_handle: physical device object
  3244. *
  3245. * Return: reo destination ring index
  3246. */
  3247. static enum cdp_host_reo_dest_ring
  3248. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3249. {
  3250. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3251. if (pdev)
  3252. return pdev->reo_dest;
  3253. else
  3254. return cdp_host_reo_dest_ring_unknown;
  3255. }
  3256. #ifdef QCA_SUPPORT_SON
  3257. static void dp_son_peer_authorize(struct dp_peer *peer)
  3258. {
  3259. struct dp_soc *soc;
  3260. soc = peer->vdev->pdev->soc;
  3261. peer->peer_bs_inact_flag = 0;
  3262. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3263. return;
  3264. }
  3265. #else
  3266. static void dp_son_peer_authorize(struct dp_peer *peer)
  3267. {
  3268. return;
  3269. }
  3270. #endif
  3271. /*
  3272. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3273. * @pdev_handle: device object
  3274. * @val: value to be set
  3275. *
  3276. * Return: void
  3277. */
  3278. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3279. uint32_t val)
  3280. {
  3281. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3282. /* Enable/Disable smart mesh filtering. This flag will be checked
  3283. * during rx processing to check if packets are from NAC clients.
  3284. */
  3285. pdev->filter_neighbour_peers = val;
  3286. return 0;
  3287. }
  3288. /*
  3289. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3290. * address for smart mesh filtering
  3291. * @pdev_handle: device object
  3292. * @cmd: Add/Del command
  3293. * @macaddr: nac client mac address
  3294. *
  3295. * Return: void
  3296. */
  3297. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3298. uint32_t cmd, uint8_t *macaddr)
  3299. {
  3300. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3301. struct dp_neighbour_peer *peer = NULL;
  3302. if (!macaddr)
  3303. goto fail0;
  3304. /* Store address of NAC (neighbour peer) which will be checked
  3305. * against TA of received packets.
  3306. */
  3307. if (cmd == DP_NAC_PARAM_ADD) {
  3308. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3309. sizeof(*peer));
  3310. if (!peer) {
  3311. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3312. FL("DP neighbour peer node memory allocation failed"));
  3313. goto fail0;
  3314. }
  3315. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3316. macaddr, DP_MAC_ADDR_LEN);
  3317. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3318. /* add this neighbour peer into the list */
  3319. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3320. neighbour_peer_list_elem);
  3321. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3322. return 1;
  3323. } else if (cmd == DP_NAC_PARAM_DEL) {
  3324. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3325. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3326. neighbour_peer_list_elem) {
  3327. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3328. macaddr, DP_MAC_ADDR_LEN)) {
  3329. /* delete this peer from the list */
  3330. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3331. peer, neighbour_peer_list_elem);
  3332. qdf_mem_free(peer);
  3333. break;
  3334. }
  3335. }
  3336. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3337. return 1;
  3338. }
  3339. fail0:
  3340. return 0;
  3341. }
  3342. /*
  3343. * dp_get_sec_type() - Get the security type
  3344. * @peer: Datapath peer handle
  3345. * @sec_idx: Security id (mcast, ucast)
  3346. *
  3347. * return sec_type: Security type
  3348. */
  3349. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3350. {
  3351. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3352. return dpeer->security[sec_idx].sec_type;
  3353. }
  3354. /*
  3355. * dp_peer_authorize() - authorize txrx peer
  3356. * @peer_handle: Datapath peer handle
  3357. * @authorize
  3358. *
  3359. */
  3360. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3361. {
  3362. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3363. struct dp_soc *soc;
  3364. if (peer != NULL) {
  3365. soc = peer->vdev->pdev->soc;
  3366. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3367. dp_son_peer_authorize(peer);
  3368. peer->authorize = authorize ? 1 : 0;
  3369. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3370. }
  3371. }
  3372. #ifdef QCA_SUPPORT_SON
  3373. /*
  3374. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3375. * @pdev_handle: Device handle
  3376. * @new_threshold : updated threshold value
  3377. *
  3378. */
  3379. static void
  3380. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3381. u_int16_t new_threshold)
  3382. {
  3383. struct dp_vdev *vdev;
  3384. struct dp_peer *peer;
  3385. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3386. struct dp_soc *soc = pdev->soc;
  3387. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3388. if (old_threshold == new_threshold)
  3389. return;
  3390. soc->pdev_bs_inact_reload = new_threshold;
  3391. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3392. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3393. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3394. if (vdev->opmode != wlan_op_mode_ap)
  3395. continue;
  3396. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3397. if (!peer->authorize)
  3398. continue;
  3399. if (old_threshold - peer->peer_bs_inact >=
  3400. new_threshold) {
  3401. dp_mark_peer_inact((void *)peer, true);
  3402. peer->peer_bs_inact = 0;
  3403. } else {
  3404. peer->peer_bs_inact = new_threshold -
  3405. (old_threshold - peer->peer_bs_inact);
  3406. }
  3407. }
  3408. }
  3409. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3410. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3411. }
  3412. /**
  3413. * dp_txrx_reset_inact_count(): Reset inact count
  3414. * @pdev_handle - device handle
  3415. *
  3416. * Return: void
  3417. */
  3418. static void
  3419. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3420. {
  3421. struct dp_vdev *vdev = NULL;
  3422. struct dp_peer *peer = NULL;
  3423. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3424. struct dp_soc *soc = pdev->soc;
  3425. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3426. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3427. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3428. if (vdev->opmode != wlan_op_mode_ap)
  3429. continue;
  3430. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3431. if (!peer->authorize)
  3432. continue;
  3433. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3434. }
  3435. }
  3436. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3437. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3438. }
  3439. /**
  3440. * dp_set_inact_params(): set inactivity params
  3441. * @pdev_handle - device handle
  3442. * @inact_check_interval - inactivity interval
  3443. * @inact_normal - Inactivity normal
  3444. * @inact_overload - Inactivity overload
  3445. *
  3446. * Return: bool
  3447. */
  3448. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3449. u_int16_t inact_check_interval,
  3450. u_int16_t inact_normal, u_int16_t inact_overload)
  3451. {
  3452. struct dp_soc *soc;
  3453. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3454. if (!pdev)
  3455. return false;
  3456. soc = pdev->soc;
  3457. if (!soc)
  3458. return false;
  3459. soc->pdev_bs_inact_interval = inact_check_interval;
  3460. soc->pdev_bs_inact_normal = inact_normal;
  3461. soc->pdev_bs_inact_overload = inact_overload;
  3462. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3463. soc->pdev_bs_inact_normal);
  3464. return true;
  3465. }
  3466. /**
  3467. * dp_start_inact_timer(): Inactivity timer start
  3468. * @pdev_handle - device handle
  3469. * @enable - Inactivity timer start/stop
  3470. *
  3471. * Return: bool
  3472. */
  3473. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3474. {
  3475. struct dp_soc *soc;
  3476. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3477. if (!pdev)
  3478. return false;
  3479. soc = pdev->soc;
  3480. if (!soc)
  3481. return false;
  3482. if (enable) {
  3483. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3484. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3485. soc->pdev_bs_inact_interval * 1000);
  3486. } else {
  3487. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3488. }
  3489. return true;
  3490. }
  3491. /**
  3492. * dp_set_overload(): Set inactivity overload
  3493. * @pdev_handle - device handle
  3494. * @overload - overload status
  3495. *
  3496. * Return: void
  3497. */
  3498. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3499. {
  3500. struct dp_soc *soc;
  3501. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3502. if (!pdev)
  3503. return;
  3504. soc = pdev->soc;
  3505. if (!soc)
  3506. return;
  3507. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3508. overload ? soc->pdev_bs_inact_overload :
  3509. soc->pdev_bs_inact_normal);
  3510. }
  3511. /**
  3512. * dp_peer_is_inact(): check whether peer is inactive
  3513. * @peer_handle - datapath peer handle
  3514. *
  3515. * Return: bool
  3516. */
  3517. bool dp_peer_is_inact(void *peer_handle)
  3518. {
  3519. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3520. if (!peer)
  3521. return false;
  3522. return peer->peer_bs_inact_flag == 1;
  3523. }
  3524. /**
  3525. * dp_init_inact_timer: initialize the inact timer
  3526. * @soc - SOC handle
  3527. *
  3528. * Return: void
  3529. */
  3530. void dp_init_inact_timer(struct dp_soc *soc)
  3531. {
  3532. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3533. dp_txrx_peer_find_inact_timeout_handler,
  3534. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3535. }
  3536. #else
  3537. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3538. u_int16_t inact_normal, u_int16_t inact_overload)
  3539. {
  3540. return false;
  3541. }
  3542. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3543. {
  3544. return false;
  3545. }
  3546. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3547. {
  3548. return;
  3549. }
  3550. void dp_init_inact_timer(struct dp_soc *soc)
  3551. {
  3552. return;
  3553. }
  3554. bool dp_peer_is_inact(void *peer)
  3555. {
  3556. return false;
  3557. }
  3558. #endif
  3559. /*
  3560. * dp_peer_unref_delete() - unref and delete peer
  3561. * @peer_handle: Datapath peer handle
  3562. *
  3563. */
  3564. void dp_peer_unref_delete(void *peer_handle)
  3565. {
  3566. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3567. struct dp_peer *bss_peer = NULL;
  3568. struct dp_vdev *vdev = peer->vdev;
  3569. struct dp_pdev *pdev = vdev->pdev;
  3570. struct dp_soc *soc = pdev->soc;
  3571. struct dp_peer *tmppeer;
  3572. int found = 0;
  3573. uint16_t peer_id;
  3574. uint16_t vdev_id;
  3575. /*
  3576. * Hold the lock all the way from checking if the peer ref count
  3577. * is zero until the peer references are removed from the hash
  3578. * table and vdev list (if the peer ref count is zero).
  3579. * This protects against a new HL tx operation starting to use the
  3580. * peer object just after this function concludes it's done being used.
  3581. * Furthermore, the lock needs to be held while checking whether the
  3582. * vdev's list of peers is empty, to make sure that list is not modified
  3583. * concurrently with the empty check.
  3584. */
  3585. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3586. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3587. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3588. peer, qdf_atomic_read(&peer->ref_cnt));
  3589. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3590. peer_id = peer->peer_ids[0];
  3591. vdev_id = vdev->vdev_id;
  3592. /*
  3593. * Make sure that the reference to the peer in
  3594. * peer object map is removed
  3595. */
  3596. if (peer_id != HTT_INVALID_PEER)
  3597. soc->peer_id_to_obj_map[peer_id] = NULL;
  3598. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3599. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3600. /* remove the reference to the peer from the hash table */
  3601. dp_peer_find_hash_remove(soc, peer);
  3602. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3603. if (tmppeer == peer) {
  3604. found = 1;
  3605. break;
  3606. }
  3607. }
  3608. if (found) {
  3609. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3610. peer_list_elem);
  3611. } else {
  3612. /*Ignoring the remove operation as peer not found*/
  3613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3614. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3615. peer, vdev, &peer->vdev->peer_list);
  3616. }
  3617. /* cleanup the peer data */
  3618. dp_peer_cleanup(vdev, peer);
  3619. /* check whether the parent vdev has no peers left */
  3620. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3621. /*
  3622. * Now that there are no references to the peer, we can
  3623. * release the peer reference lock.
  3624. */
  3625. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3626. /*
  3627. * Check if the parent vdev was waiting for its peers
  3628. * to be deleted, in order for it to be deleted too.
  3629. */
  3630. if (vdev->delete.pending) {
  3631. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3632. vdev->delete.callback;
  3633. void *vdev_delete_context =
  3634. vdev->delete.context;
  3635. QDF_TRACE(QDF_MODULE_ID_DP,
  3636. QDF_TRACE_LEVEL_INFO_HIGH,
  3637. FL("deleting vdev object %pK (%pM)"
  3638. " - its last peer is done"),
  3639. vdev, vdev->mac_addr.raw);
  3640. /* all peers are gone, go ahead and delete it */
  3641. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3642. FLOW_TYPE_VDEV,
  3643. vdev_id);
  3644. dp_tx_vdev_detach(vdev);
  3645. QDF_TRACE(QDF_MODULE_ID_DP,
  3646. QDF_TRACE_LEVEL_INFO_HIGH,
  3647. FL("deleting vdev object %pK (%pM)"),
  3648. vdev, vdev->mac_addr.raw);
  3649. qdf_mem_free(vdev);
  3650. vdev = NULL;
  3651. if (vdev_delete_cb)
  3652. vdev_delete_cb(vdev_delete_context);
  3653. }
  3654. } else {
  3655. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3656. }
  3657. if (vdev) {
  3658. if (vdev->vap_bss_peer == peer) {
  3659. vdev->vap_bss_peer = NULL;
  3660. }
  3661. }
  3662. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3663. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->ctrl_pdev,
  3664. vdev_id, peer->mac_addr.raw);
  3665. }
  3666. if (!vdev || !vdev->vap_bss_peer) {
  3667. goto free_peer;
  3668. }
  3669. #ifdef notyet
  3670. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3671. #else
  3672. bss_peer = vdev->vap_bss_peer;
  3673. DP_UPDATE_STATS(bss_peer, peer);
  3674. free_peer:
  3675. qdf_mem_free(peer);
  3676. #endif
  3677. } else {
  3678. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3679. }
  3680. }
  3681. /*
  3682. * dp_peer_detach_wifi3() – Detach txrx peer
  3683. * @peer_handle: Datapath peer handle
  3684. * @bitmap: bitmap indicating special handling of request.
  3685. *
  3686. */
  3687. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3688. {
  3689. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3690. /* redirect the peer's rx delivery function to point to a
  3691. * discard func
  3692. */
  3693. peer->rx_opt_proc = dp_rx_discard;
  3694. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3695. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3696. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3697. qdf_spinlock_destroy(&peer->peer_info_lock);
  3698. /*
  3699. * Remove the reference added during peer_attach.
  3700. * The peer will still be left allocated until the
  3701. * PEER_UNMAP message arrives to remove the other
  3702. * reference, added by the PEER_MAP message.
  3703. */
  3704. dp_peer_unref_delete(peer_handle);
  3705. }
  3706. /*
  3707. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3708. * @peer_handle: Datapath peer handle
  3709. *
  3710. */
  3711. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3712. {
  3713. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3714. return vdev->mac_addr.raw;
  3715. }
  3716. /*
  3717. * dp_vdev_set_wds() - Enable per packet stats
  3718. * @vdev_handle: DP VDEV handle
  3719. * @val: value
  3720. *
  3721. * Return: none
  3722. */
  3723. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3724. {
  3725. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3726. vdev->wds_enabled = val;
  3727. return 0;
  3728. }
  3729. /*
  3730. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3731. * @peer_handle: Datapath peer handle
  3732. *
  3733. */
  3734. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3735. uint8_t vdev_id)
  3736. {
  3737. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3738. struct dp_vdev *vdev = NULL;
  3739. if (qdf_unlikely(!pdev))
  3740. return NULL;
  3741. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3742. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3743. if (vdev->vdev_id == vdev_id)
  3744. break;
  3745. }
  3746. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3747. return (struct cdp_vdev *)vdev;
  3748. }
  3749. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3750. {
  3751. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3752. return vdev->opmode;
  3753. }
  3754. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3755. {
  3756. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3757. struct dp_pdev *pdev = vdev->pdev;
  3758. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3759. }
  3760. /**
  3761. * dp_reset_monitor_mode() - Disable monitor mode
  3762. * @pdev_handle: Datapath PDEV handle
  3763. *
  3764. * Return: 0 on success, not 0 on failure
  3765. */
  3766. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3767. {
  3768. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3769. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3770. struct dp_soc *soc = pdev->soc;
  3771. uint8_t pdev_id;
  3772. int mac_id;
  3773. pdev_id = pdev->pdev_id;
  3774. soc = pdev->soc;
  3775. qdf_spin_lock_bh(&pdev->mon_lock);
  3776. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3777. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3778. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3779. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3780. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3781. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3782. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3783. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3784. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3785. }
  3786. pdev->monitor_vdev = NULL;
  3787. qdf_spin_unlock_bh(&pdev->mon_lock);
  3788. return 0;
  3789. }
  3790. /**
  3791. * dp_set_nac() - set peer_nac
  3792. * @peer_handle: Datapath PEER handle
  3793. *
  3794. * Return: void
  3795. */
  3796. static void dp_set_nac(struct cdp_peer *peer_handle)
  3797. {
  3798. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3799. peer->nac = 1;
  3800. }
  3801. /**
  3802. * dp_get_tx_pending() - read pending tx
  3803. * @pdev_handle: Datapath PDEV handle
  3804. *
  3805. * Return: outstanding tx
  3806. */
  3807. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3808. {
  3809. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3810. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3811. }
  3812. /**
  3813. * dp_get_peer_mac_from_peer_id() - get peer mac
  3814. * @pdev_handle: Datapath PDEV handle
  3815. * @peer_id: Peer ID
  3816. * @peer_mac: MAC addr of PEER
  3817. *
  3818. * Return: void
  3819. */
  3820. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3821. uint32_t peer_id, uint8_t *peer_mac)
  3822. {
  3823. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3824. struct dp_peer *peer;
  3825. if (pdev && peer_mac) {
  3826. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3827. if (peer && peer->mac_addr.raw) {
  3828. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3829. DP_MAC_ADDR_LEN);
  3830. }
  3831. }
  3832. }
  3833. /**
  3834. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3835. * @vdev_handle: Datapath VDEV handle
  3836. * @smart_monitor: Flag to denote if its smart monitor mode
  3837. *
  3838. * Return: 0 on success, not 0 on failure
  3839. */
  3840. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3841. uint8_t smart_monitor)
  3842. {
  3843. /* Many monitor VAPs can exists in a system but only one can be up at
  3844. * anytime
  3845. */
  3846. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3847. struct dp_pdev *pdev;
  3848. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3849. struct dp_soc *soc;
  3850. uint8_t pdev_id;
  3851. int mac_id;
  3852. qdf_assert(vdev);
  3853. pdev = vdev->pdev;
  3854. pdev_id = pdev->pdev_id;
  3855. soc = pdev->soc;
  3856. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3857. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3858. pdev, pdev_id, soc, vdev);
  3859. /*Check if current pdev's monitor_vdev exists */
  3860. if (pdev->monitor_vdev) {
  3861. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3862. "vdev=%pK\n", vdev);
  3863. qdf_assert(vdev);
  3864. }
  3865. pdev->monitor_vdev = vdev;
  3866. /* If smart monitor mode, do not configure monitor ring */
  3867. if (smart_monitor)
  3868. return QDF_STATUS_SUCCESS;
  3869. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3870. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3871. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3872. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3873. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3874. pdev->mo_data_filter);
  3875. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3876. htt_tlv_filter.mpdu_start = 1;
  3877. htt_tlv_filter.msdu_start = 1;
  3878. htt_tlv_filter.packet = 1;
  3879. htt_tlv_filter.msdu_end = 1;
  3880. htt_tlv_filter.mpdu_end = 1;
  3881. htt_tlv_filter.packet_header = 1;
  3882. htt_tlv_filter.attention = 1;
  3883. htt_tlv_filter.ppdu_start = 0;
  3884. htt_tlv_filter.ppdu_end = 0;
  3885. htt_tlv_filter.ppdu_end_user_stats = 0;
  3886. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3887. htt_tlv_filter.ppdu_end_status_done = 0;
  3888. htt_tlv_filter.header_per_msdu = 1;
  3889. htt_tlv_filter.enable_fp =
  3890. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3891. htt_tlv_filter.enable_md = 0;
  3892. htt_tlv_filter.enable_mo =
  3893. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3894. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3895. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3896. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3897. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3898. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3899. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3900. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3901. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3902. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3903. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3904. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3905. }
  3906. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3907. htt_tlv_filter.mpdu_start = 1;
  3908. htt_tlv_filter.msdu_start = 0;
  3909. htt_tlv_filter.packet = 0;
  3910. htt_tlv_filter.msdu_end = 0;
  3911. htt_tlv_filter.mpdu_end = 0;
  3912. htt_tlv_filter.attention = 0;
  3913. htt_tlv_filter.ppdu_start = 1;
  3914. htt_tlv_filter.ppdu_end = 1;
  3915. htt_tlv_filter.ppdu_end_user_stats = 1;
  3916. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3917. htt_tlv_filter.ppdu_end_status_done = 1;
  3918. htt_tlv_filter.enable_fp = 1;
  3919. htt_tlv_filter.enable_md = 0;
  3920. htt_tlv_filter.enable_mo = 1;
  3921. if (pdev->mcopy_mode) {
  3922. htt_tlv_filter.packet_header = 1;
  3923. }
  3924. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  3925. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  3926. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  3927. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  3928. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  3929. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  3930. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3931. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3932. pdev->pdev_id);
  3933. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3934. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3935. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3936. }
  3937. return QDF_STATUS_SUCCESS;
  3938. }
  3939. /**
  3940. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3941. * @pdev_handle: Datapath PDEV handle
  3942. * @filter_val: Flag to select Filter for monitor mode
  3943. * Return: 0 on success, not 0 on failure
  3944. */
  3945. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3946. struct cdp_monitor_filter *filter_val)
  3947. {
  3948. /* Many monitor VAPs can exists in a system but only one can be up at
  3949. * anytime
  3950. */
  3951. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3952. struct dp_vdev *vdev = pdev->monitor_vdev;
  3953. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3954. struct dp_soc *soc;
  3955. uint8_t pdev_id;
  3956. int mac_id;
  3957. pdev_id = pdev->pdev_id;
  3958. soc = pdev->soc;
  3959. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3960. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3961. pdev, pdev_id, soc, vdev);
  3962. /*Check if current pdev's monitor_vdev exists */
  3963. if (!pdev->monitor_vdev) {
  3964. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3965. "vdev=%pK\n", vdev);
  3966. qdf_assert(vdev);
  3967. }
  3968. /* update filter mode, type in pdev structure */
  3969. pdev->mon_filter_mode = filter_val->mode;
  3970. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3971. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3972. pdev->fp_data_filter = filter_val->fp_data;
  3973. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3974. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3975. pdev->mo_data_filter = filter_val->mo_data;
  3976. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3977. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3978. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3979. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3980. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3981. pdev->mo_data_filter);
  3982. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3983. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3984. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3985. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3986. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3987. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3988. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3989. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3990. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3991. }
  3992. htt_tlv_filter.mpdu_start = 1;
  3993. htt_tlv_filter.msdu_start = 1;
  3994. htt_tlv_filter.packet = 1;
  3995. htt_tlv_filter.msdu_end = 1;
  3996. htt_tlv_filter.mpdu_end = 1;
  3997. htt_tlv_filter.packet_header = 1;
  3998. htt_tlv_filter.attention = 1;
  3999. htt_tlv_filter.ppdu_start = 0;
  4000. htt_tlv_filter.ppdu_end = 0;
  4001. htt_tlv_filter.ppdu_end_user_stats = 0;
  4002. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  4003. htt_tlv_filter.ppdu_end_status_done = 0;
  4004. htt_tlv_filter.header_per_msdu = 1;
  4005. htt_tlv_filter.enable_fp =
  4006. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  4007. htt_tlv_filter.enable_md = 0;
  4008. htt_tlv_filter.enable_mo =
  4009. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  4010. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  4011. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  4012. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  4013. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  4014. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  4015. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  4016. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4017. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  4018. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4019. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  4020. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  4021. }
  4022. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4023. htt_tlv_filter.mpdu_start = 1;
  4024. htt_tlv_filter.msdu_start = 0;
  4025. htt_tlv_filter.packet = 0;
  4026. htt_tlv_filter.msdu_end = 0;
  4027. htt_tlv_filter.mpdu_end = 0;
  4028. htt_tlv_filter.attention = 0;
  4029. htt_tlv_filter.ppdu_start = 1;
  4030. htt_tlv_filter.ppdu_end = 1;
  4031. htt_tlv_filter.ppdu_end_user_stats = 1;
  4032. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4033. htt_tlv_filter.ppdu_end_status_done = 1;
  4034. htt_tlv_filter.enable_fp = 1;
  4035. htt_tlv_filter.enable_md = 0;
  4036. htt_tlv_filter.enable_mo = 1;
  4037. if (pdev->mcopy_mode) {
  4038. htt_tlv_filter.packet_header = 1;
  4039. }
  4040. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4041. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4042. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4043. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4044. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4045. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4046. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4047. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4048. pdev->pdev_id);
  4049. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4050. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4051. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4052. }
  4053. return QDF_STATUS_SUCCESS;
  4054. }
  4055. /**
  4056. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4057. * @pdev_handle: Datapath PDEV handle
  4058. *
  4059. * Return: pdev_id
  4060. */
  4061. static
  4062. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4063. {
  4064. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4065. return pdev->pdev_id;
  4066. }
  4067. /**
  4068. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4069. * @vdev_handle: Datapath VDEV handle
  4070. * Return: true on ucast filter flag set
  4071. */
  4072. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4073. {
  4074. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4075. struct dp_pdev *pdev;
  4076. pdev = vdev->pdev;
  4077. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4078. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4079. return true;
  4080. return false;
  4081. }
  4082. /**
  4083. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4084. * @vdev_handle: Datapath VDEV handle
  4085. * Return: true on mcast filter flag set
  4086. */
  4087. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4088. {
  4089. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4090. struct dp_pdev *pdev;
  4091. pdev = vdev->pdev;
  4092. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4093. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4094. return true;
  4095. return false;
  4096. }
  4097. /**
  4098. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4099. * @vdev_handle: Datapath VDEV handle
  4100. * Return: true on non data filter flag set
  4101. */
  4102. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4103. {
  4104. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4105. struct dp_pdev *pdev;
  4106. pdev = vdev->pdev;
  4107. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4108. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4109. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4110. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4111. return true;
  4112. }
  4113. }
  4114. return false;
  4115. }
  4116. #ifdef MESH_MODE_SUPPORT
  4117. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4118. {
  4119. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4120. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4121. FL("val %d"), val);
  4122. vdev->mesh_vdev = val;
  4123. }
  4124. /*
  4125. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4126. * @vdev_hdl: virtual device object
  4127. * @val: value to be set
  4128. *
  4129. * Return: void
  4130. */
  4131. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4132. {
  4133. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4134. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4135. FL("val %d"), val);
  4136. vdev->mesh_rx_filter = val;
  4137. }
  4138. #endif
  4139. /*
  4140. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4141. * Current scope is bar received count
  4142. *
  4143. * @pdev_handle: DP_PDEV handle
  4144. *
  4145. * Return: void
  4146. */
  4147. #define STATS_PROC_TIMEOUT (HZ/1000)
  4148. static void
  4149. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4150. {
  4151. struct dp_vdev *vdev;
  4152. struct dp_peer *peer;
  4153. uint32_t waitcnt;
  4154. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4155. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4156. if (!peer) {
  4157. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4158. FL("DP Invalid Peer refernce"));
  4159. return;
  4160. }
  4161. if (peer->delete_in_progress) {
  4162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4163. FL("DP Peer deletion in progress"));
  4164. continue;
  4165. }
  4166. qdf_atomic_inc(&peer->ref_cnt);
  4167. waitcnt = 0;
  4168. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4169. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4170. && waitcnt < 10) {
  4171. schedule_timeout_interruptible(
  4172. STATS_PROC_TIMEOUT);
  4173. waitcnt++;
  4174. }
  4175. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4176. dp_peer_unref_delete(peer);
  4177. }
  4178. }
  4179. }
  4180. /**
  4181. * dp_rx_bar_stats_cb(): BAR received stats callback
  4182. * @soc: SOC handle
  4183. * @cb_ctxt: Call back context
  4184. * @reo_status: Reo status
  4185. *
  4186. * return: void
  4187. */
  4188. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4189. union hal_reo_status *reo_status)
  4190. {
  4191. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4192. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4193. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4194. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4195. queue_status->header.status);
  4196. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4197. return;
  4198. }
  4199. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4200. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4201. }
  4202. /**
  4203. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4204. * @vdev: DP VDEV handle
  4205. *
  4206. * return: void
  4207. */
  4208. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4209. {
  4210. struct dp_peer *peer = NULL;
  4211. struct dp_soc *soc = vdev->pdev->soc;
  4212. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4213. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4214. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4215. DP_UPDATE_STATS(vdev, peer);
  4216. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4217. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4218. &vdev->stats, (uint16_t) vdev->vdev_id,
  4219. UPDATE_VDEV_STATS);
  4220. }
  4221. /**
  4222. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4223. * @pdev: DP PDEV handle
  4224. *
  4225. * return: void
  4226. */
  4227. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4228. {
  4229. struct dp_vdev *vdev = NULL;
  4230. struct dp_soc *soc = pdev->soc;
  4231. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4232. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4233. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4234. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4235. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4236. dp_aggregate_vdev_stats(vdev);
  4237. DP_UPDATE_STATS(pdev, vdev);
  4238. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4239. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4240. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4241. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4242. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4243. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4244. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4245. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4246. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4247. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4248. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4249. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4250. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4251. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4252. DP_STATS_AGGR(pdev, vdev,
  4253. tx_i.mcast_en.dropped_map_error);
  4254. DP_STATS_AGGR(pdev, vdev,
  4255. tx_i.mcast_en.dropped_self_mac);
  4256. DP_STATS_AGGR(pdev, vdev,
  4257. tx_i.mcast_en.dropped_send_fail);
  4258. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4259. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4260. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4261. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4262. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4263. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4264. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4265. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4266. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4267. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4268. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4269. pdev->stats.tx_i.dropped.dma_error +
  4270. pdev->stats.tx_i.dropped.ring_full +
  4271. pdev->stats.tx_i.dropped.enqueue_fail +
  4272. pdev->stats.tx_i.dropped.desc_na +
  4273. pdev->stats.tx_i.dropped.res_full;
  4274. pdev->stats.tx.last_ack_rssi =
  4275. vdev->stats.tx.last_ack_rssi;
  4276. pdev->stats.tx_i.tso.num_seg =
  4277. vdev->stats.tx_i.tso.num_seg;
  4278. }
  4279. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4280. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4281. soc->cdp_soc.ol_ops->update_dp_stats(pdev->ctrl_pdev,
  4282. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4283. }
  4284. /**
  4285. * dp_vdev_getstats() - get vdev packet level stats
  4286. * @vdev_handle: Datapath VDEV handle
  4287. * @stats: cdp network device stats structure
  4288. *
  4289. * Return: void
  4290. */
  4291. static void dp_vdev_getstats(void *vdev_handle,
  4292. struct cdp_dev_stats *stats)
  4293. {
  4294. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4295. dp_aggregate_vdev_stats(vdev);
  4296. }
  4297. /**
  4298. * dp_pdev_getstats() - get pdev packet level stats
  4299. * @pdev_handle: Datapath PDEV handle
  4300. * @stats: cdp network device stats structure
  4301. *
  4302. * Return: void
  4303. */
  4304. static void dp_pdev_getstats(void *pdev_handle,
  4305. struct cdp_dev_stats *stats)
  4306. {
  4307. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4308. dp_aggregate_pdev_stats(pdev);
  4309. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4310. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4311. stats->tx_errors = pdev->stats.tx.tx_failed +
  4312. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4313. stats->tx_dropped = stats->tx_errors;
  4314. stats->rx_packets = pdev->stats.rx.unicast.num +
  4315. pdev->stats.rx.multicast.num +
  4316. pdev->stats.rx.bcast.num;
  4317. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4318. pdev->stats.rx.multicast.bytes +
  4319. pdev->stats.rx.bcast.bytes;
  4320. }
  4321. /**
  4322. * dp_get_device_stats() - get interface level packet stats
  4323. * @handle: device handle
  4324. * @stats: cdp network device stats structure
  4325. * @type: device type pdev/vdev
  4326. *
  4327. * Return: void
  4328. */
  4329. static void dp_get_device_stats(void *handle,
  4330. struct cdp_dev_stats *stats, uint8_t type)
  4331. {
  4332. switch (type) {
  4333. case UPDATE_VDEV_STATS:
  4334. dp_vdev_getstats(handle, stats);
  4335. break;
  4336. case UPDATE_PDEV_STATS:
  4337. dp_pdev_getstats(handle, stats);
  4338. break;
  4339. default:
  4340. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4341. "apstats cannot be updated for this input "
  4342. "type %d\n", type);
  4343. break;
  4344. }
  4345. }
  4346. /**
  4347. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4348. * @pdev: DP_PDEV Handle
  4349. *
  4350. * Return:void
  4351. */
  4352. static inline void
  4353. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4354. {
  4355. uint8_t index = 0;
  4356. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4357. DP_PRINT_STATS("Received From Stack:");
  4358. DP_PRINT_STATS(" Packets = %d",
  4359. pdev->stats.tx_i.rcvd.num);
  4360. DP_PRINT_STATS(" Bytes = %llu",
  4361. pdev->stats.tx_i.rcvd.bytes);
  4362. DP_PRINT_STATS("Processed:");
  4363. DP_PRINT_STATS(" Packets = %d",
  4364. pdev->stats.tx_i.processed.num);
  4365. DP_PRINT_STATS(" Bytes = %llu",
  4366. pdev->stats.tx_i.processed.bytes);
  4367. DP_PRINT_STATS("Total Completions:");
  4368. DP_PRINT_STATS(" Packets = %u",
  4369. pdev->stats.tx.comp_pkt.num);
  4370. DP_PRINT_STATS(" Bytes = %llu",
  4371. pdev->stats.tx.comp_pkt.bytes);
  4372. DP_PRINT_STATS("Successful Completions:");
  4373. DP_PRINT_STATS(" Packets = %u",
  4374. pdev->stats.tx.tx_success.num);
  4375. DP_PRINT_STATS(" Bytes = %llu",
  4376. pdev->stats.tx.tx_success.bytes);
  4377. DP_PRINT_STATS("Dropped:");
  4378. DP_PRINT_STATS(" Total = %d",
  4379. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4380. DP_PRINT_STATS(" Dma_map_error = %d",
  4381. pdev->stats.tx_i.dropped.dma_error);
  4382. DP_PRINT_STATS(" Ring Full = %d",
  4383. pdev->stats.tx_i.dropped.ring_full);
  4384. DP_PRINT_STATS(" Descriptor Not available = %d",
  4385. pdev->stats.tx_i.dropped.desc_na);
  4386. DP_PRINT_STATS(" HW enqueue failed= %d",
  4387. pdev->stats.tx_i.dropped.enqueue_fail);
  4388. DP_PRINT_STATS(" Resources Full = %d",
  4389. pdev->stats.tx_i.dropped.res_full);
  4390. DP_PRINT_STATS(" FW removed = %d",
  4391. pdev->stats.tx.dropped.fw_rem);
  4392. DP_PRINT_STATS(" FW removed transmitted = %d",
  4393. pdev->stats.tx.dropped.fw_rem_tx);
  4394. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4395. pdev->stats.tx.dropped.fw_rem_notx);
  4396. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4397. pdev->stats.tx.dropped.fw_reason1);
  4398. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4399. pdev->stats.tx.dropped.fw_reason2);
  4400. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4401. pdev->stats.tx.dropped.fw_reason3);
  4402. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4403. pdev->stats.tx.dropped.age_out);
  4404. DP_PRINT_STATS("Scatter Gather:");
  4405. DP_PRINT_STATS(" Packets = %d",
  4406. pdev->stats.tx_i.sg.sg_pkt.num);
  4407. DP_PRINT_STATS(" Bytes = %llu",
  4408. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4409. DP_PRINT_STATS(" Dropped By Host = %d",
  4410. pdev->stats.tx_i.sg.dropped_host);
  4411. DP_PRINT_STATS(" Dropped By Target = %d",
  4412. pdev->stats.tx_i.sg.dropped_target);
  4413. DP_PRINT_STATS("TSO:");
  4414. DP_PRINT_STATS(" Number of Segments = %d",
  4415. pdev->stats.tx_i.tso.num_seg);
  4416. DP_PRINT_STATS(" Packets = %d",
  4417. pdev->stats.tx_i.tso.tso_pkt.num);
  4418. DP_PRINT_STATS(" Bytes = %llu",
  4419. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4420. DP_PRINT_STATS(" Dropped By Host = %d",
  4421. pdev->stats.tx_i.tso.dropped_host);
  4422. DP_PRINT_STATS("Mcast Enhancement:");
  4423. DP_PRINT_STATS(" Packets = %d",
  4424. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4425. DP_PRINT_STATS(" Bytes = %llu",
  4426. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4427. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4428. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4429. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4430. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4431. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4432. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4433. DP_PRINT_STATS(" Unicast sent = %d",
  4434. pdev->stats.tx_i.mcast_en.ucast);
  4435. DP_PRINT_STATS("Raw:");
  4436. DP_PRINT_STATS(" Packets = %d",
  4437. pdev->stats.tx_i.raw.raw_pkt.num);
  4438. DP_PRINT_STATS(" Bytes = %llu",
  4439. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4440. DP_PRINT_STATS(" DMA map error = %d",
  4441. pdev->stats.tx_i.raw.dma_map_error);
  4442. DP_PRINT_STATS("Reinjected:");
  4443. DP_PRINT_STATS(" Packets = %d",
  4444. pdev->stats.tx_i.reinject_pkts.num);
  4445. DP_PRINT_STATS(" Bytes = %llu\n",
  4446. pdev->stats.tx_i.reinject_pkts.bytes);
  4447. DP_PRINT_STATS("Inspected:");
  4448. DP_PRINT_STATS(" Packets = %d",
  4449. pdev->stats.tx_i.inspect_pkts.num);
  4450. DP_PRINT_STATS(" Bytes = %llu",
  4451. pdev->stats.tx_i.inspect_pkts.bytes);
  4452. DP_PRINT_STATS("Nawds Multicast:");
  4453. DP_PRINT_STATS(" Packets = %d",
  4454. pdev->stats.tx_i.nawds_mcast.num);
  4455. DP_PRINT_STATS(" Bytes = %llu",
  4456. pdev->stats.tx_i.nawds_mcast.bytes);
  4457. DP_PRINT_STATS("CCE Classified:");
  4458. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4459. pdev->stats.tx_i.cce_classified);
  4460. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4461. pdev->stats.tx_i.cce_classified_raw);
  4462. DP_PRINT_STATS("Mesh stats:");
  4463. DP_PRINT_STATS(" frames to firmware: %u",
  4464. pdev->stats.tx_i.mesh.exception_fw);
  4465. DP_PRINT_STATS(" completions from fw: %u",
  4466. pdev->stats.tx_i.mesh.completion_fw);
  4467. DP_PRINT_STATS("PPDU stats counter");
  4468. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4469. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4470. pdev->stats.ppdu_stats_counter[index]);
  4471. }
  4472. }
  4473. /**
  4474. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4475. * @pdev: DP_PDEV Handle
  4476. *
  4477. * Return: void
  4478. */
  4479. static inline void
  4480. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4481. {
  4482. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4483. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4484. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4485. pdev->stats.rx.rcvd_reo[0].num,
  4486. pdev->stats.rx.rcvd_reo[1].num,
  4487. pdev->stats.rx.rcvd_reo[2].num,
  4488. pdev->stats.rx.rcvd_reo[3].num);
  4489. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4490. pdev->stats.rx.rcvd_reo[0].bytes,
  4491. pdev->stats.rx.rcvd_reo[1].bytes,
  4492. pdev->stats.rx.rcvd_reo[2].bytes,
  4493. pdev->stats.rx.rcvd_reo[3].bytes);
  4494. DP_PRINT_STATS("Replenished:");
  4495. DP_PRINT_STATS(" Packets = %d",
  4496. pdev->stats.replenish.pkts.num);
  4497. DP_PRINT_STATS(" Bytes = %llu",
  4498. pdev->stats.replenish.pkts.bytes);
  4499. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4500. pdev->stats.buf_freelist);
  4501. DP_PRINT_STATS(" Low threshold intr = %d",
  4502. pdev->stats.replenish.low_thresh_intrs);
  4503. DP_PRINT_STATS("Dropped:");
  4504. DP_PRINT_STATS(" msdu_not_done = %d",
  4505. pdev->stats.dropped.msdu_not_done);
  4506. DP_PRINT_STATS(" mon_rx_drop = %d",
  4507. pdev->stats.dropped.mon_rx_drop);
  4508. DP_PRINT_STATS("Sent To Stack:");
  4509. DP_PRINT_STATS(" Packets = %d",
  4510. pdev->stats.rx.to_stack.num);
  4511. DP_PRINT_STATS(" Bytes = %llu",
  4512. pdev->stats.rx.to_stack.bytes);
  4513. DP_PRINT_STATS("Multicast/Broadcast:");
  4514. DP_PRINT_STATS(" Packets = %d",
  4515. (pdev->stats.rx.multicast.num +
  4516. pdev->stats.rx.bcast.num));
  4517. DP_PRINT_STATS(" Bytes = %llu",
  4518. (pdev->stats.rx.multicast.bytes +
  4519. pdev->stats.rx.bcast.bytes));
  4520. DP_PRINT_STATS("Errors:");
  4521. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4522. pdev->stats.replenish.rxdma_err);
  4523. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4524. pdev->stats.err.desc_alloc_fail);
  4525. DP_PRINT_STATS(" IP checksum error = %d",
  4526. pdev->stats.err.ip_csum_err);
  4527. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  4528. pdev->stats.err.tcp_udp_csum_err);
  4529. /* Get bar_recv_cnt */
  4530. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4531. DP_PRINT_STATS("BAR Received Count: = %d",
  4532. pdev->stats.rx.bar_recv_cnt);
  4533. }
  4534. /**
  4535. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4536. * @pdev: DP_PDEV Handle
  4537. *
  4538. * Return: void
  4539. */
  4540. static inline void
  4541. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4542. {
  4543. struct cdp_pdev_mon_stats *rx_mon_stats;
  4544. rx_mon_stats = &pdev->rx_mon_stats;
  4545. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4546. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4547. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4548. rx_mon_stats->status_ppdu_done);
  4549. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4550. rx_mon_stats->dest_ppdu_done);
  4551. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4552. rx_mon_stats->dest_mpdu_done);
  4553. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4554. rx_mon_stats->dest_mpdu_drop);
  4555. }
  4556. /**
  4557. * dp_print_soc_tx_stats(): Print SOC level stats
  4558. * @soc DP_SOC Handle
  4559. *
  4560. * Return: void
  4561. */
  4562. static inline void
  4563. dp_print_soc_tx_stats(struct dp_soc *soc)
  4564. {
  4565. uint8_t desc_pool_id;
  4566. soc->stats.tx.desc_in_use = 0;
  4567. DP_PRINT_STATS("SOC Tx Stats:\n");
  4568. for (desc_pool_id = 0;
  4569. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4570. desc_pool_id++)
  4571. soc->stats.tx.desc_in_use +=
  4572. soc->tx_desc[desc_pool_id].num_allocated;
  4573. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4574. soc->stats.tx.desc_in_use);
  4575. DP_PRINT_STATS("Invalid peer:");
  4576. DP_PRINT_STATS(" Packets = %d",
  4577. soc->stats.tx.tx_invalid_peer.num);
  4578. DP_PRINT_STATS(" Bytes = %llu",
  4579. soc->stats.tx.tx_invalid_peer.bytes);
  4580. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4581. soc->stats.tx.tcl_ring_full[0],
  4582. soc->stats.tx.tcl_ring_full[1],
  4583. soc->stats.tx.tcl_ring_full[2]);
  4584. }
  4585. /**
  4586. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4587. * @soc: DP_SOC Handle
  4588. *
  4589. * Return:void
  4590. */
  4591. static inline void
  4592. dp_print_soc_rx_stats(struct dp_soc *soc)
  4593. {
  4594. uint32_t i;
  4595. char reo_error[DP_REO_ERR_LENGTH];
  4596. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4597. uint8_t index = 0;
  4598. DP_PRINT_STATS("SOC Rx Stats:\n");
  4599. DP_PRINT_STATS("Errors:\n");
  4600. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4601. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4602. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4603. DP_PRINT_STATS("Invalid RBM = %d",
  4604. soc->stats.rx.err.invalid_rbm);
  4605. DP_PRINT_STATS("Invalid Vdev = %d",
  4606. soc->stats.rx.err.invalid_vdev);
  4607. DP_PRINT_STATS("Invalid Pdev = %d",
  4608. soc->stats.rx.err.invalid_pdev);
  4609. DP_PRINT_STATS("Invalid Peer = %d",
  4610. soc->stats.rx.err.rx_invalid_peer.num);
  4611. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4612. soc->stats.rx.err.hal_ring_access_fail);
  4613. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4614. index += qdf_snprint(&rxdma_error[index],
  4615. DP_RXDMA_ERR_LENGTH - index,
  4616. " %d", soc->stats.rx.err.rxdma_error[i]);
  4617. }
  4618. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4619. rxdma_error);
  4620. index = 0;
  4621. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4622. index += qdf_snprint(&reo_error[index],
  4623. DP_REO_ERR_LENGTH - index,
  4624. " %d", soc->stats.rx.err.reo_error[i]);
  4625. }
  4626. DP_PRINT_STATS("REO Error(0-14):%s",
  4627. reo_error);
  4628. }
  4629. /**
  4630. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4631. * @soc: DP_SOC handle
  4632. * @srng: DP_SRNG handle
  4633. * @ring_name: SRNG name
  4634. *
  4635. * Return: void
  4636. */
  4637. static inline void
  4638. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4639. char *ring_name)
  4640. {
  4641. uint32_t tailp;
  4642. uint32_t headp;
  4643. if (srng->hal_srng != NULL) {
  4644. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4645. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4646. ring_name, headp, tailp);
  4647. }
  4648. }
  4649. /**
  4650. * dp_print_ring_stats(): Print tail and head pointer
  4651. * @pdev: DP_PDEV handle
  4652. *
  4653. * Return:void
  4654. */
  4655. static inline void
  4656. dp_print_ring_stats(struct dp_pdev *pdev)
  4657. {
  4658. uint32_t i;
  4659. char ring_name[STR_MAXLEN + 1];
  4660. int mac_id;
  4661. dp_print_ring_stat_from_hal(pdev->soc,
  4662. &pdev->soc->reo_exception_ring,
  4663. "Reo Exception Ring");
  4664. dp_print_ring_stat_from_hal(pdev->soc,
  4665. &pdev->soc->reo_reinject_ring,
  4666. "Reo Inject Ring");
  4667. dp_print_ring_stat_from_hal(pdev->soc,
  4668. &pdev->soc->reo_cmd_ring,
  4669. "Reo Command Ring");
  4670. dp_print_ring_stat_from_hal(pdev->soc,
  4671. &pdev->soc->reo_status_ring,
  4672. "Reo Status Ring");
  4673. dp_print_ring_stat_from_hal(pdev->soc,
  4674. &pdev->soc->rx_rel_ring,
  4675. "Rx Release ring");
  4676. dp_print_ring_stat_from_hal(pdev->soc,
  4677. &pdev->soc->tcl_cmd_ring,
  4678. "Tcl command Ring");
  4679. dp_print_ring_stat_from_hal(pdev->soc,
  4680. &pdev->soc->tcl_status_ring,
  4681. "Tcl Status Ring");
  4682. dp_print_ring_stat_from_hal(pdev->soc,
  4683. &pdev->soc->wbm_desc_rel_ring,
  4684. "Wbm Desc Rel Ring");
  4685. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4686. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4687. dp_print_ring_stat_from_hal(pdev->soc,
  4688. &pdev->soc->reo_dest_ring[i],
  4689. ring_name);
  4690. }
  4691. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4692. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4693. dp_print_ring_stat_from_hal(pdev->soc,
  4694. &pdev->soc->tcl_data_ring[i],
  4695. ring_name);
  4696. }
  4697. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4698. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4699. dp_print_ring_stat_from_hal(pdev->soc,
  4700. &pdev->soc->tx_comp_ring[i],
  4701. ring_name);
  4702. }
  4703. dp_print_ring_stat_from_hal(pdev->soc,
  4704. &pdev->rx_refill_buf_ring,
  4705. "Rx Refill Buf Ring");
  4706. dp_print_ring_stat_from_hal(pdev->soc,
  4707. &pdev->rx_refill_buf_ring2,
  4708. "Second Rx Refill Buf Ring");
  4709. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4710. dp_print_ring_stat_from_hal(pdev->soc,
  4711. &pdev->rxdma_mon_buf_ring[mac_id],
  4712. "Rxdma Mon Buf Ring");
  4713. dp_print_ring_stat_from_hal(pdev->soc,
  4714. &pdev->rxdma_mon_dst_ring[mac_id],
  4715. "Rxdma Mon Dst Ring");
  4716. dp_print_ring_stat_from_hal(pdev->soc,
  4717. &pdev->rxdma_mon_status_ring[mac_id],
  4718. "Rxdma Mon Status Ring");
  4719. dp_print_ring_stat_from_hal(pdev->soc,
  4720. &pdev->rxdma_mon_desc_ring[mac_id],
  4721. "Rxdma mon desc Ring");
  4722. }
  4723. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4724. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4725. dp_print_ring_stat_from_hal(pdev->soc,
  4726. &pdev->rxdma_err_dst_ring[i],
  4727. ring_name);
  4728. }
  4729. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4730. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4731. dp_print_ring_stat_from_hal(pdev->soc,
  4732. &pdev->rx_mac_buf_ring[i],
  4733. ring_name);
  4734. }
  4735. }
  4736. /**
  4737. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4738. * @vdev: DP_VDEV handle
  4739. *
  4740. * Return:void
  4741. */
  4742. static inline void
  4743. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4744. {
  4745. struct dp_peer *peer = NULL;
  4746. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4747. DP_STATS_CLR(vdev->pdev);
  4748. DP_STATS_CLR(vdev->pdev->soc);
  4749. DP_STATS_CLR(vdev);
  4750. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4751. if (!peer)
  4752. return;
  4753. DP_STATS_CLR(peer);
  4754. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4755. soc->cdp_soc.ol_ops->update_dp_stats(
  4756. vdev->pdev->ctrl_pdev,
  4757. &peer->stats,
  4758. peer->peer_ids[0],
  4759. UPDATE_PEER_STATS);
  4760. }
  4761. }
  4762. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4763. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->ctrl_pdev,
  4764. &vdev->stats, (uint16_t)vdev->vdev_id,
  4765. UPDATE_VDEV_STATS);
  4766. }
  4767. /**
  4768. * dp_print_rx_rates(): Print Rx rate stats
  4769. * @vdev: DP_VDEV handle
  4770. *
  4771. * Return:void
  4772. */
  4773. static inline void
  4774. dp_print_rx_rates(struct dp_vdev *vdev)
  4775. {
  4776. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4777. uint8_t i, mcs, pkt_type;
  4778. uint8_t index = 0;
  4779. char nss[DP_NSS_LENGTH];
  4780. DP_PRINT_STATS("Rx Rate Info:\n");
  4781. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4782. index = 0;
  4783. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4784. if (!dp_rate_string[pkt_type][mcs].valid)
  4785. continue;
  4786. DP_PRINT_STATS(" %s = %d",
  4787. dp_rate_string[pkt_type][mcs].mcs_type,
  4788. pdev->stats.rx.pkt_type[pkt_type].
  4789. mcs_count[mcs]);
  4790. }
  4791. DP_PRINT_STATS("\n");
  4792. }
  4793. index = 0;
  4794. for (i = 0; i < SS_COUNT; i++) {
  4795. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4796. " %d", pdev->stats.rx.nss[i]);
  4797. }
  4798. DP_PRINT_STATS("NSS(1-8) = %s",
  4799. nss);
  4800. DP_PRINT_STATS("SGI ="
  4801. " 0.8us %d,"
  4802. " 0.4us %d,"
  4803. " 1.6us %d,"
  4804. " 3.2us %d,",
  4805. pdev->stats.rx.sgi_count[0],
  4806. pdev->stats.rx.sgi_count[1],
  4807. pdev->stats.rx.sgi_count[2],
  4808. pdev->stats.rx.sgi_count[3]);
  4809. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4810. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4811. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4812. DP_PRINT_STATS("Reception Type ="
  4813. " SU: %d,"
  4814. " MU_MIMO:%d,"
  4815. " MU_OFDMA:%d,"
  4816. " MU_OFDMA_MIMO:%d\n",
  4817. pdev->stats.rx.reception_type[0],
  4818. pdev->stats.rx.reception_type[1],
  4819. pdev->stats.rx.reception_type[2],
  4820. pdev->stats.rx.reception_type[3]);
  4821. DP_PRINT_STATS("Aggregation:\n");
  4822. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4823. pdev->stats.rx.ampdu_cnt);
  4824. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4825. pdev->stats.rx.non_ampdu_cnt);
  4826. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4827. pdev->stats.rx.amsdu_cnt);
  4828. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4829. pdev->stats.rx.non_amsdu_cnt);
  4830. }
  4831. /**
  4832. * dp_print_tx_rates(): Print tx rates
  4833. * @vdev: DP_VDEV handle
  4834. *
  4835. * Return:void
  4836. */
  4837. static inline void
  4838. dp_print_tx_rates(struct dp_vdev *vdev)
  4839. {
  4840. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4841. uint8_t mcs, pkt_type;
  4842. uint32_t index;
  4843. DP_PRINT_STATS("Tx Rate Info:\n");
  4844. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4845. index = 0;
  4846. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4847. if (!dp_rate_string[pkt_type][mcs].valid)
  4848. continue;
  4849. DP_PRINT_STATS(" %s = %d",
  4850. dp_rate_string[pkt_type][mcs].mcs_type,
  4851. pdev->stats.tx.pkt_type[pkt_type].
  4852. mcs_count[mcs]);
  4853. }
  4854. DP_PRINT_STATS("\n");
  4855. }
  4856. DP_PRINT_STATS("SGI ="
  4857. " 0.8us %d"
  4858. " 0.4us %d"
  4859. " 1.6us %d"
  4860. " 3.2us %d",
  4861. pdev->stats.tx.sgi_count[0],
  4862. pdev->stats.tx.sgi_count[1],
  4863. pdev->stats.tx.sgi_count[2],
  4864. pdev->stats.tx.sgi_count[3]);
  4865. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4866. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4867. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4868. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4869. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4870. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4871. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4872. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4873. DP_PRINT_STATS("Aggregation:\n");
  4874. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4875. pdev->stats.tx.amsdu_cnt);
  4876. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4877. pdev->stats.tx.non_amsdu_cnt);
  4878. }
  4879. /**
  4880. * dp_print_peer_stats():print peer stats
  4881. * @peer: DP_PEER handle
  4882. *
  4883. * return void
  4884. */
  4885. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4886. {
  4887. uint8_t i, mcs, pkt_type;
  4888. uint32_t index;
  4889. char nss[DP_NSS_LENGTH];
  4890. DP_PRINT_STATS("Node Tx Stats:\n");
  4891. DP_PRINT_STATS("Total Packet Completions = %d",
  4892. peer->stats.tx.comp_pkt.num);
  4893. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4894. peer->stats.tx.comp_pkt.bytes);
  4895. DP_PRINT_STATS("Success Packets = %d",
  4896. peer->stats.tx.tx_success.num);
  4897. DP_PRINT_STATS("Success Bytes = %llu",
  4898. peer->stats.tx.tx_success.bytes);
  4899. DP_PRINT_STATS("Unicast Success Packets = %d",
  4900. peer->stats.tx.ucast.num);
  4901. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4902. peer->stats.tx.ucast.bytes);
  4903. DP_PRINT_STATS("Multicast Success Packets = %d",
  4904. peer->stats.tx.mcast.num);
  4905. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4906. peer->stats.tx.mcast.bytes);
  4907. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4908. peer->stats.tx.bcast.num);
  4909. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4910. peer->stats.tx.bcast.bytes);
  4911. DP_PRINT_STATS("Packets Failed = %d",
  4912. peer->stats.tx.tx_failed);
  4913. DP_PRINT_STATS("Packets In OFDMA = %d",
  4914. peer->stats.tx.ofdma);
  4915. DP_PRINT_STATS("Packets In STBC = %d",
  4916. peer->stats.tx.stbc);
  4917. DP_PRINT_STATS("Packets In LDPC = %d",
  4918. peer->stats.tx.ldpc);
  4919. DP_PRINT_STATS("Packet Retries = %d",
  4920. peer->stats.tx.retries);
  4921. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4922. peer->stats.tx.amsdu_cnt);
  4923. DP_PRINT_STATS("Last Packet RSSI = %d",
  4924. peer->stats.tx.last_ack_rssi);
  4925. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4926. peer->stats.tx.dropped.fw_rem);
  4927. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4928. peer->stats.tx.dropped.fw_rem_tx);
  4929. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4930. peer->stats.tx.dropped.fw_rem_notx);
  4931. DP_PRINT_STATS("Dropped : Age Out = %d",
  4932. peer->stats.tx.dropped.age_out);
  4933. DP_PRINT_STATS("NAWDS : ");
  4934. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4935. peer->stats.tx.nawds_mcast_drop);
  4936. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4937. peer->stats.tx.nawds_mcast.num);
  4938. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4939. peer->stats.tx.nawds_mcast.bytes);
  4940. DP_PRINT_STATS("Rate Info:");
  4941. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4942. index = 0;
  4943. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4944. if (!dp_rate_string[pkt_type][mcs].valid)
  4945. continue;
  4946. DP_PRINT_STATS(" %s = %d",
  4947. dp_rate_string[pkt_type][mcs].mcs_type,
  4948. peer->stats.tx.pkt_type[pkt_type].
  4949. mcs_count[mcs]);
  4950. }
  4951. DP_PRINT_STATS("\n");
  4952. }
  4953. DP_PRINT_STATS("SGI = "
  4954. " 0.8us %d"
  4955. " 0.4us %d"
  4956. " 1.6us %d"
  4957. " 3.2us %d",
  4958. peer->stats.tx.sgi_count[0],
  4959. peer->stats.tx.sgi_count[1],
  4960. peer->stats.tx.sgi_count[2],
  4961. peer->stats.tx.sgi_count[3]);
  4962. DP_PRINT_STATS("Excess Retries per AC ");
  4963. DP_PRINT_STATS(" Best effort = %d",
  4964. peer->stats.tx.excess_retries_per_ac[0]);
  4965. DP_PRINT_STATS(" Background= %d",
  4966. peer->stats.tx.excess_retries_per_ac[1]);
  4967. DP_PRINT_STATS(" Video = %d",
  4968. peer->stats.tx.excess_retries_per_ac[2]);
  4969. DP_PRINT_STATS(" Voice = %d",
  4970. peer->stats.tx.excess_retries_per_ac[3]);
  4971. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4972. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4973. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4974. index = 0;
  4975. for (i = 0; i < SS_COUNT; i++) {
  4976. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4977. " %d", peer->stats.tx.nss[i]);
  4978. }
  4979. DP_PRINT_STATS("NSS(1-8) = %s",
  4980. nss);
  4981. DP_PRINT_STATS("Aggregation:");
  4982. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4983. peer->stats.tx.amsdu_cnt);
  4984. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4985. peer->stats.tx.non_amsdu_cnt);
  4986. DP_PRINT_STATS("Node Rx Stats:");
  4987. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4988. peer->stats.rx.to_stack.num);
  4989. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4990. peer->stats.rx.to_stack.bytes);
  4991. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4992. DP_PRINT_STATS("Ring Id = %d", i);
  4993. DP_PRINT_STATS(" Packets Received = %d",
  4994. peer->stats.rx.rcvd_reo[i].num);
  4995. DP_PRINT_STATS(" Bytes Received = %llu",
  4996. peer->stats.rx.rcvd_reo[i].bytes);
  4997. }
  4998. DP_PRINT_STATS("Multicast Packets Received = %d",
  4999. peer->stats.rx.multicast.num);
  5000. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  5001. peer->stats.rx.multicast.bytes);
  5002. DP_PRINT_STATS("Broadcast Packets Received = %d",
  5003. peer->stats.rx.bcast.num);
  5004. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  5005. peer->stats.rx.bcast.bytes);
  5006. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  5007. peer->stats.rx.intra_bss.pkts.num);
  5008. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  5009. peer->stats.rx.intra_bss.pkts.bytes);
  5010. DP_PRINT_STATS("Raw Packets Received = %d",
  5011. peer->stats.rx.raw.num);
  5012. DP_PRINT_STATS("Raw Bytes Received = %llu",
  5013. peer->stats.rx.raw.bytes);
  5014. DP_PRINT_STATS("Errors: MIC Errors = %d",
  5015. peer->stats.rx.err.mic_err);
  5016. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  5017. peer->stats.rx.err.decrypt_err);
  5018. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  5019. peer->stats.rx.non_ampdu_cnt);
  5020. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  5021. peer->stats.rx.ampdu_cnt);
  5022. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  5023. peer->stats.rx.non_amsdu_cnt);
  5024. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5025. peer->stats.rx.amsdu_cnt);
  5026. DP_PRINT_STATS("NAWDS : ");
  5027. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5028. peer->stats.rx.nawds_mcast_drop);
  5029. DP_PRINT_STATS("SGI ="
  5030. " 0.8us %d"
  5031. " 0.4us %d"
  5032. " 1.6us %d"
  5033. " 3.2us %d",
  5034. peer->stats.rx.sgi_count[0],
  5035. peer->stats.rx.sgi_count[1],
  5036. peer->stats.rx.sgi_count[2],
  5037. peer->stats.rx.sgi_count[3]);
  5038. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5039. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5040. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5041. DP_PRINT_STATS("Reception Type ="
  5042. " SU %d,"
  5043. " MU_MIMO %d,"
  5044. " MU_OFDMA %d,"
  5045. " MU_OFDMA_MIMO %d",
  5046. peer->stats.rx.reception_type[0],
  5047. peer->stats.rx.reception_type[1],
  5048. peer->stats.rx.reception_type[2],
  5049. peer->stats.rx.reception_type[3]);
  5050. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5051. index = 0;
  5052. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5053. if (!dp_rate_string[pkt_type][mcs].valid)
  5054. continue;
  5055. DP_PRINT_STATS(" %s = %d",
  5056. dp_rate_string[pkt_type][mcs].mcs_type,
  5057. peer->stats.rx.pkt_type[pkt_type].
  5058. mcs_count[mcs]);
  5059. }
  5060. DP_PRINT_STATS("\n");
  5061. }
  5062. index = 0;
  5063. for (i = 0; i < SS_COUNT; i++) {
  5064. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5065. " %d", peer->stats.rx.nss[i]);
  5066. }
  5067. DP_PRINT_STATS("NSS(1-8) = %s",
  5068. nss);
  5069. DP_PRINT_STATS("Aggregation:");
  5070. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5071. peer->stats.rx.ampdu_cnt);
  5072. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5073. peer->stats.rx.non_ampdu_cnt);
  5074. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5075. peer->stats.rx.amsdu_cnt);
  5076. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5077. peer->stats.rx.non_amsdu_cnt);
  5078. }
  5079. /**
  5080. * dp_print_host_stats()- Function to print the stats aggregated at host
  5081. * @vdev_handle: DP_VDEV handle
  5082. * @type: host stats type
  5083. *
  5084. * Available Stat types
  5085. * TXRX_CLEAR_STATS : Clear the stats
  5086. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5087. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5088. * TXRX_TX_HOST_STATS: Print Tx Stats
  5089. * TXRX_RX_HOST_STATS: Print Rx Stats
  5090. * TXRX_AST_STATS: Print AST Stats
  5091. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5092. *
  5093. * Return: 0 on success, print error message in case of failure
  5094. */
  5095. static int
  5096. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  5097. {
  5098. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5099. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5100. dp_aggregate_pdev_stats(pdev);
  5101. switch (type) {
  5102. case TXRX_CLEAR_STATS:
  5103. dp_txrx_host_stats_clr(vdev);
  5104. break;
  5105. case TXRX_RX_RATE_STATS:
  5106. dp_print_rx_rates(vdev);
  5107. break;
  5108. case TXRX_TX_RATE_STATS:
  5109. dp_print_tx_rates(vdev);
  5110. break;
  5111. case TXRX_TX_HOST_STATS:
  5112. dp_print_pdev_tx_stats(pdev);
  5113. dp_print_soc_tx_stats(pdev->soc);
  5114. break;
  5115. case TXRX_RX_HOST_STATS:
  5116. dp_print_pdev_rx_stats(pdev);
  5117. dp_print_soc_rx_stats(pdev->soc);
  5118. break;
  5119. case TXRX_AST_STATS:
  5120. dp_print_ast_stats(pdev->soc);
  5121. dp_print_peer_table(vdev);
  5122. break;
  5123. case TXRX_SRNG_PTR_STATS:
  5124. dp_print_ring_stats(pdev);
  5125. break;
  5126. case TXRX_RX_MON_STATS:
  5127. dp_print_pdev_rx_mon_stats(pdev);
  5128. break;
  5129. default:
  5130. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5131. break;
  5132. }
  5133. return 0;
  5134. }
  5135. /*
  5136. * dp_get_host_peer_stats()- function to print peer stats
  5137. * @pdev_handle: DP_PDEV handle
  5138. * @mac_addr: mac address of the peer
  5139. *
  5140. * Return: void
  5141. */
  5142. static void
  5143. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5144. {
  5145. struct dp_peer *peer;
  5146. uint8_t local_id;
  5147. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5148. &local_id);
  5149. if (!peer) {
  5150. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5151. "%s: Invalid peer\n", __func__);
  5152. return;
  5153. }
  5154. dp_print_peer_stats(peer);
  5155. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5156. return;
  5157. }
  5158. /*
  5159. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5160. * @pdev: DP_PDEV handle
  5161. *
  5162. * Return: void
  5163. */
  5164. static void
  5165. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5166. {
  5167. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5168. int mac_id;
  5169. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5170. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5171. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5172. pdev->pdev_id);
  5173. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5174. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5175. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5176. }
  5177. }
  5178. /*
  5179. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5180. * @pdev: DP_PDEV handle
  5181. *
  5182. * Return: void
  5183. */
  5184. static void
  5185. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5186. {
  5187. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5188. int mac_id;
  5189. htt_tlv_filter.mpdu_start = 1;
  5190. htt_tlv_filter.msdu_start = 0;
  5191. htt_tlv_filter.packet = 0;
  5192. htt_tlv_filter.msdu_end = 0;
  5193. htt_tlv_filter.mpdu_end = 0;
  5194. htt_tlv_filter.attention = 0;
  5195. htt_tlv_filter.ppdu_start = 1;
  5196. htt_tlv_filter.ppdu_end = 1;
  5197. htt_tlv_filter.ppdu_end_user_stats = 1;
  5198. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5199. htt_tlv_filter.ppdu_end_status_done = 1;
  5200. htt_tlv_filter.enable_fp = 1;
  5201. htt_tlv_filter.enable_md = 0;
  5202. if (pdev->mcopy_mode) {
  5203. htt_tlv_filter.packet_header = 1;
  5204. htt_tlv_filter.enable_mo = 1;
  5205. }
  5206. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5207. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5208. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5209. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5210. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5211. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5212. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5213. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5214. pdev->pdev_id);
  5215. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5216. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5217. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5218. }
  5219. }
  5220. /*
  5221. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5222. *@pdev_handle: DP_PDEV handle.
  5223. *@val: Provided value.
  5224. *
  5225. *Return: void
  5226. */
  5227. static void
  5228. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5229. {
  5230. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5231. switch (val) {
  5232. case CDP_BPR_DISABLE:
  5233. pdev->bpr_enable = CDP_BPR_DISABLE;
  5234. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5235. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5236. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5237. } else if (pdev->enhanced_stats_en &&
  5238. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5239. !pdev->pktlog_ppdu_stats) {
  5240. dp_h2t_cfg_stats_msg_send(pdev,
  5241. DP_PPDU_STATS_CFG_ENH_STATS,
  5242. pdev->pdev_id);
  5243. }
  5244. break;
  5245. case CDP_BPR_ENABLE:
  5246. pdev->bpr_enable = CDP_BPR_ENABLE;
  5247. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5248. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5249. dp_h2t_cfg_stats_msg_send(pdev,
  5250. DP_PPDU_STATS_CFG_BPR,
  5251. pdev->pdev_id);
  5252. } else if (pdev->enhanced_stats_en &&
  5253. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5254. !pdev->pktlog_ppdu_stats) {
  5255. dp_h2t_cfg_stats_msg_send(pdev,
  5256. DP_PPDU_STATS_CFG_BPR_ENH,
  5257. pdev->pdev_id);
  5258. } else if (pdev->pktlog_ppdu_stats) {
  5259. dp_h2t_cfg_stats_msg_send(pdev,
  5260. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5261. pdev->pdev_id);
  5262. }
  5263. break;
  5264. default:
  5265. break;
  5266. }
  5267. }
  5268. /*
  5269. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5270. * @pdev_handle: DP_PDEV handle
  5271. * @val: user provided value
  5272. *
  5273. * Return: void
  5274. */
  5275. static void
  5276. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5277. {
  5278. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5279. switch (val) {
  5280. case 0:
  5281. pdev->tx_sniffer_enable = 0;
  5282. pdev->mcopy_mode = 0;
  5283. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5284. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5285. dp_ppdu_ring_reset(pdev);
  5286. } else if (pdev->enhanced_stats_en) {
  5287. dp_h2t_cfg_stats_msg_send(pdev,
  5288. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5289. }
  5290. break;
  5291. case 1:
  5292. pdev->tx_sniffer_enable = 1;
  5293. pdev->mcopy_mode = 0;
  5294. if (!pdev->pktlog_ppdu_stats)
  5295. dp_h2t_cfg_stats_msg_send(pdev,
  5296. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5297. break;
  5298. case 2:
  5299. pdev->mcopy_mode = 1;
  5300. pdev->tx_sniffer_enable = 0;
  5301. if (!pdev->enhanced_stats_en)
  5302. dp_ppdu_ring_cfg(pdev);
  5303. if (!pdev->pktlog_ppdu_stats)
  5304. dp_h2t_cfg_stats_msg_send(pdev,
  5305. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5306. break;
  5307. default:
  5308. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5309. "Invalid value\n");
  5310. break;
  5311. }
  5312. }
  5313. /*
  5314. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5315. * @pdev_handle: DP_PDEV handle
  5316. *
  5317. * Return: void
  5318. */
  5319. static void
  5320. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5321. {
  5322. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5323. pdev->enhanced_stats_en = 1;
  5324. if (!pdev->mcopy_mode)
  5325. dp_ppdu_ring_cfg(pdev);
  5326. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5327. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5328. }
  5329. /*
  5330. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5331. * @pdev_handle: DP_PDEV handle
  5332. *
  5333. * Return: void
  5334. */
  5335. static void
  5336. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5337. {
  5338. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5339. pdev->enhanced_stats_en = 0;
  5340. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5341. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5342. if (!pdev->mcopy_mode)
  5343. dp_ppdu_ring_reset(pdev);
  5344. }
  5345. /*
  5346. * dp_get_fw_peer_stats()- function to print peer stats
  5347. * @pdev_handle: DP_PDEV handle
  5348. * @mac_addr: mac address of the peer
  5349. * @cap: Type of htt stats requested
  5350. *
  5351. * Currently Supporting only MAC ID based requests Only
  5352. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5353. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5354. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5355. *
  5356. * Return: void
  5357. */
  5358. static void
  5359. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5360. uint32_t cap)
  5361. {
  5362. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5363. int i;
  5364. uint32_t config_param0 = 0;
  5365. uint32_t config_param1 = 0;
  5366. uint32_t config_param2 = 0;
  5367. uint32_t config_param3 = 0;
  5368. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5369. config_param0 |= (1 << (cap + 1));
  5370. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5371. config_param1 |= (1 << i);
  5372. }
  5373. config_param2 |= (mac_addr[0] & 0x000000ff);
  5374. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5375. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5376. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5377. config_param3 |= (mac_addr[4] & 0x000000ff);
  5378. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5379. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5380. config_param0, config_param1, config_param2,
  5381. config_param3, 0, 0, 0);
  5382. }
  5383. /* This struct definition will be removed from here
  5384. * once it get added in FW headers*/
  5385. struct httstats_cmd_req {
  5386. uint32_t config_param0;
  5387. uint32_t config_param1;
  5388. uint32_t config_param2;
  5389. uint32_t config_param3;
  5390. int cookie;
  5391. u_int8_t stats_id;
  5392. };
  5393. /*
  5394. * dp_get_htt_stats: function to process the httstas request
  5395. * @pdev_handle: DP pdev handle
  5396. * @data: pointer to request data
  5397. * @data_len: length for request data
  5398. *
  5399. * return: void
  5400. */
  5401. static void
  5402. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5403. {
  5404. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5405. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5406. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5407. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5408. req->config_param0, req->config_param1,
  5409. req->config_param2, req->config_param3,
  5410. req->cookie, 0, 0);
  5411. }
  5412. /*
  5413. * dp_set_pdev_param: function to set parameters in pdev
  5414. * @pdev_handle: DP pdev handle
  5415. * @param: parameter type to be set
  5416. * @val: value of parameter to be set
  5417. *
  5418. * return: void
  5419. */
  5420. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5421. enum cdp_pdev_param_type param, uint8_t val)
  5422. {
  5423. switch (param) {
  5424. case CDP_CONFIG_DEBUG_SNIFFER:
  5425. dp_config_debug_sniffer(pdev_handle, val);
  5426. break;
  5427. case CDP_CONFIG_BPR_ENABLE:
  5428. dp_set_bpr_enable(pdev_handle, val);
  5429. break;
  5430. default:
  5431. break;
  5432. }
  5433. }
  5434. /*
  5435. * dp_set_vdev_param: function to set parameters in vdev
  5436. * @param: parameter type to be set
  5437. * @val: value of parameter to be set
  5438. *
  5439. * return: void
  5440. */
  5441. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5442. enum cdp_vdev_param_type param, uint32_t val)
  5443. {
  5444. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5445. switch (param) {
  5446. case CDP_ENABLE_WDS:
  5447. vdev->wds_enabled = val;
  5448. break;
  5449. case CDP_ENABLE_NAWDS:
  5450. vdev->nawds_enabled = val;
  5451. break;
  5452. case CDP_ENABLE_MCAST_EN:
  5453. vdev->mcast_enhancement_en = val;
  5454. break;
  5455. case CDP_ENABLE_PROXYSTA:
  5456. vdev->proxysta_vdev = val;
  5457. break;
  5458. case CDP_UPDATE_TDLS_FLAGS:
  5459. vdev->tdls_link_connected = val;
  5460. break;
  5461. case CDP_CFG_WDS_AGING_TIMER:
  5462. if (val == 0)
  5463. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5464. else if (val != vdev->wds_aging_timer_val)
  5465. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5466. vdev->wds_aging_timer_val = val;
  5467. break;
  5468. case CDP_ENABLE_AP_BRIDGE:
  5469. if (wlan_op_mode_sta != vdev->opmode)
  5470. vdev->ap_bridge_enabled = val;
  5471. else
  5472. vdev->ap_bridge_enabled = false;
  5473. break;
  5474. case CDP_ENABLE_CIPHER:
  5475. vdev->sec_type = val;
  5476. break;
  5477. case CDP_ENABLE_QWRAP_ISOLATION:
  5478. vdev->isolation_vdev = val;
  5479. break;
  5480. default:
  5481. break;
  5482. }
  5483. dp_tx_vdev_update_search_flags(vdev);
  5484. }
  5485. /**
  5486. * dp_peer_set_nawds: set nawds bit in peer
  5487. * @peer_handle: pointer to peer
  5488. * @value: enable/disable nawds
  5489. *
  5490. * return: void
  5491. */
  5492. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5493. {
  5494. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5495. peer->nawds_enabled = value;
  5496. }
  5497. /*
  5498. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5499. * @vdev_handle: DP_VDEV handle
  5500. * @map_id:ID of map that needs to be updated
  5501. *
  5502. * Return: void
  5503. */
  5504. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5505. uint8_t map_id)
  5506. {
  5507. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5508. vdev->dscp_tid_map_id = map_id;
  5509. return;
  5510. }
  5511. /*
  5512. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5513. * @pdev_handle: DP_PDEV handle
  5514. * @buf: to hold pdev_stats
  5515. *
  5516. * Return: int
  5517. */
  5518. static int
  5519. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5520. {
  5521. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5522. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5523. struct cdp_txrx_stats_req req = {0,};
  5524. dp_aggregate_pdev_stats(pdev);
  5525. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5526. req.cookie_val = 1;
  5527. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5528. req.param1, req.param2, req.param3, 0,
  5529. req.cookie_val, 0);
  5530. msleep(DP_MAX_SLEEP_TIME);
  5531. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5532. req.cookie_val = 1;
  5533. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5534. req.param1, req.param2, req.param3, 0,
  5535. req.cookie_val, 0);
  5536. msleep(DP_MAX_SLEEP_TIME);
  5537. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5538. return TXRX_STATS_LEVEL;
  5539. }
  5540. /**
  5541. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5542. * @pdev: DP_PDEV handle
  5543. * @map_id: ID of map that needs to be updated
  5544. * @tos: index value in map
  5545. * @tid: tid value passed by the user
  5546. *
  5547. * Return: void
  5548. */
  5549. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5550. uint8_t map_id, uint8_t tos, uint8_t tid)
  5551. {
  5552. uint8_t dscp;
  5553. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5554. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5555. pdev->dscp_tid_map[map_id][dscp] = tid;
  5556. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5557. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5558. map_id, dscp);
  5559. return;
  5560. }
  5561. /**
  5562. * dp_fw_stats_process(): Process TxRX FW stats request
  5563. * @vdev_handle: DP VDEV handle
  5564. * @req: stats request
  5565. *
  5566. * return: int
  5567. */
  5568. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5569. struct cdp_txrx_stats_req *req)
  5570. {
  5571. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5572. struct dp_pdev *pdev = NULL;
  5573. uint32_t stats = req->stats;
  5574. uint8_t mac_id = req->mac_id;
  5575. if (!vdev) {
  5576. DP_TRACE(NONE, "VDEV not found");
  5577. return 1;
  5578. }
  5579. pdev = vdev->pdev;
  5580. /*
  5581. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5582. * from param0 to param3 according to below rule:
  5583. *
  5584. * PARAM:
  5585. * - config_param0 : start_offset (stats type)
  5586. * - config_param1 : stats bmask from start offset
  5587. * - config_param2 : stats bmask from start offset + 32
  5588. * - config_param3 : stats bmask from start offset + 64
  5589. */
  5590. if (req->stats == CDP_TXRX_STATS_0) {
  5591. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5592. req->param1 = 0xFFFFFFFF;
  5593. req->param2 = 0xFFFFFFFF;
  5594. req->param3 = 0xFFFFFFFF;
  5595. }
  5596. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5597. req->param1, req->param2, req->param3,
  5598. 0, 0, mac_id);
  5599. }
  5600. /**
  5601. * dp_txrx_stats_request - function to map to firmware and host stats
  5602. * @vdev: virtual handle
  5603. * @req: stats request
  5604. *
  5605. * Return: integer
  5606. */
  5607. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5608. struct cdp_txrx_stats_req *req)
  5609. {
  5610. int host_stats;
  5611. int fw_stats;
  5612. enum cdp_stats stats;
  5613. if (!vdev || !req) {
  5614. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5615. "Invalid vdev/req instance");
  5616. return 0;
  5617. }
  5618. stats = req->stats;
  5619. if (stats >= CDP_TXRX_MAX_STATS)
  5620. return 0;
  5621. /*
  5622. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5623. * has to be updated if new FW HTT stats added
  5624. */
  5625. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5626. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5627. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5628. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5630. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5631. stats, fw_stats, host_stats);
  5632. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5633. /* update request with FW stats type */
  5634. req->stats = fw_stats;
  5635. return dp_fw_stats_process(vdev, req);
  5636. }
  5637. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5638. (host_stats <= TXRX_HOST_STATS_MAX))
  5639. return dp_print_host_stats(vdev, host_stats);
  5640. else
  5641. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5642. "Wrong Input for TxRx Stats");
  5643. return 0;
  5644. }
  5645. /*
  5646. * dp_print_napi_stats(): NAPI stats
  5647. * @soc - soc handle
  5648. */
  5649. static void dp_print_napi_stats(struct dp_soc *soc)
  5650. {
  5651. hif_print_napi_stats(soc->hif_handle);
  5652. }
  5653. /*
  5654. * dp_print_per_ring_stats(): Packet count per ring
  5655. * @soc - soc handle
  5656. */
  5657. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5658. {
  5659. uint8_t ring;
  5660. uint16_t core;
  5661. uint64_t total_packets;
  5662. DP_TRACE(FATAL, "Reo packets per ring:");
  5663. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5664. total_packets = 0;
  5665. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5666. for (core = 0; core < NR_CPUS; core++) {
  5667. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5668. core, soc->stats.rx.ring_packets[core][ring]);
  5669. total_packets += soc->stats.rx.ring_packets[core][ring];
  5670. }
  5671. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5672. ring, total_packets);
  5673. }
  5674. }
  5675. /*
  5676. * dp_txrx_path_stats() - Function to display dump stats
  5677. * @soc - soc handle
  5678. *
  5679. * return: none
  5680. */
  5681. static void dp_txrx_path_stats(struct dp_soc *soc)
  5682. {
  5683. uint8_t error_code;
  5684. uint8_t loop_pdev;
  5685. struct dp_pdev *pdev;
  5686. uint8_t i;
  5687. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5688. pdev = soc->pdev_list[loop_pdev];
  5689. dp_aggregate_pdev_stats(pdev);
  5690. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5691. "Tx path Statistics:");
  5692. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5693. pdev->stats.tx_i.rcvd.num,
  5694. pdev->stats.tx_i.rcvd.bytes);
  5695. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5696. pdev->stats.tx_i.processed.num,
  5697. pdev->stats.tx_i.processed.bytes);
  5698. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5699. pdev->stats.tx.tx_success.num,
  5700. pdev->stats.tx.tx_success.bytes);
  5701. DP_TRACE(FATAL, "Dropped in host:");
  5702. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5703. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5704. DP_TRACE(FATAL, "Descriptor not available: %u",
  5705. pdev->stats.tx_i.dropped.desc_na);
  5706. DP_TRACE(FATAL, "Ring full: %u",
  5707. pdev->stats.tx_i.dropped.ring_full);
  5708. DP_TRACE(FATAL, "Enqueue fail: %u",
  5709. pdev->stats.tx_i.dropped.enqueue_fail);
  5710. DP_TRACE(FATAL, "DMA Error: %u",
  5711. pdev->stats.tx_i.dropped.dma_error);
  5712. DP_TRACE(FATAL, "Dropped in hardware:");
  5713. DP_TRACE(FATAL, "total packets dropped: %u",
  5714. pdev->stats.tx.tx_failed);
  5715. DP_TRACE(FATAL, "mpdu age out: %u",
  5716. pdev->stats.tx.dropped.age_out);
  5717. DP_TRACE(FATAL, "firmware removed: %u",
  5718. pdev->stats.tx.dropped.fw_rem);
  5719. DP_TRACE(FATAL, "firmware removed tx: %u",
  5720. pdev->stats.tx.dropped.fw_rem_tx);
  5721. DP_TRACE(FATAL, "firmware removed notx %u",
  5722. pdev->stats.tx.dropped.fw_rem_notx);
  5723. DP_TRACE(FATAL, "peer_invalid: %u",
  5724. pdev->soc->stats.tx.tx_invalid_peer.num);
  5725. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5726. DP_TRACE(FATAL, "Single Packet: %u",
  5727. pdev->stats.tx_comp_histogram.pkts_1);
  5728. DP_TRACE(FATAL, "2-20 Packets: %u",
  5729. pdev->stats.tx_comp_histogram.pkts_2_20);
  5730. DP_TRACE(FATAL, "21-40 Packets: %u",
  5731. pdev->stats.tx_comp_histogram.pkts_21_40);
  5732. DP_TRACE(FATAL, "41-60 Packets: %u",
  5733. pdev->stats.tx_comp_histogram.pkts_41_60);
  5734. DP_TRACE(FATAL, "61-80 Packets: %u",
  5735. pdev->stats.tx_comp_histogram.pkts_61_80);
  5736. DP_TRACE(FATAL, "81-100 Packets: %u",
  5737. pdev->stats.tx_comp_histogram.pkts_81_100);
  5738. DP_TRACE(FATAL, "101-200 Packets: %u",
  5739. pdev->stats.tx_comp_histogram.pkts_101_200);
  5740. DP_TRACE(FATAL, " 201+ Packets: %u",
  5741. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5742. DP_TRACE(FATAL, "Rx path statistics");
  5743. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5744. pdev->stats.rx.to_stack.num,
  5745. pdev->stats.rx.to_stack.bytes);
  5746. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5747. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5748. i, pdev->stats.rx.rcvd_reo[i].num,
  5749. pdev->stats.rx.rcvd_reo[i].bytes);
  5750. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5751. pdev->stats.rx.intra_bss.pkts.num,
  5752. pdev->stats.rx.intra_bss.pkts.bytes);
  5753. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5754. pdev->stats.rx.intra_bss.fail.num,
  5755. pdev->stats.rx.intra_bss.fail.bytes);
  5756. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5757. pdev->stats.rx.raw.num,
  5758. pdev->stats.rx.raw.bytes);
  5759. DP_TRACE(FATAL, "dropped: error %u msdus",
  5760. pdev->stats.rx.err.mic_err);
  5761. DP_TRACE(FATAL, "peer invalid %u",
  5762. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5763. DP_TRACE(FATAL, "Reo Statistics");
  5764. DP_TRACE(FATAL, "rbm error: %u msdus",
  5765. pdev->soc->stats.rx.err.invalid_rbm);
  5766. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5767. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5768. DP_TRACE(FATAL, "Reo errors");
  5769. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5770. error_code++) {
  5771. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5772. error_code,
  5773. pdev->soc->stats.rx.err.reo_error[error_code]);
  5774. }
  5775. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5776. error_code++) {
  5777. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5778. error_code,
  5779. pdev->soc->stats.rx.err
  5780. .rxdma_error[error_code]);
  5781. }
  5782. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5783. DP_TRACE(FATAL, "Single Packet: %u",
  5784. pdev->stats.rx_ind_histogram.pkts_1);
  5785. DP_TRACE(FATAL, "2-20 Packets: %u",
  5786. pdev->stats.rx_ind_histogram.pkts_2_20);
  5787. DP_TRACE(FATAL, "21-40 Packets: %u",
  5788. pdev->stats.rx_ind_histogram.pkts_21_40);
  5789. DP_TRACE(FATAL, "41-60 Packets: %u",
  5790. pdev->stats.rx_ind_histogram.pkts_41_60);
  5791. DP_TRACE(FATAL, "61-80 Packets: %u",
  5792. pdev->stats.rx_ind_histogram.pkts_61_80);
  5793. DP_TRACE(FATAL, "81-100 Packets: %u",
  5794. pdev->stats.rx_ind_histogram.pkts_81_100);
  5795. DP_TRACE(FATAL, "101-200 Packets: %u",
  5796. pdev->stats.rx_ind_histogram.pkts_101_200);
  5797. DP_TRACE(FATAL, " 201+ Packets: %u",
  5798. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5799. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5800. __func__,
  5801. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5802. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5803. pdev->soc->wlan_cfg_ctx->rx_hash,
  5804. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5805. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5806. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5807. __func__,
  5808. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5809. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5810. #endif
  5811. }
  5812. }
  5813. /*
  5814. * dp_txrx_dump_stats() - Dump statistics
  5815. * @value - Statistics option
  5816. */
  5817. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5818. enum qdf_stats_verbosity_level level)
  5819. {
  5820. struct dp_soc *soc =
  5821. (struct dp_soc *)psoc;
  5822. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5823. if (!soc) {
  5824. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5825. "%s: soc is NULL", __func__);
  5826. return QDF_STATUS_E_INVAL;
  5827. }
  5828. switch (value) {
  5829. case CDP_TXRX_PATH_STATS:
  5830. dp_txrx_path_stats(soc);
  5831. break;
  5832. case CDP_RX_RING_STATS:
  5833. dp_print_per_ring_stats(soc);
  5834. break;
  5835. case CDP_TXRX_TSO_STATS:
  5836. /* TODO: NOT IMPLEMENTED */
  5837. break;
  5838. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5839. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5840. break;
  5841. case CDP_DP_NAPI_STATS:
  5842. dp_print_napi_stats(soc);
  5843. break;
  5844. case CDP_TXRX_DESC_STATS:
  5845. /* TODO: NOT IMPLEMENTED */
  5846. break;
  5847. default:
  5848. status = QDF_STATUS_E_INVAL;
  5849. break;
  5850. }
  5851. return status;
  5852. }
  5853. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5854. /**
  5855. * dp_update_flow_control_parameters() - API to store datapath
  5856. * config parameters
  5857. * @soc: soc handle
  5858. * @cfg: ini parameter handle
  5859. *
  5860. * Return: void
  5861. */
  5862. static inline
  5863. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5864. struct cdp_config_params *params)
  5865. {
  5866. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5867. params->tx_flow_stop_queue_threshold;
  5868. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5869. params->tx_flow_start_queue_offset;
  5870. }
  5871. #else
  5872. static inline
  5873. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5874. struct cdp_config_params *params)
  5875. {
  5876. }
  5877. #endif
  5878. /**
  5879. * dp_update_config_parameters() - API to store datapath
  5880. * config parameters
  5881. * @soc: soc handle
  5882. * @cfg: ini parameter handle
  5883. *
  5884. * Return: status
  5885. */
  5886. static
  5887. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5888. struct cdp_config_params *params)
  5889. {
  5890. struct dp_soc *soc = (struct dp_soc *)psoc;
  5891. if (!(soc)) {
  5892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5893. "%s: Invalid handle", __func__);
  5894. return QDF_STATUS_E_INVAL;
  5895. }
  5896. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5897. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5898. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5899. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5900. params->tcp_udp_checksumoffload;
  5901. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5902. dp_update_flow_control_parameters(soc, params);
  5903. return QDF_STATUS_SUCCESS;
  5904. }
  5905. /**
  5906. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5907. * config parameters
  5908. * @vdev_handle - datapath vdev handle
  5909. * @cfg: ini parameter handle
  5910. *
  5911. * Return: status
  5912. */
  5913. #ifdef WDS_VENDOR_EXTENSION
  5914. void
  5915. dp_txrx_set_wds_rx_policy(
  5916. struct cdp_vdev *vdev_handle,
  5917. u_int32_t val)
  5918. {
  5919. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5920. struct dp_peer *peer;
  5921. if (vdev->opmode == wlan_op_mode_ap) {
  5922. /* for ap, set it on bss_peer */
  5923. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5924. if (peer->bss_peer) {
  5925. peer->wds_ecm.wds_rx_filter = 1;
  5926. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5927. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5928. break;
  5929. }
  5930. }
  5931. } else if (vdev->opmode == wlan_op_mode_sta) {
  5932. peer = TAILQ_FIRST(&vdev->peer_list);
  5933. peer->wds_ecm.wds_rx_filter = 1;
  5934. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5935. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5936. }
  5937. }
  5938. /**
  5939. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5940. *
  5941. * @peer_handle - datapath peer handle
  5942. * @wds_tx_ucast: policy for unicast transmission
  5943. * @wds_tx_mcast: policy for multicast transmission
  5944. *
  5945. * Return: void
  5946. */
  5947. void
  5948. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5949. int wds_tx_ucast, int wds_tx_mcast)
  5950. {
  5951. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5952. if (wds_tx_ucast || wds_tx_mcast) {
  5953. peer->wds_enabled = 1;
  5954. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5955. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5956. } else {
  5957. peer->wds_enabled = 0;
  5958. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5959. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5960. }
  5961. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5962. FL("Policy Update set to :\
  5963. peer->wds_enabled %d\
  5964. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5965. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5966. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5967. peer->wds_ecm.wds_tx_mcast_4addr);
  5968. return;
  5969. }
  5970. #endif
  5971. static struct cdp_wds_ops dp_ops_wds = {
  5972. .vdev_set_wds = dp_vdev_set_wds,
  5973. #ifdef WDS_VENDOR_EXTENSION
  5974. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5975. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5976. #endif
  5977. };
  5978. /*
  5979. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5980. * @vdev_handle - datapath vdev handle
  5981. * @callback - callback function
  5982. * @ctxt: callback context
  5983. *
  5984. */
  5985. static void
  5986. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5987. ol_txrx_data_tx_cb callback, void *ctxt)
  5988. {
  5989. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5990. vdev->tx_non_std_data_callback.func = callback;
  5991. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5992. }
  5993. /**
  5994. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5995. * @pdev_hdl: datapath pdev handle
  5996. *
  5997. * Return: opaque pointer to dp txrx handle
  5998. */
  5999. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  6000. {
  6001. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6002. return pdev->dp_txrx_handle;
  6003. }
  6004. /**
  6005. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6006. * @pdev_hdl: datapath pdev handle
  6007. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6008. *
  6009. * Return: void
  6010. */
  6011. static void
  6012. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6013. {
  6014. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6015. pdev->dp_txrx_handle = dp_txrx_hdl;
  6016. }
  6017. /**
  6018. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6019. * @soc_handle: datapath soc handle
  6020. *
  6021. * Return: opaque pointer to external dp (non-core DP)
  6022. */
  6023. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6024. {
  6025. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6026. return soc->external_txrx_handle;
  6027. }
  6028. /**
  6029. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6030. * @soc_handle: datapath soc handle
  6031. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6032. *
  6033. * Return: void
  6034. */
  6035. static void
  6036. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6037. {
  6038. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6039. soc->external_txrx_handle = txrx_handle;
  6040. }
  6041. #ifdef FEATURE_AST
  6042. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6043. {
  6044. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6045. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6046. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6047. /*
  6048. * For BSS peer, new peer is not created on alloc_node if the
  6049. * peer with same address already exists , instead refcnt is
  6050. * increased for existing peer. Correspondingly in delete path,
  6051. * only refcnt is decreased; and peer is only deleted , when all
  6052. * references are deleted. So delete_in_progress should not be set
  6053. * for bss_peer, unless only 2 reference remains (peer map reference
  6054. * and peer hash table reference).
  6055. */
  6056. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6057. return;
  6058. }
  6059. peer->delete_in_progress = true;
  6060. dp_peer_delete_ast_entries(soc, peer);
  6061. }
  6062. #endif
  6063. #ifdef ATH_SUPPORT_NAC_RSSI
  6064. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6065. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6066. uint8_t chan_num)
  6067. {
  6068. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6069. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6070. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6071. pdev->nac_rssi_filtering = 1;
  6072. /* Store address of NAC (neighbour peer) which will be checked
  6073. * against TA of received packets.
  6074. */
  6075. if (cmd == CDP_NAC_PARAM_ADD) {
  6076. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  6077. client_macaddr, DP_MAC_ADDR_LEN);
  6078. vdev->cdp_nac_rssi_enabled = 1;
  6079. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6080. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  6081. client_macaddr, DP_MAC_ADDR_LEN)) {
  6082. /* delete this peer from the list */
  6083. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  6084. DP_MAC_ADDR_LEN);
  6085. }
  6086. vdev->cdp_nac_rssi_enabled = 0;
  6087. }
  6088. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6089. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6090. ((void *)vdev->pdev->ctrl_pdev,
  6091. vdev->vdev_id, cmd, bssid);
  6092. return QDF_STATUS_SUCCESS;
  6093. }
  6094. #endif
  6095. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6096. uint32_t max_peers)
  6097. {
  6098. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6099. soc->max_peers = max_peers;
  6100. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6101. if (dp_peer_find_attach(soc))
  6102. return QDF_STATUS_E_FAILURE;
  6103. return QDF_STATUS_SUCCESS;
  6104. }
  6105. static struct cdp_cmn_ops dp_ops_cmn = {
  6106. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6107. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6108. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6109. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6110. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6111. .txrx_peer_create = dp_peer_create_wifi3,
  6112. .txrx_peer_setup = dp_peer_setup_wifi3,
  6113. #ifdef FEATURE_AST
  6114. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6115. #else
  6116. .txrx_peer_teardown = NULL,
  6117. #endif
  6118. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6119. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6120. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6121. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6122. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6123. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6124. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6125. .txrx_peer_delete = dp_peer_delete_wifi3,
  6126. .txrx_vdev_register = dp_vdev_register_wifi3,
  6127. .txrx_soc_detach = dp_soc_detach_wifi3,
  6128. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6129. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6130. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6131. .txrx_ath_getstats = dp_get_device_stats,
  6132. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6133. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6134. .delba_process = dp_delba_process_wifi3,
  6135. .set_addba_response = dp_set_addba_response,
  6136. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6137. .flush_cache_rx_queue = NULL,
  6138. /* TODO: get API's for dscp-tid need to be added*/
  6139. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6140. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6141. .txrx_stats_request = dp_txrx_stats_request,
  6142. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6143. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6144. .txrx_set_nac = dp_set_nac,
  6145. .txrx_get_tx_pending = dp_get_tx_pending,
  6146. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6147. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6148. .display_stats = dp_txrx_dump_stats,
  6149. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6150. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6151. #ifdef DP_INTR_POLL_BASED
  6152. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6153. #else
  6154. .txrx_intr_attach = dp_soc_interrupt_attach,
  6155. #endif
  6156. .txrx_intr_detach = dp_soc_interrupt_detach,
  6157. .set_pn_check = dp_set_pn_check_wifi3,
  6158. .update_config_parameters = dp_update_config_parameters,
  6159. /* TODO: Add other functions */
  6160. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6161. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6162. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6163. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6164. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6165. .tx_send = dp_tx_send,
  6166. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6167. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6168. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6169. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6170. };
  6171. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6172. .txrx_peer_authorize = dp_peer_authorize,
  6173. #ifdef QCA_SUPPORT_SON
  6174. .txrx_set_inact_params = dp_set_inact_params,
  6175. .txrx_start_inact_timer = dp_start_inact_timer,
  6176. .txrx_set_overload = dp_set_overload,
  6177. .txrx_peer_is_inact = dp_peer_is_inact,
  6178. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6179. #endif
  6180. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6181. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6182. #ifdef MESH_MODE_SUPPORT
  6183. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6184. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6185. #endif
  6186. .txrx_set_vdev_param = dp_set_vdev_param,
  6187. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6188. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6189. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6190. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6191. .txrx_update_filter_neighbour_peers =
  6192. dp_update_filter_neighbour_peers,
  6193. .txrx_get_sec_type = dp_get_sec_type,
  6194. /* TODO: Add other functions */
  6195. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6196. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6197. #ifdef WDI_EVENT_ENABLE
  6198. .txrx_get_pldev = dp_get_pldev,
  6199. #endif
  6200. .txrx_set_pdev_param = dp_set_pdev_param,
  6201. #ifdef ATH_SUPPORT_NAC_RSSI
  6202. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6203. #endif
  6204. .set_key = dp_set_michael_key,
  6205. };
  6206. static struct cdp_me_ops dp_ops_me = {
  6207. #ifdef ATH_SUPPORT_IQUE
  6208. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6209. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6210. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6211. #endif
  6212. };
  6213. static struct cdp_mon_ops dp_ops_mon = {
  6214. .txrx_monitor_set_filter_ucast_data = NULL,
  6215. .txrx_monitor_set_filter_mcast_data = NULL,
  6216. .txrx_monitor_set_filter_non_data = NULL,
  6217. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6218. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6219. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6220. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6221. /* Added support for HK advance filter */
  6222. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6223. };
  6224. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6225. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6226. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6227. .get_htt_stats = dp_get_htt_stats,
  6228. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6229. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6230. .txrx_stats_publish = dp_txrx_stats_publish,
  6231. /* TODO */
  6232. };
  6233. static struct cdp_raw_ops dp_ops_raw = {
  6234. /* TODO */
  6235. };
  6236. #ifdef CONFIG_WIN
  6237. static struct cdp_pflow_ops dp_ops_pflow = {
  6238. /* TODO */
  6239. };
  6240. #endif /* CONFIG_WIN */
  6241. #ifdef FEATURE_RUNTIME_PM
  6242. /**
  6243. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6244. * @opaque_pdev: DP pdev context
  6245. *
  6246. * DP is ready to runtime suspend if there are no pending TX packets.
  6247. *
  6248. * Return: QDF_STATUS
  6249. */
  6250. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6251. {
  6252. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6253. struct dp_soc *soc = pdev->soc;
  6254. /* Call DP TX flow control API to check if there is any
  6255. pending packets */
  6256. if (soc->intr_mode == DP_INTR_POLL)
  6257. qdf_timer_stop(&soc->int_timer);
  6258. return QDF_STATUS_SUCCESS;
  6259. }
  6260. /**
  6261. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6262. * @opaque_pdev: DP pdev context
  6263. *
  6264. * Resume DP for runtime PM.
  6265. *
  6266. * Return: QDF_STATUS
  6267. */
  6268. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6269. {
  6270. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6271. struct dp_soc *soc = pdev->soc;
  6272. void *hal_srng;
  6273. int i;
  6274. if (soc->intr_mode == DP_INTR_POLL)
  6275. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6276. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6277. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6278. if (hal_srng) {
  6279. /* We actually only need to acquire the lock */
  6280. hal_srng_access_start(soc->hal_soc, hal_srng);
  6281. /* Update SRC ring head pointer for HW to send
  6282. all pending packets */
  6283. hal_srng_access_end(soc->hal_soc, hal_srng);
  6284. }
  6285. }
  6286. return QDF_STATUS_SUCCESS;
  6287. }
  6288. #endif /* FEATURE_RUNTIME_PM */
  6289. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6290. {
  6291. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6292. struct dp_soc *soc = pdev->soc;
  6293. if (soc->intr_mode == DP_INTR_POLL)
  6294. qdf_timer_stop(&soc->int_timer);
  6295. return QDF_STATUS_SUCCESS;
  6296. }
  6297. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6298. {
  6299. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6300. struct dp_soc *soc = pdev->soc;
  6301. if (soc->intr_mode == DP_INTR_POLL)
  6302. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6303. return QDF_STATUS_SUCCESS;
  6304. }
  6305. #ifndef CONFIG_WIN
  6306. static struct cdp_misc_ops dp_ops_misc = {
  6307. .tx_non_std = dp_tx_non_std,
  6308. .get_opmode = dp_get_opmode,
  6309. #ifdef FEATURE_RUNTIME_PM
  6310. .runtime_suspend = dp_runtime_suspend,
  6311. .runtime_resume = dp_runtime_resume,
  6312. #endif /* FEATURE_RUNTIME_PM */
  6313. .pkt_log_init = dp_pkt_log_init,
  6314. .pkt_log_con_service = dp_pkt_log_con_service,
  6315. };
  6316. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6317. /* WIFI 3.0 DP implement as required. */
  6318. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6319. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6320. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6321. .register_pause_cb = dp_txrx_register_pause_cb,
  6322. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6323. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6324. };
  6325. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6326. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6327. };
  6328. #ifdef IPA_OFFLOAD
  6329. static struct cdp_ipa_ops dp_ops_ipa = {
  6330. .ipa_get_resource = dp_ipa_get_resource,
  6331. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6332. .ipa_op_response = dp_ipa_op_response,
  6333. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6334. .ipa_get_stat = dp_ipa_get_stat,
  6335. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6336. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6337. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6338. .ipa_setup = dp_ipa_setup,
  6339. .ipa_cleanup = dp_ipa_cleanup,
  6340. .ipa_setup_iface = dp_ipa_setup_iface,
  6341. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6342. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6343. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6344. .ipa_set_perf_level = dp_ipa_set_perf_level
  6345. };
  6346. #endif
  6347. static struct cdp_bus_ops dp_ops_bus = {
  6348. .bus_suspend = dp_bus_suspend,
  6349. .bus_resume = dp_bus_resume
  6350. };
  6351. static struct cdp_ocb_ops dp_ops_ocb = {
  6352. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6353. };
  6354. static struct cdp_throttle_ops dp_ops_throttle = {
  6355. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6356. };
  6357. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6358. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6359. };
  6360. static struct cdp_cfg_ops dp_ops_cfg = {
  6361. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6362. };
  6363. /*
  6364. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6365. * @dev: physical device instance
  6366. * @peer_mac_addr: peer mac address
  6367. * @local_id: local id for the peer
  6368. * @debug_id: to track enum peer access
  6369. * Return: peer instance pointer
  6370. */
  6371. static inline void *
  6372. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6373. u8 *local_id,
  6374. enum peer_debug_id_type debug_id)
  6375. {
  6376. /*
  6377. * Currently this function does not implement the "get ref"
  6378. * functionality and is mapped to dp_find_peer_by_addr which does not
  6379. * increment the peer ref count. So the peer state is uncertain after
  6380. * calling this API. The functionality needs to be implemented.
  6381. * Accordingly the corresponding release_ref function is NULL.
  6382. */
  6383. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6384. }
  6385. static struct cdp_peer_ops dp_ops_peer = {
  6386. .register_peer = dp_register_peer,
  6387. .clear_peer = dp_clear_peer,
  6388. .find_peer_by_addr = dp_find_peer_by_addr,
  6389. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6390. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6391. .peer_release_ref = NULL,
  6392. .local_peer_id = dp_local_peer_id,
  6393. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6394. .peer_state_update = dp_peer_state_update,
  6395. .get_vdevid = dp_get_vdevid,
  6396. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6397. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6398. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6399. .get_peer_state = dp_get_peer_state,
  6400. .last_assoc_received = dp_get_last_assoc_received,
  6401. .last_disassoc_received = dp_get_last_disassoc_received,
  6402. .last_deauth_received = dp_get_last_deauth_received,
  6403. };
  6404. #endif
  6405. static struct cdp_ops dp_txrx_ops = {
  6406. .cmn_drv_ops = &dp_ops_cmn,
  6407. .ctrl_ops = &dp_ops_ctrl,
  6408. .me_ops = &dp_ops_me,
  6409. .mon_ops = &dp_ops_mon,
  6410. .host_stats_ops = &dp_ops_host_stats,
  6411. .wds_ops = &dp_ops_wds,
  6412. .raw_ops = &dp_ops_raw,
  6413. #ifdef CONFIG_WIN
  6414. .pflow_ops = &dp_ops_pflow,
  6415. #endif /* CONFIG_WIN */
  6416. #ifndef CONFIG_WIN
  6417. .misc_ops = &dp_ops_misc,
  6418. .cfg_ops = &dp_ops_cfg,
  6419. .flowctl_ops = &dp_ops_flowctl,
  6420. .l_flowctl_ops = &dp_ops_l_flowctl,
  6421. #ifdef IPA_OFFLOAD
  6422. .ipa_ops = &dp_ops_ipa,
  6423. #endif
  6424. .bus_ops = &dp_ops_bus,
  6425. .ocb_ops = &dp_ops_ocb,
  6426. .peer_ops = &dp_ops_peer,
  6427. .throttle_ops = &dp_ops_throttle,
  6428. .mob_stats_ops = &dp_ops_mob_stats,
  6429. #endif
  6430. };
  6431. /*
  6432. * dp_soc_set_txrx_ring_map()
  6433. * @dp_soc: DP handler for soc
  6434. *
  6435. * Return: Void
  6436. */
  6437. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6438. {
  6439. uint32_t i;
  6440. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6441. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6442. }
  6443. }
  6444. /*
  6445. * dp_soc_attach_wifi3() - Attach txrx SOC
  6446. * @ctrl_psoc: Opaque SOC handle from control plane
  6447. * @htc_handle: Opaque HTC handle
  6448. * @hif_handle: Opaque HIF handle
  6449. * @qdf_osdev: QDF device
  6450. *
  6451. * Return: DP SOC handle on success, NULL on failure
  6452. */
  6453. /*
  6454. * Local prototype added to temporarily address warning caused by
  6455. * -Wmissing-prototypes. A more correct solution, namely to expose
  6456. * a prototype in an appropriate header file, will come later.
  6457. */
  6458. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6459. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6460. struct ol_if_ops *ol_ops);
  6461. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6462. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6463. struct ol_if_ops *ol_ops)
  6464. {
  6465. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6466. if (!soc) {
  6467. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6468. FL("DP SOC memory allocation failed"));
  6469. goto fail0;
  6470. }
  6471. soc->cdp_soc.ops = &dp_txrx_ops;
  6472. soc->cdp_soc.ol_ops = ol_ops;
  6473. soc->ctrl_psoc = ctrl_psoc;
  6474. soc->osdev = qdf_osdev;
  6475. soc->hif_handle = hif_handle;
  6476. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6477. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6478. soc->hal_soc, qdf_osdev);
  6479. if (!soc->htt_handle) {
  6480. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6481. FL("HTT attach failed"));
  6482. goto fail1;
  6483. }
  6484. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6485. if (!soc->wlan_cfg_ctx) {
  6486. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6487. FL("wlan_cfg_soc_attach failed"));
  6488. goto fail2;
  6489. }
  6490. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6491. soc->cce_disable = false;
  6492. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6493. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6494. CDP_CFG_MAX_PEER_ID);
  6495. if (ret != -EINVAL) {
  6496. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6497. }
  6498. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6499. CDP_CFG_CCE_DISABLE);
  6500. if (ret == 1)
  6501. soc->cce_disable = true;
  6502. }
  6503. qdf_spinlock_create(&soc->peer_ref_mutex);
  6504. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6505. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6506. /* fill the tx/rx cpu ring map*/
  6507. dp_soc_set_txrx_ring_map(soc);
  6508. qdf_spinlock_create(&soc->htt_stats.lock);
  6509. /* initialize work queue for stats processing */
  6510. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6511. /*Initialize inactivity timer for wifison */
  6512. dp_init_inact_timer(soc);
  6513. return (void *)soc;
  6514. fail2:
  6515. htt_soc_detach(soc->htt_handle);
  6516. fail1:
  6517. qdf_mem_free(soc);
  6518. fail0:
  6519. return NULL;
  6520. }
  6521. /*
  6522. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6523. *
  6524. * @soc: handle to DP soc
  6525. * @mac_id: MAC id
  6526. *
  6527. * Return: Return pdev corresponding to MAC
  6528. */
  6529. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6530. {
  6531. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6532. return soc->pdev_list[mac_id];
  6533. /* Typically for MCL as there only 1 PDEV*/
  6534. return soc->pdev_list[0];
  6535. }
  6536. /*
  6537. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6538. * @soc: DP SoC context
  6539. * @max_mac_rings: No of MAC rings
  6540. *
  6541. * Return: None
  6542. */
  6543. static
  6544. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6545. int *max_mac_rings)
  6546. {
  6547. bool dbs_enable = false;
  6548. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6549. dbs_enable = soc->cdp_soc.ol_ops->
  6550. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6551. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6552. }
  6553. /*
  6554. * dp_set_pktlog_wifi3() - attach txrx vdev
  6555. * @pdev: Datapath PDEV handle
  6556. * @event: which event's notifications are being subscribed to
  6557. * @enable: WDI event subscribe or not. (True or False)
  6558. *
  6559. * Return: Success, NULL on failure
  6560. */
  6561. #ifdef WDI_EVENT_ENABLE
  6562. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6563. bool enable)
  6564. {
  6565. struct dp_soc *soc = pdev->soc;
  6566. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6567. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6568. (pdev->wlan_cfg_ctx);
  6569. uint8_t mac_id = 0;
  6570. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6571. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6572. FL("Max_mac_rings %d \n"),
  6573. max_mac_rings);
  6574. if (enable) {
  6575. switch (event) {
  6576. case WDI_EVENT_RX_DESC:
  6577. if (pdev->monitor_vdev) {
  6578. /* Nothing needs to be done if monitor mode is
  6579. * enabled
  6580. */
  6581. return 0;
  6582. }
  6583. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6584. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6585. htt_tlv_filter.mpdu_start = 1;
  6586. htt_tlv_filter.msdu_start = 1;
  6587. htt_tlv_filter.msdu_end = 1;
  6588. htt_tlv_filter.mpdu_end = 1;
  6589. htt_tlv_filter.packet_header = 1;
  6590. htt_tlv_filter.attention = 1;
  6591. htt_tlv_filter.ppdu_start = 1;
  6592. htt_tlv_filter.ppdu_end = 1;
  6593. htt_tlv_filter.ppdu_end_user_stats = 1;
  6594. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6595. htt_tlv_filter.ppdu_end_status_done = 1;
  6596. htt_tlv_filter.enable_fp = 1;
  6597. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6598. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6599. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6600. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6601. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6602. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6603. for (mac_id = 0; mac_id < max_mac_rings;
  6604. mac_id++) {
  6605. int mac_for_pdev =
  6606. dp_get_mac_id_for_pdev(mac_id,
  6607. pdev->pdev_id);
  6608. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6609. mac_for_pdev,
  6610. pdev->rxdma_mon_status_ring[mac_id]
  6611. .hal_srng,
  6612. RXDMA_MONITOR_STATUS,
  6613. RX_BUFFER_SIZE,
  6614. &htt_tlv_filter);
  6615. }
  6616. if (soc->reap_timer_init)
  6617. qdf_timer_mod(&soc->mon_reap_timer,
  6618. DP_INTR_POLL_TIMER_MS);
  6619. }
  6620. break;
  6621. case WDI_EVENT_LITE_RX:
  6622. if (pdev->monitor_vdev) {
  6623. /* Nothing needs to be done if monitor mode is
  6624. * enabled
  6625. */
  6626. return 0;
  6627. }
  6628. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6629. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6630. htt_tlv_filter.ppdu_start = 1;
  6631. htt_tlv_filter.ppdu_end = 1;
  6632. htt_tlv_filter.ppdu_end_user_stats = 1;
  6633. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6634. htt_tlv_filter.ppdu_end_status_done = 1;
  6635. htt_tlv_filter.mpdu_start = 1;
  6636. htt_tlv_filter.enable_fp = 1;
  6637. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6638. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6639. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6640. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6641. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6642. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6643. for (mac_id = 0; mac_id < max_mac_rings;
  6644. mac_id++) {
  6645. int mac_for_pdev =
  6646. dp_get_mac_id_for_pdev(mac_id,
  6647. pdev->pdev_id);
  6648. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6649. mac_for_pdev,
  6650. pdev->rxdma_mon_status_ring[mac_id]
  6651. .hal_srng,
  6652. RXDMA_MONITOR_STATUS,
  6653. RX_BUFFER_SIZE_PKTLOG_LITE,
  6654. &htt_tlv_filter);
  6655. }
  6656. if (soc->reap_timer_init)
  6657. qdf_timer_mod(&soc->mon_reap_timer,
  6658. DP_INTR_POLL_TIMER_MS);
  6659. }
  6660. break;
  6661. case WDI_EVENT_LITE_T2H:
  6662. if (pdev->monitor_vdev) {
  6663. /* Nothing needs to be done if monitor mode is
  6664. * enabled
  6665. */
  6666. return 0;
  6667. }
  6668. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6669. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6670. mac_id, pdev->pdev_id);
  6671. pdev->pktlog_ppdu_stats = true;
  6672. dp_h2t_cfg_stats_msg_send(pdev,
  6673. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6674. mac_for_pdev);
  6675. }
  6676. break;
  6677. default:
  6678. /* Nothing needs to be done for other pktlog types */
  6679. break;
  6680. }
  6681. } else {
  6682. switch (event) {
  6683. case WDI_EVENT_RX_DESC:
  6684. case WDI_EVENT_LITE_RX:
  6685. if (pdev->monitor_vdev) {
  6686. /* Nothing needs to be done if monitor mode is
  6687. * enabled
  6688. */
  6689. return 0;
  6690. }
  6691. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6692. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6693. for (mac_id = 0; mac_id < max_mac_rings;
  6694. mac_id++) {
  6695. int mac_for_pdev =
  6696. dp_get_mac_id_for_pdev(mac_id,
  6697. pdev->pdev_id);
  6698. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6699. mac_for_pdev,
  6700. pdev->rxdma_mon_status_ring[mac_id]
  6701. .hal_srng,
  6702. RXDMA_MONITOR_STATUS,
  6703. RX_BUFFER_SIZE,
  6704. &htt_tlv_filter);
  6705. }
  6706. if (soc->reap_timer_init)
  6707. qdf_timer_stop(&soc->mon_reap_timer);
  6708. }
  6709. break;
  6710. case WDI_EVENT_LITE_T2H:
  6711. if (pdev->monitor_vdev) {
  6712. /* Nothing needs to be done if monitor mode is
  6713. * enabled
  6714. */
  6715. return 0;
  6716. }
  6717. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6718. * passing value 0. Once these macros will define in htt
  6719. * header file will use proper macros
  6720. */
  6721. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6722. int mac_for_pdev =
  6723. dp_get_mac_id_for_pdev(mac_id,
  6724. pdev->pdev_id);
  6725. pdev->pktlog_ppdu_stats = false;
  6726. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6727. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6728. mac_for_pdev);
  6729. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6730. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6731. mac_for_pdev);
  6732. } else if (pdev->enhanced_stats_en) {
  6733. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6734. mac_for_pdev);
  6735. }
  6736. }
  6737. break;
  6738. default:
  6739. /* Nothing needs to be done for other pktlog types */
  6740. break;
  6741. }
  6742. }
  6743. return 0;
  6744. }
  6745. #endif
  6746. #ifdef CONFIG_MCL
  6747. /*
  6748. * dp_service_mon_rings()- timer to reap monitor rings
  6749. * reqd as we are not getting ppdu end interrupts
  6750. * @arg: SoC Handle
  6751. *
  6752. * Return:
  6753. *
  6754. */
  6755. static void dp_service_mon_rings(void *arg)
  6756. {
  6757. struct dp_soc *soc = (struct dp_soc *) arg;
  6758. int ring = 0, work_done, mac_id;
  6759. struct dp_pdev *pdev = NULL;
  6760. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6761. pdev = soc->pdev_list[ring];
  6762. if (pdev == NULL)
  6763. continue;
  6764. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6765. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6766. pdev->pdev_id);
  6767. work_done = dp_mon_process(soc, mac_for_pdev,
  6768. QCA_NAPI_BUDGET);
  6769. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6770. FL("Reaped %d descs from Monitor rings"),
  6771. work_done);
  6772. }
  6773. }
  6774. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6775. }
  6776. #ifndef REMOVE_PKT_LOG
  6777. /**
  6778. * dp_pkt_log_init() - API to initialize packet log
  6779. * @ppdev: physical device handle
  6780. * @scn: HIF context
  6781. *
  6782. * Return: none
  6783. */
  6784. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6785. {
  6786. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6787. if (handle->pkt_log_init) {
  6788. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6789. "%s: Packet log not initialized", __func__);
  6790. return;
  6791. }
  6792. pktlog_sethandle(&handle->pl_dev, scn);
  6793. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6794. if (pktlogmod_init(scn)) {
  6795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6796. "%s: pktlogmod_init failed", __func__);
  6797. handle->pkt_log_init = false;
  6798. } else {
  6799. handle->pkt_log_init = true;
  6800. }
  6801. }
  6802. /**
  6803. * dp_pkt_log_con_service() - connect packet log service
  6804. * @ppdev: physical device handle
  6805. * @scn: device context
  6806. *
  6807. * Return: none
  6808. */
  6809. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6810. {
  6811. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6812. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6813. pktlog_htc_attach();
  6814. }
  6815. /**
  6816. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6817. * @handle: Pdev handle
  6818. *
  6819. * Return: none
  6820. */
  6821. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6822. {
  6823. void *scn = (void *)handle->soc->hif_handle;
  6824. if (!scn) {
  6825. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6826. "%s: Invalid hif(scn) handle", __func__);
  6827. return;
  6828. }
  6829. pktlogmod_exit(scn);
  6830. handle->pkt_log_init = false;
  6831. }
  6832. #endif
  6833. #else
  6834. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6835. #endif