dp_rx.c 93 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #include "dp_rx_buffer_pool.h"
  36. #ifdef ATH_RX_PRI_SAVE
  37. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  38. (qdf_nbuf_set_priority(_nbuf, _tid))
  39. #else
  40. #define DP_RX_TID_SAVE(_nbuf, _tid)
  41. #endif
  42. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  43. static inline
  44. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  45. {
  46. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  47. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  48. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  49. return false;
  50. }
  51. return true;
  52. }
  53. #else
  54. static inline
  55. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  56. {
  57. return true;
  58. }
  59. #endif
  60. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  61. {
  62. return vdev->ap_bridge_enabled;
  63. }
  64. #ifdef DUP_RX_DESC_WAR
  65. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  66. hal_ring_handle_t hal_ring,
  67. hal_ring_desc_t ring_desc,
  68. struct dp_rx_desc *rx_desc)
  69. {
  70. void *hal_soc = soc->hal_soc;
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. dp_rx_desc_dump(rx_desc);
  73. }
  74. #else
  75. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  76. hal_ring_handle_t hal_ring_hdl,
  77. hal_ring_desc_t ring_desc,
  78. struct dp_rx_desc *rx_desc)
  79. {
  80. hal_soc_handle_t hal_soc = soc->hal_soc;
  81. dp_rx_desc_dump(rx_desc);
  82. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  83. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  84. qdf_assert_always(0);
  85. }
  86. #endif
  87. #ifdef RX_DESC_SANITY_WAR
  88. static inline
  89. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  90. hal_ring_handle_t hal_ring_hdl,
  91. hal_ring_desc_t ring_desc,
  92. struct dp_rx_desc *rx_desc)
  93. {
  94. uint8_t return_buffer_manager;
  95. if (qdf_unlikely(!rx_desc)) {
  96. /*
  97. * This is an unlikely case where the cookie obtained
  98. * from the ring_desc is invalid and hence we are not
  99. * able to find the corresponding rx_desc
  100. */
  101. goto fail;
  102. }
  103. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  104. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  105. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  106. goto fail;
  107. }
  108. return QDF_STATUS_SUCCESS;
  109. fail:
  110. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  111. dp_err("Ring Desc:");
  112. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  113. ring_desc);
  114. return QDF_STATUS_E_NULL_VALUE;
  115. }
  116. #else
  117. static inline
  118. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  119. hal_ring_handle_t hal_ring_hdl,
  120. hal_ring_desc_t ring_desc,
  121. struct dp_rx_desc *rx_desc)
  122. {
  123. return QDF_STATUS_SUCCESS;
  124. }
  125. #endif
  126. /**
  127. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  128. *
  129. * @dp_soc: struct dp_soc *
  130. * @nbuf_frag_info_t: nbuf frag info
  131. * @dp_pdev: struct dp_pdev *
  132. * @rx_desc_pool: Rx desc pool
  133. *
  134. * Return: QDF_STATUS
  135. */
  136. #ifdef DP_RX_MON_MEM_FRAG
  137. static inline QDF_STATUS
  138. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  139. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  140. struct dp_pdev *dp_pdev,
  141. struct rx_desc_pool *rx_desc_pool)
  142. {
  143. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  144. (nbuf_frag_info_t->virt_addr).vaddr =
  145. qdf_frag_alloc(rx_desc_pool->buf_size);
  146. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  147. dp_err("Frag alloc failed");
  148. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  149. return QDF_STATUS_E_NOMEM;
  150. }
  151. ret = qdf_mem_map_page(dp_soc->osdev,
  152. (nbuf_frag_info_t->virt_addr).vaddr,
  153. QDF_DMA_FROM_DEVICE,
  154. rx_desc_pool->buf_size,
  155. &nbuf_frag_info_t->paddr);
  156. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  157. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  158. dp_err("Frag map failed");
  159. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  160. return QDF_STATUS_E_FAULT;
  161. }
  162. return QDF_STATUS_SUCCESS;
  163. }
  164. #else
  165. static inline QDF_STATUS
  166. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  167. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  168. struct dp_pdev *dp_pdev,
  169. struct rx_desc_pool *rx_desc_pool)
  170. {
  171. return QDF_STATUS_SUCCESS;
  172. }
  173. #endif /* DP_RX_MON_MEM_FRAG */
  174. /**
  175. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  176. *
  177. * @dp_soc: struct dp_soc *
  178. * @mac_id: Mac id
  179. * @num_entries_avail: num_entries_avail
  180. * @nbuf_frag_info_t: nbuf frag info
  181. * @dp_pdev: struct dp_pdev *
  182. * @rx_desc_pool: Rx desc pool
  183. *
  184. * Return: QDF_STATUS
  185. */
  186. static inline QDF_STATUS
  187. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  188. uint32_t mac_id,
  189. uint32_t num_entries_avail,
  190. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  191. struct dp_pdev *dp_pdev,
  192. struct rx_desc_pool *rx_desc_pool)
  193. {
  194. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  195. (nbuf_frag_info_t->virt_addr).nbuf =
  196. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  197. mac_id,
  198. rx_desc_pool,
  199. num_entries_avail);
  200. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  201. dp_err("nbuf alloc failed");
  202. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  203. return QDF_STATUS_E_NOMEM;
  204. }
  205. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  206. (nbuf_frag_info_t->virt_addr).nbuf,
  207. QDF_DMA_FROM_DEVICE,
  208. rx_desc_pool->buf_size);
  209. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  210. dp_rx_buffer_pool_nbuf_free(dp_soc,
  211. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  212. dp_err("nbuf map failed");
  213. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  214. return QDF_STATUS_E_FAULT;
  215. }
  216. nbuf_frag_info_t->paddr =
  217. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  218. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  219. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  220. rx_desc_pool->buf_size,
  221. true);
  222. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  223. &nbuf_frag_info_t->paddr,
  224. rx_desc_pool);
  225. if (ret == QDF_STATUS_E_FAILURE) {
  226. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  227. (nbuf_frag_info_t->virt_addr).nbuf,
  228. QDF_DMA_FROM_DEVICE,
  229. rx_desc_pool->buf_size);
  230. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  231. return QDF_STATUS_E_ADDRNOTAVAIL;
  232. }
  233. return QDF_STATUS_SUCCESS;
  234. }
  235. /*
  236. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  237. * called during dp rx initialization
  238. * and at the end of dp_rx_process.
  239. *
  240. * @soc: core txrx main context
  241. * @mac_id: mac_id which is one of 3 mac_ids
  242. * @dp_rxdma_srng: dp rxdma circular ring
  243. * @rx_desc_pool: Pointer to free Rx descriptor pool
  244. * @num_req_buffers: number of buffer to be replenished
  245. * @desc_list: list of descs if called from dp_rx_process
  246. * or NULL during dp rx initialization or out of buffer
  247. * interrupt.
  248. * @tail: tail of descs list
  249. * @func_name: name of the caller function
  250. * Return: return success or failure
  251. */
  252. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  253. struct dp_srng *dp_rxdma_srng,
  254. struct rx_desc_pool *rx_desc_pool,
  255. uint32_t num_req_buffers,
  256. union dp_rx_desc_list_elem_t **desc_list,
  257. union dp_rx_desc_list_elem_t **tail,
  258. const char *func_name)
  259. {
  260. uint32_t num_alloc_desc;
  261. uint16_t num_desc_to_free = 0;
  262. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  263. uint32_t num_entries_avail;
  264. uint32_t count;
  265. int sync_hw_ptr = 1;
  266. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  267. void *rxdma_ring_entry;
  268. union dp_rx_desc_list_elem_t *next;
  269. QDF_STATUS ret;
  270. void *rxdma_srng;
  271. rxdma_srng = dp_rxdma_srng->hal_srng;
  272. if (!rxdma_srng) {
  273. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  274. "rxdma srng not initialized");
  275. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  276. return QDF_STATUS_E_FAILURE;
  277. }
  278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  279. "requested %d buffers for replenish", num_req_buffers);
  280. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  281. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  282. rxdma_srng,
  283. sync_hw_ptr);
  284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  285. "no of available entries in rxdma ring: %d",
  286. num_entries_avail);
  287. if (!(*desc_list) && (num_entries_avail >
  288. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  289. num_req_buffers = num_entries_avail;
  290. } else if (num_entries_avail < num_req_buffers) {
  291. num_desc_to_free = num_req_buffers - num_entries_avail;
  292. num_req_buffers = num_entries_avail;
  293. }
  294. if (qdf_unlikely(!num_req_buffers)) {
  295. num_desc_to_free = num_req_buffers;
  296. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  297. goto free_descs;
  298. }
  299. /*
  300. * if desc_list is NULL, allocate the descs from freelist
  301. */
  302. if (!(*desc_list)) {
  303. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  304. rx_desc_pool,
  305. num_req_buffers,
  306. desc_list,
  307. tail);
  308. if (!num_alloc_desc) {
  309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  310. "no free rx_descs in freelist");
  311. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  312. num_req_buffers);
  313. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  314. return QDF_STATUS_E_NOMEM;
  315. }
  316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  317. "%d rx desc allocated", num_alloc_desc);
  318. num_req_buffers = num_alloc_desc;
  319. }
  320. count = 0;
  321. while (count < num_req_buffers) {
  322. /* Flag is set while pdev rx_desc_pool initialization */
  323. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  324. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  325. &nbuf_frag_info,
  326. dp_pdev,
  327. rx_desc_pool);
  328. else
  329. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  330. mac_id,
  331. num_entries_avail, &nbuf_frag_info,
  332. dp_pdev, rx_desc_pool);
  333. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  334. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  335. continue;
  336. break;
  337. }
  338. count++;
  339. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  340. rxdma_srng);
  341. qdf_assert_always(rxdma_ring_entry);
  342. next = (*desc_list)->next;
  343. /* Flag is set while pdev rx_desc_pool initialization */
  344. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  345. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  346. &nbuf_frag_info);
  347. else
  348. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  349. &nbuf_frag_info);
  350. /* rx_desc.in_use should be zero at this time*/
  351. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  352. (*desc_list)->rx_desc.in_use = 1;
  353. (*desc_list)->rx_desc.in_err_state = 0;
  354. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  355. func_name, RX_DESC_REPLENISHED);
  356. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  357. nbuf_frag_info.virt_addr.nbuf,
  358. (unsigned long long)(nbuf_frag_info.paddr),
  359. (*desc_list)->rx_desc.cookie);
  360. hal_rxdma_buff_addr_info_set(rxdma_ring_entry,
  361. nbuf_frag_info.paddr,
  362. (*desc_list)->rx_desc.cookie,
  363. rx_desc_pool->owner);
  364. *desc_list = next;
  365. }
  366. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  367. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  368. count, num_desc_to_free);
  369. /* No need to count the number of bytes received during replenish.
  370. * Therefore set replenish.pkts.bytes as 0.
  371. */
  372. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  373. free_descs:
  374. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  375. /*
  376. * add any available free desc back to the free list
  377. */
  378. if (*desc_list)
  379. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  380. mac_id, rx_desc_pool);
  381. return QDF_STATUS_SUCCESS;
  382. }
  383. /*
  384. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  385. * pkts to RAW mode simulation to
  386. * decapsulate the pkt.
  387. *
  388. * @vdev: vdev on which RAW mode is enabled
  389. * @nbuf_list: list of RAW pkts to process
  390. * @peer: peer object from which the pkt is rx
  391. *
  392. * Return: void
  393. */
  394. void
  395. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  396. struct dp_peer *peer)
  397. {
  398. qdf_nbuf_t deliver_list_head = NULL;
  399. qdf_nbuf_t deliver_list_tail = NULL;
  400. qdf_nbuf_t nbuf;
  401. nbuf = nbuf_list;
  402. while (nbuf) {
  403. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  404. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  405. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  406. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  407. /*
  408. * reset the chfrag_start and chfrag_end bits in nbuf cb
  409. * as this is a non-amsdu pkt and RAW mode simulation expects
  410. * these bit s to be 0 for non-amsdu pkt.
  411. */
  412. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  413. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  414. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  415. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  416. }
  417. nbuf = next;
  418. }
  419. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  420. &deliver_list_tail, peer->mac_addr.raw);
  421. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  422. }
  423. #ifndef FEATURE_WDS
  424. static void
  425. dp_rx_da_learn(struct dp_soc *soc,
  426. uint8_t *rx_tlv_hdr,
  427. struct dp_peer *ta_peer,
  428. qdf_nbuf_t nbuf)
  429. {
  430. }
  431. #endif
  432. /*
  433. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  434. *
  435. * @soc: core txrx main context
  436. * @ta_peer : source peer entry
  437. * @rx_tlv_hdr : start address of rx tlvs
  438. * @nbuf : nbuf that has to be intrabss forwarded
  439. *
  440. * Return: bool: true if it is forwarded else false
  441. */
  442. static bool
  443. dp_rx_intrabss_fwd(struct dp_soc *soc,
  444. struct dp_peer *ta_peer,
  445. uint8_t *rx_tlv_hdr,
  446. qdf_nbuf_t nbuf,
  447. struct hal_rx_msdu_metadata msdu_metadata)
  448. {
  449. uint16_t len;
  450. uint8_t is_frag;
  451. uint16_t da_peer_id = HTT_INVALID_PEER;
  452. struct dp_peer *da_peer = NULL;
  453. bool is_da_bss_peer = false;
  454. struct dp_ast_entry *ast_entry;
  455. qdf_nbuf_t nbuf_copy;
  456. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  457. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  458. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  459. tid_stats.tid_rx_stats[ring_id][tid];
  460. /* check if the destination peer is available in peer table
  461. * and also check if the source peer and destination peer
  462. * belong to the same vap and destination peer is not bss peer.
  463. */
  464. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  465. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  466. if (!ast_entry)
  467. return false;
  468. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  469. ast_entry->is_active = TRUE;
  470. return false;
  471. }
  472. da_peer_id = ast_entry->peer_id;
  473. if (da_peer_id == HTT_INVALID_PEER)
  474. return false;
  475. /* TA peer cannot be same as peer(DA) on which AST is present
  476. * this indicates a change in topology and that AST entries
  477. * are yet to be updated.
  478. */
  479. if (da_peer_id == ta_peer->peer_id)
  480. return false;
  481. if (ast_entry->vdev_id != ta_peer->vdev->vdev_id)
  482. return false;
  483. da_peer = dp_peer_get_ref_by_id(soc, da_peer_id,
  484. DP_MOD_ID_RX);
  485. if (!da_peer)
  486. return false;
  487. is_da_bss_peer = da_peer->bss_peer;
  488. dp_peer_unref_delete(da_peer, DP_MOD_ID_RX);
  489. if (!is_da_bss_peer) {
  490. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  491. is_frag = qdf_nbuf_is_frag(nbuf);
  492. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  493. /* If the source or destination peer in the isolation
  494. * list then dont forward instead push to bridge stack.
  495. */
  496. if (dp_get_peer_isolation(ta_peer) ||
  497. dp_get_peer_isolation(da_peer))
  498. return false;
  499. /* linearize the nbuf just before we send to
  500. * dp_tx_send()
  501. */
  502. if (qdf_unlikely(is_frag)) {
  503. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  504. return false;
  505. nbuf = qdf_nbuf_unshare(nbuf);
  506. if (!nbuf) {
  507. DP_STATS_INC_PKT(ta_peer,
  508. rx.intra_bss.fail,
  509. 1,
  510. len);
  511. /* return true even though the pkt is
  512. * not forwarded. Basically skb_unshare
  513. * failed and we want to continue with
  514. * next nbuf.
  515. */
  516. tid_stats->fail_cnt[INTRABSS_DROP]++;
  517. return true;
  518. }
  519. }
  520. if (!dp_tx_send((struct cdp_soc_t *)soc,
  521. ta_peer->vdev->vdev_id, nbuf)) {
  522. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  523. len);
  524. return true;
  525. } else {
  526. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  527. len);
  528. tid_stats->fail_cnt[INTRABSS_DROP]++;
  529. return false;
  530. }
  531. }
  532. }
  533. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  534. * source, then clone the pkt and send the cloned pkt for
  535. * intra BSS forwarding and original pkt up the network stack
  536. * Note: how do we handle multicast pkts. do we forward
  537. * all multicast pkts as is or let a higher layer module
  538. * like igmpsnoop decide whether to forward or not with
  539. * Mcast enhancement.
  540. */
  541. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  542. !ta_peer->bss_peer))) {
  543. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  544. goto end;
  545. /* If the source peer in the isolation list
  546. * then dont forward instead push to bridge stack
  547. */
  548. if (dp_get_peer_isolation(ta_peer))
  549. goto end;
  550. nbuf_copy = qdf_nbuf_copy(nbuf);
  551. if (!nbuf_copy)
  552. goto end;
  553. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  554. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  555. /* Set cb->ftype to intrabss FWD */
  556. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  557. if (dp_tx_send((struct cdp_soc_t *)soc,
  558. ta_peer->vdev->vdev_id, nbuf_copy)) {
  559. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  560. tid_stats->fail_cnt[INTRABSS_DROP]++;
  561. qdf_nbuf_free(nbuf_copy);
  562. } else {
  563. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  564. tid_stats->intrabss_cnt++;
  565. }
  566. }
  567. end:
  568. /* return false as we have to still send the original pkt
  569. * up the stack
  570. */
  571. return false;
  572. }
  573. #ifdef MESH_MODE_SUPPORT
  574. /**
  575. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  576. *
  577. * @vdev: DP Virtual device handle
  578. * @nbuf: Buffer pointer
  579. * @rx_tlv_hdr: start of rx tlv header
  580. * @peer: pointer to peer
  581. *
  582. * This function allocated memory for mesh receive stats and fill the
  583. * required stats. Stores the memory address in skb cb.
  584. *
  585. * Return: void
  586. */
  587. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  588. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  589. {
  590. struct mesh_recv_hdr_s *rx_info = NULL;
  591. uint32_t pkt_type;
  592. uint32_t nss;
  593. uint32_t rate_mcs;
  594. uint32_t bw;
  595. uint8_t primary_chan_num;
  596. uint32_t center_chan_freq;
  597. struct dp_soc *soc;
  598. /* fill recv mesh stats */
  599. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  600. /* upper layers are resposible to free this memory */
  601. if (!rx_info) {
  602. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  603. "Memory allocation failed for mesh rx stats");
  604. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  605. return;
  606. }
  607. rx_info->rs_flags = MESH_RXHDR_VER1;
  608. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  609. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  610. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  611. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  612. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  613. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  614. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  615. if (vdev->osif_get_key)
  616. vdev->osif_get_key(vdev->osif_vdev,
  617. &rx_info->rs_decryptkey[0],
  618. &peer->mac_addr.raw[0],
  619. rx_info->rs_keyix);
  620. }
  621. rx_info->rs_rssi = peer->stats.rx.rssi;
  622. soc = vdev->pdev->soc;
  623. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  624. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  625. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  626. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  627. soc->ctrl_psoc,
  628. vdev->pdev->pdev_id,
  629. center_chan_freq);
  630. }
  631. rx_info->rs_channel = primary_chan_num;
  632. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  633. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  634. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  635. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  636. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  637. (bw << 24);
  638. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  639. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  640. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  641. rx_info->rs_flags,
  642. rx_info->rs_rssi,
  643. rx_info->rs_channel,
  644. rx_info->rs_ratephy1,
  645. rx_info->rs_keyix);
  646. }
  647. /**
  648. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  649. *
  650. * @vdev: DP Virtual device handle
  651. * @nbuf: Buffer pointer
  652. * @rx_tlv_hdr: start of rx tlv header
  653. *
  654. * This checks if the received packet is matching any filter out
  655. * catogery and and drop the packet if it matches.
  656. *
  657. * Return: status(0 indicates drop, 1 indicate to no drop)
  658. */
  659. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  660. uint8_t *rx_tlv_hdr)
  661. {
  662. union dp_align_mac_addr mac_addr;
  663. struct dp_soc *soc = vdev->pdev->soc;
  664. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  665. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  666. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  667. rx_tlv_hdr))
  668. return QDF_STATUS_SUCCESS;
  669. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  670. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  671. rx_tlv_hdr))
  672. return QDF_STATUS_SUCCESS;
  673. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  674. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  675. rx_tlv_hdr) &&
  676. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  677. rx_tlv_hdr))
  678. return QDF_STATUS_SUCCESS;
  679. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  680. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  681. rx_tlv_hdr,
  682. &mac_addr.raw[0]))
  683. return QDF_STATUS_E_FAILURE;
  684. if (!qdf_mem_cmp(&mac_addr.raw[0],
  685. &vdev->mac_addr.raw[0],
  686. QDF_MAC_ADDR_SIZE))
  687. return QDF_STATUS_SUCCESS;
  688. }
  689. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  690. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  691. rx_tlv_hdr,
  692. &mac_addr.raw[0]))
  693. return QDF_STATUS_E_FAILURE;
  694. if (!qdf_mem_cmp(&mac_addr.raw[0],
  695. &vdev->mac_addr.raw[0],
  696. QDF_MAC_ADDR_SIZE))
  697. return QDF_STATUS_SUCCESS;
  698. }
  699. }
  700. return QDF_STATUS_E_FAILURE;
  701. }
  702. #else
  703. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  704. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  705. {
  706. }
  707. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  708. uint8_t *rx_tlv_hdr)
  709. {
  710. return QDF_STATUS_E_FAILURE;
  711. }
  712. #endif
  713. #ifdef FEATURE_NAC_RSSI
  714. /**
  715. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  716. * clients
  717. * @pdev: DP pdev handle
  718. * @rx_pkt_hdr: Rx packet Header
  719. *
  720. * return: dp_vdev*
  721. */
  722. static
  723. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  724. uint8_t *rx_pkt_hdr)
  725. {
  726. struct ieee80211_frame *wh;
  727. struct dp_neighbour_peer *peer = NULL;
  728. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  729. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  730. return NULL;
  731. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  732. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  733. neighbour_peer_list_elem) {
  734. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  735. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  736. QDF_TRACE(
  737. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  738. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  739. peer->neighbour_peers_macaddr.raw[0],
  740. peer->neighbour_peers_macaddr.raw[1],
  741. peer->neighbour_peers_macaddr.raw[2],
  742. peer->neighbour_peers_macaddr.raw[3],
  743. peer->neighbour_peers_macaddr.raw[4],
  744. peer->neighbour_peers_macaddr.raw[5]);
  745. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  746. return pdev->monitor_vdev;
  747. }
  748. }
  749. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  750. return NULL;
  751. }
  752. /**
  753. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  754. * @soc: DP SOC handle
  755. * @mpdu: mpdu for which peer is invalid
  756. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  757. * pool_id has same mapping)
  758. *
  759. * return: integer type
  760. */
  761. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  762. uint8_t mac_id)
  763. {
  764. struct dp_invalid_peer_msg msg;
  765. struct dp_vdev *vdev = NULL;
  766. struct dp_pdev *pdev = NULL;
  767. struct ieee80211_frame *wh;
  768. qdf_nbuf_t curr_nbuf, next_nbuf;
  769. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  770. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  771. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  772. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  773. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  774. "Drop decapped frames");
  775. goto free;
  776. }
  777. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  778. if (!DP_FRAME_IS_DATA(wh)) {
  779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  780. "NAWDS valid only for data frames");
  781. goto free;
  782. }
  783. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  785. "Invalid nbuf length");
  786. goto free;
  787. }
  788. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  789. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  791. "PDEV %s", !pdev ? "not found" : "down");
  792. goto free;
  793. }
  794. if (pdev->filter_neighbour_peers) {
  795. /* Next Hop scenario not yet handle */
  796. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  797. if (vdev) {
  798. dp_rx_mon_deliver(soc, pdev->pdev_id,
  799. pdev->invalid_peer_head_msdu,
  800. pdev->invalid_peer_tail_msdu);
  801. pdev->invalid_peer_head_msdu = NULL;
  802. pdev->invalid_peer_tail_msdu = NULL;
  803. return 0;
  804. }
  805. }
  806. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  807. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  808. QDF_MAC_ADDR_SIZE) == 0) {
  809. goto out;
  810. }
  811. }
  812. if (!vdev) {
  813. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  814. "VDEV not found");
  815. goto free;
  816. }
  817. out:
  818. msg.wh = wh;
  819. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  820. msg.nbuf = mpdu;
  821. msg.vdev_id = vdev->vdev_id;
  822. /*
  823. * NOTE: Only valid for HKv1.
  824. * If smart monitor mode is enabled on RE, we are getting invalid
  825. * peer frames with RA as STA mac of RE and the TA not matching
  826. * with any NAC list or the the BSSID.Such frames need to dropped
  827. * in order to avoid HM_WDS false addition.
  828. */
  829. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  830. if (!soc->hw_nac_monitor_support &&
  831. pdev->filter_neighbour_peers &&
  832. vdev->opmode == wlan_op_mode_sta) {
  833. QDF_TRACE(QDF_MODULE_ID_DP,
  834. QDF_TRACE_LEVEL_WARN,
  835. "Drop inv peer pkts with STA RA:%pm",
  836. wh->i_addr1);
  837. goto free;
  838. }
  839. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  840. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  841. pdev->pdev_id, &msg);
  842. }
  843. free:
  844. /* Drop and free packet */
  845. curr_nbuf = mpdu;
  846. while (curr_nbuf) {
  847. next_nbuf = qdf_nbuf_next(curr_nbuf);
  848. qdf_nbuf_free(curr_nbuf);
  849. curr_nbuf = next_nbuf;
  850. }
  851. return 0;
  852. }
  853. /**
  854. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  855. * @soc: DP SOC handle
  856. * @mpdu: mpdu for which peer is invalid
  857. * @mpdu_done: if an mpdu is completed
  858. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  859. * pool_id has same mapping)
  860. *
  861. * return: integer type
  862. */
  863. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  864. qdf_nbuf_t mpdu, bool mpdu_done,
  865. uint8_t mac_id)
  866. {
  867. /* Only trigger the process when mpdu is completed */
  868. if (mpdu_done)
  869. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  870. }
  871. #else
  872. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  873. uint8_t mac_id)
  874. {
  875. qdf_nbuf_t curr_nbuf, next_nbuf;
  876. struct dp_pdev *pdev;
  877. struct dp_vdev *vdev = NULL;
  878. struct ieee80211_frame *wh;
  879. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  880. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  881. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  882. if (!DP_FRAME_IS_DATA(wh)) {
  883. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  884. "only for data frames");
  885. goto free;
  886. }
  887. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  888. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  889. "Invalid nbuf length");
  890. goto free;
  891. }
  892. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  893. if (!pdev) {
  894. QDF_TRACE(QDF_MODULE_ID_DP,
  895. QDF_TRACE_LEVEL_ERROR,
  896. "PDEV not found");
  897. goto free;
  898. }
  899. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  900. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  901. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  902. QDF_MAC_ADDR_SIZE) == 0) {
  903. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  904. goto out;
  905. }
  906. }
  907. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  908. if (!vdev) {
  909. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  910. "VDEV not found");
  911. goto free;
  912. }
  913. out:
  914. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  915. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  916. free:
  917. /* reset the head and tail pointers */
  918. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  919. if (pdev) {
  920. pdev->invalid_peer_head_msdu = NULL;
  921. pdev->invalid_peer_tail_msdu = NULL;
  922. }
  923. /* Drop and free packet */
  924. curr_nbuf = mpdu;
  925. while (curr_nbuf) {
  926. next_nbuf = qdf_nbuf_next(curr_nbuf);
  927. qdf_nbuf_free(curr_nbuf);
  928. curr_nbuf = next_nbuf;
  929. }
  930. /* Reset the head and tail pointers */
  931. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  932. if (pdev) {
  933. pdev->invalid_peer_head_msdu = NULL;
  934. pdev->invalid_peer_tail_msdu = NULL;
  935. }
  936. return 0;
  937. }
  938. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  939. qdf_nbuf_t mpdu, bool mpdu_done,
  940. uint8_t mac_id)
  941. {
  942. /* Process the nbuf */
  943. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  944. }
  945. #endif
  946. #ifdef RECEIVE_OFFLOAD
  947. /**
  948. * dp_rx_print_offload_info() - Print offload info from RX TLV
  949. * @soc: dp soc handle
  950. * @rx_tlv: RX TLV for which offload information is to be printed
  951. *
  952. * Return: None
  953. */
  954. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  955. {
  956. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  957. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  958. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  959. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  960. rx_tlv));
  961. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  962. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  963. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  964. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  965. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  966. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  967. dp_verbose_debug("---------------------------------------------------------");
  968. }
  969. /**
  970. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  971. * @soc: DP SOC handle
  972. * @rx_tlv: RX TLV received for the msdu
  973. * @msdu: msdu for which GRO info needs to be filled
  974. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  975. *
  976. * Return: None
  977. */
  978. static
  979. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  980. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  981. {
  982. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  983. return;
  984. /* Filling up RX offload info only for TCP packets */
  985. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  986. return;
  987. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  988. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  989. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  990. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  991. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  992. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  993. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  994. rx_tlv);
  995. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  996. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  997. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  998. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  999. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  1000. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  1001. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  1002. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  1003. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  1004. HAL_RX_TLV_GET_IPV6(rx_tlv);
  1005. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  1006. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  1007. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  1008. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  1009. dp_rx_print_offload_info(soc, rx_tlv);
  1010. }
  1011. #else
  1012. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1013. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1014. {
  1015. }
  1016. #endif /* RECEIVE_OFFLOAD */
  1017. /**
  1018. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1019. *
  1020. * @nbuf: pointer to msdu.
  1021. * @mpdu_len: mpdu length
  1022. *
  1023. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1024. */
  1025. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  1026. {
  1027. bool last_nbuf;
  1028. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  1029. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1030. last_nbuf = false;
  1031. } else {
  1032. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  1033. last_nbuf = true;
  1034. }
  1035. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  1036. return last_nbuf;
  1037. }
  1038. /**
  1039. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1040. * multiple nbufs.
  1041. * @soc: DP SOC handle
  1042. * @nbuf: pointer to the first msdu of an amsdu.
  1043. *
  1044. * This function implements the creation of RX frag_list for cases
  1045. * where an MSDU is spread across multiple nbufs.
  1046. *
  1047. * Return: returns the head nbuf which contains complete frag_list.
  1048. */
  1049. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1050. {
  1051. qdf_nbuf_t parent, frag_list, next = NULL;
  1052. uint16_t frag_list_len = 0;
  1053. uint16_t mpdu_len;
  1054. bool last_nbuf;
  1055. /*
  1056. * Use msdu len got from REO entry descriptor instead since
  1057. * there is case the RX PKT TLV is corrupted while msdu_len
  1058. * from REO descriptor is right for non-raw RX scatter msdu.
  1059. */
  1060. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1061. /*
  1062. * this is a case where the complete msdu fits in one single nbuf.
  1063. * in this case HW sets both start and end bit and we only need to
  1064. * reset these bits for RAW mode simulator to decap the pkt
  1065. */
  1066. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1067. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1068. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  1069. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1070. return nbuf;
  1071. }
  1072. /*
  1073. * This is a case where we have multiple msdus (A-MSDU) spread across
  1074. * multiple nbufs. here we create a fraglist out of these nbufs.
  1075. *
  1076. * the moment we encounter a nbuf with continuation bit set we
  1077. * know for sure we have an MSDU which is spread across multiple
  1078. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1079. */
  1080. parent = nbuf;
  1081. frag_list = nbuf->next;
  1082. nbuf = nbuf->next;
  1083. /*
  1084. * set the start bit in the first nbuf we encounter with continuation
  1085. * bit set. This has the proper mpdu length set as it is the first
  1086. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1087. * nbufs will form the frag_list of the parent nbuf.
  1088. */
  1089. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1090. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1091. /*
  1092. * HW issue: MSDU cont bit is set but reported MPDU length can fit
  1093. * in to single buffer
  1094. *
  1095. * Increment error stats and avoid SG list creation
  1096. */
  1097. if (last_nbuf) {
  1098. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1099. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1100. return parent;
  1101. }
  1102. /*
  1103. * this is where we set the length of the fragments which are
  1104. * associated to the parent nbuf. We iterate through the frag_list
  1105. * till we hit the last_nbuf of the list.
  1106. */
  1107. do {
  1108. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1109. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1110. frag_list_len += qdf_nbuf_len(nbuf);
  1111. if (last_nbuf) {
  1112. next = nbuf->next;
  1113. nbuf->next = NULL;
  1114. break;
  1115. }
  1116. nbuf = nbuf->next;
  1117. } while (!last_nbuf);
  1118. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1119. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1120. parent->next = next;
  1121. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1122. return parent;
  1123. }
  1124. #ifdef QCA_PEER_EXT_STATS
  1125. /*
  1126. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1127. * @peer: DP soc context
  1128. * @nbuf: NBuffer
  1129. *
  1130. * Return: Void
  1131. */
  1132. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1133. qdf_nbuf_t nbuf)
  1134. {
  1135. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1136. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1137. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1138. }
  1139. #endif /* QCA_PEER_EXT_STATS */
  1140. /**
  1141. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1142. * to pass in correct fields
  1143. *
  1144. * @vdev: pdev handle
  1145. * @tx_desc: tx descriptor
  1146. * @tid: tid value
  1147. * Return: none
  1148. */
  1149. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1150. {
  1151. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1152. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1153. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1154. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1155. uint32_t interframe_delay =
  1156. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1157. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1158. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1159. /*
  1160. * Update interframe delay stats calculated at deliver_data_ol point.
  1161. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1162. * interframe delay will not be calculate correctly for 1st frame.
  1163. * On the other side, this will help in avoiding extra per packet check
  1164. * of vdev->prev_rx_deliver_tstamp.
  1165. */
  1166. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1167. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1168. vdev->prev_rx_deliver_tstamp = current_ts;
  1169. }
  1170. /**
  1171. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1172. * @pdev: dp pdev reference
  1173. * @buf_list: buffer list to be dropepd
  1174. *
  1175. * Return: int (number of bufs dropped)
  1176. */
  1177. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1178. qdf_nbuf_t buf_list)
  1179. {
  1180. struct cdp_tid_rx_stats *stats = NULL;
  1181. uint8_t tid = 0, ring_id = 0;
  1182. int num_dropped = 0;
  1183. qdf_nbuf_t buf, next_buf;
  1184. buf = buf_list;
  1185. while (buf) {
  1186. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1187. next_buf = qdf_nbuf_queue_next(buf);
  1188. tid = qdf_nbuf_get_tid_val(buf);
  1189. if (qdf_likely(pdev)) {
  1190. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1191. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1192. stats->delivered_to_stack--;
  1193. }
  1194. qdf_nbuf_free(buf);
  1195. buf = next_buf;
  1196. num_dropped++;
  1197. }
  1198. return num_dropped;
  1199. }
  1200. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1201. /**
  1202. * dp_rx_wds_ext() - Make different lists for 4-address and 3-address frames
  1203. * @nbuf_head: skb list head
  1204. * @vdev: vdev
  1205. * @peer: peer
  1206. * @peer_id: peer id of new received frame
  1207. * @vdev_id: vdev_id of new received frame
  1208. *
  1209. * Return: true if peer_ids are different.
  1210. */
  1211. static inline bool
  1212. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1213. struct dp_vdev *vdev,
  1214. struct dp_peer *peer,
  1215. uint16_t peer_id,
  1216. uint8_t vdev_id)
  1217. {
  1218. if (nbuf_head && peer && (peer->peer_id != peer_id))
  1219. return true;
  1220. return false;
  1221. }
  1222. /**
  1223. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1224. * @soc: core txrx main context
  1225. * @vdev: vdev
  1226. * @peer: peer
  1227. * @nbuf_head: skb list head
  1228. *
  1229. * Return: true if packet is delivered to netdev per STA.
  1230. */
  1231. static inline bool
  1232. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1233. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1234. {
  1235. /*
  1236. * When extended WDS is disabled, frames are sent to AP netdevice.
  1237. */
  1238. if (qdf_likely(!vdev->wds_ext_enabled))
  1239. return false;
  1240. /*
  1241. * There can be 2 cases:
  1242. * 1. Send frame to parent netdev if its not for netdev per STA
  1243. * 2. If frame is meant for netdev per STA:
  1244. * a. Send frame to appropriate netdev using registered fp.
  1245. * b. If fp is NULL, drop the frames.
  1246. */
  1247. if (!peer->wds_ext.init)
  1248. return false;
  1249. if (peer->osif_rx)
  1250. peer->osif_rx(peer->wds_ext.osif_peer, nbuf_head);
  1251. else
  1252. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1253. return true;
  1254. }
  1255. #else
  1256. static inline bool
  1257. dp_rx_is_list_ready(qdf_nbuf_t nbuf_head,
  1258. struct dp_vdev *vdev,
  1259. struct dp_peer *peer,
  1260. uint16_t peer_id,
  1261. uint8_t vdev_id)
  1262. {
  1263. if (nbuf_head && vdev && (vdev->vdev_id != vdev_id))
  1264. return true;
  1265. return false;
  1266. }
  1267. static inline bool
  1268. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1269. struct dp_peer *peer, qdf_nbuf_t nbuf_head)
  1270. {
  1271. return false;
  1272. }
  1273. #endif
  1274. #ifdef PEER_CACHE_RX_PKTS
  1275. /**
  1276. * dp_rx_flush_rx_cached() - flush cached rx frames
  1277. * @peer: peer
  1278. * @drop: flag to drop frames or forward to net stack
  1279. *
  1280. * Return: None
  1281. */
  1282. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1283. {
  1284. struct dp_peer_cached_bufq *bufqi;
  1285. struct dp_rx_cached_buf *cache_buf = NULL;
  1286. ol_txrx_rx_fp data_rx = NULL;
  1287. int num_buff_elem;
  1288. QDF_STATUS status;
  1289. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1290. qdf_atomic_dec(&peer->flush_in_progress);
  1291. return;
  1292. }
  1293. qdf_spin_lock_bh(&peer->peer_info_lock);
  1294. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1295. data_rx = peer->vdev->osif_rx;
  1296. else
  1297. drop = true;
  1298. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1299. bufqi = &peer->bufq_info;
  1300. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1301. qdf_list_remove_front(&bufqi->cached_bufq,
  1302. (qdf_list_node_t **)&cache_buf);
  1303. while (cache_buf) {
  1304. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1305. cache_buf->buf);
  1306. bufqi->entries -= num_buff_elem;
  1307. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1308. if (drop) {
  1309. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1310. cache_buf->buf);
  1311. } else {
  1312. /* Flush the cached frames to OSIF DEV */
  1313. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1314. if (status != QDF_STATUS_SUCCESS)
  1315. bufqi->dropped = dp_rx_drop_nbuf_list(
  1316. peer->vdev->pdev,
  1317. cache_buf->buf);
  1318. }
  1319. qdf_mem_free(cache_buf);
  1320. cache_buf = NULL;
  1321. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1322. qdf_list_remove_front(&bufqi->cached_bufq,
  1323. (qdf_list_node_t **)&cache_buf);
  1324. }
  1325. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1326. qdf_atomic_dec(&peer->flush_in_progress);
  1327. }
  1328. /**
  1329. * dp_rx_enqueue_rx() - cache rx frames
  1330. * @peer: peer
  1331. * @rx_buf_list: cache buffer list
  1332. *
  1333. * Return: None
  1334. */
  1335. static QDF_STATUS
  1336. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1337. {
  1338. struct dp_rx_cached_buf *cache_buf;
  1339. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1340. int num_buff_elem;
  1341. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1342. bufqi->dropped);
  1343. if (!peer->valid) {
  1344. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1345. rx_buf_list);
  1346. return QDF_STATUS_E_INVAL;
  1347. }
  1348. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1349. if (bufqi->entries >= bufqi->thresh) {
  1350. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1351. rx_buf_list);
  1352. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1353. return QDF_STATUS_E_RESOURCES;
  1354. }
  1355. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1356. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1357. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1358. if (!cache_buf) {
  1359. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1360. "Failed to allocate buf to cache rx frames");
  1361. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1362. rx_buf_list);
  1363. return QDF_STATUS_E_NOMEM;
  1364. }
  1365. cache_buf->buf = rx_buf_list;
  1366. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1367. qdf_list_insert_back(&bufqi->cached_bufq,
  1368. &cache_buf->node);
  1369. bufqi->entries += num_buff_elem;
  1370. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1371. return QDF_STATUS_SUCCESS;
  1372. }
  1373. static inline
  1374. bool dp_rx_is_peer_cache_bufq_supported(void)
  1375. {
  1376. return true;
  1377. }
  1378. #else
  1379. static inline
  1380. bool dp_rx_is_peer_cache_bufq_supported(void)
  1381. {
  1382. return false;
  1383. }
  1384. static inline QDF_STATUS
  1385. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1386. {
  1387. return QDF_STATUS_SUCCESS;
  1388. }
  1389. #endif
  1390. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1391. /**
  1392. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1393. * using the appropriate call back functions.
  1394. * @soc: soc
  1395. * @vdev: vdev
  1396. * @peer: peer
  1397. * @nbuf_head: skb list head
  1398. * @nbuf_tail: skb list tail
  1399. *
  1400. * Return: None
  1401. */
  1402. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1403. struct dp_vdev *vdev,
  1404. struct dp_peer *peer,
  1405. qdf_nbuf_t nbuf_head)
  1406. {
  1407. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1408. peer, nbuf_head)))
  1409. return;
  1410. /* Function pointer initialized only when FISA is enabled */
  1411. if (vdev->osif_fisa_rx)
  1412. /* on failure send it via regular path */
  1413. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1414. else
  1415. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1416. }
  1417. #else
  1418. /**
  1419. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1420. * using the appropriate call back functions.
  1421. * @soc: soc
  1422. * @vdev: vdev
  1423. * @peer: peer
  1424. * @nbuf_head: skb list head
  1425. * @nbuf_tail: skb list tail
  1426. *
  1427. * Check the return status of the call back function and drop
  1428. * the packets if the return status indicates a failure.
  1429. *
  1430. * Return: None
  1431. */
  1432. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1433. struct dp_vdev *vdev,
  1434. struct dp_peer *peer,
  1435. qdf_nbuf_t nbuf_head)
  1436. {
  1437. int num_nbuf = 0;
  1438. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1439. /* Function pointer initialized only when FISA is enabled */
  1440. if (vdev->osif_fisa_rx)
  1441. /* on failure send it via regular path */
  1442. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1443. else if (vdev->osif_rx)
  1444. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1445. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1446. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1447. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1448. if (peer)
  1449. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1450. }
  1451. }
  1452. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1453. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1454. struct dp_vdev *vdev,
  1455. struct dp_peer *peer,
  1456. qdf_nbuf_t nbuf_head,
  1457. qdf_nbuf_t nbuf_tail)
  1458. {
  1459. int num_nbuf = 0;
  1460. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1461. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1462. /*
  1463. * This is a special case where vdev is invalid,
  1464. * so we cannot know the pdev to which this packet
  1465. * belonged. Hence we update the soc rx error stats.
  1466. */
  1467. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1468. return;
  1469. }
  1470. /*
  1471. * highly unlikely to have a vdev without a registered rx
  1472. * callback function. if so let us free the nbuf_list.
  1473. */
  1474. if (qdf_unlikely(!vdev->osif_rx)) {
  1475. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1476. dp_rx_enqueue_rx(peer, nbuf_head);
  1477. } else {
  1478. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1479. nbuf_head);
  1480. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1481. }
  1482. return;
  1483. }
  1484. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1485. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1486. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1487. &nbuf_tail, peer->mac_addr.raw);
  1488. }
  1489. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1490. }
  1491. /**
  1492. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1493. * @nbuf: pointer to the first msdu of an amsdu.
  1494. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1495. *
  1496. * The ipsumed field of the skb is set based on whether HW validated the
  1497. * IP/TCP/UDP checksum.
  1498. *
  1499. * Return: void
  1500. */
  1501. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1502. qdf_nbuf_t nbuf,
  1503. uint8_t *rx_tlv_hdr)
  1504. {
  1505. qdf_nbuf_rx_cksum_t cksum = {0};
  1506. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1507. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1508. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1509. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1510. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1511. } else {
  1512. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1513. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1514. }
  1515. }
  1516. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1517. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1518. { \
  1519. qdf_nbuf_t nbuf_local; \
  1520. struct dp_peer *peer_local; \
  1521. struct dp_vdev *vdev_local = vdev_hdl; \
  1522. do { \
  1523. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1524. break; \
  1525. nbuf_local = nbuf; \
  1526. peer_local = peer; \
  1527. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1528. break; \
  1529. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1530. break; \
  1531. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1532. (nbuf_local), \
  1533. (peer_local), 0, 1); \
  1534. } while (0); \
  1535. }
  1536. #else
  1537. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1538. #endif
  1539. /**
  1540. * dp_rx_msdu_stats_update() - update per msdu stats.
  1541. * @soc: core txrx main context
  1542. * @nbuf: pointer to the first msdu of an amsdu.
  1543. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1544. * @peer: pointer to the peer object.
  1545. * @ring_id: reo dest ring number on which pkt is reaped.
  1546. * @tid_stats: per tid rx stats.
  1547. *
  1548. * update all the per msdu stats for that nbuf.
  1549. * Return: void
  1550. */
  1551. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1552. qdf_nbuf_t nbuf,
  1553. uint8_t *rx_tlv_hdr,
  1554. struct dp_peer *peer,
  1555. uint8_t ring_id,
  1556. struct cdp_tid_rx_stats *tid_stats)
  1557. {
  1558. bool is_ampdu, is_not_amsdu;
  1559. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1560. struct dp_vdev *vdev = peer->vdev;
  1561. qdf_ether_header_t *eh;
  1562. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1563. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1564. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1565. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1566. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1567. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1568. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1569. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1570. tid_stats->msdu_cnt++;
  1571. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1572. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1573. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1574. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1575. tid_stats->mcast_msdu_cnt++;
  1576. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1577. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1578. tid_stats->bcast_msdu_cnt++;
  1579. }
  1580. }
  1581. /*
  1582. * currently we can return from here as we have similar stats
  1583. * updated at per ppdu level instead of msdu level
  1584. */
  1585. if (!soc->process_rx_status)
  1586. return;
  1587. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1588. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1589. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1590. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1591. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1592. tid = qdf_nbuf_get_tid_val(nbuf);
  1593. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1594. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1595. rx_tlv_hdr);
  1596. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1597. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1598. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1599. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1600. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1601. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1602. DP_STATS_INC(peer, rx.bw[bw], 1);
  1603. /*
  1604. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1605. * then increase index [nss - 1] in array counter.
  1606. */
  1607. if (nss > 0 && (pkt_type == DOT11_N ||
  1608. pkt_type == DOT11_AC ||
  1609. pkt_type == DOT11_AX))
  1610. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1611. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1612. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1613. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1614. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1615. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1616. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1617. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1618. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1619. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1620. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1621. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1622. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1623. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1624. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1625. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1626. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1627. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1628. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1629. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1630. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1631. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1632. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1633. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1634. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1635. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1636. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1637. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1638. if ((soc->process_rx_status) &&
  1639. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1640. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1641. if (!vdev->pdev)
  1642. return;
  1643. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1644. &peer->stats, peer->peer_id,
  1645. UPDATE_PEER_STATS,
  1646. vdev->pdev->pdev_id);
  1647. #endif
  1648. }
  1649. }
  1650. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1651. uint8_t *rx_tlv_hdr,
  1652. qdf_nbuf_t nbuf,
  1653. struct hal_rx_msdu_metadata msdu_info)
  1654. {
  1655. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1656. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1657. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1658. qdf_nbuf_is_da_valid(nbuf) &&
  1659. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1660. return false;
  1661. return true;
  1662. }
  1663. #ifndef WDS_VENDOR_EXTENSION
  1664. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1665. struct dp_vdev *vdev,
  1666. struct dp_peer *peer)
  1667. {
  1668. return 1;
  1669. }
  1670. #endif
  1671. #ifdef RX_DESC_DEBUG_CHECK
  1672. /**
  1673. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1674. * corruption
  1675. *
  1676. * @ring_desc: REO ring descriptor
  1677. * @rx_desc: Rx descriptor
  1678. *
  1679. * Return: NONE
  1680. */
  1681. static inline
  1682. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1683. struct dp_rx_desc *rx_desc)
  1684. {
  1685. struct hal_buf_info hbi;
  1686. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1687. /* Sanity check for possible buffer paddr corruption */
  1688. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1689. return QDF_STATUS_SUCCESS;
  1690. return QDF_STATUS_E_FAILURE;
  1691. }
  1692. #else
  1693. static inline
  1694. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1695. struct dp_rx_desc *rx_desc)
  1696. {
  1697. return QDF_STATUS_SUCCESS;
  1698. }
  1699. #endif
  1700. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1701. static inline
  1702. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1703. {
  1704. bool limit_hit = false;
  1705. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1706. limit_hit =
  1707. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1708. if (limit_hit)
  1709. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1710. return limit_hit;
  1711. }
  1712. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1713. {
  1714. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1715. }
  1716. #else
  1717. static inline
  1718. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1719. {
  1720. return false;
  1721. }
  1722. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1723. {
  1724. return false;
  1725. }
  1726. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1727. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1728. /**
  1729. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1730. * no corresbonding peer found
  1731. * @soc: core txrx main context
  1732. * @nbuf: pkt skb pointer
  1733. *
  1734. * This function will try to deliver some RX special frames to stack
  1735. * even there is no peer matched found. for instance, LFR case, some
  1736. * eapol data will be sent to host before peer_map done.
  1737. *
  1738. * Return: None
  1739. */
  1740. static
  1741. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1742. {
  1743. uint16_t peer_id;
  1744. uint8_t vdev_id;
  1745. struct dp_vdev *vdev = NULL;
  1746. uint32_t l2_hdr_offset = 0;
  1747. uint16_t msdu_len = 0;
  1748. uint32_t pkt_len = 0;
  1749. uint8_t *rx_tlv_hdr;
  1750. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1751. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1752. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1753. if (peer_id > soc->max_peers)
  1754. goto deliver_fail;
  1755. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1756. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  1757. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1758. goto deliver_fail;
  1759. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1760. goto deliver_fail;
  1761. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1762. l2_hdr_offset =
  1763. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1764. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1765. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1766. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1767. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1768. qdf_nbuf_pull_head(nbuf,
  1769. RX_PKT_TLVS_LEN +
  1770. l2_hdr_offset);
  1771. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1772. qdf_nbuf_set_exc_frame(nbuf, 1);
  1773. if (QDF_STATUS_SUCCESS !=
  1774. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1775. goto deliver_fail;
  1776. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1777. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1778. return;
  1779. }
  1780. deliver_fail:
  1781. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1782. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1783. qdf_nbuf_free(nbuf);
  1784. if (vdev)
  1785. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  1786. }
  1787. #else
  1788. static inline
  1789. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1790. {
  1791. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1792. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1793. qdf_nbuf_free(nbuf);
  1794. }
  1795. #endif
  1796. /**
  1797. * dp_rx_srng_get_num_pending() - get number of pending entries
  1798. * @hal_soc: hal soc opaque pointer
  1799. * @hal_ring: opaque pointer to the HAL Rx Ring
  1800. * @num_entries: number of entries in the hal_ring.
  1801. * @near_full: pointer to a boolean. This is set if ring is near full.
  1802. *
  1803. * The function returns the number of entries in a destination ring which are
  1804. * yet to be reaped. The function also checks if the ring is near full.
  1805. * If more than half of the ring needs to be reaped, the ring is considered
  1806. * approaching full.
  1807. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1808. * entries. It should not be called within a SRNG lock. HW pointer value is
  1809. * synced into cached_hp.
  1810. *
  1811. * Return: Number of pending entries if any
  1812. */
  1813. static
  1814. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1815. hal_ring_handle_t hal_ring_hdl,
  1816. uint32_t num_entries,
  1817. bool *near_full)
  1818. {
  1819. uint32_t num_pending = 0;
  1820. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1821. hal_ring_hdl,
  1822. true);
  1823. if (num_entries && (num_pending >= num_entries >> 1))
  1824. *near_full = true;
  1825. else
  1826. *near_full = false;
  1827. return num_pending;
  1828. }
  1829. #ifdef WLAN_SUPPORT_RX_FISA
  1830. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1831. {
  1832. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1833. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1834. }
  1835. /**
  1836. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1837. * @nbuf: pkt skb pointer
  1838. * @l3_padding: l3 padding
  1839. *
  1840. * Return: None
  1841. */
  1842. static inline
  1843. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1844. {
  1845. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1846. }
  1847. #else
  1848. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1849. {
  1850. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1851. }
  1852. static inline
  1853. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1854. {
  1855. }
  1856. #endif
  1857. #ifdef DP_RX_DROP_RAW_FRM
  1858. /**
  1859. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1860. * @nbuf: pkt skb pointer
  1861. *
  1862. * Return: true - raw frame, dropped
  1863. * false - not raw frame, do nothing
  1864. */
  1865. static inline
  1866. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1867. {
  1868. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1869. qdf_nbuf_free(nbuf);
  1870. return true;
  1871. }
  1872. return false;
  1873. }
  1874. #else
  1875. static inline
  1876. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1877. {
  1878. return false;
  1879. }
  1880. #endif
  1881. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  1882. /**
  1883. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  1884. * @soc: Datapath soc structure
  1885. * @ring_num: REO ring number
  1886. * @ring_desc: REO ring descriptor
  1887. *
  1888. * Returns: None
  1889. */
  1890. static inline void
  1891. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1892. hal_ring_desc_t ring_desc)
  1893. {
  1894. struct dp_buf_info_record *record;
  1895. uint8_t rbm;
  1896. struct hal_buf_info hbi;
  1897. uint32_t idx;
  1898. if (qdf_unlikely(!&soc->rx_ring_history[ring_num]))
  1899. return;
  1900. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1901. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  1902. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  1903. DP_RX_HIST_MAX);
  1904. /* No NULL check needed for record since its an array */
  1905. record = &soc->rx_ring_history[ring_num]->entry[idx];
  1906. record->timestamp = qdf_get_log_timestamp();
  1907. record->hbi.paddr = hbi.paddr;
  1908. record->hbi.sw_cookie = hbi.sw_cookie;
  1909. record->hbi.rbm = rbm;
  1910. }
  1911. #else
  1912. static inline void
  1913. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  1914. hal_ring_desc_t ring_desc)
  1915. {
  1916. }
  1917. #endif
  1918. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  1919. /**
  1920. * dp_rx_update_stats() - Update soc level rx packet count
  1921. * @soc: DP soc handle
  1922. * @nbuf: nbuf received
  1923. *
  1924. * Returns: none
  1925. */
  1926. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1927. qdf_nbuf_t nbuf)
  1928. {
  1929. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  1930. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1931. }
  1932. #else
  1933. static inline void dp_rx_update_stats(struct dp_soc *soc,
  1934. qdf_nbuf_t nbuf)
  1935. {
  1936. }
  1937. #endif
  1938. /**
  1939. * dp_rx_process() - Brain of the Rx processing functionality
  1940. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1941. * @int_ctx: per interrupt context
  1942. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1943. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1944. * @quota: No. of units (packets) that can be serviced in one shot.
  1945. *
  1946. * This function implements the core of Rx functionality. This is
  1947. * expected to handle only non-error frames.
  1948. *
  1949. * Return: uint32_t: No. of elements processed
  1950. */
  1951. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1952. uint8_t reo_ring_num, uint32_t quota)
  1953. {
  1954. hal_ring_desc_t ring_desc;
  1955. hal_soc_handle_t hal_soc;
  1956. struct dp_rx_desc *rx_desc = NULL;
  1957. qdf_nbuf_t nbuf, next;
  1958. bool near_full;
  1959. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1960. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1961. uint32_t num_pending;
  1962. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1963. uint16_t msdu_len = 0;
  1964. uint16_t peer_id;
  1965. uint8_t vdev_id;
  1966. struct dp_peer *peer;
  1967. struct dp_vdev *vdev;
  1968. uint32_t pkt_len = 0;
  1969. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1970. struct hal_rx_msdu_desc_info msdu_desc_info;
  1971. enum hal_reo_error_status error;
  1972. uint32_t peer_mdata;
  1973. uint8_t *rx_tlv_hdr;
  1974. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1975. uint8_t mac_id = 0;
  1976. struct dp_pdev *rx_pdev;
  1977. struct dp_srng *dp_rxdma_srng;
  1978. struct rx_desc_pool *rx_desc_pool;
  1979. struct dp_soc *soc = int_ctx->soc;
  1980. uint8_t ring_id = 0;
  1981. uint8_t core_id = 0;
  1982. struct cdp_tid_rx_stats *tid_stats;
  1983. qdf_nbuf_t nbuf_head;
  1984. qdf_nbuf_t nbuf_tail;
  1985. qdf_nbuf_t deliver_list_head;
  1986. qdf_nbuf_t deliver_list_tail;
  1987. uint32_t num_rx_bufs_reaped = 0;
  1988. uint32_t intr_id;
  1989. struct hif_opaque_softc *scn;
  1990. int32_t tid = 0;
  1991. bool is_prev_msdu_last = true;
  1992. uint32_t num_entries_avail = 0;
  1993. uint32_t rx_ol_pkt_cnt = 0;
  1994. uint32_t num_entries = 0;
  1995. struct hal_rx_msdu_metadata msdu_metadata;
  1996. QDF_STATUS status;
  1997. qdf_nbuf_t ebuf_head;
  1998. qdf_nbuf_t ebuf_tail;
  1999. DP_HIST_INIT();
  2000. qdf_assert_always(soc && hal_ring_hdl);
  2001. hal_soc = soc->hal_soc;
  2002. qdf_assert_always(hal_soc);
  2003. scn = soc->hif_handle;
  2004. hif_pm_runtime_mark_dp_rx_busy(scn);
  2005. intr_id = int_ctx->dp_intr_id;
  2006. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  2007. more_data:
  2008. /* reset local variables here to be re-used in the function */
  2009. nbuf_head = NULL;
  2010. nbuf_tail = NULL;
  2011. deliver_list_head = NULL;
  2012. deliver_list_tail = NULL;
  2013. peer = NULL;
  2014. vdev = NULL;
  2015. num_rx_bufs_reaped = 0;
  2016. ebuf_head = NULL;
  2017. ebuf_tail = NULL;
  2018. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  2019. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  2020. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  2021. qdf_mem_zero(head, sizeof(head));
  2022. qdf_mem_zero(tail, sizeof(tail));
  2023. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  2024. /*
  2025. * Need API to convert from hal_ring pointer to
  2026. * Ring Type / Ring Id combo
  2027. */
  2028. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  2029. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2030. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  2031. goto done;
  2032. }
  2033. /*
  2034. * start reaping the buffers from reo ring and queue
  2035. * them in per vdev queue.
  2036. * Process the received pkts in a different per vdev loop.
  2037. */
  2038. while (qdf_likely(quota &&
  2039. (ring_desc = hal_srng_dst_peek(hal_soc,
  2040. hal_ring_hdl)))) {
  2041. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  2042. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  2043. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  2044. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2045. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  2046. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  2047. /* Don't know how to deal with this -- assert */
  2048. qdf_assert(0);
  2049. }
  2050. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  2051. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  2052. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  2053. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2054. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  2055. break;
  2056. }
  2057. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  2058. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  2059. ring_desc, rx_desc);
  2060. if (QDF_IS_STATUS_ERROR(status)) {
  2061. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  2062. qdf_assert_always(rx_desc->unmapped);
  2063. dp_ipa_handle_rx_buf_smmu_mapping(
  2064. soc,
  2065. rx_desc->nbuf,
  2066. RX_DATA_BUFFER_SIZE,
  2067. false);
  2068. qdf_nbuf_unmap_nbytes_single(
  2069. soc->osdev,
  2070. rx_desc->nbuf,
  2071. QDF_DMA_FROM_DEVICE,
  2072. RX_DATA_BUFFER_SIZE);
  2073. rx_desc->unmapped = 1;
  2074. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  2075. rx_desc->pool_id);
  2076. dp_rx_add_to_free_desc_list(
  2077. &head[rx_desc->pool_id],
  2078. &tail[rx_desc->pool_id],
  2079. rx_desc);
  2080. }
  2081. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2082. continue;
  2083. }
  2084. /*
  2085. * this is a unlikely scenario where the host is reaping
  2086. * a descriptor which it already reaped just a while ago
  2087. * but is yet to replenish it back to HW.
  2088. * In this case host will dump the last 128 descriptors
  2089. * including the software descriptor rx_desc and assert.
  2090. */
  2091. if (qdf_unlikely(!rx_desc->in_use)) {
  2092. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  2093. dp_info_rl("Reaping rx_desc not in use!");
  2094. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2095. ring_desc, rx_desc);
  2096. /* ignore duplicate RX desc and continue to process */
  2097. /* Pop out the descriptor */
  2098. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2099. continue;
  2100. }
  2101. status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  2102. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  2103. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  2104. dp_info_rl("Nbuf sanity check failure!");
  2105. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2106. ring_desc, rx_desc);
  2107. rx_desc->in_err_state = 1;
  2108. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2109. continue;
  2110. }
  2111. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  2112. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  2113. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  2114. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  2115. ring_desc, rx_desc);
  2116. }
  2117. /* Get MPDU DESC info */
  2118. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  2119. /* Get MSDU DESC info */
  2120. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  2121. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  2122. HAL_MSDU_F_MSDU_CONTINUATION)) {
  2123. /* previous msdu has end bit set, so current one is
  2124. * the new MPDU
  2125. */
  2126. if (is_prev_msdu_last) {
  2127. /* Get number of entries available in HW ring */
  2128. num_entries_avail =
  2129. hal_srng_dst_num_valid(hal_soc,
  2130. hal_ring_hdl, 1);
  2131. /* For new MPDU check if we can read complete
  2132. * MPDU by comparing the number of buffers
  2133. * available and number of buffers needed to
  2134. * reap this MPDU
  2135. */
  2136. if (((msdu_desc_info.msdu_len /
  2137. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  2138. 1)) > num_entries_avail) {
  2139. DP_STATS_INC(
  2140. soc,
  2141. rx.msdu_scatter_wait_break,
  2142. 1);
  2143. break;
  2144. }
  2145. is_prev_msdu_last = false;
  2146. }
  2147. }
  2148. core_id = smp_processor_id();
  2149. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  2150. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  2151. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  2152. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  2153. HAL_MPDU_F_RAW_AMPDU))
  2154. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  2155. if (!is_prev_msdu_last &&
  2156. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2157. is_prev_msdu_last = true;
  2158. /* Pop out the descriptor*/
  2159. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  2160. rx_bufs_reaped[rx_desc->pool_id]++;
  2161. peer_mdata = mpdu_desc_info.peer_meta_data;
  2162. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  2163. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  2164. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  2165. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  2166. /*
  2167. * save msdu flags first, last and continuation msdu in
  2168. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  2169. * length to nbuf->cb. This ensures the info required for
  2170. * per pkt processing is always in the same cache line.
  2171. * This helps in improving throughput for smaller pkt
  2172. * sizes.
  2173. */
  2174. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  2175. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  2176. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  2177. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  2178. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  2179. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  2180. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  2181. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  2182. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  2183. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  2184. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  2185. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  2186. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  2187. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  2188. qdf_nbuf_set_rx_reo_dest_ind(
  2189. rx_desc->nbuf,
  2190. HAL_RX_REO_MSDU_REO_DST_IND_GET(ring_desc));
  2191. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  2192. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  2193. /*
  2194. * move unmap after scattered msdu waiting break logic
  2195. * in case double skb unmap happened.
  2196. */
  2197. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  2198. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  2199. rx_desc_pool->buf_size,
  2200. false);
  2201. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  2202. QDF_DMA_FROM_DEVICE,
  2203. rx_desc_pool->buf_size);
  2204. rx_desc->unmapped = 1;
  2205. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  2206. ebuf_tail, rx_desc);
  2207. /*
  2208. * if continuation bit is set then we have MSDU spread
  2209. * across multiple buffers, let us not decrement quota
  2210. * till we reap all buffers of that MSDU.
  2211. */
  2212. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  2213. quota -= 1;
  2214. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  2215. &tail[rx_desc->pool_id],
  2216. rx_desc);
  2217. num_rx_bufs_reaped++;
  2218. /*
  2219. * only if complete msdu is received for scatter case,
  2220. * then allow break.
  2221. */
  2222. if (is_prev_msdu_last &&
  2223. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  2224. break;
  2225. }
  2226. done:
  2227. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  2228. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  2229. /*
  2230. * continue with next mac_id if no pkts were reaped
  2231. * from that pool
  2232. */
  2233. if (!rx_bufs_reaped[mac_id])
  2234. continue;
  2235. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2236. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2237. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2238. rx_desc_pool, rx_bufs_reaped[mac_id],
  2239. &head[mac_id], &tail[mac_id]);
  2240. }
  2241. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  2242. /* Peer can be NULL is case of LFR */
  2243. if (qdf_likely(peer))
  2244. vdev = NULL;
  2245. /*
  2246. * BIG loop where each nbuf is dequeued from global queue,
  2247. * processed and queued back on a per vdev basis. These nbufs
  2248. * are sent to stack as and when we run out of nbufs
  2249. * or a new nbuf dequeued from global queue has a different
  2250. * vdev when compared to previous nbuf.
  2251. */
  2252. nbuf = nbuf_head;
  2253. while (nbuf) {
  2254. next = nbuf->next;
  2255. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2256. nbuf = next;
  2257. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2258. continue;
  2259. }
  2260. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2261. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2262. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2263. if (dp_rx_is_list_ready(deliver_list_head, vdev, peer,
  2264. peer_id, vdev_id)) {
  2265. dp_rx_deliver_to_stack(soc, vdev, peer,
  2266. deliver_list_head,
  2267. deliver_list_tail);
  2268. deliver_list_head = NULL;
  2269. deliver_list_tail = NULL;
  2270. }
  2271. /* Get TID from struct cb->tid_val, save to tid */
  2272. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2273. tid = qdf_nbuf_get_tid_val(nbuf);
  2274. if (qdf_unlikely(!peer)) {
  2275. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2276. DP_MOD_ID_RX);
  2277. } else if (peer && peer->peer_id != peer_id) {
  2278. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2279. peer = dp_peer_get_ref_by_id(soc, peer_id,
  2280. DP_MOD_ID_RX);
  2281. }
  2282. if (peer) {
  2283. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2284. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2285. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2286. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2287. QDF_NBUF_RX_PKT_DATA_TRACK;
  2288. }
  2289. rx_bufs_used++;
  2290. if (qdf_likely(peer)) {
  2291. vdev = peer->vdev;
  2292. } else {
  2293. nbuf->next = NULL;
  2294. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2295. nbuf = next;
  2296. continue;
  2297. }
  2298. if (qdf_unlikely(!vdev)) {
  2299. qdf_nbuf_free(nbuf);
  2300. nbuf = next;
  2301. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2302. continue;
  2303. }
  2304. /* when hlos tid override is enabled, save tid in
  2305. * skb->priority
  2306. */
  2307. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  2308. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  2309. qdf_nbuf_set_priority(nbuf, tid);
  2310. rx_pdev = vdev->pdev;
  2311. DP_RX_TID_SAVE(nbuf, tid);
  2312. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2313. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2314. soc->wlan_cfg_ctx)))
  2315. qdf_nbuf_set_timestamp(nbuf);
  2316. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2317. tid_stats =
  2318. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2319. /*
  2320. * Check if DMA completed -- msdu_done is the last bit
  2321. * to be written
  2322. */
  2323. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2324. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2325. dp_err("MSDU DONE failure");
  2326. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2327. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2328. QDF_TRACE_LEVEL_INFO);
  2329. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2330. qdf_nbuf_free(nbuf);
  2331. qdf_assert(0);
  2332. nbuf = next;
  2333. continue;
  2334. }
  2335. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2336. /*
  2337. * First IF condition:
  2338. * 802.11 Fragmented pkts are reinjected to REO
  2339. * HW block as SG pkts and for these pkts we only
  2340. * need to pull the RX TLVS header length.
  2341. * Second IF condition:
  2342. * The below condition happens when an MSDU is spread
  2343. * across multiple buffers. This can happen in two cases
  2344. * 1. The nbuf size is smaller then the received msdu.
  2345. * ex: we have set the nbuf size to 2048 during
  2346. * nbuf_alloc. but we received an msdu which is
  2347. * 2304 bytes in size then this msdu is spread
  2348. * across 2 nbufs.
  2349. *
  2350. * 2. AMSDUs when RAW mode is enabled.
  2351. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2352. * across 1st nbuf and 2nd nbuf and last MSDU is
  2353. * spread across 2nd nbuf and 3rd nbuf.
  2354. *
  2355. * for these scenarios let us create a skb frag_list and
  2356. * append these buffers till the last MSDU of the AMSDU
  2357. * Third condition:
  2358. * This is the most likely case, we receive 802.3 pkts
  2359. * decapsulated by HW, here we need to set the pkt length.
  2360. */
  2361. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2362. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2363. bool is_mcbc, is_sa_vld, is_da_vld;
  2364. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2365. rx_tlv_hdr);
  2366. is_sa_vld =
  2367. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2368. rx_tlv_hdr);
  2369. is_da_vld =
  2370. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2371. rx_tlv_hdr);
  2372. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2373. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2374. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2375. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2376. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2377. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2378. nbuf = dp_rx_sg_create(soc, nbuf);
  2379. next = nbuf->next;
  2380. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2381. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2382. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2383. } else {
  2384. qdf_nbuf_free(nbuf);
  2385. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2386. dp_info_rl("scatter msdu len %d, dropped",
  2387. msdu_len);
  2388. nbuf = next;
  2389. continue;
  2390. }
  2391. } else {
  2392. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2393. pkt_len = msdu_len +
  2394. msdu_metadata.l3_hdr_pad +
  2395. RX_PKT_TLVS_LEN;
  2396. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2397. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2398. }
  2399. /*
  2400. * process frame for mulitpass phrase processing
  2401. */
  2402. if (qdf_unlikely(vdev->multipass_en)) {
  2403. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2404. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2405. qdf_nbuf_free(nbuf);
  2406. nbuf = next;
  2407. continue;
  2408. }
  2409. }
  2410. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2411. QDF_TRACE(QDF_MODULE_ID_DP,
  2412. QDF_TRACE_LEVEL_ERROR,
  2413. FL("Policy Check Drop pkt"));
  2414. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2415. /* Drop & free packet */
  2416. qdf_nbuf_free(nbuf);
  2417. /* Statistics */
  2418. nbuf = next;
  2419. continue;
  2420. }
  2421. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2422. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2423. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2424. rx_tlv_hdr) ==
  2425. false))) {
  2426. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2427. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2428. qdf_nbuf_free(nbuf);
  2429. nbuf = next;
  2430. continue;
  2431. }
  2432. if (soc->process_rx_status)
  2433. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2434. /* Update the protocol tag in SKB based on CCE metadata */
  2435. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2436. reo_ring_num, false, true);
  2437. /* Update the flow tag in SKB based on FSE metadata */
  2438. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2439. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2440. ring_id, tid_stats);
  2441. if (qdf_unlikely(vdev->mesh_vdev)) {
  2442. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2443. == QDF_STATUS_SUCCESS) {
  2444. QDF_TRACE(QDF_MODULE_ID_DP,
  2445. QDF_TRACE_LEVEL_INFO_MED,
  2446. FL("mesh pkt filtered"));
  2447. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2448. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2449. 1);
  2450. qdf_nbuf_free(nbuf);
  2451. nbuf = next;
  2452. continue;
  2453. }
  2454. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2455. }
  2456. if (qdf_likely(vdev->rx_decap_type ==
  2457. htt_cmn_pkt_type_ethernet) &&
  2458. qdf_likely(!vdev->mesh_vdev)) {
  2459. /* WDS Destination Address Learning */
  2460. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2461. /* Due to HW issue, sometimes we see that the sa_idx
  2462. * and da_idx are invalid with sa_valid and da_valid
  2463. * bits set
  2464. *
  2465. * in this case we also see that value of
  2466. * sa_sw_peer_id is set as 0
  2467. *
  2468. * Drop the packet if sa_idx and da_idx OOB or
  2469. * sa_sw_peerid is 0
  2470. */
  2471. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2472. msdu_metadata)) {
  2473. qdf_nbuf_free(nbuf);
  2474. nbuf = next;
  2475. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2476. continue;
  2477. }
  2478. /* WDS Source Port Learning */
  2479. if (qdf_likely(vdev->wds_enabled))
  2480. dp_rx_wds_srcport_learn(soc,
  2481. rx_tlv_hdr,
  2482. peer,
  2483. nbuf,
  2484. msdu_metadata);
  2485. /* Intrabss-fwd */
  2486. if (dp_rx_check_ap_bridge(vdev))
  2487. if (dp_rx_intrabss_fwd(soc,
  2488. peer,
  2489. rx_tlv_hdr,
  2490. nbuf,
  2491. msdu_metadata)) {
  2492. nbuf = next;
  2493. tid_stats->intrabss_cnt++;
  2494. continue; /* Get next desc */
  2495. }
  2496. }
  2497. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2498. dp_rx_update_stats(soc, nbuf);
  2499. DP_RX_LIST_APPEND(deliver_list_head,
  2500. deliver_list_tail,
  2501. nbuf);
  2502. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2503. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2504. if (qdf_unlikely(peer->in_twt))
  2505. DP_STATS_INC_PKT(peer, rx.to_stack_twt, 1,
  2506. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2507. tid_stats->delivered_to_stack++;
  2508. nbuf = next;
  2509. }
  2510. if (qdf_likely(deliver_list_head)) {
  2511. if (qdf_likely(peer))
  2512. dp_rx_deliver_to_stack(soc, vdev, peer,
  2513. deliver_list_head,
  2514. deliver_list_tail);
  2515. else {
  2516. nbuf = deliver_list_head;
  2517. while (nbuf) {
  2518. next = nbuf->next;
  2519. nbuf->next = NULL;
  2520. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2521. nbuf = next;
  2522. }
  2523. }
  2524. }
  2525. if (qdf_likely(peer))
  2526. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  2527. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2528. if (quota) {
  2529. num_pending =
  2530. dp_rx_srng_get_num_pending(hal_soc,
  2531. hal_ring_hdl,
  2532. num_entries,
  2533. &near_full);
  2534. if (num_pending) {
  2535. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2536. if (!hif_exec_should_yield(scn, intr_id))
  2537. goto more_data;
  2538. if (qdf_unlikely(near_full)) {
  2539. DP_STATS_INC(soc, rx.near_full, 1);
  2540. goto more_data;
  2541. }
  2542. }
  2543. }
  2544. if (vdev && vdev->osif_fisa_flush)
  2545. vdev->osif_fisa_flush(soc, reo_ring_num);
  2546. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2547. vdev->osif_gro_flush(vdev->osif_vdev,
  2548. reo_ring_num);
  2549. }
  2550. }
  2551. /* Update histogram statistics by looping through pdev's */
  2552. DP_RX_HIST_STATS_PER_PDEV();
  2553. return rx_bufs_used; /* Assume no scale factor for now */
  2554. }
  2555. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2556. {
  2557. QDF_STATUS ret;
  2558. if (vdev->osif_rx_flush) {
  2559. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2560. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2561. dp_err("Failed to flush rx pkts for vdev %d\n",
  2562. vdev->vdev_id);
  2563. return ret;
  2564. }
  2565. }
  2566. return QDF_STATUS_SUCCESS;
  2567. }
  2568. static QDF_STATUS
  2569. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2570. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2571. struct dp_pdev *dp_pdev,
  2572. struct rx_desc_pool *rx_desc_pool)
  2573. {
  2574. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2575. (nbuf_frag_info_t->virt_addr).nbuf =
  2576. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2577. RX_BUFFER_RESERVATION,
  2578. rx_desc_pool->buf_alignment, FALSE);
  2579. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2580. dp_err("nbuf alloc failed");
  2581. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2582. return ret;
  2583. }
  2584. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2585. (nbuf_frag_info_t->virt_addr).nbuf,
  2586. QDF_DMA_FROM_DEVICE,
  2587. rx_desc_pool->buf_size);
  2588. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2589. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2590. dp_err("nbuf map failed");
  2591. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2592. return ret;
  2593. }
  2594. nbuf_frag_info_t->paddr =
  2595. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2596. ret = check_x86_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2597. &nbuf_frag_info_t->paddr,
  2598. rx_desc_pool);
  2599. if (ret == QDF_STATUS_E_FAILURE) {
  2600. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev,
  2601. (nbuf_frag_info_t->virt_addr).nbuf,
  2602. QDF_DMA_FROM_DEVICE,
  2603. rx_desc_pool->buf_size);
  2604. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2605. dp_err("nbuf check x86 failed");
  2606. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2607. return ret;
  2608. }
  2609. return QDF_STATUS_SUCCESS;
  2610. }
  2611. QDF_STATUS
  2612. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2613. struct dp_srng *dp_rxdma_srng,
  2614. struct rx_desc_pool *rx_desc_pool,
  2615. uint32_t num_req_buffers)
  2616. {
  2617. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2618. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2619. union dp_rx_desc_list_elem_t *next;
  2620. void *rxdma_ring_entry;
  2621. qdf_dma_addr_t paddr;
  2622. struct dp_rx_nbuf_frag_info *nf_info;
  2623. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2624. uint32_t buffer_index, nbuf_ptrs_per_page;
  2625. qdf_nbuf_t nbuf;
  2626. QDF_STATUS ret;
  2627. int page_idx, total_pages;
  2628. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2629. union dp_rx_desc_list_elem_t *tail = NULL;
  2630. int sync_hw_ptr = 1;
  2631. uint32_t num_entries_avail;
  2632. if (qdf_unlikely(!rxdma_srng)) {
  2633. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2634. return QDF_STATUS_E_FAILURE;
  2635. }
  2636. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2637. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2638. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2639. rxdma_srng,
  2640. sync_hw_ptr);
  2641. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2642. if (!num_entries_avail) {
  2643. dp_err("Num of available entries is zero, nothing to do");
  2644. return QDF_STATUS_E_NOMEM;
  2645. }
  2646. if (num_entries_avail < num_req_buffers)
  2647. num_req_buffers = num_entries_avail;
  2648. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2649. num_req_buffers, &desc_list, &tail);
  2650. if (!nr_descs) {
  2651. dp_err("no free rx_descs in freelist");
  2652. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2653. return QDF_STATUS_E_NOMEM;
  2654. }
  2655. dp_debug("got %u RX descs for driver attach", nr_descs);
  2656. /*
  2657. * Try to allocate pointers to the nbuf one page at a time.
  2658. * Take pointers that can fit in one page of memory and
  2659. * iterate through the total descriptors that need to be
  2660. * allocated in order of pages. Reuse the pointers that
  2661. * have been allocated to fit in one page across each
  2662. * iteration to index into the nbuf.
  2663. */
  2664. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2665. /*
  2666. * Add an extra page to store the remainder if any
  2667. */
  2668. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2669. total_pages++;
  2670. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2671. if (!nf_info) {
  2672. dp_err("failed to allocate nbuf array");
  2673. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2674. QDF_BUG(0);
  2675. return QDF_STATUS_E_NOMEM;
  2676. }
  2677. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2678. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2679. qdf_mem_zero(nf_info, PAGE_SIZE);
  2680. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2681. /*
  2682. * The last page of buffer pointers may not be required
  2683. * completely based on the number of descriptors. Below
  2684. * check will ensure we are allocating only the
  2685. * required number of descriptors.
  2686. */
  2687. if (nr_nbuf_total >= nr_descs)
  2688. break;
  2689. /* Flag is set while pdev rx_desc_pool initialization */
  2690. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2691. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2692. &nf_info[nr_nbuf], dp_pdev,
  2693. rx_desc_pool);
  2694. else
  2695. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2696. &nf_info[nr_nbuf], dp_pdev,
  2697. rx_desc_pool);
  2698. if (QDF_IS_STATUS_ERROR(ret))
  2699. break;
  2700. nr_nbuf_total++;
  2701. }
  2702. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2703. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2704. rxdma_ring_entry =
  2705. hal_srng_src_get_next(dp_soc->hal_soc,
  2706. rxdma_srng);
  2707. qdf_assert_always(rxdma_ring_entry);
  2708. next = desc_list->next;
  2709. paddr = nf_info[buffer_index].paddr;
  2710. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2711. /* Flag is set while pdev rx_desc_pool initialization */
  2712. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2713. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2714. &nf_info[buffer_index]);
  2715. else
  2716. dp_rx_desc_prep(&desc_list->rx_desc,
  2717. &nf_info[buffer_index]);
  2718. desc_list->rx_desc.in_use = 1;
  2719. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2720. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2721. __func__,
  2722. RX_DESC_REPLENISHED);
  2723. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2724. desc_list->rx_desc.cookie,
  2725. rx_desc_pool->owner);
  2726. dp_ipa_handle_rx_buf_smmu_mapping(
  2727. dp_soc, nbuf,
  2728. rx_desc_pool->buf_size,
  2729. true);
  2730. desc_list = next;
  2731. }
  2732. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2733. }
  2734. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2735. qdf_mem_free(nf_info);
  2736. if (!nr_nbuf_total) {
  2737. dp_err("No nbuf's allocated");
  2738. QDF_BUG(0);
  2739. return QDF_STATUS_E_RESOURCES;
  2740. }
  2741. /* No need to count the number of bytes received during replenish.
  2742. * Therefore set replenish.pkts.bytes as 0.
  2743. */
  2744. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2745. return QDF_STATUS_SUCCESS;
  2746. }
  2747. /**
  2748. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2749. * monitor destination ring via frag.
  2750. *
  2751. * Enable this flag only for monitor destination buffer processing
  2752. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2753. * If flag is set then frag based function will be called for alloc,
  2754. * map, prep desc and free ops for desc buffer else normal nbuf based
  2755. * function will be called.
  2756. *
  2757. * @rx_desc_pool: Rx desc pool
  2758. * @is_mon_dest_desc: Is it for monitor dest buffer
  2759. *
  2760. * Return: None
  2761. */
  2762. #ifdef DP_RX_MON_MEM_FRAG
  2763. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2764. bool is_mon_dest_desc)
  2765. {
  2766. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2767. if (is_mon_dest_desc)
  2768. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2769. }
  2770. #else
  2771. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2772. bool is_mon_dest_desc)
  2773. {
  2774. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2775. if (is_mon_dest_desc)
  2776. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2777. }
  2778. #endif
  2779. /*
  2780. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2781. * pool
  2782. *
  2783. * @pdev: core txrx pdev context
  2784. *
  2785. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2786. * QDF_STATUS_E_NOMEM
  2787. */
  2788. QDF_STATUS
  2789. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2790. {
  2791. struct dp_soc *soc = pdev->soc;
  2792. uint32_t rxdma_entries;
  2793. uint32_t rx_sw_desc_num;
  2794. struct dp_srng *dp_rxdma_srng;
  2795. struct rx_desc_pool *rx_desc_pool;
  2796. uint32_t status = QDF_STATUS_SUCCESS;
  2797. int mac_for_pdev;
  2798. mac_for_pdev = pdev->lmac_id;
  2799. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2800. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2801. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2802. return status;
  2803. }
  2804. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2805. rxdma_entries = dp_rxdma_srng->num_entries;
  2806. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2807. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2808. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2809. status = dp_rx_desc_pool_alloc(soc,
  2810. rx_sw_desc_num,
  2811. rx_desc_pool);
  2812. if (status != QDF_STATUS_SUCCESS)
  2813. return status;
  2814. return status;
  2815. }
  2816. /*
  2817. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2818. *
  2819. * @pdev: core txrx pdev context
  2820. */
  2821. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2822. {
  2823. int mac_for_pdev = pdev->lmac_id;
  2824. struct dp_soc *soc = pdev->soc;
  2825. struct rx_desc_pool *rx_desc_pool;
  2826. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2827. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2828. }
  2829. /*
  2830. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2831. *
  2832. * @pdev: core txrx pdev context
  2833. *
  2834. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2835. * QDF_STATUS_E_NOMEM
  2836. */
  2837. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2838. {
  2839. int mac_for_pdev = pdev->lmac_id;
  2840. struct dp_soc *soc = pdev->soc;
  2841. uint32_t rxdma_entries;
  2842. uint32_t rx_sw_desc_num;
  2843. struct dp_srng *dp_rxdma_srng;
  2844. struct rx_desc_pool *rx_desc_pool;
  2845. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2846. /**
  2847. * If NSS is enabled, rx_desc_pool is already filled.
  2848. * Hence, just disable desc_pool frag flag.
  2849. */
  2850. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2851. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2852. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2853. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2854. return QDF_STATUS_SUCCESS;
  2855. }
  2856. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2857. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2858. return QDF_STATUS_E_NOMEM;
  2859. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2860. rxdma_entries = dp_rxdma_srng->num_entries;
  2861. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2862. rx_sw_desc_num =
  2863. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2864. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2865. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2866. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2867. /* Disable monitor dest processing via frag */
  2868. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2869. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2870. rx_sw_desc_num, rx_desc_pool);
  2871. return QDF_STATUS_SUCCESS;
  2872. }
  2873. /*
  2874. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2875. * @pdev: core txrx pdev context
  2876. *
  2877. * This function resets the freelist of rx descriptors and destroys locks
  2878. * associated with this list of descriptors.
  2879. */
  2880. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2881. {
  2882. int mac_for_pdev = pdev->lmac_id;
  2883. struct dp_soc *soc = pdev->soc;
  2884. struct rx_desc_pool *rx_desc_pool;
  2885. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2886. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2887. }
  2888. /*
  2889. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2890. *
  2891. * @pdev: core txrx pdev context
  2892. *
  2893. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2894. * QDF_STATUS_E_NOMEM
  2895. */
  2896. QDF_STATUS
  2897. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2898. {
  2899. int mac_for_pdev = pdev->lmac_id;
  2900. struct dp_soc *soc = pdev->soc;
  2901. struct dp_srng *dp_rxdma_srng;
  2902. struct rx_desc_pool *rx_desc_pool;
  2903. uint32_t rxdma_entries;
  2904. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2905. rxdma_entries = dp_rxdma_srng->num_entries;
  2906. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2907. /* Initialize RX buffer pool which will be
  2908. * used during low memory conditions
  2909. */
  2910. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2911. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2912. rx_desc_pool, rxdma_entries - 1);
  2913. }
  2914. /*
  2915. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2916. *
  2917. * @pdev: core txrx pdev context
  2918. */
  2919. void
  2920. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2921. {
  2922. int mac_for_pdev = pdev->lmac_id;
  2923. struct dp_soc *soc = pdev->soc;
  2924. struct rx_desc_pool *rx_desc_pool;
  2925. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2926. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2927. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2928. }
  2929. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2930. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2931. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2932. uint8_t *rx_tlv_hdr)
  2933. {
  2934. uint32_t l2_hdr_offset = 0;
  2935. uint16_t msdu_len = 0;
  2936. uint32_t skip_len;
  2937. l2_hdr_offset =
  2938. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2939. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2940. skip_len = l2_hdr_offset;
  2941. } else {
  2942. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2943. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2944. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2945. }
  2946. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2947. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2948. qdf_nbuf_pull_head(nbuf, skip_len);
  2949. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2950. qdf_nbuf_set_exc_frame(nbuf, 1);
  2951. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2952. nbuf, NULL);
  2953. return true;
  2954. }
  2955. return false;
  2956. }
  2957. #endif