cvp_hfi.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #define FIRMWARE_SIZE 0X00A00000
  33. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  34. #define QDSS_IOVA_START 0x80001000
  35. #define MIN_PAYLOAD_SIZE 3
  36. const struct msm_cvp_hfi_defs cvp_hfi_defs[] = {
  37. {
  38. .size = HFI_DFS_CONFIG_CMD_SIZE,
  39. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  40. .buf_offset = 0,
  41. .buf_num = 0,
  42. .resp = HAL_SESSION_DFS_CONFIG_CMD_DONE,
  43. },
  44. {
  45. .size = HFI_DFS_FRAME_CMD_SIZE,
  46. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  47. .buf_offset = HFI_DFS_FRAME_BUFFERS_OFFSET,
  48. .buf_num = HFI_DFS_BUF_NUM,
  49. .resp = HAL_NO_RESP,
  50. },
  51. {
  52. .size = 0xFFFFFFFF,
  53. .type = HFI_CMD_SESSION_CVP_SGM_OF_CONFIG,
  54. .buf_offset = 0,
  55. .buf_num = 0,
  56. .resp = HAL_SESSION_SGM_OF_CONFIG_CMD_DONE,
  57. },
  58. {
  59. .size = 0xFFFFFFFF,
  60. .type = HFI_CMD_SESSION_CVP_SGM_OF_FRAME,
  61. .buf_offset = 0,
  62. .buf_num = 0,
  63. .resp = HAL_NO_RESP,
  64. },
  65. {
  66. .size = 0xFFFFFFFF,
  67. .type = HFI_CMD_SESSION_CVP_WARP_NCC_CONFIG,
  68. .buf_offset = 0,
  69. .buf_num = 0,
  70. .resp = HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE,
  71. },
  72. {
  73. .size = 0xFFFFFFFF,
  74. .type = HFI_CMD_SESSION_CVP_WARP_NCC_FRAME,
  75. .buf_offset = 0,
  76. .buf_num = 0,
  77. .resp = HAL_NO_RESP,
  78. },
  79. {
  80. .size = 0xFFFFFFFF,
  81. .type = HFI_CMD_SESSION_CVP_WARP_CONFIG,
  82. .buf_offset = 0,
  83. .buf_num = 0,
  84. .resp = HAL_SESSION_WARP_CONFIG_CMD_DONE,
  85. },
  86. {
  87. .size = 0xFFFFFFFF,
  88. .type = HFI_CMD_SESSION_CVP_WARP_DS_PARAMS,
  89. .buf_offset = 0,
  90. .buf_num = 0,
  91. .resp = HAL_SESSION_WARP_DS_PARAMS_CMD_DONE,
  92. },
  93. {
  94. .size = 0xFFFFFFFF,
  95. .type = HFI_CMD_SESSION_CVP_WARP_FRAME,
  96. .buf_offset = 0,
  97. .buf_num = 0,
  98. .resp = HAL_NO_RESP,
  99. },
  100. {
  101. .size = HFI_DMM_CONFIG_CMD_SIZE,
  102. .type = HFI_CMD_SESSION_CVP_DMM_CONFIG,
  103. .buf_offset = 0,
  104. .buf_num = 0,
  105. .resp = HAL_SESSION_DMM_CONFIG_CMD_DONE,
  106. },
  107. {
  108. .size = 0xFFFFFFFF,
  109. .type = HFI_CMD_SESSION_CVP_DMM_PARAMS,
  110. .buf_offset = 0,
  111. .buf_num = 0,
  112. .resp = HAL_SESSION_DMM_PARAMS_CMD_DONE,
  113. },
  114. {
  115. .size = HFI_DMM_FRAME_CMD_SIZE,
  116. .type = HFI_CMD_SESSION_CVP_DMM_FRAME,
  117. .buf_offset = HFI_DMM_FRAME_BUFFERS_OFFSET,
  118. .buf_num = HFI_DMM_BUF_NUM,
  119. .resp = HAL_NO_RESP,
  120. },
  121. {
  122. .size = HFI_PERSIST_CMD_SIZE,
  123. .type = HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  124. .buf_offset = HFI_PERSIST_BUFFERS_OFFSET,
  125. .buf_num = HFI_PERSIST_BUF_NUM,
  126. .resp = HAL_SESSION_PERSIST_SET_DONE,
  127. },
  128. {
  129. .size = 0xffffffff,
  130. .type = HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  131. .buf_offset = 0,
  132. .buf_num = 0,
  133. .resp = HAL_SESSION_PERSIST_REL_DONE,
  134. },
  135. {
  136. .size = HFI_DS_CMD_SIZE,
  137. .type = HFI_CMD_SESSION_CVP_DS,
  138. .buf_offset = HFI_DS_BUFFERS_OFFSET,
  139. .buf_num = HFI_DS_BUF_NUM,
  140. .resp = HAL_NO_RESP,
  141. },
  142. {
  143. .size = HFI_OF_CONFIG_CMD_SIZE,
  144. .type = HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  145. .buf_offset = 0,
  146. .buf_num = 0,
  147. .resp = HAL_SESSION_TME_CONFIG_CMD_DONE,
  148. },
  149. {
  150. .size = HFI_OF_FRAME_CMD_SIZE,
  151. .type = HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  152. .buf_offset = HFI_OF_BUFFERS_OFFSET,
  153. .buf_num = HFI_OF_BUF_NUM,
  154. .resp = HAL_NO_RESP,
  155. },
  156. {
  157. .size = HFI_ODT_CONFIG_CMD_SIZE,
  158. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  159. .buf_offset = 0,
  160. .buf_num = 0,
  161. .resp = HAL_SESSION_ODT_CONFIG_CMD_DONE,
  162. },
  163. {
  164. .size = HFI_ODT_FRAME_CMD_SIZE,
  165. .type = HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  166. .buf_offset = HFI_ODT_BUFFERS_OFFSET,
  167. .buf_num = HFI_ODT_BUF_NUM,
  168. .resp = HAL_NO_RESP,
  169. },
  170. {
  171. .size = HFI_OD_CONFIG_CMD_SIZE,
  172. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  173. .buf_offset = 0,
  174. .buf_num = 0,
  175. .resp = HAL_SESSION_OD_CONFIG_CMD_DONE,
  176. },
  177. {
  178. .size = HFI_OD_FRAME_CMD_SIZE,
  179. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  180. .buf_offset = HFI_OD_BUFFERS_OFFSET,
  181. .buf_num = HFI_OD_BUF_NUM,
  182. .resp = HAL_NO_RESP,
  183. },
  184. {
  185. .size = HFI_NCC_CONFIG_CMD_SIZE,
  186. .type = HFI_CMD_SESSION_CVP_NCC_CONFIG,
  187. .buf_offset = 0,
  188. .buf_num = 0,
  189. .resp = HAL_SESSION_NCC_CONFIG_CMD_DONE,
  190. },
  191. {
  192. .size = HFI_NCC_FRAME_CMD_SIZE,
  193. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  194. .buf_offset = HFI_NCC_BUFFERS_OFFSET,
  195. .buf_num = HFI_NCC_BUF_NUM,
  196. .resp = HAL_NO_RESP,
  197. },
  198. {
  199. .size = HFI_ICA_CONFIG_CMD_SIZE,
  200. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  201. .buf_offset = 0,
  202. .buf_num = 0,
  203. .resp = HAL_SESSION_ICA_CONFIG_CMD_DONE,
  204. },
  205. {
  206. .size = HFI_ICA_FRAME_CMD_SIZE,
  207. .type = HFI_CMD_SESSION_CVP_ICA_FRAME,
  208. .buf_offset = HFI_ICA_BUFFERS_OFFSET,
  209. .buf_num = HFI_ICA_BUF_NUM,
  210. .resp = HAL_NO_RESP,
  211. },
  212. {
  213. .size = HFI_HCD_CONFIG_CMD_SIZE,
  214. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  215. .buf_offset = 0,
  216. .buf_num = 0,
  217. .resp = HAL_SESSION_HCD_CONFIG_CMD_DONE,
  218. },
  219. {
  220. .size = HFI_HCD_FRAME_CMD_SIZE,
  221. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  222. .buf_offset = HFI_HCD_BUFFERS_OFFSET,
  223. .buf_num = HFI_HCD_BUF_NUM,
  224. .resp = HAL_NO_RESP,
  225. },
  226. {
  227. .size = HFI_DCM_CONFIG_CMD_SIZE,
  228. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  229. .buf_offset = 0,
  230. .buf_num = 0,
  231. .resp = HAL_SESSION_DC_CONFIG_CMD_DONE,
  232. },
  233. {
  234. .size = HFI_DCM_FRAME_CMD_SIZE,
  235. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  236. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  237. .buf_num = HFI_DCM_BUF_NUM,
  238. .resp = HAL_NO_RESP,
  239. },
  240. {
  241. .size = HFI_DCM_CONFIG_CMD_SIZE,
  242. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  243. .buf_offset = 0,
  244. .buf_num = 0,
  245. .resp = HAL_SESSION_DCM_CONFIG_CMD_DONE,
  246. },
  247. {
  248. .size = HFI_DCM_FRAME_CMD_SIZE,
  249. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  250. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  251. .buf_num = HFI_DCM_BUF_NUM,
  252. .resp = HAL_NO_RESP,
  253. },
  254. {
  255. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  256. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  257. .buf_offset = 0,
  258. .buf_num = 0,
  259. .resp = HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE,
  260. },
  261. {
  262. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  263. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  264. .buf_offset = HFI_PYS_HCD_BUFFERS_OFFSET,
  265. .buf_num = HFI_PYS_HCD_BUF_NUM,
  266. .resp = HAL_NO_RESP,
  267. },
  268. {
  269. .size = 0xFFFFFFFF,
  270. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  271. .buf_offset = 0,
  272. .buf_num = 0,
  273. .resp = HAL_SESSION_MODEL_BUF_CMD_DONE,
  274. },
  275. {
  276. .size = 0xFFFFFFFF,
  277. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  278. .buf_offset = 0,
  279. .buf_num = 0,
  280. .resp = HAL_SESSION_FD_CONFIG_CMD_DONE,
  281. },
  282. {
  283. .size = 0xFFFFFFFF,
  284. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  285. .buf_offset = 0,
  286. .buf_num = 0,
  287. .resp = HAL_NO_RESP,
  288. },
  289. };
  290. struct cvp_tzbsp_memprot {
  291. u32 cp_start;
  292. u32 cp_size;
  293. u32 cp_nonpixel_start;
  294. u32 cp_nonpixel_size;
  295. };
  296. #define TZBSP_PIL_SET_STATE 0xA
  297. #define TZBSP_CVP_PAS_ID 26
  298. /* Poll interval in uS */
  299. #define POLL_INTERVAL_US 50
  300. enum tzbsp_subsys_state {
  301. TZ_SUBSYS_STATE_SUSPEND = 0,
  302. TZ_SUBSYS_STATE_RESUME = 1,
  303. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  304. };
  305. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  306. .data = NULL,
  307. .data_count = 0,
  308. };
  309. const int cvp_max_packets = 32;
  310. static void iris_hfi_pm_handler(struct work_struct *work);
  311. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  312. static inline int __resume(struct iris_hfi_device *device);
  313. static inline int __suspend(struct iris_hfi_device *device);
  314. static int __disable_regulators(struct iris_hfi_device *device);
  315. static int __enable_regulators(struct iris_hfi_device *device);
  316. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  317. static int __initialize_packetization(struct iris_hfi_device *device);
  318. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  319. u32 session_id);
  320. static bool __is_session_valid(struct iris_hfi_device *device,
  321. struct cvp_hal_session *session, const char *func);
  322. static int __iface_cmdq_write(struct iris_hfi_device *device,
  323. void *pkt);
  324. static int __load_fw(struct iris_hfi_device *device);
  325. static void __unload_fw(struct iris_hfi_device *device);
  326. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  327. static int __enable_subcaches(struct iris_hfi_device *device);
  328. static int __set_subcaches(struct iris_hfi_device *device);
  329. static int __release_subcaches(struct iris_hfi_device *device);
  330. static int __disable_subcaches(struct iris_hfi_device *device);
  331. static int __power_collapse(struct iris_hfi_device *device, bool force);
  332. static int iris_hfi_noc_error_info(void *dev);
  333. static void interrupt_init_iris2(struct iris_hfi_device *device);
  334. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  335. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  336. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  337. static void power_off_iris2(struct iris_hfi_device *device);
  338. static int __set_ubwc_config(struct iris_hfi_device *device);
  339. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  340. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  341. static struct iris_hfi_vpu_ops iris2_ops = {
  342. .interrupt_init = interrupt_init_iris2,
  343. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  344. .clock_config_on_enable = clock_config_on_enable_vpu5,
  345. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  346. .power_off = power_off_iris2,
  347. .noc_error_info = __noc_error_info_iris2,
  348. };
  349. /**
  350. * Utility function to enforce some of our assumptions. Spam calls to this
  351. * in hotspots in code to double check some of the assumptions that we hold.
  352. */
  353. static inline void __strict_check(struct iris_hfi_device *device)
  354. {
  355. msm_cvp_res_handle_fatal_hw_error(device->res,
  356. !mutex_is_locked(&device->lock));
  357. }
  358. static inline void __set_state(struct iris_hfi_device *device,
  359. enum iris_hfi_state state)
  360. {
  361. device->state = state;
  362. }
  363. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  364. {
  365. return device->state != IRIS_STATE_DEINIT;
  366. }
  367. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  368. {
  369. return device->res->sys_cache_present;
  370. }
  371. #define ROW_SIZE 32
  372. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  373. {
  374. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  375. for (i = 0; i < pkt_num; i++)
  376. if (cvp_hfi_defs[i].type == hdr->packet_type)
  377. return i;
  378. return -EINVAL;
  379. }
  380. int get_hfi_version(void)
  381. {
  382. struct msm_cvp_core *core;
  383. struct iris_hfi_device *hfi;
  384. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  385. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  386. return hfi->version;
  387. }
  388. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  389. {
  390. struct msm_cvp_core *core;
  391. struct iris_hfi_device *device;
  392. u32 minor_ver;
  393. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  394. if (core)
  395. device = core->device->hfi_device_data;
  396. else
  397. return 0;
  398. if (!device) {
  399. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  400. return 0;
  401. }
  402. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  403. HFI_VERSION_MINOR_SHIFT;
  404. if (minor_ver < 2)
  405. return sizeof(struct cvp_hfi_msg_session_hdr);
  406. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  407. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  408. else
  409. return sizeof(struct cvp_hfi_msg_session_hdr);
  410. }
  411. unsigned int get_msg_session_id(void *msg)
  412. {
  413. struct cvp_hfi_msg_session_hdr *hdr =
  414. (struct cvp_hfi_msg_session_hdr *)msg;
  415. return hdr->session_id;
  416. }
  417. unsigned int get_msg_errorcode(void *msg)
  418. {
  419. struct cvp_hfi_msg_session_hdr *hdr =
  420. (struct cvp_hfi_msg_session_hdr *)msg;
  421. return hdr->error_type;
  422. }
  423. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  424. unsigned int *error_type, unsigned int *config_id)
  425. {
  426. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  427. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  428. *session_id = cfg->session_id;
  429. *error_type = cfg->error_type;
  430. *config_id = cfg->op_conf_id;
  431. return 0;
  432. }
  433. int get_signal_from_pkt_type(unsigned int type)
  434. {
  435. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  436. for (i = 0; i < pkt_num; i++)
  437. if (cvp_hfi_defs[i].type == type)
  438. return cvp_hfi_defs[i].resp;
  439. return -EINVAL;
  440. }
  441. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  442. {
  443. u32 c = 0, packet_size = *(u32 *)packet;
  444. /*
  445. * row must contain enough for 0xdeadbaad * 8 to be converted into
  446. * "de ad ba ab " * 8 + '\0'
  447. */
  448. char row[3 * ROW_SIZE];
  449. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  450. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  451. packet_size % ROW_SIZE : ROW_SIZE;
  452. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  453. ROW_SIZE, 4, row, sizeof(row), false);
  454. dprintk(log_level, "%s\n", row);
  455. }
  456. }
  457. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  458. {
  459. int rc;
  460. struct cvp_hal_session *temp;
  461. if (msm_cvp_dsp_disable)
  462. return 0;
  463. list_for_each_entry(temp, &device->sess_head, list) {
  464. /* if forceful suspend, don't check session pause info */
  465. if (force)
  466. continue;
  467. /* don't suspend if cvp session is not paused */
  468. if (!(temp->flags & SESSION_PAUSE)) {
  469. dprintk(CVP_DSP,
  470. "%s: cvp session %x not paused\n",
  471. __func__, hash32_ptr(temp));
  472. return -EBUSY;
  473. }
  474. }
  475. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  476. rc = cvp_dsp_suspend(flags);
  477. if (rc) {
  478. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  479. __func__, rc);
  480. return -EINVAL;
  481. }
  482. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  483. return 0;
  484. }
  485. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  486. {
  487. int rc;
  488. if (msm_cvp_dsp_disable)
  489. return 0;
  490. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  491. rc = cvp_dsp_resume(flags);
  492. if (rc) {
  493. dprintk(CVP_ERR,
  494. "%s: dsp resume failed with error %d\n",
  495. __func__, rc);
  496. return rc;
  497. }
  498. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  499. return rc;
  500. }
  501. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  502. {
  503. int rc;
  504. if (msm_cvp_dsp_disable)
  505. return 0;
  506. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  507. rc = cvp_dsp_shutdown(flags);
  508. if (rc) {
  509. dprintk(CVP_ERR,
  510. "%s: dsp shutdown failed with error %d\n",
  511. __func__, rc);
  512. WARN_ON(1);
  513. }
  514. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  515. return rc;
  516. }
  517. static int __acquire_regulator(struct regulator_info *rinfo,
  518. struct iris_hfi_device *device)
  519. {
  520. int rc = 0;
  521. if (rinfo->has_hw_power_collapse) {
  522. rc = regulator_set_mode(rinfo->regulator,
  523. REGULATOR_MODE_NORMAL);
  524. if (rc) {
  525. /*
  526. * This is somewhat fatal, but nothing we can do
  527. * about it. We can't disable the regulator w/o
  528. * getting it back under s/w control
  529. */
  530. dprintk(CVP_WARN,
  531. "Failed to acquire regulator control: %s\n",
  532. rinfo->name);
  533. } else {
  534. dprintk(CVP_PWR,
  535. "Acquire regulator control from HW: %s\n",
  536. rinfo->name);
  537. }
  538. }
  539. if (!regulator_is_enabled(rinfo->regulator)) {
  540. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  541. rinfo->name);
  542. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  543. }
  544. return rc;
  545. }
  546. static int __hand_off_regulator(struct regulator_info *rinfo)
  547. {
  548. int rc = 0;
  549. if (rinfo->has_hw_power_collapse) {
  550. rc = regulator_set_mode(rinfo->regulator,
  551. REGULATOR_MODE_FAST);
  552. if (rc) {
  553. dprintk(CVP_WARN,
  554. "Failed to hand off regulator control: %s\n",
  555. rinfo->name);
  556. } else {
  557. dprintk(CVP_PWR,
  558. "Hand off regulator control to HW: %s\n",
  559. rinfo->name);
  560. }
  561. }
  562. return rc;
  563. }
  564. static int __hand_off_regulators(struct iris_hfi_device *device)
  565. {
  566. struct regulator_info *rinfo;
  567. int rc = 0, c = 0;
  568. iris_hfi_for_each_regulator(device, rinfo) {
  569. rc = __hand_off_regulator(rinfo);
  570. /*
  571. * If one regulator hand off failed, driver should take
  572. * the control for other regulators back.
  573. */
  574. if (rc)
  575. goto err_reg_handoff_failed;
  576. c++;
  577. }
  578. return rc;
  579. err_reg_handoff_failed:
  580. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  581. __acquire_regulator(rinfo, device);
  582. return rc;
  583. }
  584. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  585. bool *rx_req_is_set)
  586. {
  587. struct cvp_hfi_queue_header *queue;
  588. u32 packet_size_in_words, new_write_idx;
  589. u32 empty_space, read_idx, write_idx;
  590. u32 *write_ptr;
  591. if (!qinfo || !packet) {
  592. dprintk(CVP_ERR, "Invalid Params\n");
  593. return -EINVAL;
  594. } else if (!qinfo->q_array.align_virtual_addr) {
  595. dprintk(CVP_WARN, "Queues have already been freed\n");
  596. return -EINVAL;
  597. }
  598. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  599. if (!queue) {
  600. dprintk(CVP_ERR, "queue not present\n");
  601. return -ENOENT;
  602. }
  603. if (msm_cvp_debug & CVP_PKT) {
  604. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  605. __dump_packet(packet, CVP_PKT);
  606. }
  607. packet_size_in_words = (*(u32 *)packet) >> 2;
  608. if (!packet_size_in_words || packet_size_in_words >
  609. qinfo->q_array.mem_size>>2) {
  610. dprintk(CVP_ERR, "Invalid packet size\n");
  611. return -ENODATA;
  612. }
  613. spin_lock(&qinfo->hfi_lock);
  614. read_idx = queue->qhdr_read_idx;
  615. write_idx = queue->qhdr_write_idx;
  616. empty_space = (write_idx >= read_idx) ?
  617. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  618. (read_idx - write_idx);
  619. if (empty_space <= packet_size_in_words) {
  620. queue->qhdr_tx_req = 1;
  621. spin_unlock(&qinfo->hfi_lock);
  622. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  623. empty_space, packet_size_in_words);
  624. return -ENOTEMPTY;
  625. }
  626. queue->qhdr_tx_req = 0;
  627. new_write_idx = write_idx + packet_size_in_words;
  628. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  629. (write_idx << 2));
  630. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  631. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  632. qinfo->q_array.mem_size)) {
  633. spin_unlock(&qinfo->hfi_lock);
  634. dprintk(CVP_ERR, "Invalid write index\n");
  635. return -ENODATA;
  636. }
  637. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  638. memcpy(write_ptr, packet, packet_size_in_words << 2);
  639. } else {
  640. new_write_idx -= qinfo->q_array.mem_size >> 2;
  641. memcpy(write_ptr, packet, (packet_size_in_words -
  642. new_write_idx) << 2);
  643. memcpy((void *)qinfo->q_array.align_virtual_addr,
  644. packet + ((packet_size_in_words - new_write_idx) << 2),
  645. new_write_idx << 2);
  646. }
  647. /*
  648. * Memory barrier to make sure packet is written before updating the
  649. * write index
  650. */
  651. mb();
  652. queue->qhdr_write_idx = new_write_idx;
  653. if (rx_req_is_set)
  654. *rx_req_is_set = queue->qhdr_rx_req == 1;
  655. /*
  656. * Memory barrier to make sure write index is updated before an
  657. * interrupt is raised.
  658. */
  659. mb();
  660. spin_unlock(&qinfo->hfi_lock);
  661. return 0;
  662. }
  663. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  664. u32 *pb_tx_req_is_set)
  665. {
  666. struct cvp_hfi_queue_header *queue;
  667. u32 packet_size_in_words, new_read_idx;
  668. u32 *read_ptr;
  669. u32 receive_request = 0;
  670. u32 read_idx, write_idx;
  671. int rc = 0;
  672. if (!qinfo || !packet || !pb_tx_req_is_set) {
  673. dprintk(CVP_ERR, "Invalid Params\n");
  674. return -EINVAL;
  675. } else if (!qinfo->q_array.align_virtual_addr) {
  676. dprintk(CVP_WARN, "Queues have already been freed\n");
  677. return -EINVAL;
  678. }
  679. /*
  680. * Memory barrier to make sure data is valid before
  681. *reading it
  682. */
  683. mb();
  684. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  685. if (!queue) {
  686. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  687. return -ENOMEM;
  688. }
  689. /*
  690. * Do not set receive request for debug queue, if set,
  691. * Iris generates interrupt for debug messages even
  692. * when there is no response message available.
  693. * In general debug queue will not become full as it
  694. * is being emptied out for every interrupt from Iris.
  695. * Iris will anyway generates interrupt if it is full.
  696. */
  697. spin_lock(&qinfo->hfi_lock);
  698. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  699. receive_request = 1;
  700. read_idx = queue->qhdr_read_idx;
  701. write_idx = queue->qhdr_write_idx;
  702. if (read_idx == write_idx) {
  703. queue->qhdr_rx_req = receive_request;
  704. /*
  705. * mb() to ensure qhdr is updated in main memory
  706. * so that iris reads the updated header values
  707. */
  708. mb();
  709. *pb_tx_req_is_set = 0;
  710. if (write_idx != queue->qhdr_write_idx) {
  711. queue->qhdr_rx_req = 0;
  712. } else {
  713. spin_unlock(&qinfo->hfi_lock);
  714. dprintk(CVP_HFI,
  715. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  716. receive_request ? "message" : "debug",
  717. queue->qhdr_rx_req, queue->qhdr_tx_req,
  718. queue->qhdr_read_idx);
  719. return -ENODATA;
  720. }
  721. }
  722. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  723. (read_idx << 2));
  724. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  725. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  726. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  727. spin_unlock(&qinfo->hfi_lock);
  728. dprintk(CVP_ERR, "Invalid read index\n");
  729. return -ENODATA;
  730. }
  731. packet_size_in_words = (*read_ptr) >> 2;
  732. if (!packet_size_in_words) {
  733. spin_unlock(&qinfo->hfi_lock);
  734. dprintk(CVP_ERR, "Zero packet size\n");
  735. return -ENODATA;
  736. }
  737. new_read_idx = read_idx + packet_size_in_words;
  738. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  739. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  740. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  741. memcpy(packet, read_ptr,
  742. packet_size_in_words << 2);
  743. } else {
  744. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  745. memcpy(packet, read_ptr,
  746. (packet_size_in_words - new_read_idx) << 2);
  747. memcpy(packet + ((packet_size_in_words -
  748. new_read_idx) << 2),
  749. (u8 *)qinfo->q_array.align_virtual_addr,
  750. new_read_idx << 2);
  751. }
  752. } else {
  753. dprintk(CVP_WARN,
  754. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  755. read_idx, packet_size_in_words << 2);
  756. dprintk(CVP_WARN, "Dropping this packet\n");
  757. new_read_idx = write_idx;
  758. rc = -ENODATA;
  759. }
  760. if (new_read_idx != queue->qhdr_write_idx)
  761. queue->qhdr_rx_req = 0;
  762. else
  763. queue->qhdr_rx_req = receive_request;
  764. queue->qhdr_read_idx = new_read_idx;
  765. /*
  766. * mb() to ensure qhdr is updated in main memory
  767. * so that iris reads the updated header values
  768. */
  769. mb();
  770. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  771. spin_unlock(&qinfo->hfi_lock);
  772. if ((msm_cvp_debug & CVP_PKT) &&
  773. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  774. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  775. __dump_packet(packet, CVP_PKT);
  776. }
  777. return rc;
  778. }
  779. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  780. u32 size, u32 align, u32 flags)
  781. {
  782. struct msm_cvp_smem *alloc = &mem->mem_data;
  783. int rc = 0;
  784. if (!dev || !mem || !size) {
  785. dprintk(CVP_ERR, "Invalid Params\n");
  786. return -EINVAL;
  787. }
  788. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  789. alloc->flags = flags;
  790. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  791. if (rc) {
  792. dprintk(CVP_ERR, "Alloc failed\n");
  793. rc = -ENOMEM;
  794. goto fail_smem_alloc;
  795. }
  796. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  797. alloc->kvaddr, size);
  798. mem->mem_size = alloc->size;
  799. mem->align_virtual_addr = alloc->kvaddr;
  800. mem->align_device_addr = alloc->device_addr;
  801. return rc;
  802. fail_smem_alloc:
  803. return rc;
  804. }
  805. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  806. {
  807. if (!dev || !mem) {
  808. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  809. return;
  810. }
  811. msm_cvp_smem_free(mem);
  812. }
  813. static void __write_register(struct iris_hfi_device *device,
  814. u32 reg, u32 value)
  815. {
  816. u32 hwiosymaddr = reg;
  817. u8 *base_addr;
  818. if (!device) {
  819. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  820. return;
  821. }
  822. __strict_check(device);
  823. if (!device->power_enabled) {
  824. dprintk(CVP_WARN,
  825. "HFI Write register failed : Power is OFF\n");
  826. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  827. return;
  828. }
  829. base_addr = device->cvp_hal_data->register_base;
  830. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  831. base_addr, hwiosymaddr, value);
  832. base_addr += hwiosymaddr;
  833. writel_relaxed(value, base_addr);
  834. /*
  835. * Memory barrier to make sure value is written into the register.
  836. */
  837. wmb();
  838. }
  839. static int __read_register(struct iris_hfi_device *device, u32 reg)
  840. {
  841. int rc = 0;
  842. u8 *base_addr;
  843. if (!device) {
  844. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  845. return -EINVAL;
  846. }
  847. __strict_check(device);
  848. if (!device->power_enabled) {
  849. dprintk(CVP_WARN,
  850. "HFI Read register failed : Power is OFF\n");
  851. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  852. return -EINVAL;
  853. }
  854. base_addr = device->cvp_hal_data->register_base;
  855. rc = readl_relaxed(base_addr + reg);
  856. /*
  857. * Memory barrier to make sure value is read correctly from the
  858. * register.
  859. */
  860. rmb();
  861. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  862. base_addr, reg, rc);
  863. return rc;
  864. }
  865. static void __set_registers(struct iris_hfi_device *device)
  866. {
  867. struct reg_set *reg_set;
  868. int i;
  869. if (!device->res) {
  870. dprintk(CVP_ERR,
  871. "device resources null, cannot set registers\n");
  872. return;
  873. }
  874. reg_set = &device->res->reg_set;
  875. for (i = 0; i < reg_set->count; i++) {
  876. __write_register(device, reg_set->reg_tbl[i].reg,
  877. reg_set->reg_tbl[i].value);
  878. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  879. reg_set->reg_tbl[i].reg,
  880. reg_set->reg_tbl[i].value);
  881. }
  882. }
  883. /*
  884. * The existence of this function is a hack for 8996 (or certain Iris versions)
  885. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  886. * (after calling __hand_off_regulators()), the values of the threshold
  887. * registers (typically programmed by TZ) are incorrectly reset. As a result
  888. * reprogram these registers at certain agreed upon points.
  889. */
  890. static void __set_threshold_registers(struct iris_hfi_device *device)
  891. {
  892. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  893. version &= ~GENMASK(15, 0);
  894. if (version != (0x3 << 28 | 0x43 << 16))
  895. return;
  896. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  897. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  898. }
  899. static int __unvote_buses(struct iris_hfi_device *device)
  900. {
  901. int rc = 0;
  902. struct bus_info *bus = NULL;
  903. kfree(device->bus_vote.data);
  904. device->bus_vote.data = NULL;
  905. device->bus_vote.data_count = 0;
  906. iris_hfi_for_each_bus(device, bus) {
  907. rc = icc_set_bw(bus->client, 0, 0);
  908. if (rc) {
  909. dprintk(CVP_ERR,
  910. "%s: Failed unvoting bus\n", __func__);
  911. goto err_unknown_device;
  912. }
  913. }
  914. err_unknown_device:
  915. return rc;
  916. }
  917. static int __vote_buses(struct iris_hfi_device *device,
  918. struct cvp_bus_vote_data *data, int num_data)
  919. {
  920. int rc = 0;
  921. struct bus_info *bus = NULL;
  922. struct cvp_bus_vote_data *new_data = NULL;
  923. if (!num_data) {
  924. dprintk(CVP_PWR, "No vote data available\n");
  925. goto no_data_count;
  926. } else if (!data) {
  927. dprintk(CVP_ERR, "Invalid voting data\n");
  928. return -EINVAL;
  929. }
  930. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  931. if (!new_data) {
  932. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  933. rc = -ENOMEM;
  934. goto err_no_mem;
  935. }
  936. no_data_count:
  937. kfree(device->bus_vote.data);
  938. device->bus_vote.data = new_data;
  939. device->bus_vote.data_count = num_data;
  940. iris_hfi_for_each_bus(device, bus) {
  941. if (bus) {
  942. rc = icc_set_bw(bus->client, bus->range[1], 0);
  943. if (rc)
  944. dprintk(CVP_ERR,
  945. "Failed voting bus %s to ab %u\n",
  946. bus->name, bus->range[1]*1000);
  947. }
  948. }
  949. err_no_mem:
  950. return rc;
  951. }
  952. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  953. {
  954. int rc = 0;
  955. struct iris_hfi_device *device = dev;
  956. if (!device)
  957. return -EINVAL;
  958. mutex_lock(&device->lock);
  959. rc = __vote_buses(device, d, n);
  960. mutex_unlock(&device->lock);
  961. return rc;
  962. }
  963. static int __core_set_resource(struct iris_hfi_device *device,
  964. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  965. {
  966. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  967. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  968. int rc = 0;
  969. if (!device || !resource_hdr || !resource_value) {
  970. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  971. return -EINVAL;
  972. }
  973. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  974. rc = call_hfi_pkt_op(device, sys_set_resource,
  975. pkt, resource_hdr, resource_value);
  976. if (rc) {
  977. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  978. goto err_create_pkt;
  979. }
  980. rc = __iface_cmdq_write(device, pkt);
  981. if (rc)
  982. rc = -ENOTEMPTY;
  983. err_create_pkt:
  984. return rc;
  985. }
  986. static int __core_release_resource(struct iris_hfi_device *device,
  987. struct cvp_resource_hdr *resource_hdr)
  988. {
  989. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  990. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  991. int rc = 0;
  992. if (!device || !resource_hdr) {
  993. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  994. return -EINVAL;
  995. }
  996. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  997. rc = call_hfi_pkt_op(device, sys_release_resource,
  998. pkt, resource_hdr);
  999. if (rc) {
  1000. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  1001. goto err_create_pkt;
  1002. }
  1003. rc = __iface_cmdq_write(device, pkt);
  1004. if (rc)
  1005. rc = -ENOTEMPTY;
  1006. err_create_pkt:
  1007. return rc;
  1008. }
  1009. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  1010. {
  1011. int rc = 0;
  1012. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  1013. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  1014. if (rc) {
  1015. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  1016. return rc;
  1017. }
  1018. return 0;
  1019. }
  1020. static inline int __boot_firmware(struct iris_hfi_device *device)
  1021. {
  1022. int rc = 0, loop = 10;
  1023. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  1024. u32 reg_gdsc;
  1025. /*
  1026. * Hand off control of regulators to h/w _after_ enabling clocks.
  1027. * Note that the GDSC will turn off when switching from normal
  1028. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  1029. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  1030. */
  1031. if (__enable_hw_power_collapse(device))
  1032. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  1033. while (loop) {
  1034. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  1035. if (reg_gdsc & 0x80000000) {
  1036. usleep_range(100, 200);
  1037. loop--;
  1038. } else {
  1039. break;
  1040. }
  1041. }
  1042. if (!loop)
  1043. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  1044. ctrl_init_val = BIT(0);
  1045. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  1046. while (!ctrl_status && count < max_tries) {
  1047. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  1048. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  1049. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  1050. rc = -ENODATA;
  1051. break;
  1052. }
  1053. /* Reduce to 1/100th and x100 of max_tries */
  1054. usleep_range(500, 1000);
  1055. count++;
  1056. }
  1057. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  1058. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  1059. ctrl_status);
  1060. rc = -ENODEV;
  1061. }
  1062. /* Enable interrupt before sending commands to tensilica */
  1063. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  1064. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  1065. return rc;
  1066. }
  1067. static int iris_hfi_resume(void *dev)
  1068. {
  1069. int rc = 0;
  1070. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1071. if (!device) {
  1072. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1073. return -EINVAL;
  1074. }
  1075. dprintk(CVP_CORE, "Resuming Iris\n");
  1076. mutex_lock(&device->lock);
  1077. rc = __resume(device);
  1078. mutex_unlock(&device->lock);
  1079. return rc;
  1080. }
  1081. static int iris_hfi_suspend(void *dev)
  1082. {
  1083. int rc = 0;
  1084. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1085. if (!device) {
  1086. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1087. return -EINVAL;
  1088. } else if (!device->res->sw_power_collapsible) {
  1089. return -ENOTSUPP;
  1090. }
  1091. dprintk(CVP_CORE, "Suspending Iris\n");
  1092. mutex_lock(&device->lock);
  1093. rc = __power_collapse(device, true);
  1094. if (rc) {
  1095. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  1096. rc = -EBUSY;
  1097. }
  1098. mutex_unlock(&device->lock);
  1099. /* Cancel pending delayed works if any */
  1100. if (!rc)
  1101. cancel_delayed_work(&iris_hfi_pm_work);
  1102. return rc;
  1103. }
  1104. static void cvp_dump_csr(struct iris_hfi_device *dev)
  1105. {
  1106. u32 reg;
  1107. if (!dev)
  1108. return;
  1109. if (!dev->power_enabled || dev->reg_dumped)
  1110. return;
  1111. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  1112. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  1113. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  1114. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  1115. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  1116. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  1117. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  1118. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  1119. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  1120. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  1121. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  1122. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  1123. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  1124. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  1125. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  1126. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  1127. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  1128. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  1129. dev->reg_dumped = true;
  1130. }
  1131. static int iris_hfi_flush_debug_queue(void *dev)
  1132. {
  1133. int rc = 0;
  1134. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1135. if (!device) {
  1136. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1137. return -EINVAL;
  1138. }
  1139. cvp_dump_csr(device);
  1140. mutex_lock(&device->lock);
  1141. if (!device->power_enabled) {
  1142. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  1143. rc = -EINVAL;
  1144. goto exit;
  1145. }
  1146. __flush_debug_queue(device, NULL);
  1147. exit:
  1148. mutex_unlock(&device->lock);
  1149. return rc;
  1150. }
  1151. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  1152. {
  1153. int rc = 0;
  1154. struct iris_hfi_device *device = dev;
  1155. if (!device) {
  1156. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  1157. return -EINVAL;
  1158. }
  1159. mutex_lock(&device->lock);
  1160. if (__resume(device)) {
  1161. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  1162. rc = -ENODEV;
  1163. goto exit;
  1164. }
  1165. rc = msm_cvp_set_clocks_impl(device, freq);
  1166. exit:
  1167. mutex_unlock(&device->lock);
  1168. return rc;
  1169. }
  1170. /* Writes into cmdq without raising an interrupt */
  1171. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  1172. void *pkt, bool *requires_interrupt)
  1173. {
  1174. struct cvp_iface_q_info *q_info;
  1175. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  1176. int result = -E2BIG;
  1177. if (!device || !pkt) {
  1178. dprintk(CVP_ERR, "Invalid Params\n");
  1179. return -EINVAL;
  1180. }
  1181. __strict_check(device);
  1182. if (!__core_in_valid_state(device)) {
  1183. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1184. result = -EINVAL;
  1185. goto err_q_null;
  1186. }
  1187. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1188. device->last_packet_type = cmd_packet->packet_type;
  1189. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1190. if (!q_info) {
  1191. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1192. goto err_q_null;
  1193. }
  1194. if (!q_info->q_array.align_virtual_addr) {
  1195. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1196. result = -ENODATA;
  1197. goto err_q_null;
  1198. }
  1199. if (__resume(device)) {
  1200. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1201. goto err_q_write;
  1202. }
  1203. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1204. if (device->res->sw_power_collapsible) {
  1205. cancel_delayed_work(&iris_hfi_pm_work);
  1206. if (!queue_delayed_work(device->iris_pm_workq,
  1207. &iris_hfi_pm_work,
  1208. msecs_to_jiffies(
  1209. device->res->msm_cvp_pwr_collapse_delay))) {
  1210. dprintk(CVP_PWR,
  1211. "PM work already scheduled\n");
  1212. }
  1213. }
  1214. result = 0;
  1215. } else {
  1216. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1217. }
  1218. err_q_write:
  1219. err_q_null:
  1220. return result;
  1221. }
  1222. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1223. {
  1224. bool needs_interrupt = false;
  1225. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1226. if (!rc && needs_interrupt) {
  1227. /* Consumer of cmdq prefers that we raise an interrupt */
  1228. rc = 0;
  1229. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1230. }
  1231. return rc;
  1232. }
  1233. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1234. {
  1235. u32 tx_req_is_set = 0;
  1236. int rc = 0;
  1237. struct cvp_iface_q_info *q_info;
  1238. if (!pkt) {
  1239. dprintk(CVP_ERR, "Invalid Params\n");
  1240. return -EINVAL;
  1241. }
  1242. __strict_check(device);
  1243. if (!__core_in_valid_state(device)) {
  1244. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1245. rc = -EINVAL;
  1246. goto read_error_null;
  1247. }
  1248. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1249. if (q_info->q_array.align_virtual_addr == NULL) {
  1250. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1251. rc = -ENODATA;
  1252. goto read_error_null;
  1253. }
  1254. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1255. if (tx_req_is_set)
  1256. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1257. rc = 0;
  1258. } else
  1259. rc = -ENODATA;
  1260. read_error_null:
  1261. return rc;
  1262. }
  1263. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1264. {
  1265. u32 tx_req_is_set = 0;
  1266. int rc = 0;
  1267. struct cvp_iface_q_info *q_info;
  1268. if (!pkt) {
  1269. dprintk(CVP_ERR, "Invalid Params\n");
  1270. return -EINVAL;
  1271. }
  1272. __strict_check(device);
  1273. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1274. if (q_info->q_array.align_virtual_addr == NULL) {
  1275. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1276. rc = -ENODATA;
  1277. goto dbg_error_null;
  1278. }
  1279. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1280. if (tx_req_is_set)
  1281. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1282. rc = 0;
  1283. } else
  1284. rc = -ENODATA;
  1285. dbg_error_null:
  1286. return rc;
  1287. }
  1288. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1289. {
  1290. q_hdr->qhdr_status = 0x1;
  1291. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1292. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1293. q_hdr->qhdr_pkt_size = 0;
  1294. q_hdr->qhdr_rx_wm = 0x1;
  1295. q_hdr->qhdr_tx_wm = 0x1;
  1296. q_hdr->qhdr_rx_req = 0x1;
  1297. q_hdr->qhdr_tx_req = 0x0;
  1298. q_hdr->qhdr_rx_irq_status = 0x0;
  1299. q_hdr->qhdr_tx_irq_status = 0x0;
  1300. q_hdr->qhdr_read_idx = 0x0;
  1301. q_hdr->qhdr_write_idx = 0x0;
  1302. }
  1303. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1304. {
  1305. int i;
  1306. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1307. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1308. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1309. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1310. return;
  1311. }
  1312. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1313. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1314. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1315. mem_data->kvaddr, mem_data->dma_handle);
  1316. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1317. device->dsp_iface_queues[i].q_hdr = NULL;
  1318. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1319. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1320. }
  1321. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1322. device->dsp_iface_q_table.align_device_addr = 0;
  1323. }
  1324. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1325. {
  1326. int rc = 0;
  1327. u32 i;
  1328. struct cvp_iface_q_info *iface_q;
  1329. int offset = 0;
  1330. phys_addr_t fw_bias = 0;
  1331. size_t q_size;
  1332. struct msm_cvp_smem *mem_data;
  1333. void *kvaddr;
  1334. dma_addr_t dma_handle;
  1335. dma_addr_t iova;
  1336. struct context_bank_info *cb;
  1337. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1338. mem_data = &dev->dsp_iface_q_table.mem_data;
  1339. /* Allocate dsp queues from CDSP device memory */
  1340. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1341. &dma_handle, GFP_KERNEL);
  1342. if (IS_ERR_OR_NULL(kvaddr)) {
  1343. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1344. goto fail_dma_alloc;
  1345. }
  1346. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1347. if (!cb) {
  1348. dprintk(CVP_ERR,
  1349. "%s: failed to get context bank\n", __func__);
  1350. goto fail_dma_map;
  1351. }
  1352. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1353. q_size, DMA_BIDIRECTIONAL, 0);
  1354. if (dma_mapping_error(cb->dev, iova)) {
  1355. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1356. goto fail_dma_map;
  1357. }
  1358. dprintk(CVP_DSP,
  1359. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1360. __func__, kvaddr, dma_handle, iova, q_size);
  1361. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1362. mem_data->kvaddr = kvaddr;
  1363. mem_data->device_addr = iova;
  1364. mem_data->dma_handle = dma_handle;
  1365. mem_data->size = q_size;
  1366. mem_data->mapping_info.cb_info = cb;
  1367. if (!is_iommu_present(dev->res))
  1368. fw_bias = dev->cvp_hal_data->firmware_base;
  1369. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1370. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1371. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1372. offset = dev->dsp_iface_q_table.mem_size;
  1373. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1374. iface_q = &dev->dsp_iface_queues[i];
  1375. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1376. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1377. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1378. offset += iface_q->q_array.mem_size;
  1379. spin_lock_init(&iface_q->hfi_lock);
  1380. }
  1381. cvp_dsp_init_hfi_queue_hdr(dev);
  1382. return rc;
  1383. fail_dma_map:
  1384. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1385. fail_dma_alloc:
  1386. return -ENOMEM;
  1387. }
  1388. static void __interface_queues_release(struct iris_hfi_device *device)
  1389. {
  1390. int i;
  1391. struct cvp_hfi_mem_map_table *qdss;
  1392. struct cvp_hfi_mem_map *mem_map;
  1393. int num_entries = device->res->qdss_addr_set.count;
  1394. unsigned long mem_map_table_base_addr;
  1395. struct context_bank_info *cb;
  1396. if (device->qdss.align_virtual_addr) {
  1397. qdss = (struct cvp_hfi_mem_map_table *)
  1398. device->qdss.align_virtual_addr;
  1399. qdss->mem_map_num_entries = num_entries;
  1400. mem_map_table_base_addr =
  1401. device->qdss.align_device_addr +
  1402. sizeof(struct cvp_hfi_mem_map_table);
  1403. qdss->mem_map_table_base_addr =
  1404. (u32)mem_map_table_base_addr;
  1405. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1406. mem_map_table_base_addr) {
  1407. dprintk(CVP_ERR,
  1408. "Invalid mem_map_table_base_addr %#lx",
  1409. mem_map_table_base_addr);
  1410. }
  1411. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1412. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1413. for (i = 0; cb && i < num_entries; i++) {
  1414. iommu_unmap(cb->domain,
  1415. mem_map[i].virtual_addr,
  1416. mem_map[i].size);
  1417. }
  1418. __smem_free(device, &device->qdss.mem_data);
  1419. }
  1420. __smem_free(device, &device->iface_q_table.mem_data);
  1421. __smem_free(device, &device->sfr.mem_data);
  1422. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1423. device->iface_queues[i].q_hdr = NULL;
  1424. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1425. device->iface_queues[i].q_array.align_device_addr = 0;
  1426. }
  1427. device->iface_q_table.align_virtual_addr = NULL;
  1428. device->iface_q_table.align_device_addr = 0;
  1429. device->qdss.align_virtual_addr = NULL;
  1430. device->qdss.align_device_addr = 0;
  1431. device->sfr.align_virtual_addr = NULL;
  1432. device->sfr.align_device_addr = 0;
  1433. device->mem_addr.align_virtual_addr = NULL;
  1434. device->mem_addr.align_device_addr = 0;
  1435. __interface_dsp_queues_release(device);
  1436. }
  1437. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1438. struct cvp_hfi_mem_map *mem_map,
  1439. struct iommu_domain *domain)
  1440. {
  1441. int i;
  1442. int rc = 0;
  1443. dma_addr_t iova = QDSS_IOVA_START;
  1444. int num_entries = dev->res->qdss_addr_set.count;
  1445. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1446. if (!num_entries)
  1447. return -ENODATA;
  1448. for (i = 0; i < num_entries; i++) {
  1449. if (domain) {
  1450. rc = iommu_map(domain, iova,
  1451. qdss_addr_tbl[i].start,
  1452. qdss_addr_tbl[i].size,
  1453. IOMMU_READ | IOMMU_WRITE);
  1454. if (rc) {
  1455. dprintk(CVP_ERR,
  1456. "IOMMU QDSS mapping failed for addr %#x\n",
  1457. qdss_addr_tbl[i].start);
  1458. rc = -ENOMEM;
  1459. break;
  1460. }
  1461. } else {
  1462. iova = qdss_addr_tbl[i].start;
  1463. }
  1464. mem_map[i].virtual_addr = (u32)iova;
  1465. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1466. mem_map[i].size = qdss_addr_tbl[i].size;
  1467. mem_map[i].attr = 0x0;
  1468. iova += mem_map[i].size;
  1469. }
  1470. if (i < num_entries) {
  1471. dprintk(CVP_ERR,
  1472. "QDSS mapping failed, Freeing other entries %d\n", i);
  1473. for (--i; domain && i >= 0; i--) {
  1474. iommu_unmap(domain,
  1475. mem_map[i].virtual_addr,
  1476. mem_map[i].size);
  1477. }
  1478. }
  1479. return rc;
  1480. }
  1481. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1482. {
  1483. __write_register(device, CVP_UC_REGION_ADDR,
  1484. (u32)device->iface_q_table.align_device_addr);
  1485. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1486. __write_register(device, CVP_QTBL_ADDR,
  1487. (u32)device->iface_q_table.align_device_addr);
  1488. __write_register(device, CVP_QTBL_INFO, 0x01);
  1489. if (device->sfr.align_device_addr)
  1490. __write_register(device, CVP_SFR_ADDR,
  1491. (u32)device->sfr.align_device_addr);
  1492. if (device->qdss.align_device_addr)
  1493. __write_register(device, CVP_MMAP_ADDR,
  1494. (u32)device->qdss.align_device_addr);
  1495. call_iris_op(device, setup_dsp_uc_memmap, device);
  1496. }
  1497. static int __interface_queues_init(struct iris_hfi_device *dev)
  1498. {
  1499. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1500. struct cvp_hfi_queue_header *q_hdr;
  1501. u32 i;
  1502. int rc = 0;
  1503. struct cvp_hfi_mem_map_table *qdss;
  1504. struct cvp_hfi_mem_map *mem_map;
  1505. struct cvp_iface_q_info *iface_q;
  1506. struct cvp_hfi_sfr_struct *vsfr;
  1507. struct cvp_mem_addr *mem_addr;
  1508. int offset = 0;
  1509. int num_entries = dev->res->qdss_addr_set.count;
  1510. phys_addr_t fw_bias = 0;
  1511. size_t q_size;
  1512. unsigned long mem_map_table_base_addr;
  1513. struct context_bank_info *cb;
  1514. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1515. mem_addr = &dev->mem_addr;
  1516. if (!is_iommu_present(dev->res))
  1517. fw_bias = dev->cvp_hal_data->firmware_base;
  1518. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1519. if (rc) {
  1520. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1521. goto fail_alloc_queue;
  1522. }
  1523. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1524. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1525. fw_bias;
  1526. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1527. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1528. offset += dev->iface_q_table.mem_size;
  1529. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1530. iface_q = &dev->iface_queues[i];
  1531. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1532. + offset - fw_bias;
  1533. iface_q->q_array.align_virtual_addr =
  1534. mem_addr->align_virtual_addr + offset;
  1535. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1536. offset += iface_q->q_array.mem_size;
  1537. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1538. dev->iface_q_table.align_virtual_addr, i);
  1539. __set_queue_hdr_defaults(iface_q->q_hdr);
  1540. spin_lock_init(&iface_q->hfi_lock);
  1541. }
  1542. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1543. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1544. SMEM_UNCACHED);
  1545. if (rc) {
  1546. dprintk(CVP_WARN,
  1547. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1548. dev->qdss.align_device_addr = 0;
  1549. } else {
  1550. dev->qdss.align_device_addr =
  1551. mem_addr->align_device_addr - fw_bias;
  1552. dev->qdss.align_virtual_addr =
  1553. mem_addr->align_virtual_addr;
  1554. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1555. dev->qdss.mem_data = mem_addr->mem_data;
  1556. }
  1557. }
  1558. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1559. if (rc) {
  1560. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1561. dev->sfr.align_device_addr = 0;
  1562. } else {
  1563. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1564. fw_bias;
  1565. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1566. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1567. dev->sfr.mem_data = mem_addr->mem_data;
  1568. }
  1569. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1570. dev->iface_q_table.align_virtual_addr;
  1571. q_tbl_hdr->qtbl_version = 0;
  1572. q_tbl_hdr->device_addr = (void *)dev;
  1573. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1574. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1575. q_tbl_hdr->qtbl_qhdr0_offset =
  1576. sizeof(struct cvp_hfi_queue_table_header);
  1577. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1578. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1579. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1580. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1581. q_hdr = iface_q->q_hdr;
  1582. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1583. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1584. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1585. q_hdr = iface_q->q_hdr;
  1586. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1587. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1588. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1589. q_hdr = iface_q->q_hdr;
  1590. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1591. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1592. /*
  1593. * Set receive request to zero on debug queue as there is no
  1594. * need of interrupt from cvp hardware for debug messages
  1595. */
  1596. q_hdr->qhdr_rx_req = 0;
  1597. if (dev->qdss.align_virtual_addr) {
  1598. qdss =
  1599. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1600. qdss->mem_map_num_entries = num_entries;
  1601. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1602. sizeof(struct cvp_hfi_mem_map_table);
  1603. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1604. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1605. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1606. if (!cb) {
  1607. dprintk(CVP_ERR,
  1608. "%s: failed to get context bank\n", __func__);
  1609. return -EINVAL;
  1610. }
  1611. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1612. if (rc) {
  1613. dprintk(CVP_ERR,
  1614. "IOMMU mapping failed, Freeing qdss memdata\n");
  1615. __smem_free(dev, &dev->qdss.mem_data);
  1616. dev->qdss.align_virtual_addr = NULL;
  1617. dev->qdss.align_device_addr = 0;
  1618. }
  1619. }
  1620. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1621. if (vsfr)
  1622. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1623. rc = __interface_dsp_queues_init(dev);
  1624. if (rc) {
  1625. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1626. goto fail_alloc_queue;
  1627. }
  1628. __setup_ucregion_memory_map(dev);
  1629. return 0;
  1630. fail_alloc_queue:
  1631. return -ENOMEM;
  1632. }
  1633. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1634. {
  1635. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1636. int rc = 0;
  1637. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1638. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1639. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1640. if (rc) {
  1641. dprintk(CVP_WARN,
  1642. "Debug mode setting to FW failed\n");
  1643. return -ENOTEMPTY;
  1644. }
  1645. if (__iface_cmdq_write(device, pkt))
  1646. return -ENOTEMPTY;
  1647. return 0;
  1648. }
  1649. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1650. bool enable)
  1651. {
  1652. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1653. int rc = 0;
  1654. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1655. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1656. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1657. if (__iface_cmdq_write(device, pkt))
  1658. return -ENOTEMPTY;
  1659. return 0;
  1660. }
  1661. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1662. {
  1663. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1664. int rc = 0;
  1665. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1666. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1667. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1668. pkt, mode);
  1669. if (rc) {
  1670. dprintk(CVP_WARN,
  1671. "Coverage mode setting to FW failed\n");
  1672. return -ENOTEMPTY;
  1673. }
  1674. if (__iface_cmdq_write(device, pkt)) {
  1675. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1676. return -ENOTEMPTY;
  1677. }
  1678. return 0;
  1679. }
  1680. static int __sys_set_power_control(struct iris_hfi_device *device,
  1681. bool enable)
  1682. {
  1683. struct regulator_info *rinfo;
  1684. bool supported = false;
  1685. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1686. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1687. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1688. iris_hfi_for_each_regulator(device, rinfo) {
  1689. if (rinfo->has_hw_power_collapse) {
  1690. supported = true;
  1691. break;
  1692. }
  1693. }
  1694. if (!supported)
  1695. return 0;
  1696. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1697. if (__iface_cmdq_write(device, pkt))
  1698. return -ENOTEMPTY;
  1699. return 0;
  1700. }
  1701. static int iris_hfi_core_init(void *device)
  1702. {
  1703. int rc = 0;
  1704. u32 ipcc_iova;
  1705. struct cvp_hfi_cmd_sys_init_packet pkt;
  1706. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1707. struct iris_hfi_device *dev;
  1708. if (!device) {
  1709. dprintk(CVP_ERR, "Invalid device\n");
  1710. return -ENODEV;
  1711. }
  1712. dev = device;
  1713. dprintk(CVP_CORE, "Core initializing\n");
  1714. mutex_lock(&dev->lock);
  1715. dev->bus_vote.data =
  1716. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1717. if (!dev->bus_vote.data) {
  1718. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1719. rc = -ENOMEM;
  1720. goto err_no_mem;
  1721. }
  1722. dev->bus_vote.data_count = 1;
  1723. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1724. rc = __load_fw(dev);
  1725. if (rc) {
  1726. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1727. goto err_load_fw;
  1728. }
  1729. __set_state(dev, IRIS_STATE_INIT);
  1730. dev->reg_dumped = false;
  1731. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1732. &dev->cvp_hal_data->firmware_base,
  1733. dev->cvp_hal_data->register_base);
  1734. rc = __interface_queues_init(dev);
  1735. if (rc) {
  1736. dprintk(CVP_ERR, "failed to init queues\n");
  1737. rc = -ENOMEM;
  1738. goto err_core_init;
  1739. }
  1740. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1741. if (!rc) {
  1742. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1743. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1744. }
  1745. rc = __boot_firmware(dev);
  1746. if (rc) {
  1747. dprintk(CVP_ERR, "Failed to start core\n");
  1748. rc = -ENODEV;
  1749. goto err_core_init;
  1750. }
  1751. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1752. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1753. if (rc) {
  1754. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1755. goto err_core_init;
  1756. }
  1757. if (__iface_cmdq_write(dev, &pkt)) {
  1758. rc = -ENOTEMPTY;
  1759. goto err_core_init;
  1760. }
  1761. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1762. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1763. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1764. __sys_set_debug(device, msm_cvp_fw_debug);
  1765. __enable_subcaches(device);
  1766. __set_subcaches(device);
  1767. __set_ubwc_config(device);
  1768. __sys_set_idle_indicator(device, true);
  1769. if (dev->res->pm_qos_latency_us)
  1770. cpu_latency_qos_add_request(&dev->qos,
  1771. dev->res->pm_qos_latency_us);
  1772. /* mmrm registration */
  1773. if (msm_cvp_mmrm_enabled) {
  1774. rc = msm_cvp_mmrm_register(device);
  1775. if (rc) {
  1776. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1777. goto err_core_init;
  1778. }
  1779. }
  1780. mutex_unlock(&dev->lock);
  1781. cvp_dsp_send_hfi_queue();
  1782. dprintk(CVP_CORE, "Core inited successfully\n");
  1783. return 0;
  1784. err_core_init:
  1785. __set_state(dev, IRIS_STATE_DEINIT);
  1786. __unload_fw(dev);
  1787. err_load_fw:
  1788. err_no_mem:
  1789. dprintk(CVP_ERR, "Core init failed\n");
  1790. mutex_unlock(&dev->lock);
  1791. return rc;
  1792. }
  1793. static int iris_hfi_core_release(void *dev)
  1794. {
  1795. int rc = 0;
  1796. struct iris_hfi_device *device = dev;
  1797. struct cvp_hal_session *session, *next;
  1798. if (!device) {
  1799. dprintk(CVP_ERR, "invalid device\n");
  1800. return -ENODEV;
  1801. }
  1802. mutex_lock(&device->lock);
  1803. dprintk(CVP_WARN, "Core releasing\n");
  1804. if (device->res->pm_qos_latency_us &&
  1805. cpu_latency_qos_request_active(&device->qos))
  1806. cpu_latency_qos_remove_request(&device->qos);
  1807. __resume(device);
  1808. __set_state(device, IRIS_STATE_DEINIT);
  1809. __dsp_shutdown(device, 0);
  1810. if (msm_cvp_mmrm_enabled) {
  1811. rc = mmrm_client_deregister(device->mmrm_cvp);
  1812. if (rc) {
  1813. dprintk(CVP_ERR,
  1814. "%s: Failed mmrm_client_deregister with rc: %d\n",
  1815. __func__, rc);
  1816. } else {
  1817. dprintk(CVP_PWR,
  1818. "%s: Succeed mmrm_client_deregister for mmrm_cvp:%p, type:%d, uid:%ld\n",
  1819. __func__, device->mmrm_cvp, device->mmrm_cvp->client_type,
  1820. device->mmrm_cvp->client_uid);
  1821. device->mmrm_cvp = NULL;
  1822. }
  1823. }
  1824. __unload_fw(device);
  1825. /* unlink all sessions from device */
  1826. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1827. list_del(&session->list);
  1828. session->device = NULL;
  1829. }
  1830. dprintk(CVP_CORE, "Core released successfully\n");
  1831. mutex_unlock(&device->lock);
  1832. return rc;
  1833. }
  1834. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1835. {
  1836. u32 intr_status = 0, mask = 0;
  1837. if (!device) {
  1838. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1839. return;
  1840. }
  1841. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1842. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1843. if (intr_status & mask) {
  1844. device->intr_status |= intr_status;
  1845. device->reg_count++;
  1846. dprintk(CVP_CORE,
  1847. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1848. device, device->reg_count, intr_status);
  1849. } else {
  1850. device->spur_count++;
  1851. }
  1852. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1853. }
  1854. static int iris_hfi_core_trigger_ssr(void *device,
  1855. enum hal_ssr_trigger_type type)
  1856. {
  1857. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1858. int rc = 0;
  1859. struct iris_hfi_device *dev;
  1860. if (!device) {
  1861. dprintk(CVP_ERR, "invalid device\n");
  1862. return -ENODEV;
  1863. }
  1864. dev = device;
  1865. if (mutex_trylock(&dev->lock)) {
  1866. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1867. if (rc) {
  1868. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1869. __func__);
  1870. goto err_create_pkt;
  1871. }
  1872. if (__iface_cmdq_write(dev, &pkt))
  1873. rc = -ENOTEMPTY;
  1874. } else {
  1875. return -EAGAIN;
  1876. }
  1877. err_create_pkt:
  1878. mutex_unlock(&dev->lock);
  1879. return rc;
  1880. }
  1881. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1882. {
  1883. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1884. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1885. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1886. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1887. }
  1888. static void __session_clean(struct cvp_hal_session *session)
  1889. {
  1890. struct cvp_hal_session *temp, *next;
  1891. struct iris_hfi_device *device;
  1892. if (!session || !session->device) {
  1893. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1894. return;
  1895. }
  1896. device = session->device;
  1897. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1898. /*
  1899. * session might have been removed from the device list in
  1900. * core_release, so check and remove if it is in the list
  1901. */
  1902. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1903. if (session == temp) {
  1904. list_del(&session->list);
  1905. break;
  1906. }
  1907. }
  1908. /* Poison the session handle with zeros */
  1909. *session = (struct cvp_hal_session){ {0} };
  1910. kfree(session);
  1911. }
  1912. static int iris_hfi_session_clean(void *session)
  1913. {
  1914. struct cvp_hal_session *sess_close;
  1915. struct iris_hfi_device *device;
  1916. if (!session) {
  1917. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1918. return -EINVAL;
  1919. }
  1920. sess_close = session;
  1921. device = sess_close->device;
  1922. if (!device) {
  1923. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1924. return -EINVAL;
  1925. }
  1926. mutex_lock(&device->lock);
  1927. __session_clean(sess_close);
  1928. mutex_unlock(&device->lock);
  1929. return 0;
  1930. }
  1931. static int iris_hfi_session_init(void *device, void *session_id,
  1932. void **new_session)
  1933. {
  1934. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1935. struct iris_hfi_device *dev;
  1936. struct cvp_hal_session *s;
  1937. if (!device || !new_session) {
  1938. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1939. return -EINVAL;
  1940. }
  1941. dev = device;
  1942. mutex_lock(&dev->lock);
  1943. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1944. if (!s) {
  1945. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1946. goto err_session_init_fail;
  1947. }
  1948. s->session_id = session_id;
  1949. s->device = dev;
  1950. dprintk(CVP_SESS,
  1951. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1952. list_add_tail(&s->list, &dev->sess_head);
  1953. __set_default_sys_properties(device);
  1954. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1955. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1956. goto err_session_init_fail;
  1957. }
  1958. *new_session = s;
  1959. if (__iface_cmdq_write(dev, &pkt))
  1960. goto err_session_init_fail;
  1961. mutex_unlock(&dev->lock);
  1962. return 0;
  1963. err_session_init_fail:
  1964. if (s)
  1965. __session_clean(s);
  1966. *new_session = NULL;
  1967. mutex_unlock(&dev->lock);
  1968. return -EINVAL;
  1969. }
  1970. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1971. {
  1972. struct cvp_hal_session_cmd_pkt pkt;
  1973. int rc = 0;
  1974. struct iris_hfi_device *device = session->device;
  1975. if (!__is_session_valid(device, session, __func__))
  1976. return -ECONNRESET;
  1977. rc = call_hfi_pkt_op(device, session_cmd,
  1978. &pkt, pkt_type, session);
  1979. if (rc == -EPERM)
  1980. return 0;
  1981. if (rc) {
  1982. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1983. goto err_create_pkt;
  1984. }
  1985. if (__iface_cmdq_write(session->device, &pkt))
  1986. rc = -ENOTEMPTY;
  1987. err_create_pkt:
  1988. return rc;
  1989. }
  1990. static int iris_hfi_session_end(void *session)
  1991. {
  1992. struct cvp_hal_session *sess;
  1993. struct iris_hfi_device *device;
  1994. int rc = 0;
  1995. if (!session) {
  1996. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1997. return -EINVAL;
  1998. }
  1999. sess = session;
  2000. device = sess->device;
  2001. if (!device) {
  2002. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  2003. return -EINVAL;
  2004. }
  2005. mutex_lock(&device->lock);
  2006. if (msm_cvp_fw_coverage) {
  2007. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  2008. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  2009. }
  2010. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  2011. mutex_unlock(&device->lock);
  2012. return rc;
  2013. }
  2014. static int iris_hfi_session_abort(void *sess)
  2015. {
  2016. struct cvp_hal_session *session = sess;
  2017. struct iris_hfi_device *device;
  2018. int rc = 0;
  2019. if (!session || !session->device) {
  2020. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2021. return -EINVAL;
  2022. }
  2023. device = session->device;
  2024. mutex_lock(&device->lock);
  2025. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  2026. mutex_unlock(&device->lock);
  2027. return rc;
  2028. }
  2029. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  2030. {
  2031. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  2032. int rc = 0;
  2033. struct cvp_hal_session *session = sess;
  2034. struct iris_hfi_device *device;
  2035. if (!session || !session->device || !iova || !size) {
  2036. dprintk(CVP_ERR, "Invalid Params\n");
  2037. return -EINVAL;
  2038. }
  2039. device = session->device;
  2040. mutex_lock(&device->lock);
  2041. if (!__is_session_valid(device, session, __func__)) {
  2042. rc = -ECONNRESET;
  2043. goto err_create_pkt;
  2044. }
  2045. rc = call_hfi_pkt_op(device, session_set_buffers,
  2046. &pkt, session, iova, size);
  2047. if (rc) {
  2048. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2049. goto err_create_pkt;
  2050. }
  2051. if (__iface_cmdq_write(session->device, &pkt))
  2052. rc = -ENOTEMPTY;
  2053. err_create_pkt:
  2054. mutex_unlock(&device->lock);
  2055. return rc;
  2056. }
  2057. static int iris_hfi_session_release_buffers(void *sess)
  2058. {
  2059. struct cvp_session_release_buffers_packet pkt;
  2060. int rc = 0;
  2061. struct cvp_hal_session *session = sess;
  2062. struct iris_hfi_device *device;
  2063. if (!session || !session->device) {
  2064. dprintk(CVP_ERR, "Invalid Params\n");
  2065. return -EINVAL;
  2066. }
  2067. device = session->device;
  2068. mutex_lock(&device->lock);
  2069. if (!__is_session_valid(device, session, __func__)) {
  2070. rc = -ECONNRESET;
  2071. goto err_create_pkt;
  2072. }
  2073. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2074. if (rc) {
  2075. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2076. goto err_create_pkt;
  2077. }
  2078. if (__iface_cmdq_write(session->device, &pkt))
  2079. rc = -ENOTEMPTY;
  2080. err_create_pkt:
  2081. mutex_unlock(&device->lock);
  2082. return rc;
  2083. }
  2084. static int iris_hfi_session_send(void *sess,
  2085. struct eva_kmd_hfi_packet *in_pkt)
  2086. {
  2087. int rc = 0;
  2088. struct eva_kmd_hfi_packet pkt;
  2089. struct cvp_hal_session *session = sess;
  2090. struct iris_hfi_device *device;
  2091. if (!session || !session->device) {
  2092. dprintk(CVP_ERR, "invalid session");
  2093. return -ENODEV;
  2094. }
  2095. device = session->device;
  2096. mutex_lock(&device->lock);
  2097. if (!__is_session_valid(device, session, __func__)) {
  2098. rc = -ECONNRESET;
  2099. goto err_send_pkt;
  2100. }
  2101. rc = call_hfi_pkt_op(device, session_send,
  2102. &pkt, session, in_pkt);
  2103. if (rc) {
  2104. dprintk(CVP_ERR,
  2105. "failed to create pkt\n");
  2106. goto err_send_pkt;
  2107. }
  2108. if (__iface_cmdq_write(session->device, &pkt))
  2109. rc = -ENOTEMPTY;
  2110. err_send_pkt:
  2111. mutex_unlock(&device->lock);
  2112. return rc;
  2113. return rc;
  2114. }
  2115. static int iris_hfi_session_flush(void *sess)
  2116. {
  2117. struct cvp_hal_session *session = sess;
  2118. struct iris_hfi_device *device;
  2119. int rc = 0;
  2120. if (!session || !session->device) {
  2121. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2122. return -EINVAL;
  2123. }
  2124. device = session->device;
  2125. mutex_lock(&device->lock);
  2126. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2127. mutex_unlock(&device->lock);
  2128. return rc;
  2129. }
  2130. static int __check_core_registered(struct iris_hfi_device *device,
  2131. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  2132. phys_addr_t irq)
  2133. {
  2134. struct cvp_hal_data *cvp_hal_data;
  2135. if (!device) {
  2136. dprintk(CVP_INFO, "no device Registered\n");
  2137. return -EINVAL;
  2138. }
  2139. cvp_hal_data = device->cvp_hal_data;
  2140. if (!cvp_hal_data)
  2141. return -EINVAL;
  2142. if (cvp_hal_data->irq == irq &&
  2143. (CONTAINS(cvp_hal_data->firmware_base,
  2144. FIRMWARE_SIZE, fw_addr) ||
  2145. CONTAINS(fw_addr, FIRMWARE_SIZE,
  2146. cvp_hal_data->firmware_base) ||
  2147. CONTAINS(cvp_hal_data->register_base,
  2148. reg_size, reg_addr) ||
  2149. CONTAINS(reg_addr, reg_size,
  2150. cvp_hal_data->register_base) ||
  2151. OVERLAPS(cvp_hal_data->register_base,
  2152. reg_size, reg_addr, reg_size) ||
  2153. OVERLAPS(reg_addr, reg_size,
  2154. cvp_hal_data->register_base,
  2155. reg_size) ||
  2156. OVERLAPS(cvp_hal_data->firmware_base,
  2157. FIRMWARE_SIZE, fw_addr,
  2158. FIRMWARE_SIZE) ||
  2159. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  2160. cvp_hal_data->firmware_base,
  2161. FIRMWARE_SIZE))) {
  2162. return 0;
  2163. }
  2164. dprintk(CVP_INFO, "Device not registered\n");
  2165. return -EINVAL;
  2166. }
  2167. static void __process_fatal_error(
  2168. struct iris_hfi_device *device)
  2169. {
  2170. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2171. cmd_done.device_id = device->device_id;
  2172. device->callback(HAL_SYS_ERROR, &cmd_done);
  2173. }
  2174. static int __prepare_pc(struct iris_hfi_device *device)
  2175. {
  2176. int rc = 0;
  2177. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2178. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2179. if (rc) {
  2180. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2181. goto err_pc_prep;
  2182. }
  2183. if (__iface_cmdq_write(device, &pkt))
  2184. rc = -ENOTEMPTY;
  2185. if (rc)
  2186. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2187. err_pc_prep:
  2188. return rc;
  2189. }
  2190. static void iris_hfi_pm_handler(struct work_struct *work)
  2191. {
  2192. int rc = 0;
  2193. struct msm_cvp_core *core;
  2194. struct iris_hfi_device *device;
  2195. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2196. if (core)
  2197. device = core->device->hfi_device_data;
  2198. else
  2199. return;
  2200. if (!device) {
  2201. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2202. return;
  2203. }
  2204. dprintk(CVP_PWR,
  2205. "Entering %s\n", __func__);
  2206. /*
  2207. * It is ok to check this variable outside the lock since
  2208. * it is being updated in this context only
  2209. */
  2210. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2211. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2212. device->skip_pc_count);
  2213. device->skip_pc_count = 0;
  2214. __process_fatal_error(device);
  2215. return;
  2216. }
  2217. mutex_lock(&device->lock);
  2218. if (gfa_cv.state == DSP_SUSPEND)
  2219. rc = __power_collapse(device, true);
  2220. else
  2221. rc = __power_collapse(device, false);
  2222. mutex_unlock(&device->lock);
  2223. switch (rc) {
  2224. case 0:
  2225. device->skip_pc_count = 0;
  2226. /* Cancel pending delayed works if any */
  2227. cancel_delayed_work(&iris_hfi_pm_work);
  2228. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2229. __func__);
  2230. break;
  2231. case -EBUSY:
  2232. device->skip_pc_count = 0;
  2233. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2234. queue_delayed_work(device->iris_pm_workq,
  2235. &iris_hfi_pm_work, msecs_to_jiffies(
  2236. device->res->msm_cvp_pwr_collapse_delay));
  2237. break;
  2238. case -EAGAIN:
  2239. device->skip_pc_count++;
  2240. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2241. __func__, device->skip_pc_count);
  2242. queue_delayed_work(device->iris_pm_workq,
  2243. &iris_hfi_pm_work, msecs_to_jiffies(
  2244. device->res->msm_cvp_pwr_collapse_delay));
  2245. break;
  2246. default:
  2247. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2248. break;
  2249. }
  2250. }
  2251. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2252. {
  2253. int rc = 0;
  2254. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2255. u32 flags = 0;
  2256. int count = 0;
  2257. const int max_tries = 150;
  2258. if (!device) {
  2259. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2260. return -EINVAL;
  2261. }
  2262. if (!device->power_enabled) {
  2263. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2264. __func__);
  2265. goto exit;
  2266. }
  2267. rc = __core_in_valid_state(device);
  2268. if (!rc) {
  2269. dprintk(CVP_WARN,
  2270. "Core is in bad state, Skipping power collapse\n");
  2271. return -EINVAL;
  2272. }
  2273. rc = __dsp_suspend(device, force, flags);
  2274. if (rc == -EBUSY)
  2275. goto exit;
  2276. else if (rc)
  2277. goto skip_power_off;
  2278. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2279. CVP_CTRL_STATUS_PC_READY;
  2280. if (!pc_ready) {
  2281. wfi_status = __read_register(device,
  2282. CVP_WRAPPER_CPU_STATUS);
  2283. idle_status = __read_register(device,
  2284. CVP_CTRL_STATUS);
  2285. if (!(wfi_status & BIT(0))) {
  2286. dprintk(CVP_WARN,
  2287. "Skipping PC as wfi_status (%#x) bit not set\n",
  2288. wfi_status);
  2289. goto skip_power_off;
  2290. }
  2291. if (!(idle_status & BIT(30))) {
  2292. dprintk(CVP_WARN,
  2293. "Skipping PC as idle_status (%#x) bit not set\n",
  2294. idle_status);
  2295. goto skip_power_off;
  2296. }
  2297. rc = __prepare_pc(device);
  2298. if (rc) {
  2299. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2300. goto skip_power_off;
  2301. }
  2302. while (count < max_tries) {
  2303. wfi_status = __read_register(device,
  2304. CVP_WRAPPER_CPU_STATUS);
  2305. pc_ready = __read_register(device,
  2306. CVP_CTRL_STATUS);
  2307. if ((wfi_status & BIT(0)) && (pc_ready &
  2308. CVP_CTRL_STATUS_PC_READY))
  2309. break;
  2310. usleep_range(150, 250);
  2311. count++;
  2312. }
  2313. if (count == max_tries) {
  2314. dprintk(CVP_ERR,
  2315. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2316. wfi_status, pc_ready);
  2317. goto skip_power_off;
  2318. }
  2319. }
  2320. __flush_debug_queue(device, device->raw_packet);
  2321. rc = __suspend(device);
  2322. if (rc)
  2323. dprintk(CVP_ERR, "Failed __suspend\n");
  2324. exit:
  2325. return rc;
  2326. skip_power_off:
  2327. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2328. wfi_status, idle_status, pc_ready);
  2329. __flush_debug_queue(device, device->raw_packet);
  2330. return -EAGAIN;
  2331. }
  2332. static void __process_sys_error(struct iris_hfi_device *device)
  2333. {
  2334. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2335. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2336. if (vsfr) {
  2337. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2338. /*
  2339. * SFR isn't guaranteed to be NULL terminated
  2340. * since SYS_ERROR indicates that Iris is in the
  2341. * process of crashing.
  2342. */
  2343. if (p == NULL)
  2344. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2345. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2346. vsfr->rg_data);
  2347. }
  2348. }
  2349. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2350. {
  2351. bool local_packet = false;
  2352. enum cvp_msg_prio log_level = CVP_FW;
  2353. if (!device) {
  2354. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2355. return;
  2356. }
  2357. if (!packet) {
  2358. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2359. if (!packet) {
  2360. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2361. __func__);
  2362. return;
  2363. }
  2364. local_packet = true;
  2365. /*
  2366. * Local packek is used when something FATAL occurred.
  2367. * It is good to print these logs by default.
  2368. */
  2369. log_level = CVP_ERR;
  2370. }
  2371. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2372. if (pkt_size < pkt_hdr_size || \
  2373. payload_size < MIN_PAYLOAD_SIZE || \
  2374. payload_size > \
  2375. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2376. dprintk(CVP_ERR, \
  2377. "%s: invalid msg size - %d\n", \
  2378. __func__, pkt->msg_size); \
  2379. continue; \
  2380. } \
  2381. })
  2382. while (!__iface_dbgq_read(device, packet)) {
  2383. struct cvp_hfi_packet_header *pkt =
  2384. (struct cvp_hfi_packet_header *) packet;
  2385. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2386. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2387. __func__);
  2388. continue;
  2389. }
  2390. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2391. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2392. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2393. SKIP_INVALID_PKT(pkt->size,
  2394. pkt->msg_size, sizeof(*pkt));
  2395. /*
  2396. * All fw messages starts with new line character. This
  2397. * causes dprintk to print this message in two lines
  2398. * in the kernel log. Ignoring the first character
  2399. * from the message fixes this to print it in a single
  2400. * line.
  2401. */
  2402. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2403. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2404. }
  2405. }
  2406. #undef SKIP_INVALID_PKT
  2407. if (local_packet)
  2408. kfree(packet);
  2409. }
  2410. static bool __is_session_valid(struct iris_hfi_device *device,
  2411. struct cvp_hal_session *session, const char *func)
  2412. {
  2413. struct cvp_hal_session *temp = NULL;
  2414. if (!device || !session)
  2415. goto invalid;
  2416. list_for_each_entry(temp, &device->sess_head, list)
  2417. if (session == temp)
  2418. return true;
  2419. invalid:
  2420. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2421. func, device, session);
  2422. return false;
  2423. }
  2424. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2425. u32 session_id)
  2426. {
  2427. struct cvp_hal_session *temp = NULL;
  2428. list_for_each_entry(temp, &device->sess_head, list) {
  2429. if (session_id == hash32_ptr(temp))
  2430. return temp;
  2431. }
  2432. return NULL;
  2433. }
  2434. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2435. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2436. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2437. static void process_system_msg(struct msm_cvp_cb_info *info,
  2438. struct iris_hfi_device *device,
  2439. void *raw_packet)
  2440. {
  2441. struct cvp_hal_sys_init_done sys_init_done = {0};
  2442. switch (info->response_type) {
  2443. case HAL_SYS_ERROR:
  2444. __process_sys_error(device);
  2445. break;
  2446. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2447. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2448. break;
  2449. case HAL_SYS_INIT_DONE:
  2450. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2451. sys_init_done.capabilities =
  2452. device->sys_init_capabilities;
  2453. cvp_hfi_process_sys_init_done_prop_read(
  2454. (struct cvp_hfi_msg_sys_init_done_packet *)
  2455. raw_packet, &sys_init_done);
  2456. info->response.cmd.data.sys_init_done = sys_init_done;
  2457. break;
  2458. default:
  2459. break;
  2460. }
  2461. }
  2462. static void **get_session_id(struct msm_cvp_cb_info *info)
  2463. {
  2464. void **session_id = NULL;
  2465. /* For session-related packets, validate session */
  2466. switch (info->response_type) {
  2467. case HAL_SESSION_INIT_DONE:
  2468. case HAL_SESSION_END_DONE:
  2469. case HAL_SESSION_ABORT_DONE:
  2470. case HAL_SESSION_STOP_DONE:
  2471. case HAL_SESSION_FLUSH_DONE:
  2472. case HAL_SESSION_SET_BUFFER_DONE:
  2473. case HAL_SESSION_SUSPEND_DONE:
  2474. case HAL_SESSION_RESUME_DONE:
  2475. case HAL_SESSION_SET_PROP_DONE:
  2476. case HAL_SESSION_GET_PROP_DONE:
  2477. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2478. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2479. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2480. case HAL_SESSION_DFS_CONFIG_CMD_DONE:
  2481. case HAL_SESSION_DMM_CONFIG_CMD_DONE:
  2482. case HAL_SESSION_WARP_CONFIG_CMD_DONE:
  2483. case HAL_SESSION_WARP_NCC_CONFIG_CMD_DONE:
  2484. case HAL_SESSION_SGM_OF_CONFIG_CMD_DONE:
  2485. case HAL_SESSION_TME_CONFIG_CMD_DONE:
  2486. case HAL_SESSION_ODT_CONFIG_CMD_DONE:
  2487. case HAL_SESSION_OD_CONFIG_CMD_DONE:
  2488. case HAL_SESSION_NCC_CONFIG_CMD_DONE:
  2489. case HAL_SESSION_ICA_CONFIG_CMD_DONE:
  2490. case HAL_SESSION_HCD_CONFIG_CMD_DONE:
  2491. case HAL_SESSION_DCM_CONFIG_CMD_DONE:
  2492. case HAL_SESSION_DC_CONFIG_CMD_DONE:
  2493. case HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE:
  2494. case HAL_SESSION_DMM_PARAMS_CMD_DONE:
  2495. case HAL_SESSION_WARP_DS_PARAMS_CMD_DONE:
  2496. case HAL_SESSION_PERSIST_SET_DONE:
  2497. case HAL_SESSION_PERSIST_REL_DONE:
  2498. case HAL_SESSION_FD_CONFIG_CMD_DONE:
  2499. case HAL_SESSION_MODEL_BUF_CMD_DONE:
  2500. case HAL_SESSION_PROPERTY_INFO:
  2501. case HAL_SESSION_EVENT_CHANGE:
  2502. session_id = &info->response.cmd.session_id;
  2503. break;
  2504. case HAL_SESSION_ERROR:
  2505. session_id = &info->response.data.session_id;
  2506. break;
  2507. case HAL_RESPONSE_UNUSED:
  2508. default:
  2509. session_id = NULL;
  2510. break;
  2511. }
  2512. return session_id;
  2513. }
  2514. static void print_msg_hdr(void *hdr)
  2515. {
  2516. struct cvp_hfi_msg_session_hdr *new_hdr =
  2517. (struct cvp_hfi_msg_session_hdr *)hdr;
  2518. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2519. new_hdr->size, new_hdr->packet_type,
  2520. new_hdr->session_id,
  2521. new_hdr->client_data.transaction_id,
  2522. new_hdr->client_data.data1,
  2523. new_hdr->client_data.data2,
  2524. new_hdr->error_type);
  2525. }
  2526. static int __response_handler(struct iris_hfi_device *device)
  2527. {
  2528. struct msm_cvp_cb_info *packets;
  2529. int packet_count = 0;
  2530. u8 *raw_packet = NULL;
  2531. bool requeue_pm_work = true;
  2532. if (!device || device->state != IRIS_STATE_INIT)
  2533. return 0;
  2534. packets = device->response_pkt;
  2535. raw_packet = device->raw_packet;
  2536. if (!raw_packet || !packets) {
  2537. dprintk(CVP_ERR,
  2538. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2539. __func__, packets, raw_packet);
  2540. return 0;
  2541. }
  2542. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2543. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2544. device->sfr.align_virtual_addr;
  2545. struct msm_cvp_cb_info info = {
  2546. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2547. .response.cmd = {
  2548. .device_id = device->device_id,
  2549. }
  2550. };
  2551. if (vsfr)
  2552. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2553. vsfr->rg_data);
  2554. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2555. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2556. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2557. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2558. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2559. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2560. packets[packet_count++] = info;
  2561. goto exit;
  2562. }
  2563. /* Bleed the msg queue dry of packets */
  2564. while (!__iface_msgq_read(device, raw_packet)) {
  2565. void **session_id = NULL;
  2566. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2567. struct cvp_hfi_msg_session_hdr *hdr =
  2568. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2569. int rc = 0;
  2570. print_msg_hdr(hdr);
  2571. rc = cvp_hfi_process_msg_packet(device->device_id,
  2572. raw_packet, info);
  2573. if (rc) {
  2574. dprintk(CVP_WARN,
  2575. "Corrupt/unknown packet found, discarding\n");
  2576. --packet_count;
  2577. continue;
  2578. } else if (info->response_type == HAL_NO_RESP) {
  2579. --packet_count;
  2580. continue;
  2581. }
  2582. /* Process the packet types that we're interested in */
  2583. process_system_msg(info, device, raw_packet);
  2584. session_id = get_session_id(info);
  2585. /*
  2586. * hfi_process_msg_packet provides a session_id that's a hashed
  2587. * value of struct cvp_hal_session, we need to coerce the hashed
  2588. * value back to pointer that we can use. Ideally, hfi_process\
  2589. * _msg_packet should take care of this, but it doesn't have
  2590. * required information for it
  2591. */
  2592. if (session_id) {
  2593. struct cvp_hal_session *session = NULL;
  2594. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2595. dprintk(CVP_ERR,
  2596. "Upper 32-bits != 0 for sess_id=%pK\n",
  2597. *session_id);
  2598. }
  2599. session = __get_session(device,
  2600. (u32)(uintptr_t)*session_id);
  2601. if (!session) {
  2602. dprintk(CVP_ERR, _INVALID_MSG_,
  2603. info->response_type,
  2604. *session_id);
  2605. --packet_count;
  2606. continue;
  2607. }
  2608. *session_id = session->session_id;
  2609. }
  2610. if (packet_count >= cvp_max_packets) {
  2611. dprintk(CVP_WARN,
  2612. "Too many packets in message queue!\n");
  2613. break;
  2614. }
  2615. /* do not read packets after sys error packet */
  2616. if (info->response_type == HAL_SYS_ERROR)
  2617. break;
  2618. }
  2619. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2620. cancel_delayed_work(&iris_hfi_pm_work);
  2621. if (!queue_delayed_work(device->iris_pm_workq,
  2622. &iris_hfi_pm_work,
  2623. msecs_to_jiffies(
  2624. device->res->msm_cvp_pwr_collapse_delay))) {
  2625. dprintk(CVP_ERR, "PM work already scheduled\n");
  2626. }
  2627. }
  2628. exit:
  2629. __flush_debug_queue(device, raw_packet);
  2630. return packet_count;
  2631. }
  2632. static void iris_hfi_core_work_handler(struct work_struct *work)
  2633. {
  2634. struct msm_cvp_core *core;
  2635. struct iris_hfi_device *device;
  2636. int num_responses = 0, i = 0;
  2637. u32 intr_status;
  2638. static bool warning_on = true;
  2639. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2640. if (core)
  2641. device = core->device->hfi_device_data;
  2642. else
  2643. return;
  2644. mutex_lock(&device->lock);
  2645. if (!__core_in_valid_state(device)) {
  2646. if (warning_on) {
  2647. dprintk(CVP_WARN, "%s Core not in init state\n",
  2648. __func__);
  2649. warning_on = false;
  2650. }
  2651. goto err_no_work;
  2652. }
  2653. warning_on = true;
  2654. if (!device->callback) {
  2655. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2656. device);
  2657. goto err_no_work;
  2658. }
  2659. if (__resume(device)) {
  2660. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2661. goto err_no_work;
  2662. }
  2663. __core_clear_interrupt(device);
  2664. num_responses = __response_handler(device);
  2665. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2666. __func__, num_responses);
  2667. err_no_work:
  2668. /* Keep the interrupt status before releasing device lock */
  2669. intr_status = device->intr_status;
  2670. mutex_unlock(&device->lock);
  2671. /*
  2672. * Issue the callbacks outside of the locked contex to preserve
  2673. * re-entrancy.
  2674. */
  2675. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2676. i < num_responses; ++i) {
  2677. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2678. void *rsp = (void *)&r->response;
  2679. if (!__core_in_valid_state(device)) {
  2680. dprintk(CVP_ERR,
  2681. _INVALID_STATE_, (i + 1), num_responses);
  2682. break;
  2683. }
  2684. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2685. (i + 1), num_responses, r->response_type);
  2686. device->callback(r->response_type, rsp);
  2687. }
  2688. /* We need re-enable the irq which was disabled in ISR handler */
  2689. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2690. enable_irq(device->cvp_hal_data->irq);
  2691. /*
  2692. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2693. * it above doesn't guarantee the atomicity that we're aiming for.
  2694. */
  2695. }
  2696. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2697. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2698. {
  2699. struct iris_hfi_device *device = dev;
  2700. disable_irq_nosync(irq);
  2701. queue_work(device->cvp_workq, &iris_hfi_work);
  2702. return IRQ_HANDLED;
  2703. }
  2704. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2705. struct msm_cvp_platform_resources *res)
  2706. {
  2707. struct cvp_hal_data *hal = NULL;
  2708. int rc = 0;
  2709. rc = __check_core_registered(device, res->firmware_base,
  2710. (u8 *)(uintptr_t)res->register_base,
  2711. res->register_size, res->irq);
  2712. if (!rc) {
  2713. dprintk(CVP_ERR, "Core present/Already added\n");
  2714. rc = -EEXIST;
  2715. goto err_core_init;
  2716. }
  2717. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2718. if (!hal) {
  2719. dprintk(CVP_ERR, "Failed to alloc\n");
  2720. rc = -ENOMEM;
  2721. goto err_core_init;
  2722. }
  2723. hal->irq = res->irq;
  2724. hal->firmware_base = res->firmware_base;
  2725. hal->register_base = devm_ioremap(&res->pdev->dev,
  2726. res->register_base, res->register_size);
  2727. hal->register_size = res->register_size;
  2728. if (!hal->register_base) {
  2729. dprintk(CVP_ERR,
  2730. "could not map reg addr %pa of size %d\n",
  2731. &res->register_base, res->register_size);
  2732. goto error_irq_fail;
  2733. }
  2734. if (res->gcc_reg_base) {
  2735. hal->gcc_reg_base = devm_ioremap(&res->pdev->dev,
  2736. res->gcc_reg_base, res->gcc_reg_size);
  2737. hal->gcc_reg_size = res->gcc_reg_size;
  2738. if (!hal->gcc_reg_base)
  2739. dprintk(CVP_ERR,
  2740. "could not map gcc reg addr %pa of size %d\n",
  2741. &res->gcc_reg_base, res->gcc_reg_size);
  2742. }
  2743. device->cvp_hal_data = hal;
  2744. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2745. "msm_cvp", device);
  2746. if (unlikely(rc)) {
  2747. dprintk(CVP_ERR, "() :request_irq failed\n");
  2748. goto error_irq_fail;
  2749. }
  2750. disable_irq_nosync(res->irq);
  2751. dprintk(CVP_INFO,
  2752. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2753. &res->firmware_base, &res->register_base,
  2754. res->register_size);
  2755. return rc;
  2756. error_irq_fail:
  2757. kfree(hal);
  2758. err_core_init:
  2759. return rc;
  2760. }
  2761. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2762. int reset_index, enum reset_state state,
  2763. enum power_state pwr_state)
  2764. {
  2765. int rc = 0;
  2766. struct reset_control *rst;
  2767. struct reset_info rst_info;
  2768. struct reset_set *rst_set = &res->reset_set;
  2769. if (!rst_set->reset_tbl)
  2770. return 0;
  2771. rst_info = rst_set->reset_tbl[reset_index];
  2772. rst = rst_info.rst;
  2773. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2774. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2775. switch (state) {
  2776. case INIT:
  2777. if (rst)
  2778. goto skip_reset_init;
  2779. rst = devm_reset_control_get(&res->pdev->dev,
  2780. rst_set->reset_tbl[reset_index].name);
  2781. if (IS_ERR(rst))
  2782. rc = PTR_ERR(rst);
  2783. rst_set->reset_tbl[reset_index].rst = rst;
  2784. break;
  2785. case ASSERT:
  2786. if (!rst) {
  2787. rc = PTR_ERR(rst);
  2788. goto failed_to_reset;
  2789. }
  2790. if (pwr_state != rst_info.required_state)
  2791. break;
  2792. rc = reset_control_assert(rst);
  2793. break;
  2794. case DEASSERT:
  2795. if (!rst) {
  2796. rc = PTR_ERR(rst);
  2797. goto failed_to_reset;
  2798. }
  2799. if (pwr_state != rst_info.required_state)
  2800. break;
  2801. rc = reset_control_deassert(rst);
  2802. break;
  2803. default:
  2804. dprintk(CVP_ERR, "Invalid reset request\n");
  2805. if (rc)
  2806. goto failed_to_reset;
  2807. }
  2808. return 0;
  2809. skip_reset_init:
  2810. failed_to_reset:
  2811. return rc;
  2812. }
  2813. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2814. {
  2815. int rc, i;
  2816. enum power_state s;
  2817. if (!device) {
  2818. dprintk(CVP_ERR, "NULL device\n");
  2819. rc = -EINVAL;
  2820. goto failed_to_reset;
  2821. }
  2822. if (device->power_enabled)
  2823. s = CVP_POWER_ON;
  2824. else
  2825. s = CVP_POWER_OFF;
  2826. for (i = 0; i < device->res->reset_set.count; i++) {
  2827. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2828. if (rc) {
  2829. dprintk(CVP_ERR,
  2830. "failed to assert reset clocks\n");
  2831. goto failed_to_reset;
  2832. }
  2833. /* wait for deassert */
  2834. usleep_range(1000, 1050);
  2835. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2836. if (rc) {
  2837. dprintk(CVP_ERR,
  2838. "failed to deassert reset clocks\n");
  2839. goto failed_to_reset;
  2840. }
  2841. }
  2842. return 0;
  2843. failed_to_reset:
  2844. return rc;
  2845. }
  2846. static void __deinit_bus(struct iris_hfi_device *device)
  2847. {
  2848. struct bus_info *bus = NULL;
  2849. if (!device)
  2850. return;
  2851. kfree(device->bus_vote.data);
  2852. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2853. iris_hfi_for_each_bus_reverse(device, bus) {
  2854. dev_set_drvdata(bus->dev, NULL);
  2855. icc_put(bus->client);
  2856. bus->client = NULL;
  2857. }
  2858. }
  2859. static int __init_bus(struct iris_hfi_device *device)
  2860. {
  2861. struct bus_info *bus = NULL;
  2862. int rc = 0;
  2863. if (!device)
  2864. return -EINVAL;
  2865. iris_hfi_for_each_bus(device, bus) {
  2866. /*
  2867. * This is stupid, but there's no other easy way to ahold
  2868. * of struct bus_info in iris_hfi_devfreq_*()
  2869. */
  2870. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2871. dev_name(bus->dev));
  2872. dev_set_drvdata(bus->dev, device);
  2873. bus->client = icc_get(&device->res->pdev->dev,
  2874. bus->master, bus->slave);
  2875. if (IS_ERR_OR_NULL(bus->client)) {
  2876. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2877. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2878. bus->name, rc);
  2879. bus->client = NULL;
  2880. goto err_add_dev;
  2881. }
  2882. }
  2883. return 0;
  2884. err_add_dev:
  2885. __deinit_bus(device);
  2886. return rc;
  2887. }
  2888. static void __deinit_regulators(struct iris_hfi_device *device)
  2889. {
  2890. struct regulator_info *rinfo = NULL;
  2891. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2892. if (rinfo->regulator) {
  2893. regulator_put(rinfo->regulator);
  2894. rinfo->regulator = NULL;
  2895. }
  2896. }
  2897. }
  2898. static int __init_regulators(struct iris_hfi_device *device)
  2899. {
  2900. int rc = 0;
  2901. struct regulator_info *rinfo = NULL;
  2902. iris_hfi_for_each_regulator(device, rinfo) {
  2903. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2904. rinfo->name);
  2905. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2906. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2907. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2908. rinfo->name);
  2909. rinfo->regulator = NULL;
  2910. goto err_reg_get;
  2911. }
  2912. }
  2913. return 0;
  2914. err_reg_get:
  2915. __deinit_regulators(device);
  2916. return rc;
  2917. }
  2918. static void __deinit_subcaches(struct iris_hfi_device *device)
  2919. {
  2920. struct subcache_info *sinfo = NULL;
  2921. if (!device) {
  2922. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2923. device);
  2924. goto exit;
  2925. }
  2926. if (!is_sys_cache_present(device))
  2927. goto exit;
  2928. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2929. if (sinfo->subcache) {
  2930. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2931. sinfo->name);
  2932. llcc_slice_putd(sinfo->subcache);
  2933. sinfo->subcache = NULL;
  2934. }
  2935. }
  2936. exit:
  2937. return;
  2938. }
  2939. static int __init_subcaches(struct iris_hfi_device *device)
  2940. {
  2941. int rc = 0;
  2942. struct subcache_info *sinfo = NULL;
  2943. if (!device) {
  2944. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2945. device);
  2946. return -EINVAL;
  2947. }
  2948. if (!is_sys_cache_present(device))
  2949. return 0;
  2950. iris_hfi_for_each_subcache(device, sinfo) {
  2951. if (!strcmp("cvp", sinfo->name)) {
  2952. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2953. } else if (!strcmp("cvpfw", sinfo->name)) {
  2954. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2955. } else {
  2956. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2957. sinfo->name);
  2958. }
  2959. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2960. rc = PTR_ERR(sinfo->subcache) ?
  2961. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2962. dprintk(CVP_ERR,
  2963. "init_subcaches: invalid subcache: %s rc %d\n",
  2964. sinfo->name, rc);
  2965. sinfo->subcache = NULL;
  2966. goto err_subcache_get;
  2967. }
  2968. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2969. sinfo->name);
  2970. }
  2971. return 0;
  2972. err_subcache_get:
  2973. __deinit_subcaches(device);
  2974. return rc;
  2975. }
  2976. static int __init_resources(struct iris_hfi_device *device,
  2977. struct msm_cvp_platform_resources *res)
  2978. {
  2979. int i, rc = 0;
  2980. rc = __init_regulators(device);
  2981. if (rc) {
  2982. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2983. return -ENODEV;
  2984. }
  2985. rc = msm_cvp_init_clocks(device);
  2986. if (rc) {
  2987. dprintk(CVP_ERR, "Failed to init clocks\n");
  2988. rc = -ENODEV;
  2989. goto err_init_clocks;
  2990. }
  2991. for (i = 0; i < device->res->reset_set.count; i++) {
  2992. rc = __handle_reset_clk(res, i, INIT, 0);
  2993. if (rc) {
  2994. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2995. rc = -ENODEV;
  2996. goto err_init_reset_clk;
  2997. }
  2998. }
  2999. rc = __init_bus(device);
  3000. if (rc) {
  3001. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  3002. goto err_init_bus;
  3003. }
  3004. rc = __init_subcaches(device);
  3005. if (rc)
  3006. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  3007. device->sys_init_capabilities =
  3008. kzalloc(sizeof(struct msm_cvp_capability)
  3009. * CVP_MAX_SESSIONS, GFP_KERNEL);
  3010. return rc;
  3011. err_init_reset_clk:
  3012. err_init_bus:
  3013. msm_cvp_deinit_clocks(device);
  3014. err_init_clocks:
  3015. __deinit_regulators(device);
  3016. return rc;
  3017. }
  3018. static void __deinit_resources(struct iris_hfi_device *device)
  3019. {
  3020. __deinit_subcaches(device);
  3021. __deinit_bus(device);
  3022. msm_cvp_deinit_clocks(device);
  3023. __deinit_regulators(device);
  3024. kfree(device->sys_init_capabilities);
  3025. device->sys_init_capabilities = NULL;
  3026. }
  3027. static int __disable_regulator(struct regulator_info *rinfo,
  3028. struct iris_hfi_device *device)
  3029. {
  3030. int rc = 0;
  3031. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  3032. /*
  3033. * This call is needed. Driver needs to acquire the control back
  3034. * from HW in order to disable the regualtor. Else the behavior
  3035. * is unknown.
  3036. */
  3037. rc = __acquire_regulator(rinfo, device);
  3038. if (rc) {
  3039. /*
  3040. * This is somewhat fatal, but nothing we can do
  3041. * about it. We can't disable the regulator w/o
  3042. * getting it back under s/w control
  3043. */
  3044. dprintk(CVP_WARN,
  3045. "Failed to acquire control on %s\n",
  3046. rinfo->name);
  3047. goto disable_regulator_failed;
  3048. }
  3049. rc = regulator_disable(rinfo->regulator);
  3050. if (rc) {
  3051. dprintk(CVP_WARN,
  3052. "Failed to disable %s: %d\n",
  3053. rinfo->name, rc);
  3054. goto disable_regulator_failed;
  3055. }
  3056. return 0;
  3057. disable_regulator_failed:
  3058. /* Bring attention to this issue */
  3059. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3060. return rc;
  3061. }
  3062. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  3063. {
  3064. int rc = 0;
  3065. if (!msm_cvp_fw_low_power_mode) {
  3066. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  3067. return 0;
  3068. }
  3069. rc = __hand_off_regulators(device);
  3070. if (rc)
  3071. dprintk(CVP_WARN,
  3072. "%s : Failed to enable HW power collapse %d\n",
  3073. __func__, rc);
  3074. return rc;
  3075. }
  3076. static int __enable_regulators(struct iris_hfi_device *device)
  3077. {
  3078. int rc = 0, c = 0;
  3079. struct regulator_info *rinfo;
  3080. dprintk(CVP_PWR, "Enabling regulators\n");
  3081. iris_hfi_for_each_regulator(device, rinfo) {
  3082. rc = regulator_enable(rinfo->regulator);
  3083. if (rc) {
  3084. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3085. rinfo->name, rc);
  3086. goto err_reg_enable_failed;
  3087. }
  3088. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3089. c++;
  3090. }
  3091. return 0;
  3092. err_reg_enable_failed:
  3093. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  3094. __disable_regulator(rinfo, device);
  3095. return rc;
  3096. }
  3097. static int __disable_regulators(struct iris_hfi_device *device)
  3098. {
  3099. struct regulator_info *rinfo;
  3100. dprintk(CVP_PWR, "Disabling regulators\n");
  3101. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3102. __disable_regulator(rinfo, device);
  3103. if (rinfo->has_hw_power_collapse)
  3104. regulator_set_mode(rinfo->regulator,
  3105. REGULATOR_MODE_NORMAL);
  3106. }
  3107. return 0;
  3108. }
  3109. static int __enable_subcaches(struct iris_hfi_device *device)
  3110. {
  3111. int rc = 0;
  3112. u32 c = 0;
  3113. struct subcache_info *sinfo;
  3114. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3115. return 0;
  3116. /* Activate subcaches */
  3117. iris_hfi_for_each_subcache(device, sinfo) {
  3118. rc = llcc_slice_activate(sinfo->subcache);
  3119. if (rc) {
  3120. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3121. sinfo->name, rc);
  3122. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3123. goto err_activate_fail;
  3124. }
  3125. sinfo->isactive = true;
  3126. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3127. c++;
  3128. }
  3129. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3130. return 0;
  3131. err_activate_fail:
  3132. __release_subcaches(device);
  3133. __disable_subcaches(device);
  3134. return 0;
  3135. }
  3136. static int __set_subcaches(struct iris_hfi_device *device)
  3137. {
  3138. int rc = 0;
  3139. u32 c = 0;
  3140. struct subcache_info *sinfo;
  3141. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3142. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3143. struct cvp_hfi_resource_subcache_type *sc_res;
  3144. struct cvp_resource_hdr rhdr;
  3145. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3146. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3147. return 0;
  3148. }
  3149. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3150. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3151. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3152. iris_hfi_for_each_subcache(device, sinfo) {
  3153. if (sinfo->isactive) {
  3154. sc_res[c].size = sinfo->subcache->slice_size;
  3155. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3156. c++;
  3157. }
  3158. }
  3159. /* Set resource to CVP for activated subcaches */
  3160. if (c) {
  3161. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3162. rhdr.resource_handle = sc_res_info; /* cookie */
  3163. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3164. sc_res_info->num_entries = c;
  3165. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3166. if (rc) {
  3167. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3168. goto err_fail_set_subacaches;
  3169. }
  3170. iris_hfi_for_each_subcache(device, sinfo) {
  3171. if (sinfo->isactive)
  3172. sinfo->isset = true;
  3173. }
  3174. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3175. device->res->sys_cache_res_set = true;
  3176. }
  3177. return 0;
  3178. err_fail_set_subacaches:
  3179. __disable_subcaches(device);
  3180. return 0;
  3181. }
  3182. static int __release_subcaches(struct iris_hfi_device *device)
  3183. {
  3184. struct subcache_info *sinfo;
  3185. int rc = 0;
  3186. u32 c = 0;
  3187. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3188. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3189. struct cvp_hfi_resource_subcache_type *sc_res;
  3190. struct cvp_resource_hdr rhdr;
  3191. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3192. return 0;
  3193. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3194. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3195. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3196. /* Release resource command to Iris */
  3197. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3198. if (sinfo->isset) {
  3199. /* Update the entry */
  3200. sc_res[c].size = sinfo->subcache->slice_size;
  3201. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3202. c++;
  3203. sinfo->isset = false;
  3204. }
  3205. }
  3206. if (c > 0) {
  3207. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3208. rhdr.resource_handle = sc_res_info; /* cookie */
  3209. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3210. rc = __core_release_resource(device, &rhdr);
  3211. if (rc)
  3212. dprintk(CVP_WARN,
  3213. "Failed to release %d subcaches\n", c);
  3214. }
  3215. device->res->sys_cache_res_set = false;
  3216. return 0;
  3217. }
  3218. static int __disable_subcaches(struct iris_hfi_device *device)
  3219. {
  3220. struct subcache_info *sinfo;
  3221. int rc = 0;
  3222. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3223. return 0;
  3224. /* De-activate subcaches */
  3225. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3226. if (sinfo->isactive) {
  3227. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3228. sinfo->name);
  3229. rc = llcc_slice_deactivate(sinfo->subcache);
  3230. if (rc) {
  3231. dprintk(CVP_WARN,
  3232. "Failed to de-activate %s: %d\n",
  3233. sinfo->name, rc);
  3234. }
  3235. sinfo->isactive = false;
  3236. }
  3237. }
  3238. return 0;
  3239. }
  3240. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3241. {
  3242. u32 mask_val = 0;
  3243. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3244. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3245. /* Write 0 to unmask CPU and WD interrupts */
  3246. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3247. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3248. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3249. CVP_WRAPPER_INTR_MASK, mask_val);
  3250. }
  3251. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3252. {
  3253. /* initialize DSP QTBL & UCREGION with CPU queues */
  3254. __write_register(device, HFI_DSP_QTBL_ADDR,
  3255. (u32)device->dsp_iface_q_table.align_device_addr);
  3256. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3257. (u32)device->dsp_iface_q_table.align_device_addr);
  3258. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3259. device->dsp_iface_q_table.mem_data.size);
  3260. }
  3261. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3262. {
  3263. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3264. }
  3265. static int __set_ubwc_config(struct iris_hfi_device *device)
  3266. {
  3267. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3268. int rc = 0;
  3269. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3270. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3271. if (!device->res->ubwc_config)
  3272. return 0;
  3273. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3274. device->res->ubwc_config);
  3275. if (rc) {
  3276. dprintk(CVP_WARN,
  3277. "ubwc config setting to FW failed\n");
  3278. rc = -ENOTEMPTY;
  3279. goto fail_to_set_ubwc_config;
  3280. }
  3281. if (__iface_cmdq_write(device, pkt)) {
  3282. rc = -ENOTEMPTY;
  3283. goto fail_to_set_ubwc_config;
  3284. }
  3285. fail_to_set_ubwc_config:
  3286. return rc;
  3287. }
  3288. static int __iris_power_on(struct iris_hfi_device *device)
  3289. {
  3290. int rc = 0;
  3291. if (device->power_enabled)
  3292. return 0;
  3293. /* Vote for all hardware resources */
  3294. rc = __vote_buses(device, device->bus_vote.data,
  3295. device->bus_vote.data_count);
  3296. if (rc) {
  3297. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3298. goto fail_vote_buses;
  3299. }
  3300. rc = __enable_regulators(device);
  3301. if (rc) {
  3302. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3303. goto fail_enable_gdsc;
  3304. }
  3305. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3306. if (rc) {
  3307. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3308. goto fail_enable_clks;
  3309. }
  3310. rc = msm_cvp_prepare_enable_clks(device);
  3311. if (rc) {
  3312. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3313. goto fail_enable_clks;
  3314. }
  3315. rc = msm_cvp_scale_clocks(device);
  3316. if (rc) {
  3317. dprintk(CVP_WARN,
  3318. "Failed to scale clocks, perf may regress\n");
  3319. rc = 0;
  3320. }
  3321. /*Do not access registers before this point!*/
  3322. device->power_enabled = true;
  3323. dprintk(CVP_PWR, "Done with scaling\n");
  3324. /*
  3325. * Re-program all of the registers that get reset as a result of
  3326. * regulator_disable() and _enable()
  3327. */
  3328. __set_registers(device);
  3329. dprintk(CVP_CORE, "Done with register set\n");
  3330. call_iris_op(device, interrupt_init, device);
  3331. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3332. device->intr_status = 0;
  3333. enable_irq(device->cvp_hal_data->irq);
  3334. return rc;
  3335. fail_enable_clks:
  3336. __disable_regulators(device);
  3337. fail_enable_gdsc:
  3338. __unvote_buses(device);
  3339. fail_vote_buses:
  3340. device->power_enabled = false;
  3341. return rc;
  3342. }
  3343. void power_off_common(struct iris_hfi_device *device)
  3344. {
  3345. if (!device->power_enabled)
  3346. return;
  3347. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3348. disable_irq_nosync(device->cvp_hal_data->irq);
  3349. device->intr_status = 0;
  3350. msm_cvp_disable_unprepare_clks(device);
  3351. if (__disable_regulators(device))
  3352. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3353. if (__unvote_buses(device))
  3354. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3355. device->power_enabled = false;
  3356. }
  3357. static inline int __suspend(struct iris_hfi_device *device)
  3358. {
  3359. int rc = 0;
  3360. if (!device) {
  3361. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3362. return -EINVAL;
  3363. } else if (!device->power_enabled) {
  3364. dprintk(CVP_PWR, "Power already disabled\n");
  3365. return 0;
  3366. }
  3367. dprintk(CVP_PWR, "Entering suspend\n");
  3368. if (device->res->pm_qos_latency_us &&
  3369. cpu_latency_qos_request_active(&device->qos))
  3370. cpu_latency_qos_remove_request(&device->qos);
  3371. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3372. if (rc) {
  3373. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3374. goto err_tzbsp_suspend;
  3375. }
  3376. __disable_subcaches(device);
  3377. call_iris_op(device, power_off, device);
  3378. dprintk(CVP_PWR, "Iris power off\n");
  3379. return rc;
  3380. err_tzbsp_suspend:
  3381. return rc;
  3382. }
  3383. static void power_off_iris2(struct iris_hfi_device *device)
  3384. {
  3385. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3386. u32 pc_ready, wfi_status, sbm_ln0_low;
  3387. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3388. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3389. return;
  3390. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3391. disable_irq_nosync(device->cvp_hal_data->irq);
  3392. device->intr_status = 0;
  3393. /* HPG 6.1.2 Step 1 */
  3394. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3395. /* HPG 6.1.2 Step 2, noc to low power */
  3396. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3397. while (!reg_status && count < max_count) {
  3398. lpi_status =
  3399. __read_register(device,
  3400. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3401. reg_status = lpi_status & BIT(0);
  3402. /* Wait for noc lpi status to be set */
  3403. usleep_range(50, 100);
  3404. count++;
  3405. }
  3406. dprintk(CVP_PWR,
  3407. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3408. lpi_status, reg_status, count);
  3409. if (count == max_count) {
  3410. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3411. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3412. sbm_ln0_low =
  3413. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3414. main_sbm_ln0_low = __read_register(device,
  3415. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3416. main_sbm_ln1_high = __read_register(device,
  3417. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3418. dprintk(CVP_WARN,
  3419. "NOC not in qaccept status %x %x %x %x %x %x %x\n",
  3420. reg_status, lpi_status, wfi_status, pc_ready,
  3421. sbm_ln0_low, main_sbm_ln0_low, main_sbm_ln1_high);
  3422. }
  3423. /* HPG 6.1.2 Step 3, debug bridge to low power BYPASSED */
  3424. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3425. __write_register(device,
  3426. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3427. lpi_status = 0x1;
  3428. count = 0;
  3429. while (lpi_status && count < max_count) {
  3430. lpi_status = __read_register(device,
  3431. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3432. usleep_range(50, 100);
  3433. count++;
  3434. }
  3435. dprintk(CVP_PWR,
  3436. "DBLP Release: lpi_status %d(count %d)\n",
  3437. lpi_status, count);
  3438. if (count == max_count) {
  3439. dprintk(CVP_WARN,
  3440. "DBLP Release: lpi_status %x\n", lpi_status);
  3441. }
  3442. /* HPG 6.1.2 Step 6 */
  3443. msm_cvp_disable_unprepare_clks(device);
  3444. /*
  3445. * HPG 6.1.2 Step 7 & 8
  3446. * per new HPG update, core clock reset will be unnecessary
  3447. */
  3448. if (__unvote_buses(device))
  3449. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3450. /* HPG 6.1.2 Step 5 */
  3451. if (__disable_regulators(device))
  3452. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3453. /*Do not access registers after this point!*/
  3454. device->power_enabled = false;
  3455. }
  3456. static inline int __resume(struct iris_hfi_device *device)
  3457. {
  3458. int rc = 0;
  3459. u32 flags = 0, reg_gdsc, reg_cbcr;
  3460. if (!device) {
  3461. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3462. return -EINVAL;
  3463. } else if (device->power_enabled) {
  3464. goto exit;
  3465. } else if (!__core_in_valid_state(device)) {
  3466. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3467. return -EINVAL;
  3468. }
  3469. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3470. rc = __iris_power_on(device);
  3471. if (rc) {
  3472. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3473. goto err_iris_power_on;
  3474. }
  3475. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3476. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3477. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3478. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3479. reg_gdsc, reg_cbcr);
  3480. /* Reboot the firmware */
  3481. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3482. if (rc) {
  3483. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3484. goto err_set_cvp_state;
  3485. }
  3486. __setup_ucregion_memory_map(device);
  3487. /* Wait for boot completion */
  3488. rc = __boot_firmware(device);
  3489. if (rc) {
  3490. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3491. goto err_reset_core;
  3492. }
  3493. /*
  3494. * Work around for H/W bug, need to reprogram these registers once
  3495. * firmware is out reset
  3496. */
  3497. __set_threshold_registers(device);
  3498. if (device->res->pm_qos_latency_us)
  3499. cpu_latency_qos_add_request(&device->qos,
  3500. device->res->pm_qos_latency_us);
  3501. __sys_set_debug(device, msm_cvp_fw_debug);
  3502. __enable_subcaches(device);
  3503. __set_subcaches(device);
  3504. __dsp_resume(device, flags);
  3505. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3506. exit:
  3507. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3508. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3509. device->skip_pc_count = 0;
  3510. return rc;
  3511. err_reset_core:
  3512. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3513. err_set_cvp_state:
  3514. call_iris_op(device, power_off, device);
  3515. err_iris_power_on:
  3516. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3517. return rc;
  3518. }
  3519. static int __load_fw(struct iris_hfi_device *device)
  3520. {
  3521. int rc = 0;
  3522. /* Initialize resources */
  3523. rc = __init_resources(device, device->res);
  3524. if (rc) {
  3525. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3526. goto fail_init_res;
  3527. }
  3528. rc = __initialize_packetization(device);
  3529. if (rc) {
  3530. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3531. goto fail_init_pkt;
  3532. }
  3533. rc = __iris_power_on(device);
  3534. if (rc) {
  3535. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3536. goto fail_iris_power_on;
  3537. }
  3538. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3539. || device->res->use_non_secure_pil) {
  3540. rc = load_cvp_fw_impl(device);
  3541. if (rc)
  3542. goto fail_load_fw;
  3543. }
  3544. return rc;
  3545. fail_load_fw:
  3546. call_iris_op(device, power_off, device);
  3547. fail_iris_power_on:
  3548. fail_init_pkt:
  3549. __deinit_resources(device);
  3550. fail_init_res:
  3551. return rc;
  3552. }
  3553. static void __unload_fw(struct iris_hfi_device *device)
  3554. {
  3555. if (!device->resources.fw.cookie)
  3556. return;
  3557. cancel_delayed_work(&iris_hfi_pm_work);
  3558. if (device->state != IRIS_STATE_DEINIT)
  3559. flush_workqueue(device->iris_pm_workq);
  3560. unload_cvp_fw_impl(device);
  3561. __interface_queues_release(device);
  3562. call_iris_op(device, power_off, device);
  3563. __deinit_resources(device);
  3564. dprintk(CVP_WARN, "Firmware unloaded\n");
  3565. }
  3566. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3567. {
  3568. int i = 0;
  3569. struct iris_hfi_device *device = dev;
  3570. if (!device || !fw_info) {
  3571. dprintk(CVP_ERR,
  3572. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3573. __func__, device, fw_info);
  3574. return -EINVAL;
  3575. }
  3576. mutex_lock(&device->lock);
  3577. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3578. ;
  3579. if (i == CVP_VERSION_LENGTH - 1) {
  3580. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3581. fw_info->version[0] = '\0';
  3582. goto fail_version_string;
  3583. }
  3584. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3585. CVP_VERSION_LENGTH);
  3586. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3587. fail_version_string:
  3588. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3589. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3590. fw_info->register_base = device->res->register_base;
  3591. fw_info->register_size = device->cvp_hal_data->register_size;
  3592. fw_info->irq = device->cvp_hal_data->irq;
  3593. mutex_unlock(&device->lock);
  3594. return 0;
  3595. }
  3596. static int iris_hfi_get_core_capabilities(void *dev)
  3597. {
  3598. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3599. return 0;
  3600. }
  3601. static u32 cvp_arp_test_regs[16];
  3602. static u32 cvp_dma_test_regs[512];
  3603. static const char * const mid_names[16] = {
  3604. "CVP_FW",
  3605. "ARP_DATA",
  3606. "CVP_OD_NON_PIXEL",
  3607. "CVP_OD_ORIG_PIXEL",
  3608. "CVP_OD_WR_PIXEL",
  3609. "CVP_MPU_ORIG_PIXEL",
  3610. "CVP_MPU_REF_PIXEL",
  3611. "CVP_MPU_NON_PIXEL",
  3612. "CVP_MPU_DFS",
  3613. "CVP_FDU_NON_PIXEL",
  3614. "CVP_FDU_PIXEL",
  3615. "CVP_ICA_PIXEL",
  3616. "Invalid",
  3617. "Invalid",
  3618. "Invalid",
  3619. "Invalid"
  3620. };
  3621. static void __print_reg_details(u32 val)
  3622. {
  3623. u32 mid, sid;
  3624. mid = (val >> 5) & 0xF;
  3625. sid = (val >> 2) & 0x7;
  3626. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3627. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3628. }
  3629. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3630. {
  3631. u32 val = 0, regi, i;
  3632. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3633. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3634. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3635. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3636. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3637. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3638. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3639. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3640. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3641. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3642. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3643. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3644. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3645. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3646. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3647. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3648. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3649. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3650. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3651. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3652. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3653. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3654. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3655. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3656. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3657. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3658. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3659. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3660. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3661. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3662. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3663. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3664. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3665. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3666. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3667. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3668. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3669. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3670. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3671. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3672. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3673. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3674. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3675. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3676. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3677. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3678. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3679. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3680. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3681. __print_reg_details(val);
  3682. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3683. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3684. #define CVP_SS_CLK_HALT 0x8
  3685. #define CVP_SS_CLK_EN 0xC
  3686. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3687. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3688. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3689. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3690. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3691. __write_register(device, CVP_SS_CLK_HALT, 0);
  3692. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3693. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3694. for (i = 0; i < 15; i++) {
  3695. regi = 0xC0000000 + i;
  3696. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3697. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3698. cvp_arp_test_regs[i] = val;
  3699. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3700. }
  3701. for (i = 0; i < 512; i++) {
  3702. regi = 0x40000000 + i;
  3703. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3704. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3705. cvp_dma_test_regs[i] = val;
  3706. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3707. }
  3708. }
  3709. static int iris_hfi_noc_error_info(void *dev)
  3710. {
  3711. struct iris_hfi_device *device;
  3712. if (!dev) {
  3713. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3714. return -EINVAL;
  3715. }
  3716. device = dev;
  3717. mutex_lock(&device->lock);
  3718. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3719. call_iris_op(device, noc_error_info, device);
  3720. mutex_unlock(&device->lock);
  3721. return 0;
  3722. }
  3723. static int __initialize_packetization(struct iris_hfi_device *device)
  3724. {
  3725. int rc = 0;
  3726. if (!device || !device->res) {
  3727. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3728. return -EINVAL;
  3729. }
  3730. device->packetization_type = HFI_PACKETIZATION_4XX;
  3731. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3732. device->packetization_type);
  3733. if (!device->pkt_ops) {
  3734. rc = -EINVAL;
  3735. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3736. }
  3737. return rc;
  3738. }
  3739. void __init_cvp_ops(struct iris_hfi_device *device)
  3740. {
  3741. device->vpu_ops = &iris2_ops;
  3742. }
  3743. static struct iris_hfi_device *__add_device(u32 device_id,
  3744. struct msm_cvp_platform_resources *res,
  3745. hfi_cmd_response_callback callback)
  3746. {
  3747. struct iris_hfi_device *hdevice = NULL;
  3748. int rc = 0;
  3749. if (!res || !callback) {
  3750. dprintk(CVP_ERR, "Invalid Parameters\n");
  3751. return NULL;
  3752. }
  3753. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3754. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3755. if (!hdevice) {
  3756. dprintk(CVP_ERR, "failed to allocate new device\n");
  3757. goto exit;
  3758. }
  3759. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3760. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3761. if (!hdevice->response_pkt) {
  3762. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3763. goto err_cleanup;
  3764. }
  3765. hdevice->raw_packet =
  3766. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3767. if (!hdevice->raw_packet) {
  3768. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3769. goto err_cleanup;
  3770. }
  3771. rc = __init_regs_and_interrupts(hdevice, res);
  3772. if (rc)
  3773. goto err_cleanup;
  3774. hdevice->res = res;
  3775. hdevice->device_id = device_id;
  3776. hdevice->callback = callback;
  3777. __init_cvp_ops(hdevice);
  3778. hdevice->cvp_workq = create_singlethread_workqueue(
  3779. "msm_cvp_workerq_iris");
  3780. if (!hdevice->cvp_workq) {
  3781. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3782. goto err_cleanup;
  3783. }
  3784. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3785. "pm_workerq_iris");
  3786. if (!hdevice->iris_pm_workq) {
  3787. dprintk(CVP_ERR, ": create pm workq failed\n");
  3788. goto err_cleanup;
  3789. }
  3790. mutex_init(&hdevice->lock);
  3791. INIT_LIST_HEAD(&hdevice->sess_head);
  3792. return hdevice;
  3793. err_cleanup:
  3794. if (hdevice->iris_pm_workq)
  3795. destroy_workqueue(hdevice->iris_pm_workq);
  3796. if (hdevice->cvp_workq)
  3797. destroy_workqueue(hdevice->cvp_workq);
  3798. kfree(hdevice->response_pkt);
  3799. kfree(hdevice->raw_packet);
  3800. kfree(hdevice);
  3801. exit:
  3802. return NULL;
  3803. }
  3804. static struct iris_hfi_device *__get_device(u32 device_id,
  3805. struct msm_cvp_platform_resources *res,
  3806. hfi_cmd_response_callback callback)
  3807. {
  3808. if (!res || !callback) {
  3809. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3810. return NULL;
  3811. }
  3812. return __add_device(device_id, res, callback);
  3813. }
  3814. void cvp_iris_hfi_delete_device(void *device)
  3815. {
  3816. struct msm_cvp_core *core;
  3817. struct iris_hfi_device *dev = NULL;
  3818. if (!device)
  3819. return;
  3820. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3821. if (core)
  3822. dev = core->device->hfi_device_data;
  3823. if (!dev)
  3824. return;
  3825. mutex_destroy(&dev->lock);
  3826. destroy_workqueue(dev->cvp_workq);
  3827. destroy_workqueue(dev->iris_pm_workq);
  3828. free_irq(dev->cvp_hal_data->irq, dev);
  3829. iounmap(dev->cvp_hal_data->register_base);
  3830. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3831. kfree(dev->cvp_hal_data);
  3832. kfree(dev->response_pkt);
  3833. kfree(dev->raw_packet);
  3834. kfree(dev);
  3835. }
  3836. static int iris_hfi_validate_session(void *sess, const char *func)
  3837. {
  3838. struct cvp_hal_session *session = sess;
  3839. int rc = 0;
  3840. struct iris_hfi_device *device;
  3841. if (!session || !session->device) {
  3842. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3843. return -EINVAL;
  3844. }
  3845. device = session->device;
  3846. mutex_lock(&device->lock);
  3847. if (!__is_session_valid(device, session, func))
  3848. rc = -ECONNRESET;
  3849. mutex_unlock(&device->lock);
  3850. return rc;
  3851. }
  3852. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3853. {
  3854. hdev->core_init = iris_hfi_core_init;
  3855. hdev->core_release = iris_hfi_core_release;
  3856. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3857. hdev->session_init = iris_hfi_session_init;
  3858. hdev->session_end = iris_hfi_session_end;
  3859. hdev->session_abort = iris_hfi_session_abort;
  3860. hdev->session_clean = iris_hfi_session_clean;
  3861. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3862. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3863. hdev->session_send = iris_hfi_session_send;
  3864. hdev->session_flush = iris_hfi_session_flush;
  3865. hdev->scale_clocks = iris_hfi_scale_clocks;
  3866. hdev->vote_bus = iris_hfi_vote_buses;
  3867. hdev->get_fw_info = iris_hfi_get_fw_info;
  3868. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3869. hdev->suspend = iris_hfi_suspend;
  3870. hdev->resume = iris_hfi_resume;
  3871. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3872. hdev->noc_error_info = iris_hfi_noc_error_info;
  3873. hdev->validate_session = iris_hfi_validate_session;
  3874. }
  3875. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3876. struct msm_cvp_platform_resources *res,
  3877. hfi_cmd_response_callback callback)
  3878. {
  3879. int rc = 0;
  3880. if (!hdev || !res || !callback) {
  3881. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3882. hdev, res, callback);
  3883. rc = -EINVAL;
  3884. goto err_iris_hfi_init;
  3885. }
  3886. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3887. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3888. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3889. goto err_iris_hfi_init;
  3890. }
  3891. iris_init_hfi_callbacks(hdev);
  3892. err_iris_hfi_init:
  3893. return rc;
  3894. }