q6core.c 57 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of_device.h>
  9. #include <linux/string.h>
  10. #include <linux/types.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/mutex.h>
  13. #include <linux/sched.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/kobject.h>
  17. #include <linux/delay.h>
  18. #include <dsp/q6core.h>
  19. #include <dsp/audio_cal_utils.h>
  20. #include <dsp/apr_audio-v2.h>
  21. #include <soc/snd_event.h>
  22. #include <ipc/apr.h>
  23. #include "adsp_err.h"
  24. #define TIMEOUT_MS 1000
  25. /*
  26. * AVS bring up in the modem is optimized for the new
  27. * Sub System Restart design and 100 milliseconds timeout
  28. * is sufficient to make sure the Q6 will be ready.
  29. */
  30. #define Q6_READY_TIMEOUT_MS 100
  31. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  32. #define APR_ENOTREADY 10
  33. #define MEMPOOL_ID_MASK 0xFF
  34. #define MDF_MAP_TOKEN 0xF000
  35. enum {
  36. META_CAL,
  37. CUST_TOP_CAL,
  38. CORE_MAX_CAL
  39. };
  40. enum ver_query_status {
  41. VER_QUERY_UNATTEMPTED,
  42. VER_QUERY_UNSUPPORTED,
  43. VER_QUERY_SUPPORTED
  44. };
  45. struct q6core_avcs_ver_info {
  46. enum ver_query_status status;
  47. struct avcs_fwk_ver_info *ver_info;
  48. };
  49. struct q6core_str {
  50. struct apr_svc *core_handle_q;
  51. wait_queue_head_t bus_bw_req_wait;
  52. wait_queue_head_t mdf_map_resp_wait;
  53. wait_queue_head_t cmd_req_wait;
  54. wait_queue_head_t avcs_fwk_ver_req_wait;
  55. wait_queue_head_t lpass_npa_rsc_wait;
  56. wait_queue_head_t avcs_module_load_unload_wait;
  57. u32 lpass_npa_rsc_rsp_rcvd;
  58. u32 bus_bw_resp_received;
  59. u32 mdf_map_resp_received;
  60. u32 avcs_module_resp_received;
  61. enum cmd_flags {
  62. FLAG_NONE,
  63. FLAG_CMDRSP_LICENSE_RESULT
  64. } cmd_resp_received_flag;
  65. u32 avcs_fwk_ver_resp_received;
  66. struct mutex cmd_lock;
  67. struct mutex ver_lock;
  68. union {
  69. struct avcs_cmdrsp_get_license_validation_result
  70. cmdrsp_license_result;
  71. } cmd_resp_payload;
  72. u32 param;
  73. struct cal_type_data *cal_data[CORE_MAX_CAL];
  74. uint32_t mem_map_cal_handle;
  75. uint32_t mdf_mem_map_cal_handle;
  76. uint32_t npa_client_handle;
  77. int32_t adsp_status;
  78. int32_t avs_state;
  79. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  80. };
  81. static struct q6core_str q6core_lcl;
  82. /* Global payload used for AVCS_CMD_RSP_MODULES command */
  83. static struct avcs_load_unload_modules_payload *rsp_payload;
  84. struct generic_get_data_ {
  85. int valid;
  86. int size_in_ints;
  87. int ints[];
  88. };
  89. static struct generic_get_data_ *generic_get_data;
  90. static DEFINE_MUTEX(kset_lock);
  91. static struct kset *audio_uevent_kset;
  92. static int q6core_init_uevent_kset(void)
  93. {
  94. int ret = 0;
  95. mutex_lock(&kset_lock);
  96. if (audio_uevent_kset)
  97. goto done;
  98. /* Create a kset under /sys/kernel/ */
  99. audio_uevent_kset = kset_create_and_add("q6audio", NULL, kernel_kobj);
  100. if (!audio_uevent_kset) {
  101. pr_err("%s: error creating uevent kernel set", __func__);
  102. ret = -EINVAL;
  103. }
  104. done:
  105. mutex_unlock(&kset_lock);
  106. return ret;
  107. }
  108. static void q6core_destroy_uevent_kset(void)
  109. {
  110. if (audio_uevent_kset) {
  111. kset_unregister(audio_uevent_kset);
  112. audio_uevent_kset = NULL;
  113. }
  114. }
  115. /**
  116. * q6core_init_uevent_data - initialize kernel object required to send uevents.
  117. *
  118. * @uevent_data: uevent data (dynamically allocated memory).
  119. * @name: name of the kernel object.
  120. *
  121. * Returns 0 on success or error otherwise.
  122. */
  123. int q6core_init_uevent_data(struct audio_uevent_data *uevent_data, char *name)
  124. {
  125. int ret = -EINVAL;
  126. if (!uevent_data || !name)
  127. return ret;
  128. ret = q6core_init_uevent_kset();
  129. if (ret)
  130. return ret;
  131. /* Set kset for kobject before initializing the kobject */
  132. uevent_data->kobj.kset = audio_uevent_kset;
  133. /* Initialize kobject and add it to kernel */
  134. ret = kobject_init_and_add(&uevent_data->kobj, &uevent_data->ktype,
  135. NULL, "%s", name);
  136. if (ret) {
  137. pr_err("%s: error initializing uevent kernel object: %d",
  138. __func__, ret);
  139. kobject_put(&uevent_data->kobj);
  140. return ret;
  141. }
  142. /* Send kobject add event to the system */
  143. kobject_uevent(&uevent_data->kobj, KOBJ_ADD);
  144. return ret;
  145. }
  146. EXPORT_SYMBOL(q6core_init_uevent_data);
  147. /**
  148. * q6core_destroy_uevent_data - destroy kernel object.
  149. *
  150. * @uevent_data: uevent data.
  151. */
  152. void q6core_destroy_uevent_data(struct audio_uevent_data *uevent_data)
  153. {
  154. if (uevent_data)
  155. kobject_put(&uevent_data->kobj);
  156. }
  157. EXPORT_SYMBOL(q6core_destroy_uevent_data);
  158. /**
  159. * q6core_send_uevent - send uevent to userspace.
  160. *
  161. * @uevent_data: uevent data.
  162. * @event: event to send.
  163. *
  164. * Returns 0 on success or error otherwise.
  165. */
  166. int q6core_send_uevent(struct audio_uevent_data *uevent_data, char *event)
  167. {
  168. char *env[] = { event, NULL };
  169. if (!event || !uevent_data)
  170. return -EINVAL;
  171. return kobject_uevent_env(&uevent_data->kobj, KOBJ_CHANGE, env);
  172. }
  173. EXPORT_SYMBOL(q6core_send_uevent);
  174. static int parse_fwk_version_info(uint32_t *payload, uint16_t payload_size)
  175. {
  176. size_t ver_size;
  177. int num_services;
  178. pr_debug("%s: Payload info num services %d\n",
  179. __func__, payload[4]);
  180. /*
  181. * payload1[4] is the number of services running on DSP
  182. * Based on this info, we copy the payload into core
  183. * avcs version info structure.
  184. */
  185. if (payload_size < 5 * sizeof(uint32_t)) {
  186. pr_err("%s: payload has invalid size %d\n",
  187. __func__, payload_size);
  188. return -EINVAL;
  189. }
  190. num_services = payload[4];
  191. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  192. pr_err("%s: num_services: %d greater than max services: %d\n",
  193. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  194. return -EINVAL;
  195. }
  196. /*
  197. * Dynamically allocate memory for all
  198. * the services based on num_services
  199. */
  200. ver_size = sizeof(struct avcs_get_fwk_version) +
  201. num_services * sizeof(struct avs_svc_api_info);
  202. if (payload_size < ver_size) {
  203. pr_err("%s: payload has invalid size %d, expected size %zu\n",
  204. __func__, payload_size, ver_size);
  205. return -EINVAL;
  206. }
  207. q6core_lcl.q6core_avcs_ver_info.ver_info =
  208. kzalloc(ver_size, GFP_ATOMIC);
  209. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  210. return -ENOMEM;
  211. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  212. ver_size);
  213. return 0;
  214. }
  215. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  216. {
  217. uint32_t *payload1;
  218. int ret = 0;
  219. if (data == NULL) {
  220. pr_err("%s: data argument is null\n", __func__);
  221. return -EINVAL;
  222. }
  223. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  224. __func__,
  225. data->payload_size, data->opcode);
  226. switch (data->opcode) {
  227. case APR_BASIC_RSP_RESULT:{
  228. if (data->payload_size == 0) {
  229. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  230. __func__);
  231. return 0;
  232. }
  233. payload1 = data->payload;
  234. if (data->payload_size < 2 * sizeof(uint32_t)) {
  235. pr_err("%s: payload has invalid size %d\n",
  236. __func__, data->payload_size);
  237. return -EINVAL;
  238. }
  239. switch (payload1[0]) {
  240. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  241. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  242. __func__, payload1[1]);
  243. /* -ADSP status to match Linux error standard */
  244. q6core_lcl.adsp_status = -payload1[1];
  245. q6core_lcl.bus_bw_resp_received = 1;
  246. wake_up(&q6core_lcl.bus_bw_req_wait);
  247. break;
  248. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  249. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  250. __func__, payload1[1]);
  251. /* -ADSP status to match Linux error standard */
  252. q6core_lcl.adsp_status = -payload1[1];
  253. q6core_lcl.bus_bw_resp_received = 1;
  254. wake_up(&q6core_lcl.bus_bw_req_wait);
  255. break;
  256. case AVCS_CMD_MAP_MDF_SHARED_MEMORY:
  257. pr_debug("%s: Cmd = AVCS_CMD_MAP_MDF_SHARED_MEMORY status[0x%x]\n",
  258. __func__, payload1[1]);
  259. /* -ADSP status to match Linux error standard */
  260. q6core_lcl.adsp_status = -payload1[1];
  261. q6core_lcl.bus_bw_resp_received = 1;
  262. wake_up(&q6core_lcl.bus_bw_req_wait);
  263. break;
  264. case AVCS_CMD_REGISTER_TOPOLOGIES:
  265. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  266. __func__, payload1[1]);
  267. /* -ADSP status to match Linux error standard */
  268. q6core_lcl.adsp_status = -payload1[1];
  269. q6core_lcl.bus_bw_resp_received = 1;
  270. wake_up(&q6core_lcl.bus_bw_req_wait);
  271. break;
  272. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  273. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  274. __func__, payload1[1]);
  275. q6core_lcl.bus_bw_resp_received = 1;
  276. wake_up(&q6core_lcl.bus_bw_req_wait);
  277. break;
  278. case AVCS_CMD_GET_FWK_VERSION:
  279. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  280. __func__, adsp_err_get_err_str(payload1[1]));
  281. /* ADSP status to match Linux error standard */
  282. q6core_lcl.adsp_status = -payload1[1];
  283. if (payload1[1] == ADSP_EUNSUPPORTED)
  284. q6core_lcl.q6core_avcs_ver_info.status =
  285. VER_QUERY_UNSUPPORTED;
  286. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  287. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  288. break;
  289. case AVCS_CMD_LOAD_TOPO_MODULES:
  290. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  291. pr_debug("%s: Cmd = %s status[%s]\n",
  292. __func__,
  293. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  294. "AVCS_CMD_LOAD_TOPO_MODULES" :
  295. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  296. adsp_err_get_err_str(payload1[1]));
  297. break;
  298. case AVCS_CMD_DESTROY_LPASS_NPA_CLIENT:
  299. case AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES:
  300. pr_debug("%s: Cmd = AVCS_CMD_CREATE_LPASS_NPA_CLIENT/AVCS_CMD_DESTROY_LPASS_NPA_CLIENT status[%s]\n",
  301. __func__, adsp_err_get_err_str(payload1[1]));
  302. /* ADSP status to match Linux error standard */
  303. q6core_lcl.adsp_status = -payload1[1];
  304. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  305. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  306. break;
  307. case AVCS_CMD_LOAD_MODULES:
  308. pr_err("%s: Cmd = %s failed status[%s]\n",
  309. __func__, "AVCS_CMD_LOAD__MODULES",
  310. adsp_err_get_err_str(payload1[1]));
  311. q6core_lcl.avcs_module_resp_received = 1;
  312. q6core_lcl.adsp_status = -payload1[1];
  313. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  314. break;
  315. case AVCS_CMD_UNLOAD_MODULES:
  316. if (payload1[1] == ADSP_EOK) {
  317. pr_debug("%s: Cmd = %s success status[%s]\n",
  318. __func__, "AVCS_CMD_UNLOAD_MODULES",
  319. "ADSP_EOK");
  320. } else {
  321. pr_err("%s: Cmd = %s failed status[%s]\n",
  322. __func__, "AVCS_CMD_UNLOAD_MODULES",
  323. adsp_err_get_err_str(payload1[1]));
  324. q6core_lcl.adsp_status = -payload1[1];
  325. }
  326. q6core_lcl.avcs_module_resp_received = 1;
  327. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  328. break;
  329. default:
  330. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  331. __func__,
  332. payload1[0], payload1[1], data->opcode);
  333. break;
  334. }
  335. break;
  336. }
  337. case RESET_EVENTS:{
  338. pr_debug("%s: Reset event received in Core service\n",
  339. __func__);
  340. /*
  341. * no reset for q6core_avcs_ver_info done as
  342. * the data will not change after SSR
  343. */
  344. apr_reset(q6core_lcl.core_handle_q);
  345. q6core_lcl.core_handle_q = NULL;
  346. break;
  347. }
  348. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  349. if (data->payload_size < sizeof(uint32_t)) {
  350. pr_err("%s: payload has invalid size %d\n",
  351. __func__, data->payload_size);
  352. return -EINVAL;
  353. }
  354. payload1 = data->payload;
  355. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  356. __func__, payload1[0]);
  357. if (data->token == MDF_MAP_TOKEN) {
  358. q6core_lcl.mdf_mem_map_cal_handle = payload1[0];
  359. q6core_lcl.mdf_map_resp_received = 1;
  360. wake_up(&q6core_lcl.mdf_map_resp_wait);
  361. } else {
  362. q6core_lcl.mem_map_cal_handle = payload1[0];
  363. q6core_lcl.bus_bw_resp_received = 1;
  364. wake_up(&q6core_lcl.bus_bw_req_wait);
  365. }
  366. break;
  367. case AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT:
  368. if (data->payload_size < 2 * sizeof(uint32_t)) {
  369. pr_err("%s: payload has invalid size %d\n",
  370. __func__, data->payload_size);
  371. return -EINVAL;
  372. }
  373. payload1 = data->payload;
  374. pr_debug("%s: AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT handle %d\n",
  375. __func__, payload1[1]);
  376. q6core_lcl.adsp_status = payload1[0];
  377. q6core_lcl.npa_client_handle = payload1[1];
  378. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  379. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  380. break;
  381. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  382. if (data->payload_size < sizeof(uint32_t)) {
  383. pr_err("%s: payload has invalid size %d\n",
  384. __func__, data->payload_size);
  385. return -EINVAL;
  386. }
  387. payload1 = data->payload;
  388. q6core_lcl.param = payload1[0];
  389. pr_debug("%s: Received ADSP get state response 0x%x\n",
  390. __func__, q6core_lcl.param);
  391. /* ensure .param is updated prior to .bus_bw_resp_received */
  392. wmb();
  393. q6core_lcl.bus_bw_resp_received = 1;
  394. wake_up(&q6core_lcl.bus_bw_req_wait);
  395. break;
  396. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  397. if (data->payload_size < sizeof(uint32_t)) {
  398. pr_err("%s: payload has invalid size %d\n",
  399. __func__, data->payload_size);
  400. return -EINVAL;
  401. }
  402. payload1 = data->payload;
  403. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  404. __func__, payload1[0]);
  405. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  406. = payload1[0];
  407. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  408. wake_up(&q6core_lcl.cmd_req_wait);
  409. break;
  410. case AVCS_CMDRSP_GET_FWK_VERSION:
  411. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  412. __func__);
  413. payload1 = data->payload;
  414. ret = parse_fwk_version_info(payload1, data->payload_size);
  415. if (ret < 0) {
  416. q6core_lcl.adsp_status = ret;
  417. pr_err("%s: Failed to parse payload:%d\n",
  418. __func__, ret);
  419. } else {
  420. q6core_lcl.q6core_avcs_ver_info.status =
  421. VER_QUERY_SUPPORTED;
  422. }
  423. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  424. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  425. break;
  426. case AVCS_CMD_RSP_LOAD_MODULES:
  427. pr_debug("%s: Received AVCS_CMD_RSP_LOAD_MODULES\n",
  428. __func__);
  429. memcpy(rsp_payload, data->payload, data->payload_size);
  430. q6core_lcl.avcs_module_resp_received = 1;
  431. wake_up(&q6core_lcl.avcs_module_load_unload_wait);
  432. break;
  433. default:
  434. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  435. __func__, data->opcode);
  436. if (generic_get_data) {
  437. generic_get_data->valid = 1;
  438. generic_get_data->size_in_ints =
  439. data->payload_size/sizeof(int);
  440. pr_debug("callback size = %i\n",
  441. data->payload_size);
  442. memcpy(generic_get_data->ints, data->payload,
  443. data->payload_size);
  444. q6core_lcl.bus_bw_resp_received = 1;
  445. wake_up(&q6core_lcl.bus_bw_req_wait);
  446. break;
  447. }
  448. break;
  449. }
  450. return 0;
  451. }
  452. void ocm_core_open(void)
  453. {
  454. if (q6core_lcl.core_handle_q == NULL)
  455. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  456. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  457. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  458. if (q6core_lcl.core_handle_q == NULL)
  459. pr_err_ratelimited("%s: Unable to register CORE\n", __func__);
  460. }
  461. struct cal_block_data *cal_utils_get_cal_block_by_key(
  462. struct cal_type_data *cal_type, uint32_t key)
  463. {
  464. struct list_head *ptr, *next;
  465. struct cal_block_data *cal_block = NULL;
  466. struct audio_cal_info_metainfo *metainfo;
  467. list_for_each_safe(ptr, next,
  468. &cal_type->cal_blocks) {
  469. cal_block = list_entry(ptr,
  470. struct cal_block_data, list);
  471. metainfo = (struct audio_cal_info_metainfo *)
  472. cal_block->cal_info;
  473. if (metainfo->nKey != key) {
  474. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  475. __func__, metainfo->nKey, key);
  476. } else {
  477. pr_debug("%s: metainfo key match found", __func__);
  478. return cal_block;
  479. }
  480. }
  481. return NULL;
  482. }
  483. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  484. {
  485. struct apr_hdr avcs_ver_cmd;
  486. int ret;
  487. mutex_lock(&q6core_lcl.cmd_lock);
  488. avcs_ver_cmd.hdr_field =
  489. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  490. APR_PKT_VER);
  491. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  492. avcs_ver_cmd.src_port = 0;
  493. avcs_ver_cmd.dest_port = 0;
  494. avcs_ver_cmd.token = 0;
  495. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  496. q6core_lcl.adsp_status = 0;
  497. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  498. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  499. (uint32_t *) &avcs_ver_cmd);
  500. if (ret < 0) {
  501. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  502. ret);
  503. goto done;
  504. }
  505. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  506. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  507. msecs_to_jiffies(TIMEOUT_MS));
  508. if (!ret) {
  509. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  510. __func__);
  511. ret = -ETIMEDOUT;
  512. goto done;
  513. }
  514. if (q6core_lcl.adsp_status < 0) {
  515. /*
  516. * adsp_err_get_err_str expects a positive value but we store
  517. * the DSP error as negative to match the Linux error standard.
  518. * Pass in the negated value so adsp_err_get_err_str returns
  519. * the correct string.
  520. */
  521. pr_err("%s: DSP returned error[%s]\n", __func__,
  522. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  523. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  524. goto done;
  525. }
  526. ret = 0;
  527. done:
  528. mutex_unlock(&q6core_lcl.cmd_lock);
  529. return ret;
  530. }
  531. int q6core_get_service_version(uint32_t service_id,
  532. struct avcs_fwk_ver_info *ver_info,
  533. size_t size)
  534. {
  535. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  536. int i;
  537. uint32_t num_services;
  538. size_t ver_size;
  539. int ret;
  540. if (ver_info == NULL) {
  541. pr_err("%s: ver_info is NULL\n", __func__);
  542. return -EINVAL;
  543. }
  544. ret = q6core_get_fwk_version_size(service_id);
  545. if (ret < 0) {
  546. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  547. __func__, service_id, ret);
  548. return ret;
  549. }
  550. ver_size = ret;
  551. if (ver_size != size) {
  552. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  553. __func__, ver_size, size);
  554. return -EINVAL;
  555. }
  556. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  557. num_services = cached_ver_info->avcs_fwk_version.num_services;
  558. if (service_id == AVCS_SERVICE_ID_ALL) {
  559. memcpy(ver_info, cached_ver_info, ver_size);
  560. return 0;
  561. }
  562. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  563. for (i = 0; i < num_services; i++) {
  564. if (cached_ver_info->services[i].service_id == service_id) {
  565. ver_info->services[0] = cached_ver_info->services[i];
  566. return 0;
  567. }
  568. }
  569. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  570. return -EINVAL;
  571. }
  572. EXPORT_SYMBOL(q6core_get_service_version);
  573. static int q6core_get_avcs_fwk_version(void)
  574. {
  575. int ret = 0;
  576. mutex_lock(&(q6core_lcl.ver_lock));
  577. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  578. q6core_lcl.q6core_avcs_ver_info.status);
  579. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  580. case VER_QUERY_SUPPORTED:
  581. pr_debug("%s: AVCS FWK version query already attempted\n",
  582. __func__);
  583. break;
  584. case VER_QUERY_UNSUPPORTED:
  585. ret = -EOPNOTSUPP;
  586. break;
  587. case VER_QUERY_UNATTEMPTED:
  588. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  589. if (q6core_is_adsp_ready()) {
  590. ret = q6core_send_get_avcs_fwk_ver_cmd();
  591. } else {
  592. pr_err("%s: ADSP is not ready to query version\n",
  593. __func__);
  594. ret = -ENODEV;
  595. }
  596. break;
  597. default:
  598. pr_err("%s: Invalid version query status %d\n", __func__,
  599. q6core_lcl.q6core_avcs_ver_info.status);
  600. ret = -EINVAL;
  601. break;
  602. }
  603. mutex_unlock(&(q6core_lcl.ver_lock));
  604. return ret;
  605. }
  606. size_t q6core_get_fwk_version_size(uint32_t service_id)
  607. {
  608. int ret = 0;
  609. uint32_t num_services;
  610. ret = q6core_get_avcs_fwk_version();
  611. if (ret)
  612. goto done;
  613. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  614. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  615. ->avcs_fwk_version.num_services;
  616. } else {
  617. pr_err("%s: ver_info is NULL\n", __func__);
  618. ret = -EINVAL;
  619. goto done;
  620. }
  621. ret = sizeof(struct avcs_get_fwk_version);
  622. if (service_id == AVCS_SERVICE_ID_ALL)
  623. ret += num_services * sizeof(struct avs_svc_api_info);
  624. else
  625. ret += sizeof(struct avs_svc_api_info);
  626. done:
  627. return ret;
  628. }
  629. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  630. /**
  631. * q6core_get_avcs_version_per_service -
  632. * to get api version of a particular service
  633. *
  634. * @service_id: id of the service
  635. *
  636. * Returns valid version on success or error (negative value) on failure
  637. */
  638. int q6core_get_avcs_api_version_per_service(uint32_t service_id)
  639. {
  640. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  641. int i;
  642. uint32_t num_services;
  643. int ret = 0;
  644. if (service_id == AVCS_SERVICE_ID_ALL)
  645. return -EINVAL;
  646. ret = q6core_get_avcs_fwk_version();
  647. if (ret < 0) {
  648. pr_err("%s: failure in getting AVCS version\n", __func__);
  649. return ret;
  650. }
  651. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  652. num_services = cached_ver_info->avcs_fwk_version.num_services;
  653. for (i = 0; i < num_services; i++) {
  654. if (cached_ver_info->services[i].service_id == service_id)
  655. return cached_ver_info->services[i].api_version;
  656. }
  657. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  658. return -EINVAL;
  659. }
  660. EXPORT_SYMBOL(q6core_get_avcs_api_version_per_service);
  661. /**
  662. * q6core_get_avcs_avs_build_version_info - Get AVS build version information
  663. *
  664. * @build_major_version - pointer to build major version
  665. * @build_minor_version - pointer to build minor version
  666. * @build_branch_version - pointer to build branch version
  667. *
  668. * Returns 0 on success and error on failure
  669. */
  670. int q6core_get_avcs_avs_build_version_info(
  671. uint32_t *build_major_version, uint32_t *build_minor_version,
  672. uint32_t *build_branch_version)
  673. {
  674. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  675. int ret = 0;
  676. if (!build_major_version || !build_minor_version ||
  677. !build_branch_version)
  678. return -EINVAL;
  679. ret = q6core_get_avcs_fwk_version();
  680. if (ret < 0)
  681. return ret;
  682. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  683. *build_major_version =
  684. cached_ver_info->avcs_fwk_version.build_major_version;
  685. *build_minor_version =
  686. cached_ver_info->avcs_fwk_version.build_minor_version;
  687. *build_branch_version =
  688. cached_ver_info->avcs_fwk_version.build_branch_version;
  689. return ret;
  690. }
  691. EXPORT_SYMBOL(q6core_get_avcs_avs_build_version_info);
  692. /**
  693. * core_set_license -
  694. * command to set license for module
  695. *
  696. * @key: license key hash
  697. * @module_id: DSP Module ID
  698. *
  699. * Returns 0 on success or error on failure
  700. */
  701. int32_t core_set_license(uint32_t key, uint32_t module_id)
  702. {
  703. struct avcs_cmd_set_license *cmd_setl = NULL;
  704. struct cal_block_data *cal_block = NULL;
  705. int rc = 0, packet_size = 0;
  706. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  707. mutex_lock(&(q6core_lcl.cmd_lock));
  708. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  709. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  710. rc = -EINVAL;
  711. goto cmd_unlock;
  712. }
  713. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  714. cal_block = cal_utils_get_cal_block_by_key(
  715. q6core_lcl.cal_data[META_CAL], key);
  716. if (cal_block == NULL ||
  717. cal_block->cal_data.kvaddr == NULL ||
  718. cal_block->cal_data.size <= 0) {
  719. pr_err("%s: Invalid cal block to send", __func__);
  720. rc = -EINVAL;
  721. goto cal_data_unlock;
  722. }
  723. packet_size = sizeof(struct avcs_cmd_set_license) +
  724. cal_block->cal_data.size;
  725. /*round up total packet_size to next 4 byte boundary*/
  726. packet_size = ((packet_size + 0x3)>>2)<<2;
  727. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  728. if (cmd_setl == NULL) {
  729. rc = -ENOMEM;
  730. goto cal_data_unlock;
  731. }
  732. ocm_core_open();
  733. if (q6core_lcl.core_handle_q == NULL) {
  734. pr_err("%s: apr registration for CORE failed\n", __func__);
  735. rc = -ENODEV;
  736. goto fail_cmd;
  737. }
  738. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  739. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  740. cmd_setl->hdr.pkt_size = packet_size;
  741. cmd_setl->hdr.src_port = 0;
  742. cmd_setl->hdr.dest_port = 0;
  743. cmd_setl->hdr.token = 0;
  744. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  745. cmd_setl->id = module_id;
  746. cmd_setl->overwrite = 1;
  747. cmd_setl->size = cal_block->cal_data.size;
  748. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  749. cal_block->cal_data.kvaddr,
  750. cal_block->cal_data.size);
  751. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  752. __func__, cmd_setl->hdr.opcode,
  753. cmd_setl->id, cmd_setl->size);
  754. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  755. if (rc < 0)
  756. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  757. __func__, cmd_setl->hdr.opcode, rc);
  758. fail_cmd:
  759. kfree(cmd_setl);
  760. cal_data_unlock:
  761. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  762. cmd_unlock:
  763. mutex_unlock(&(q6core_lcl.cmd_lock));
  764. return rc;
  765. }
  766. EXPORT_SYMBOL(core_set_license);
  767. /**
  768. * core_get_license_status -
  769. * command to retrieve license status for module
  770. *
  771. * @module_id: DSP Module ID
  772. *
  773. * Returns 0 on success or error on failure
  774. */
  775. int32_t core_get_license_status(uint32_t module_id)
  776. {
  777. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  778. int ret = 0;
  779. pr_debug("%s: module_id 0x%x", __func__, module_id);
  780. mutex_lock(&(q6core_lcl.cmd_lock));
  781. ocm_core_open();
  782. if (q6core_lcl.core_handle_q == NULL) {
  783. pr_err("%s: apr registration for CORE failed\n", __func__);
  784. ret = -ENODEV;
  785. goto fail_cmd;
  786. }
  787. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  788. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  789. get_lvr_cmd.hdr.pkt_size =
  790. sizeof(struct avcs_cmd_get_license_validation_result);
  791. get_lvr_cmd.hdr.src_port = 0;
  792. get_lvr_cmd.hdr.dest_port = 0;
  793. get_lvr_cmd.hdr.token = 0;
  794. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  795. get_lvr_cmd.id = module_id;
  796. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  797. if (ret < 0) {
  798. pr_err("%s: license_validation request failed, err %d\n",
  799. __func__, ret);
  800. ret = -EREMOTE;
  801. goto fail_cmd;
  802. }
  803. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  804. mutex_unlock(&(q6core_lcl.cmd_lock));
  805. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  806. (q6core_lcl.cmd_resp_received_flag ==
  807. FLAG_CMDRSP_LICENSE_RESULT),
  808. msecs_to_jiffies(TIMEOUT_MS));
  809. mutex_lock(&(q6core_lcl.cmd_lock));
  810. if (!ret) {
  811. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  812. __func__);
  813. ret = -ETIME;
  814. goto fail_cmd;
  815. }
  816. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  817. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  818. fail_cmd:
  819. mutex_unlock(&(q6core_lcl.cmd_lock));
  820. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  821. __func__, ret, module_id);
  822. return ret;
  823. }
  824. EXPORT_SYMBOL(core_get_license_status);
  825. /**
  826. * core_set_dolby_manufacturer_id -
  827. * command to set dolby manufacturer id
  828. *
  829. * @manufacturer_id: Dolby manufacturer id
  830. *
  831. * Returns 0 on success or error on failure
  832. */
  833. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  834. {
  835. struct adsp_dolby_manufacturer_id payload;
  836. int rc = 0;
  837. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  838. mutex_lock(&(q6core_lcl.cmd_lock));
  839. ocm_core_open();
  840. if (q6core_lcl.core_handle_q) {
  841. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  842. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  843. payload.hdr.pkt_size =
  844. sizeof(struct adsp_dolby_manufacturer_id);
  845. payload.hdr.src_port = 0;
  846. payload.hdr.dest_port = 0;
  847. payload.hdr.token = 0;
  848. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  849. payload.manufacturer_id = manufacturer_id;
  850. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  851. __func__,
  852. payload.hdr.opcode, payload.manufacturer_id);
  853. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  854. (uint32_t *)&payload);
  855. if (rc < 0)
  856. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  857. __func__, payload.hdr.opcode, rc);
  858. }
  859. mutex_unlock(&(q6core_lcl.cmd_lock));
  860. return rc;
  861. }
  862. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  863. int32_t q6core_avcs_load_unload_modules(struct avcs_load_unload_modules_payload
  864. *payload, uint32_t preload_type)
  865. {
  866. int ret = 0;
  867. size_t packet_size = 0, payload_size = 0;
  868. struct avcs_cmd_dynamic_modules *mod = NULL;
  869. int num_modules;
  870. if (payload == NULL) {
  871. pr_err("%s: payload is null\n", __func__);
  872. return -EINVAL;
  873. }
  874. mutex_lock(&(q6core_lcl.cmd_lock));
  875. num_modules = payload->num_modules;
  876. ocm_core_open();
  877. if (q6core_lcl.core_handle_q == NULL) {
  878. pr_err("%s: apr registration for CORE failed\n", __func__);
  879. mutex_unlock(&(q6core_lcl.cmd_lock));
  880. return -ENODEV;
  881. }
  882. payload_size = (sizeof(struct avcs_load_unload_modules_sec_payload)
  883. * num_modules) + sizeof(uint32_t);
  884. packet_size = sizeof(struct avcs_cmd_dynamic_modules) +
  885. payload_size - sizeof(uint32_t);
  886. mod = kzalloc(packet_size, GFP_KERNEL);
  887. if (!mod) {
  888. mutex_unlock(&(q6core_lcl.cmd_lock));
  889. return -ENOMEM;
  890. }
  891. rsp_payload = kzalloc(payload_size, GFP_KERNEL);
  892. if (!rsp_payload) {
  893. kfree(mod);
  894. mutex_unlock(&(q6core_lcl.cmd_lock));
  895. return -ENOMEM;
  896. }
  897. memcpy((uint8_t *)mod + sizeof(struct apr_hdr) +
  898. sizeof(struct avcs_load_unload_modules_meminfo),
  899. payload, payload_size);
  900. mod->hdr.hdr_field =
  901. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  902. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  903. mod->hdr.pkt_size = packet_size;
  904. mod->hdr.src_port = 0;
  905. mod->hdr.dest_port = 0;
  906. mod->hdr.token = 0;
  907. mod->meminfo.data_payload_addr_lsw = 0;
  908. mod->meminfo.data_payload_addr_msw = 0;
  909. mod->meminfo.mem_map_handle = 0;
  910. mod->meminfo.buffer_size = payload_size;
  911. if (preload_type == AVCS_LOAD_MODULES)
  912. mod->hdr.opcode = AVCS_CMD_LOAD_MODULES;
  913. else
  914. mod->hdr.opcode = AVCS_CMD_UNLOAD_MODULES;
  915. q6core_lcl.adsp_status = 0;
  916. q6core_lcl.avcs_module_resp_received = 0;
  917. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  918. (uint32_t *)mod);
  919. if (ret < 0) {
  920. pr_err("%s: modules load/unload failed ret = %d\n",
  921. __func__, ret);
  922. goto done;
  923. }
  924. ret = wait_event_timeout(q6core_lcl.avcs_module_load_unload_wait,
  925. (q6core_lcl.avcs_module_resp_received == 1),
  926. msecs_to_jiffies(TIMEOUT_MS));
  927. if (!ret) {
  928. pr_err("%s wait event timeout for avcs load/unload module\n",
  929. __func__);
  930. ret = -ETIMEDOUT;
  931. goto done;
  932. }
  933. if (q6core_lcl.adsp_status < 0) {
  934. pr_err("%s: modules load/unload failed %d\n", __func__,
  935. q6core_lcl.adsp_status);
  936. ret = q6core_lcl.adsp_status;
  937. goto done;
  938. } else {
  939. if (mod->hdr.opcode == AVCS_CMD_LOAD_MODULES)
  940. memcpy(payload, rsp_payload, payload_size);
  941. }
  942. done:
  943. kfree(mod);
  944. kfree(rsp_payload);
  945. mutex_unlock(&(q6core_lcl.cmd_lock));
  946. return ret;
  947. }
  948. EXPORT_SYMBOL(q6core_avcs_load_unload_modules);
  949. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  950. bool preload_type)
  951. {
  952. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  953. int ret = 0;
  954. mutex_lock(&(q6core_lcl.cmd_lock));
  955. ocm_core_open();
  956. if (q6core_lcl.core_handle_q == NULL) {
  957. pr_err("%s: apr registration for CORE failed\n", __func__);
  958. ret = -ENODEV;
  959. goto done;
  960. }
  961. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  962. load_unload_topo_modules.hdr.hdr_field =
  963. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  964. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  965. load_unload_topo_modules.hdr.pkt_size =
  966. sizeof(struct avcs_cmd_load_unload_topo_modules);
  967. load_unload_topo_modules.hdr.src_port = 0;
  968. load_unload_topo_modules.hdr.dest_port = 0;
  969. load_unload_topo_modules.hdr.token = 0;
  970. if (preload_type == CORE_LOAD_TOPOLOGY)
  971. load_unload_topo_modules.hdr.opcode =
  972. AVCS_CMD_LOAD_TOPO_MODULES;
  973. else
  974. load_unload_topo_modules.hdr.opcode =
  975. AVCS_CMD_UNLOAD_TOPO_MODULES;
  976. load_unload_topo_modules.topology_id = topo_id;
  977. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  978. (uint32_t *) &load_unload_topo_modules);
  979. if (ret < 0) {
  980. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  981. __func__, topo_id, ret);
  982. ret = -EINVAL;
  983. }
  984. done:
  985. mutex_unlock(&(q6core_lcl.cmd_lock));
  986. return ret;
  987. }
  988. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  989. /**
  990. * q6core_is_adsp_ready - check adsp ready status
  991. *
  992. * Returns true if adsp is ready otherwise returns false
  993. */
  994. bool q6core_is_adsp_ready(void)
  995. {
  996. int rc = 0;
  997. bool ret = false;
  998. struct apr_hdr hdr;
  999. pr_debug("%s: enter\n", __func__);
  1000. memset(&hdr, 0, sizeof(hdr));
  1001. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1002. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1003. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  1004. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  1005. mutex_lock(&(q6core_lcl.cmd_lock));
  1006. ocm_core_open();
  1007. if (q6core_lcl.core_handle_q) {
  1008. q6core_lcl.bus_bw_resp_received = 0;
  1009. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  1010. if (rc < 0) {
  1011. pr_err_ratelimited("%s: Get ADSP state APR packet send event %d\n",
  1012. __func__, rc);
  1013. goto bail;
  1014. }
  1015. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1016. (q6core_lcl.bus_bw_resp_received == 1),
  1017. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  1018. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  1019. /* ensure to read updated param by callback thread */
  1020. rmb();
  1021. ret = !!q6core_lcl.param;
  1022. }
  1023. }
  1024. bail:
  1025. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  1026. mutex_unlock(&(q6core_lcl.cmd_lock));
  1027. return ret;
  1028. }
  1029. EXPORT_SYMBOL(q6core_is_adsp_ready);
  1030. int q6core_create_lpass_npa_client(uint32_t node_id, char *client_name,
  1031. uint32_t *client_handle)
  1032. {
  1033. struct avcs_cmd_create_lpass_npa_client_t create_lpass_npa_client;
  1034. struct avcs_cmd_create_lpass_npa_client_t *cmd_ptr =
  1035. &create_lpass_npa_client;
  1036. int ret = 0;
  1037. if (!client_name) {
  1038. pr_err("%s: Invalid params\n", __func__);
  1039. return -EINVAL;
  1040. }
  1041. mutex_lock(&(q6core_lcl.cmd_lock));
  1042. memset(cmd_ptr, 0, sizeof(create_lpass_npa_client));
  1043. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1044. APR_HDR_LEN(APR_HDR_SIZE),
  1045. APR_PKT_VER);
  1046. cmd_ptr->hdr.pkt_size = sizeof(create_lpass_npa_client);
  1047. cmd_ptr->hdr.src_port = 0;
  1048. cmd_ptr->hdr.dest_port = 0;
  1049. cmd_ptr->hdr.token = 0;
  1050. cmd_ptr->hdr.opcode = AVCS_CMD_CREATE_LPASS_NPA_CLIENT;
  1051. cmd_ptr->node_id = AVCS_SLEEP_ISLAND_CORE_DRIVER_NODE_ID;
  1052. strlcpy(cmd_ptr->client_name, client_name,
  1053. sizeof(cmd_ptr->client_name));
  1054. pr_debug("%s: create lpass npa client opcode[0x%x] node id[0x%x]\n",
  1055. __func__, cmd_ptr->hdr.opcode, cmd_ptr->node_id);
  1056. *client_handle = 0;
  1057. q6core_lcl.adsp_status = 0;
  1058. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1059. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1060. if (ret < 0) {
  1061. pr_err("%s: create lpass npa client failed %d\n",
  1062. __func__, ret);
  1063. ret = -EINVAL;
  1064. goto done;
  1065. }
  1066. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1067. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1068. msecs_to_jiffies(TIMEOUT_MS));
  1069. if (!ret) {
  1070. pr_err("%s: timeout. waited for create lpass npa rsc client\n",
  1071. __func__);
  1072. ret = -ETIMEDOUT;
  1073. goto done;
  1074. } else {
  1075. /* set ret to 0 as no timeout happened */
  1076. ret = 0;
  1077. }
  1078. if (q6core_lcl.adsp_status < 0) {
  1079. pr_err("%s: DSP returned error %d\n",
  1080. __func__, q6core_lcl.adsp_status);
  1081. ret = q6core_lcl.adsp_status;
  1082. goto done;
  1083. }
  1084. *client_handle = q6core_lcl.npa_client_handle;
  1085. pr_debug("%s: q6core_lcl.npa_client_handle %d\n", __func__,
  1086. q6core_lcl.npa_client_handle);
  1087. done:
  1088. mutex_unlock(&q6core_lcl.cmd_lock);
  1089. return ret;
  1090. }
  1091. EXPORT_SYMBOL(q6core_create_lpass_npa_client);
  1092. int q6core_destroy_lpass_npa_client(uint32_t client_handle)
  1093. {
  1094. struct avcs_cmd_destroy_lpass_npa_client_t destroy_lpass_npa_client;
  1095. struct avcs_cmd_destroy_lpass_npa_client_t *cmd_ptr =
  1096. &destroy_lpass_npa_client;
  1097. int ret = 0;
  1098. mutex_lock(&(q6core_lcl.cmd_lock));
  1099. memset(cmd_ptr, 0, sizeof(destroy_lpass_npa_client));
  1100. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1101. APR_HDR_LEN(APR_HDR_SIZE),
  1102. APR_PKT_VER);
  1103. cmd_ptr->hdr.pkt_size = sizeof(destroy_lpass_npa_client);
  1104. cmd_ptr->hdr.src_port = 0;
  1105. cmd_ptr->hdr.dest_port = 0;
  1106. cmd_ptr->hdr.token = 0;
  1107. cmd_ptr->hdr.opcode = AVCS_CMD_DESTROY_LPASS_NPA_CLIENT;
  1108. cmd_ptr->client_handle = client_handle;
  1109. pr_debug("%s: dstry lpass npa client opcode[0x%x] client hdl[0x%x]\n",
  1110. __func__, cmd_ptr->hdr.opcode, cmd_ptr->client_handle);
  1111. q6core_lcl.adsp_status = 0;
  1112. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1113. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1114. if (ret < 0) {
  1115. pr_err("%s: destroy lpass npa client failed %d\n",
  1116. __func__, ret);
  1117. ret = -EINVAL;
  1118. goto done;
  1119. }
  1120. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1121. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1122. msecs_to_jiffies(TIMEOUT_MS));
  1123. if (!ret) {
  1124. pr_err("%s: timeout. waited for destroy lpass npa rsc client\n",
  1125. __func__);
  1126. ret = -ETIMEDOUT;
  1127. goto done;
  1128. } else {
  1129. /* set ret to 0 as no timeout happened */
  1130. ret = 0;
  1131. }
  1132. if (q6core_lcl.adsp_status < 0) {
  1133. pr_err("%s: DSP returned error %d\n",
  1134. __func__, q6core_lcl.adsp_status);
  1135. ret = q6core_lcl.adsp_status;
  1136. }
  1137. done:
  1138. mutex_unlock(&q6core_lcl.cmd_lock);
  1139. return ret;
  1140. }
  1141. EXPORT_SYMBOL(q6core_destroy_lpass_npa_client);
  1142. int q6core_request_island_transition(uint32_t client_handle,
  1143. uint32_t island_allow_mode)
  1144. {
  1145. struct avcs_sleep_node_island_transition_config_t island_tsn_cfg;
  1146. struct avcs_sleep_node_island_transition_config_t *cmd_ptr =
  1147. &island_tsn_cfg;
  1148. int ret = 0;
  1149. mutex_lock(&(q6core_lcl.cmd_lock));
  1150. memset(cmd_ptr, 0, sizeof(island_tsn_cfg));
  1151. cmd_ptr->req_lpass_npa_rsc.hdr.hdr_field =
  1152. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1153. APR_HDR_LEN(APR_HDR_SIZE),
  1154. APR_PKT_VER);
  1155. cmd_ptr->req_lpass_npa_rsc.hdr.pkt_size = sizeof(island_tsn_cfg);
  1156. cmd_ptr->req_lpass_npa_rsc.hdr.src_port = 0;
  1157. cmd_ptr->req_lpass_npa_rsc.hdr.dest_port = 0;
  1158. cmd_ptr->req_lpass_npa_rsc.hdr.token = 0;
  1159. cmd_ptr->req_lpass_npa_rsc.hdr.opcode =
  1160. AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES;
  1161. cmd_ptr->req_lpass_npa_rsc.client_handle = client_handle;
  1162. cmd_ptr->req_lpass_npa_rsc.resource_id =
  1163. AVCS_SLEEP_NODE_ISLAND_TRANSITION_RESOURCE_ID;
  1164. cmd_ptr->island_allow_mode = island_allow_mode;
  1165. pr_debug("%s: req islnd tnsn opcode[0x%x] island_allow_mode[0x%x]\n",
  1166. __func__, cmd_ptr->req_lpass_npa_rsc.hdr.opcode,
  1167. cmd_ptr->island_allow_mode);
  1168. q6core_lcl.adsp_status = 0;
  1169. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  1170. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  1171. if (ret < 0) {
  1172. pr_err("%s: island tnsn cmd send failed %d\n",
  1173. __func__, ret);
  1174. ret = -EINVAL;
  1175. goto done;
  1176. }
  1177. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  1178. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  1179. msecs_to_jiffies(TIMEOUT_MS));
  1180. if (!ret) {
  1181. pr_err("%s: timeout. waited for island lpass npa rsc req\n",
  1182. __func__);
  1183. ret = -ETIMEDOUT;
  1184. goto done;
  1185. } else {
  1186. /* set ret to 0 as no timeout happened */
  1187. ret = 0;
  1188. }
  1189. if (q6core_lcl.adsp_status < 0) {
  1190. pr_err("%s: DSP returned error %d\n",
  1191. __func__, q6core_lcl.adsp_status);
  1192. ret = q6core_lcl.adsp_status;
  1193. }
  1194. done:
  1195. mutex_unlock(&q6core_lcl.cmd_lock);
  1196. return ret;
  1197. }
  1198. EXPORT_SYMBOL(q6core_request_island_transition);
  1199. int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  1200. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1201. {
  1202. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1203. struct avs_shared_map_region_payload *mregions = NULL;
  1204. void *mmap_region_cmd = NULL;
  1205. void *payload = NULL;
  1206. int ret = 0;
  1207. int i = 0;
  1208. int cmd_size = 0;
  1209. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1210. + sizeof(struct avs_shared_map_region_payload)
  1211. * bufcnt;
  1212. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1213. if (mmap_region_cmd == NULL)
  1214. return -ENOMEM;
  1215. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1216. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1217. APR_HDR_LEN(APR_HDR_SIZE),
  1218. APR_PKT_VER);
  1219. mmap_regions->hdr.pkt_size = cmd_size;
  1220. mmap_regions->hdr.src_port = 0;
  1221. mmap_regions->hdr.dest_port = 0;
  1222. mmap_regions->hdr.token = 0;
  1223. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1224. mmap_regions->mem_pool_id = mempool_id & 0x00ff;
  1225. mmap_regions->num_regions = bufcnt & 0x00ff;
  1226. mmap_regions->property_flag = 0x00;
  1227. payload = ((u8 *) mmap_region_cmd +
  1228. sizeof(struct avs_cmd_shared_mem_map_regions));
  1229. mregions = (struct avs_shared_map_region_payload *)payload;
  1230. for (i = 0; i < bufcnt; i++) {
  1231. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1232. mregions->shm_addr_msw =
  1233. msm_audio_populate_upper_32_bits(buf_add[i]);
  1234. mregions->mem_size_bytes = bufsz[i];
  1235. ++mregions;
  1236. }
  1237. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  1238. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1239. *map_handle = 0;
  1240. q6core_lcl.adsp_status = 0;
  1241. q6core_lcl.bus_bw_resp_received = 0;
  1242. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1243. mmap_regions);
  1244. if (ret < 0) {
  1245. pr_err("%s: mmap regions failed %d\n",
  1246. __func__, ret);
  1247. ret = -EINVAL;
  1248. goto done;
  1249. }
  1250. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1251. (q6core_lcl.bus_bw_resp_received == 1),
  1252. msecs_to_jiffies(TIMEOUT_MS));
  1253. if (!ret) {
  1254. pr_err("%s: timeout. waited for memory map\n", __func__);
  1255. ret = -ETIME;
  1256. goto done;
  1257. } else {
  1258. /* set ret to 0 as no timeout happened */
  1259. ret = 0;
  1260. }
  1261. if (q6core_lcl.adsp_status < 0) {
  1262. pr_err("%s: DSP returned error %d\n",
  1263. __func__, q6core_lcl.adsp_status);
  1264. ret = q6core_lcl.adsp_status;
  1265. goto done;
  1266. }
  1267. *map_handle = q6core_lcl.mem_map_cal_handle;
  1268. done:
  1269. kfree(mmap_region_cmd);
  1270. return ret;
  1271. }
  1272. /**
  1273. * q6core_map_mdf_memory_regions - for sending MDF shared memory map information
  1274. * to ADSP.
  1275. *
  1276. * @buf_add: array of buffers.
  1277. * @mempool_id: memory pool ID
  1278. * @bufsz: size of the buffer
  1279. * @bufcnt: buffers count
  1280. * @map_handle: map handle received from ADSP
  1281. */
  1282. int q6core_map_mdf_memory_regions(uint64_t *buf_add, uint32_t mempool_id,
  1283. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1284. {
  1285. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1286. struct avs_shared_map_region_payload *mregions = NULL;
  1287. void *mmap_region_cmd = NULL;
  1288. void *payload = NULL;
  1289. int ret = 0;
  1290. int i = 0;
  1291. int cmd_size = 0;
  1292. mutex_lock(&q6core_lcl.cmd_lock);
  1293. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1294. + sizeof(struct avs_shared_map_region_payload)
  1295. * bufcnt;
  1296. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1297. if (mmap_region_cmd == NULL)
  1298. return -ENOMEM;
  1299. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1300. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1301. APR_HDR_LEN(APR_HDR_SIZE),
  1302. APR_PKT_VER);
  1303. mmap_regions->hdr.pkt_size = cmd_size;
  1304. mmap_regions->hdr.src_port = 0;
  1305. mmap_regions->hdr.dest_port = 0;
  1306. mmap_regions->hdr.token = MDF_MAP_TOKEN;
  1307. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1308. mmap_regions->mem_pool_id = mempool_id & MEMPOOL_ID_MASK;
  1309. mmap_regions->num_regions = bufcnt & 0x00ff;
  1310. mmap_regions->property_flag = 0x00;
  1311. payload = ((u8 *) mmap_region_cmd +
  1312. sizeof(struct avs_cmd_shared_mem_map_regions));
  1313. mregions = (struct avs_shared_map_region_payload *)payload;
  1314. for (i = 0; i < bufcnt; i++) {
  1315. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1316. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1317. mregions->mem_size_bytes = bufsz[i];
  1318. ++mregions;
  1319. }
  1320. pr_debug("%s: sending MDF memory map, addr %pK, size %d, bufcnt = %d\n",
  1321. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1322. *map_handle = 0;
  1323. q6core_lcl.adsp_status = 0;
  1324. q6core_lcl.mdf_map_resp_received = 0;
  1325. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1326. mmap_regions);
  1327. if (ret < 0) {
  1328. pr_err("%s: mmap regions failed %d\n",
  1329. __func__, ret);
  1330. ret = -EINVAL;
  1331. goto done;
  1332. }
  1333. ret = wait_event_timeout(q6core_lcl.mdf_map_resp_wait,
  1334. (q6core_lcl.mdf_map_resp_received == 1),
  1335. msecs_to_jiffies(TIMEOUT_MS));
  1336. if (!ret) {
  1337. pr_err("%s: timeout. waited for memory map\n", __func__);
  1338. ret = -ETIMEDOUT;
  1339. goto done;
  1340. } else {
  1341. /* set ret to 0 as no timeout happened */
  1342. ret = 0;
  1343. }
  1344. if (q6core_lcl.adsp_status < 0) {
  1345. pr_err("%s: DSP returned error %d\n",
  1346. __func__, q6core_lcl.adsp_status);
  1347. ret = q6core_lcl.adsp_status;
  1348. goto done;
  1349. }
  1350. *map_handle = q6core_lcl.mdf_mem_map_cal_handle;
  1351. done:
  1352. kfree(mmap_region_cmd);
  1353. mutex_unlock(&q6core_lcl.cmd_lock);
  1354. return ret;
  1355. }
  1356. EXPORT_SYMBOL(q6core_map_mdf_memory_regions);
  1357. int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  1358. {
  1359. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  1360. int ret = 0;
  1361. memset(&unmap_regions, 0, sizeof(unmap_regions));
  1362. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1363. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1364. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  1365. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  1366. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  1367. unmap_regions.hdr.src_port = 0;
  1368. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1369. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  1370. unmap_regions.hdr.dest_port = 0;
  1371. unmap_regions.hdr.token = 0;
  1372. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  1373. unmap_regions.mem_map_handle = mem_map_handle;
  1374. q6core_lcl.adsp_status = 0;
  1375. q6core_lcl.bus_bw_resp_received = 0;
  1376. pr_debug("%s: unmap regions map handle %d\n",
  1377. __func__, mem_map_handle);
  1378. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1379. &unmap_regions);
  1380. if (ret < 0) {
  1381. pr_err("%s: unmap regions failed %d\n",
  1382. __func__, ret);
  1383. ret = -EINVAL;
  1384. goto done;
  1385. }
  1386. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1387. (q6core_lcl.bus_bw_resp_received == 1),
  1388. msecs_to_jiffies(TIMEOUT_MS));
  1389. if (!ret) {
  1390. pr_err("%s: timeout. waited for memory_unmap\n",
  1391. __func__);
  1392. ret = -ETIME;
  1393. goto done;
  1394. } else {
  1395. /* set ret to 0 as no timeout happened */
  1396. ret = 0;
  1397. }
  1398. if (q6core_lcl.adsp_status < 0) {
  1399. pr_err("%s: DSP returned error %d\n",
  1400. __func__, q6core_lcl.adsp_status);
  1401. ret = q6core_lcl.adsp_status;
  1402. goto done;
  1403. }
  1404. done:
  1405. return ret;
  1406. }
  1407. int q6core_map_mdf_shared_memory(uint32_t map_handle, uint64_t *buf_add,
  1408. uint32_t proc_id, uint32_t *bufsz, uint32_t bufcnt)
  1409. {
  1410. struct avs_cmd_map_mdf_shared_memory *mmap_regions = NULL;
  1411. struct avs_shared_map_region_payload *mregions = NULL;
  1412. void *mmap_region_cmd = NULL;
  1413. void *payload = NULL;
  1414. int ret = 0;
  1415. int i = 0;
  1416. int cmd_size = 0;
  1417. mutex_lock(&q6core_lcl.cmd_lock);
  1418. cmd_size = sizeof(struct avs_cmd_map_mdf_shared_memory)
  1419. + sizeof(struct avs_shared_map_region_payload)
  1420. * bufcnt;
  1421. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1422. if (mmap_region_cmd == NULL) {
  1423. mutex_unlock(&q6core_lcl.cmd_lock);
  1424. return -ENOMEM;
  1425. }
  1426. mmap_regions = (struct avs_cmd_map_mdf_shared_memory *)mmap_region_cmd;
  1427. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1428. APR_HDR_LEN(APR_HDR_SIZE),
  1429. APR_PKT_VER);
  1430. mmap_regions->hdr.pkt_size = cmd_size;
  1431. mmap_regions->hdr.src_port = 0;
  1432. mmap_regions->hdr.dest_port = 0;
  1433. mmap_regions->hdr.token = 0;
  1434. mmap_regions->hdr.opcode = AVCS_CMD_MAP_MDF_SHARED_MEMORY;
  1435. mmap_regions->mem_map_handle = map_handle;
  1436. mmap_regions->proc_id = proc_id & 0x00ff;
  1437. mmap_regions->num_regions = bufcnt & 0x00ff;
  1438. payload = ((u8 *) mmap_region_cmd +
  1439. sizeof(struct avs_cmd_map_mdf_shared_memory));
  1440. mregions = (struct avs_shared_map_region_payload *)payload;
  1441. for (i = 0; i < bufcnt; i++) {
  1442. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1443. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1444. mregions->mem_size_bytes = bufsz[i];
  1445. ++mregions;
  1446. }
  1447. pr_debug("%s: sending mdf memory map, addr %pa, size %d, bufcnt = %d\n",
  1448. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1449. q6core_lcl.adsp_status = 0;
  1450. q6core_lcl.bus_bw_resp_received = 0;
  1451. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1452. mmap_regions);
  1453. if (ret < 0) {
  1454. pr_err("%s: mdf memory map failed %d\n",
  1455. __func__, ret);
  1456. ret = -EINVAL;
  1457. goto done;
  1458. }
  1459. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1460. (q6core_lcl.bus_bw_resp_received == 1),
  1461. msecs_to_jiffies(TIMEOUT_MS));
  1462. if (!ret) {
  1463. pr_err("%s: timeout. waited for mdf memory map\n",
  1464. __func__);
  1465. ret = -ETIME;
  1466. goto done;
  1467. } else {
  1468. /* set ret to 0 as no timeout happened */
  1469. ret = 0;
  1470. }
  1471. /*
  1472. * When the remote DSP is not ready, the ADSP will validate and store
  1473. * the memory information and return APR_ENOTREADY to HLOS. The ADSP
  1474. * will map the memory with remote DSP when it is ready. HLOS should
  1475. * not treat APR_ENOTREADY as an error.
  1476. */
  1477. if (q6core_lcl.adsp_status != -APR_ENOTREADY) {
  1478. pr_err("%s: DSP returned error %d\n",
  1479. __func__, q6core_lcl.adsp_status);
  1480. ret = q6core_lcl.adsp_status;
  1481. goto done;
  1482. }
  1483. done:
  1484. kfree(mmap_region_cmd);
  1485. mutex_unlock(&q6core_lcl.cmd_lock);
  1486. return ret;
  1487. }
  1488. static int q6core_dereg_all_custom_topologies(void)
  1489. {
  1490. int ret = 0;
  1491. struct avcs_cmd_deregister_topologies dereg_top;
  1492. memset(&dereg_top, 0, sizeof(dereg_top));
  1493. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1494. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1495. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  1496. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1497. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1498. dereg_top.hdr.src_port = 0;
  1499. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1500. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1501. dereg_top.hdr.dest_port = 0;
  1502. dereg_top.hdr.token = 0;
  1503. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  1504. dereg_top.payload_addr_lsw = 0;
  1505. dereg_top.payload_addr_msw = 0;
  1506. dereg_top.mem_map_handle = 0;
  1507. dereg_top.payload_size = 0;
  1508. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  1509. q6core_lcl.bus_bw_resp_received = 0;
  1510. pr_debug("%s: Deregister topologies mode %d\n",
  1511. __func__, dereg_top.mode);
  1512. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  1513. if (ret < 0) {
  1514. pr_err("%s: Deregister topologies failed %d\n",
  1515. __func__, ret);
  1516. goto done;
  1517. }
  1518. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1519. (q6core_lcl.bus_bw_resp_received == 1),
  1520. msecs_to_jiffies(TIMEOUT_MS));
  1521. if (!ret) {
  1522. pr_err("%s: wait_event timeout for Deregister topologies\n",
  1523. __func__);
  1524. goto done;
  1525. }
  1526. done:
  1527. return ret;
  1528. }
  1529. static int q6core_send_custom_topologies(void)
  1530. {
  1531. int ret = 0;
  1532. int ret2 = 0;
  1533. struct cal_block_data *cal_block = NULL;
  1534. struct avcs_cmd_register_topologies reg_top;
  1535. if (!q6core_is_adsp_ready()) {
  1536. pr_err("%s: ADSP is not ready!\n", __func__);
  1537. return -ENODEV;
  1538. }
  1539. memset(&reg_top, 0, sizeof(reg_top));
  1540. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1541. mutex_lock(&q6core_lcl.cmd_lock);
  1542. cal_block = cal_utils_get_only_cal_block(
  1543. q6core_lcl.cal_data[CUST_TOP_CAL]);
  1544. if (cal_block == NULL) {
  1545. pr_debug("%s: cal block is NULL!\n", __func__);
  1546. goto unlock;
  1547. }
  1548. if (cal_block->cal_data.size <= 0) {
  1549. pr_debug("%s: cal size is %zd not sending\n",
  1550. __func__, cal_block->cal_data.size);
  1551. goto unlock;
  1552. }
  1553. q6core_dereg_all_custom_topologies();
  1554. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr,
  1555. ADSP_MEMORY_MAP_SHMEM8_4K_POOL,
  1556. (uint32_t *)&cal_block->map_data.map_size, 1,
  1557. &cal_block->map_data.q6map_handle);
  1558. if (ret) {
  1559. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  1560. goto unlock;
  1561. }
  1562. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1563. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1564. reg_top.hdr.pkt_size = sizeof(reg_top);
  1565. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1566. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1567. reg_top.hdr.src_port = 0;
  1568. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1569. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1570. reg_top.hdr.dest_port = 0;
  1571. reg_top.hdr.token = 0;
  1572. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  1573. reg_top.payload_addr_lsw =
  1574. lower_32_bits(cal_block->cal_data.paddr);
  1575. reg_top.payload_addr_msw =
  1576. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  1577. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  1578. reg_top.payload_size = cal_block->cal_data.size;
  1579. q6core_lcl.adsp_status = 0;
  1580. q6core_lcl.bus_bw_resp_received = 0;
  1581. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  1582. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  1583. cal_block->map_data.q6map_handle);
  1584. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  1585. if (ret < 0) {
  1586. pr_err("%s: Register topologies failed %d\n",
  1587. __func__, ret);
  1588. goto unmap;
  1589. }
  1590. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1591. (q6core_lcl.bus_bw_resp_received == 1),
  1592. msecs_to_jiffies(TIMEOUT_MS));
  1593. if (!ret) {
  1594. pr_err("%s: wait_event timeout for Register topologies\n",
  1595. __func__);
  1596. goto unmap;
  1597. }
  1598. if (q6core_lcl.adsp_status < 0)
  1599. ret = q6core_lcl.adsp_status;
  1600. unmap:
  1601. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  1602. if (ret2) {
  1603. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  1604. __func__, cal_block->map_data.q6map_handle);
  1605. ret = ret2;
  1606. goto unlock;
  1607. }
  1608. unlock:
  1609. mutex_unlock(&q6core_lcl.cmd_lock);
  1610. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1611. return ret;
  1612. }
  1613. static int get_cal_type_index(int32_t cal_type)
  1614. {
  1615. int ret = -EINVAL;
  1616. switch (cal_type) {
  1617. case AUDIO_CORE_METAINFO_CAL_TYPE:
  1618. ret = META_CAL;
  1619. break;
  1620. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  1621. ret = CUST_TOP_CAL;
  1622. break;
  1623. default:
  1624. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  1625. }
  1626. return ret;
  1627. }
  1628. static int q6core_alloc_cal(int32_t cal_type,
  1629. size_t data_size, void *data)
  1630. {
  1631. int ret = 0;
  1632. int cal_index;
  1633. cal_index = get_cal_type_index(cal_type);
  1634. if (cal_index < 0) {
  1635. pr_err("%s: could not get cal index %d!\n",
  1636. __func__, cal_index);
  1637. ret = -EINVAL;
  1638. goto done;
  1639. }
  1640. ret = cal_utils_alloc_cal(data_size, data,
  1641. q6core_lcl.cal_data[cal_index], 0, NULL);
  1642. if (ret < 0) {
  1643. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  1644. __func__, ret, cal_type);
  1645. goto done;
  1646. }
  1647. done:
  1648. return ret;
  1649. }
  1650. static int q6core_dealloc_cal(int32_t cal_type,
  1651. size_t data_size, void *data)
  1652. {
  1653. int ret = 0;
  1654. int cal_index;
  1655. cal_index = get_cal_type_index(cal_type);
  1656. if (cal_index < 0) {
  1657. pr_err("%s: could not get cal index %d!\n",
  1658. __func__, cal_index);
  1659. ret = -EINVAL;
  1660. goto done;
  1661. }
  1662. ret = cal_utils_dealloc_cal(data_size, data,
  1663. q6core_lcl.cal_data[cal_index]);
  1664. if (ret < 0) {
  1665. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  1666. __func__, ret, cal_type);
  1667. goto done;
  1668. }
  1669. done:
  1670. return ret;
  1671. }
  1672. static int q6core_set_cal(int32_t cal_type,
  1673. size_t data_size, void *data)
  1674. {
  1675. int ret = 0;
  1676. int cal_index;
  1677. cal_index = get_cal_type_index(cal_type);
  1678. if (cal_index < 0) {
  1679. pr_err("%s: could not get cal index %d!\n",
  1680. __func__, cal_index);
  1681. ret = -EINVAL;
  1682. goto done;
  1683. }
  1684. ret = cal_utils_set_cal(data_size, data,
  1685. q6core_lcl.cal_data[cal_index], 0, NULL);
  1686. if (ret < 0) {
  1687. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  1688. __func__, ret, cal_type);
  1689. goto done;
  1690. }
  1691. if (cal_index == CUST_TOP_CAL)
  1692. ret = q6core_send_custom_topologies();
  1693. done:
  1694. return ret;
  1695. }
  1696. static void q6core_delete_cal_data(void)
  1697. {
  1698. pr_debug("%s:\n", __func__);
  1699. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1700. }
  1701. static int q6core_init_cal_data(void)
  1702. {
  1703. int ret = 0;
  1704. struct cal_type_info cal_type_info[] = {
  1705. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1706. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1707. q6core_set_cal, NULL, NULL} },
  1708. {NULL, NULL, cal_utils_match_buf_num} },
  1709. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1710. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1711. q6core_set_cal, NULL, NULL} },
  1712. {NULL, NULL, cal_utils_match_buf_num} }
  1713. };
  1714. pr_debug("%s:\n", __func__);
  1715. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1716. q6core_lcl.cal_data, cal_type_info);
  1717. if (ret < 0) {
  1718. pr_err("%s: could not create cal type!\n",
  1719. __func__);
  1720. goto err;
  1721. }
  1722. return ret;
  1723. err:
  1724. q6core_delete_cal_data();
  1725. return ret;
  1726. }
  1727. static int q6core_is_avs_up(int32_t *avs_state)
  1728. {
  1729. unsigned long timeout;
  1730. int32_t adsp_ready = 0;
  1731. int ret = 0;
  1732. timeout = jiffies +
  1733. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  1734. /* sleep for 100ms before querying AVS up */
  1735. msleep(100);
  1736. do {
  1737. adsp_ready = q6core_is_adsp_ready();
  1738. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1739. adsp_ready ? "ready" : "not ready");
  1740. if (adsp_ready)
  1741. break;
  1742. /*
  1743. * ADSP will be coming up after boot up and AVS might
  1744. * not be fully up when the control reaches here.
  1745. * So, wait for 50msec before checking ADSP state again.
  1746. */
  1747. msleep(50);
  1748. } while (time_after(timeout, jiffies));
  1749. *avs_state = adsp_ready;
  1750. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1751. adsp_ready ? "ready" : "not ready");
  1752. if (!adsp_ready) {
  1753. pr_err_ratelimited("%s: Timeout. ADSP Audio is not ready\n",
  1754. __func__);
  1755. ret = -ETIMEDOUT;
  1756. }
  1757. return ret;
  1758. }
  1759. static int q6core_ssr_enable(struct device *dev, void *data)
  1760. {
  1761. int32_t avs_state = 0;
  1762. int ret = 0;
  1763. if (!dev) {
  1764. pr_err("%s: dev is NULL\n", __func__);
  1765. return -EINVAL;
  1766. }
  1767. if (!q6core_lcl.avs_state) {
  1768. ret = q6core_is_avs_up(&avs_state);
  1769. if (ret < 0)
  1770. goto err;
  1771. q6core_lcl.avs_state = avs_state;
  1772. }
  1773. err:
  1774. return ret;
  1775. }
  1776. static void q6core_ssr_disable(struct device *dev, void *data)
  1777. {
  1778. /* Reset AVS state to 0 */
  1779. q6core_lcl.avs_state = 0;
  1780. }
  1781. static const struct snd_event_ops q6core_ssr_ops = {
  1782. .enable = q6core_ssr_enable,
  1783. .disable = q6core_ssr_disable,
  1784. };
  1785. static int q6core_probe(struct platform_device *pdev)
  1786. {
  1787. int32_t avs_state = 0;
  1788. int rc = 0;
  1789. rc = q6core_is_avs_up(&avs_state);
  1790. if (rc < 0)
  1791. goto err;
  1792. q6core_lcl.avs_state = avs_state;
  1793. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1794. if (rc) {
  1795. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1796. __func__, rc);
  1797. rc = -EINVAL;
  1798. goto err;
  1799. }
  1800. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1801. rc = snd_event_client_register(&pdev->dev, &q6core_ssr_ops, NULL);
  1802. if (!rc) {
  1803. snd_event_notify(&pdev->dev, SND_EVENT_UP);
  1804. } else {
  1805. dev_err(&pdev->dev,
  1806. "%s: Registration with SND event fwk failed rc = %d\n",
  1807. __func__, rc);
  1808. rc = 0;
  1809. }
  1810. err:
  1811. return rc;
  1812. }
  1813. static int q6core_remove(struct platform_device *pdev)
  1814. {
  1815. snd_event_client_deregister(&pdev->dev);
  1816. of_platform_depopulate(&pdev->dev);
  1817. return 0;
  1818. }
  1819. static const struct of_device_id q6core_of_match[] = {
  1820. { .compatible = "qcom,q6core-audio", },
  1821. {},
  1822. };
  1823. static struct platform_driver q6core_driver = {
  1824. .probe = q6core_probe,
  1825. .remove = q6core_remove,
  1826. .driver = {
  1827. .name = "q6core_audio",
  1828. .owner = THIS_MODULE,
  1829. .of_match_table = q6core_of_match,
  1830. .suppress_bind_attrs = true,
  1831. }
  1832. };
  1833. int __init core_init(void)
  1834. {
  1835. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1836. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1837. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1838. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1839. init_waitqueue_head(&q6core_lcl.mdf_map_resp_wait);
  1840. init_waitqueue_head(&q6core_lcl.lpass_npa_rsc_wait);
  1841. init_waitqueue_head(&q6core_lcl.avcs_module_load_unload_wait);
  1842. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1843. mutex_init(&q6core_lcl.cmd_lock);
  1844. mutex_init(&q6core_lcl.ver_lock);
  1845. q6core_init_cal_data();
  1846. q6core_init_uevent_kset();
  1847. return platform_driver_register(&q6core_driver);
  1848. }
  1849. void core_exit(void)
  1850. {
  1851. mutex_destroy(&q6core_lcl.cmd_lock);
  1852. mutex_destroy(&q6core_lcl.ver_lock);
  1853. q6core_delete_cal_data();
  1854. q6core_destroy_uevent_kset();
  1855. platform_driver_unregister(&q6core_driver);
  1856. }
  1857. MODULE_DESCRIPTION("ADSP core driver");
  1858. MODULE_LICENSE("GPL v2");