rouleur.c 77 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/kernel.h>
  11. #include <linux/component.h>
  12. #include <linux/regmap.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/of_platform.h>
  15. #include <sound/soc.h>
  16. #include <sound/tlv.h>
  17. #include <soc/soundwire.h>
  18. #include <sound/soc.h>
  19. #include <sound/soc-dapm.h>
  20. #include "internal.h"
  21. #include "rouleur.h"
  22. #include <asoc/wcdcal-hwdep.h>
  23. #include "rouleur-registers.h"
  24. #include "pm2250-spmi.h"
  25. #include <asoc/msm-cdc-pinctrl.h>
  26. #include <dt-bindings/sound/audio-codec-port-types.h>
  27. #include <asoc/msm-cdc-supply.h>
  28. #include <linux/power_supply.h>
  29. #define DRV_NAME "rouleur_codec"
  30. #define NUM_SWRS_DT_PARAMS 5
  31. #define ROULEUR_VERSION_1_0 1
  32. #define ROULEUR_VERSION_ENTRY_SIZE 32
  33. #define NUM_ATTEMPTS 5
  34. #define SOC_THRESHOLD_LEVEL 25
  35. #define LOW_SOC_MBIAS_REG_MIN_VOLTAGE 2850000
  36. #define FOUNDRY_ID_SEC 0x5
  37. enum {
  38. CODEC_TX = 0,
  39. CODEC_RX,
  40. };
  41. enum {
  42. ALLOW_VPOS_DISABLE,
  43. HPH_COMP_DELAY,
  44. HPH_PA_DELAY,
  45. AMIC2_BCS_ENABLE,
  46. WCD_SUPPLIES_LPM_MODE,
  47. };
  48. /* TODO: Check on the step values */
  49. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  50. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  51. static int rouleur_handle_post_irq(void *data);
  52. static int rouleur_reset(struct device *dev, int val);
  53. static const struct regmap_irq ROULEUR_IRQs[ROULEUR_NUM_IRQS] = {
  54. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  55. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  56. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  57. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  58. REGMAP_IRQ_REG(ROULEUR_IRQ_MBHC_SW_DET, 0, 0x10),
  59. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_OCP_INT, 0, 0x20),
  60. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_CNP_INT, 0, 0x40),
  61. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_OCP_INT, 0, 0x80),
  62. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_CNP_INT, 1, 0x01),
  63. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_CNP_INT, 1, 0x02),
  64. REGMAP_IRQ_REG(ROULEUR_IRQ_EAR_OCP_INT, 1, 0x04),
  65. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_CNP_INT, 1, 0x08),
  66. REGMAP_IRQ_REG(ROULEUR_IRQ_LO_OCP_INT, 1, 0x10),
  67. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  68. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  69. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  70. REGMAP_IRQ_REG(ROULEUR_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  71. };
  72. static struct regmap_irq_chip rouleur_regmap_irq_chip = {
  73. .name = "rouleur",
  74. .irqs = ROULEUR_IRQs,
  75. .num_irqs = ARRAY_SIZE(ROULEUR_IRQs),
  76. .num_regs = 3,
  77. .status_base = ROULEUR_DIG_SWR_INTR_STATUS_0,
  78. .mask_base = ROULEUR_DIG_SWR_INTR_MASK_0,
  79. .ack_base = ROULEUR_DIG_SWR_INTR_CLEAR_0,
  80. .use_ack = 1,
  81. .type_base = ROULEUR_DIG_SWR_INTR_LEVEL_0,
  82. .runtime_pm = false,
  83. .handle_post_irq = rouleur_handle_post_irq,
  84. .irq_drv_data = NULL,
  85. };
  86. static int rouleur_handle_post_irq(void *data)
  87. {
  88. struct rouleur_priv *rouleur = data;
  89. u32 status1 = 0, status2 = 0, status3 = 0;
  90. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_0, &status1);
  91. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_1, &status2);
  92. regmap_read(rouleur->regmap, ROULEUR_DIG_SWR_INTR_STATUS_2, &status3);
  93. rouleur->tx_swr_dev->slave_irq_pending =
  94. ((status1 || status2 || status3) ? true : false);
  95. return IRQ_HANDLED;
  96. }
  97. static int rouleur_init_reg(struct snd_soc_component *component)
  98. {
  99. /* Disable HPH OCP */
  100. snd_soc_component_update_bits(component, ROULEUR_ANA_HPHPA_CNP_CTL_2,
  101. 0x03, 0x00);
  102. /* Enable surge protection */
  103. snd_soc_component_update_bits(component, ROULEUR_ANA_SURGE_EN,
  104. 0xC0, 0xC0);
  105. /* Disable mic bias pull down */
  106. snd_soc_component_update_bits(component, ROULEUR_ANA_MICBIAS_MICB_1_2_EN,
  107. 0x01, 0x00);
  108. return 0;
  109. }
  110. static int rouleur_set_port_params(struct snd_soc_component *component,
  111. u8 slv_prt_type, u8 *port_id, u8 *num_ch,
  112. u8 *ch_mask, u32 *ch_rate,
  113. u8 *port_type, u8 path)
  114. {
  115. int i, j;
  116. u8 num_ports = 0;
  117. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  118. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  119. switch (path) {
  120. case CODEC_RX:
  121. map = &rouleur->rx_port_mapping;
  122. num_ports = rouleur->num_rx_ports;
  123. break;
  124. case CODEC_TX:
  125. map = &rouleur->tx_port_mapping;
  126. num_ports = rouleur->num_tx_ports;
  127. break;
  128. default:
  129. dev_err(component->dev, "%s Invalid path: %d\n",
  130. __func__, path);
  131. return -EINVAL;
  132. }
  133. for (i = 0; i <= num_ports; i++) {
  134. for (j = 0; j < MAX_CH_PER_PORT; j++) {
  135. if ((*map)[i][j].slave_port_type == slv_prt_type)
  136. goto found;
  137. }
  138. }
  139. dev_err(component->dev, "%s Failed to find slave port for type %u\n",
  140. __func__, slv_prt_type);
  141. return -EINVAL;
  142. found:
  143. *port_id = i;
  144. *num_ch = (*map)[i][j].num_ch;
  145. *ch_mask = (*map)[i][j].ch_mask;
  146. *ch_rate = (*map)[i][j].ch_rate;
  147. *port_type = (*map)[i][j].master_port_type;
  148. return 0;
  149. }
  150. static int rouleur_parse_port_mapping(struct device *dev,
  151. char *prop, u8 path)
  152. {
  153. u32 *dt_array, map_size, map_length;
  154. u32 port_num = 0, ch_mask, ch_rate, old_port_num = 0;
  155. u32 slave_port_type, master_port_type;
  156. u32 i, ch_iter = 0;
  157. int ret = 0;
  158. u8 *num_ports = NULL;
  159. struct codec_port_info (*map)[MAX_PORT][MAX_CH_PER_PORT] = NULL;
  160. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  161. switch (path) {
  162. case CODEC_RX:
  163. map = &rouleur->rx_port_mapping;
  164. num_ports = &rouleur->num_rx_ports;
  165. break;
  166. case CODEC_TX:
  167. map = &rouleur->tx_port_mapping;
  168. num_ports = &rouleur->num_tx_ports;
  169. break;
  170. default:
  171. dev_err(dev, "%s Invalid path: %d\n",
  172. __func__, path);
  173. return -EINVAL;
  174. }
  175. if (!of_find_property(dev->of_node, prop,
  176. &map_size)) {
  177. dev_err(dev, "missing port mapping prop %s\n", prop);
  178. ret = -EINVAL;
  179. goto err;
  180. }
  181. map_length = map_size / (NUM_SWRS_DT_PARAMS * sizeof(u32));
  182. dt_array = kzalloc(map_size, GFP_KERNEL);
  183. if (!dt_array) {
  184. ret = -ENOMEM;
  185. goto err;
  186. }
  187. ret = of_property_read_u32_array(dev->of_node, prop, dt_array,
  188. NUM_SWRS_DT_PARAMS * map_length);
  189. if (ret) {
  190. dev_err(dev, "%s: Failed to read port mapping from prop %s\n",
  191. __func__, prop);
  192. ret = -EINVAL;
  193. goto err_pdata_fail;
  194. }
  195. for (i = 0; i < map_length; i++) {
  196. port_num = dt_array[NUM_SWRS_DT_PARAMS * i];
  197. slave_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 1];
  198. ch_mask = dt_array[NUM_SWRS_DT_PARAMS * i + 2];
  199. ch_rate = dt_array[NUM_SWRS_DT_PARAMS * i + 3];
  200. master_port_type = dt_array[NUM_SWRS_DT_PARAMS * i + 4];
  201. if (port_num != old_port_num)
  202. ch_iter = 0;
  203. (*map)[port_num][ch_iter].slave_port_type = slave_port_type;
  204. (*map)[port_num][ch_iter].ch_mask = ch_mask;
  205. (*map)[port_num][ch_iter].master_port_type = master_port_type;
  206. (*map)[port_num][ch_iter].num_ch = __sw_hweight8(ch_mask);
  207. (*map)[port_num][ch_iter++].ch_rate = ch_rate;
  208. old_port_num = port_num;
  209. }
  210. *num_ports = port_num;
  211. err_pdata_fail:
  212. kfree(dt_array);
  213. err:
  214. return ret;
  215. }
  216. static int rouleur_tx_connect_port(struct snd_soc_component *component,
  217. u8 slv_port_type, u8 enable)
  218. {
  219. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  220. u8 port_id;
  221. u8 num_ch;
  222. u8 ch_mask;
  223. u32 ch_rate;
  224. u8 port_type;
  225. u8 num_port = 1;
  226. int ret = 0;
  227. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  228. &num_ch, &ch_mask, &ch_rate,
  229. &port_type, CODEC_TX);
  230. if (ret) {
  231. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  232. __func__, ret);
  233. return ret;
  234. }
  235. if (enable)
  236. ret = swr_connect_port(rouleur->tx_swr_dev, &port_id,
  237. num_port, &ch_mask, &ch_rate,
  238. &num_ch, &port_type);
  239. else
  240. ret = swr_disconnect_port(rouleur->tx_swr_dev, &port_id,
  241. num_port, &ch_mask, &port_type);
  242. return ret;
  243. }
  244. static int rouleur_rx_connect_port(struct snd_soc_component *component,
  245. u8 slv_port_type, u8 enable)
  246. {
  247. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  248. u8 port_id;
  249. u8 num_ch;
  250. u8 ch_mask;
  251. u32 ch_rate;
  252. u8 port_type;
  253. u8 num_port = 1;
  254. int ret = 0;
  255. ret = rouleur_set_port_params(component, slv_port_type, &port_id,
  256. &num_ch, &ch_mask, &ch_rate,
  257. &port_type, CODEC_RX);
  258. if (ret) {
  259. dev_err(rouleur->dev, "%s:Failed to set port params: %d\n",
  260. __func__, ret);
  261. return ret;
  262. }
  263. if (enable)
  264. ret = swr_connect_port(rouleur->rx_swr_dev, &port_id,
  265. num_port, &ch_mask, &ch_rate,
  266. &num_ch, &port_type);
  267. else
  268. ret = swr_disconnect_port(rouleur->rx_swr_dev, &port_id,
  269. num_port, &ch_mask, &port_type);
  270. return ret;
  271. }
  272. int rouleur_global_mbias_enable(struct snd_soc_component *component)
  273. {
  274. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  275. mutex_lock(&rouleur->main_bias_lock);
  276. if (rouleur->mbias_cnt == 0) {
  277. snd_soc_component_update_bits(component,
  278. ROULEUR_ANA_MBIAS_EN, 0x20, 0x20);
  279. snd_soc_component_update_bits(component,
  280. ROULEUR_ANA_MBIAS_EN, 0x10, 0x10);
  281. usleep_range(1000, 1100);
  282. }
  283. rouleur->mbias_cnt++;
  284. mutex_unlock(&rouleur->main_bias_lock);
  285. return 0;
  286. }
  287. int rouleur_global_mbias_disable(struct snd_soc_component *component)
  288. {
  289. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  290. mutex_lock(&rouleur->main_bias_lock);
  291. if (rouleur->mbias_cnt == 0) {
  292. dev_dbg(rouleur->dev, "%s:mbias already disabled\n", __func__);
  293. mutex_unlock(&rouleur->main_bias_lock);
  294. return 0;
  295. }
  296. rouleur->mbias_cnt--;
  297. if (rouleur->mbias_cnt == 0) {
  298. snd_soc_component_update_bits(component,
  299. ROULEUR_ANA_MBIAS_EN, 0x10, 0x00);
  300. snd_soc_component_update_bits(component,
  301. ROULEUR_ANA_MBIAS_EN, 0x20, 0x00);
  302. }
  303. mutex_unlock(&rouleur->main_bias_lock);
  304. return 0;
  305. }
  306. static int rouleur_rx_clk_enable(struct snd_soc_component *component)
  307. {
  308. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  309. mutex_lock(&rouleur->rx_clk_lock);
  310. if (rouleur->rx_clk_cnt == 0) {
  311. snd_soc_component_update_bits(component,
  312. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x10);
  313. snd_soc_component_update_bits(component,
  314. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x20);
  315. usleep_range(5000, 5100);
  316. rouleur_global_mbias_enable(component);
  317. snd_soc_component_update_bits(component,
  318. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x11);
  319. snd_soc_component_update_bits(component,
  320. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x80);
  321. snd_soc_component_update_bits(component,
  322. ROULEUR_ANA_NCP_VCTRL, 0x07, 0x06);
  323. snd_soc_component_update_bits(component,
  324. ROULEUR_ANA_NCP_EN, 0x01, 0x01);
  325. usleep_range(500, 510);
  326. }
  327. rouleur->rx_clk_cnt++;
  328. mutex_unlock(&rouleur->rx_clk_lock);
  329. return 0;
  330. }
  331. static int rouleur_rx_clk_disable(struct snd_soc_component *component)
  332. {
  333. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  334. mutex_lock(&rouleur->rx_clk_lock);
  335. if (rouleur->rx_clk_cnt == 0) {
  336. dev_dbg(rouleur->dev, "%s:clk already disabled\n", __func__);
  337. mutex_unlock(&rouleur->rx_clk_lock);
  338. return 0;
  339. }
  340. rouleur->rx_clk_cnt--;
  341. if (rouleur->rx_clk_cnt == 0) {
  342. snd_soc_component_update_bits(component,
  343. ROULEUR_ANA_HPHPA_FSM_CLK, 0x80, 0x00);
  344. snd_soc_component_update_bits(component,
  345. ROULEUR_ANA_HPHPA_FSM_CLK, 0x7F, 0x00);
  346. snd_soc_component_update_bits(component,
  347. ROULEUR_ANA_NCP_EN, 0x01, 0x00);
  348. snd_soc_component_update_bits(component,
  349. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x20, 0x00);
  350. snd_soc_component_update_bits(component,
  351. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x10, 0x00);
  352. rouleur_global_mbias_disable(component);
  353. }
  354. mutex_unlock(&rouleur->rx_clk_lock);
  355. return 0;
  356. }
  357. /*
  358. * rouleur_soc_get_mbhc: get rouleur_mbhc handle of corresponding component
  359. * @component: handle to snd_soc_component *
  360. *
  361. * return rouleur_mbhc handle or error code in case of failure
  362. */
  363. struct rouleur_mbhc *rouleur_soc_get_mbhc(struct snd_soc_component *component)
  364. {
  365. struct rouleur_priv *rouleur;
  366. if (!component) {
  367. pr_err("%s: Invalid params, NULL component\n", __func__);
  368. return NULL;
  369. }
  370. rouleur = snd_soc_component_get_drvdata(component);
  371. if (!rouleur) {
  372. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  373. return NULL;
  374. }
  375. return rouleur->mbhc;
  376. }
  377. EXPORT_SYMBOL(rouleur_soc_get_mbhc);
  378. static int rouleur_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  379. struct snd_kcontrol *kcontrol,
  380. int event)
  381. {
  382. struct snd_soc_component *component =
  383. snd_soc_dapm_to_component(w->dapm);
  384. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  385. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  386. w->name, event);
  387. switch (event) {
  388. case SND_SOC_DAPM_PRE_PMU:
  389. rouleur_rx_clk_enable(component);
  390. snd_soc_component_update_bits(component,
  391. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  392. 0x02, 0x02);
  393. snd_soc_component_update_bits(component,
  394. ROULEUR_SWR_HPHPA_HD2,
  395. 0x38, 0x38);
  396. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  397. break;
  398. case SND_SOC_DAPM_POST_PMU:
  399. if (rouleur->comp1_enable) {
  400. snd_soc_component_update_bits(component,
  401. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  402. 0x02, 0x02);
  403. if (rouleur->comp2_enable)
  404. snd_soc_component_update_bits(component,
  405. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  406. 0x01, 0x01);
  407. /*
  408. * 5ms sleep is required after COMP is enabled as per
  409. * HW requirement
  410. */
  411. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  412. usleep_range(5000, 5100);
  413. clear_bit(HPH_COMP_DELAY,
  414. &rouleur->status_mask);
  415. }
  416. } else {
  417. snd_soc_component_update_bits(component,
  418. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  419. 0x02, 0x00);
  420. }
  421. snd_soc_component_update_bits(component,
  422. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  423. 0x80, 0x00);
  424. snd_soc_component_update_bits(component,
  425. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  426. 0x04, 0x04);
  427. snd_soc_component_update_bits(component,
  428. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x01, 0x01);
  429. break;
  430. case SND_SOC_DAPM_POST_PMD:
  431. snd_soc_component_update_bits(component,
  432. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  433. 0x01, 0x00);
  434. snd_soc_component_update_bits(component,
  435. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  436. 0x04, 0x00);
  437. snd_soc_component_update_bits(component,
  438. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  439. 0x80, 0x80);
  440. if (rouleur->comp1_enable)
  441. snd_soc_component_update_bits(component,
  442. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  443. 0x02, 0x00);
  444. break;
  445. }
  446. return 0;
  447. }
  448. static int rouleur_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  449. struct snd_kcontrol *kcontrol,
  450. int event)
  451. {
  452. struct snd_soc_component *component =
  453. snd_soc_dapm_to_component(w->dapm);
  454. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  455. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  456. w->name, event);
  457. switch (event) {
  458. case SND_SOC_DAPM_PRE_PMU:
  459. rouleur_rx_clk_enable(component);
  460. snd_soc_component_update_bits(component,
  461. ROULEUR_ANA_HPHPA_CNP_CTL_1,
  462. 0x02, 0x02);
  463. snd_soc_component_update_bits(component,
  464. ROULEUR_SWR_HPHPA_HD2,
  465. 0x07, 0x07);
  466. set_bit(HPH_COMP_DELAY, &rouleur->status_mask);
  467. break;
  468. case SND_SOC_DAPM_POST_PMU:
  469. if (rouleur->comp2_enable) {
  470. snd_soc_component_update_bits(component,
  471. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  472. 0x01, 0x01);
  473. if (rouleur->comp1_enable)
  474. snd_soc_component_update_bits(component,
  475. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  476. 0x02, 0x02);
  477. /*
  478. * 5ms sleep is required after COMP is enabled as per
  479. * HW requirement
  480. */
  481. if (test_bit(HPH_COMP_DELAY, &rouleur->status_mask)) {
  482. usleep_range(5000, 5100);
  483. clear_bit(HPH_COMP_DELAY,
  484. &rouleur->status_mask);
  485. }
  486. } else {
  487. snd_soc_component_update_bits(component,
  488. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  489. 0x01, 0x00);
  490. }
  491. snd_soc_component_update_bits(component,
  492. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  493. 0x80, 0x00);
  494. snd_soc_component_update_bits(component,
  495. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  496. 0x08, 0x08);
  497. snd_soc_component_update_bits(component,
  498. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x02);
  499. break;
  500. case SND_SOC_DAPM_POST_PMD:
  501. snd_soc_component_update_bits(component,
  502. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL, 0x02, 0x00);
  503. snd_soc_component_update_bits(component,
  504. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  505. 0x08, 0x00);
  506. snd_soc_component_update_bits(component,
  507. ROULEUR_DIG_SWR_CDC_RX1_CTL,
  508. 0x80, 0x80);
  509. if (rouleur->comp2_enable)
  510. snd_soc_component_update_bits(component,
  511. ROULEUR_DIG_SWR_CDC_COMP_CTL_0,
  512. 0x01, 0x00);
  513. break;
  514. }
  515. return 0;
  516. }
  517. static int rouleur_codec_ear_lo_dac_event(struct snd_soc_dapm_widget *w,
  518. struct snd_kcontrol *kcontrol,
  519. int event)
  520. {
  521. struct snd_soc_component *component =
  522. snd_soc_dapm_to_component(w->dapm);
  523. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  524. w->name, event);
  525. switch (event) {
  526. case SND_SOC_DAPM_PRE_PMU:
  527. rouleur_rx_clk_enable(component);
  528. snd_soc_component_update_bits(component,
  529. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  530. 0x80, 0x00);
  531. snd_soc_component_update_bits(component,
  532. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  533. 0x01, 0x01);
  534. snd_soc_component_update_bits(component,
  535. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  536. 0x04, 0x04);
  537. break;
  538. case SND_SOC_DAPM_POST_PMD:
  539. snd_soc_component_update_bits(component,
  540. ROULEUR_DIG_SWR_CDC_RX_CLK_CTL,
  541. 0x01, 0x00);
  542. snd_soc_component_update_bits(component,
  543. ROULEUR_DIG_SWR_CDC_RX_GAIN_CTL,
  544. 0x04, 0x00);
  545. snd_soc_component_update_bits(component,
  546. ROULEUR_DIG_SWR_CDC_RX0_CTL,
  547. 0x80, 0x80);
  548. break;
  549. };
  550. return 0;
  551. }
  552. static int rouleur_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  553. struct snd_kcontrol *kcontrol,
  554. int event)
  555. {
  556. struct snd_soc_component *component =
  557. snd_soc_dapm_to_component(w->dapm);
  558. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  559. int ret = 0;
  560. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  561. w->name, event);
  562. switch (event) {
  563. case SND_SOC_DAPM_PRE_PMU:
  564. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  565. rouleur->rx_swr_dev->dev_num,
  566. true);
  567. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  568. usleep_range(200, 210);
  569. /* Enable HD2 Config for HPHR if foundry id is SEC */
  570. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  571. rouleur->update_wcd_event(rouleur->handle,
  572. WCD_BOLERO_EVT_HPHR_HD2_ENABLE,
  573. 0x04);
  574. snd_soc_component_update_bits(component,
  575. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  576. 0x03, 0x03);
  577. break;
  578. case SND_SOC_DAPM_POST_PMU:
  579. /*
  580. * 5ms sleep is required after PA is enabled as per
  581. * HW requirement.
  582. */
  583. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  584. usleep_range(5000, 5100);
  585. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  586. }
  587. if (rouleur->update_wcd_event)
  588. rouleur->update_wcd_event(rouleur->handle,
  589. WCD_BOLERO_EVT_RX_MUTE,
  590. (WCD_RX2 << 0x10));
  591. wcd_enable_irq(&rouleur->irq_info,
  592. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  593. break;
  594. case SND_SOC_DAPM_PRE_PMD:
  595. wcd_disable_irq(&rouleur->irq_info,
  596. ROULEUR_IRQ_HPHR_PDM_WD_INT);
  597. if (rouleur->update_wcd_event)
  598. rouleur->update_wcd_event(rouleur->handle,
  599. WCD_BOLERO_EVT_RX_MUTE,
  600. (WCD_RX2 << 0x10 | 0x1));
  601. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  602. WCD_EVENT_PRE_HPHR_PA_OFF,
  603. &rouleur->mbhc->wcd_mbhc);
  604. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  605. break;
  606. case SND_SOC_DAPM_POST_PMD:
  607. /*
  608. * 5ms sleep is required after PA is disabled as per
  609. * HW requirement.
  610. */
  611. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  612. usleep_range(5000, 5100);
  613. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  614. }
  615. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  616. rouleur->update_wcd_event(rouleur->handle,
  617. WCD_BOLERO_EVT_HPHR_HD2_ENABLE,
  618. 0x00);
  619. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  620. WCD_EVENT_POST_HPHR_PA_OFF,
  621. &rouleur->mbhc->wcd_mbhc);
  622. snd_soc_component_update_bits(component,
  623. ROULEUR_DIG_SWR_PDM_WD_CTL1,
  624. 0x03, 0x00);
  625. break;
  626. };
  627. return ret;
  628. }
  629. static int rouleur_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  630. struct snd_kcontrol *kcontrol,
  631. int event)
  632. {
  633. struct snd_soc_component *component =
  634. snd_soc_dapm_to_component(w->dapm);
  635. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  636. int ret = 0;
  637. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  638. w->name, event);
  639. switch (event) {
  640. case SND_SOC_DAPM_PRE_PMU:
  641. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  642. rouleur->rx_swr_dev->dev_num,
  643. true);
  644. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  645. usleep_range(200, 210);
  646. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  647. rouleur->update_wcd_event(rouleur->handle,
  648. WCD_BOLERO_EVT_HPHL_HD2_ENABLE,
  649. 0x04);
  650. snd_soc_component_update_bits(component,
  651. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  652. 0x03, 0x03);
  653. break;
  654. case SND_SOC_DAPM_POST_PMU:
  655. /*
  656. * 5ms sleep is required after PA is enabled as per
  657. * HW requirement.
  658. */
  659. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  660. usleep_range(5000, 5100);
  661. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  662. }
  663. if (rouleur->update_wcd_event)
  664. rouleur->update_wcd_event(rouleur->handle,
  665. WCD_BOLERO_EVT_RX_MUTE,
  666. (WCD_RX1 << 0x10));
  667. wcd_enable_irq(&rouleur->irq_info,
  668. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  669. break;
  670. case SND_SOC_DAPM_PRE_PMD:
  671. wcd_disable_irq(&rouleur->irq_info,
  672. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  673. if (rouleur->update_wcd_event)
  674. rouleur->update_wcd_event(rouleur->handle,
  675. WCD_BOLERO_EVT_RX_MUTE,
  676. (WCD_RX1 << 0x10 | 0x1));
  677. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  678. WCD_EVENT_PRE_HPHL_PA_OFF,
  679. &rouleur->mbhc->wcd_mbhc);
  680. set_bit(HPH_PA_DELAY, &rouleur->status_mask);
  681. break;
  682. case SND_SOC_DAPM_POST_PMD:
  683. /*
  684. * 5ms sleep is required after PA is disabled as per
  685. * HW requirement.
  686. */
  687. if (test_bit(HPH_PA_DELAY, &rouleur->status_mask)) {
  688. usleep_range(5000, 5100);
  689. clear_bit(HPH_PA_DELAY, &rouleur->status_mask);
  690. }
  691. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  692. rouleur->update_wcd_event(rouleur->handle,
  693. WCD_BOLERO_EVT_HPHL_HD2_ENABLE,
  694. 0x00);
  695. blocking_notifier_call_chain(&rouleur->mbhc->notifier,
  696. WCD_EVENT_POST_HPHL_PA_OFF,
  697. &rouleur->mbhc->wcd_mbhc);
  698. snd_soc_component_update_bits(component,
  699. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  700. 0x03, 0x00);
  701. break;
  702. };
  703. return ret;
  704. }
  705. static int rouleur_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  706. struct snd_kcontrol *kcontrol,
  707. int event)
  708. {
  709. struct snd_soc_component *component =
  710. snd_soc_dapm_to_component(w->dapm);
  711. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  712. int ret = 0;
  713. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  714. w->name, event);
  715. switch (event) {
  716. case SND_SOC_DAPM_PRE_PMU:
  717. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  718. rouleur->rx_swr_dev->dev_num,
  719. true);
  720. snd_soc_component_update_bits(component,
  721. ROULEUR_ANA_COMBOPA_CTL_5,
  722. 0x04, 0x00);
  723. usleep_range(1000, 1010);
  724. snd_soc_component_update_bits(component,
  725. ROULEUR_ANA_COMBOPA_CTL_4,
  726. 0x0F, 0x0F);
  727. usleep_range(1000, 1010);
  728. snd_soc_component_update_bits(component,
  729. ROULEUR_ANA_COMBOPA_CTL,
  730. 0x40, 0x00);
  731. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  732. rouleur->update_wcd_event(rouleur->handle,
  733. WCD_BOLERO_EVT_HPHL_HD2_ENABLE,
  734. 0x04);
  735. snd_soc_component_update_bits(component,
  736. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  737. 0x03, 0x03);
  738. break;
  739. case SND_SOC_DAPM_POST_PMU:
  740. usleep_range(5000, 5100);
  741. snd_soc_component_update_bits(component,
  742. ROULEUR_ANA_COMBOPA_CTL_4,
  743. 0x0F, 0x04);
  744. if (rouleur->update_wcd_event)
  745. rouleur->update_wcd_event(rouleur->handle,
  746. WCD_BOLERO_EVT_RX_MUTE,
  747. (WCD_RX1 << 0x10));
  748. wcd_enable_irq(&rouleur->irq_info,
  749. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  750. break;
  751. case SND_SOC_DAPM_PRE_PMD:
  752. wcd_disable_irq(&rouleur->irq_info,
  753. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  754. if (rouleur->update_wcd_event)
  755. rouleur->update_wcd_event(rouleur->handle,
  756. WCD_BOLERO_EVT_RX_MUTE,
  757. (WCD_RX1 << 0x10 | 0x1));
  758. break;
  759. case SND_SOC_DAPM_POST_PMD:
  760. usleep_range(5000, 5100);
  761. if (rouleur->foundry_id == FOUNDRY_ID_SEC)
  762. rouleur->update_wcd_event(rouleur->handle,
  763. WCD_BOLERO_EVT_HPHL_HD2_ENABLE,
  764. 0x00);
  765. snd_soc_component_update_bits(component,
  766. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  767. 0x03, 0x00);
  768. };
  769. return ret;
  770. }
  771. static int rouleur_codec_enable_lo_pa(struct snd_soc_dapm_widget *w,
  772. struct snd_kcontrol *kcontrol,
  773. int event)
  774. {
  775. struct snd_soc_component *component =
  776. snd_soc_dapm_to_component(w->dapm);
  777. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  778. int ret = 0;
  779. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  780. w->name, event);
  781. switch (event) {
  782. case SND_SOC_DAPM_PRE_PMU:
  783. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  784. rouleur->rx_swr_dev->dev_num,
  785. true);
  786. snd_soc_component_update_bits(component,
  787. ROULEUR_ANA_COMBOPA_CTL_5,
  788. 0x04, 0x00);
  789. usleep_range(1000, 1010);
  790. snd_soc_component_update_bits(component,
  791. ROULEUR_ANA_COMBOPA_CTL_4,
  792. 0x0F, 0x0F);
  793. usleep_range(1000, 1010);
  794. snd_soc_component_update_bits(component,
  795. ROULEUR_ANA_COMBOPA_CTL,
  796. 0x40, 0x40);
  797. snd_soc_component_update_bits(component,
  798. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  799. 0x03, 0x03);
  800. break;
  801. case SND_SOC_DAPM_POST_PMU:
  802. usleep_range(5000, 5100);
  803. snd_soc_component_update_bits(component,
  804. ROULEUR_ANA_COMBOPA_CTL_4,
  805. 0x0F, 0x04);
  806. if (rouleur->update_wcd_event)
  807. rouleur->update_wcd_event(rouleur->handle,
  808. WCD_BOLERO_EVT_RX_MUTE,
  809. (WCD_RX1 << 0x10));
  810. wcd_enable_irq(&rouleur->irq_info,
  811. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  812. break;
  813. case SND_SOC_DAPM_PRE_PMD:
  814. wcd_disable_irq(&rouleur->irq_info,
  815. ROULEUR_IRQ_HPHL_PDM_WD_INT);
  816. if (rouleur->update_wcd_event)
  817. rouleur->update_wcd_event(rouleur->handle,
  818. WCD_BOLERO_EVT_RX_MUTE,
  819. (WCD_RX1 << 0x10 | 0x1));
  820. break;
  821. case SND_SOC_DAPM_POST_PMD:
  822. snd_soc_component_update_bits(component,
  823. ROULEUR_ANA_COMBOPA_CTL,
  824. 0x40, 0x00);
  825. usleep_range(5000, 5100);
  826. snd_soc_component_update_bits(component,
  827. ROULEUR_DIG_SWR_PDM_WD_CTL0,
  828. 0x03, 0x00);
  829. };
  830. return ret;
  831. }
  832. static int rouleur_enable_rx1(struct snd_soc_dapm_widget *w,
  833. struct snd_kcontrol *kcontrol,
  834. int event)
  835. {
  836. struct snd_soc_component *component =
  837. snd_soc_dapm_to_component(w->dapm);
  838. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  839. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  840. w->name, event);
  841. switch (event) {
  842. case SND_SOC_DAPM_PRE_PMU:
  843. rouleur_rx_connect_port(component, HPH_L, true);
  844. if (rouleur->comp1_enable)
  845. rouleur_rx_connect_port(component, COMP_L, true);
  846. break;
  847. case SND_SOC_DAPM_POST_PMD:
  848. rouleur_rx_connect_port(component, HPH_L, false);
  849. if (rouleur->comp1_enable)
  850. rouleur_rx_connect_port(component, COMP_L, false);
  851. rouleur_rx_clk_disable(component);
  852. break;
  853. };
  854. return 0;
  855. }
  856. static int rouleur_enable_rx2(struct snd_soc_dapm_widget *w,
  857. struct snd_kcontrol *kcontrol, int event)
  858. {
  859. struct snd_soc_component *component =
  860. snd_soc_dapm_to_component(w->dapm);
  861. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  862. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  863. w->name, event);
  864. switch (event) {
  865. case SND_SOC_DAPM_PRE_PMU:
  866. rouleur_rx_connect_port(component, HPH_R, true);
  867. if (rouleur->comp2_enable)
  868. rouleur_rx_connect_port(component, COMP_R, true);
  869. break;
  870. case SND_SOC_DAPM_POST_PMD:
  871. rouleur_rx_connect_port(component, HPH_R, false);
  872. if (rouleur->comp2_enable)
  873. rouleur_rx_connect_port(component, COMP_R, false);
  874. rouleur_rx_clk_disable(component);
  875. break;
  876. };
  877. return 0;
  878. }
  879. static int rouleur_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  880. struct snd_kcontrol *kcontrol,
  881. int event)
  882. {
  883. struct snd_soc_component *component =
  884. snd_soc_dapm_to_component(w->dapm);
  885. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  886. u16 dmic_clk_reg;
  887. s32 *dmic_clk_cnt;
  888. unsigned int dmic;
  889. char *wname;
  890. int ret = 0;
  891. wname = strpbrk(w->name, "01");
  892. if (!wname) {
  893. dev_err(component->dev, "%s: widget not found\n", __func__);
  894. return -EINVAL;
  895. }
  896. ret = kstrtouint(wname, 10, &dmic);
  897. if (ret < 0) {
  898. dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
  899. __func__);
  900. return -EINVAL;
  901. }
  902. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  903. w->name, event);
  904. switch (dmic) {
  905. case 0:
  906. case 1:
  907. dmic_clk_cnt = &(rouleur->dmic_0_1_clk_cnt);
  908. dmic_clk_reg = ROULEUR_DIG_SWR_CDC_DMIC1_CTL;
  909. break;
  910. default:
  911. dev_err(component->dev, "%s: Invalid DMIC Selection\n",
  912. __func__);
  913. return -EINVAL;
  914. };
  915. dev_dbg(component->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  916. __func__, event, dmic, *dmic_clk_cnt);
  917. switch (event) {
  918. case SND_SOC_DAPM_PRE_PMU:
  919. snd_soc_component_update_bits(component,
  920. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x00);
  921. snd_soc_component_update_bits(component,
  922. dmic_clk_reg, 0x08, 0x08);
  923. rouleur_tx_connect_port(component, DMIC0 + (w->shift), true);
  924. break;
  925. case SND_SOC_DAPM_POST_PMD:
  926. rouleur_tx_connect_port(component, DMIC0 + (w->shift), false);
  927. snd_soc_component_update_bits(component,
  928. dmic_clk_reg, 0x08, 0x00);
  929. snd_soc_component_update_bits(component,
  930. ROULEUR_DIG_SWR_CDC_AMIC_CTL, 0x02, 0x02);
  931. break;
  932. };
  933. return 0;
  934. }
  935. static int rouleur_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
  936. struct snd_kcontrol *kcontrol,
  937. int event)
  938. {
  939. struct snd_soc_component *component =
  940. snd_soc_dapm_to_component(w->dapm);
  941. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  942. int ret = 0;
  943. switch (event) {
  944. case SND_SOC_DAPM_PRE_PMU:
  945. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  946. rouleur->tx_swr_dev->dev_num,
  947. true);
  948. break;
  949. case SND_SOC_DAPM_POST_PMD:
  950. ret = swr_slvdev_datapath_control(rouleur->tx_swr_dev,
  951. rouleur->tx_swr_dev->dev_num,
  952. false);
  953. break;
  954. };
  955. return ret;
  956. }
  957. static int rouleur_codec_enable_adc(struct snd_soc_dapm_widget *w,
  958. struct snd_kcontrol *kcontrol,
  959. int event)
  960. {
  961. struct snd_soc_component *component =
  962. snd_soc_dapm_to_component(w->dapm);
  963. struct rouleur_priv *rouleur =
  964. snd_soc_component_get_drvdata(component);
  965. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  966. w->name, event);
  967. switch (event) {
  968. case SND_SOC_DAPM_PRE_PMU:
  969. /* Enable BCS for Headset mic */
  970. if (w->shift == 1 && !(snd_soc_component_read32(component,
  971. ROULEUR_ANA_TX_AMIC2) & 0x10)) {
  972. rouleur_tx_connect_port(component, MBHC, true);
  973. set_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  974. }
  975. rouleur_tx_connect_port(component, ADC1 + (w->shift), true);
  976. rouleur_global_mbias_enable(component);
  977. if (w->shift)
  978. snd_soc_component_update_bits(component,
  979. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  980. 0x30, 0x30);
  981. else
  982. snd_soc_component_update_bits(component,
  983. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  984. 0x03, 0x03);
  985. break;
  986. case SND_SOC_DAPM_POST_PMD:
  987. rouleur_tx_connect_port(component, ADC1 + (w->shift), false);
  988. if (w->shift == 1 &&
  989. test_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask)) {
  990. rouleur_tx_connect_port(component, MBHC, false);
  991. clear_bit(AMIC2_BCS_ENABLE, &rouleur->status_mask);
  992. }
  993. if (w->shift)
  994. snd_soc_component_update_bits(component,
  995. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  996. 0x30, 0x00);
  997. else
  998. snd_soc_component_update_bits(component,
  999. ROULEUR_DIG_SWR_CDC_TX_ANA_MODE_0_1,
  1000. 0x03, 0x00);
  1001. rouleur_global_mbias_disable(component);
  1002. break;
  1003. };
  1004. return 0;
  1005. }
  1006. /*
  1007. * rouleur_get_micb_vout_ctl_val: converts micbias from volts to register value
  1008. * @micb_mv: micbias in mv
  1009. *
  1010. * return register value converted
  1011. */
  1012. int rouleur_get_micb_vout_ctl_val(u32 micb_mv)
  1013. {
  1014. /* min micbias voltage is 1.6V and maximum is 2.85V */
  1015. if (micb_mv < 1600 || micb_mv > 2850) {
  1016. pr_err("%s: unsupported micbias voltage\n", __func__);
  1017. return -EINVAL;
  1018. }
  1019. return (micb_mv - 1600) / 50;
  1020. }
  1021. EXPORT_SYMBOL(rouleur_get_micb_vout_ctl_val);
  1022. /*
  1023. * rouleur_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  1024. * @component: handle to snd_soc_component *
  1025. * @req_volt: micbias voltage to be set
  1026. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  1027. *
  1028. * return 0 if adjustment is success or error code in case of failure
  1029. */
  1030. int rouleur_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  1031. int req_volt, int micb_num)
  1032. {
  1033. struct rouleur_priv *rouleur =
  1034. snd_soc_component_get_drvdata(component);
  1035. int cur_vout_ctl, req_vout_ctl;
  1036. int micb_reg, micb_val, micb_en;
  1037. int ret = 0;
  1038. int pullup_mask;
  1039. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1040. switch (micb_num) {
  1041. case MIC_BIAS_1:
  1042. micb_val = snd_soc_component_read32(component, micb_reg);
  1043. micb_en = (micb_val & 0x40) >> 6;
  1044. pullup_mask = 0x20;
  1045. break;
  1046. case MIC_BIAS_2:
  1047. micb_val = snd_soc_component_read32(component, micb_reg);
  1048. micb_en = (micb_val & 0x04) >> 2;
  1049. pullup_mask = 0x02;
  1050. break;
  1051. case MIC_BIAS_3:
  1052. default:
  1053. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1054. __func__, micb_num);
  1055. return -EINVAL;
  1056. }
  1057. mutex_lock(&rouleur->micb_lock);
  1058. /*
  1059. * If requested micbias voltage is same as current micbias
  1060. * voltage, then just return. Otherwise, adjust voltage as
  1061. * per requested value. If micbias is already enabled, then
  1062. * to avoid slow micbias ramp-up or down enable pull-up
  1063. * momentarily, change the micbias value and then re-enable
  1064. * micbias.
  1065. */
  1066. cur_vout_ctl = (snd_soc_component_read32(component,
  1067. ROULEUR_ANA_MICBIAS_LDO_1_SETTING)) & 0xF8;
  1068. cur_vout_ctl = cur_vout_ctl >> 3;
  1069. req_vout_ctl = rouleur_get_micb_vout_ctl_val(req_volt);
  1070. if (req_vout_ctl < 0) {
  1071. ret = -EINVAL;
  1072. goto exit;
  1073. }
  1074. if (cur_vout_ctl == req_vout_ctl) {
  1075. ret = 0;
  1076. goto exit;
  1077. }
  1078. dev_dbg(component->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  1079. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  1080. req_volt, micb_en);
  1081. if (micb_en == 0x1)
  1082. snd_soc_component_update_bits(component, micb_reg, pullup_mask,
  1083. pullup_mask);
  1084. snd_soc_component_update_bits(component,
  1085. ROULEUR_ANA_MICBIAS_LDO_1_SETTING, 0xF8, req_vout_ctl << 3);
  1086. if (micb_en == 0x1) {
  1087. snd_soc_component_update_bits(component, micb_reg,
  1088. pullup_mask, 0x00);
  1089. /*
  1090. * Add 2ms delay as per HW requirement after enabling
  1091. * micbias
  1092. */
  1093. usleep_range(2000, 2100);
  1094. }
  1095. exit:
  1096. mutex_unlock(&rouleur->micb_lock);
  1097. return ret;
  1098. }
  1099. EXPORT_SYMBOL(rouleur_mbhc_micb_adjust_voltage);
  1100. int rouleur_micbias_control(struct snd_soc_component *component,
  1101. int micb_num, int req, bool is_dapm)
  1102. {
  1103. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1104. int micb_index = micb_num - 1;
  1105. u16 micb_reg;
  1106. int pre_off_event = 0, post_off_event = 0;
  1107. int post_on_event = 0, post_dapm_off = 0;
  1108. int post_dapm_on = 0;
  1109. u8 pullup_mask = 0, enable_mask = 0;
  1110. int ret = 0;
  1111. if ((micb_index < 0) || (micb_index > ROULEUR_MAX_MICBIAS - 1)) {
  1112. dev_err(component->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  1113. __func__, micb_index);
  1114. return -EINVAL;
  1115. }
  1116. switch (micb_num) {
  1117. case MIC_BIAS_1:
  1118. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1119. pullup_mask = 0x20;
  1120. enable_mask = 0x40;
  1121. break;
  1122. case MIC_BIAS_2:
  1123. micb_reg = ROULEUR_ANA_MICBIAS_MICB_1_2_EN;
  1124. pullup_mask = 0x02;
  1125. enable_mask = 0x04;
  1126. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  1127. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  1128. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  1129. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  1130. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  1131. break;
  1132. case MIC_BIAS_3:
  1133. micb_reg = ROULEUR_ANA_MICBIAS_MICB_3_EN;
  1134. pullup_mask = 0x02;
  1135. break;
  1136. default:
  1137. dev_err(component->dev, "%s: Invalid micbias number: %d\n",
  1138. __func__, micb_num);
  1139. return -EINVAL;
  1140. };
  1141. mutex_lock(&rouleur->micb_lock);
  1142. switch (req) {
  1143. case MICB_PULLUP_ENABLE:
  1144. if (!rouleur->dev_up) {
  1145. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1146. __func__, req);
  1147. ret = -ENODEV;
  1148. goto done;
  1149. }
  1150. rouleur->pullup_ref[micb_index]++;
  1151. if ((rouleur->pullup_ref[micb_index] == 1) &&
  1152. (rouleur->micb_ref[micb_index] == 0))
  1153. snd_soc_component_update_bits(component, micb_reg,
  1154. pullup_mask, pullup_mask);
  1155. break;
  1156. case MICB_PULLUP_DISABLE:
  1157. if (!rouleur->dev_up) {
  1158. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1159. __func__, req);
  1160. ret = -ENODEV;
  1161. goto done;
  1162. }
  1163. if (rouleur->pullup_ref[micb_index] > 0)
  1164. rouleur->pullup_ref[micb_index]--;
  1165. if ((rouleur->pullup_ref[micb_index] == 0) &&
  1166. (rouleur->micb_ref[micb_index] == 0))
  1167. snd_soc_component_update_bits(component, micb_reg,
  1168. pullup_mask, 0x00);
  1169. break;
  1170. case MICB_ENABLE:
  1171. if (!rouleur->dev_up) {
  1172. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1173. __func__, req);
  1174. ret = -ENODEV;
  1175. goto done;
  1176. }
  1177. rouleur->micb_ref[micb_index]++;
  1178. if (rouleur->micb_ref[micb_index] == 1) {
  1179. rouleur_global_mbias_enable(component);
  1180. snd_soc_component_update_bits(component,
  1181. micb_reg, enable_mask, enable_mask);
  1182. if (post_on_event)
  1183. blocking_notifier_call_chain(
  1184. &rouleur->mbhc->notifier, post_on_event,
  1185. &rouleur->mbhc->wcd_mbhc);
  1186. }
  1187. if (is_dapm && post_dapm_on && rouleur->mbhc)
  1188. blocking_notifier_call_chain(
  1189. &rouleur->mbhc->notifier, post_dapm_on,
  1190. &rouleur->mbhc->wcd_mbhc);
  1191. break;
  1192. case MICB_DISABLE:
  1193. if (rouleur->micb_ref[micb_index] > 0)
  1194. rouleur->micb_ref[micb_index]--;
  1195. if (!rouleur->dev_up) {
  1196. dev_dbg(component->dev, "%s: enable req %d wcd device down\n",
  1197. __func__, req);
  1198. ret = -ENODEV;
  1199. goto done;
  1200. }
  1201. if ((rouleur->micb_ref[micb_index] == 0) &&
  1202. (rouleur->pullup_ref[micb_index] > 0)) {
  1203. snd_soc_component_update_bits(component, micb_reg,
  1204. pullup_mask, pullup_mask);
  1205. snd_soc_component_update_bits(component, micb_reg,
  1206. enable_mask, 0x00);
  1207. rouleur_global_mbias_disable(component);
  1208. } else if ((rouleur->micb_ref[micb_index] == 0) &&
  1209. (rouleur->pullup_ref[micb_index] == 0)) {
  1210. if (pre_off_event && rouleur->mbhc)
  1211. blocking_notifier_call_chain(
  1212. &rouleur->mbhc->notifier, pre_off_event,
  1213. &rouleur->mbhc->wcd_mbhc);
  1214. snd_soc_component_update_bits(component, micb_reg,
  1215. enable_mask, 0x00);
  1216. rouleur_global_mbias_disable(component);
  1217. if (post_off_event && rouleur->mbhc)
  1218. blocking_notifier_call_chain(
  1219. &rouleur->mbhc->notifier,
  1220. post_off_event,
  1221. &rouleur->mbhc->wcd_mbhc);
  1222. }
  1223. if (is_dapm && post_dapm_off && rouleur->mbhc)
  1224. blocking_notifier_call_chain(
  1225. &rouleur->mbhc->notifier, post_dapm_off,
  1226. &rouleur->mbhc->wcd_mbhc);
  1227. break;
  1228. };
  1229. dev_dbg(component->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  1230. __func__, micb_num, rouleur->micb_ref[micb_index],
  1231. rouleur->pullup_ref[micb_index]);
  1232. done:
  1233. mutex_unlock(&rouleur->micb_lock);
  1234. return 0;
  1235. }
  1236. EXPORT_SYMBOL(rouleur_micbias_control);
  1237. void rouleur_disable_bcs_before_slow_insert(struct snd_soc_component *component,
  1238. bool bcs_disable)
  1239. {
  1240. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1241. if (rouleur->update_wcd_event) {
  1242. if (bcs_disable)
  1243. rouleur->update_wcd_event(rouleur->handle,
  1244. WCD_BOLERO_EVT_BCS_CLK_OFF, 0);
  1245. else
  1246. rouleur->update_wcd_event(rouleur->handle,
  1247. WCD_BOLERO_EVT_BCS_CLK_OFF, 1);
  1248. }
  1249. }
  1250. static int rouleur_get_logical_addr(struct swr_device *swr_dev)
  1251. {
  1252. int ret = 0;
  1253. uint8_t devnum = 0;
  1254. int num_retry = NUM_ATTEMPTS;
  1255. do {
  1256. ret = swr_get_logical_dev_num(swr_dev, swr_dev->addr, &devnum);
  1257. if (ret) {
  1258. dev_err(&swr_dev->dev,
  1259. "%s get devnum %d for dev addr %lx failed\n",
  1260. __func__, devnum, swr_dev->addr);
  1261. /* retry after 1ms */
  1262. usleep_range(1000, 1010);
  1263. }
  1264. } while (ret && --num_retry);
  1265. swr_dev->dev_num = devnum;
  1266. return 0;
  1267. }
  1268. static bool get_usbc_hs_status(struct snd_soc_component *component,
  1269. struct wcd_mbhc_config *mbhc_cfg)
  1270. {
  1271. if (mbhc_cfg->enable_usbc_analog) {
  1272. if (!(snd_soc_component_read32(component, ROULEUR_ANA_MBHC_MECH)
  1273. & 0x20))
  1274. return true;
  1275. }
  1276. return false;
  1277. }
  1278. static int rouleur_event_notify(struct notifier_block *block,
  1279. unsigned long val,
  1280. void *data)
  1281. {
  1282. u16 event = (val & 0xffff);
  1283. int ret = 0;
  1284. struct rouleur_priv *rouleur = dev_get_drvdata((struct device *)data);
  1285. struct snd_soc_component *component = rouleur->component;
  1286. struct wcd_mbhc *mbhc;
  1287. switch (event) {
  1288. case BOLERO_WCD_EVT_PA_OFF_PRE_SSR:
  1289. snd_soc_component_update_bits(component,
  1290. ROULEUR_ANA_HPHPA_CNP_CTL_2,
  1291. 0xC0, 0x00);
  1292. snd_soc_component_update_bits(component,
  1293. ROULEUR_ANA_COMBOPA_CTL,
  1294. 0x40, 0x00);
  1295. snd_soc_component_update_bits(component,
  1296. ROULEUR_ANA_COMBOPA_CTL,
  1297. 0x80, 0x00);
  1298. snd_soc_component_update_bits(component,
  1299. ROULEUR_ANA_COMBOPA_CTL,
  1300. 0x40, 0x40);
  1301. snd_soc_component_update_bits(component,
  1302. ROULEUR_ANA_COMBOPA_CTL,
  1303. 0x80, 0x00);
  1304. break;
  1305. case BOLERO_WCD_EVT_SSR_DOWN:
  1306. rouleur->dev_up = false;
  1307. rouleur->mbhc->wcd_mbhc.deinit_in_progress = true;
  1308. mbhc = &rouleur->mbhc->wcd_mbhc;
  1309. rouleur->usbc_hs_status = get_usbc_hs_status(component,
  1310. mbhc->mbhc_cfg);
  1311. rouleur_mbhc_ssr_down(rouleur->mbhc, component);
  1312. rouleur_reset(rouleur->dev, 0x01);
  1313. break;
  1314. case BOLERO_WCD_EVT_SSR_UP:
  1315. rouleur_reset(rouleur->dev, 0x00);
  1316. /* allow reset to take effect */
  1317. usleep_range(10000, 10010);
  1318. rouleur_get_logical_addr(rouleur->tx_swr_dev);
  1319. rouleur_get_logical_addr(rouleur->rx_swr_dev);
  1320. rouleur_init_reg(component);
  1321. regcache_mark_dirty(rouleur->regmap);
  1322. regcache_sync(rouleur->regmap);
  1323. rouleur->dev_up = true;
  1324. /* Initialize MBHC module */
  1325. mbhc = &rouleur->mbhc->wcd_mbhc;
  1326. ret = rouleur_mbhc_post_ssr_init(rouleur->mbhc, component);
  1327. if (ret) {
  1328. dev_err(component->dev, "%s: mbhc initialization failed\n",
  1329. __func__);
  1330. } else {
  1331. rouleur_mbhc_hs_detect(component, mbhc->mbhc_cfg);
  1332. if (rouleur->usbc_hs_status)
  1333. mdelay(500);
  1334. }
  1335. rouleur->mbhc->wcd_mbhc.deinit_in_progress = false;
  1336. break;
  1337. default:
  1338. dev_err(component->dev, "%s: invalid event %d\n", __func__,
  1339. event);
  1340. break;
  1341. }
  1342. return 0;
  1343. }
  1344. static int __rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1345. int event)
  1346. {
  1347. struct snd_soc_component *component =
  1348. snd_soc_dapm_to_component(w->dapm);
  1349. int micb_num;
  1350. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1351. __func__, w->name, event);
  1352. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  1353. micb_num = MIC_BIAS_1;
  1354. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  1355. micb_num = MIC_BIAS_2;
  1356. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  1357. micb_num = MIC_BIAS_3;
  1358. else
  1359. return -EINVAL;
  1360. switch (event) {
  1361. case SND_SOC_DAPM_PRE_PMU:
  1362. /* Micbias LD0 enable not supported for MicBias 3*/
  1363. if (micb_num == MIC_BIAS_3)
  1364. rouleur_micbias_control(component, micb_num,
  1365. MICB_PULLUP_ENABLE, true);
  1366. else
  1367. rouleur_micbias_control(component, micb_num,
  1368. MICB_ENABLE, true);
  1369. break;
  1370. case SND_SOC_DAPM_POST_PMU:
  1371. usleep_range(1000, 1100);
  1372. break;
  1373. case SND_SOC_DAPM_POST_PMD:
  1374. if (micb_num == MIC_BIAS_3)
  1375. rouleur_micbias_control(component, micb_num,
  1376. MICB_PULLUP_DISABLE, true);
  1377. else
  1378. rouleur_micbias_control(component, micb_num,
  1379. MICB_DISABLE, true);
  1380. break;
  1381. };
  1382. return 0;
  1383. }
  1384. static int rouleur_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1385. struct snd_kcontrol *kcontrol,
  1386. int event)
  1387. {
  1388. return __rouleur_codec_enable_micbias(w, event);
  1389. }
  1390. static int __rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1391. int event)
  1392. {
  1393. struct snd_soc_component *component =
  1394. snd_soc_dapm_to_component(w->dapm);
  1395. int micb_num;
  1396. dev_dbg(component->dev, "%s: wname: %s, event: %d\n",
  1397. __func__, w->name, event);
  1398. if (strnstr(w->name, "VA MIC BIAS1", sizeof("VA MIC BIAS1")))
  1399. micb_num = MIC_BIAS_1;
  1400. else if (strnstr(w->name, "VA MIC BIAS2", sizeof("VA MIC BIAS2")))
  1401. micb_num = MIC_BIAS_2;
  1402. else if (strnstr(w->name, "VA MIC BIAS3", sizeof("VA MIC BIAS3")))
  1403. micb_num = MIC_BIAS_3;
  1404. else
  1405. return -EINVAL;
  1406. switch (event) {
  1407. case SND_SOC_DAPM_PRE_PMU:
  1408. rouleur_micbias_control(component, micb_num,
  1409. MICB_PULLUP_ENABLE, true);
  1410. break;
  1411. case SND_SOC_DAPM_POST_PMU:
  1412. /* 1 msec delay as per HW requirement */
  1413. usleep_range(1000, 1100);
  1414. break;
  1415. case SND_SOC_DAPM_POST_PMD:
  1416. rouleur_micbias_control(component, micb_num,
  1417. MICB_PULLUP_DISABLE, true);
  1418. break;
  1419. };
  1420. return 0;
  1421. }
  1422. static int rouleur_codec_enable_micbias_pullup(struct snd_soc_dapm_widget *w,
  1423. struct snd_kcontrol *kcontrol,
  1424. int event)
  1425. {
  1426. return __rouleur_codec_enable_micbias_pullup(w, event);
  1427. }
  1428. static int rouleur_get_compander(struct snd_kcontrol *kcontrol,
  1429. struct snd_ctl_elem_value *ucontrol)
  1430. {
  1431. struct snd_soc_component *component =
  1432. snd_soc_kcontrol_component(kcontrol);
  1433. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1434. bool hphr;
  1435. struct soc_multi_mixer_control *mc;
  1436. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1437. hphr = mc->shift;
  1438. ucontrol->value.integer.value[0] = hphr ? rouleur->comp2_enable :
  1439. rouleur->comp1_enable;
  1440. return 0;
  1441. }
  1442. static int rouleur_set_compander(struct snd_kcontrol *kcontrol,
  1443. struct snd_ctl_elem_value *ucontrol)
  1444. {
  1445. struct snd_soc_component *component =
  1446. snd_soc_kcontrol_component(kcontrol);
  1447. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1448. int value = ucontrol->value.integer.value[0];
  1449. bool hphr;
  1450. struct soc_multi_mixer_control *mc;
  1451. mc = (struct soc_multi_mixer_control *)(kcontrol->private_value);
  1452. hphr = mc->shift;
  1453. if (hphr)
  1454. rouleur->comp2_enable = value;
  1455. else
  1456. rouleur->comp1_enable = value;
  1457. return 0;
  1458. }
  1459. static int rouleur_codec_enable_pa_vpos(struct snd_soc_dapm_widget *w,
  1460. struct snd_kcontrol *kcontrol,
  1461. int event)
  1462. {
  1463. struct snd_soc_component *component =
  1464. snd_soc_dapm_to_component(w->dapm);
  1465. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1466. struct rouleur_pdata *pdata = NULL;
  1467. int ret = 0;
  1468. pdata = dev_get_platdata(rouleur->dev);
  1469. if (!pdata) {
  1470. dev_err(component->dev, "%s: pdata is NULL\n", __func__);
  1471. return -EINVAL;
  1472. }
  1473. dev_dbg(component->dev, "%s wname: %s event: %d\n", __func__,
  1474. w->name, event);
  1475. switch (event) {
  1476. case SND_SOC_DAPM_PRE_PMU:
  1477. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  1478. dev_dbg(component->dev,
  1479. "%s: vpos already in enabled state\n",
  1480. __func__);
  1481. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1482. return 0;
  1483. }
  1484. ret = msm_cdc_enable_ondemand_supply(rouleur->dev,
  1485. rouleur->supplies,
  1486. pdata->regulator,
  1487. pdata->num_supplies,
  1488. "cdc-pa-vpos");
  1489. if (ret == -EINVAL) {
  1490. dev_err(component->dev, "%s: pa vpos is not enabled\n",
  1491. __func__);
  1492. return ret;
  1493. }
  1494. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1495. /*
  1496. * 200us sleep is required after LDO15 is enabled as per
  1497. * HW requirement
  1498. */
  1499. usleep_range(200, 250);
  1500. break;
  1501. case SND_SOC_DAPM_POST_PMD:
  1502. set_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  1503. ret = swr_slvdev_datapath_control(rouleur->rx_swr_dev,
  1504. rouleur->rx_swr_dev->dev_num,
  1505. false);
  1506. break;
  1507. }
  1508. return 0;
  1509. }
  1510. static const struct snd_kcontrol_new rouleur_snd_controls[] = {
  1511. SOC_SINGLE_EXT("HPHL_COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1512. rouleur_get_compander, rouleur_set_compander),
  1513. SOC_SINGLE_EXT("HPHR_COMP Switch", SND_SOC_NOPM, 1, 1, 0,
  1514. rouleur_get_compander, rouleur_set_compander),
  1515. SOC_SINGLE_TLV("HPHL Volume", ROULEUR_ANA_HPHPA_L_GAIN, 0, 20, 1,
  1516. line_gain),
  1517. SOC_SINGLE_TLV("HPHR Volume", ROULEUR_ANA_HPHPA_R_GAIN, 0, 20, 1,
  1518. line_gain),
  1519. SOC_SINGLE_TLV("ADC1 Volume", ROULEUR_ANA_TX_AMIC1, 0, 8, 0,
  1520. analog_gain),
  1521. SOC_SINGLE_TLV("ADC2 Volume", ROULEUR_ANA_TX_AMIC2, 0, 8, 0,
  1522. analog_gain),
  1523. };
  1524. static const struct snd_kcontrol_new adc1_switch[] = {
  1525. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1526. };
  1527. static const struct snd_kcontrol_new adc2_switch[] = {
  1528. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1529. };
  1530. static const struct snd_kcontrol_new dmic1_switch[] = {
  1531. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1532. };
  1533. static const struct snd_kcontrol_new dmic2_switch[] = {
  1534. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1535. };
  1536. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  1537. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1538. };
  1539. static const struct snd_kcontrol_new lo_rdac_switch[] = {
  1540. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1541. };
  1542. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  1543. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1544. };
  1545. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  1546. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1547. };
  1548. static const char * const adc2_mux_text[] = {
  1549. "INP2", "INP3"
  1550. };
  1551. static const struct soc_enum adc2_enum =
  1552. SOC_ENUM_SINGLE(ROULEUR_ANA_TX_AMIC2, 4,
  1553. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  1554. static const struct snd_kcontrol_new tx_adc2_mux =
  1555. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  1556. static const struct snd_soc_dapm_widget rouleur_dapm_widgets[] = {
  1557. /*input widgets*/
  1558. SND_SOC_DAPM_INPUT("AMIC1"),
  1559. SND_SOC_DAPM_INPUT("AMIC2"),
  1560. SND_SOC_DAPM_INPUT("AMIC3"),
  1561. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  1562. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  1563. /*tx widgets*/
  1564. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  1565. rouleur_codec_enable_adc,
  1566. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1567. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 1, 0,
  1568. rouleur_codec_enable_adc,
  1569. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1570. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  1571. &tx_adc2_mux),
  1572. /*tx mixers*/
  1573. SND_SOC_DAPM_MIXER_E("ADC1_MIXER", SND_SOC_NOPM, 0, 0,
  1574. adc1_switch, ARRAY_SIZE(adc1_switch),
  1575. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1576. SND_SOC_DAPM_POST_PMD),
  1577. SND_SOC_DAPM_MIXER_E("ADC2_MIXER", SND_SOC_NOPM, 0, 0,
  1578. adc2_switch, ARRAY_SIZE(adc2_switch),
  1579. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1580. SND_SOC_DAPM_POST_PMD),
  1581. /* micbias widgets*/
  1582. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1583. rouleur_codec_enable_micbias,
  1584. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1585. SND_SOC_DAPM_POST_PMD),
  1586. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1587. rouleur_codec_enable_micbias,
  1588. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1589. SND_SOC_DAPM_POST_PMD),
  1590. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1591. rouleur_codec_enable_micbias,
  1592. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1593. SND_SOC_DAPM_POST_PMD),
  1594. SND_SOC_DAPM_SUPPLY("PA_VPOS", SND_SOC_NOPM, 0, 0,
  1595. rouleur_codec_enable_pa_vpos,
  1596. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1597. /*rx widgets*/
  1598. SND_SOC_DAPM_PGA_E("EAR PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1599. rouleur_codec_enable_ear_pa,
  1600. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1601. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1602. SND_SOC_DAPM_PGA_E("LO PGA", ROULEUR_ANA_COMBOPA_CTL, 7, 0, NULL, 0,
  1603. rouleur_codec_enable_lo_pa,
  1604. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1605. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1606. SND_SOC_DAPM_PGA_E("HPHL PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 7, 0, NULL,
  1607. 0, rouleur_codec_enable_hphl_pa,
  1608. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1609. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1610. SND_SOC_DAPM_PGA_E("HPHR PGA", ROULEUR_ANA_HPHPA_CNP_CTL_2, 6, 0, NULL,
  1611. 0, rouleur_codec_enable_hphr_pa,
  1612. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1613. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1614. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  1615. rouleur_codec_hphl_dac_event,
  1616. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1617. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1618. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  1619. rouleur_codec_hphr_dac_event,
  1620. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1621. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1622. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  1623. rouleur_codec_ear_lo_dac_event,
  1624. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1625. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1626. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  1627. rouleur_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  1628. SND_SOC_DAPM_POST_PMD),
  1629. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  1630. rouleur_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  1631. SND_SOC_DAPM_POST_PMD),
  1632. /* rx mixer widgets*/
  1633. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1634. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1635. SND_SOC_DAPM_MIXER("LO_RDAC", SND_SOC_NOPM, 0, 0,
  1636. lo_rdac_switch, ARRAY_SIZE(lo_rdac_switch)),
  1637. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1638. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1639. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1640. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1641. /*output widgets tx*/
  1642. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1643. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1644. /*output widgets rx*/
  1645. SND_SOC_DAPM_OUTPUT("EAR"),
  1646. SND_SOC_DAPM_OUTPUT("LO"),
  1647. SND_SOC_DAPM_OUTPUT("HPHL"),
  1648. SND_SOC_DAPM_OUTPUT("HPHR"),
  1649. /* micbias pull up widgets*/
  1650. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS1", SND_SOC_NOPM, 0, 0,
  1651. rouleur_codec_enable_micbias_pullup,
  1652. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1653. SND_SOC_DAPM_POST_PMD),
  1654. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS2", SND_SOC_NOPM, 0, 0,
  1655. rouleur_codec_enable_micbias_pullup,
  1656. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1657. SND_SOC_DAPM_POST_PMD),
  1658. SND_SOC_DAPM_MICBIAS_E("VA MIC BIAS3", SND_SOC_NOPM, 0, 0,
  1659. rouleur_codec_enable_micbias_pullup,
  1660. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1661. SND_SOC_DAPM_POST_PMD),
  1662. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1663. rouleur_codec_enable_dmic,
  1664. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1665. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 1, 0,
  1666. rouleur_codec_enable_dmic,
  1667. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1668. /*tx mixer widgets*/
  1669. SND_SOC_DAPM_MIXER_E("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1670. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch),
  1671. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1672. SND_SOC_DAPM_POST_PMD),
  1673. SND_SOC_DAPM_MIXER_E("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1674. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch),
  1675. rouleur_tx_swr_ctrl, SND_SOC_DAPM_PRE_PMU |
  1676. SND_SOC_DAPM_POST_PMD),
  1677. /*output widgets*/
  1678. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1679. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1680. };
  1681. static const struct snd_soc_dapm_route rouleur_audio_map[] = {
  1682. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1683. {"ADC1_MIXER", "Switch", "ADC1"},
  1684. {"ADC1", NULL, "AMIC1"},
  1685. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1686. {"ADC2_MIXER", "Switch", "ADC2"},
  1687. {"ADC2", NULL, "ADC2 MUX"},
  1688. {"ADC2 MUX", "INP3", "AMIC3"},
  1689. {"ADC2 MUX", "INP2", "AMIC2"},
  1690. {"IN1_HPHL", NULL, "PA_VPOS"},
  1691. {"RX1", NULL, "IN1_HPHL"},
  1692. {"RDAC1", NULL, "RX1"},
  1693. {"HPHL_RDAC", "Switch", "RDAC1"},
  1694. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1695. {"HPHL", NULL, "HPHL PGA"},
  1696. {"IN2_HPHR", NULL, "PA_VPOS"},
  1697. {"RX2", NULL, "IN2_HPHR"},
  1698. {"RDAC2", NULL, "RX2"},
  1699. {"HPHR_RDAC", "Switch", "RDAC2"},
  1700. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1701. {"HPHR", NULL, "HPHR PGA"},
  1702. {"RDAC3", NULL, "RX1"},
  1703. {"EAR_RDAC", "Switch", "RDAC3"},
  1704. {"EAR PGA", NULL, "EAR_RDAC"},
  1705. {"EAR", NULL, "EAR PGA"},
  1706. {"RDAC3", NULL, "RX1"},
  1707. {"LO_RDAC", "Switch", "RDAC3"},
  1708. {"LO PGA", NULL, "LO_RDAC"},
  1709. {"LO", NULL, "LO PGA"},
  1710. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1711. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1712. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1713. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1714. };
  1715. static ssize_t rouleur_version_read(struct snd_info_entry *entry,
  1716. void *file_private_data,
  1717. struct file *file,
  1718. char __user *buf, size_t count,
  1719. loff_t pos)
  1720. {
  1721. struct rouleur_priv *priv;
  1722. char buffer[ROULEUR_VERSION_ENTRY_SIZE];
  1723. int len = 0;
  1724. priv = (struct rouleur_priv *) entry->private_data;
  1725. if (!priv) {
  1726. pr_err("%s: rouleur priv is null\n", __func__);
  1727. return -EINVAL;
  1728. }
  1729. switch (priv->version) {
  1730. case ROULEUR_VERSION_1_0:
  1731. len = snprintf(buffer, sizeof(buffer), "ROULEUR_1_0\n");
  1732. break;
  1733. default:
  1734. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  1735. }
  1736. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  1737. }
  1738. static struct snd_info_entry_ops rouleur_info_ops = {
  1739. .read = rouleur_version_read,
  1740. };
  1741. /*
  1742. * rouleur_info_create_codec_entry - creates rouleur module
  1743. * @codec_root: The parent directory
  1744. * @component: component instance
  1745. *
  1746. * Creates rouleur module and version entry under the given
  1747. * parent directory.
  1748. *
  1749. * Return: 0 on success or negative error code on failure.
  1750. */
  1751. int rouleur_info_create_codec_entry(struct snd_info_entry *codec_root,
  1752. struct snd_soc_component *component)
  1753. {
  1754. struct snd_info_entry *version_entry;
  1755. struct rouleur_priv *priv;
  1756. struct snd_soc_card *card;
  1757. if (!codec_root || !component)
  1758. return -EINVAL;
  1759. priv = snd_soc_component_get_drvdata(component);
  1760. if (priv->entry) {
  1761. dev_dbg(priv->dev,
  1762. "%s:rouleur module already created\n", __func__);
  1763. return 0;
  1764. }
  1765. card = component->card;
  1766. priv->entry = snd_info_create_subdir(codec_root->module,
  1767. "rouleur", codec_root);
  1768. if (!priv->entry) {
  1769. dev_dbg(component->dev, "%s: failed to create rouleur entry\n",
  1770. __func__);
  1771. return -ENOMEM;
  1772. }
  1773. version_entry = snd_info_create_card_entry(card->snd_card,
  1774. "version",
  1775. priv->entry);
  1776. if (!version_entry) {
  1777. dev_dbg(component->dev, "%s: failed to create rouleur version entry\n",
  1778. __func__);
  1779. return -ENOMEM;
  1780. }
  1781. version_entry->private_data = priv;
  1782. version_entry->size = ROULEUR_VERSION_ENTRY_SIZE;
  1783. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  1784. version_entry->c.ops = &rouleur_info_ops;
  1785. if (snd_info_register(version_entry) < 0) {
  1786. snd_info_free_entry(version_entry);
  1787. return -ENOMEM;
  1788. }
  1789. priv->version_entry = version_entry;
  1790. return 0;
  1791. }
  1792. EXPORT_SYMBOL(rouleur_info_create_codec_entry);
  1793. static int rouleur_set_micbias_data(struct rouleur_priv *rouleur,
  1794. struct rouleur_pdata *pdata)
  1795. {
  1796. int vout_ctl = 0;
  1797. int rc = 0;
  1798. if (!pdata) {
  1799. dev_err(rouleur->dev, "%s: NULL pdata\n", __func__);
  1800. return -ENODEV;
  1801. }
  1802. /* set micbias voltage */
  1803. vout_ctl = rouleur_get_micb_vout_ctl_val(pdata->micbias.micb1_mv);
  1804. if (vout_ctl < 0) {
  1805. rc = -EINVAL;
  1806. goto done;
  1807. }
  1808. regmap_update_bits(rouleur->regmap, ROULEUR_ANA_MICBIAS_LDO_1_SETTING,
  1809. 0xF8, vout_ctl << 3);
  1810. done:
  1811. return rc;
  1812. }
  1813. static int rouleur_battery_supply_cb(struct notifier_block *nb,
  1814. unsigned long event, void *data)
  1815. {
  1816. struct power_supply *psy = data;
  1817. struct rouleur_priv *rouleur =
  1818. container_of(nb, struct rouleur_priv, psy_nb);
  1819. if (strcmp(psy->desc->name, "battery"))
  1820. return NOTIFY_OK;
  1821. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  1822. return NOTIFY_OK;
  1823. }
  1824. static int rouleur_read_battery_soc(struct rouleur_priv *rouleur, int *soc_val)
  1825. {
  1826. static struct power_supply *batt_psy;
  1827. union power_supply_propval ret = {0,};
  1828. int err = 0;
  1829. *soc_val = 100;
  1830. if (!batt_psy)
  1831. batt_psy = power_supply_get_by_name("battery");
  1832. if (batt_psy) {
  1833. err = power_supply_get_property(batt_psy,
  1834. POWER_SUPPLY_PROP_CAPACITY, &ret);
  1835. if (err) {
  1836. pr_err("%s: battery SoC read error:%d\n",
  1837. __func__, err);
  1838. return err;
  1839. }
  1840. *soc_val = ret.intval;
  1841. }
  1842. pr_debug("%s: soc:%d\n", __func__, *soc_val);
  1843. return err;
  1844. }
  1845. static void rouleur_evaluate_soc(struct work_struct *work)
  1846. {
  1847. struct rouleur_priv *rouleur =
  1848. container_of(work, struct rouleur_priv, soc_eval_work);
  1849. int soc_val = 0, ret = 0;
  1850. struct rouleur_pdata *pdata = NULL;
  1851. pdata = dev_get_platdata(rouleur->dev);
  1852. if (!pdata) {
  1853. dev_err(rouleur->dev, "%s: pdata is NULL\n", __func__);
  1854. return;
  1855. }
  1856. if (rouleur_read_battery_soc(rouleur, &soc_val) < 0) {
  1857. dev_err(rouleur->dev, "%s unable to read battery SoC\n",
  1858. __func__);
  1859. return;
  1860. }
  1861. if (soc_val < pdata->soc_threshold_val) {
  1862. dev_dbg(rouleur->dev,
  1863. "%s battery SoC less than threshold soc_val = %d\n",
  1864. __func__, soc_val);
  1865. /* Reduce PA Gain by 6DB for low SoC */
  1866. if (rouleur->update_wcd_event)
  1867. rouleur->update_wcd_event(rouleur->handle,
  1868. WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1869. true);
  1870. rouleur->low_soc = true;
  1871. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1872. rouleur->supplies,
  1873. pdata->regulator,
  1874. pdata->num_supplies,
  1875. "cdc-vdd-mic-bias",
  1876. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1877. true);
  1878. if (ret < 0)
  1879. dev_err(rouleur->dev,
  1880. "%s unable to set mbias min voltage\n",
  1881. __func__);
  1882. } else {
  1883. if (rouleur->low_soc == true) {
  1884. /* Reset PA Gain to default for normal SoC */
  1885. if (rouleur->update_wcd_event)
  1886. rouleur->update_wcd_event(rouleur->handle,
  1887. WCD_BOLERO_EVT_RX_PA_GAIN_UPDATE,
  1888. false);
  1889. ret = msm_cdc_set_supply_min_voltage(rouleur->dev,
  1890. rouleur->supplies,
  1891. pdata->regulator,
  1892. pdata->num_supplies,
  1893. "cdc-vdd-mic-bias",
  1894. LOW_SOC_MBIAS_REG_MIN_VOLTAGE,
  1895. false);
  1896. if (ret < 0)
  1897. dev_err(rouleur->dev,
  1898. "%s unable to set mbias min voltage\n",
  1899. __func__);
  1900. rouleur->low_soc = false;
  1901. }
  1902. }
  1903. }
  1904. static void rouleur_get_foundry_id(struct rouleur_priv *rouleur)
  1905. {
  1906. int ret;
  1907. if (rouleur->foundry_id_reg == 0) {
  1908. pr_debug("%s: foundry id not defined\n", __func__);
  1909. return;
  1910. }
  1911. ret = pm2250_spmi_read(rouleur->spmi_dev,
  1912. rouleur->foundry_id_reg, &rouleur->foundry_id);
  1913. if (ret == 0)
  1914. pr_debug("%s: rouleur foundry id = %x\n", rouleur->foundry_id,
  1915. __func__);
  1916. else
  1917. pr_debug("%s: rouleur error in spmi read ret = %d\n",
  1918. __func__, ret);
  1919. }
  1920. static int rouleur_soc_codec_probe(struct snd_soc_component *component)
  1921. {
  1922. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1923. struct snd_soc_dapm_context *dapm =
  1924. snd_soc_component_get_dapm(component);
  1925. int ret = -EINVAL;
  1926. dev_info(component->dev, "%s()\n", __func__);
  1927. rouleur = snd_soc_component_get_drvdata(component);
  1928. if (!rouleur)
  1929. return -EINVAL;
  1930. rouleur->component = component;
  1931. snd_soc_component_init_regmap(component, rouleur->regmap);
  1932. rouleur->fw_data = devm_kzalloc(component->dev,
  1933. sizeof(*(rouleur->fw_data)),
  1934. GFP_KERNEL);
  1935. if (!rouleur->fw_data) {
  1936. dev_err(component->dev, "Failed to allocate fw_data\n");
  1937. ret = -ENOMEM;
  1938. goto done;
  1939. }
  1940. set_bit(WCD9XXX_MBHC_CAL, rouleur->fw_data->cal_bit);
  1941. ret = wcd_cal_create_hwdep(rouleur->fw_data,
  1942. WCD9XXX_CODEC_HWDEP_NODE, component);
  1943. if (ret < 0) {
  1944. dev_err(component->dev, "%s hwdep failed %d\n", __func__, ret);
  1945. goto done;
  1946. }
  1947. ret = rouleur_mbhc_init(&rouleur->mbhc, component, rouleur->fw_data);
  1948. if (ret) {
  1949. pr_err("%s: mbhc initialization failed\n", __func__);
  1950. goto done;
  1951. }
  1952. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  1953. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  1954. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  1955. snd_soc_dapm_ignore_suspend(dapm, "IN1_HPHL");
  1956. snd_soc_dapm_ignore_suspend(dapm, "IN2_HPHR");
  1957. snd_soc_dapm_ignore_suspend(dapm, "ADC1_OUTPUT");
  1958. snd_soc_dapm_ignore_suspend(dapm, "ADC2_OUTPUT");
  1959. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  1960. snd_soc_dapm_ignore_suspend(dapm, "LO");
  1961. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  1962. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  1963. snd_soc_dapm_ignore_suspend(dapm, "DMIC1_OUTPUT");
  1964. snd_soc_dapm_ignore_suspend(dapm, "DMIC2_OUTPUT");
  1965. snd_soc_dapm_sync(dapm);
  1966. rouleur_init_reg(component);
  1967. /* Get rouleur foundry id */
  1968. rouleur_get_foundry_id(rouleur);
  1969. rouleur->version = ROULEUR_VERSION_1_0;
  1970. /* Register event notifier */
  1971. rouleur->nblock.notifier_call = rouleur_event_notify;
  1972. if (rouleur->register_notifier) {
  1973. ret = rouleur->register_notifier(rouleur->handle,
  1974. &rouleur->nblock,
  1975. true);
  1976. if (ret) {
  1977. dev_err(component->dev,
  1978. "%s: Failed to register notifier %d\n",
  1979. __func__, ret);
  1980. return ret;
  1981. }
  1982. }
  1983. rouleur->low_soc = false;
  1984. rouleur->dev_up = true;
  1985. done:
  1986. return ret;
  1987. }
  1988. static void rouleur_soc_codec_remove(struct snd_soc_component *component)
  1989. {
  1990. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  1991. if (!rouleur)
  1992. return;
  1993. if (rouleur->register_notifier)
  1994. rouleur->register_notifier(rouleur->handle,
  1995. &rouleur->nblock,
  1996. false);
  1997. }
  1998. static int rouleur_soc_codec_suspend(struct snd_soc_component *component)
  1999. {
  2000. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  2001. if (!rouleur)
  2002. return 0;
  2003. rouleur->dapm_bias_off = true;
  2004. return 0;
  2005. }
  2006. static int rouleur_soc_codec_resume(struct snd_soc_component *component)
  2007. {
  2008. struct rouleur_priv *rouleur = snd_soc_component_get_drvdata(component);
  2009. if (!rouleur)
  2010. return 0;
  2011. rouleur->dapm_bias_off = false;
  2012. return 0;
  2013. }
  2014. static const struct snd_soc_component_driver soc_codec_dev_rouleur = {
  2015. .name = DRV_NAME,
  2016. .probe = rouleur_soc_codec_probe,
  2017. .remove = rouleur_soc_codec_remove,
  2018. .controls = rouleur_snd_controls,
  2019. .num_controls = ARRAY_SIZE(rouleur_snd_controls),
  2020. .dapm_widgets = rouleur_dapm_widgets,
  2021. .num_dapm_widgets = ARRAY_SIZE(rouleur_dapm_widgets),
  2022. .dapm_routes = rouleur_audio_map,
  2023. .num_dapm_routes = ARRAY_SIZE(rouleur_audio_map),
  2024. .suspend = rouleur_soc_codec_suspend,
  2025. .resume = rouleur_soc_codec_resume,
  2026. };
  2027. #ifdef CONFIG_PM_SLEEP
  2028. static int rouleur_suspend(struct device *dev)
  2029. {
  2030. struct rouleur_priv *rouleur = NULL;
  2031. int ret = 0;
  2032. struct rouleur_pdata *pdata = NULL;
  2033. if (!dev)
  2034. return -ENODEV;
  2035. rouleur = dev_get_drvdata(dev);
  2036. if (!rouleur)
  2037. return -EINVAL;
  2038. pdata = dev_get_platdata(rouleur->dev);
  2039. if (!pdata) {
  2040. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2041. return -EINVAL;
  2042. }
  2043. if (test_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask)) {
  2044. ret = msm_cdc_disable_ondemand_supply(rouleur->dev,
  2045. rouleur->supplies,
  2046. pdata->regulator,
  2047. pdata->num_supplies,
  2048. "cdc-pa-vpos");
  2049. if (ret == -EINVAL) {
  2050. dev_err(dev, "%s: pa vpos is not disabled\n",
  2051. __func__);
  2052. return 0;
  2053. }
  2054. clear_bit(ALLOW_VPOS_DISABLE, &rouleur->status_mask);
  2055. }
  2056. if (rouleur->dapm_bias_off) {
  2057. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2058. rouleur->supplies,
  2059. pdata->regulator,
  2060. pdata->num_supplies,
  2061. true);
  2062. set_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2063. }
  2064. return 0;
  2065. }
  2066. static int rouleur_resume(struct device *dev)
  2067. {
  2068. struct rouleur_priv *rouleur = NULL;
  2069. struct rouleur_pdata *pdata = NULL;
  2070. if (!dev)
  2071. return -ENODEV;
  2072. rouleur = dev_get_drvdata(dev);
  2073. if (!rouleur)
  2074. return -EINVAL;
  2075. pdata = dev_get_platdata(rouleur->dev);
  2076. if (!pdata) {
  2077. dev_err(dev, "%s: pdata is NULL\n", __func__);
  2078. return -EINVAL;
  2079. }
  2080. if (test_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask)) {
  2081. msm_cdc_set_supplies_lpm_mode(rouleur->dev,
  2082. rouleur->supplies,
  2083. pdata->regulator,
  2084. pdata->num_supplies,
  2085. false);
  2086. clear_bit(WCD_SUPPLIES_LPM_MODE, &rouleur->status_mask);
  2087. }
  2088. return 0;
  2089. }
  2090. #endif
  2091. static int rouleur_reset(struct device *dev, int reset_val)
  2092. {
  2093. struct rouleur_priv *rouleur = NULL;
  2094. if (!dev)
  2095. return -ENODEV;
  2096. rouleur = dev_get_drvdata(dev);
  2097. if (!rouleur)
  2098. return -EINVAL;
  2099. pm2250_spmi_write(rouleur->spmi_dev, rouleur->reset_reg, reset_val);
  2100. return 0;
  2101. }
  2102. static int rouleur_read_of_property_u32(struct device *dev, const char *name,
  2103. u32 *val)
  2104. {
  2105. int rc = 0;
  2106. rc = of_property_read_u32(dev->of_node, name, val);
  2107. if (rc)
  2108. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2109. __func__, name, dev->of_node->full_name);
  2110. return rc;
  2111. }
  2112. static void rouleur_dt_parse_micbias_info(struct device *dev,
  2113. struct rouleur_micbias_setting *mb)
  2114. {
  2115. u32 prop_val = 0;
  2116. int rc = 0;
  2117. /* MB1 */
  2118. if (of_find_property(dev->of_node, "qcom,cdc-micbias1-mv",
  2119. NULL)) {
  2120. rc = rouleur_read_of_property_u32(dev,
  2121. "qcom,cdc-micbias1-mv",
  2122. &prop_val);
  2123. if (!rc)
  2124. mb->micb1_mv = prop_val;
  2125. } else {
  2126. dev_info(dev, "%s: Micbias1 DT property not found\n",
  2127. __func__);
  2128. }
  2129. /* MB2 */
  2130. if (of_find_property(dev->of_node, "qcom,cdc-micbias2-mv",
  2131. NULL)) {
  2132. rc = rouleur_read_of_property_u32(dev,
  2133. "qcom,cdc-micbias2-mv",
  2134. &prop_val);
  2135. if (!rc)
  2136. mb->micb2_mv = prop_val;
  2137. } else {
  2138. dev_info(dev, "%s: Micbias2 DT property not found\n",
  2139. __func__);
  2140. }
  2141. /* MB3 */
  2142. if (of_find_property(dev->of_node, "qcom,cdc-micbias3-mv",
  2143. NULL)) {
  2144. rc = rouleur_read_of_property_u32(dev,
  2145. "qcom,cdc-micbias3-mv",
  2146. &prop_val);
  2147. if (!rc)
  2148. mb->micb3_mv = prop_val;
  2149. } else {
  2150. dev_info(dev, "%s: Micbias3 DT property not found\n",
  2151. __func__);
  2152. }
  2153. }
  2154. struct rouleur_pdata *rouleur_populate_dt_data(struct device *dev)
  2155. {
  2156. struct rouleur_pdata *pdata = NULL;
  2157. u32 reg;
  2158. int ret = 0;
  2159. pdata = kzalloc(sizeof(struct rouleur_pdata),
  2160. GFP_KERNEL);
  2161. if (!pdata)
  2162. return NULL;
  2163. pdata->spmi_np = of_parse_phandle(dev->of_node,
  2164. "qcom,pmic-spmi-node", 0);
  2165. if (!pdata->spmi_np) {
  2166. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  2167. __func__, "qcom,pmic-spmi-node",
  2168. dev->of_node->full_name);
  2169. kfree(pdata);
  2170. return NULL;
  2171. }
  2172. ret = of_property_read_u32(dev->of_node, "qcom,wcd-reset-reg", &reg);
  2173. if (ret) {
  2174. dev_err(dev, "%s: Failed to obtain reset reg value %d\n",
  2175. __func__, ret);
  2176. kfree(pdata);
  2177. return NULL;
  2178. }
  2179. pdata->reset_reg = reg;
  2180. if (of_property_read_u32(dev->of_node, "qcom,foundry-id-reg", &reg))
  2181. dev_dbg(dev, "%s: Failed to obtain foundry id\n",
  2182. __func__);
  2183. else
  2184. pdata->foundry_id_reg = reg;
  2185. if (of_property_read_u32(dev->of_node, "qcom,soc-threshold-voltage"
  2186. , &reg)) {
  2187. dev_dbg(dev, "%s: Looking up %s property in node %s failed\n",
  2188. __func__, "qcom,soc-threshold-voltage",
  2189. dev->of_node->full_name);
  2190. pdata->soc_threshold_val = SOC_THRESHOLD_LEVEL;
  2191. } else {
  2192. pdata->soc_threshold_val = reg;
  2193. }
  2194. /* Parse power supplies */
  2195. msm_cdc_get_power_supplies(dev, &pdata->regulator,
  2196. &pdata->num_supplies);
  2197. if (!pdata->regulator || (pdata->num_supplies <= 0)) {
  2198. dev_err(dev, "%s: no power supplies defined for codec\n",
  2199. __func__);
  2200. kfree(pdata);
  2201. return NULL;
  2202. }
  2203. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  2204. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  2205. rouleur_dt_parse_micbias_info(dev, &pdata->micbias);
  2206. return pdata;
  2207. }
  2208. static int rouleur_wakeup(void *handle, bool enable)
  2209. {
  2210. struct rouleur_priv *priv;
  2211. if (!handle) {
  2212. pr_err("%s: NULL handle\n", __func__);
  2213. return -EINVAL;
  2214. }
  2215. priv = (struct rouleur_priv *)handle;
  2216. if (!priv->tx_swr_dev) {
  2217. pr_err("%s: tx swr dev is NULL\n", __func__);
  2218. return -EINVAL;
  2219. }
  2220. if (enable)
  2221. return swr_device_wakeup_vote(priv->tx_swr_dev);
  2222. else
  2223. return swr_device_wakeup_unvote(priv->tx_swr_dev);
  2224. }
  2225. static irqreturn_t rouleur_wd_handle_irq(int irq, void *data)
  2226. {
  2227. pr_err_ratelimited("%s: Watchdog interrupt for irq =%d triggered\n",
  2228. __func__, irq);
  2229. return IRQ_HANDLED;
  2230. }
  2231. static int rouleur_bind(struct device *dev)
  2232. {
  2233. int ret = 0, i = 0;
  2234. struct rouleur_priv *rouleur = NULL;
  2235. struct rouleur_pdata *pdata = NULL;
  2236. struct wcd_ctrl_platform_data *plat_data = NULL;
  2237. struct platform_device *pdev = NULL;
  2238. rouleur = kzalloc(sizeof(struct rouleur_priv), GFP_KERNEL);
  2239. if (!rouleur)
  2240. return -ENOMEM;
  2241. dev_set_drvdata(dev, rouleur);
  2242. pdata = rouleur_populate_dt_data(dev);
  2243. if (!pdata) {
  2244. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  2245. kfree(rouleur);
  2246. return -EINVAL;
  2247. }
  2248. rouleur->dev = dev;
  2249. rouleur->dev->platform_data = pdata;
  2250. pdev = of_find_device_by_node(pdata->spmi_np);
  2251. if (!pdev) {
  2252. dev_err(dev, "%s: platform device from SPMI node is NULL\n",
  2253. __func__);
  2254. ret = -EINVAL;
  2255. goto err_bind_all;
  2256. }
  2257. rouleur->spmi_dev = &pdev->dev;
  2258. rouleur->reset_reg = pdata->reset_reg;
  2259. rouleur->foundry_id_reg = pdata->foundry_id_reg;
  2260. ret = msm_cdc_init_supplies(dev, &rouleur->supplies,
  2261. pdata->regulator, pdata->num_supplies);
  2262. if (!rouleur->supplies) {
  2263. dev_err(dev, "%s: Cannot init wcd supplies\n",
  2264. __func__);
  2265. goto err_bind_all;
  2266. }
  2267. plat_data = dev_get_platdata(dev->parent);
  2268. if (!plat_data) {
  2269. dev_err(dev, "%s: platform data from parent is NULL\n",
  2270. __func__);
  2271. ret = -EINVAL;
  2272. goto err_bind_all;
  2273. }
  2274. rouleur->handle = (void *)plat_data->handle;
  2275. if (!rouleur->handle) {
  2276. dev_err(dev, "%s: handle is NULL\n", __func__);
  2277. ret = -EINVAL;
  2278. goto err_bind_all;
  2279. }
  2280. rouleur->update_wcd_event = plat_data->update_wcd_event;
  2281. if (!rouleur->update_wcd_event) {
  2282. dev_err(dev, "%s: update_wcd_event api is null!\n",
  2283. __func__);
  2284. ret = -EINVAL;
  2285. goto err_bind_all;
  2286. }
  2287. rouleur->register_notifier = plat_data->register_notifier;
  2288. if (!rouleur->register_notifier) {
  2289. dev_err(dev, "%s: register_notifier api is null!\n",
  2290. __func__);
  2291. ret = -EINVAL;
  2292. goto err_bind_all;
  2293. }
  2294. ret = msm_cdc_enable_static_supplies(dev, rouleur->supplies,
  2295. pdata->regulator,
  2296. pdata->num_supplies);
  2297. if (ret) {
  2298. dev_err(dev, "%s: wcd static supply enable failed!\n",
  2299. __func__);
  2300. goto err_bind_all;
  2301. }
  2302. rouleur_reset(dev, 0x01);
  2303. usleep_range(20, 30);
  2304. rouleur_reset(dev, 0x00);
  2305. /*
  2306. * Add 5msec delay to provide sufficient time for
  2307. * soundwire auto enumeration of slave devices as
  2308. * as per HW requirement.
  2309. */
  2310. usleep_range(5000, 5010);
  2311. rouleur->wakeup = rouleur_wakeup;
  2312. ret = component_bind_all(dev, rouleur);
  2313. if (ret) {
  2314. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  2315. __func__, ret);
  2316. goto err_bind_all;
  2317. }
  2318. ret = rouleur_parse_port_mapping(dev, "qcom,rx_swr_ch_map", CODEC_RX);
  2319. ret |= rouleur_parse_port_mapping(dev, "qcom,tx_swr_ch_map", CODEC_TX);
  2320. if (ret) {
  2321. dev_err(dev, "Failed to read port mapping\n");
  2322. goto err;
  2323. }
  2324. rouleur->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  2325. if (!rouleur->rx_swr_dev) {
  2326. dev_err(dev, "%s: Could not find RX swr slave device\n",
  2327. __func__);
  2328. ret = -ENODEV;
  2329. goto err;
  2330. }
  2331. rouleur->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  2332. if (!rouleur->tx_swr_dev) {
  2333. dev_err(dev, "%s: Could not find TX swr slave device\n",
  2334. __func__);
  2335. ret = -ENODEV;
  2336. goto err;
  2337. }
  2338. rouleur->regmap = devm_regmap_init_swr(rouleur->tx_swr_dev,
  2339. &rouleur_regmap_config);
  2340. if (!rouleur->regmap) {
  2341. dev_err(dev, "%s: Regmap init failed\n",
  2342. __func__);
  2343. goto err;
  2344. }
  2345. /* Set all interupts as edge triggered */
  2346. for (i = 0; i < rouleur_regmap_irq_chip.num_regs; i++)
  2347. regmap_write(rouleur->regmap,
  2348. (ROULEUR_DIG_SWR_INTR_LEVEL_0 + i), 0);
  2349. rouleur_regmap_irq_chip.irq_drv_data = rouleur;
  2350. rouleur->irq_info.wcd_regmap_irq_chip = &rouleur_regmap_irq_chip;
  2351. rouleur->irq_info.codec_name = "rouleur";
  2352. rouleur->irq_info.regmap = rouleur->regmap;
  2353. rouleur->irq_info.dev = dev;
  2354. ret = wcd_irq_init(&rouleur->irq_info, &rouleur->virq);
  2355. if (ret) {
  2356. dev_err(dev, "%s: IRQ init failed: %d\n",
  2357. __func__, ret);
  2358. goto err;
  2359. }
  2360. rouleur->tx_swr_dev->slave_irq = rouleur->virq;
  2361. mutex_init(&rouleur->micb_lock);
  2362. mutex_init(&rouleur->main_bias_lock);
  2363. mutex_init(&rouleur->rx_clk_lock);
  2364. ret = rouleur_set_micbias_data(rouleur, pdata);
  2365. if (ret < 0) {
  2366. dev_err(dev, "%s: bad micbias pdata\n", __func__);
  2367. goto err_irq;
  2368. }
  2369. /* Request for watchdog interrupt */
  2370. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT,
  2371. "HPHR PDM WD INT", rouleur_wd_handle_irq, NULL);
  2372. wcd_request_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT,
  2373. "HPHL PDM WD INT", rouleur_wd_handle_irq, NULL);
  2374. /* Disable watchdog interrupt for HPH */
  2375. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHR_PDM_WD_INT);
  2376. wcd_disable_irq(&rouleur->irq_info, ROULEUR_IRQ_HPHL_PDM_WD_INT);
  2377. ret = snd_soc_register_component(dev, &soc_codec_dev_rouleur,
  2378. NULL, 0);
  2379. if (ret) {
  2380. dev_err(dev, "%s: Codec registration failed\n",
  2381. __func__);
  2382. goto err_irq;
  2383. }
  2384. /* Register notifier to change gain based on state of charge */
  2385. INIT_WORK(&rouleur->soc_eval_work, rouleur_evaluate_soc);
  2386. rouleur->psy_nb.notifier_call = rouleur_battery_supply_cb;
  2387. if (power_supply_reg_notifier(&rouleur->psy_nb) < 0)
  2388. dev_dbg(rouleur->dev,
  2389. "%s: could not register pwr supply notifier\n",
  2390. __func__);
  2391. queue_work(system_freezable_wq, &rouleur->soc_eval_work);
  2392. return ret;
  2393. err_irq:
  2394. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2395. mutex_destroy(&rouleur->micb_lock);
  2396. mutex_destroy(&rouleur->main_bias_lock);
  2397. mutex_destroy(&rouleur->rx_clk_lock);
  2398. err:
  2399. component_unbind_all(dev, rouleur);
  2400. err_bind_all:
  2401. dev_set_drvdata(dev, NULL);
  2402. kfree(pdata);
  2403. kfree(rouleur);
  2404. return ret;
  2405. }
  2406. static void rouleur_unbind(struct device *dev)
  2407. {
  2408. struct rouleur_priv *rouleur = dev_get_drvdata(dev);
  2409. struct rouleur_pdata *pdata = dev_get_platdata(rouleur->dev);
  2410. wcd_irq_exit(&rouleur->irq_info, rouleur->virq);
  2411. snd_soc_unregister_component(dev);
  2412. component_unbind_all(dev, rouleur);
  2413. mutex_destroy(&rouleur->micb_lock);
  2414. mutex_destroy(&rouleur->main_bias_lock);
  2415. mutex_destroy(&rouleur->rx_clk_lock);
  2416. dev_set_drvdata(dev, NULL);
  2417. kfree(pdata);
  2418. kfree(rouleur);
  2419. }
  2420. static const struct of_device_id rouleur_dt_match[] = {
  2421. { .compatible = "qcom,rouleur-codec" , .data = "rouleur" },
  2422. {}
  2423. };
  2424. static const struct component_master_ops rouleur_comp_ops = {
  2425. .bind = rouleur_bind,
  2426. .unbind = rouleur_unbind,
  2427. };
  2428. static int rouleur_compare_of(struct device *dev, void *data)
  2429. {
  2430. return dev->of_node == data;
  2431. }
  2432. static void rouleur_release_of(struct device *dev, void *data)
  2433. {
  2434. of_node_put(data);
  2435. }
  2436. static int rouleur_add_slave_components(struct device *dev,
  2437. struct component_match **matchptr)
  2438. {
  2439. struct device_node *np, *rx_node, *tx_node;
  2440. np = dev->of_node;
  2441. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  2442. if (!rx_node) {
  2443. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  2444. return -ENODEV;
  2445. }
  2446. of_node_get(rx_node);
  2447. component_match_add_release(dev, matchptr,
  2448. rouleur_release_of,
  2449. rouleur_compare_of,
  2450. rx_node);
  2451. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  2452. if (!tx_node) {
  2453. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  2454. return -ENODEV;
  2455. }
  2456. of_node_get(tx_node);
  2457. component_match_add_release(dev, matchptr,
  2458. rouleur_release_of,
  2459. rouleur_compare_of,
  2460. tx_node);
  2461. return 0;
  2462. }
  2463. static int rouleur_probe(struct platform_device *pdev)
  2464. {
  2465. struct component_match *match = NULL;
  2466. int ret;
  2467. ret = rouleur_add_slave_components(&pdev->dev, &match);
  2468. if (ret)
  2469. return ret;
  2470. return component_master_add_with_match(&pdev->dev,
  2471. &rouleur_comp_ops, match);
  2472. }
  2473. static int rouleur_remove(struct platform_device *pdev)
  2474. {
  2475. component_master_del(&pdev->dev, &rouleur_comp_ops);
  2476. dev_set_drvdata(&pdev->dev, NULL);
  2477. return 0;
  2478. }
  2479. #ifdef CONFIG_PM_SLEEP
  2480. static const struct dev_pm_ops rouleur_dev_pm_ops = {
  2481. .suspend_late = rouleur_suspend,
  2482. .resume_early = rouleur_resume
  2483. };
  2484. #endif
  2485. static struct platform_driver rouleur_codec_driver = {
  2486. .probe = rouleur_probe,
  2487. .remove = rouleur_remove,
  2488. .driver = {
  2489. .name = "rouleur_codec",
  2490. .owner = THIS_MODULE,
  2491. .of_match_table = of_match_ptr(rouleur_dt_match),
  2492. #ifdef CONFIG_PM_SLEEP
  2493. .pm = &rouleur_dev_pm_ops,
  2494. #endif
  2495. .suppress_bind_attrs = true,
  2496. },
  2497. };
  2498. module_platform_driver(rouleur_codec_driver);
  2499. MODULE_DESCRIPTION("Rouleur Codec driver");
  2500. MODULE_LICENSE("GPL v2");