dsi_panel.c 111 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  31. #define MIN_PREFILL_LINES 35
  32. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  33. {
  34. char *bp;
  35. bp = buf;
  36. /* First 7 bytes are cmd header */
  37. *bp++ = 0x0A;
  38. *bp++ = 1;
  39. *bp++ = 0;
  40. *bp++ = 0;
  41. *bp++ = pps_delay_ms;
  42. *bp++ = 0;
  43. *bp++ = 128;
  44. }
  45. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  46. char *buf, int pps_id, u32 size)
  47. {
  48. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  49. buf += DSI_CMD_PPS_HDR_SIZE;
  50. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  51. size);
  52. }
  53. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  54. char *buf, int pps_id, u32 size)
  55. {
  56. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  57. buf += DSI_CMD_PPS_HDR_SIZE;
  58. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  59. size);
  60. }
  61. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  62. {
  63. int rc = 0;
  64. int i;
  65. struct regulator *vreg = NULL;
  66. for (i = 0; i < panel->power_info.count; i++) {
  67. vreg = devm_regulator_get(panel->parent,
  68. panel->power_info.vregs[i].vreg_name);
  69. rc = PTR_RET(vreg);
  70. if (rc) {
  71. DSI_ERR("failed to get %s regulator\n",
  72. panel->power_info.vregs[i].vreg_name);
  73. goto error_put;
  74. }
  75. panel->power_info.vregs[i].vreg = vreg;
  76. }
  77. return rc;
  78. error_put:
  79. for (i = i - 1; i >= 0; i--) {
  80. devm_regulator_put(panel->power_info.vregs[i].vreg);
  81. panel->power_info.vregs[i].vreg = NULL;
  82. }
  83. return rc;
  84. }
  85. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  86. {
  87. int rc = 0;
  88. int i;
  89. for (i = panel->power_info.count - 1; i >= 0; i--)
  90. devm_regulator_put(panel->power_info.vregs[i].vreg);
  91. return rc;
  92. }
  93. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  94. {
  95. int rc = 0;
  96. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  97. if (gpio_is_valid(r_config->reset_gpio)) {
  98. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  99. if (rc) {
  100. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  101. goto error;
  102. }
  103. }
  104. if (gpio_is_valid(r_config->disp_en_gpio)) {
  105. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  106. if (rc) {
  107. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  108. goto error_release_reset;
  109. }
  110. }
  111. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  112. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  113. if (rc) {
  114. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  115. goto error_release_disp_en;
  116. }
  117. }
  118. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  119. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  120. if (rc) {
  121. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  122. goto error_release_mode_sel;
  123. }
  124. }
  125. if (gpio_is_valid(panel->panel_test_gpio)) {
  126. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  127. if (rc) {
  128. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  129. rc);
  130. panel->panel_test_gpio = -1;
  131. rc = 0;
  132. }
  133. }
  134. goto error;
  135. error_release_mode_sel:
  136. if (gpio_is_valid(panel->bl_config.en_gpio))
  137. gpio_free(panel->bl_config.en_gpio);
  138. error_release_disp_en:
  139. if (gpio_is_valid(r_config->disp_en_gpio))
  140. gpio_free(r_config->disp_en_gpio);
  141. error_release_reset:
  142. if (gpio_is_valid(r_config->reset_gpio))
  143. gpio_free(r_config->reset_gpio);
  144. error:
  145. return rc;
  146. }
  147. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  148. {
  149. int rc = 0;
  150. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  151. if (gpio_is_valid(r_config->reset_gpio))
  152. gpio_free(r_config->reset_gpio);
  153. if (gpio_is_valid(r_config->disp_en_gpio))
  154. gpio_free(r_config->disp_en_gpio);
  155. if (gpio_is_valid(panel->bl_config.en_gpio))
  156. gpio_free(panel->bl_config.en_gpio);
  157. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  158. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  159. if (gpio_is_valid(panel->panel_test_gpio))
  160. gpio_free(panel->panel_test_gpio);
  161. return rc;
  162. }
  163. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  164. {
  165. struct dsi_panel_reset_config *r_config;
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. r_config = &panel->reset_config;
  171. if (!r_config) {
  172. DSI_ERR("Invalid panel reset configuration\n");
  173. return -EINVAL;
  174. }
  175. if (gpio_is_valid(r_config->reset_gpio)) {
  176. gpio_set_value(r_config->reset_gpio, 0);
  177. DSI_INFO("GPIO pulled low to simulate ESD\n");
  178. return 0;
  179. }
  180. DSI_ERR("failed to pull down gpio\n");
  181. return -EINVAL;
  182. }
  183. static int dsi_panel_reset(struct dsi_panel *panel)
  184. {
  185. int rc = 0;
  186. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  187. int i;
  188. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  189. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  190. if (rc) {
  191. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  192. goto exit;
  193. }
  194. }
  195. if (r_config->count) {
  196. rc = gpio_direction_output(r_config->reset_gpio,
  197. r_config->sequence[0].level);
  198. if (rc) {
  199. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  200. goto exit;
  201. }
  202. }
  203. for (i = 0; i < r_config->count; i++) {
  204. gpio_set_value(r_config->reset_gpio,
  205. r_config->sequence[i].level);
  206. if (r_config->sequence[i].sleep_ms)
  207. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  208. (r_config->sequence[i].sleep_ms * 1000) + 100);
  209. }
  210. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  211. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  212. if (rc)
  213. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  214. }
  215. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  216. bool out = true;
  217. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  218. || (panel->reset_config.mode_sel_state
  219. == MODE_GPIO_LOW))
  220. out = false;
  221. else if ((panel->reset_config.mode_sel_state
  222. == MODE_SEL_SINGLE_PORT) ||
  223. (panel->reset_config.mode_sel_state
  224. == MODE_GPIO_HIGH))
  225. out = true;
  226. rc = gpio_direction_output(
  227. panel->reset_config.lcd_mode_sel_gpio, out);
  228. if (rc)
  229. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  230. }
  231. if (gpio_is_valid(panel->panel_test_gpio)) {
  232. rc = gpio_direction_input(panel->panel_test_gpio);
  233. if (rc)
  234. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  235. rc);
  236. }
  237. exit:
  238. return rc;
  239. }
  240. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  241. {
  242. int rc = 0;
  243. struct pinctrl_state *state;
  244. if (panel->host_config.ext_bridge_mode)
  245. return 0;
  246. if (!panel->pinctrl.pinctrl)
  247. return 0;
  248. if (enable)
  249. state = panel->pinctrl.active;
  250. else
  251. state = panel->pinctrl.suspend;
  252. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  253. if (rc)
  254. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  255. panel->name, rc);
  256. return rc;
  257. }
  258. static int dsi_panel_power_on(struct dsi_panel *panel)
  259. {
  260. int rc = 0;
  261. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  262. if (rc) {
  263. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  264. panel->name, rc);
  265. goto exit;
  266. }
  267. rc = dsi_panel_set_pinctrl_state(panel, true);
  268. if (rc) {
  269. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  270. goto error_disable_vregs;
  271. }
  272. rc = dsi_panel_reset(panel);
  273. if (rc) {
  274. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  275. goto error_disable_gpio;
  276. }
  277. goto exit;
  278. error_disable_gpio:
  279. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  280. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  281. if (gpio_is_valid(panel->bl_config.en_gpio))
  282. gpio_set_value(panel->bl_config.en_gpio, 0);
  283. (void)dsi_panel_set_pinctrl_state(panel, false);
  284. error_disable_vregs:
  285. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  286. exit:
  287. return rc;
  288. }
  289. static int dsi_panel_power_off(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  293. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  294. if (gpio_is_valid(panel->reset_config.reset_gpio))
  295. gpio_set_value(panel->reset_config.reset_gpio, 0);
  296. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  297. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  298. if (gpio_is_valid(panel->panel_test_gpio)) {
  299. rc = gpio_direction_input(panel->panel_test_gpio);
  300. if (rc)
  301. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  302. rc);
  303. }
  304. rc = dsi_panel_set_pinctrl_state(panel, false);
  305. if (rc) {
  306. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  307. rc);
  308. }
  309. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  310. if (rc)
  311. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  312. panel->name, rc);
  313. return rc;
  314. }
  315. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  316. enum dsi_cmd_set_type type)
  317. {
  318. int rc = 0, i = 0;
  319. ssize_t len;
  320. struct dsi_cmd_desc *cmds;
  321. u32 count;
  322. enum dsi_cmd_set_state state;
  323. struct dsi_display_mode *mode;
  324. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  325. if (!panel || !panel->cur_mode)
  326. return -EINVAL;
  327. mode = panel->cur_mode;
  328. cmds = mode->priv_info->cmd_sets[type].cmds;
  329. count = mode->priv_info->cmd_sets[type].count;
  330. state = mode->priv_info->cmd_sets[type].state;
  331. if (count == 0) {
  332. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  333. panel->name, type);
  334. goto error;
  335. }
  336. for (i = 0; i < count; i++) {
  337. if (state == DSI_CMD_SET_STATE_LP)
  338. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  339. if (cmds->last_command)
  340. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  341. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  342. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  343. len = ops->transfer(panel->host, &cmds->msg);
  344. if (len < 0) {
  345. rc = len;
  346. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  347. goto error;
  348. }
  349. if (cmds->post_wait_ms)
  350. usleep_range(cmds->post_wait_ms*1000,
  351. ((cmds->post_wait_ms*1000)+10));
  352. cmds++;
  353. }
  354. error:
  355. return rc;
  356. }
  357. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  358. {
  359. int rc = 0;
  360. if (panel->host_config.ext_bridge_mode)
  361. return 0;
  362. devm_pinctrl_put(panel->pinctrl.pinctrl);
  363. return rc;
  364. }
  365. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  366. {
  367. int rc = 0;
  368. if (panel->host_config.ext_bridge_mode)
  369. return 0;
  370. /* TODO: pinctrl is defined in dsi dt node */
  371. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  372. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  373. rc = PTR_ERR(panel->pinctrl.pinctrl);
  374. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  375. goto error;
  376. }
  377. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  378. "panel_active");
  379. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  380. rc = PTR_ERR(panel->pinctrl.active);
  381. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  382. goto error;
  383. }
  384. panel->pinctrl.suspend =
  385. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  386. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  387. rc = PTR_ERR(panel->pinctrl.suspend);
  388. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  389. goto error;
  390. }
  391. error:
  392. return rc;
  393. }
  394. static int dsi_panel_wled_register(struct dsi_panel *panel,
  395. struct dsi_backlight_config *bl)
  396. {
  397. struct backlight_device *bd;
  398. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  399. if (!bd) {
  400. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  401. panel->name, -EPROBE_DEFER);
  402. return -EPROBE_DEFER;
  403. }
  404. bl->raw_bd = bd;
  405. return 0;
  406. }
  407. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  408. u32 bl_lvl)
  409. {
  410. int rc = 0;
  411. struct mipi_dsi_device *dsi;
  412. if (!panel || (bl_lvl > 0xffff)) {
  413. DSI_ERR("invalid params\n");
  414. return -EINVAL;
  415. }
  416. dsi = &panel->mipi_device;
  417. if (panel->bl_config.bl_inverted_dbv)
  418. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  419. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  420. if (rc < 0)
  421. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  422. return rc;
  423. }
  424. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  425. u32 bl_lvl)
  426. {
  427. int rc = 0;
  428. u32 duty = 0;
  429. u32 period_ns = 0;
  430. struct dsi_backlight_config *bl;
  431. if (!panel) {
  432. DSI_ERR("Invalid Params\n");
  433. return -EINVAL;
  434. }
  435. bl = &panel->bl_config;
  436. if (!bl->pwm_bl) {
  437. DSI_ERR("pwm device not found\n");
  438. return -EINVAL;
  439. }
  440. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  441. duty = bl_lvl * period_ns;
  442. duty /= bl->bl_max_level;
  443. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  444. if (rc) {
  445. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  446. rc);
  447. goto error;
  448. }
  449. if (bl_lvl == 0 && bl->pwm_enabled) {
  450. pwm_disable(bl->pwm_bl);
  451. bl->pwm_enabled = false;
  452. return 0;
  453. }
  454. if (!bl->pwm_enabled) {
  455. rc = pwm_enable(bl->pwm_bl);
  456. if (rc) {
  457. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  458. rc);
  459. goto error;
  460. }
  461. bl->pwm_enabled = true;
  462. }
  463. error:
  464. return rc;
  465. }
  466. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  467. {
  468. int rc = 0;
  469. struct dsi_backlight_config *bl = &panel->bl_config;
  470. if (panel->host_config.ext_bridge_mode)
  471. return 0;
  472. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  473. switch (bl->type) {
  474. case DSI_BACKLIGHT_WLED:
  475. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  476. break;
  477. case DSI_BACKLIGHT_DCS:
  478. rc = dsi_panel_update_backlight(panel, bl_lvl);
  479. break;
  480. case DSI_BACKLIGHT_EXTERNAL:
  481. break;
  482. case DSI_BACKLIGHT_PWM:
  483. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  484. break;
  485. default:
  486. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  487. rc = -ENOTSUPP;
  488. }
  489. return rc;
  490. }
  491. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  492. {
  493. u32 cur_bl_level;
  494. struct backlight_device *bd = bl->raw_bd;
  495. /* default the brightness level to 50% */
  496. cur_bl_level = bl->bl_max_level >> 1;
  497. switch (bl->type) {
  498. case DSI_BACKLIGHT_WLED:
  499. /* Try to query the backlight level from the backlight device */
  500. if (bd->ops && bd->ops->get_brightness)
  501. cur_bl_level = bd->ops->get_brightness(bd);
  502. break;
  503. case DSI_BACKLIGHT_DCS:
  504. case DSI_BACKLIGHT_EXTERNAL:
  505. case DSI_BACKLIGHT_PWM:
  506. default:
  507. /*
  508. * Ideally, we should read the backlight level from the
  509. * panel. For now, just set it default value.
  510. */
  511. break;
  512. }
  513. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  514. return cur_bl_level;
  515. }
  516. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  517. {
  518. struct dsi_backlight_config *bl = &panel->bl_config;
  519. bl->bl_level = dsi_panel_get_brightness(bl);
  520. }
  521. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  522. {
  523. int rc = 0;
  524. struct dsi_backlight_config *bl = &panel->bl_config;
  525. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  526. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  527. rc = PTR_ERR(bl->pwm_bl);
  528. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  529. rc);
  530. return rc;
  531. }
  532. return 0;
  533. }
  534. static int dsi_panel_bl_register(struct dsi_panel *panel)
  535. {
  536. int rc = 0;
  537. struct dsi_backlight_config *bl = &panel->bl_config;
  538. if (panel->host_config.ext_bridge_mode)
  539. return 0;
  540. switch (bl->type) {
  541. case DSI_BACKLIGHT_WLED:
  542. rc = dsi_panel_wled_register(panel, bl);
  543. break;
  544. case DSI_BACKLIGHT_DCS:
  545. break;
  546. case DSI_BACKLIGHT_EXTERNAL:
  547. break;
  548. case DSI_BACKLIGHT_PWM:
  549. rc = dsi_panel_pwm_register(panel);
  550. break;
  551. default:
  552. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  553. rc = -ENOTSUPP;
  554. goto error;
  555. }
  556. error:
  557. return rc;
  558. }
  559. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  560. {
  561. struct dsi_backlight_config *bl = &panel->bl_config;
  562. devm_pwm_put(panel->parent, bl->pwm_bl);
  563. }
  564. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  565. {
  566. int rc = 0;
  567. struct dsi_backlight_config *bl = &panel->bl_config;
  568. if (panel->host_config.ext_bridge_mode)
  569. return 0;
  570. switch (bl->type) {
  571. case DSI_BACKLIGHT_WLED:
  572. break;
  573. case DSI_BACKLIGHT_DCS:
  574. break;
  575. case DSI_BACKLIGHT_EXTERNAL:
  576. break;
  577. case DSI_BACKLIGHT_PWM:
  578. dsi_panel_pwm_unregister(panel);
  579. break;
  580. default:
  581. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  582. rc = -ENOTSUPP;
  583. goto error;
  584. }
  585. error:
  586. return rc;
  587. }
  588. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  589. struct dsi_parser_utils *utils)
  590. {
  591. int rc = 0;
  592. u64 tmp64 = 0;
  593. struct dsi_display_mode *display_mode;
  594. struct dsi_display_mode_priv_info *priv_info;
  595. display_mode = container_of(mode, struct dsi_display_mode, timing);
  596. priv_info = display_mode->priv_info;
  597. rc = utils->read_u64(utils->data,
  598. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  599. if (rc == -EOVERFLOW) {
  600. tmp64 = 0;
  601. rc = utils->read_u32(utils->data,
  602. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  603. }
  604. mode->clk_rate_hz = !rc ? tmp64 : 0;
  605. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  606. mode->pclk_scale.numer = 1;
  607. mode->pclk_scale.denom = 1;
  608. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  609. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  610. &mode->mdp_transfer_time_us);
  611. if (!rc)
  612. display_mode->priv_info->mdp_transfer_time_us =
  613. mode->mdp_transfer_time_us;
  614. else
  615. display_mode->priv_info->mdp_transfer_time_us = 0;
  616. rc = utils->read_u32(utils->data,
  617. "qcom,mdss-dsi-panel-framerate",
  618. &mode->refresh_rate);
  619. if (rc) {
  620. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  621. rc);
  622. goto error;
  623. }
  624. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  625. &mode->h_active);
  626. if (rc) {
  627. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  628. rc);
  629. goto error;
  630. }
  631. rc = utils->read_u32(utils->data,
  632. "qcom,mdss-dsi-h-front-porch",
  633. &mode->h_front_porch);
  634. if (rc) {
  635. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  636. rc);
  637. goto error;
  638. }
  639. rc = utils->read_u32(utils->data,
  640. "qcom,mdss-dsi-h-back-porch",
  641. &mode->h_back_porch);
  642. if (rc) {
  643. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  644. rc);
  645. goto error;
  646. }
  647. rc = utils->read_u32(utils->data,
  648. "qcom,mdss-dsi-h-pulse-width",
  649. &mode->h_sync_width);
  650. if (rc) {
  651. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  652. rc);
  653. goto error;
  654. }
  655. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  656. &mode->h_skew);
  657. if (rc)
  658. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  659. rc);
  660. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  661. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  662. mode->h_sync_width);
  663. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  664. &mode->v_active);
  665. if (rc) {
  666. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  667. rc);
  668. goto error;
  669. }
  670. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  671. &mode->v_back_porch);
  672. if (rc) {
  673. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  674. rc);
  675. goto error;
  676. }
  677. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  678. &mode->v_front_porch);
  679. if (rc) {
  680. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  681. rc);
  682. goto error;
  683. }
  684. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  685. &mode->v_sync_width);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  692. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  693. mode->v_sync_width);
  694. error:
  695. return rc;
  696. }
  697. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  698. struct dsi_parser_utils *utils,
  699. const char *name)
  700. {
  701. int rc = 0;
  702. u32 bpp = 0;
  703. enum dsi_pixel_format fmt;
  704. const char *packing;
  705. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  706. if (rc) {
  707. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  708. name, rc);
  709. return rc;
  710. }
  711. host->bpp = bpp;
  712. switch (bpp) {
  713. case 3:
  714. fmt = DSI_PIXEL_FORMAT_RGB111;
  715. break;
  716. case 8:
  717. fmt = DSI_PIXEL_FORMAT_RGB332;
  718. break;
  719. case 12:
  720. fmt = DSI_PIXEL_FORMAT_RGB444;
  721. break;
  722. case 16:
  723. fmt = DSI_PIXEL_FORMAT_RGB565;
  724. break;
  725. case 18:
  726. fmt = DSI_PIXEL_FORMAT_RGB666;
  727. break;
  728. case 24:
  729. default:
  730. fmt = DSI_PIXEL_FORMAT_RGB888;
  731. break;
  732. }
  733. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  734. packing = utils->get_property(utils->data,
  735. "qcom,mdss-dsi-pixel-packing",
  736. NULL);
  737. if (packing && !strcmp(packing, "loose"))
  738. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  739. }
  740. host->dst_format = fmt;
  741. return rc;
  742. }
  743. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  744. struct dsi_parser_utils *utils,
  745. const char *name)
  746. {
  747. int rc = 0;
  748. bool lane_enabled;
  749. u32 num_of_lanes = 0;
  750. lane_enabled = utils->read_bool(utils->data,
  751. "qcom,mdss-dsi-lane-0-state");
  752. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  753. lane_enabled = utils->read_bool(utils->data,
  754. "qcom,mdss-dsi-lane-1-state");
  755. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  756. lane_enabled = utils->read_bool(utils->data,
  757. "qcom,mdss-dsi-lane-2-state");
  758. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  759. lane_enabled = utils->read_bool(utils->data,
  760. "qcom,mdss-dsi-lane-3-state");
  761. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  762. if (host->data_lanes & DSI_DATA_LANE_0)
  763. num_of_lanes++;
  764. if (host->data_lanes & DSI_DATA_LANE_1)
  765. num_of_lanes++;
  766. if (host->data_lanes & DSI_DATA_LANE_2)
  767. num_of_lanes++;
  768. if (host->data_lanes & DSI_DATA_LANE_3)
  769. num_of_lanes++;
  770. host->num_data_lanes = num_of_lanes;
  771. if (host->data_lanes == 0) {
  772. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  773. rc = -EINVAL;
  774. }
  775. return rc;
  776. }
  777. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  778. struct dsi_parser_utils *utils,
  779. const char *name)
  780. {
  781. int rc = 0;
  782. const char *swap_mode;
  783. swap_mode = utils->get_property(utils->data,
  784. "qcom,mdss-dsi-color-order", NULL);
  785. if (swap_mode) {
  786. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  787. host->swap_mode = DSI_COLOR_SWAP_RGB;
  788. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  789. host->swap_mode = DSI_COLOR_SWAP_RBG;
  790. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  791. host->swap_mode = DSI_COLOR_SWAP_BRG;
  792. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  793. host->swap_mode = DSI_COLOR_SWAP_GRB;
  794. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  795. host->swap_mode = DSI_COLOR_SWAP_GBR;
  796. } else {
  797. DSI_ERR("[%s] Unrecognized color order-%s\n",
  798. name, swap_mode);
  799. rc = -EINVAL;
  800. }
  801. } else {
  802. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  803. host->swap_mode = DSI_COLOR_SWAP_RGB;
  804. }
  805. /* bit swap on color channel is not defined in dt */
  806. host->bit_swap_red = false;
  807. host->bit_swap_green = false;
  808. host->bit_swap_blue = false;
  809. return rc;
  810. }
  811. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  812. struct dsi_parser_utils *utils,
  813. const char *name)
  814. {
  815. const char *trig;
  816. int rc = 0;
  817. trig = utils->get_property(utils->data,
  818. "qcom,mdss-dsi-mdp-trigger", NULL);
  819. if (trig) {
  820. if (!strcmp(trig, "none")) {
  821. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  822. } else if (!strcmp(trig, "trigger_te")) {
  823. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  824. } else if (!strcmp(trig, "trigger_sw")) {
  825. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  826. } else if (!strcmp(trig, "trigger_sw_te")) {
  827. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  828. } else {
  829. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  830. name, trig);
  831. rc = -EINVAL;
  832. }
  833. } else {
  834. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  835. name);
  836. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  837. }
  838. trig = utils->get_property(utils->data,
  839. "qcom,mdss-dsi-dma-trigger", NULL);
  840. if (trig) {
  841. if (!strcmp(trig, "none")) {
  842. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  843. } else if (!strcmp(trig, "trigger_te")) {
  844. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  845. } else if (!strcmp(trig, "trigger_sw")) {
  846. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  847. } else if (!strcmp(trig, "trigger_sw_seof")) {
  848. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  849. } else if (!strcmp(trig, "trigger_sw_te")) {
  850. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  851. } else {
  852. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  853. name, trig);
  854. rc = -EINVAL;
  855. }
  856. } else {
  857. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  858. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  859. }
  860. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  861. &host->te_mode);
  862. if (rc) {
  863. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  864. host->te_mode = 1;
  865. rc = 0;
  866. }
  867. return rc;
  868. }
  869. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  870. struct dsi_parser_utils *utils,
  871. const char *name)
  872. {
  873. u32 val = 0;
  874. int rc = 0;
  875. bool panel_cphy_mode = false;
  876. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  877. if (!rc) {
  878. host->t_clk_post = val;
  879. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  880. }
  881. val = 0;
  882. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  883. if (!rc) {
  884. host->t_clk_pre = val;
  885. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  886. }
  887. host->ignore_rx_eot = utils->read_bool(utils->data,
  888. "qcom,mdss-dsi-rx-eot-ignore");
  889. host->append_tx_eot = utils->read_bool(utils->data,
  890. "qcom,mdss-dsi-tx-eot-append");
  891. host->ext_bridge_mode = utils->read_bool(utils->data,
  892. "qcom,mdss-dsi-ext-bridge-mode");
  893. host->force_hs_clk_lane = utils->read_bool(utils->data,
  894. "qcom,mdss-dsi-force-clock-lane-hs");
  895. panel_cphy_mode = utils->read_bool(utils->data,
  896. "qcom,panel-cphy-mode");
  897. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  898. : DSI_PHY_TYPE_DPHY;
  899. return 0;
  900. }
  901. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  902. struct dsi_parser_utils *utils,
  903. const char *name)
  904. {
  905. int rc = 0;
  906. u32 val = 0;
  907. bool supported = false;
  908. struct dsi_split_link_config *split_link = &host->split_link;
  909. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  910. if (!supported) {
  911. DSI_DEBUG("[%s] Split link is not supported\n", name);
  912. split_link->split_link_enabled = false;
  913. return;
  914. }
  915. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  916. if (rc || val < 1) {
  917. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  918. split_link->num_sublinks = 2;
  919. } else {
  920. split_link->num_sublinks = val;
  921. }
  922. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  923. if (rc || val < 1) {
  924. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  925. split_link->lanes_per_sublink = 2;
  926. } else {
  927. split_link->lanes_per_sublink = val;
  928. }
  929. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  930. split_link->num_sublinks, split_link->lanes_per_sublink);
  931. split_link->split_link_enabled = true;
  932. }
  933. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  934. {
  935. int rc = 0;
  936. struct dsi_parser_utils *utils = &panel->utils;
  937. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  938. panel->name);
  939. if (rc) {
  940. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  941. panel->name, rc);
  942. goto error;
  943. }
  944. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  945. panel->name);
  946. if (rc) {
  947. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  948. panel->name, rc);
  949. goto error;
  950. }
  951. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  952. panel->name);
  953. if (rc) {
  954. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  955. panel->name, rc);
  956. goto error;
  957. }
  958. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  959. panel->name);
  960. if (rc) {
  961. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  962. panel->name, rc);
  963. goto error;
  964. }
  965. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  966. panel->name);
  967. if (rc) {
  968. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  969. panel->name, rc);
  970. goto error;
  971. }
  972. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  973. panel->name);
  974. error:
  975. return rc;
  976. }
  977. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  978. struct device_node *of_node)
  979. {
  980. int rc = 0;
  981. u32 val = 0;
  982. rc = of_property_read_u32(of_node,
  983. "qcom,mdss-dsi-qsync-min-refresh-rate",
  984. &val);
  985. if (rc)
  986. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  987. panel->name, rc);
  988. panel->qsync_min_fps = val;
  989. return rc;
  990. }
  991. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  992. {
  993. int rc = 0;
  994. bool supported = false;
  995. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  996. struct dsi_parser_utils *utils = &panel->utils;
  997. const char *name = panel->name;
  998. const char *type;
  999. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1000. if (!supported) {
  1001. dyn_clk_caps->dyn_clk_support = false;
  1002. return rc;
  1003. }
  1004. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1005. "qcom,dsi-dyn-clk-list");
  1006. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1007. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1008. return -EINVAL;
  1009. }
  1010. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1011. sizeof(u32), GFP_KERNEL);
  1012. if (!dyn_clk_caps->bit_clk_list)
  1013. return -ENOMEM;
  1014. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1015. dyn_clk_caps->bit_clk_list,
  1016. dyn_clk_caps->bit_clk_list_len);
  1017. if (rc) {
  1018. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1019. return -EINVAL;
  1020. }
  1021. dyn_clk_caps->dyn_clk_support = true;
  1022. type = utils->get_property(utils->data,
  1023. "qcom,dsi-dyn-clk-type", NULL);
  1024. if (!type) {
  1025. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1026. dyn_clk_caps->maintain_const_fps = false;
  1027. return 0;
  1028. }
  1029. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1030. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1031. dyn_clk_caps->maintain_const_fps = true;
  1032. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1033. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1034. dyn_clk_caps->maintain_const_fps = true;
  1035. } else {
  1036. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1037. dyn_clk_caps->maintain_const_fps = false;
  1038. }
  1039. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1040. return 0;
  1041. }
  1042. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1043. {
  1044. int rc = 0;
  1045. bool supported = false;
  1046. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1047. struct dsi_parser_utils *utils = &panel->utils;
  1048. const char *name = panel->name;
  1049. const char *type;
  1050. u32 i;
  1051. supported = utils->read_bool(utils->data,
  1052. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1053. if (!supported) {
  1054. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1055. dfps_caps->dfps_support = false;
  1056. return rc;
  1057. }
  1058. type = utils->get_property(utils->data,
  1059. "qcom,mdss-dsi-pan-fps-update", NULL);
  1060. if (!type) {
  1061. DSI_ERR("[%s] dfps type not defined\n", name);
  1062. rc = -EINVAL;
  1063. goto error;
  1064. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1065. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1066. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1067. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1068. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1069. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1070. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1071. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1072. } else {
  1073. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1074. rc = -EINVAL;
  1075. goto error;
  1076. }
  1077. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1078. "qcom,dsi-supported-dfps-list");
  1079. if (dfps_caps->dfps_list_len < 1) {
  1080. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1081. rc = -EINVAL;
  1082. goto error;
  1083. }
  1084. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1085. GFP_KERNEL);
  1086. if (!dfps_caps->dfps_list) {
  1087. rc = -ENOMEM;
  1088. goto error;
  1089. }
  1090. rc = utils->read_u32_array(utils->data,
  1091. "qcom,dsi-supported-dfps-list",
  1092. dfps_caps->dfps_list,
  1093. dfps_caps->dfps_list_len);
  1094. if (rc) {
  1095. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1096. rc = -EINVAL;
  1097. goto error;
  1098. }
  1099. dfps_caps->dfps_support = true;
  1100. /* calculate max and min fps */
  1101. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1102. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1103. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1104. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1105. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1106. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1107. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1108. }
  1109. error:
  1110. return rc;
  1111. }
  1112. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1113. struct dsi_parser_utils *utils,
  1114. const char *name)
  1115. {
  1116. int rc = 0;
  1117. const char *traffic_mode;
  1118. u32 vc_id = 0;
  1119. u32 val = 0;
  1120. u32 line_no = 0;
  1121. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1122. if (rc) {
  1123. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1124. cfg->pulse_mode_hsa_he = false;
  1125. } else if (val == 1) {
  1126. cfg->pulse_mode_hsa_he = true;
  1127. } else if (val == 0) {
  1128. cfg->pulse_mode_hsa_he = false;
  1129. } else {
  1130. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1131. name);
  1132. rc = -EINVAL;
  1133. goto error;
  1134. }
  1135. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1136. "qcom,mdss-dsi-hfp-power-mode");
  1137. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1138. "qcom,mdss-dsi-hbp-power-mode");
  1139. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1140. "qcom,mdss-dsi-hsa-power-mode");
  1141. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1142. "qcom,mdss-dsi-last-line-interleave");
  1143. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1144. "qcom,mdss-dsi-bllp-eof-power-mode");
  1145. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1146. "qcom,mdss-dsi-bllp-power-mode");
  1147. traffic_mode = utils->get_property(utils->data,
  1148. "qcom,mdss-dsi-traffic-mode",
  1149. NULL);
  1150. if (!traffic_mode) {
  1151. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1152. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1153. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1154. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1155. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1156. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1157. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1158. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1159. } else {
  1160. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1161. traffic_mode);
  1162. rc = -EINVAL;
  1163. goto error;
  1164. }
  1165. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1166. &vc_id);
  1167. if (rc) {
  1168. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1169. cfg->vc_id = 0;
  1170. } else {
  1171. cfg->vc_id = vc_id;
  1172. }
  1173. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  1174. &line_no);
  1175. if (rc) {
  1176. DSI_DEBUG("[%s] set default dma scheduling line no\n", name);
  1177. cfg->dma_sched_line = 0x1;
  1178. /* do not fail since we have default value */
  1179. rc = 0;
  1180. } else {
  1181. cfg->dma_sched_line = line_no;
  1182. }
  1183. error:
  1184. return rc;
  1185. }
  1186. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1187. struct dsi_parser_utils *utils,
  1188. const char *name)
  1189. {
  1190. u32 val = 0;
  1191. int rc = 0;
  1192. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1193. if (rc) {
  1194. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1195. cfg->wr_mem_start = 0x2C;
  1196. } else {
  1197. cfg->wr_mem_start = val;
  1198. }
  1199. val = 0;
  1200. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1201. &val);
  1202. if (rc) {
  1203. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1204. cfg->wr_mem_continue = 0x3C;
  1205. } else {
  1206. cfg->wr_mem_continue = val;
  1207. }
  1208. /* TODO: fix following */
  1209. cfg->max_cmd_packets_interleave = 0;
  1210. val = 0;
  1211. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1212. &val);
  1213. if (rc) {
  1214. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1215. cfg->insert_dcs_command = true;
  1216. } else if (val == 1) {
  1217. cfg->insert_dcs_command = true;
  1218. } else if (val == 0) {
  1219. cfg->insert_dcs_command = false;
  1220. } else {
  1221. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1222. name);
  1223. rc = -EINVAL;
  1224. goto error;
  1225. }
  1226. error:
  1227. return rc;
  1228. }
  1229. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1230. {
  1231. int rc = 0;
  1232. struct dsi_parser_utils *utils = &panel->utils;
  1233. bool panel_mode_switch_enabled;
  1234. enum dsi_op_mode panel_mode;
  1235. const char *mode;
  1236. mode = utils->get_property(utils->data,
  1237. "qcom,mdss-dsi-panel-type", NULL);
  1238. if (!mode) {
  1239. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1240. panel_mode = DSI_OP_VIDEO_MODE;
  1241. } else if (!strcmp(mode, "dsi_video_mode")) {
  1242. panel_mode = DSI_OP_VIDEO_MODE;
  1243. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1244. panel_mode = DSI_OP_CMD_MODE;
  1245. } else {
  1246. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1247. rc = -EINVAL;
  1248. goto error;
  1249. }
  1250. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1251. "qcom,mdss-dsi-panel-mode-switch");
  1252. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1253. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1254. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1255. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1256. utils,
  1257. panel->name);
  1258. if (rc) {
  1259. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1260. panel->name, rc);
  1261. goto error;
  1262. }
  1263. }
  1264. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1265. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1266. utils,
  1267. panel->name);
  1268. if (rc) {
  1269. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1270. panel->name, rc);
  1271. goto error;
  1272. }
  1273. }
  1274. panel->poms_align_vsync = utils->read_bool(utils->data,
  1275. "qcom,poms-align-panel-vsync");
  1276. panel->panel_mode = panel_mode;
  1277. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1278. error:
  1279. return rc;
  1280. }
  1281. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1282. {
  1283. int rc = 0;
  1284. u32 val = 0;
  1285. const char *str;
  1286. struct dsi_panel_phy_props *props = &panel->phy_props;
  1287. struct dsi_parser_utils *utils = &panel->utils;
  1288. const char *name = panel->name;
  1289. rc = utils->read_u32(utils->data,
  1290. "qcom,mdss-pan-physical-width-dimension", &val);
  1291. if (rc) {
  1292. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1293. props->panel_width_mm = 0;
  1294. rc = 0;
  1295. } else {
  1296. props->panel_width_mm = val;
  1297. }
  1298. rc = utils->read_u32(utils->data,
  1299. "qcom,mdss-pan-physical-height-dimension",
  1300. &val);
  1301. if (rc) {
  1302. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1303. props->panel_height_mm = 0;
  1304. rc = 0;
  1305. } else {
  1306. props->panel_height_mm = val;
  1307. }
  1308. str = utils->get_property(utils->data,
  1309. "qcom,mdss-dsi-panel-orientation", NULL);
  1310. if (!str) {
  1311. props->rotation = DSI_PANEL_ROTATE_NONE;
  1312. } else if (!strcmp(str, "180")) {
  1313. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1314. } else if (!strcmp(str, "hflip")) {
  1315. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1316. } else if (!strcmp(str, "vflip")) {
  1317. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1318. } else {
  1319. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1320. rc = -EINVAL;
  1321. goto error;
  1322. }
  1323. error:
  1324. return rc;
  1325. }
  1326. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1327. "qcom,mdss-dsi-pre-on-command",
  1328. "qcom,mdss-dsi-on-command",
  1329. "qcom,mdss-dsi-post-panel-on-command",
  1330. "qcom,mdss-dsi-pre-off-command",
  1331. "qcom,mdss-dsi-off-command",
  1332. "qcom,mdss-dsi-post-off-command",
  1333. "qcom,mdss-dsi-pre-res-switch",
  1334. "qcom,mdss-dsi-res-switch",
  1335. "qcom,mdss-dsi-post-res-switch",
  1336. "qcom,cmd-to-video-mode-switch-commands",
  1337. "qcom,cmd-to-video-mode-post-switch-commands",
  1338. "qcom,video-to-cmd-mode-switch-commands",
  1339. "qcom,video-to-cmd-mode-post-switch-commands",
  1340. "qcom,mdss-dsi-panel-status-command",
  1341. "qcom,mdss-dsi-lp1-command",
  1342. "qcom,mdss-dsi-lp2-command",
  1343. "qcom,mdss-dsi-nolp-command",
  1344. "PPS not parsed from DTSI, generated dynamically",
  1345. "ROI not parsed from DTSI, generated dynamically",
  1346. "qcom,mdss-dsi-timing-switch-command",
  1347. "qcom,mdss-dsi-post-mode-switch-on-command",
  1348. "qcom,mdss-dsi-qsync-on-commands",
  1349. "qcom,mdss-dsi-qsync-off-commands",
  1350. };
  1351. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1352. "qcom,mdss-dsi-pre-on-command-state",
  1353. "qcom,mdss-dsi-on-command-state",
  1354. "qcom,mdss-dsi-post-on-command-state",
  1355. "qcom,mdss-dsi-pre-off-command-state",
  1356. "qcom,mdss-dsi-off-command-state",
  1357. "qcom,mdss-dsi-post-off-command-state",
  1358. "qcom,mdss-dsi-pre-res-switch-state",
  1359. "qcom,mdss-dsi-res-switch-state",
  1360. "qcom,mdss-dsi-post-res-switch-state",
  1361. "qcom,cmd-to-video-mode-switch-commands-state",
  1362. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1363. "qcom,video-to-cmd-mode-switch-commands-state",
  1364. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1365. "qcom,mdss-dsi-panel-status-command-state",
  1366. "qcom,mdss-dsi-lp1-command-state",
  1367. "qcom,mdss-dsi-lp2-command-state",
  1368. "qcom,mdss-dsi-nolp-command-state",
  1369. "PPS not parsed from DTSI, generated dynamically",
  1370. "ROI not parsed from DTSI, generated dynamically",
  1371. "qcom,mdss-dsi-timing-switch-command-state",
  1372. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1373. "qcom,mdss-dsi-qsync-on-commands-state",
  1374. "qcom,mdss-dsi-qsync-off-commands-state",
  1375. };
  1376. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1377. {
  1378. const u32 cmd_set_min_size = 7;
  1379. u32 count = 0;
  1380. u32 packet_length;
  1381. u32 tmp;
  1382. while (length >= cmd_set_min_size) {
  1383. packet_length = cmd_set_min_size;
  1384. tmp = ((data[5] << 8) | (data[6]));
  1385. packet_length += tmp;
  1386. if (packet_length > length) {
  1387. DSI_ERR("format error\n");
  1388. return -EINVAL;
  1389. }
  1390. length -= packet_length;
  1391. data += packet_length;
  1392. count++;
  1393. }
  1394. *cnt = count;
  1395. return 0;
  1396. }
  1397. static int dsi_panel_create_cmd_packets(const char *data,
  1398. u32 length,
  1399. u32 count,
  1400. struct dsi_cmd_desc *cmd)
  1401. {
  1402. int rc = 0;
  1403. int i, j;
  1404. u8 *payload;
  1405. for (i = 0; i < count; i++) {
  1406. u32 size;
  1407. cmd[i].msg.type = data[0];
  1408. cmd[i].last_command = (data[1] == 1);
  1409. cmd[i].msg.channel = data[2];
  1410. cmd[i].msg.flags |= (data[3] == 1 ? MIPI_DSI_MSG_REQ_ACK : 0);
  1411. cmd[i].msg.ctrl = 0;
  1412. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1413. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1414. size = cmd[i].msg.tx_len * sizeof(u8);
  1415. payload = kzalloc(size, GFP_KERNEL);
  1416. if (!payload) {
  1417. rc = -ENOMEM;
  1418. goto error_free_payloads;
  1419. }
  1420. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1421. payload[j] = data[7 + j];
  1422. cmd[i].msg.tx_buf = payload;
  1423. data += (7 + cmd[i].msg.tx_len);
  1424. }
  1425. return rc;
  1426. error_free_payloads:
  1427. for (i = i - 1; i >= 0; i--) {
  1428. cmd--;
  1429. kfree(cmd->msg.tx_buf);
  1430. }
  1431. return rc;
  1432. }
  1433. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1434. {
  1435. u32 i = 0;
  1436. struct dsi_cmd_desc *cmd;
  1437. for (i = 0; i < set->count; i++) {
  1438. cmd = &set->cmds[i];
  1439. kfree(cmd->msg.tx_buf);
  1440. }
  1441. }
  1442. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1443. {
  1444. kfree(set->cmds);
  1445. }
  1446. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1447. u32 packet_count)
  1448. {
  1449. u32 size;
  1450. size = packet_count * sizeof(*cmd->cmds);
  1451. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1452. if (!cmd->cmds)
  1453. return -ENOMEM;
  1454. cmd->count = packet_count;
  1455. return 0;
  1456. }
  1457. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1458. enum dsi_cmd_set_type type,
  1459. struct dsi_parser_utils *utils)
  1460. {
  1461. int rc = 0;
  1462. u32 length = 0;
  1463. const char *data;
  1464. const char *state;
  1465. u32 packet_count = 0;
  1466. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1467. &length);
  1468. if (!data) {
  1469. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1470. rc = -ENOTSUPP;
  1471. goto error;
  1472. }
  1473. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1474. cmd_set_prop_map[type], length);
  1475. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1476. 8, 1, data, length, false);
  1477. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1478. if (rc) {
  1479. DSI_ERR("commands failed, rc=%d\n", rc);
  1480. goto error;
  1481. }
  1482. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1483. packet_count, length);
  1484. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1485. if (rc) {
  1486. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1487. goto error;
  1488. }
  1489. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1490. cmd->cmds);
  1491. if (rc) {
  1492. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1493. goto error_free_mem;
  1494. }
  1495. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1496. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1497. cmd->state = DSI_CMD_SET_STATE_LP;
  1498. } else if (!strcmp(state, "dsi_hs_mode")) {
  1499. cmd->state = DSI_CMD_SET_STATE_HS;
  1500. } else {
  1501. DSI_ERR("[%s] command state unrecognized-%s\n",
  1502. cmd_set_state_map[type], state);
  1503. goto error_free_mem;
  1504. }
  1505. return rc;
  1506. error_free_mem:
  1507. kfree(cmd->cmds);
  1508. cmd->cmds = NULL;
  1509. error:
  1510. return rc;
  1511. }
  1512. static int dsi_panel_parse_cmd_sets(
  1513. struct dsi_display_mode_priv_info *priv_info,
  1514. struct dsi_parser_utils *utils)
  1515. {
  1516. int rc = 0;
  1517. struct dsi_panel_cmd_set *set;
  1518. u32 i;
  1519. if (!priv_info) {
  1520. DSI_ERR("invalid mode priv info\n");
  1521. return -EINVAL;
  1522. }
  1523. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1524. set = &priv_info->cmd_sets[i];
  1525. set->type = i;
  1526. set->count = 0;
  1527. if (i == DSI_CMD_SET_PPS) {
  1528. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1529. if (rc)
  1530. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1531. i, rc);
  1532. set->state = DSI_CMD_SET_STATE_LP;
  1533. } else {
  1534. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1535. if (rc)
  1536. DSI_DEBUG("failed to parse set %d\n", i);
  1537. }
  1538. }
  1539. rc = 0;
  1540. return rc;
  1541. }
  1542. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1543. {
  1544. int rc = 0;
  1545. int i;
  1546. u32 length = 0;
  1547. u32 count = 0;
  1548. u32 size = 0;
  1549. u32 *arr_32 = NULL;
  1550. const u32 *arr;
  1551. struct dsi_parser_utils *utils = &panel->utils;
  1552. struct dsi_reset_seq *seq;
  1553. if (panel->host_config.ext_bridge_mode)
  1554. return 0;
  1555. arr = utils->get_property(utils->data,
  1556. "qcom,mdss-dsi-reset-sequence", &length);
  1557. if (!arr) {
  1558. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1559. rc = -EINVAL;
  1560. goto error;
  1561. }
  1562. if (length & 0x1) {
  1563. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1564. panel->name);
  1565. rc = -EINVAL;
  1566. goto error;
  1567. }
  1568. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1569. length = length / sizeof(u32);
  1570. size = length * sizeof(u32);
  1571. arr_32 = kzalloc(size, GFP_KERNEL);
  1572. if (!arr_32) {
  1573. rc = -ENOMEM;
  1574. goto error;
  1575. }
  1576. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1577. arr_32, length);
  1578. if (rc) {
  1579. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1580. goto error_free_arr_32;
  1581. }
  1582. count = length / 2;
  1583. size = count * sizeof(*seq);
  1584. seq = kzalloc(size, GFP_KERNEL);
  1585. if (!seq) {
  1586. rc = -ENOMEM;
  1587. goto error_free_arr_32;
  1588. }
  1589. panel->reset_config.sequence = seq;
  1590. panel->reset_config.count = count;
  1591. for (i = 0; i < length; i += 2) {
  1592. seq->level = arr_32[i];
  1593. seq->sleep_ms = arr_32[i + 1];
  1594. seq++;
  1595. }
  1596. error_free_arr_32:
  1597. kfree(arr_32);
  1598. error:
  1599. return rc;
  1600. }
  1601. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1602. {
  1603. struct dsi_parser_utils *utils = &panel->utils;
  1604. const char *string;
  1605. int i, rc = 0;
  1606. panel->ulps_feature_enabled =
  1607. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1608. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1609. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1610. panel->ulps_suspend_enabled =
  1611. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1612. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1613. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1614. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1615. "qcom,mdss-dsi-te-using-wd");
  1616. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1617. "qcom,cmd-sync-wait-broadcast");
  1618. panel->lp11_init = utils->read_bool(utils->data,
  1619. "qcom,mdss-dsi-lp11-init");
  1620. panel->spr_info.enable = false;
  1621. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1622. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1623. if (!rc) {
  1624. // find match for pack-type string
  1625. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1626. if (msm_spr_pack_type_str[i] &&
  1627. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1628. panel->spr_info.enable = true;
  1629. panel->spr_info.pack_type = i;
  1630. break;
  1631. }
  1632. }
  1633. }
  1634. pr_debug("%s source side spr packing, pack-type %s\n",
  1635. panel->spr_info.enable ? "enable" : "disable",
  1636. panel->spr_info.enable ?
  1637. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1638. return 0;
  1639. }
  1640. static int dsi_panel_parse_jitter_config(
  1641. struct dsi_display_mode *mode,
  1642. struct dsi_parser_utils *utils)
  1643. {
  1644. int rc;
  1645. struct dsi_display_mode_priv_info *priv_info;
  1646. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1647. u64 jitter_val = 0;
  1648. priv_info = mode->priv_info;
  1649. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1650. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1651. if (rc) {
  1652. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1653. } else {
  1654. jitter_val = jitter[0];
  1655. jitter_val = div_u64(jitter_val, jitter[1]);
  1656. }
  1657. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1658. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1659. priv_info->panel_jitter_denom =
  1660. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1661. } else {
  1662. priv_info->panel_jitter_numer = jitter[0];
  1663. priv_info->panel_jitter_denom = jitter[1];
  1664. }
  1665. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1666. &priv_info->panel_prefill_lines);
  1667. if (rc) {
  1668. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1669. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1670. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1671. } else if (priv_info->panel_prefill_lines >=
  1672. DSI_V_TOTAL(&mode->timing)) {
  1673. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1674. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1675. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1676. }
  1677. return 0;
  1678. }
  1679. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1680. {
  1681. int rc = 0;
  1682. char *supply_name;
  1683. if (panel->host_config.ext_bridge_mode)
  1684. return 0;
  1685. if (!strcmp(panel->type, "primary"))
  1686. supply_name = "qcom,panel-supply-entries";
  1687. else
  1688. supply_name = "qcom,panel-sec-supply-entries";
  1689. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1690. &panel->power_info, supply_name);
  1691. if (rc) {
  1692. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1693. goto error;
  1694. }
  1695. error:
  1696. return rc;
  1697. }
  1698. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1699. {
  1700. int rc = 0;
  1701. const char *data;
  1702. struct dsi_parser_utils *utils = &panel->utils;
  1703. char *reset_gpio_name, *mode_set_gpio_name;
  1704. if (!strcmp(panel->type, "primary")) {
  1705. reset_gpio_name = "qcom,platform-reset-gpio";
  1706. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1707. } else {
  1708. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1709. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1710. }
  1711. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1712. reset_gpio_name, 0);
  1713. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1714. !panel->host_config.ext_bridge_mode) {
  1715. rc = panel->reset_config.reset_gpio;
  1716. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1717. goto error;
  1718. }
  1719. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1720. "qcom,5v-boost-gpio",
  1721. 0);
  1722. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1723. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1724. panel->name, rc);
  1725. panel->reset_config.disp_en_gpio =
  1726. utils->get_named_gpio(utils->data,
  1727. "qcom,platform-en-gpio", 0);
  1728. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1729. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1730. panel->name, rc);
  1731. }
  1732. }
  1733. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1734. utils->data, mode_set_gpio_name, 0);
  1735. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1736. DSI_DEBUG("mode gpio not specified\n");
  1737. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1738. data = utils->get_property(utils->data,
  1739. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1740. if (data) {
  1741. if (!strcmp(data, "single_port"))
  1742. panel->reset_config.mode_sel_state =
  1743. MODE_SEL_SINGLE_PORT;
  1744. else if (!strcmp(data, "dual_port"))
  1745. panel->reset_config.mode_sel_state =
  1746. MODE_SEL_DUAL_PORT;
  1747. else if (!strcmp(data, "high"))
  1748. panel->reset_config.mode_sel_state =
  1749. MODE_GPIO_HIGH;
  1750. else if (!strcmp(data, "low"))
  1751. panel->reset_config.mode_sel_state =
  1752. MODE_GPIO_LOW;
  1753. } else {
  1754. /* Set default mode as SPLIT mode */
  1755. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1756. }
  1757. /* TODO: release memory */
  1758. rc = dsi_panel_parse_reset_sequence(panel);
  1759. if (rc) {
  1760. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1761. panel->name, rc);
  1762. goto error;
  1763. }
  1764. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1765. "qcom,mdss-dsi-panel-test-pin",
  1766. 0);
  1767. if (!gpio_is_valid(panel->panel_test_gpio))
  1768. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1769. __LINE__);
  1770. error:
  1771. return rc;
  1772. }
  1773. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1774. {
  1775. int rc = 0;
  1776. u32 val;
  1777. struct dsi_backlight_config *config = &panel->bl_config;
  1778. struct dsi_parser_utils *utils = &panel->utils;
  1779. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1780. &val);
  1781. if (rc) {
  1782. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1783. goto error;
  1784. }
  1785. config->pwm_period_usecs = val;
  1786. error:
  1787. return rc;
  1788. }
  1789. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1790. {
  1791. int rc = 0;
  1792. u32 val = 0;
  1793. const char *bl_type;
  1794. const char *data;
  1795. struct dsi_parser_utils *utils = &panel->utils;
  1796. char *bl_name;
  1797. if (!strcmp(panel->type, "primary"))
  1798. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1799. else
  1800. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1801. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1802. if (!bl_type) {
  1803. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1804. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1805. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1806. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1807. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1808. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1809. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1810. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1811. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1812. } else {
  1813. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1814. panel->name, bl_type);
  1815. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1816. }
  1817. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1818. if (!data) {
  1819. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1820. } else if (!strcmp(data, "delay_until_first_frame")) {
  1821. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1822. } else {
  1823. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1824. panel->name, data);
  1825. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1826. }
  1827. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1828. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1829. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1830. if (rc) {
  1831. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1832. panel->name);
  1833. panel->bl_config.bl_min_level = 0;
  1834. } else {
  1835. panel->bl_config.bl_min_level = val;
  1836. }
  1837. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1838. if (rc) {
  1839. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1840. panel->name);
  1841. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1842. } else {
  1843. panel->bl_config.bl_max_level = val;
  1844. }
  1845. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1846. &val);
  1847. if (rc) {
  1848. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1849. panel->name);
  1850. panel->bl_config.brightness_max_level = 255;
  1851. rc = 0;
  1852. } else {
  1853. panel->bl_config.brightness_max_level = val;
  1854. }
  1855. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1856. "qcom,mdss-dsi-bl-inverted-dbv");
  1857. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1858. rc = dsi_panel_parse_bl_pwm_config(panel);
  1859. if (rc) {
  1860. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1861. panel->name, rc);
  1862. goto error;
  1863. }
  1864. }
  1865. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1866. "qcom,platform-bklight-en-gpio",
  1867. 0);
  1868. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1869. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1870. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1871. panel->name, rc);
  1872. rc = -EPROBE_DEFER;
  1873. goto error;
  1874. } else {
  1875. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1876. panel->name, rc);
  1877. rc = 0;
  1878. goto error;
  1879. }
  1880. }
  1881. error:
  1882. return rc;
  1883. }
  1884. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1885. struct dsi_parser_utils *utils)
  1886. {
  1887. const char *data;
  1888. u32 len, i;
  1889. int rc = 0;
  1890. struct dsi_display_mode_priv_info *priv_info;
  1891. u64 pixel_clk_khz;
  1892. if (!mode || !mode->priv_info)
  1893. return -EINVAL;
  1894. priv_info = mode->priv_info;
  1895. data = utils->get_property(utils->data,
  1896. "qcom,mdss-dsi-panel-phy-timings", &len);
  1897. if (!data) {
  1898. DSI_DEBUG("Unable to read Phy timing settings\n");
  1899. } else {
  1900. priv_info->phy_timing_val =
  1901. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  1902. if (!priv_info->phy_timing_val)
  1903. return -EINVAL;
  1904. for (i = 0; i < len; i++)
  1905. priv_info->phy_timing_val[i] = data[i];
  1906. priv_info->phy_timing_len = len;
  1907. }
  1908. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  1909. /*
  1910. * For command mode we update the pclk as part of
  1911. * function dsi_panel_calc_dsi_transfer_time( )
  1912. * as we set it based on dsi clock or mdp transfer time.
  1913. */
  1914. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  1915. DSI_V_TOTAL(&mode->timing) *
  1916. mode->timing.refresh_rate);
  1917. do_div(pixel_clk_khz, 1000);
  1918. mode->pixel_clk_khz = pixel_clk_khz;
  1919. }
  1920. return rc;
  1921. }
  1922. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  1923. struct dsi_parser_utils *utils)
  1924. {
  1925. u32 data;
  1926. int rc = -EINVAL;
  1927. int intf_width;
  1928. const char *compression;
  1929. struct dsi_display_mode_priv_info *priv_info;
  1930. if (!mode || !mode->priv_info)
  1931. return -EINVAL;
  1932. priv_info = mode->priv_info;
  1933. priv_info->dsc_enabled = false;
  1934. compression = utils->get_property(utils->data,
  1935. "qcom,compression-mode", NULL);
  1936. if (compression && !strcmp(compression, "dsc"))
  1937. priv_info->dsc_enabled = true;
  1938. if (!priv_info->dsc_enabled) {
  1939. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  1940. return 0;
  1941. }
  1942. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  1943. if (rc) {
  1944. priv_info->dsc.config.dsc_version_major = 0x1;
  1945. priv_info->dsc.config.dsc_version_minor = 0x1;
  1946. rc = 0;
  1947. } else {
  1948. /* BITS[0..3] provides minor version and BITS[4..7] provide
  1949. * major version information
  1950. */
  1951. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  1952. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  1953. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  1954. ((priv_info->dsc.config.dsc_version_minor
  1955. != 0x1) ||
  1956. (priv_info->dsc.config.dsc_version_minor
  1957. != 0x2))) {
  1958. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  1959. __func__,
  1960. priv_info->dsc.config.dsc_version_major,
  1961. priv_info->dsc.config.dsc_version_minor
  1962. );
  1963. rc = -EINVAL;
  1964. goto error;
  1965. }
  1966. }
  1967. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  1968. if (rc) {
  1969. priv_info->dsc.scr_rev = 0x0;
  1970. rc = 0;
  1971. } else {
  1972. priv_info->dsc.scr_rev = data & 0xff;
  1973. /* only one scr rev supported */
  1974. if (priv_info->dsc.scr_rev > 0x1) {
  1975. DSI_ERR("%s: DSC scr version:%d not supported\n",
  1976. __func__, priv_info->dsc.scr_rev);
  1977. rc = -EINVAL;
  1978. goto error;
  1979. }
  1980. }
  1981. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  1982. if (rc) {
  1983. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  1984. goto error;
  1985. }
  1986. priv_info->dsc.config.slice_height = data;
  1987. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  1988. if (rc) {
  1989. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  1990. goto error;
  1991. }
  1992. priv_info->dsc.config.slice_width = data;
  1993. intf_width = mode->timing.h_active;
  1994. if (intf_width % priv_info->dsc.config.slice_width) {
  1995. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  1996. intf_width, priv_info->dsc.config.slice_width);
  1997. rc = -EINVAL;
  1998. goto error;
  1999. }
  2000. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2001. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2002. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2003. if (rc) {
  2004. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2005. goto error;
  2006. } else if (!data || (data > 2)) {
  2007. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2008. goto error;
  2009. }
  2010. priv_info->dsc.slice_per_pkt = data;
  2011. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2012. &data);
  2013. if (rc) {
  2014. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2015. goto error;
  2016. }
  2017. priv_info->dsc.config.bits_per_component = data;
  2018. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2019. if (rc) {
  2020. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2021. data = 0;
  2022. }
  2023. priv_info->dsc.pps_delay_ms = data;
  2024. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2025. &data);
  2026. if (rc) {
  2027. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2028. goto error;
  2029. }
  2030. priv_info->dsc.config.bits_per_pixel = data << 4;
  2031. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2032. &data);
  2033. if (rc) {
  2034. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2035. rc = 0;
  2036. data = MSM_CHROMA_444;
  2037. }
  2038. priv_info->dsc.chroma_format = data;
  2039. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2040. &data);
  2041. if (rc) {
  2042. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2043. rc = 0;
  2044. data = MSM_RGB;
  2045. }
  2046. priv_info->dsc.source_color_space = data;
  2047. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2048. "qcom,mdss-dsc-block-prediction-enable");
  2049. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2050. priv_info->dsc.config.slice_width);
  2051. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2052. priv_info->dsc.scr_rev);
  2053. if (rc) {
  2054. DSI_DEBUG("failed populating dsc params\n");
  2055. rc = -EINVAL;
  2056. goto error;
  2057. }
  2058. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2059. if (rc) {
  2060. DSI_DEBUG("failed populating other dsc params\n");
  2061. rc = -EINVAL;
  2062. goto error;
  2063. }
  2064. priv_info->pclk_scale.numer =
  2065. priv_info->dsc.config.bits_per_pixel >> 4;
  2066. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2067. priv_info->dsc.chroma_format,
  2068. priv_info->dsc.config.bits_per_component);
  2069. mode->timing.dsc_enabled = true;
  2070. mode->timing.dsc = &priv_info->dsc;
  2071. mode->timing.pclk_scale = priv_info->pclk_scale;
  2072. error:
  2073. return rc;
  2074. }
  2075. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2076. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2077. {
  2078. u32 data;
  2079. int rc = -EINVAL;
  2080. const char *compression;
  2081. struct dsi_display_mode_priv_info *priv_info;
  2082. int intf_width;
  2083. if (!mode || !mode->priv_info)
  2084. return -EINVAL;
  2085. priv_info = mode->priv_info;
  2086. priv_info->vdc_enabled = false;
  2087. compression = utils->get_property(utils->data,
  2088. "qcom,compression-mode", NULL);
  2089. if (compression && !strcmp(compression, "vdc"))
  2090. priv_info->vdc_enabled = true;
  2091. if (!priv_info->vdc_enabled) {
  2092. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2093. return 0;
  2094. }
  2095. priv_info->vdc.panel_mode = panel_mode;
  2096. priv_info->vdc.traffic_mode = traffic_mode;
  2097. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2098. if (rc) {
  2099. priv_info->vdc.version_major = 0x1;
  2100. priv_info->vdc.version_minor = 0x2;
  2101. priv_info->vdc.version_release = 0x0;
  2102. rc = 0;
  2103. } else {
  2104. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2105. * major version information
  2106. */
  2107. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2108. priv_info->vdc.version_minor = data & 0x0F;
  2109. if ((priv_info->vdc.version_major != 0x1) &&
  2110. ((priv_info->vdc.version_minor
  2111. != 0x2))) {
  2112. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2113. __func__,
  2114. priv_info->vdc.version_major,
  2115. priv_info->vdc.version_minor
  2116. );
  2117. rc = -EINVAL;
  2118. goto error;
  2119. }
  2120. }
  2121. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2122. if (rc) {
  2123. priv_info->vdc.version_release = 0x0;
  2124. rc = 0;
  2125. } else {
  2126. priv_info->vdc.version_release = data & 0xff;
  2127. /* only one release version is supported */
  2128. if (priv_info->vdc.version_release != 0x0) {
  2129. DSI_ERR("unsupported vdc release version %d\n",
  2130. priv_info->vdc.version_release);
  2131. rc = -EINVAL;
  2132. goto error;
  2133. }
  2134. }
  2135. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2136. priv_info->vdc.version_major,
  2137. priv_info->vdc.version_minor,
  2138. priv_info->vdc.version_release);
  2139. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2140. if (rc) {
  2141. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2142. goto error;
  2143. }
  2144. priv_info->vdc.slice_height = data;
  2145. /* slice height should be atleast 16 lines */
  2146. if (priv_info->vdc.slice_height < 16) {
  2147. DSI_ERR("invalid slice height %d\n",
  2148. priv_info->vdc.slice_height);
  2149. rc = -EINVAL;
  2150. goto error;
  2151. }
  2152. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2153. if (rc) {
  2154. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2155. goto error;
  2156. }
  2157. priv_info->vdc.slice_width = data;
  2158. /*
  2159. * slide-width should be multiple of 8
  2160. * slice-width should be atlease 64 pixels
  2161. */
  2162. if ((priv_info->vdc.slice_width & 7) ||
  2163. (priv_info->vdc.slice_width < 64)) {
  2164. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2165. rc = -EINVAL;
  2166. goto error;
  2167. }
  2168. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2169. if (rc) {
  2170. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2171. goto error;
  2172. } else if (!data || (data > 2)) {
  2173. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2174. rc = -EINVAL;
  2175. goto error;
  2176. }
  2177. intf_width = mode->timing.h_active;
  2178. priv_info->vdc.slice_per_pkt = data;
  2179. priv_info->vdc.frame_width = mode->timing.h_active;
  2180. priv_info->vdc.frame_height = mode->timing.v_active;
  2181. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2182. &data);
  2183. if (rc) {
  2184. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2185. goto error;
  2186. }
  2187. priv_info->vdc.bits_per_component = data;
  2188. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2189. if (rc) {
  2190. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2191. data = 0;
  2192. }
  2193. priv_info->vdc.pps_delay_ms = data;
  2194. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2195. &data);
  2196. if (rc) {
  2197. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2198. goto error;
  2199. }
  2200. priv_info->vdc.bits_per_pixel = data << 4;
  2201. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2202. &data);
  2203. if (rc) {
  2204. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2205. rc = 0;
  2206. data = MSM_CHROMA_444;
  2207. }
  2208. priv_info->vdc.chroma_format = data;
  2209. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2210. &data);
  2211. if (rc) {
  2212. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2213. rc = 0;
  2214. data = MSM_RGB;
  2215. }
  2216. priv_info->vdc.source_color_space = data;
  2217. rc = sde_vdc_populate_config(&priv_info->vdc,
  2218. intf_width, traffic_mode);
  2219. if (rc) {
  2220. DSI_DEBUG("failed populating vdc config\n");
  2221. rc = -EINVAL;
  2222. goto error;
  2223. }
  2224. priv_info->pclk_scale.numer =
  2225. priv_info->vdc.bits_per_pixel >> 4;
  2226. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2227. priv_info->vdc.chroma_format,
  2228. priv_info->vdc.bits_per_component);
  2229. mode->timing.vdc_enabled = true;
  2230. mode->timing.vdc = &priv_info->vdc;
  2231. mode->timing.pclk_scale = priv_info->pclk_scale;
  2232. error:
  2233. return rc;
  2234. }
  2235. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2236. {
  2237. int rc = 0;
  2238. struct drm_panel_hdr_properties *hdr_prop;
  2239. struct dsi_parser_utils *utils = &panel->utils;
  2240. hdr_prop = &panel->hdr_props;
  2241. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2242. "qcom,mdss-dsi-panel-hdr-enabled");
  2243. if (hdr_prop->hdr_enabled) {
  2244. rc = utils->read_u32_array(utils->data,
  2245. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2246. hdr_prop->display_primaries,
  2247. DISPLAY_PRIMARIES_MAX);
  2248. if (rc) {
  2249. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2250. __func__, __LINE__, rc);
  2251. hdr_prop->hdr_enabled = false;
  2252. return rc;
  2253. }
  2254. rc = utils->read_u32(utils->data,
  2255. "qcom,mdss-dsi-panel-peak-brightness",
  2256. &(hdr_prop->peak_brightness));
  2257. if (rc) {
  2258. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2259. __func__, __LINE__, rc);
  2260. hdr_prop->hdr_enabled = false;
  2261. return rc;
  2262. }
  2263. rc = utils->read_u32(utils->data,
  2264. "qcom,mdss-dsi-panel-blackness-level",
  2265. &(hdr_prop->blackness_level));
  2266. if (rc) {
  2267. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2268. __func__, __LINE__, rc);
  2269. hdr_prop->hdr_enabled = false;
  2270. return rc;
  2271. }
  2272. }
  2273. return 0;
  2274. }
  2275. static int dsi_panel_parse_topology(
  2276. struct dsi_display_mode_priv_info *priv_info,
  2277. struct dsi_parser_utils *utils,
  2278. int topology_override)
  2279. {
  2280. struct msm_display_topology *topology;
  2281. u32 top_count, top_sel, *array = NULL;
  2282. int i, len = 0;
  2283. int rc = -EINVAL;
  2284. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2285. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2286. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2287. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2288. return rc;
  2289. }
  2290. top_count = len / TOPOLOGY_SET_LEN;
  2291. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2292. if (!array)
  2293. return -ENOMEM;
  2294. rc = utils->read_u32_array(utils->data,
  2295. "qcom,display-topology", array, len);
  2296. if (rc) {
  2297. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2298. goto read_fail;
  2299. }
  2300. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2301. if (!topology) {
  2302. rc = -ENOMEM;
  2303. goto read_fail;
  2304. }
  2305. for (i = 0; i < top_count; i++) {
  2306. struct msm_display_topology *top = &topology[i];
  2307. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2308. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2309. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2310. }
  2311. if (topology_override >= 0 && topology_override < top_count) {
  2312. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2313. topology_override,
  2314. topology[topology_override].num_lm,
  2315. topology[topology_override].num_enc,
  2316. topology[topology_override].num_intf);
  2317. top_sel = topology_override;
  2318. goto parse_done;
  2319. }
  2320. rc = utils->read_u32(utils->data,
  2321. "qcom,default-topology-index", &top_sel);
  2322. if (rc) {
  2323. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2324. goto parse_fail;
  2325. }
  2326. if (top_sel >= top_count) {
  2327. rc = -EINVAL;
  2328. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2329. rc);
  2330. goto parse_fail;
  2331. }
  2332. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2333. topology[top_sel].num_lm,
  2334. topology[top_sel].num_enc,
  2335. topology[top_sel].num_intf);
  2336. parse_done:
  2337. memcpy(&priv_info->topology, &topology[top_sel],
  2338. sizeof(struct msm_display_topology));
  2339. parse_fail:
  2340. kfree(topology);
  2341. read_fail:
  2342. kfree(array);
  2343. return rc;
  2344. }
  2345. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2346. struct msm_roi_alignment *align)
  2347. {
  2348. int len = 0, rc = 0;
  2349. u32 value[6];
  2350. struct property *data;
  2351. if (!align)
  2352. return -EINVAL;
  2353. memset(align, 0, sizeof(*align));
  2354. data = utils->find_property(utils->data,
  2355. "qcom,panel-roi-alignment", &len);
  2356. len /= sizeof(u32);
  2357. if (!data) {
  2358. DSI_ERR("panel roi alignment not found\n");
  2359. rc = -EINVAL;
  2360. } else if (len != 6) {
  2361. DSI_ERR("incorrect roi alignment len %d\n", len);
  2362. rc = -EINVAL;
  2363. } else {
  2364. rc = utils->read_u32_array(utils->data,
  2365. "qcom,panel-roi-alignment", value, len);
  2366. if (rc)
  2367. DSI_DEBUG("error reading panel roi alignment values\n");
  2368. else {
  2369. align->xstart_pix_align = value[0];
  2370. align->ystart_pix_align = value[1];
  2371. align->width_pix_align = value[2];
  2372. align->height_pix_align = value[3];
  2373. align->min_width = value[4];
  2374. align->min_height = value[5];
  2375. }
  2376. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2377. align->xstart_pix_align,
  2378. align->width_pix_align,
  2379. align->ystart_pix_align,
  2380. align->height_pix_align,
  2381. align->min_width,
  2382. align->min_height);
  2383. }
  2384. return rc;
  2385. }
  2386. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2387. struct dsi_parser_utils *utils)
  2388. {
  2389. struct msm_roi_caps *roi_caps = NULL;
  2390. const char *data;
  2391. int rc = 0;
  2392. if (!mode || !mode->priv_info) {
  2393. DSI_ERR("invalid arguments\n");
  2394. return -EINVAL;
  2395. }
  2396. roi_caps = &mode->priv_info->roi_caps;
  2397. memset(roi_caps, 0, sizeof(*roi_caps));
  2398. data = utils->get_property(utils->data,
  2399. "qcom,partial-update-enabled", NULL);
  2400. if (data) {
  2401. if (!strcmp(data, "dual_roi"))
  2402. roi_caps->num_roi = 2;
  2403. else if (!strcmp(data, "single_roi"))
  2404. roi_caps->num_roi = 1;
  2405. else {
  2406. DSI_INFO(
  2407. "invalid value for qcom,partial-update-enabled: %s\n",
  2408. data);
  2409. return 0;
  2410. }
  2411. } else {
  2412. DSI_DEBUG("partial update disabled as the property is not set\n");
  2413. return 0;
  2414. }
  2415. roi_caps->merge_rois = utils->read_bool(utils->data,
  2416. "qcom,partial-update-roi-merge");
  2417. roi_caps->enabled = roi_caps->num_roi > 0;
  2418. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2419. roi_caps->enabled);
  2420. if (roi_caps->enabled)
  2421. rc = dsi_panel_parse_roi_alignment(utils,
  2422. &roi_caps->align);
  2423. if (rc)
  2424. memset(roi_caps, 0, sizeof(*roi_caps));
  2425. return rc;
  2426. }
  2427. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2428. struct dsi_parser_utils *utils)
  2429. {
  2430. bool vid_mode_support, cmd_mode_support;
  2431. if (!mode || !mode->priv_info) {
  2432. DSI_ERR("invalid arguments\n");
  2433. return -EINVAL;
  2434. }
  2435. vid_mode_support = utils->read_bool(utils->data,
  2436. "qcom,mdss-dsi-video-mode");
  2437. cmd_mode_support = utils->read_bool(utils->data,
  2438. "qcom,mdss-dsi-cmd-mode");
  2439. if (cmd_mode_support)
  2440. mode->panel_mode = DSI_OP_CMD_MODE;
  2441. else if (vid_mode_support)
  2442. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2443. else
  2444. return -EINVAL;
  2445. return 0;
  2446. };
  2447. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2448. {
  2449. int dms_enabled;
  2450. const char *data;
  2451. struct dsi_parser_utils *utils = &panel->utils;
  2452. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2453. dms_enabled = utils->read_bool(utils->data,
  2454. "qcom,dynamic-mode-switch-enabled");
  2455. if (!dms_enabled)
  2456. return 0;
  2457. data = utils->get_property(utils->data,
  2458. "qcom,dynamic-mode-switch-type", NULL);
  2459. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2460. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2461. } else {
  2462. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2463. panel->name, data);
  2464. return -EINVAL;
  2465. }
  2466. return 0;
  2467. };
  2468. /*
  2469. * The length of all the valid values to be checked should not be greater
  2470. * than the length of returned data from read command.
  2471. */
  2472. static bool
  2473. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2474. {
  2475. int i;
  2476. struct drm_panel_esd_config *config = &panel->esd_config;
  2477. for (i = 0; i < count; ++i) {
  2478. if (config->status_valid_params[i] >
  2479. config->status_cmds_rlen[i]) {
  2480. DSI_DEBUG("ignore valid params\n");
  2481. return false;
  2482. }
  2483. }
  2484. return true;
  2485. }
  2486. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2487. char *prop_key, u32 **target, u32 cmd_cnt)
  2488. {
  2489. int tmp;
  2490. if (!utils->find_property(utils->data, prop_key, &tmp))
  2491. return false;
  2492. tmp /= sizeof(u32);
  2493. if (tmp != cmd_cnt) {
  2494. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2495. tmp, cmd_cnt);
  2496. return false;
  2497. }
  2498. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2499. if (IS_ERR_OR_NULL(*target)) {
  2500. DSI_ERR("Error allocating memory for property\n");
  2501. return false;
  2502. }
  2503. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2504. DSI_ERR("cannot get values from dts\n");
  2505. kfree(*target);
  2506. *target = NULL;
  2507. return false;
  2508. }
  2509. return true;
  2510. }
  2511. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2512. {
  2513. kfree(esd_config->status_buf);
  2514. kfree(esd_config->return_buf);
  2515. kfree(esd_config->status_value);
  2516. kfree(esd_config->status_valid_params);
  2517. kfree(esd_config->status_cmds_rlen);
  2518. kfree(esd_config->status_cmd.cmds);
  2519. }
  2520. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2521. {
  2522. struct drm_panel_esd_config *esd_config;
  2523. int rc = 0;
  2524. u32 tmp;
  2525. u32 i, status_len, *lenp;
  2526. struct property *data;
  2527. struct dsi_parser_utils *utils = &panel->utils;
  2528. if (!panel) {
  2529. DSI_ERR("Invalid Params\n");
  2530. return -EINVAL;
  2531. }
  2532. esd_config = &panel->esd_config;
  2533. if (!esd_config)
  2534. return -EINVAL;
  2535. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2536. DSI_CMD_SET_PANEL_STATUS, utils);
  2537. if (!esd_config->status_cmd.count) {
  2538. DSI_ERR("panel status command parsing failed\n");
  2539. rc = -EINVAL;
  2540. goto error;
  2541. }
  2542. if (!dsi_panel_parse_esd_status_len(utils,
  2543. "qcom,mdss-dsi-panel-status-read-length",
  2544. &panel->esd_config.status_cmds_rlen,
  2545. esd_config->status_cmd.count)) {
  2546. DSI_ERR("Invalid status read length\n");
  2547. rc = -EINVAL;
  2548. goto error1;
  2549. }
  2550. if (dsi_panel_parse_esd_status_len(utils,
  2551. "qcom,mdss-dsi-panel-status-valid-params",
  2552. &panel->esd_config.status_valid_params,
  2553. esd_config->status_cmd.count)) {
  2554. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2555. esd_config->status_cmd.count)) {
  2556. rc = -EINVAL;
  2557. goto error2;
  2558. }
  2559. }
  2560. status_len = 0;
  2561. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2562. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2563. status_len += lenp[i];
  2564. if (!status_len) {
  2565. rc = -EINVAL;
  2566. goto error2;
  2567. }
  2568. /*
  2569. * Some panel may need multiple read commands to properly
  2570. * check panel status. Do a sanity check for proper status
  2571. * value which will be compared with the value read by dsi
  2572. * controller during ESD check. Also check if multiple read
  2573. * commands are there then, there should be corresponding
  2574. * status check values for each read command.
  2575. */
  2576. data = utils->find_property(utils->data,
  2577. "qcom,mdss-dsi-panel-status-value", &tmp);
  2578. tmp /= sizeof(u32);
  2579. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2580. esd_config->groups = tmp / status_len;
  2581. } else {
  2582. DSI_ERR("error parse panel-status-value\n");
  2583. rc = -EINVAL;
  2584. goto error2;
  2585. }
  2586. esd_config->status_value =
  2587. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2588. GFP_KERNEL);
  2589. if (!esd_config->status_value) {
  2590. rc = -ENOMEM;
  2591. goto error2;
  2592. }
  2593. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2594. sizeof(unsigned char), GFP_KERNEL);
  2595. if (!esd_config->return_buf) {
  2596. rc = -ENOMEM;
  2597. goto error3;
  2598. }
  2599. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2600. if (!esd_config->status_buf) {
  2601. rc = -ENOMEM;
  2602. goto error4;
  2603. }
  2604. rc = utils->read_u32_array(utils->data,
  2605. "qcom,mdss-dsi-panel-status-value",
  2606. esd_config->status_value, esd_config->groups * status_len);
  2607. if (rc) {
  2608. DSI_DEBUG("error reading panel status values\n");
  2609. memset(esd_config->status_value, 0,
  2610. esd_config->groups * status_len);
  2611. }
  2612. return 0;
  2613. error4:
  2614. kfree(esd_config->return_buf);
  2615. error3:
  2616. kfree(esd_config->status_value);
  2617. error2:
  2618. kfree(esd_config->status_valid_params);
  2619. kfree(esd_config->status_cmds_rlen);
  2620. error1:
  2621. kfree(esd_config->status_cmd.cmds);
  2622. error:
  2623. return rc;
  2624. }
  2625. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2626. {
  2627. int rc = 0;
  2628. const char *string;
  2629. struct drm_panel_esd_config *esd_config;
  2630. struct dsi_parser_utils *utils = &panel->utils;
  2631. u8 *esd_mode = NULL;
  2632. esd_config = &panel->esd_config;
  2633. esd_config->status_mode = ESD_MODE_MAX;
  2634. esd_config->esd_enabled = utils->read_bool(utils->data,
  2635. "qcom,esd-check-enabled");
  2636. if (!esd_config->esd_enabled)
  2637. return 0;
  2638. rc = utils->read_string(utils->data,
  2639. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2640. if (!rc) {
  2641. if (!strcmp(string, "bta_check")) {
  2642. esd_config->status_mode = ESD_MODE_SW_BTA;
  2643. } else if (!strcmp(string, "reg_read")) {
  2644. esd_config->status_mode = ESD_MODE_REG_READ;
  2645. } else if (!strcmp(string, "te_signal_check")) {
  2646. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2647. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2648. } else {
  2649. DSI_ERR("TE-ESD not valid for video mode\n");
  2650. rc = -EINVAL;
  2651. goto error;
  2652. }
  2653. } else {
  2654. DSI_ERR("No valid panel-status-check-mode string\n");
  2655. rc = -EINVAL;
  2656. goto error;
  2657. }
  2658. } else {
  2659. DSI_DEBUG("status check method not defined!\n");
  2660. rc = -EINVAL;
  2661. goto error;
  2662. }
  2663. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2664. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2665. if (rc) {
  2666. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2667. rc);
  2668. goto error;
  2669. }
  2670. esd_mode = "register_read";
  2671. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2672. esd_mode = "bta_trigger";
  2673. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2674. esd_mode = "te_check";
  2675. }
  2676. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2677. return 0;
  2678. error:
  2679. panel->esd_config.esd_enabled = false;
  2680. return rc;
  2681. }
  2682. static void dsi_panel_update_util(struct dsi_panel *panel,
  2683. struct device_node *parser_node)
  2684. {
  2685. struct dsi_parser_utils *utils = &panel->utils;
  2686. if (parser_node) {
  2687. *utils = *dsi_parser_get_parser_utils();
  2688. utils->data = parser_node;
  2689. DSI_DEBUG("switching to parser APIs\n");
  2690. goto end;
  2691. }
  2692. *utils = *dsi_parser_get_of_utils();
  2693. utils->data = panel->panel_of_node;
  2694. end:
  2695. utils->node = panel->panel_of_node;
  2696. }
  2697. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2698. {
  2699. return 0;
  2700. }
  2701. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2702. {
  2703. if (trusted_vm_env) {
  2704. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2705. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2706. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2707. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2708. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2709. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2710. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2711. } else {
  2712. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2713. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2714. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2715. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2716. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2717. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2718. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2719. }
  2720. }
  2721. struct dsi_panel *dsi_panel_get(struct device *parent,
  2722. struct device_node *of_node,
  2723. struct device_node *parser_node,
  2724. const char *type,
  2725. int topology_override,
  2726. bool trusted_vm_env)
  2727. {
  2728. struct dsi_panel *panel;
  2729. struct dsi_parser_utils *utils;
  2730. const char *panel_physical_type;
  2731. int rc = 0;
  2732. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2733. if (!panel)
  2734. return ERR_PTR(-ENOMEM);
  2735. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2736. panel->panel_of_node = of_node;
  2737. panel->parent = parent;
  2738. panel->type = type;
  2739. dsi_panel_update_util(panel, parser_node);
  2740. utils = &panel->utils;
  2741. panel->name = utils->get_property(utils->data,
  2742. "qcom,mdss-dsi-panel-name", NULL);
  2743. if (!panel->name)
  2744. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2745. /*
  2746. * Set panel type to LCD as default.
  2747. */
  2748. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2749. panel_physical_type = utils->get_property(utils->data,
  2750. "qcom,mdss-dsi-panel-physical-type", NULL);
  2751. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2752. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2753. rc = dsi_panel_parse_host_config(panel);
  2754. if (rc) {
  2755. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2756. rc);
  2757. goto error;
  2758. }
  2759. rc = dsi_panel_parse_panel_mode(panel);
  2760. if (rc) {
  2761. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2762. rc);
  2763. goto error;
  2764. }
  2765. rc = dsi_panel_parse_dfps_caps(panel);
  2766. if (rc)
  2767. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2768. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2769. if (rc)
  2770. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2771. /* allow qsync support only if DFPS is with VFP approach */
  2772. if ((panel->dfps_caps.dfps_support) &&
  2773. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2774. panel->qsync_min_fps = 0;
  2775. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2776. if (rc)
  2777. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2778. rc = dsi_panel_parse_phy_props(panel);
  2779. if (rc) {
  2780. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2781. rc);
  2782. goto error;
  2783. }
  2784. rc = panel->panel_ops.parse_gpios(panel);
  2785. if (rc) {
  2786. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2787. goto error;
  2788. }
  2789. rc = dsi_panel_parse_power_cfg(panel);
  2790. if (rc)
  2791. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2792. rc = dsi_panel_parse_bl_config(panel);
  2793. if (rc) {
  2794. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2795. if (rc == -EPROBE_DEFER)
  2796. goto error;
  2797. }
  2798. rc = dsi_panel_parse_misc_features(panel);
  2799. if (rc)
  2800. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2801. rc = dsi_panel_parse_hdr_config(panel);
  2802. if (rc)
  2803. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2804. rc = dsi_panel_get_mode_count(panel);
  2805. if (rc) {
  2806. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2807. goto error;
  2808. }
  2809. rc = dsi_panel_parse_dms_info(panel);
  2810. if (rc)
  2811. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2812. rc = dsi_panel_parse_esd_config(panel);
  2813. if (rc)
  2814. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2815. rc = dsi_panel_vreg_get(panel);
  2816. if (rc) {
  2817. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2818. panel->name, rc);
  2819. goto error;
  2820. }
  2821. panel->power_mode = SDE_MODE_DPMS_OFF;
  2822. drm_panel_init(&panel->drm_panel);
  2823. panel->drm_panel.dev = &panel->mipi_device.dev;
  2824. panel->mipi_device.dev.of_node = of_node;
  2825. rc = drm_panel_add(&panel->drm_panel);
  2826. if (rc)
  2827. goto error_vreg_put;
  2828. mutex_init(&panel->panel_lock);
  2829. return panel;
  2830. error_vreg_put:
  2831. (void)dsi_panel_vreg_put(panel);
  2832. error:
  2833. kfree(panel);
  2834. return ERR_PTR(rc);
  2835. }
  2836. void dsi_panel_put(struct dsi_panel *panel)
  2837. {
  2838. drm_panel_remove(&panel->drm_panel);
  2839. /* free resources allocated for ESD check */
  2840. dsi_panel_esd_config_deinit(&panel->esd_config);
  2841. kfree(panel);
  2842. }
  2843. int dsi_panel_drv_init(struct dsi_panel *panel,
  2844. struct mipi_dsi_host *host)
  2845. {
  2846. int rc = 0;
  2847. struct mipi_dsi_device *dev;
  2848. if (!panel || !host) {
  2849. DSI_ERR("invalid params\n");
  2850. return -EINVAL;
  2851. }
  2852. mutex_lock(&panel->panel_lock);
  2853. dev = &panel->mipi_device;
  2854. dev->host = host;
  2855. /*
  2856. * We dont have device structure since panel is not a device node.
  2857. * When using drm panel framework, the device is probed when the host is
  2858. * create.
  2859. */
  2860. dev->channel = 0;
  2861. dev->lanes = 4;
  2862. panel->host = host;
  2863. rc = panel->panel_ops.pinctrl_init(panel);
  2864. if (rc) {
  2865. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2866. panel->name, rc);
  2867. goto exit;
  2868. }
  2869. rc = panel->panel_ops.gpio_request(panel);
  2870. if (rc) {
  2871. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2872. rc);
  2873. goto error_pinctrl_deinit;
  2874. }
  2875. rc = panel->panel_ops.bl_register(panel);
  2876. if (rc) {
  2877. if (rc != -EPROBE_DEFER)
  2878. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2879. panel->name, rc);
  2880. goto error_gpio_release;
  2881. }
  2882. goto exit;
  2883. error_gpio_release:
  2884. (void)dsi_panel_gpio_release(panel);
  2885. error_pinctrl_deinit:
  2886. (void)dsi_panel_pinctrl_deinit(panel);
  2887. exit:
  2888. mutex_unlock(&panel->panel_lock);
  2889. return rc;
  2890. }
  2891. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2892. {
  2893. int rc = 0;
  2894. if (!panel) {
  2895. DSI_ERR("invalid params\n");
  2896. return -EINVAL;
  2897. }
  2898. mutex_lock(&panel->panel_lock);
  2899. rc = panel->panel_ops.bl_unregister(panel);
  2900. if (rc)
  2901. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  2902. panel->name, rc);
  2903. rc = panel->panel_ops.gpio_release(panel);
  2904. if (rc)
  2905. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  2906. rc);
  2907. rc = panel->panel_ops.pinctrl_deinit(panel);
  2908. if (rc)
  2909. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  2910. rc);
  2911. rc = dsi_panel_vreg_put(panel);
  2912. if (rc)
  2913. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  2914. panel->host = NULL;
  2915. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  2916. mutex_unlock(&panel->panel_lock);
  2917. return rc;
  2918. }
  2919. int dsi_panel_validate_mode(struct dsi_panel *panel,
  2920. struct dsi_display_mode *mode)
  2921. {
  2922. return 0;
  2923. }
  2924. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  2925. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  2926. {
  2927. const char *compression;
  2928. u32 *array = NULL, top_count, len, i;
  2929. int rc = -EINVAL;
  2930. bool dsc_enable = false;
  2931. *dsc_count = 0;
  2932. *lm_count = 0;
  2933. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  2934. if (compression && !strcmp(compression, "dsc"))
  2935. dsc_enable = true;
  2936. len = utils->count_u32_elems(node, "qcom,display-topology");
  2937. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2938. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  2939. return rc;
  2940. top_count = len / TOPOLOGY_SET_LEN;
  2941. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2942. if (!array)
  2943. return -ENOMEM;
  2944. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  2945. if (rc) {
  2946. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2947. goto read_fail;
  2948. }
  2949. for (i = 0; i < top_count; i++) {
  2950. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  2951. if (dsc_enable)
  2952. *dsc_count = max(*dsc_count,
  2953. array[i * TOPOLOGY_SET_LEN + 1]);
  2954. }
  2955. read_fail:
  2956. kfree(array);
  2957. return 0;
  2958. }
  2959. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  2960. {
  2961. const u32 SINGLE_MODE_SUPPORT = 1;
  2962. struct dsi_parser_utils *utils;
  2963. struct device_node *timings_np, *child_np;
  2964. int num_dfps_rates, num_bit_clks;
  2965. int num_video_modes = 0, num_cmd_modes = 0;
  2966. int count, rc = 0;
  2967. u32 dsc_count = 0, lm_count = 0;
  2968. if (!panel) {
  2969. DSI_ERR("invalid params\n");
  2970. return -EINVAL;
  2971. }
  2972. utils = &panel->utils;
  2973. panel->num_timing_nodes = 0;
  2974. timings_np = utils->get_child_by_name(utils->data,
  2975. "qcom,mdss-dsi-display-timings");
  2976. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  2977. DSI_ERR("no display timing nodes defined\n");
  2978. rc = -EINVAL;
  2979. goto error;
  2980. }
  2981. count = utils->get_child_count(timings_np);
  2982. if ((!count && !panel->host_config.ext_bridge_mode) ||
  2983. count > DSI_MODE_MAX) {
  2984. DSI_ERR("invalid count of timing nodes: %d\n", count);
  2985. rc = -EINVAL;
  2986. goto error;
  2987. }
  2988. /* No multiresolution support is available for video mode panels.
  2989. * Multi-mode is supported for video mode during POMS is enabled.
  2990. */
  2991. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  2992. !panel->host_config.ext_bridge_mode &&
  2993. !panel->panel_mode_switch_enabled)
  2994. count = SINGLE_MODE_SUPPORT;
  2995. panel->num_timing_nodes = count;
  2996. dsi_for_each_child_node(timings_np, child_np) {
  2997. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  2998. num_video_modes++;
  2999. else if (utils->read_bool(child_np,
  3000. "qcom,mdss-dsi-cmd-mode"))
  3001. num_cmd_modes++;
  3002. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3003. num_video_modes++;
  3004. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3005. num_cmd_modes++;
  3006. dsi_panel_get_max_res_count(utils, child_np,
  3007. &dsc_count, &lm_count);
  3008. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3009. panel->lm_count = max(lm_count, panel->lm_count);
  3010. }
  3011. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3012. panel->dfps_caps.dfps_list_len;
  3013. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3014. panel->dyn_clk_caps.bit_clk_list_len;
  3015. /*
  3016. * Inflate num_of_modes by fps and bit clks in dfps.
  3017. * Single command mode for video mode panels supporting
  3018. * panel operating mode switch.
  3019. */
  3020. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3021. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3022. (panel->panel_mode_switch_enabled))
  3023. num_cmd_modes = 1;
  3024. else
  3025. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3026. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3027. error:
  3028. return rc;
  3029. }
  3030. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3031. struct dsi_panel_phy_props *phy_props)
  3032. {
  3033. int rc = 0;
  3034. if (!panel || !phy_props) {
  3035. DSI_ERR("invalid params\n");
  3036. return -EINVAL;
  3037. }
  3038. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3039. return rc;
  3040. }
  3041. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3042. struct dsi_dfps_capabilities *dfps_caps)
  3043. {
  3044. int rc = 0;
  3045. if (!panel || !dfps_caps) {
  3046. DSI_ERR("invalid params\n");
  3047. return -EINVAL;
  3048. }
  3049. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3050. return rc;
  3051. }
  3052. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3053. {
  3054. int i;
  3055. if (!mode->priv_info)
  3056. return;
  3057. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3058. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3059. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3060. }
  3061. kfree(mode->priv_info);
  3062. }
  3063. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3064. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3065. {
  3066. u32 frame_time_us, nslices;
  3067. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3068. dsi_transfer_time_us, pixel_clk_khz;
  3069. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3070. struct dsi_mode_info *timing = &mode->timing;
  3071. struct dsi_display_mode *display_mode;
  3072. u32 jitter_numer, jitter_denom, prefill_lines;
  3073. u32 min_threshold_us, prefill_time_us;
  3074. u16 bpp;
  3075. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3076. * + 1 byte dcs data command.
  3077. */
  3078. const u32 packet_overhead = 56;
  3079. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3080. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3081. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3082. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3083. if (timing->refresh_rate >= 120)
  3084. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3085. if (timing->dsc_enabled) {
  3086. nslices = (timing->h_active)/(dsc->config.slice_width);
  3087. /* (slice width x bit-per-pixel + packet overhead) x
  3088. * number of slices x height x fps / lane
  3089. */
  3090. bpp = DSC_BPP(dsc->config);
  3091. bits_per_line = ((dsc->config.slice_width * bpp) +
  3092. packet_overhead) * nslices;
  3093. bits_per_line = bits_per_line / (config->num_data_lanes);
  3094. min_bitclk_hz = (bits_per_line * timing->v_active *
  3095. timing->refresh_rate);
  3096. } else {
  3097. total_active_pixels = ((dsi_h_active_dce(timing)
  3098. * timing->v_active));
  3099. /* calculate the actual bitclk needed to transfer the frame */
  3100. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3101. (config->bpp));
  3102. do_div(min_bitclk_hz, config->num_data_lanes);
  3103. }
  3104. timing->min_dsi_clk_hz = min_bitclk_hz;
  3105. if (timing->clk_rate_hz) {
  3106. /* adjust the transfer time proportionately for bit clk*/
  3107. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3108. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3109. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3110. } else if (mode->priv_info->mdp_transfer_time_us) {
  3111. timing->dsi_transfer_time_us =
  3112. mode->priv_info->mdp_transfer_time_us;
  3113. } else {
  3114. min_threshold_us = mult_frac(frame_time_us,
  3115. jitter_numer, (jitter_denom * 100));
  3116. /*
  3117. * Increase the prefill_lines proportionately as recommended
  3118. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3119. */
  3120. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3121. timing->refresh_rate, 60);
  3122. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3123. (timing->v_active));
  3124. /*
  3125. * Threshold is sum of panel jitter time, prefill line time
  3126. * plus 100usec buffer time.
  3127. */
  3128. min_threshold_us = min_threshold_us + 100 + prefill_time_us;
  3129. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3130. if (min_threshold_us > frame_threshold_us)
  3131. frame_threshold_us = min_threshold_us;
  3132. timing->dsi_transfer_time_us = frame_time_us -
  3133. frame_threshold_us;
  3134. }
  3135. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3136. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3137. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3138. timing->mdp_transfer_time_us =
  3139. mode->priv_info->mdp_transfer_time_us;
  3140. }
  3141. /* Calculate pclk_khz to update modeinfo */
  3142. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3143. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3144. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3145. do_div(pixel_clk_khz, config->bpp);
  3146. display_mode->pixel_clk_khz = pixel_clk_khz;
  3147. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3148. }
  3149. int dsi_panel_get_mode(struct dsi_panel *panel,
  3150. u32 index, struct dsi_display_mode *mode,
  3151. int topology_override)
  3152. {
  3153. struct device_node *timings_np, *child_np;
  3154. struct dsi_parser_utils *utils;
  3155. struct dsi_display_mode_priv_info *prv_info;
  3156. u32 child_idx = 0;
  3157. int rc = 0, num_timings;
  3158. int traffic_mode;
  3159. int panel_mode;
  3160. void *utils_data = NULL;
  3161. if (!panel || !mode) {
  3162. DSI_ERR("invalid params\n");
  3163. return -EINVAL;
  3164. }
  3165. mutex_lock(&panel->panel_lock);
  3166. utils = &panel->utils;
  3167. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3168. if (!mode->priv_info) {
  3169. rc = -ENOMEM;
  3170. goto done;
  3171. }
  3172. prv_info = mode->priv_info;
  3173. timings_np = utils->get_child_by_name(utils->data,
  3174. "qcom,mdss-dsi-display-timings");
  3175. if (!timings_np) {
  3176. DSI_ERR("no display timing nodes defined\n");
  3177. rc = -EINVAL;
  3178. goto parse_fail;
  3179. }
  3180. num_timings = utils->get_child_count(timings_np);
  3181. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3182. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3183. rc = -EINVAL;
  3184. goto parse_fail;
  3185. }
  3186. utils_data = utils->data;
  3187. traffic_mode = panel->video_config.traffic_mode;
  3188. panel_mode = panel->panel_mode;
  3189. dsi_for_each_child_node(timings_np, child_np) {
  3190. if (index != child_idx++)
  3191. continue;
  3192. utils->data = child_np;
  3193. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3194. if (rc) {
  3195. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3196. goto parse_fail;
  3197. }
  3198. rc = dsi_panel_parse_dsc_params(mode, utils);
  3199. if (rc) {
  3200. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3201. goto parse_fail;
  3202. }
  3203. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3204. panel_mode);
  3205. if (rc) {
  3206. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3207. goto parse_fail;
  3208. }
  3209. rc = dsi_panel_parse_topology(prv_info, utils,
  3210. topology_override);
  3211. if (rc) {
  3212. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3213. goto parse_fail;
  3214. }
  3215. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3216. if (rc) {
  3217. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3218. goto parse_fail;
  3219. }
  3220. rc = dsi_panel_parse_jitter_config(mode, utils);
  3221. if (rc)
  3222. DSI_ERR(
  3223. "failed to parse panel jitter config, rc=%d\n", rc);
  3224. rc = dsi_panel_parse_phy_timing(mode, utils);
  3225. if (rc) {
  3226. DSI_ERR(
  3227. "failed to parse panel phy timings, rc=%d\n", rc);
  3228. goto parse_fail;
  3229. }
  3230. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3231. if (rc)
  3232. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3233. if (panel->panel_mode_switch_enabled) {
  3234. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3235. if (rc) {
  3236. rc = 0;
  3237. mode->panel_mode = panel->panel_mode;
  3238. DSI_INFO(
  3239. "POMS: panel mode isn't specified in timing[%d]\n",
  3240. child_idx);
  3241. }
  3242. } else {
  3243. mode->panel_mode = panel->panel_mode;
  3244. }
  3245. }
  3246. goto done;
  3247. parse_fail:
  3248. kfree(mode->priv_info);
  3249. mode->priv_info = NULL;
  3250. done:
  3251. utils->data = utils_data;
  3252. mutex_unlock(&panel->panel_lock);
  3253. return rc;
  3254. }
  3255. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3256. struct dsi_display_mode *mode,
  3257. struct dsi_host_config *config)
  3258. {
  3259. int rc = 0;
  3260. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3261. if (!panel || !mode || !config) {
  3262. DSI_ERR("invalid params\n");
  3263. return -EINVAL;
  3264. }
  3265. mutex_lock(&panel->panel_lock);
  3266. config->panel_mode = panel->panel_mode;
  3267. memcpy(&config->common_config, &panel->host_config,
  3268. sizeof(config->common_config));
  3269. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3270. memcpy(&config->u.video_engine, &panel->video_config,
  3271. sizeof(config->u.video_engine));
  3272. } else {
  3273. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3274. sizeof(config->u.cmd_engine));
  3275. }
  3276. memcpy(&config->video_timing, &mode->timing,
  3277. sizeof(config->video_timing));
  3278. config->video_timing.mdp_transfer_time_us =
  3279. mode->priv_info->mdp_transfer_time_us;
  3280. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3281. config->video_timing.dsc = &mode->priv_info->dsc;
  3282. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3283. config->video_timing.vdc = &mode->priv_info->vdc;
  3284. if (dyn_clk_caps->dyn_clk_support)
  3285. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3286. else
  3287. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3288. config->esc_clk_rate_hz = 19200000;
  3289. mutex_unlock(&panel->panel_lock);
  3290. return rc;
  3291. }
  3292. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3293. {
  3294. int rc = 0;
  3295. if (!panel) {
  3296. DSI_ERR("invalid params\n");
  3297. return -EINVAL;
  3298. }
  3299. mutex_lock(&panel->panel_lock);
  3300. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3301. if (panel->lp11_init)
  3302. goto error;
  3303. rc = dsi_panel_power_on(panel);
  3304. if (rc) {
  3305. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3306. goto error;
  3307. }
  3308. error:
  3309. mutex_unlock(&panel->panel_lock);
  3310. return rc;
  3311. }
  3312. int dsi_panel_update_pps(struct dsi_panel *panel)
  3313. {
  3314. int rc = 0;
  3315. struct dsi_panel_cmd_set *set = NULL;
  3316. struct dsi_display_mode_priv_info *priv_info = NULL;
  3317. if (!panel || !panel->cur_mode) {
  3318. DSI_ERR("invalid params\n");
  3319. return -EINVAL;
  3320. }
  3321. mutex_lock(&panel->panel_lock);
  3322. priv_info = panel->cur_mode->priv_info;
  3323. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3324. if (priv_info->dsc_enabled)
  3325. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3326. panel->dce_pps_cmd, 0,
  3327. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3328. else if (priv_info->vdc_enabled)
  3329. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3330. panel->dce_pps_cmd, 0,
  3331. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3332. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3333. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3334. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3335. if (rc) {
  3336. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3337. goto error;
  3338. }
  3339. }
  3340. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3341. if (rc) {
  3342. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3343. panel->name, rc);
  3344. }
  3345. dsi_panel_destroy_cmd_packets(set);
  3346. error:
  3347. mutex_unlock(&panel->panel_lock);
  3348. return rc;
  3349. }
  3350. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3351. {
  3352. int rc = 0;
  3353. if (!panel) {
  3354. DSI_ERR("invalid params\n");
  3355. return -EINVAL;
  3356. }
  3357. mutex_lock(&panel->panel_lock);
  3358. if (!panel->panel_initialized)
  3359. goto exit;
  3360. /*
  3361. * Consider LP1->LP2->LP1.
  3362. * If the panel is already in LP mode, do not need to
  3363. * set the regulator.
  3364. * IBB and AB power mode would be set at the same time
  3365. * in PMIC driver, so we only call ibb setting that is enough.
  3366. */
  3367. if (dsi_panel_is_type_oled(panel) &&
  3368. panel->power_mode != SDE_MODE_DPMS_LP2)
  3369. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3370. "ibb", REGULATOR_MODE_IDLE);
  3371. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3372. if (rc)
  3373. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3374. panel->name, rc);
  3375. exit:
  3376. mutex_unlock(&panel->panel_lock);
  3377. return rc;
  3378. }
  3379. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3380. {
  3381. int rc = 0;
  3382. if (!panel) {
  3383. DSI_ERR("invalid params\n");
  3384. return -EINVAL;
  3385. }
  3386. mutex_lock(&panel->panel_lock);
  3387. if (!panel->panel_initialized)
  3388. goto exit;
  3389. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3390. if (rc)
  3391. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3392. panel->name, rc);
  3393. exit:
  3394. mutex_unlock(&panel->panel_lock);
  3395. return rc;
  3396. }
  3397. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3398. {
  3399. int rc = 0;
  3400. if (!panel) {
  3401. DSI_ERR("invalid params\n");
  3402. return -EINVAL;
  3403. }
  3404. mutex_lock(&panel->panel_lock);
  3405. if (!panel->panel_initialized)
  3406. goto exit;
  3407. /*
  3408. * Consider about LP1->LP2->NOLP.
  3409. */
  3410. if (dsi_panel_is_type_oled(panel) &&
  3411. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3412. panel->power_mode == SDE_MODE_DPMS_LP2))
  3413. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3414. "ibb", REGULATOR_MODE_NORMAL);
  3415. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3416. if (rc)
  3417. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3418. panel->name, rc);
  3419. exit:
  3420. mutex_unlock(&panel->panel_lock);
  3421. return rc;
  3422. }
  3423. int dsi_panel_prepare(struct dsi_panel *panel)
  3424. {
  3425. int rc = 0;
  3426. if (!panel) {
  3427. DSI_ERR("invalid params\n");
  3428. return -EINVAL;
  3429. }
  3430. mutex_lock(&panel->panel_lock);
  3431. if (panel->lp11_init) {
  3432. rc = dsi_panel_power_on(panel);
  3433. if (rc) {
  3434. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3435. panel->name, rc);
  3436. goto error;
  3437. }
  3438. }
  3439. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3440. if (rc) {
  3441. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3442. panel->name, rc);
  3443. goto error;
  3444. }
  3445. error:
  3446. mutex_unlock(&panel->panel_lock);
  3447. return rc;
  3448. }
  3449. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3450. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3451. {
  3452. static const int ROI_CMD_LEN = 5;
  3453. int rc = 0;
  3454. /* DTYPE_DCS_LWRITE */
  3455. char *caset, *paset;
  3456. set->cmds = NULL;
  3457. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3458. if (!caset) {
  3459. rc = -ENOMEM;
  3460. goto exit;
  3461. }
  3462. caset[0] = 0x2a;
  3463. caset[1] = (roi->x & 0xFF00) >> 8;
  3464. caset[2] = roi->x & 0xFF;
  3465. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3466. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3467. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3468. if (!paset) {
  3469. rc = -ENOMEM;
  3470. goto error_free_mem;
  3471. }
  3472. paset[0] = 0x2b;
  3473. paset[1] = (roi->y & 0xFF00) >> 8;
  3474. paset[2] = roi->y & 0xFF;
  3475. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3476. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3477. set->type = DSI_CMD_SET_ROI;
  3478. set->state = DSI_CMD_SET_STATE_LP;
  3479. set->count = 2; /* send caset + paset together */
  3480. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3481. if (!set->cmds) {
  3482. rc = -ENOMEM;
  3483. goto error_free_mem;
  3484. }
  3485. set->cmds[0].msg.channel = 0;
  3486. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3487. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3488. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3489. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3490. set->cmds[0].msg.tx_buf = caset;
  3491. set->cmds[0].msg.rx_len = 0;
  3492. set->cmds[0].msg.rx_buf = 0;
  3493. set->cmds[0].msg.wait_ms = 0;
  3494. set->cmds[0].last_command = 0;
  3495. set->cmds[0].post_wait_ms = 0;
  3496. set->cmds[1].msg.channel = 0;
  3497. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3498. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3499. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3500. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3501. set->cmds[1].msg.tx_buf = paset;
  3502. set->cmds[1].msg.rx_len = 0;
  3503. set->cmds[1].msg.rx_buf = 0;
  3504. set->cmds[1].msg.wait_ms = 0;
  3505. set->cmds[1].last_command = 1;
  3506. set->cmds[1].post_wait_ms = 0;
  3507. goto exit;
  3508. error_free_mem:
  3509. kfree(caset);
  3510. kfree(paset);
  3511. kfree(set->cmds);
  3512. exit:
  3513. return rc;
  3514. }
  3515. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3516. int ctrl_idx)
  3517. {
  3518. int rc = 0;
  3519. if (!panel) {
  3520. DSI_ERR("invalid params\n");
  3521. return -EINVAL;
  3522. }
  3523. mutex_lock(&panel->panel_lock);
  3524. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3525. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3526. if (rc)
  3527. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3528. panel->name, rc);
  3529. mutex_unlock(&panel->panel_lock);
  3530. return rc;
  3531. }
  3532. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3533. int ctrl_idx)
  3534. {
  3535. int rc = 0;
  3536. if (!panel) {
  3537. DSI_ERR("invalid params\n");
  3538. return -EINVAL;
  3539. }
  3540. mutex_lock(&panel->panel_lock);
  3541. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3542. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3543. if (rc)
  3544. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3545. panel->name, rc);
  3546. mutex_unlock(&panel->panel_lock);
  3547. return rc;
  3548. }
  3549. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3550. struct dsi_rect *roi)
  3551. {
  3552. int rc = 0;
  3553. struct dsi_panel_cmd_set *set;
  3554. struct dsi_display_mode_priv_info *priv_info;
  3555. if (!panel || !panel->cur_mode) {
  3556. DSI_ERR("Invalid params\n");
  3557. return -EINVAL;
  3558. }
  3559. priv_info = panel->cur_mode->priv_info;
  3560. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3561. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3562. if (rc) {
  3563. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3564. panel->name, rc);
  3565. return rc;
  3566. }
  3567. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3568. roi->x, roi->y, roi->w, roi->h);
  3569. mutex_lock(&panel->panel_lock);
  3570. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3571. if (rc)
  3572. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3573. panel->name, rc);
  3574. mutex_unlock(&panel->panel_lock);
  3575. dsi_panel_destroy_cmd_packets(set);
  3576. dsi_panel_dealloc_cmd_packets(set);
  3577. return rc;
  3578. }
  3579. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3580. {
  3581. int rc = 0;
  3582. if (!panel) {
  3583. DSI_ERR("Invalid params\n");
  3584. return -EINVAL;
  3585. }
  3586. mutex_lock(&panel->panel_lock);
  3587. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3588. if (rc)
  3589. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3590. panel->name, rc);
  3591. mutex_unlock(&panel->panel_lock);
  3592. return rc;
  3593. }
  3594. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3595. {
  3596. int rc = 0;
  3597. if (!panel) {
  3598. DSI_ERR("Invalid params\n");
  3599. return -EINVAL;
  3600. }
  3601. mutex_lock(&panel->panel_lock);
  3602. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3603. if (rc)
  3604. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3605. panel->name, rc);
  3606. mutex_unlock(&panel->panel_lock);
  3607. return rc;
  3608. }
  3609. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3610. {
  3611. int rc = 0;
  3612. if (!panel) {
  3613. DSI_ERR("Invalid params\n");
  3614. return -EINVAL;
  3615. }
  3616. mutex_lock(&panel->panel_lock);
  3617. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3618. if (rc)
  3619. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3620. panel->name, rc);
  3621. mutex_unlock(&panel->panel_lock);
  3622. return rc;
  3623. }
  3624. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3625. {
  3626. int rc = 0;
  3627. if (!panel) {
  3628. DSI_ERR("Invalid params\n");
  3629. return -EINVAL;
  3630. }
  3631. mutex_lock(&panel->panel_lock);
  3632. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3633. if (rc)
  3634. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3635. panel->name, rc);
  3636. mutex_unlock(&panel->panel_lock);
  3637. return rc;
  3638. }
  3639. int dsi_panel_switch(struct dsi_panel *panel)
  3640. {
  3641. int rc = 0;
  3642. if (!panel) {
  3643. DSI_ERR("Invalid params\n");
  3644. return -EINVAL;
  3645. }
  3646. mutex_lock(&panel->panel_lock);
  3647. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3648. if (rc)
  3649. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3650. panel->name, rc);
  3651. mutex_unlock(&panel->panel_lock);
  3652. return rc;
  3653. }
  3654. int dsi_panel_post_switch(struct dsi_panel *panel)
  3655. {
  3656. int rc = 0;
  3657. if (!panel) {
  3658. DSI_ERR("Invalid params\n");
  3659. return -EINVAL;
  3660. }
  3661. mutex_lock(&panel->panel_lock);
  3662. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3663. if (rc)
  3664. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3665. panel->name, rc);
  3666. mutex_unlock(&panel->panel_lock);
  3667. return rc;
  3668. }
  3669. int dsi_panel_enable(struct dsi_panel *panel)
  3670. {
  3671. int rc = 0;
  3672. if (!panel) {
  3673. DSI_ERR("Invalid params\n");
  3674. return -EINVAL;
  3675. }
  3676. mutex_lock(&panel->panel_lock);
  3677. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3678. if (rc)
  3679. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3680. panel->name, rc);
  3681. else
  3682. panel->panel_initialized = true;
  3683. mutex_unlock(&panel->panel_lock);
  3684. return rc;
  3685. }
  3686. int dsi_panel_post_enable(struct dsi_panel *panel)
  3687. {
  3688. int rc = 0;
  3689. if (!panel) {
  3690. DSI_ERR("invalid params\n");
  3691. return -EINVAL;
  3692. }
  3693. mutex_lock(&panel->panel_lock);
  3694. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3695. if (rc) {
  3696. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3697. panel->name, rc);
  3698. goto error;
  3699. }
  3700. error:
  3701. mutex_unlock(&panel->panel_lock);
  3702. return rc;
  3703. }
  3704. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3705. {
  3706. int rc = 0;
  3707. if (!panel) {
  3708. DSI_ERR("invalid params\n");
  3709. return -EINVAL;
  3710. }
  3711. mutex_lock(&panel->panel_lock);
  3712. if (gpio_is_valid(panel->bl_config.en_gpio))
  3713. gpio_set_value(panel->bl_config.en_gpio, 0);
  3714. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3715. if (rc) {
  3716. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3717. panel->name, rc);
  3718. goto error;
  3719. }
  3720. error:
  3721. mutex_unlock(&panel->panel_lock);
  3722. return rc;
  3723. }
  3724. int dsi_panel_disable(struct dsi_panel *panel)
  3725. {
  3726. int rc = 0;
  3727. if (!panel) {
  3728. DSI_ERR("invalid params\n");
  3729. return -EINVAL;
  3730. }
  3731. mutex_lock(&panel->panel_lock);
  3732. /* Avoid sending panel off commands when ESD recovery is underway */
  3733. if (!atomic_read(&panel->esd_recovery_pending)) {
  3734. /*
  3735. * Need to set IBB/AB regulator mode to STANDBY,
  3736. * if panel is going off from AOD mode.
  3737. */
  3738. if (dsi_panel_is_type_oled(panel) &&
  3739. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3740. panel->power_mode == SDE_MODE_DPMS_LP2))
  3741. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3742. "ibb", REGULATOR_MODE_STANDBY);
  3743. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3744. if (rc) {
  3745. /*
  3746. * Sending panel off commands may fail when DSI
  3747. * controller is in a bad state. These failures can be
  3748. * ignored since controller will go for full reset on
  3749. * subsequent display enable anyway.
  3750. */
  3751. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3752. panel->name, rc);
  3753. rc = 0;
  3754. }
  3755. }
  3756. panel->panel_initialized = false;
  3757. panel->power_mode = SDE_MODE_DPMS_OFF;
  3758. mutex_unlock(&panel->panel_lock);
  3759. return rc;
  3760. }
  3761. int dsi_panel_unprepare(struct dsi_panel *panel)
  3762. {
  3763. int rc = 0;
  3764. if (!panel) {
  3765. DSI_ERR("invalid params\n");
  3766. return -EINVAL;
  3767. }
  3768. mutex_lock(&panel->panel_lock);
  3769. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3770. if (rc) {
  3771. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3772. panel->name, rc);
  3773. goto error;
  3774. }
  3775. error:
  3776. mutex_unlock(&panel->panel_lock);
  3777. return rc;
  3778. }
  3779. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3780. {
  3781. int rc = 0;
  3782. if (!panel) {
  3783. DSI_ERR("invalid params\n");
  3784. return -EINVAL;
  3785. }
  3786. mutex_lock(&panel->panel_lock);
  3787. rc = dsi_panel_power_off(panel);
  3788. if (rc) {
  3789. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3790. panel->name, rc);
  3791. goto error;
  3792. }
  3793. error:
  3794. mutex_unlock(&panel->panel_lock);
  3795. return rc;
  3796. }