dsi_panel.c 114 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  34. {
  35. char *bp;
  36. bp = buf;
  37. /* First 7 bytes are cmd header */
  38. *bp++ = 0x0A;
  39. *bp++ = 1;
  40. *bp++ = 0;
  41. *bp++ = 0;
  42. *bp++ = pps_delay_ms;
  43. *bp++ = 0;
  44. *bp++ = 128;
  45. }
  46. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  47. char *buf, int pps_id, u32 size)
  48. {
  49. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  50. buf += DSI_CMD_PPS_HDR_SIZE;
  51. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  52. size);
  53. }
  54. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  55. char *buf, int pps_id, u32 size)
  56. {
  57. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  58. buf += DSI_CMD_PPS_HDR_SIZE;
  59. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  60. size);
  61. }
  62. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  63. {
  64. int rc = 0;
  65. int i;
  66. struct regulator *vreg = NULL;
  67. for (i = 0; i < panel->power_info.count; i++) {
  68. vreg = devm_regulator_get(panel->parent,
  69. panel->power_info.vregs[i].vreg_name);
  70. rc = PTR_RET(vreg);
  71. if (rc) {
  72. DSI_ERR("failed to get %s regulator\n",
  73. panel->power_info.vregs[i].vreg_name);
  74. goto error_put;
  75. }
  76. panel->power_info.vregs[i].vreg = vreg;
  77. }
  78. return rc;
  79. error_put:
  80. for (i = i - 1; i >= 0; i--) {
  81. devm_regulator_put(panel->power_info.vregs[i].vreg);
  82. panel->power_info.vregs[i].vreg = NULL;
  83. }
  84. return rc;
  85. }
  86. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  87. {
  88. int rc = 0;
  89. int i;
  90. for (i = panel->power_info.count - 1; i >= 0; i--)
  91. devm_regulator_put(panel->power_info.vregs[i].vreg);
  92. return rc;
  93. }
  94. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  95. {
  96. int rc = 0;
  97. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  98. if (gpio_is_valid(r_config->reset_gpio)) {
  99. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  100. if (rc) {
  101. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  102. goto error;
  103. }
  104. }
  105. if (gpio_is_valid(r_config->disp_en_gpio)) {
  106. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  107. if (rc) {
  108. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  109. goto error_release_reset;
  110. }
  111. }
  112. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  113. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  114. if (rc) {
  115. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  116. goto error_release_disp_en;
  117. }
  118. }
  119. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  120. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  121. if (rc) {
  122. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  123. goto error_release_mode_sel;
  124. }
  125. }
  126. if (gpio_is_valid(panel->panel_test_gpio)) {
  127. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  128. if (rc) {
  129. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  130. rc);
  131. panel->panel_test_gpio = -1;
  132. rc = 0;
  133. }
  134. }
  135. goto error;
  136. error_release_mode_sel:
  137. if (gpio_is_valid(panel->bl_config.en_gpio))
  138. gpio_free(panel->bl_config.en_gpio);
  139. error_release_disp_en:
  140. if (gpio_is_valid(r_config->disp_en_gpio))
  141. gpio_free(r_config->disp_en_gpio);
  142. error_release_reset:
  143. if (gpio_is_valid(r_config->reset_gpio))
  144. gpio_free(r_config->reset_gpio);
  145. error:
  146. return rc;
  147. }
  148. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  149. {
  150. int rc = 0;
  151. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  152. if (gpio_is_valid(r_config->reset_gpio))
  153. gpio_free(r_config->reset_gpio);
  154. if (gpio_is_valid(r_config->disp_en_gpio))
  155. gpio_free(r_config->disp_en_gpio);
  156. if (gpio_is_valid(panel->bl_config.en_gpio))
  157. gpio_free(panel->bl_config.en_gpio);
  158. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  159. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  160. if (gpio_is_valid(panel->panel_test_gpio))
  161. gpio_free(panel->panel_test_gpio);
  162. return rc;
  163. }
  164. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  165. {
  166. struct dsi_panel_reset_config *r_config;
  167. if (!panel) {
  168. DSI_ERR("Invalid panel param\n");
  169. return -EINVAL;
  170. }
  171. r_config = &panel->reset_config;
  172. if (!r_config) {
  173. DSI_ERR("Invalid panel reset configuration\n");
  174. return -EINVAL;
  175. }
  176. if (gpio_is_valid(r_config->reset_gpio)) {
  177. gpio_set_value(r_config->reset_gpio, 0);
  178. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  179. DSI_INFO("GPIO pulled low to simulate ESD\n");
  180. return 0;
  181. }
  182. DSI_ERR("failed to pull down gpio\n");
  183. return -EINVAL;
  184. }
  185. static int dsi_panel_reset(struct dsi_panel *panel)
  186. {
  187. int rc = 0;
  188. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  189. int i;
  190. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  191. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  192. if (rc) {
  193. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  194. goto exit;
  195. }
  196. }
  197. if (r_config->count) {
  198. rc = gpio_direction_output(r_config->reset_gpio,
  199. r_config->sequence[0].level);
  200. if (rc) {
  201. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  202. goto exit;
  203. }
  204. }
  205. for (i = 0; i < r_config->count; i++) {
  206. gpio_set_value(r_config->reset_gpio,
  207. r_config->sequence[i].level);
  208. if (r_config->sequence[i].sleep_ms)
  209. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  210. (r_config->sequence[i].sleep_ms * 1000) + 100);
  211. }
  212. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  213. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  214. if (rc)
  215. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  216. }
  217. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  218. bool out = true;
  219. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  220. || (panel->reset_config.mode_sel_state
  221. == MODE_GPIO_LOW))
  222. out = false;
  223. else if ((panel->reset_config.mode_sel_state
  224. == MODE_SEL_SINGLE_PORT) ||
  225. (panel->reset_config.mode_sel_state
  226. == MODE_GPIO_HIGH))
  227. out = true;
  228. rc = gpio_direction_output(
  229. panel->reset_config.lcd_mode_sel_gpio, out);
  230. if (rc)
  231. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  232. }
  233. if (gpio_is_valid(panel->panel_test_gpio)) {
  234. rc = gpio_direction_input(panel->panel_test_gpio);
  235. if (rc)
  236. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  237. rc);
  238. }
  239. exit:
  240. return rc;
  241. }
  242. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  243. {
  244. int rc = 0;
  245. struct pinctrl_state *state;
  246. if (panel->host_config.ext_bridge_mode)
  247. return 0;
  248. if (!panel->pinctrl.pinctrl)
  249. return 0;
  250. if (enable)
  251. state = panel->pinctrl.active;
  252. else
  253. state = panel->pinctrl.suspend;
  254. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  255. if (rc)
  256. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  257. panel->name, rc);
  258. return rc;
  259. }
  260. static int dsi_panel_power_on(struct dsi_panel *panel)
  261. {
  262. int rc = 0;
  263. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  264. if (rc) {
  265. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  266. panel->name, rc);
  267. goto exit;
  268. }
  269. rc = dsi_panel_set_pinctrl_state(panel, true);
  270. if (rc) {
  271. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  272. goto error_disable_vregs;
  273. }
  274. rc = dsi_panel_reset(panel);
  275. if (rc) {
  276. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  277. goto error_disable_gpio;
  278. }
  279. goto exit;
  280. error_disable_gpio:
  281. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  282. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  283. if (gpio_is_valid(panel->bl_config.en_gpio))
  284. gpio_set_value(panel->bl_config.en_gpio, 0);
  285. (void)dsi_panel_set_pinctrl_state(panel, false);
  286. error_disable_vregs:
  287. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  288. exit:
  289. return rc;
  290. }
  291. static int dsi_panel_power_off(struct dsi_panel *panel)
  292. {
  293. int rc = 0;
  294. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  295. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  296. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  297. !panel->reset_gpio_always_on)
  298. gpio_set_value(panel->reset_config.reset_gpio, 0);
  299. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  300. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  301. if (gpio_is_valid(panel->panel_test_gpio)) {
  302. rc = gpio_direction_input(panel->panel_test_gpio);
  303. if (rc)
  304. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  305. rc);
  306. }
  307. rc = dsi_panel_set_pinctrl_state(panel, false);
  308. if (rc) {
  309. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  310. rc);
  311. }
  312. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  313. if (rc)
  314. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  315. panel->name, rc);
  316. return rc;
  317. }
  318. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  319. enum dsi_cmd_set_type type)
  320. {
  321. int rc = 0, i = 0;
  322. ssize_t len;
  323. struct dsi_cmd_desc *cmds;
  324. u32 count;
  325. enum dsi_cmd_set_state state;
  326. struct dsi_display_mode *mode;
  327. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  328. if (!panel || !panel->cur_mode)
  329. return -EINVAL;
  330. mode = panel->cur_mode;
  331. cmds = mode->priv_info->cmd_sets[type].cmds;
  332. count = mode->priv_info->cmd_sets[type].count;
  333. state = mode->priv_info->cmd_sets[type].state;
  334. SDE_EVT32(type, state, count);
  335. if (count == 0) {
  336. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  337. panel->name, type);
  338. goto error;
  339. }
  340. for (i = 0; i < count; i++) {
  341. if (state == DSI_CMD_SET_STATE_LP)
  342. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  343. if (cmds->last_command)
  344. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  345. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  346. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  347. len = ops->transfer(panel->host, &cmds->msg);
  348. if (len < 0) {
  349. rc = len;
  350. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  351. goto error;
  352. }
  353. if (cmds->post_wait_ms)
  354. usleep_range(cmds->post_wait_ms*1000,
  355. ((cmds->post_wait_ms*1000)+10));
  356. cmds++;
  357. }
  358. error:
  359. return rc;
  360. }
  361. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  362. {
  363. int rc = 0;
  364. if (panel->host_config.ext_bridge_mode)
  365. return 0;
  366. devm_pinctrl_put(panel->pinctrl.pinctrl);
  367. return rc;
  368. }
  369. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  370. {
  371. int rc = 0;
  372. if (panel->host_config.ext_bridge_mode)
  373. return 0;
  374. /* TODO: pinctrl is defined in dsi dt node */
  375. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  376. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  377. rc = PTR_ERR(panel->pinctrl.pinctrl);
  378. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  379. goto error;
  380. }
  381. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  382. "panel_active");
  383. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  384. rc = PTR_ERR(panel->pinctrl.active);
  385. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  386. goto error;
  387. }
  388. panel->pinctrl.suspend =
  389. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  390. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  391. rc = PTR_ERR(panel->pinctrl.suspend);
  392. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  393. goto error;
  394. }
  395. panel->pinctrl.pwm_pin =
  396. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  397. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  398. panel->pinctrl.pwm_pin = NULL;
  399. DSI_DEBUG("failed to get pinctrl pwm_pin");
  400. }
  401. error:
  402. return rc;
  403. }
  404. static int dsi_panel_wled_register(struct dsi_panel *panel,
  405. struct dsi_backlight_config *bl)
  406. {
  407. struct backlight_device *bd;
  408. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  409. if (!bd) {
  410. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  411. panel->name, -EPROBE_DEFER);
  412. return -EPROBE_DEFER;
  413. }
  414. bl->raw_bd = bd;
  415. return 0;
  416. }
  417. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  418. u32 bl_lvl)
  419. {
  420. int rc = 0;
  421. unsigned long mode_flags = 0;
  422. struct mipi_dsi_device *dsi = NULL;
  423. if (!panel || (bl_lvl > 0xffff)) {
  424. DSI_ERR("invalid params\n");
  425. return -EINVAL;
  426. }
  427. dsi = &panel->mipi_device;
  428. if (unlikely(panel->bl_config.lp_mode)) {
  429. mode_flags = dsi->mode_flags;
  430. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  431. }
  432. if (panel->bl_config.bl_inverted_dbv)
  433. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  434. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  435. if (rc < 0)
  436. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  437. if (unlikely(panel->bl_config.lp_mode))
  438. dsi->mode_flags = mode_flags;
  439. return rc;
  440. }
  441. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  442. u32 bl_lvl)
  443. {
  444. int rc = 0;
  445. u32 duty = 0;
  446. u32 period_ns = 0;
  447. struct dsi_backlight_config *bl;
  448. if (!panel) {
  449. DSI_ERR("Invalid Params\n");
  450. return -EINVAL;
  451. }
  452. bl = &panel->bl_config;
  453. if (!bl->pwm_bl) {
  454. DSI_ERR("pwm device not found\n");
  455. return -EINVAL;
  456. }
  457. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  458. duty = bl_lvl * period_ns;
  459. duty /= bl->bl_max_level;
  460. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  461. if (rc) {
  462. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  463. rc);
  464. goto error;
  465. }
  466. if (bl_lvl == 0 && bl->pwm_enabled) {
  467. pwm_disable(bl->pwm_bl);
  468. bl->pwm_enabled = false;
  469. return 0;
  470. }
  471. if (bl_lvl != 0 && !bl->pwm_enabled) {
  472. rc = pwm_enable(bl->pwm_bl);
  473. if (rc) {
  474. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  475. rc);
  476. goto error;
  477. }
  478. bl->pwm_enabled = true;
  479. }
  480. error:
  481. return rc;
  482. }
  483. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  484. {
  485. int rc = 0;
  486. struct dsi_backlight_config *bl = &panel->bl_config;
  487. if (panel->host_config.ext_bridge_mode)
  488. return 0;
  489. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  490. switch (bl->type) {
  491. case DSI_BACKLIGHT_WLED:
  492. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  493. break;
  494. case DSI_BACKLIGHT_DCS:
  495. rc = dsi_panel_update_backlight(panel, bl_lvl);
  496. break;
  497. case DSI_BACKLIGHT_EXTERNAL:
  498. break;
  499. case DSI_BACKLIGHT_PWM:
  500. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  501. break;
  502. default:
  503. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  504. rc = -ENOTSUPP;
  505. }
  506. return rc;
  507. }
  508. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  509. {
  510. u32 cur_bl_level;
  511. struct backlight_device *bd = bl->raw_bd;
  512. /* default the brightness level to 50% */
  513. cur_bl_level = bl->bl_max_level >> 1;
  514. switch (bl->type) {
  515. case DSI_BACKLIGHT_WLED:
  516. /* Try to query the backlight level from the backlight device */
  517. if (bd->ops && bd->ops->get_brightness)
  518. cur_bl_level = bd->ops->get_brightness(bd);
  519. break;
  520. case DSI_BACKLIGHT_DCS:
  521. case DSI_BACKLIGHT_EXTERNAL:
  522. case DSI_BACKLIGHT_PWM:
  523. default:
  524. /*
  525. * Ideally, we should read the backlight level from the
  526. * panel. For now, just set it default value.
  527. */
  528. break;
  529. }
  530. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  531. return cur_bl_level;
  532. }
  533. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  534. {
  535. struct dsi_backlight_config *bl = &panel->bl_config;
  536. bl->bl_level = dsi_panel_get_brightness(bl);
  537. }
  538. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  539. {
  540. int rc = 0;
  541. struct dsi_backlight_config *bl = &panel->bl_config;
  542. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  543. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  544. rc = PTR_ERR(bl->pwm_bl);
  545. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  546. rc);
  547. return rc;
  548. }
  549. if (panel->pinctrl.pwm_pin) {
  550. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  551. panel->pinctrl.pwm_pin);
  552. if (rc)
  553. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  554. panel->name, rc);
  555. }
  556. return 0;
  557. }
  558. static int dsi_panel_bl_register(struct dsi_panel *panel)
  559. {
  560. int rc = 0;
  561. struct dsi_backlight_config *bl = &panel->bl_config;
  562. if (panel->host_config.ext_bridge_mode)
  563. return 0;
  564. switch (bl->type) {
  565. case DSI_BACKLIGHT_WLED:
  566. rc = dsi_panel_wled_register(panel, bl);
  567. break;
  568. case DSI_BACKLIGHT_DCS:
  569. break;
  570. case DSI_BACKLIGHT_EXTERNAL:
  571. break;
  572. case DSI_BACKLIGHT_PWM:
  573. rc = dsi_panel_pwm_register(panel);
  574. break;
  575. default:
  576. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  577. rc = -ENOTSUPP;
  578. goto error;
  579. }
  580. error:
  581. return rc;
  582. }
  583. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  584. {
  585. struct dsi_backlight_config *bl = &panel->bl_config;
  586. devm_pwm_put(panel->parent, bl->pwm_bl);
  587. }
  588. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  589. {
  590. int rc = 0;
  591. struct dsi_backlight_config *bl = &panel->bl_config;
  592. if (panel->host_config.ext_bridge_mode)
  593. return 0;
  594. switch (bl->type) {
  595. case DSI_BACKLIGHT_WLED:
  596. break;
  597. case DSI_BACKLIGHT_DCS:
  598. break;
  599. case DSI_BACKLIGHT_EXTERNAL:
  600. break;
  601. case DSI_BACKLIGHT_PWM:
  602. dsi_panel_pwm_unregister(panel);
  603. break;
  604. default:
  605. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  606. rc = -ENOTSUPP;
  607. goto error;
  608. }
  609. error:
  610. return rc;
  611. }
  612. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  613. struct dsi_parser_utils *utils)
  614. {
  615. int rc = 0;
  616. u64 tmp64 = 0;
  617. struct dsi_display_mode *display_mode;
  618. struct dsi_display_mode_priv_info *priv_info;
  619. display_mode = container_of(mode, struct dsi_display_mode, timing);
  620. priv_info = display_mode->priv_info;
  621. rc = utils->read_u64(utils->data,
  622. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  623. if (rc == -EOVERFLOW) {
  624. tmp64 = 0;
  625. rc = utils->read_u32(utils->data,
  626. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  627. }
  628. mode->clk_rate_hz = !rc ? tmp64 : 0;
  629. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  630. mode->pclk_scale.numer = 1;
  631. mode->pclk_scale.denom = 1;
  632. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  633. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  634. &mode->mdp_transfer_time_us);
  635. if (!rc)
  636. display_mode->priv_info->mdp_transfer_time_us =
  637. mode->mdp_transfer_time_us;
  638. else
  639. display_mode->priv_info->mdp_transfer_time_us = 0;
  640. rc = utils->read_u32(utils->data,
  641. "qcom,mdss-dsi-panel-framerate",
  642. &mode->refresh_rate);
  643. if (rc) {
  644. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  645. rc);
  646. goto error;
  647. }
  648. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  649. &mode->h_active);
  650. if (rc) {
  651. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  652. rc);
  653. goto error;
  654. }
  655. rc = utils->read_u32(utils->data,
  656. "qcom,mdss-dsi-h-front-porch",
  657. &mode->h_front_porch);
  658. if (rc) {
  659. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  660. rc);
  661. goto error;
  662. }
  663. rc = utils->read_u32(utils->data,
  664. "qcom,mdss-dsi-h-back-porch",
  665. &mode->h_back_porch);
  666. if (rc) {
  667. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  668. rc);
  669. goto error;
  670. }
  671. rc = utils->read_u32(utils->data,
  672. "qcom,mdss-dsi-h-pulse-width",
  673. &mode->h_sync_width);
  674. if (rc) {
  675. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  676. rc);
  677. goto error;
  678. }
  679. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  680. &mode->h_skew);
  681. if (rc)
  682. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  683. rc);
  684. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  685. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  686. mode->h_sync_width);
  687. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  688. &mode->v_active);
  689. if (rc) {
  690. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  691. rc);
  692. goto error;
  693. }
  694. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  695. &mode->v_back_porch);
  696. if (rc) {
  697. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  698. rc);
  699. goto error;
  700. }
  701. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  702. &mode->v_front_porch);
  703. if (rc) {
  704. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  705. rc);
  706. goto error;
  707. }
  708. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  709. &mode->v_sync_width);
  710. if (rc) {
  711. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  712. rc);
  713. goto error;
  714. }
  715. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  716. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  717. mode->v_sync_width);
  718. error:
  719. return rc;
  720. }
  721. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  722. struct dsi_parser_utils *utils,
  723. const char *name)
  724. {
  725. int rc = 0;
  726. u32 bpp = 0;
  727. enum dsi_pixel_format fmt;
  728. const char *packing;
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  730. if (rc) {
  731. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  732. name, rc);
  733. return rc;
  734. }
  735. host->bpp = bpp;
  736. switch (bpp) {
  737. case 3:
  738. fmt = DSI_PIXEL_FORMAT_RGB111;
  739. break;
  740. case 8:
  741. fmt = DSI_PIXEL_FORMAT_RGB332;
  742. break;
  743. case 12:
  744. fmt = DSI_PIXEL_FORMAT_RGB444;
  745. break;
  746. case 16:
  747. fmt = DSI_PIXEL_FORMAT_RGB565;
  748. break;
  749. case 18:
  750. fmt = DSI_PIXEL_FORMAT_RGB666;
  751. break;
  752. case 24:
  753. default:
  754. fmt = DSI_PIXEL_FORMAT_RGB888;
  755. break;
  756. }
  757. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  758. packing = utils->get_property(utils->data,
  759. "qcom,mdss-dsi-pixel-packing",
  760. NULL);
  761. if (packing && !strcmp(packing, "loose"))
  762. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  763. }
  764. host->dst_format = fmt;
  765. return rc;
  766. }
  767. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  768. struct dsi_parser_utils *utils,
  769. const char *name)
  770. {
  771. int rc = 0;
  772. bool lane_enabled;
  773. u32 num_of_lanes = 0;
  774. lane_enabled = utils->read_bool(utils->data,
  775. "qcom,mdss-dsi-lane-0-state");
  776. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  777. lane_enabled = utils->read_bool(utils->data,
  778. "qcom,mdss-dsi-lane-1-state");
  779. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  780. lane_enabled = utils->read_bool(utils->data,
  781. "qcom,mdss-dsi-lane-2-state");
  782. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  783. lane_enabled = utils->read_bool(utils->data,
  784. "qcom,mdss-dsi-lane-3-state");
  785. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  786. if (host->data_lanes & DSI_DATA_LANE_0)
  787. num_of_lanes++;
  788. if (host->data_lanes & DSI_DATA_LANE_1)
  789. num_of_lanes++;
  790. if (host->data_lanes & DSI_DATA_LANE_2)
  791. num_of_lanes++;
  792. if (host->data_lanes & DSI_DATA_LANE_3)
  793. num_of_lanes++;
  794. host->num_data_lanes = num_of_lanes;
  795. if (host->data_lanes == 0) {
  796. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  797. rc = -EINVAL;
  798. }
  799. return rc;
  800. }
  801. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  802. struct dsi_parser_utils *utils,
  803. const char *name)
  804. {
  805. int rc = 0;
  806. const char *swap_mode;
  807. swap_mode = utils->get_property(utils->data,
  808. "qcom,mdss-dsi-color-order", NULL);
  809. if (swap_mode) {
  810. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  811. host->swap_mode = DSI_COLOR_SWAP_RGB;
  812. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  813. host->swap_mode = DSI_COLOR_SWAP_RBG;
  814. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  815. host->swap_mode = DSI_COLOR_SWAP_BRG;
  816. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  817. host->swap_mode = DSI_COLOR_SWAP_GRB;
  818. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  819. host->swap_mode = DSI_COLOR_SWAP_GBR;
  820. } else {
  821. DSI_ERR("[%s] Unrecognized color order-%s\n",
  822. name, swap_mode);
  823. rc = -EINVAL;
  824. }
  825. } else {
  826. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  827. host->swap_mode = DSI_COLOR_SWAP_RGB;
  828. }
  829. /* bit swap on color channel is not defined in dt */
  830. host->bit_swap_red = false;
  831. host->bit_swap_green = false;
  832. host->bit_swap_blue = false;
  833. return rc;
  834. }
  835. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  836. struct dsi_parser_utils *utils,
  837. const char *name)
  838. {
  839. const char *trig;
  840. int rc = 0;
  841. trig = utils->get_property(utils->data,
  842. "qcom,mdss-dsi-mdp-trigger", NULL);
  843. if (trig) {
  844. if (!strcmp(trig, "none")) {
  845. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  846. } else if (!strcmp(trig, "trigger_te")) {
  847. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  848. } else if (!strcmp(trig, "trigger_sw")) {
  849. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  850. } else if (!strcmp(trig, "trigger_sw_te")) {
  851. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  852. } else {
  853. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  854. name, trig);
  855. rc = -EINVAL;
  856. }
  857. } else {
  858. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  859. name);
  860. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  861. }
  862. trig = utils->get_property(utils->data,
  863. "qcom,mdss-dsi-dma-trigger", NULL);
  864. if (trig) {
  865. if (!strcmp(trig, "none")) {
  866. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  867. } else if (!strcmp(trig, "trigger_te")) {
  868. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  869. } else if (!strcmp(trig, "trigger_sw")) {
  870. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  871. } else if (!strcmp(trig, "trigger_sw_seof")) {
  872. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  873. } else if (!strcmp(trig, "trigger_sw_te")) {
  874. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  875. } else {
  876. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  877. name, trig);
  878. rc = -EINVAL;
  879. }
  880. } else {
  881. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  882. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  883. }
  884. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  885. &host->te_mode);
  886. if (rc) {
  887. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  888. host->te_mode = 1;
  889. rc = 0;
  890. }
  891. return rc;
  892. }
  893. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  894. struct dsi_parser_utils *utils,
  895. const char *name)
  896. {
  897. u32 val = 0, line_no = 0, window = 0;
  898. int rc = 0;
  899. bool panel_cphy_mode = false;
  900. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  901. if (!rc) {
  902. host->t_clk_post = val;
  903. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  904. }
  905. val = 0;
  906. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  907. if (!rc) {
  908. host->t_clk_pre = val;
  909. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  910. }
  911. host->ignore_rx_eot = utils->read_bool(utils->data,
  912. "qcom,mdss-dsi-rx-eot-ignore");
  913. host->append_tx_eot = utils->read_bool(utils->data,
  914. "qcom,mdss-dsi-tx-eot-append");
  915. host->ext_bridge_mode = utils->read_bool(utils->data,
  916. "qcom,mdss-dsi-ext-bridge-mode");
  917. host->force_hs_clk_lane = utils->read_bool(utils->data,
  918. "qcom,mdss-dsi-force-clock-lane-hs");
  919. panel_cphy_mode = utils->read_bool(utils->data,
  920. "qcom,panel-cphy-mode");
  921. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  922. : DSI_PHY_TYPE_DPHY;
  923. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  924. &line_no);
  925. if (rc)
  926. host->dma_sched_line = 0;
  927. else
  928. host->dma_sched_line = line_no;
  929. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  930. &window);
  931. if (rc)
  932. host->dma_sched_window = 0;
  933. else
  934. host->dma_sched_window = window;
  935. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  936. host->dma_sched_line, host->dma_sched_window);
  937. return 0;
  938. }
  939. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  940. struct dsi_parser_utils *utils,
  941. const char *name)
  942. {
  943. int rc = 0;
  944. u32 val = 0;
  945. bool supported = false;
  946. struct dsi_split_link_config *split_link = &host->split_link;
  947. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  948. if (!supported) {
  949. DSI_DEBUG("[%s] Split link is not supported\n", name);
  950. split_link->split_link_enabled = false;
  951. return;
  952. }
  953. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  954. if (rc || val < 1) {
  955. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  956. split_link->num_sublinks = 2;
  957. } else {
  958. split_link->num_sublinks = val;
  959. }
  960. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  961. if (rc || val < 1) {
  962. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  963. split_link->lanes_per_sublink = 2;
  964. } else {
  965. split_link->lanes_per_sublink = val;
  966. }
  967. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  968. split_link->num_sublinks, split_link->lanes_per_sublink);
  969. split_link->split_link_enabled = true;
  970. }
  971. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  972. {
  973. int rc = 0;
  974. struct dsi_parser_utils *utils = &panel->utils;
  975. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  976. panel->name);
  977. if (rc) {
  978. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  979. panel->name, rc);
  980. goto error;
  981. }
  982. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  983. panel->name);
  984. if (rc) {
  985. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  986. panel->name, rc);
  987. goto error;
  988. }
  989. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  990. panel->name);
  991. if (rc) {
  992. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  993. panel->name, rc);
  994. goto error;
  995. }
  996. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  997. panel->name);
  998. if (rc) {
  999. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1000. panel->name, rc);
  1001. goto error;
  1002. }
  1003. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1004. panel->name);
  1005. if (rc) {
  1006. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1007. panel->name, rc);
  1008. goto error;
  1009. }
  1010. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1011. panel->name);
  1012. error:
  1013. return rc;
  1014. }
  1015. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1016. struct device_node *of_node)
  1017. {
  1018. int rc = 0;
  1019. u32 val = 0;
  1020. rc = of_property_read_u32(of_node,
  1021. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1022. &val);
  1023. if (rc)
  1024. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1025. panel->name, rc);
  1026. panel->qsync_min_fps = val;
  1027. return rc;
  1028. }
  1029. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1030. {
  1031. int rc = 0;
  1032. bool supported = false;
  1033. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1034. struct dsi_parser_utils *utils = &panel->utils;
  1035. const char *name = panel->name;
  1036. const char *type;
  1037. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1038. if (!supported) {
  1039. dyn_clk_caps->dyn_clk_support = false;
  1040. return rc;
  1041. }
  1042. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1043. "qcom,dsi-dyn-clk-list");
  1044. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1045. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1046. return -EINVAL;
  1047. }
  1048. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1049. sizeof(u32), GFP_KERNEL);
  1050. if (!dyn_clk_caps->bit_clk_list)
  1051. return -ENOMEM;
  1052. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1053. dyn_clk_caps->bit_clk_list,
  1054. dyn_clk_caps->bit_clk_list_len);
  1055. if (rc) {
  1056. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1057. return -EINVAL;
  1058. }
  1059. dyn_clk_caps->dyn_clk_support = true;
  1060. type = utils->get_property(utils->data,
  1061. "qcom,dsi-dyn-clk-type", NULL);
  1062. if (!type) {
  1063. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1064. dyn_clk_caps->maintain_const_fps = false;
  1065. return 0;
  1066. }
  1067. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1068. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1069. dyn_clk_caps->maintain_const_fps = true;
  1070. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1071. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1072. dyn_clk_caps->maintain_const_fps = true;
  1073. } else {
  1074. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1075. dyn_clk_caps->maintain_const_fps = false;
  1076. }
  1077. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1078. return 0;
  1079. }
  1080. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1081. {
  1082. int rc = 0;
  1083. bool supported = false;
  1084. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1085. struct dsi_parser_utils *utils = &panel->utils;
  1086. const char *name = panel->name;
  1087. const char *type;
  1088. u32 i;
  1089. supported = utils->read_bool(utils->data,
  1090. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1091. if (!supported) {
  1092. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1093. dfps_caps->dfps_support = false;
  1094. return rc;
  1095. }
  1096. type = utils->get_property(utils->data,
  1097. "qcom,mdss-dsi-pan-fps-update", NULL);
  1098. if (!type) {
  1099. DSI_ERR("[%s] dfps type not defined\n", name);
  1100. rc = -EINVAL;
  1101. goto error;
  1102. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1103. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1104. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1105. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1106. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1107. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1108. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1109. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1110. } else {
  1111. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1112. rc = -EINVAL;
  1113. goto error;
  1114. }
  1115. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1116. "qcom,dsi-supported-dfps-list");
  1117. if (dfps_caps->dfps_list_len < 1) {
  1118. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1119. rc = -EINVAL;
  1120. goto error;
  1121. }
  1122. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1123. GFP_KERNEL);
  1124. if (!dfps_caps->dfps_list) {
  1125. rc = -ENOMEM;
  1126. goto error;
  1127. }
  1128. rc = utils->read_u32_array(utils->data,
  1129. "qcom,dsi-supported-dfps-list",
  1130. dfps_caps->dfps_list,
  1131. dfps_caps->dfps_list_len);
  1132. if (rc) {
  1133. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1134. rc = -EINVAL;
  1135. goto error;
  1136. }
  1137. dfps_caps->dfps_support = true;
  1138. /* calculate max and min fps */
  1139. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1140. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1141. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1142. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1143. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1144. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1145. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1146. }
  1147. error:
  1148. return rc;
  1149. }
  1150. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1151. struct dsi_parser_utils *utils,
  1152. const char *name)
  1153. {
  1154. int rc = 0;
  1155. const char *traffic_mode;
  1156. u32 vc_id = 0;
  1157. u32 val = 0;
  1158. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1159. if (rc) {
  1160. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1161. cfg->pulse_mode_hsa_he = false;
  1162. } else if (val == 1) {
  1163. cfg->pulse_mode_hsa_he = true;
  1164. } else if (val == 0) {
  1165. cfg->pulse_mode_hsa_he = false;
  1166. } else {
  1167. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1168. name);
  1169. rc = -EINVAL;
  1170. goto error;
  1171. }
  1172. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1173. "qcom,mdss-dsi-hfp-power-mode");
  1174. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1175. "qcom,mdss-dsi-hbp-power-mode");
  1176. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1177. "qcom,mdss-dsi-hsa-power-mode");
  1178. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1179. "qcom,mdss-dsi-last-line-interleave");
  1180. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1181. "qcom,mdss-dsi-bllp-eof-power-mode");
  1182. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1183. "qcom,mdss-dsi-bllp-power-mode");
  1184. traffic_mode = utils->get_property(utils->data,
  1185. "qcom,mdss-dsi-traffic-mode",
  1186. NULL);
  1187. if (!traffic_mode) {
  1188. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1189. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1190. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1191. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1192. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1193. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1194. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1195. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1196. } else {
  1197. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1198. traffic_mode);
  1199. rc = -EINVAL;
  1200. goto error;
  1201. }
  1202. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1203. &vc_id);
  1204. if (rc) {
  1205. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1206. cfg->vc_id = 0;
  1207. } else {
  1208. cfg->vc_id = vc_id;
  1209. }
  1210. error:
  1211. return rc;
  1212. }
  1213. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1214. struct dsi_parser_utils *utils,
  1215. const char *name)
  1216. {
  1217. u32 val = 0;
  1218. int rc = 0;
  1219. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1220. if (rc) {
  1221. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1222. cfg->wr_mem_start = 0x2C;
  1223. } else {
  1224. cfg->wr_mem_start = val;
  1225. }
  1226. val = 0;
  1227. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1228. &val);
  1229. if (rc) {
  1230. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1231. cfg->wr_mem_continue = 0x3C;
  1232. } else {
  1233. cfg->wr_mem_continue = val;
  1234. }
  1235. /* TODO: fix following */
  1236. cfg->max_cmd_packets_interleave = 0;
  1237. val = 0;
  1238. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1239. &val);
  1240. if (rc) {
  1241. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1242. cfg->insert_dcs_command = true;
  1243. } else if (val == 1) {
  1244. cfg->insert_dcs_command = true;
  1245. } else if (val == 0) {
  1246. cfg->insert_dcs_command = false;
  1247. } else {
  1248. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1249. name);
  1250. rc = -EINVAL;
  1251. goto error;
  1252. }
  1253. error:
  1254. return rc;
  1255. }
  1256. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1257. {
  1258. int rc = 0;
  1259. struct dsi_parser_utils *utils = &panel->utils;
  1260. bool panel_mode_switch_enabled;
  1261. enum dsi_op_mode panel_mode;
  1262. const char *mode;
  1263. mode = utils->get_property(utils->data,
  1264. "qcom,mdss-dsi-panel-type", NULL);
  1265. if (!mode) {
  1266. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1267. panel_mode = DSI_OP_VIDEO_MODE;
  1268. } else if (!strcmp(mode, "dsi_video_mode")) {
  1269. panel_mode = DSI_OP_VIDEO_MODE;
  1270. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1271. panel_mode = DSI_OP_CMD_MODE;
  1272. } else {
  1273. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1274. rc = -EINVAL;
  1275. goto error;
  1276. }
  1277. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1278. "qcom,mdss-dsi-panel-mode-switch");
  1279. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1280. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1281. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1282. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1283. utils,
  1284. panel->name);
  1285. if (rc) {
  1286. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1287. panel->name, rc);
  1288. goto error;
  1289. }
  1290. }
  1291. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1292. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1293. utils,
  1294. panel->name);
  1295. if (rc) {
  1296. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1297. panel->name, rc);
  1298. goto error;
  1299. }
  1300. }
  1301. panel->poms_align_vsync = utils->read_bool(utils->data,
  1302. "qcom,poms-align-panel-vsync");
  1303. panel->panel_mode = panel_mode;
  1304. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1305. error:
  1306. return rc;
  1307. }
  1308. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1309. {
  1310. int rc = 0;
  1311. u32 val = 0;
  1312. const char *str;
  1313. struct dsi_panel_phy_props *props = &panel->phy_props;
  1314. struct dsi_parser_utils *utils = &panel->utils;
  1315. const char *name = panel->name;
  1316. rc = utils->read_u32(utils->data,
  1317. "qcom,mdss-pan-physical-width-dimension", &val);
  1318. if (rc) {
  1319. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1320. props->panel_width_mm = 0;
  1321. rc = 0;
  1322. } else {
  1323. props->panel_width_mm = val;
  1324. }
  1325. rc = utils->read_u32(utils->data,
  1326. "qcom,mdss-pan-physical-height-dimension",
  1327. &val);
  1328. if (rc) {
  1329. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1330. props->panel_height_mm = 0;
  1331. rc = 0;
  1332. } else {
  1333. props->panel_height_mm = val;
  1334. }
  1335. str = utils->get_property(utils->data,
  1336. "qcom,mdss-dsi-panel-orientation", NULL);
  1337. if (!str) {
  1338. props->rotation = DSI_PANEL_ROTATE_NONE;
  1339. } else if (!strcmp(str, "180")) {
  1340. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1341. } else if (!strcmp(str, "hflip")) {
  1342. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1343. } else if (!strcmp(str, "vflip")) {
  1344. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1345. } else {
  1346. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1347. rc = -EINVAL;
  1348. goto error;
  1349. }
  1350. error:
  1351. return rc;
  1352. }
  1353. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1354. "qcom,mdss-dsi-pre-on-command",
  1355. "qcom,mdss-dsi-on-command",
  1356. "qcom,mdss-dsi-post-panel-on-command",
  1357. "qcom,mdss-dsi-pre-off-command",
  1358. "qcom,mdss-dsi-off-command",
  1359. "qcom,mdss-dsi-post-off-command",
  1360. "qcom,mdss-dsi-pre-res-switch",
  1361. "qcom,mdss-dsi-res-switch",
  1362. "qcom,mdss-dsi-post-res-switch",
  1363. "qcom,cmd-to-video-mode-switch-commands",
  1364. "qcom,cmd-to-video-mode-post-switch-commands",
  1365. "qcom,video-to-cmd-mode-switch-commands",
  1366. "qcom,video-to-cmd-mode-post-switch-commands",
  1367. "qcom,mdss-dsi-panel-status-command",
  1368. "qcom,mdss-dsi-lp1-command",
  1369. "qcom,mdss-dsi-lp2-command",
  1370. "qcom,mdss-dsi-nolp-command",
  1371. "PPS not parsed from DTSI, generated dynamically",
  1372. "ROI not parsed from DTSI, generated dynamically",
  1373. "qcom,mdss-dsi-timing-switch-command",
  1374. "qcom,mdss-dsi-post-mode-switch-on-command",
  1375. "qcom,mdss-dsi-qsync-on-commands",
  1376. "qcom,mdss-dsi-qsync-off-commands",
  1377. };
  1378. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1379. "qcom,mdss-dsi-pre-on-command-state",
  1380. "qcom,mdss-dsi-on-command-state",
  1381. "qcom,mdss-dsi-post-on-command-state",
  1382. "qcom,mdss-dsi-pre-off-command-state",
  1383. "qcom,mdss-dsi-off-command-state",
  1384. "qcom,mdss-dsi-post-off-command-state",
  1385. "qcom,mdss-dsi-pre-res-switch-state",
  1386. "qcom,mdss-dsi-res-switch-state",
  1387. "qcom,mdss-dsi-post-res-switch-state",
  1388. "qcom,cmd-to-video-mode-switch-commands-state",
  1389. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1390. "qcom,video-to-cmd-mode-switch-commands-state",
  1391. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1392. "qcom,mdss-dsi-panel-status-command-state",
  1393. "qcom,mdss-dsi-lp1-command-state",
  1394. "qcom,mdss-dsi-lp2-command-state",
  1395. "qcom,mdss-dsi-nolp-command-state",
  1396. "PPS not parsed from DTSI, generated dynamically",
  1397. "ROI not parsed from DTSI, generated dynamically",
  1398. "qcom,mdss-dsi-timing-switch-command-state",
  1399. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1400. "qcom,mdss-dsi-qsync-on-commands-state",
  1401. "qcom,mdss-dsi-qsync-off-commands-state",
  1402. };
  1403. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1404. {
  1405. const u32 cmd_set_min_size = 7;
  1406. u32 count = 0;
  1407. u32 packet_length;
  1408. u32 tmp;
  1409. while (length >= cmd_set_min_size) {
  1410. packet_length = cmd_set_min_size;
  1411. tmp = ((data[5] << 8) | (data[6]));
  1412. packet_length += tmp;
  1413. if (packet_length > length) {
  1414. DSI_ERR("format error\n");
  1415. return -EINVAL;
  1416. }
  1417. length -= packet_length;
  1418. data += packet_length;
  1419. count++;
  1420. }
  1421. *cnt = count;
  1422. return 0;
  1423. }
  1424. static int dsi_panel_create_cmd_packets(const char *data,
  1425. u32 length,
  1426. u32 count,
  1427. struct dsi_cmd_desc *cmd)
  1428. {
  1429. int rc = 0;
  1430. int i, j;
  1431. u8 *payload;
  1432. for (i = 0; i < count; i++) {
  1433. u32 size;
  1434. cmd[i].msg.type = data[0];
  1435. cmd[i].last_command = (data[1] == 1);
  1436. cmd[i].msg.channel = data[2];
  1437. cmd[i].msg.flags |= data[3];
  1438. cmd[i].msg.ctrl = 0;
  1439. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1440. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1441. size = cmd[i].msg.tx_len * sizeof(u8);
  1442. payload = kzalloc(size, GFP_KERNEL);
  1443. if (!payload) {
  1444. rc = -ENOMEM;
  1445. goto error_free_payloads;
  1446. }
  1447. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1448. payload[j] = data[7 + j];
  1449. cmd[i].msg.tx_buf = payload;
  1450. data += (7 + cmd[i].msg.tx_len);
  1451. }
  1452. return rc;
  1453. error_free_payloads:
  1454. for (i = i - 1; i >= 0; i--) {
  1455. cmd--;
  1456. kfree(cmd->msg.tx_buf);
  1457. }
  1458. return rc;
  1459. }
  1460. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1461. {
  1462. u32 i = 0;
  1463. struct dsi_cmd_desc *cmd;
  1464. for (i = 0; i < set->count; i++) {
  1465. cmd = &set->cmds[i];
  1466. kfree(cmd->msg.tx_buf);
  1467. }
  1468. }
  1469. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1470. {
  1471. kfree(set->cmds);
  1472. }
  1473. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1474. u32 packet_count)
  1475. {
  1476. u32 size;
  1477. size = packet_count * sizeof(*cmd->cmds);
  1478. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1479. if (!cmd->cmds)
  1480. return -ENOMEM;
  1481. cmd->count = packet_count;
  1482. return 0;
  1483. }
  1484. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1485. enum dsi_cmd_set_type type,
  1486. struct dsi_parser_utils *utils)
  1487. {
  1488. int rc = 0;
  1489. u32 length = 0;
  1490. const char *data;
  1491. const char *state;
  1492. u32 packet_count = 0;
  1493. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1494. &length);
  1495. if (!data) {
  1496. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1497. rc = -ENOTSUPP;
  1498. goto error;
  1499. }
  1500. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1501. cmd_set_prop_map[type], length);
  1502. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1503. 8, 1, data, length, false);
  1504. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1505. if (rc) {
  1506. DSI_ERR("commands failed, rc=%d\n", rc);
  1507. goto error;
  1508. }
  1509. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1510. packet_count, length);
  1511. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1512. if (rc) {
  1513. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1514. goto error;
  1515. }
  1516. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1517. cmd->cmds);
  1518. if (rc) {
  1519. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1520. goto error_free_mem;
  1521. }
  1522. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1523. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1524. cmd->state = DSI_CMD_SET_STATE_LP;
  1525. } else if (!strcmp(state, "dsi_hs_mode")) {
  1526. cmd->state = DSI_CMD_SET_STATE_HS;
  1527. } else {
  1528. DSI_ERR("[%s] command state unrecognized-%s\n",
  1529. cmd_set_state_map[type], state);
  1530. goto error_free_mem;
  1531. }
  1532. return rc;
  1533. error_free_mem:
  1534. kfree(cmd->cmds);
  1535. cmd->cmds = NULL;
  1536. error:
  1537. return rc;
  1538. }
  1539. static int dsi_panel_parse_cmd_sets(
  1540. struct dsi_display_mode_priv_info *priv_info,
  1541. struct dsi_parser_utils *utils)
  1542. {
  1543. int rc = 0;
  1544. struct dsi_panel_cmd_set *set;
  1545. u32 i;
  1546. if (!priv_info) {
  1547. DSI_ERR("invalid mode priv info\n");
  1548. return -EINVAL;
  1549. }
  1550. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1551. set = &priv_info->cmd_sets[i];
  1552. set->type = i;
  1553. set->count = 0;
  1554. if (i == DSI_CMD_SET_PPS) {
  1555. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1556. if (rc)
  1557. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1558. i, rc);
  1559. set->state = DSI_CMD_SET_STATE_LP;
  1560. } else {
  1561. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1562. if (rc)
  1563. DSI_DEBUG("failed to parse set %d\n", i);
  1564. }
  1565. }
  1566. rc = 0;
  1567. return rc;
  1568. }
  1569. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1570. {
  1571. int rc = 0;
  1572. int i;
  1573. u32 length = 0;
  1574. u32 count = 0;
  1575. u32 size = 0;
  1576. u32 *arr_32 = NULL;
  1577. const u32 *arr;
  1578. struct dsi_parser_utils *utils = &panel->utils;
  1579. struct dsi_reset_seq *seq;
  1580. if (panel->host_config.ext_bridge_mode)
  1581. return 0;
  1582. arr = utils->get_property(utils->data,
  1583. "qcom,mdss-dsi-reset-sequence", &length);
  1584. if (!arr) {
  1585. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1586. rc = -EINVAL;
  1587. goto error;
  1588. }
  1589. if (length & 0x1) {
  1590. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1591. panel->name);
  1592. rc = -EINVAL;
  1593. goto error;
  1594. }
  1595. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1596. length = length / sizeof(u32);
  1597. size = length * sizeof(u32);
  1598. arr_32 = kzalloc(size, GFP_KERNEL);
  1599. if (!arr_32) {
  1600. rc = -ENOMEM;
  1601. goto error;
  1602. }
  1603. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1604. arr_32, length);
  1605. if (rc) {
  1606. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1607. goto error_free_arr_32;
  1608. }
  1609. count = length / 2;
  1610. size = count * sizeof(*seq);
  1611. seq = kzalloc(size, GFP_KERNEL);
  1612. if (!seq) {
  1613. rc = -ENOMEM;
  1614. goto error_free_arr_32;
  1615. }
  1616. panel->reset_config.sequence = seq;
  1617. panel->reset_config.count = count;
  1618. for (i = 0; i < length; i += 2) {
  1619. seq->level = arr_32[i];
  1620. seq->sleep_ms = arr_32[i + 1];
  1621. seq++;
  1622. }
  1623. error_free_arr_32:
  1624. kfree(arr_32);
  1625. error:
  1626. return rc;
  1627. }
  1628. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1629. {
  1630. struct dsi_parser_utils *utils = &panel->utils;
  1631. const char *string;
  1632. int i, rc = 0;
  1633. panel->ulps_feature_enabled =
  1634. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1635. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1636. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1637. panel->ulps_suspend_enabled =
  1638. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1639. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1640. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1641. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1642. "qcom,mdss-dsi-te-using-wd");
  1643. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1644. "qcom,cmd-sync-wait-broadcast");
  1645. panel->lp11_init = utils->read_bool(utils->data,
  1646. "qcom,mdss-dsi-lp11-init");
  1647. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1648. "qcom,platform-reset-gpio-always-on");
  1649. panel->spr_info.enable = false;
  1650. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1651. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1652. if (!rc) {
  1653. // find match for pack-type string
  1654. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1655. if (msm_spr_pack_type_str[i] &&
  1656. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1657. panel->spr_info.enable = true;
  1658. panel->spr_info.pack_type = i;
  1659. break;
  1660. }
  1661. }
  1662. }
  1663. pr_debug("%s source side spr packing, pack-type %s\n",
  1664. panel->spr_info.enable ? "enable" : "disable",
  1665. panel->spr_info.enable ?
  1666. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1667. return 0;
  1668. }
  1669. static int dsi_panel_parse_jitter_config(
  1670. struct dsi_display_mode *mode,
  1671. struct dsi_parser_utils *utils)
  1672. {
  1673. int rc;
  1674. struct dsi_display_mode_priv_info *priv_info;
  1675. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1676. u64 jitter_val = 0;
  1677. priv_info = mode->priv_info;
  1678. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1679. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1680. if (rc) {
  1681. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1682. } else {
  1683. jitter_val = jitter[0];
  1684. jitter_val = div_u64(jitter_val, jitter[1]);
  1685. }
  1686. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1687. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1688. priv_info->panel_jitter_denom =
  1689. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1690. } else {
  1691. priv_info->panel_jitter_numer = jitter[0];
  1692. priv_info->panel_jitter_denom = jitter[1];
  1693. }
  1694. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1695. &priv_info->panel_prefill_lines);
  1696. if (rc) {
  1697. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1698. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1699. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1700. } else if (priv_info->panel_prefill_lines >=
  1701. DSI_V_TOTAL(&mode->timing)) {
  1702. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1703. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1704. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1705. }
  1706. return 0;
  1707. }
  1708. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1709. {
  1710. int rc = 0;
  1711. char *supply_name;
  1712. if (panel->host_config.ext_bridge_mode)
  1713. return 0;
  1714. if (!strcmp(panel->type, "primary"))
  1715. supply_name = "qcom,panel-supply-entries";
  1716. else
  1717. supply_name = "qcom,panel-sec-supply-entries";
  1718. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1719. &panel->power_info, supply_name);
  1720. if (rc) {
  1721. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1722. goto error;
  1723. }
  1724. error:
  1725. return rc;
  1726. }
  1727. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1728. struct msm_io_res *io_res)
  1729. {
  1730. struct list_head temp_head;
  1731. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1732. struct list_head *mem_list = &io_res->mem;
  1733. int i, rc = 0, address_count, pin_count;
  1734. u32 *pins = NULL, *address = NULL;
  1735. u32 base, size;
  1736. struct dsi_parser_utils *utils = &panel->utils;
  1737. INIT_LIST_HEAD(&temp_head);
  1738. address_count = utils->count_u32_elems(utils->data,
  1739. "qcom,dsi-panel-gpio-address");
  1740. if (address_count != 2) {
  1741. DSI_DEBUG("panel gpio address not defined\n");
  1742. return 0;
  1743. }
  1744. address = kzalloc(sizeof(u32) * address_count, GFP_KERNEL);
  1745. if (!address)
  1746. return -ENOMEM;
  1747. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-address",
  1748. address, address_count);
  1749. if (rc) {
  1750. DSI_ERR("panel gpio address not defined correctly\n");
  1751. goto end;
  1752. }
  1753. base = address[0];
  1754. size = address[1];
  1755. pin_count = utils->count_u32_elems(utils->data,
  1756. "qcom,dsi-panel-gpio-pins");
  1757. if (pin_count < 0) {
  1758. DSI_ERR("panel gpio pins not defined\n");
  1759. rc = pin_count;
  1760. goto end;
  1761. }
  1762. pins = kzalloc(sizeof(u32) * pin_count, GFP_KERNEL);
  1763. if (!pins) {
  1764. rc = -ENOMEM;
  1765. goto end;
  1766. }
  1767. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-pins",
  1768. pins, pin_count);
  1769. if (rc) {
  1770. DSI_ERR("panel gpio pins not defined correctly\n");
  1771. goto end;
  1772. }
  1773. for (i = 0; i < pin_count; i++) {
  1774. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1775. if (!io_mem) {
  1776. rc = -ENOMEM;
  1777. goto parse_fail;
  1778. }
  1779. io_mem->base = base + (pins[i] * size);
  1780. io_mem->size = size;
  1781. list_add(&io_mem->list, &temp_head);
  1782. }
  1783. list_splice(&temp_head, mem_list);
  1784. goto end;
  1785. parse_fail:
  1786. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1787. list_del(&pos->list);
  1788. kzfree(pos);
  1789. }
  1790. end:
  1791. kzfree(pins);
  1792. kzfree(address);
  1793. return rc;
  1794. }
  1795. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1796. {
  1797. int rc = 0;
  1798. const char *data;
  1799. struct dsi_parser_utils *utils = &panel->utils;
  1800. char *reset_gpio_name, *mode_set_gpio_name;
  1801. if (!strcmp(panel->type, "primary")) {
  1802. reset_gpio_name = "qcom,platform-reset-gpio";
  1803. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1804. } else {
  1805. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1806. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1807. }
  1808. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1809. reset_gpio_name, 0);
  1810. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1811. !panel->host_config.ext_bridge_mode) {
  1812. rc = panel->reset_config.reset_gpio;
  1813. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1814. goto error;
  1815. }
  1816. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1817. "qcom,5v-boost-gpio",
  1818. 0);
  1819. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1820. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1821. panel->name, rc);
  1822. panel->reset_config.disp_en_gpio =
  1823. utils->get_named_gpio(utils->data,
  1824. "qcom,platform-en-gpio", 0);
  1825. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1826. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1827. panel->name, rc);
  1828. }
  1829. }
  1830. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1831. utils->data, mode_set_gpio_name, 0);
  1832. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1833. DSI_DEBUG("mode gpio not specified\n");
  1834. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1835. data = utils->get_property(utils->data,
  1836. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1837. if (data) {
  1838. if (!strcmp(data, "single_port"))
  1839. panel->reset_config.mode_sel_state =
  1840. MODE_SEL_SINGLE_PORT;
  1841. else if (!strcmp(data, "dual_port"))
  1842. panel->reset_config.mode_sel_state =
  1843. MODE_SEL_DUAL_PORT;
  1844. else if (!strcmp(data, "high"))
  1845. panel->reset_config.mode_sel_state =
  1846. MODE_GPIO_HIGH;
  1847. else if (!strcmp(data, "low"))
  1848. panel->reset_config.mode_sel_state =
  1849. MODE_GPIO_LOW;
  1850. } else {
  1851. /* Set default mode as SPLIT mode */
  1852. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1853. }
  1854. /* TODO: release memory */
  1855. rc = dsi_panel_parse_reset_sequence(panel);
  1856. if (rc) {
  1857. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1858. panel->name, rc);
  1859. goto error;
  1860. }
  1861. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1862. "qcom,mdss-dsi-panel-test-pin",
  1863. 0);
  1864. if (!gpio_is_valid(panel->panel_test_gpio))
  1865. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1866. __LINE__);
  1867. error:
  1868. return rc;
  1869. }
  1870. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1871. {
  1872. int rc = 0;
  1873. u32 val;
  1874. struct dsi_backlight_config *config = &panel->bl_config;
  1875. struct dsi_parser_utils *utils = &panel->utils;
  1876. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1877. &val);
  1878. if (rc) {
  1879. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1880. goto error;
  1881. }
  1882. config->pwm_period_usecs = val;
  1883. error:
  1884. return rc;
  1885. }
  1886. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1887. {
  1888. int rc = 0;
  1889. u32 val = 0;
  1890. const char *bl_type = NULL;
  1891. const char *data = NULL;
  1892. const char *state = NULL;
  1893. struct dsi_parser_utils *utils = &panel->utils;
  1894. char *bl_name = NULL;
  1895. if (!strcmp(panel->type, "primary"))
  1896. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1897. else
  1898. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1899. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1900. if (!bl_type) {
  1901. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1902. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1903. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1904. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1905. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1906. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1907. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1908. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1909. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1910. } else {
  1911. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1912. panel->name, bl_type);
  1913. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1914. }
  1915. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1916. if (!data) {
  1917. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1918. } else if (!strcmp(data, "delay_until_first_frame")) {
  1919. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1920. } else {
  1921. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1922. panel->name, data);
  1923. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1924. }
  1925. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1926. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1927. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1928. if (rc) {
  1929. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1930. panel->name);
  1931. panel->bl_config.bl_min_level = 0;
  1932. } else {
  1933. panel->bl_config.bl_min_level = val;
  1934. }
  1935. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1936. if (rc) {
  1937. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1938. panel->name);
  1939. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1940. } else {
  1941. panel->bl_config.bl_max_level = val;
  1942. }
  1943. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1944. &val);
  1945. if (rc) {
  1946. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1947. panel->name);
  1948. panel->bl_config.brightness_max_level = 255;
  1949. rc = 0;
  1950. } else {
  1951. panel->bl_config.brightness_max_level = val;
  1952. }
  1953. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1954. "qcom,mdss-dsi-bl-inverted-dbv");
  1955. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  1956. if (!state || !strcmp(state, "dsi_hs_mode"))
  1957. panel->bl_config.lp_mode = false;
  1958. else if (!strcmp(state, "dsi_lp_mode"))
  1959. panel->bl_config.lp_mode = true;
  1960. else
  1961. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  1962. state);
  1963. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1964. rc = dsi_panel_parse_bl_pwm_config(panel);
  1965. if (rc) {
  1966. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1967. panel->name, rc);
  1968. goto error;
  1969. }
  1970. }
  1971. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1972. "qcom,platform-bklight-en-gpio",
  1973. 0);
  1974. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1975. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1976. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1977. panel->name, rc);
  1978. rc = -EPROBE_DEFER;
  1979. goto error;
  1980. } else {
  1981. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1982. panel->name, rc);
  1983. rc = 0;
  1984. goto error;
  1985. }
  1986. }
  1987. error:
  1988. return rc;
  1989. }
  1990. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1991. struct dsi_parser_utils *utils)
  1992. {
  1993. const char *data;
  1994. u32 len, i;
  1995. int rc = 0;
  1996. struct dsi_display_mode_priv_info *priv_info;
  1997. u64 pixel_clk_khz;
  1998. if (!mode || !mode->priv_info)
  1999. return -EINVAL;
  2000. priv_info = mode->priv_info;
  2001. data = utils->get_property(utils->data,
  2002. "qcom,mdss-dsi-panel-phy-timings", &len);
  2003. if (!data) {
  2004. DSI_DEBUG("Unable to read Phy timing settings\n");
  2005. } else {
  2006. priv_info->phy_timing_val =
  2007. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2008. if (!priv_info->phy_timing_val)
  2009. return -EINVAL;
  2010. for (i = 0; i < len; i++)
  2011. priv_info->phy_timing_val[i] = data[i];
  2012. priv_info->phy_timing_len = len;
  2013. }
  2014. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2015. /*
  2016. * For command mode we update the pclk as part of
  2017. * function dsi_panel_calc_dsi_transfer_time( )
  2018. * as we set it based on dsi clock or mdp transfer time.
  2019. */
  2020. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2021. DSI_V_TOTAL(&mode->timing) *
  2022. mode->timing.refresh_rate);
  2023. do_div(pixel_clk_khz, 1000);
  2024. mode->pixel_clk_khz = pixel_clk_khz;
  2025. }
  2026. return rc;
  2027. }
  2028. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2029. struct dsi_parser_utils *utils)
  2030. {
  2031. u32 data;
  2032. int rc = -EINVAL;
  2033. int intf_width;
  2034. const char *compression;
  2035. struct dsi_display_mode_priv_info *priv_info;
  2036. if (!mode || !mode->priv_info)
  2037. return -EINVAL;
  2038. priv_info = mode->priv_info;
  2039. priv_info->dsc_enabled = false;
  2040. compression = utils->get_property(utils->data,
  2041. "qcom,compression-mode", NULL);
  2042. if (compression && !strcmp(compression, "dsc"))
  2043. priv_info->dsc_enabled = true;
  2044. if (!priv_info->dsc_enabled) {
  2045. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2046. return 0;
  2047. }
  2048. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2049. if (rc) {
  2050. priv_info->dsc.config.dsc_version_major = 0x1;
  2051. priv_info->dsc.config.dsc_version_minor = 0x1;
  2052. rc = 0;
  2053. } else {
  2054. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2055. * major version information
  2056. */
  2057. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2058. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2059. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  2060. ((priv_info->dsc.config.dsc_version_minor
  2061. != 0x1) ||
  2062. (priv_info->dsc.config.dsc_version_minor
  2063. != 0x2))) {
  2064. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2065. __func__,
  2066. priv_info->dsc.config.dsc_version_major,
  2067. priv_info->dsc.config.dsc_version_minor
  2068. );
  2069. rc = -EINVAL;
  2070. goto error;
  2071. }
  2072. }
  2073. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2074. if (rc) {
  2075. priv_info->dsc.scr_rev = 0x0;
  2076. rc = 0;
  2077. } else {
  2078. priv_info->dsc.scr_rev = data & 0xff;
  2079. /* only one scr rev supported */
  2080. if (priv_info->dsc.scr_rev > 0x1) {
  2081. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2082. __func__, priv_info->dsc.scr_rev);
  2083. rc = -EINVAL;
  2084. goto error;
  2085. }
  2086. }
  2087. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2088. if (rc) {
  2089. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2090. goto error;
  2091. }
  2092. priv_info->dsc.config.slice_height = data;
  2093. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2094. if (rc) {
  2095. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2096. goto error;
  2097. }
  2098. priv_info->dsc.config.slice_width = data;
  2099. intf_width = mode->timing.h_active;
  2100. if (intf_width % priv_info->dsc.config.slice_width) {
  2101. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2102. intf_width, priv_info->dsc.config.slice_width);
  2103. rc = -EINVAL;
  2104. goto error;
  2105. }
  2106. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2107. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2108. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2109. if (rc) {
  2110. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2111. goto error;
  2112. } else if (!data || (data > 2)) {
  2113. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2114. goto error;
  2115. }
  2116. priv_info->dsc.slice_per_pkt = data;
  2117. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2118. &data);
  2119. if (rc) {
  2120. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2121. goto error;
  2122. }
  2123. priv_info->dsc.config.bits_per_component = data;
  2124. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2125. if (rc) {
  2126. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2127. data = 0;
  2128. }
  2129. priv_info->dsc.pps_delay_ms = data;
  2130. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2131. &data);
  2132. if (rc) {
  2133. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2134. goto error;
  2135. }
  2136. priv_info->dsc.config.bits_per_pixel = data << 4;
  2137. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2138. &data);
  2139. if (rc) {
  2140. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2141. rc = 0;
  2142. data = MSM_CHROMA_444;
  2143. }
  2144. priv_info->dsc.chroma_format = data;
  2145. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2146. &data);
  2147. if (rc) {
  2148. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2149. rc = 0;
  2150. data = MSM_RGB;
  2151. }
  2152. priv_info->dsc.source_color_space = data;
  2153. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2154. "qcom,mdss-dsc-block-prediction-enable");
  2155. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2156. priv_info->dsc.config.slice_width);
  2157. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2158. priv_info->dsc.scr_rev);
  2159. if (rc) {
  2160. DSI_DEBUG("failed populating dsc params\n");
  2161. rc = -EINVAL;
  2162. goto error;
  2163. }
  2164. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2165. if (rc) {
  2166. DSI_DEBUG("failed populating other dsc params\n");
  2167. rc = -EINVAL;
  2168. goto error;
  2169. }
  2170. priv_info->pclk_scale.numer =
  2171. priv_info->dsc.config.bits_per_pixel >> 4;
  2172. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2173. priv_info->dsc.chroma_format,
  2174. priv_info->dsc.config.bits_per_component);
  2175. mode->timing.dsc_enabled = true;
  2176. mode->timing.dsc = &priv_info->dsc;
  2177. mode->timing.pclk_scale = priv_info->pclk_scale;
  2178. error:
  2179. return rc;
  2180. }
  2181. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2182. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2183. {
  2184. u32 data;
  2185. int rc = -EINVAL;
  2186. const char *compression;
  2187. struct dsi_display_mode_priv_info *priv_info;
  2188. int intf_width;
  2189. if (!mode || !mode->priv_info)
  2190. return -EINVAL;
  2191. priv_info = mode->priv_info;
  2192. priv_info->vdc_enabled = false;
  2193. compression = utils->get_property(utils->data,
  2194. "qcom,compression-mode", NULL);
  2195. if (compression && !strcmp(compression, "vdc"))
  2196. priv_info->vdc_enabled = true;
  2197. if (!priv_info->vdc_enabled) {
  2198. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2199. return 0;
  2200. }
  2201. priv_info->vdc.panel_mode = panel_mode;
  2202. priv_info->vdc.traffic_mode = traffic_mode;
  2203. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2204. if (rc) {
  2205. priv_info->vdc.version_major = 0x1;
  2206. priv_info->vdc.version_minor = 0x2;
  2207. priv_info->vdc.version_release = 0x0;
  2208. rc = 0;
  2209. } else {
  2210. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2211. * major version information
  2212. */
  2213. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2214. priv_info->vdc.version_minor = data & 0x0F;
  2215. if ((priv_info->vdc.version_major != 0x1) &&
  2216. ((priv_info->vdc.version_minor
  2217. != 0x2))) {
  2218. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2219. __func__,
  2220. priv_info->vdc.version_major,
  2221. priv_info->vdc.version_minor
  2222. );
  2223. rc = -EINVAL;
  2224. goto error;
  2225. }
  2226. }
  2227. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2228. if (rc) {
  2229. priv_info->vdc.version_release = 0x0;
  2230. rc = 0;
  2231. } else {
  2232. priv_info->vdc.version_release = data & 0xff;
  2233. /* only one release version is supported */
  2234. if (priv_info->vdc.version_release != 0x0) {
  2235. DSI_ERR("unsupported vdc release version %d\n",
  2236. priv_info->vdc.version_release);
  2237. rc = -EINVAL;
  2238. goto error;
  2239. }
  2240. }
  2241. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2242. priv_info->vdc.version_major,
  2243. priv_info->vdc.version_minor,
  2244. priv_info->vdc.version_release);
  2245. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2246. if (rc) {
  2247. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2248. goto error;
  2249. }
  2250. priv_info->vdc.slice_height = data;
  2251. /* slice height should be atleast 16 lines */
  2252. if (priv_info->vdc.slice_height < 16) {
  2253. DSI_ERR("invalid slice height %d\n",
  2254. priv_info->vdc.slice_height);
  2255. rc = -EINVAL;
  2256. goto error;
  2257. }
  2258. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2259. if (rc) {
  2260. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2261. goto error;
  2262. }
  2263. priv_info->vdc.slice_width = data;
  2264. /*
  2265. * slide-width should be multiple of 8
  2266. * slice-width should be atlease 64 pixels
  2267. */
  2268. if ((priv_info->vdc.slice_width & 7) ||
  2269. (priv_info->vdc.slice_width < 64)) {
  2270. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2271. rc = -EINVAL;
  2272. goto error;
  2273. }
  2274. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2275. if (rc) {
  2276. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2277. goto error;
  2278. } else if (!data || (data > 2)) {
  2279. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2280. rc = -EINVAL;
  2281. goto error;
  2282. }
  2283. intf_width = mode->timing.h_active;
  2284. priv_info->vdc.slice_per_pkt = data;
  2285. priv_info->vdc.frame_width = mode->timing.h_active;
  2286. priv_info->vdc.frame_height = mode->timing.v_active;
  2287. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2288. &data);
  2289. if (rc) {
  2290. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2291. goto error;
  2292. }
  2293. priv_info->vdc.bits_per_component = data;
  2294. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2295. if (rc) {
  2296. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2297. data = 0;
  2298. }
  2299. priv_info->vdc.pps_delay_ms = data;
  2300. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2301. &data);
  2302. if (rc) {
  2303. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2304. goto error;
  2305. }
  2306. priv_info->vdc.bits_per_pixel = data << 4;
  2307. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2308. &data);
  2309. if (rc) {
  2310. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2311. rc = 0;
  2312. data = MSM_CHROMA_444;
  2313. }
  2314. priv_info->vdc.chroma_format = data;
  2315. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2316. &data);
  2317. if (rc) {
  2318. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2319. rc = 0;
  2320. data = MSM_RGB;
  2321. }
  2322. priv_info->vdc.source_color_space = data;
  2323. rc = sde_vdc_populate_config(&priv_info->vdc,
  2324. intf_width, traffic_mode);
  2325. if (rc) {
  2326. DSI_DEBUG("failed populating vdc config\n");
  2327. rc = -EINVAL;
  2328. goto error;
  2329. }
  2330. priv_info->pclk_scale.numer =
  2331. priv_info->vdc.bits_per_pixel >> 4;
  2332. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2333. priv_info->vdc.chroma_format,
  2334. priv_info->vdc.bits_per_component);
  2335. mode->timing.vdc_enabled = true;
  2336. mode->timing.vdc = &priv_info->vdc;
  2337. mode->timing.pclk_scale = priv_info->pclk_scale;
  2338. error:
  2339. return rc;
  2340. }
  2341. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2342. {
  2343. int rc = 0;
  2344. struct drm_panel_hdr_properties *hdr_prop;
  2345. struct dsi_parser_utils *utils = &panel->utils;
  2346. hdr_prop = &panel->hdr_props;
  2347. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2348. "qcom,mdss-dsi-panel-hdr-enabled");
  2349. if (hdr_prop->hdr_enabled) {
  2350. rc = utils->read_u32_array(utils->data,
  2351. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2352. hdr_prop->display_primaries,
  2353. DISPLAY_PRIMARIES_MAX);
  2354. if (rc) {
  2355. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2356. __func__, __LINE__, rc);
  2357. hdr_prop->hdr_enabled = false;
  2358. return rc;
  2359. }
  2360. rc = utils->read_u32(utils->data,
  2361. "qcom,mdss-dsi-panel-peak-brightness",
  2362. &(hdr_prop->peak_brightness));
  2363. if (rc) {
  2364. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2365. __func__, __LINE__, rc);
  2366. hdr_prop->hdr_enabled = false;
  2367. return rc;
  2368. }
  2369. rc = utils->read_u32(utils->data,
  2370. "qcom,mdss-dsi-panel-blackness-level",
  2371. &(hdr_prop->blackness_level));
  2372. if (rc) {
  2373. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2374. __func__, __LINE__, rc);
  2375. hdr_prop->hdr_enabled = false;
  2376. return rc;
  2377. }
  2378. }
  2379. return 0;
  2380. }
  2381. static int dsi_panel_parse_topology(
  2382. struct dsi_display_mode_priv_info *priv_info,
  2383. struct dsi_parser_utils *utils,
  2384. int topology_override)
  2385. {
  2386. struct msm_display_topology *topology;
  2387. u32 top_count, top_sel, *array = NULL;
  2388. int i, len = 0;
  2389. int rc = -EINVAL;
  2390. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2391. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2392. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2393. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2394. return rc;
  2395. }
  2396. top_count = len / TOPOLOGY_SET_LEN;
  2397. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2398. if (!array)
  2399. return -ENOMEM;
  2400. rc = utils->read_u32_array(utils->data,
  2401. "qcom,display-topology", array, len);
  2402. if (rc) {
  2403. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2404. goto read_fail;
  2405. }
  2406. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2407. if (!topology) {
  2408. rc = -ENOMEM;
  2409. goto read_fail;
  2410. }
  2411. for (i = 0; i < top_count; i++) {
  2412. struct msm_display_topology *top = &topology[i];
  2413. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2414. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2415. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2416. }
  2417. if (topology_override >= 0 && topology_override < top_count) {
  2418. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2419. topology_override,
  2420. topology[topology_override].num_lm,
  2421. topology[topology_override].num_enc,
  2422. topology[topology_override].num_intf);
  2423. top_sel = topology_override;
  2424. goto parse_done;
  2425. }
  2426. rc = utils->read_u32(utils->data,
  2427. "qcom,default-topology-index", &top_sel);
  2428. if (rc) {
  2429. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2430. goto parse_fail;
  2431. }
  2432. if (top_sel >= top_count) {
  2433. rc = -EINVAL;
  2434. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2435. rc);
  2436. goto parse_fail;
  2437. }
  2438. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2439. topology[top_sel].num_lm,
  2440. topology[top_sel].num_enc,
  2441. topology[top_sel].num_intf);
  2442. parse_done:
  2443. memcpy(&priv_info->topology, &topology[top_sel],
  2444. sizeof(struct msm_display_topology));
  2445. parse_fail:
  2446. kfree(topology);
  2447. read_fail:
  2448. kfree(array);
  2449. return rc;
  2450. }
  2451. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2452. struct msm_roi_alignment *align)
  2453. {
  2454. int len = 0, rc = 0;
  2455. u32 value[6];
  2456. struct property *data;
  2457. if (!align)
  2458. return -EINVAL;
  2459. memset(align, 0, sizeof(*align));
  2460. data = utils->find_property(utils->data,
  2461. "qcom,panel-roi-alignment", &len);
  2462. len /= sizeof(u32);
  2463. if (!data) {
  2464. DSI_ERR("panel roi alignment not found\n");
  2465. rc = -EINVAL;
  2466. } else if (len != 6) {
  2467. DSI_ERR("incorrect roi alignment len %d\n", len);
  2468. rc = -EINVAL;
  2469. } else {
  2470. rc = utils->read_u32_array(utils->data,
  2471. "qcom,panel-roi-alignment", value, len);
  2472. if (rc)
  2473. DSI_DEBUG("error reading panel roi alignment values\n");
  2474. else {
  2475. align->xstart_pix_align = value[0];
  2476. align->ystart_pix_align = value[1];
  2477. align->width_pix_align = value[2];
  2478. align->height_pix_align = value[3];
  2479. align->min_width = value[4];
  2480. align->min_height = value[5];
  2481. }
  2482. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2483. align->xstart_pix_align,
  2484. align->width_pix_align,
  2485. align->ystart_pix_align,
  2486. align->height_pix_align,
  2487. align->min_width,
  2488. align->min_height);
  2489. }
  2490. return rc;
  2491. }
  2492. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2493. struct dsi_parser_utils *utils)
  2494. {
  2495. struct msm_roi_caps *roi_caps = NULL;
  2496. const char *data;
  2497. int rc = 0;
  2498. if (!mode || !mode->priv_info) {
  2499. DSI_ERR("invalid arguments\n");
  2500. return -EINVAL;
  2501. }
  2502. roi_caps = &mode->priv_info->roi_caps;
  2503. memset(roi_caps, 0, sizeof(*roi_caps));
  2504. data = utils->get_property(utils->data,
  2505. "qcom,partial-update-enabled", NULL);
  2506. if (data) {
  2507. if (!strcmp(data, "dual_roi"))
  2508. roi_caps->num_roi = 2;
  2509. else if (!strcmp(data, "single_roi"))
  2510. roi_caps->num_roi = 1;
  2511. else {
  2512. DSI_INFO(
  2513. "invalid value for qcom,partial-update-enabled: %s\n",
  2514. data);
  2515. return 0;
  2516. }
  2517. } else {
  2518. DSI_DEBUG("partial update disabled as the property is not set\n");
  2519. return 0;
  2520. }
  2521. roi_caps->merge_rois = utils->read_bool(utils->data,
  2522. "qcom,partial-update-roi-merge");
  2523. roi_caps->enabled = roi_caps->num_roi > 0;
  2524. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2525. roi_caps->enabled);
  2526. if (roi_caps->enabled)
  2527. rc = dsi_panel_parse_roi_alignment(utils,
  2528. &roi_caps->align);
  2529. if (rc)
  2530. memset(roi_caps, 0, sizeof(*roi_caps));
  2531. return rc;
  2532. }
  2533. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2534. struct dsi_parser_utils *utils)
  2535. {
  2536. bool vid_mode_support, cmd_mode_support;
  2537. if (!mode || !mode->priv_info) {
  2538. DSI_ERR("invalid arguments\n");
  2539. return -EINVAL;
  2540. }
  2541. vid_mode_support = utils->read_bool(utils->data,
  2542. "qcom,mdss-dsi-video-mode");
  2543. cmd_mode_support = utils->read_bool(utils->data,
  2544. "qcom,mdss-dsi-cmd-mode");
  2545. if (cmd_mode_support)
  2546. mode->panel_mode = DSI_OP_CMD_MODE;
  2547. else if (vid_mode_support)
  2548. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2549. else
  2550. return -EINVAL;
  2551. return 0;
  2552. };
  2553. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2554. {
  2555. int dms_enabled;
  2556. const char *data;
  2557. struct dsi_parser_utils *utils = &panel->utils;
  2558. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2559. dms_enabled = utils->read_bool(utils->data,
  2560. "qcom,dynamic-mode-switch-enabled");
  2561. if (!dms_enabled)
  2562. return 0;
  2563. data = utils->get_property(utils->data,
  2564. "qcom,dynamic-mode-switch-type", NULL);
  2565. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2566. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2567. } else {
  2568. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2569. panel->name, data);
  2570. return -EINVAL;
  2571. }
  2572. return 0;
  2573. };
  2574. /*
  2575. * The length of all the valid values to be checked should not be greater
  2576. * than the length of returned data from read command.
  2577. */
  2578. static bool
  2579. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2580. {
  2581. int i;
  2582. struct drm_panel_esd_config *config = &panel->esd_config;
  2583. for (i = 0; i < count; ++i) {
  2584. if (config->status_valid_params[i] >
  2585. config->status_cmds_rlen[i]) {
  2586. DSI_DEBUG("ignore valid params\n");
  2587. return false;
  2588. }
  2589. }
  2590. return true;
  2591. }
  2592. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2593. char *prop_key, u32 **target, u32 cmd_cnt)
  2594. {
  2595. int tmp;
  2596. if (!utils->find_property(utils->data, prop_key, &tmp))
  2597. return false;
  2598. tmp /= sizeof(u32);
  2599. if (tmp != cmd_cnt) {
  2600. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2601. tmp, cmd_cnt);
  2602. return false;
  2603. }
  2604. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2605. if (IS_ERR_OR_NULL(*target)) {
  2606. DSI_ERR("Error allocating memory for property\n");
  2607. return false;
  2608. }
  2609. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2610. DSI_ERR("cannot get values from dts\n");
  2611. kfree(*target);
  2612. *target = NULL;
  2613. return false;
  2614. }
  2615. return true;
  2616. }
  2617. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2618. {
  2619. kfree(esd_config->status_buf);
  2620. kfree(esd_config->return_buf);
  2621. kfree(esd_config->status_value);
  2622. kfree(esd_config->status_valid_params);
  2623. kfree(esd_config->status_cmds_rlen);
  2624. kfree(esd_config->status_cmd.cmds);
  2625. }
  2626. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2627. {
  2628. struct drm_panel_esd_config *esd_config;
  2629. int rc = 0;
  2630. u32 tmp;
  2631. u32 i, status_len, *lenp;
  2632. struct property *data;
  2633. struct dsi_parser_utils *utils = &panel->utils;
  2634. if (!panel) {
  2635. DSI_ERR("Invalid Params\n");
  2636. return -EINVAL;
  2637. }
  2638. esd_config = &panel->esd_config;
  2639. if (!esd_config)
  2640. return -EINVAL;
  2641. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2642. DSI_CMD_SET_PANEL_STATUS, utils);
  2643. if (!esd_config->status_cmd.count) {
  2644. DSI_ERR("panel status command parsing failed\n");
  2645. rc = -EINVAL;
  2646. goto error;
  2647. }
  2648. if (!dsi_panel_parse_esd_status_len(utils,
  2649. "qcom,mdss-dsi-panel-status-read-length",
  2650. &panel->esd_config.status_cmds_rlen,
  2651. esd_config->status_cmd.count)) {
  2652. DSI_ERR("Invalid status read length\n");
  2653. rc = -EINVAL;
  2654. goto error1;
  2655. }
  2656. if (dsi_panel_parse_esd_status_len(utils,
  2657. "qcom,mdss-dsi-panel-status-valid-params",
  2658. &panel->esd_config.status_valid_params,
  2659. esd_config->status_cmd.count)) {
  2660. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2661. esd_config->status_cmd.count)) {
  2662. rc = -EINVAL;
  2663. goto error2;
  2664. }
  2665. }
  2666. status_len = 0;
  2667. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2668. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2669. status_len += lenp[i];
  2670. if (!status_len) {
  2671. rc = -EINVAL;
  2672. goto error2;
  2673. }
  2674. /*
  2675. * Some panel may need multiple read commands to properly
  2676. * check panel status. Do a sanity check for proper status
  2677. * value which will be compared with the value read by dsi
  2678. * controller during ESD check. Also check if multiple read
  2679. * commands are there then, there should be corresponding
  2680. * status check values for each read command.
  2681. */
  2682. data = utils->find_property(utils->data,
  2683. "qcom,mdss-dsi-panel-status-value", &tmp);
  2684. tmp /= sizeof(u32);
  2685. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2686. esd_config->groups = tmp / status_len;
  2687. } else {
  2688. DSI_ERR("error parse panel-status-value\n");
  2689. rc = -EINVAL;
  2690. goto error2;
  2691. }
  2692. esd_config->status_value =
  2693. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2694. GFP_KERNEL);
  2695. if (!esd_config->status_value) {
  2696. rc = -ENOMEM;
  2697. goto error2;
  2698. }
  2699. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2700. sizeof(unsigned char), GFP_KERNEL);
  2701. if (!esd_config->return_buf) {
  2702. rc = -ENOMEM;
  2703. goto error3;
  2704. }
  2705. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2706. if (!esd_config->status_buf) {
  2707. rc = -ENOMEM;
  2708. goto error4;
  2709. }
  2710. rc = utils->read_u32_array(utils->data,
  2711. "qcom,mdss-dsi-panel-status-value",
  2712. esd_config->status_value, esd_config->groups * status_len);
  2713. if (rc) {
  2714. DSI_DEBUG("error reading panel status values\n");
  2715. memset(esd_config->status_value, 0,
  2716. esd_config->groups * status_len);
  2717. }
  2718. return 0;
  2719. error4:
  2720. kfree(esd_config->return_buf);
  2721. error3:
  2722. kfree(esd_config->status_value);
  2723. error2:
  2724. kfree(esd_config->status_valid_params);
  2725. kfree(esd_config->status_cmds_rlen);
  2726. error1:
  2727. kfree(esd_config->status_cmd.cmds);
  2728. error:
  2729. return rc;
  2730. }
  2731. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2732. {
  2733. int rc = 0;
  2734. const char *string;
  2735. struct drm_panel_esd_config *esd_config;
  2736. struct dsi_parser_utils *utils = &panel->utils;
  2737. u8 *esd_mode = NULL;
  2738. esd_config = &panel->esd_config;
  2739. esd_config->status_mode = ESD_MODE_MAX;
  2740. esd_config->esd_enabled = utils->read_bool(utils->data,
  2741. "qcom,esd-check-enabled");
  2742. if (!esd_config->esd_enabled)
  2743. return 0;
  2744. rc = utils->read_string(utils->data,
  2745. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2746. if (!rc) {
  2747. if (!strcmp(string, "bta_check")) {
  2748. esd_config->status_mode = ESD_MODE_SW_BTA;
  2749. } else if (!strcmp(string, "reg_read")) {
  2750. esd_config->status_mode = ESD_MODE_REG_READ;
  2751. } else if (!strcmp(string, "te_signal_check")) {
  2752. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2753. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2754. } else {
  2755. DSI_ERR("TE-ESD not valid for video mode\n");
  2756. rc = -EINVAL;
  2757. goto error;
  2758. }
  2759. } else {
  2760. DSI_ERR("No valid panel-status-check-mode string\n");
  2761. rc = -EINVAL;
  2762. goto error;
  2763. }
  2764. } else {
  2765. DSI_DEBUG("status check method not defined!\n");
  2766. rc = -EINVAL;
  2767. goto error;
  2768. }
  2769. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2770. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2771. if (rc) {
  2772. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2773. rc);
  2774. goto error;
  2775. }
  2776. esd_mode = "register_read";
  2777. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2778. esd_mode = "bta_trigger";
  2779. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2780. esd_mode = "te_check";
  2781. }
  2782. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2783. return 0;
  2784. error:
  2785. panel->esd_config.esd_enabled = false;
  2786. return rc;
  2787. }
  2788. static void dsi_panel_update_util(struct dsi_panel *panel,
  2789. struct device_node *parser_node)
  2790. {
  2791. struct dsi_parser_utils *utils = &panel->utils;
  2792. if (parser_node) {
  2793. *utils = *dsi_parser_get_parser_utils();
  2794. utils->data = parser_node;
  2795. DSI_DEBUG("switching to parser APIs\n");
  2796. goto end;
  2797. }
  2798. *utils = *dsi_parser_get_of_utils();
  2799. utils->data = panel->panel_of_node;
  2800. end:
  2801. utils->node = panel->panel_of_node;
  2802. }
  2803. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2804. {
  2805. return 0;
  2806. }
  2807. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2808. {
  2809. if (trusted_vm_env) {
  2810. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2811. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2812. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2813. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2814. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2815. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2816. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2817. } else {
  2818. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2819. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2820. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2821. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2822. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2823. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2824. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2825. }
  2826. }
  2827. struct dsi_panel *dsi_panel_get(struct device *parent,
  2828. struct device_node *of_node,
  2829. struct device_node *parser_node,
  2830. const char *type,
  2831. int topology_override,
  2832. bool trusted_vm_env)
  2833. {
  2834. struct dsi_panel *panel;
  2835. struct dsi_parser_utils *utils;
  2836. const char *panel_physical_type;
  2837. int rc = 0;
  2838. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2839. if (!panel)
  2840. return ERR_PTR(-ENOMEM);
  2841. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2842. panel->panel_of_node = of_node;
  2843. panel->parent = parent;
  2844. panel->type = type;
  2845. dsi_panel_update_util(panel, parser_node);
  2846. utils = &panel->utils;
  2847. panel->name = utils->get_property(utils->data,
  2848. "qcom,mdss-dsi-panel-name", NULL);
  2849. if (!panel->name)
  2850. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2851. /*
  2852. * Set panel type to LCD as default.
  2853. */
  2854. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2855. panel_physical_type = utils->get_property(utils->data,
  2856. "qcom,mdss-dsi-panel-physical-type", NULL);
  2857. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2858. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2859. rc = dsi_panel_parse_host_config(panel);
  2860. if (rc) {
  2861. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2862. rc);
  2863. goto error;
  2864. }
  2865. rc = dsi_panel_parse_panel_mode(panel);
  2866. if (rc) {
  2867. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2868. rc);
  2869. goto error;
  2870. }
  2871. rc = dsi_panel_parse_dfps_caps(panel);
  2872. if (rc)
  2873. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2874. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2875. if (rc)
  2876. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2877. /* allow qsync support only if DFPS is with VFP approach */
  2878. if ((panel->dfps_caps.dfps_support) &&
  2879. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2880. panel->qsync_min_fps = 0;
  2881. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2882. if (rc)
  2883. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2884. rc = dsi_panel_parse_phy_props(panel);
  2885. if (rc) {
  2886. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2887. rc);
  2888. goto error;
  2889. }
  2890. rc = panel->panel_ops.parse_gpios(panel);
  2891. if (rc) {
  2892. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2893. goto error;
  2894. }
  2895. rc = dsi_panel_parse_power_cfg(panel);
  2896. if (rc)
  2897. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2898. rc = dsi_panel_parse_bl_config(panel);
  2899. if (rc) {
  2900. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2901. if (rc == -EPROBE_DEFER)
  2902. goto error;
  2903. }
  2904. rc = dsi_panel_parse_misc_features(panel);
  2905. if (rc)
  2906. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2907. rc = dsi_panel_parse_hdr_config(panel);
  2908. if (rc)
  2909. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2910. rc = dsi_panel_get_mode_count(panel);
  2911. if (rc) {
  2912. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2913. goto error;
  2914. }
  2915. rc = dsi_panel_parse_dms_info(panel);
  2916. if (rc)
  2917. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2918. rc = dsi_panel_parse_esd_config(panel);
  2919. if (rc)
  2920. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2921. rc = dsi_panel_vreg_get(panel);
  2922. if (rc) {
  2923. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2924. panel->name, rc);
  2925. goto error;
  2926. }
  2927. panel->power_mode = SDE_MODE_DPMS_OFF;
  2928. drm_panel_init(&panel->drm_panel);
  2929. panel->drm_panel.dev = &panel->mipi_device.dev;
  2930. panel->mipi_device.dev.of_node = of_node;
  2931. rc = drm_panel_add(&panel->drm_panel);
  2932. if (rc)
  2933. goto error_vreg_put;
  2934. mutex_init(&panel->panel_lock);
  2935. return panel;
  2936. error_vreg_put:
  2937. (void)dsi_panel_vreg_put(panel);
  2938. error:
  2939. kfree(panel);
  2940. return ERR_PTR(rc);
  2941. }
  2942. void dsi_panel_put(struct dsi_panel *panel)
  2943. {
  2944. drm_panel_remove(&panel->drm_panel);
  2945. /* free resources allocated for ESD check */
  2946. dsi_panel_esd_config_deinit(&panel->esd_config);
  2947. kfree(panel);
  2948. }
  2949. int dsi_panel_drv_init(struct dsi_panel *panel,
  2950. struct mipi_dsi_host *host)
  2951. {
  2952. int rc = 0;
  2953. struct mipi_dsi_device *dev;
  2954. if (!panel || !host) {
  2955. DSI_ERR("invalid params\n");
  2956. return -EINVAL;
  2957. }
  2958. mutex_lock(&panel->panel_lock);
  2959. dev = &panel->mipi_device;
  2960. dev->host = host;
  2961. /*
  2962. * We dont have device structure since panel is not a device node.
  2963. * When using drm panel framework, the device is probed when the host is
  2964. * create.
  2965. */
  2966. dev->channel = 0;
  2967. dev->lanes = 4;
  2968. panel->host = host;
  2969. rc = panel->panel_ops.pinctrl_init(panel);
  2970. if (rc) {
  2971. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2972. panel->name, rc);
  2973. goto exit;
  2974. }
  2975. rc = panel->panel_ops.gpio_request(panel);
  2976. if (rc) {
  2977. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2978. rc);
  2979. goto error_pinctrl_deinit;
  2980. }
  2981. rc = panel->panel_ops.bl_register(panel);
  2982. if (rc) {
  2983. if (rc != -EPROBE_DEFER)
  2984. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2985. panel->name, rc);
  2986. goto error_gpio_release;
  2987. }
  2988. goto exit;
  2989. error_gpio_release:
  2990. (void)dsi_panel_gpio_release(panel);
  2991. error_pinctrl_deinit:
  2992. (void)dsi_panel_pinctrl_deinit(panel);
  2993. exit:
  2994. mutex_unlock(&panel->panel_lock);
  2995. return rc;
  2996. }
  2997. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2998. {
  2999. int rc = 0;
  3000. if (!panel) {
  3001. DSI_ERR("invalid params\n");
  3002. return -EINVAL;
  3003. }
  3004. mutex_lock(&panel->panel_lock);
  3005. rc = panel->panel_ops.bl_unregister(panel);
  3006. if (rc)
  3007. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3008. panel->name, rc);
  3009. rc = panel->panel_ops.gpio_release(panel);
  3010. if (rc)
  3011. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3012. rc);
  3013. rc = panel->panel_ops.pinctrl_deinit(panel);
  3014. if (rc)
  3015. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3016. rc);
  3017. rc = dsi_panel_vreg_put(panel);
  3018. if (rc)
  3019. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3020. panel->host = NULL;
  3021. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3022. mutex_unlock(&panel->panel_lock);
  3023. return rc;
  3024. }
  3025. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3026. struct dsi_display_mode *mode)
  3027. {
  3028. return 0;
  3029. }
  3030. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3031. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3032. {
  3033. const char *compression;
  3034. u32 *array = NULL, top_count, len, i;
  3035. int rc = -EINVAL;
  3036. bool dsc_enable = false;
  3037. *dsc_count = 0;
  3038. *lm_count = 0;
  3039. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3040. if (compression && !strcmp(compression, "dsc"))
  3041. dsc_enable = true;
  3042. len = utils->count_u32_elems(node, "qcom,display-topology");
  3043. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3044. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3045. return rc;
  3046. top_count = len / TOPOLOGY_SET_LEN;
  3047. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3048. if (!array)
  3049. return -ENOMEM;
  3050. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3051. if (rc) {
  3052. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3053. goto read_fail;
  3054. }
  3055. for (i = 0; i < top_count; i++) {
  3056. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3057. if (dsc_enable)
  3058. *dsc_count = max(*dsc_count,
  3059. array[i * TOPOLOGY_SET_LEN + 1]);
  3060. }
  3061. read_fail:
  3062. kfree(array);
  3063. return 0;
  3064. }
  3065. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3066. {
  3067. const u32 SINGLE_MODE_SUPPORT = 1;
  3068. struct dsi_parser_utils *utils;
  3069. struct device_node *timings_np, *child_np;
  3070. int num_dfps_rates, num_bit_clks;
  3071. int num_video_modes = 0, num_cmd_modes = 0;
  3072. int count, rc = 0;
  3073. u32 dsc_count = 0, lm_count = 0;
  3074. if (!panel) {
  3075. DSI_ERR("invalid params\n");
  3076. return -EINVAL;
  3077. }
  3078. utils = &panel->utils;
  3079. panel->num_timing_nodes = 0;
  3080. timings_np = utils->get_child_by_name(utils->data,
  3081. "qcom,mdss-dsi-display-timings");
  3082. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3083. DSI_ERR("no display timing nodes defined\n");
  3084. rc = -EINVAL;
  3085. goto error;
  3086. }
  3087. count = utils->get_child_count(timings_np);
  3088. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3089. count > DSI_MODE_MAX) {
  3090. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3091. rc = -EINVAL;
  3092. goto error;
  3093. }
  3094. /* No multiresolution support is available for video mode panels.
  3095. * Multi-mode is supported for video mode during POMS is enabled.
  3096. */
  3097. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3098. !panel->host_config.ext_bridge_mode &&
  3099. !panel->panel_mode_switch_enabled)
  3100. count = SINGLE_MODE_SUPPORT;
  3101. panel->num_timing_nodes = count;
  3102. dsi_for_each_child_node(timings_np, child_np) {
  3103. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3104. num_video_modes++;
  3105. else if (utils->read_bool(child_np,
  3106. "qcom,mdss-dsi-cmd-mode"))
  3107. num_cmd_modes++;
  3108. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3109. num_video_modes++;
  3110. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3111. num_cmd_modes++;
  3112. dsi_panel_get_max_res_count(utils, child_np,
  3113. &dsc_count, &lm_count);
  3114. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3115. panel->lm_count = max(lm_count, panel->lm_count);
  3116. }
  3117. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3118. panel->dfps_caps.dfps_list_len;
  3119. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3120. panel->dyn_clk_caps.bit_clk_list_len;
  3121. /*
  3122. * Inflate num_of_modes by fps and bit clks in dfps.
  3123. * Single command mode for video mode panels supporting
  3124. * panel operating mode switch.
  3125. */
  3126. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3127. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3128. (panel->panel_mode_switch_enabled))
  3129. num_cmd_modes = 1;
  3130. else
  3131. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3132. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3133. error:
  3134. return rc;
  3135. }
  3136. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3137. struct dsi_panel_phy_props *phy_props)
  3138. {
  3139. int rc = 0;
  3140. if (!panel || !phy_props) {
  3141. DSI_ERR("invalid params\n");
  3142. return -EINVAL;
  3143. }
  3144. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3145. return rc;
  3146. }
  3147. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3148. struct dsi_dfps_capabilities *dfps_caps)
  3149. {
  3150. int rc = 0;
  3151. if (!panel || !dfps_caps) {
  3152. DSI_ERR("invalid params\n");
  3153. return -EINVAL;
  3154. }
  3155. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3156. return rc;
  3157. }
  3158. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3159. {
  3160. int i;
  3161. if (!mode->priv_info)
  3162. return;
  3163. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3164. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3165. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3166. }
  3167. kfree(mode->priv_info);
  3168. }
  3169. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3170. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3171. {
  3172. u32 frame_time_us, nslices;
  3173. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3174. dsi_transfer_time_us, pixel_clk_khz;
  3175. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3176. struct dsi_mode_info *timing = &mode->timing;
  3177. struct dsi_display_mode *display_mode;
  3178. u32 jitter_numer, jitter_denom, prefill_lines;
  3179. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3180. u16 bpp;
  3181. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3182. * + 1 byte dcs data command.
  3183. */
  3184. const u32 packet_overhead = 56;
  3185. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3186. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3187. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3188. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3189. if (timing->refresh_rate >= 120)
  3190. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3191. if (timing->dsc_enabled) {
  3192. nslices = (timing->h_active)/(dsc->config.slice_width);
  3193. /* (slice width x bit-per-pixel + packet overhead) x
  3194. * number of slices x height x fps / lane
  3195. */
  3196. bpp = DSC_BPP(dsc->config);
  3197. bits_per_line = ((dsc->config.slice_width * bpp) +
  3198. packet_overhead) * nslices;
  3199. bits_per_line = bits_per_line / (config->num_data_lanes);
  3200. min_bitclk_hz = (bits_per_line * timing->v_active *
  3201. timing->refresh_rate);
  3202. } else {
  3203. total_active_pixels = ((dsi_h_active_dce(timing)
  3204. * timing->v_active));
  3205. /* calculate the actual bitclk needed to transfer the frame */
  3206. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3207. (config->bpp));
  3208. do_div(min_bitclk_hz, config->num_data_lanes);
  3209. }
  3210. timing->min_dsi_clk_hz = min_bitclk_hz;
  3211. min_threshold_us = mult_frac(frame_time_us,
  3212. jitter_numer, (jitter_denom * 100));
  3213. /*
  3214. * Increase the prefill_lines proportionately as recommended
  3215. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3216. */
  3217. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3218. timing->refresh_rate, 60);
  3219. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3220. (timing->v_active));
  3221. /*
  3222. * Threshold is sum of panel jitter time, prefill line time
  3223. * plus 64usec buffer time.
  3224. */
  3225. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3226. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3227. if (timing->clk_rate_hz) {
  3228. /* adjust the transfer time proportionately for bit clk*/
  3229. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3230. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3231. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3232. } else if (mode->priv_info->mdp_transfer_time_us) {
  3233. max_transfer_us = frame_time_us - min_threshold_us;
  3234. mode->priv_info->mdp_transfer_time_us = min(
  3235. mode->priv_info->mdp_transfer_time_us,
  3236. max_transfer_us);
  3237. timing->dsi_transfer_time_us =
  3238. mode->priv_info->mdp_transfer_time_us;
  3239. } else {
  3240. if (min_threshold_us > frame_threshold_us)
  3241. frame_threshold_us = min_threshold_us;
  3242. timing->dsi_transfer_time_us = frame_time_us -
  3243. frame_threshold_us;
  3244. }
  3245. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3246. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3247. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3248. timing->mdp_transfer_time_us =
  3249. mode->priv_info->mdp_transfer_time_us;
  3250. }
  3251. /* Calculate pclk_khz to update modeinfo */
  3252. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3253. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3254. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3255. do_div(pixel_clk_khz, config->bpp);
  3256. display_mode->pixel_clk_khz = pixel_clk_khz;
  3257. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3258. }
  3259. int dsi_panel_get_mode(struct dsi_panel *panel,
  3260. u32 index, struct dsi_display_mode *mode,
  3261. int topology_override)
  3262. {
  3263. struct device_node *timings_np, *child_np;
  3264. struct dsi_parser_utils *utils;
  3265. struct dsi_display_mode_priv_info *prv_info;
  3266. u32 child_idx = 0;
  3267. int rc = 0, num_timings;
  3268. int traffic_mode;
  3269. int panel_mode;
  3270. void *utils_data = NULL;
  3271. if (!panel || !mode) {
  3272. DSI_ERR("invalid params\n");
  3273. return -EINVAL;
  3274. }
  3275. mutex_lock(&panel->panel_lock);
  3276. utils = &panel->utils;
  3277. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3278. if (!mode->priv_info) {
  3279. rc = -ENOMEM;
  3280. goto done;
  3281. }
  3282. prv_info = mode->priv_info;
  3283. timings_np = utils->get_child_by_name(utils->data,
  3284. "qcom,mdss-dsi-display-timings");
  3285. if (!timings_np) {
  3286. DSI_ERR("no display timing nodes defined\n");
  3287. rc = -EINVAL;
  3288. goto parse_fail;
  3289. }
  3290. num_timings = utils->get_child_count(timings_np);
  3291. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3292. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3293. rc = -EINVAL;
  3294. goto parse_fail;
  3295. }
  3296. utils_data = utils->data;
  3297. traffic_mode = panel->video_config.traffic_mode;
  3298. panel_mode = panel->panel_mode;
  3299. dsi_for_each_child_node(timings_np, child_np) {
  3300. if (index != child_idx++)
  3301. continue;
  3302. utils->data = child_np;
  3303. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3304. if (rc) {
  3305. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3306. goto parse_fail;
  3307. }
  3308. rc = dsi_panel_parse_dsc_params(mode, utils);
  3309. if (rc) {
  3310. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3311. goto parse_fail;
  3312. }
  3313. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3314. panel_mode);
  3315. if (rc) {
  3316. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3317. goto parse_fail;
  3318. }
  3319. rc = dsi_panel_parse_topology(prv_info, utils,
  3320. topology_override);
  3321. if (rc) {
  3322. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3323. goto parse_fail;
  3324. }
  3325. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3326. if (rc) {
  3327. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3328. goto parse_fail;
  3329. }
  3330. rc = dsi_panel_parse_jitter_config(mode, utils);
  3331. if (rc)
  3332. DSI_ERR(
  3333. "failed to parse panel jitter config, rc=%d\n", rc);
  3334. rc = dsi_panel_parse_phy_timing(mode, utils);
  3335. if (rc) {
  3336. DSI_ERR(
  3337. "failed to parse panel phy timings, rc=%d\n", rc);
  3338. goto parse_fail;
  3339. }
  3340. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3341. if (rc)
  3342. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3343. if (panel->panel_mode_switch_enabled) {
  3344. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3345. if (rc) {
  3346. rc = 0;
  3347. mode->panel_mode = panel->panel_mode;
  3348. DSI_INFO(
  3349. "POMS: panel mode isn't specified in timing[%d]\n",
  3350. child_idx);
  3351. }
  3352. } else {
  3353. mode->panel_mode = panel->panel_mode;
  3354. }
  3355. }
  3356. goto done;
  3357. parse_fail:
  3358. kfree(mode->priv_info);
  3359. mode->priv_info = NULL;
  3360. done:
  3361. utils->data = utils_data;
  3362. mutex_unlock(&panel->panel_lock);
  3363. return rc;
  3364. }
  3365. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3366. struct dsi_display_mode *mode,
  3367. struct dsi_host_config *config)
  3368. {
  3369. int rc = 0;
  3370. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3371. if (!panel || !mode || !config) {
  3372. DSI_ERR("invalid params\n");
  3373. return -EINVAL;
  3374. }
  3375. mutex_lock(&panel->panel_lock);
  3376. config->panel_mode = panel->panel_mode;
  3377. memcpy(&config->common_config, &panel->host_config,
  3378. sizeof(config->common_config));
  3379. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3380. memcpy(&config->u.video_engine, &panel->video_config,
  3381. sizeof(config->u.video_engine));
  3382. } else {
  3383. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3384. sizeof(config->u.cmd_engine));
  3385. }
  3386. memcpy(&config->video_timing, &mode->timing,
  3387. sizeof(config->video_timing));
  3388. config->video_timing.mdp_transfer_time_us =
  3389. mode->priv_info->mdp_transfer_time_us;
  3390. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3391. config->video_timing.dsc = &mode->priv_info->dsc;
  3392. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3393. config->video_timing.vdc = &mode->priv_info->vdc;
  3394. if (dyn_clk_caps->dyn_clk_support)
  3395. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3396. else
  3397. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3398. config->esc_clk_rate_hz = 19200000;
  3399. mutex_unlock(&panel->panel_lock);
  3400. return rc;
  3401. }
  3402. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3403. {
  3404. int rc = 0;
  3405. if (!panel) {
  3406. DSI_ERR("invalid params\n");
  3407. return -EINVAL;
  3408. }
  3409. mutex_lock(&panel->panel_lock);
  3410. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3411. if (panel->lp11_init)
  3412. goto error;
  3413. rc = dsi_panel_power_on(panel);
  3414. if (rc) {
  3415. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3416. goto error;
  3417. }
  3418. error:
  3419. mutex_unlock(&panel->panel_lock);
  3420. return rc;
  3421. }
  3422. int dsi_panel_update_pps(struct dsi_panel *panel)
  3423. {
  3424. int rc = 0;
  3425. struct dsi_panel_cmd_set *set = NULL;
  3426. struct dsi_display_mode_priv_info *priv_info = NULL;
  3427. if (!panel || !panel->cur_mode) {
  3428. DSI_ERR("invalid params\n");
  3429. return -EINVAL;
  3430. }
  3431. mutex_lock(&panel->panel_lock);
  3432. priv_info = panel->cur_mode->priv_info;
  3433. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3434. if (priv_info->dsc_enabled)
  3435. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3436. panel->dce_pps_cmd, 0,
  3437. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3438. else if (priv_info->vdc_enabled)
  3439. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3440. panel->dce_pps_cmd, 0,
  3441. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3442. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3443. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3444. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3445. if (rc) {
  3446. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3447. goto error;
  3448. }
  3449. }
  3450. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3451. if (rc) {
  3452. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3453. panel->name, rc);
  3454. }
  3455. dsi_panel_destroy_cmd_packets(set);
  3456. error:
  3457. mutex_unlock(&panel->panel_lock);
  3458. return rc;
  3459. }
  3460. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3461. {
  3462. int rc = 0;
  3463. if (!panel) {
  3464. DSI_ERR("invalid params\n");
  3465. return -EINVAL;
  3466. }
  3467. mutex_lock(&panel->panel_lock);
  3468. if (!panel->panel_initialized)
  3469. goto exit;
  3470. /*
  3471. * Consider LP1->LP2->LP1.
  3472. * If the panel is already in LP mode, do not need to
  3473. * set the regulator.
  3474. * IBB and AB power mode would be set at the same time
  3475. * in PMIC driver, so we only call ibb setting that is enough.
  3476. */
  3477. if (dsi_panel_is_type_oled(panel) &&
  3478. panel->power_mode != SDE_MODE_DPMS_LP2)
  3479. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3480. "ibb", REGULATOR_MODE_IDLE);
  3481. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3482. if (rc)
  3483. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3484. panel->name, rc);
  3485. exit:
  3486. mutex_unlock(&panel->panel_lock);
  3487. return rc;
  3488. }
  3489. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3490. {
  3491. int rc = 0;
  3492. if (!panel) {
  3493. DSI_ERR("invalid params\n");
  3494. return -EINVAL;
  3495. }
  3496. mutex_lock(&panel->panel_lock);
  3497. if (!panel->panel_initialized)
  3498. goto exit;
  3499. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3500. if (rc)
  3501. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3502. panel->name, rc);
  3503. exit:
  3504. mutex_unlock(&panel->panel_lock);
  3505. return rc;
  3506. }
  3507. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3508. {
  3509. int rc = 0;
  3510. if (!panel) {
  3511. DSI_ERR("invalid params\n");
  3512. return -EINVAL;
  3513. }
  3514. mutex_lock(&panel->panel_lock);
  3515. if (!panel->panel_initialized)
  3516. goto exit;
  3517. /*
  3518. * Consider about LP1->LP2->NOLP.
  3519. */
  3520. if (dsi_panel_is_type_oled(panel) &&
  3521. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3522. panel->power_mode == SDE_MODE_DPMS_LP2))
  3523. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3524. "ibb", REGULATOR_MODE_NORMAL);
  3525. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3526. if (rc)
  3527. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3528. panel->name, rc);
  3529. exit:
  3530. mutex_unlock(&panel->panel_lock);
  3531. return rc;
  3532. }
  3533. int dsi_panel_prepare(struct dsi_panel *panel)
  3534. {
  3535. int rc = 0;
  3536. if (!panel) {
  3537. DSI_ERR("invalid params\n");
  3538. return -EINVAL;
  3539. }
  3540. mutex_lock(&panel->panel_lock);
  3541. if (panel->lp11_init) {
  3542. rc = dsi_panel_power_on(panel);
  3543. if (rc) {
  3544. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3545. panel->name, rc);
  3546. goto error;
  3547. }
  3548. }
  3549. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3550. if (rc) {
  3551. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3552. panel->name, rc);
  3553. goto error;
  3554. }
  3555. error:
  3556. mutex_unlock(&panel->panel_lock);
  3557. return rc;
  3558. }
  3559. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3560. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3561. {
  3562. static const int ROI_CMD_LEN = 5;
  3563. int rc = 0;
  3564. /* DTYPE_DCS_LWRITE */
  3565. char *caset, *paset;
  3566. set->cmds = NULL;
  3567. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3568. if (!caset) {
  3569. rc = -ENOMEM;
  3570. goto exit;
  3571. }
  3572. caset[0] = 0x2a;
  3573. caset[1] = (roi->x & 0xFF00) >> 8;
  3574. caset[2] = roi->x & 0xFF;
  3575. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3576. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3577. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3578. if (!paset) {
  3579. rc = -ENOMEM;
  3580. goto error_free_mem;
  3581. }
  3582. paset[0] = 0x2b;
  3583. paset[1] = (roi->y & 0xFF00) >> 8;
  3584. paset[2] = roi->y & 0xFF;
  3585. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3586. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3587. set->type = DSI_CMD_SET_ROI;
  3588. set->state = DSI_CMD_SET_STATE_LP;
  3589. set->count = 2; /* send caset + paset together */
  3590. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3591. if (!set->cmds) {
  3592. rc = -ENOMEM;
  3593. goto error_free_mem;
  3594. }
  3595. set->cmds[0].msg.channel = 0;
  3596. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3597. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3598. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3599. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3600. set->cmds[0].msg.tx_buf = caset;
  3601. set->cmds[0].msg.rx_len = 0;
  3602. set->cmds[0].msg.rx_buf = 0;
  3603. set->cmds[0].msg.wait_ms = 0;
  3604. set->cmds[0].last_command = 0;
  3605. set->cmds[0].post_wait_ms = 0;
  3606. set->cmds[1].msg.channel = 0;
  3607. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3608. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3609. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3610. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3611. set->cmds[1].msg.tx_buf = paset;
  3612. set->cmds[1].msg.rx_len = 0;
  3613. set->cmds[1].msg.rx_buf = 0;
  3614. set->cmds[1].msg.wait_ms = 0;
  3615. set->cmds[1].last_command = 1;
  3616. set->cmds[1].post_wait_ms = 0;
  3617. goto exit;
  3618. error_free_mem:
  3619. kfree(caset);
  3620. kfree(paset);
  3621. kfree(set->cmds);
  3622. exit:
  3623. return rc;
  3624. }
  3625. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3626. int ctrl_idx)
  3627. {
  3628. int rc = 0;
  3629. if (!panel) {
  3630. DSI_ERR("invalid params\n");
  3631. return -EINVAL;
  3632. }
  3633. mutex_lock(&panel->panel_lock);
  3634. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3635. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3636. if (rc)
  3637. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3638. panel->name, rc);
  3639. mutex_unlock(&panel->panel_lock);
  3640. return rc;
  3641. }
  3642. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3643. int ctrl_idx)
  3644. {
  3645. int rc = 0;
  3646. if (!panel) {
  3647. DSI_ERR("invalid params\n");
  3648. return -EINVAL;
  3649. }
  3650. mutex_lock(&panel->panel_lock);
  3651. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3652. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3653. if (rc)
  3654. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3655. panel->name, rc);
  3656. mutex_unlock(&panel->panel_lock);
  3657. return rc;
  3658. }
  3659. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3660. struct dsi_rect *roi)
  3661. {
  3662. int rc = 0;
  3663. struct dsi_panel_cmd_set *set;
  3664. struct dsi_display_mode_priv_info *priv_info;
  3665. if (!panel || !panel->cur_mode) {
  3666. DSI_ERR("Invalid params\n");
  3667. return -EINVAL;
  3668. }
  3669. priv_info = panel->cur_mode->priv_info;
  3670. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3671. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3672. if (rc) {
  3673. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3674. panel->name, rc);
  3675. return rc;
  3676. }
  3677. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3678. roi->x, roi->y, roi->w, roi->h);
  3679. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3680. mutex_lock(&panel->panel_lock);
  3681. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3682. if (rc)
  3683. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3684. panel->name, rc);
  3685. mutex_unlock(&panel->panel_lock);
  3686. dsi_panel_destroy_cmd_packets(set);
  3687. dsi_panel_dealloc_cmd_packets(set);
  3688. return rc;
  3689. }
  3690. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3691. {
  3692. int rc = 0;
  3693. if (!panel) {
  3694. DSI_ERR("Invalid params\n");
  3695. return -EINVAL;
  3696. }
  3697. mutex_lock(&panel->panel_lock);
  3698. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3699. if (rc)
  3700. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3701. panel->name, rc);
  3702. mutex_unlock(&panel->panel_lock);
  3703. return rc;
  3704. }
  3705. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3706. {
  3707. int rc = 0;
  3708. if (!panel) {
  3709. DSI_ERR("Invalid params\n");
  3710. return -EINVAL;
  3711. }
  3712. mutex_lock(&panel->panel_lock);
  3713. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3714. if (rc)
  3715. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3716. panel->name, rc);
  3717. mutex_unlock(&panel->panel_lock);
  3718. return rc;
  3719. }
  3720. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3721. {
  3722. int rc = 0;
  3723. if (!panel) {
  3724. DSI_ERR("Invalid params\n");
  3725. return -EINVAL;
  3726. }
  3727. mutex_lock(&panel->panel_lock);
  3728. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3729. if (rc)
  3730. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3731. panel->name, rc);
  3732. mutex_unlock(&panel->panel_lock);
  3733. return rc;
  3734. }
  3735. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3736. {
  3737. int rc = 0;
  3738. if (!panel) {
  3739. DSI_ERR("Invalid params\n");
  3740. return -EINVAL;
  3741. }
  3742. mutex_lock(&panel->panel_lock);
  3743. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3744. if (rc)
  3745. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3746. panel->name, rc);
  3747. mutex_unlock(&panel->panel_lock);
  3748. return rc;
  3749. }
  3750. int dsi_panel_switch(struct dsi_panel *panel)
  3751. {
  3752. int rc = 0;
  3753. if (!panel) {
  3754. DSI_ERR("Invalid params\n");
  3755. return -EINVAL;
  3756. }
  3757. mutex_lock(&panel->panel_lock);
  3758. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3759. if (rc)
  3760. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3761. panel->name, rc);
  3762. mutex_unlock(&panel->panel_lock);
  3763. return rc;
  3764. }
  3765. int dsi_panel_post_switch(struct dsi_panel *panel)
  3766. {
  3767. int rc = 0;
  3768. if (!panel) {
  3769. DSI_ERR("Invalid params\n");
  3770. return -EINVAL;
  3771. }
  3772. mutex_lock(&panel->panel_lock);
  3773. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3774. if (rc)
  3775. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3776. panel->name, rc);
  3777. mutex_unlock(&panel->panel_lock);
  3778. return rc;
  3779. }
  3780. int dsi_panel_enable(struct dsi_panel *panel)
  3781. {
  3782. int rc = 0;
  3783. if (!panel) {
  3784. DSI_ERR("Invalid params\n");
  3785. return -EINVAL;
  3786. }
  3787. mutex_lock(&panel->panel_lock);
  3788. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3789. if (rc)
  3790. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3791. panel->name, rc);
  3792. else
  3793. panel->panel_initialized = true;
  3794. mutex_unlock(&panel->panel_lock);
  3795. return rc;
  3796. }
  3797. int dsi_panel_post_enable(struct dsi_panel *panel)
  3798. {
  3799. int rc = 0;
  3800. if (!panel) {
  3801. DSI_ERR("invalid params\n");
  3802. return -EINVAL;
  3803. }
  3804. mutex_lock(&panel->panel_lock);
  3805. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3806. if (rc) {
  3807. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3808. panel->name, rc);
  3809. goto error;
  3810. }
  3811. error:
  3812. mutex_unlock(&panel->panel_lock);
  3813. return rc;
  3814. }
  3815. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3816. {
  3817. int rc = 0;
  3818. if (!panel) {
  3819. DSI_ERR("invalid params\n");
  3820. return -EINVAL;
  3821. }
  3822. mutex_lock(&panel->panel_lock);
  3823. if (gpio_is_valid(panel->bl_config.en_gpio))
  3824. gpio_set_value(panel->bl_config.en_gpio, 0);
  3825. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3826. if (rc) {
  3827. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3828. panel->name, rc);
  3829. goto error;
  3830. }
  3831. error:
  3832. mutex_unlock(&panel->panel_lock);
  3833. return rc;
  3834. }
  3835. int dsi_panel_disable(struct dsi_panel *panel)
  3836. {
  3837. int rc = 0;
  3838. if (!panel) {
  3839. DSI_ERR("invalid params\n");
  3840. return -EINVAL;
  3841. }
  3842. mutex_lock(&panel->panel_lock);
  3843. /* Avoid sending panel off commands when ESD recovery is underway */
  3844. if (!atomic_read(&panel->esd_recovery_pending)) {
  3845. /*
  3846. * Need to set IBB/AB regulator mode to STANDBY,
  3847. * if panel is going off from AOD mode.
  3848. */
  3849. if (dsi_panel_is_type_oled(panel) &&
  3850. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3851. panel->power_mode == SDE_MODE_DPMS_LP2))
  3852. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3853. "ibb", REGULATOR_MODE_STANDBY);
  3854. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3855. if (rc) {
  3856. /*
  3857. * Sending panel off commands may fail when DSI
  3858. * controller is in a bad state. These failures can be
  3859. * ignored since controller will go for full reset on
  3860. * subsequent display enable anyway.
  3861. */
  3862. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3863. panel->name, rc);
  3864. rc = 0;
  3865. }
  3866. }
  3867. panel->panel_initialized = false;
  3868. panel->power_mode = SDE_MODE_DPMS_OFF;
  3869. mutex_unlock(&panel->panel_lock);
  3870. return rc;
  3871. }
  3872. int dsi_panel_unprepare(struct dsi_panel *panel)
  3873. {
  3874. int rc = 0;
  3875. if (!panel) {
  3876. DSI_ERR("invalid params\n");
  3877. return -EINVAL;
  3878. }
  3879. mutex_lock(&panel->panel_lock);
  3880. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3881. if (rc) {
  3882. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3883. panel->name, rc);
  3884. goto error;
  3885. }
  3886. error:
  3887. mutex_unlock(&panel->panel_lock);
  3888. return rc;
  3889. }
  3890. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3891. {
  3892. int rc = 0;
  3893. if (!panel) {
  3894. DSI_ERR("invalid params\n");
  3895. return -EINVAL;
  3896. }
  3897. mutex_lock(&panel->panel_lock);
  3898. rc = dsi_panel_power_off(panel);
  3899. if (rc) {
  3900. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3901. panel->name, rc);
  3902. goto error;
  3903. }
  3904. error:
  3905. mutex_unlock(&panel->panel_lock);
  3906. return rc;
  3907. }