dsi_panel.c 120 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dbg.h"
  15. #include "sde_dsc_helper.h"
  16. #include "sde_vdc_helper.h"
  17. /**
  18. * topology is currently defined by a set of following 3 values:
  19. * 1. num of layer mixers
  20. * 2. num of compression encoders
  21. * 3. num of interfaces
  22. */
  23. #define TOPOLOGY_SET_LEN 3
  24. #define MAX_TOPOLOGY 5
  25. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  26. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  27. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  28. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  29. #define MAX_PANEL_JITTER 10
  30. #define DEFAULT_PANEL_PREFILL_LINES 25
  31. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  32. #define MIN_PREFILL_LINES 40
  33. #define RSCC_MODE_THRESHOLD_TIME_US 40
  34. #define DCS_COMMAND_THRESHOLD_TIME_US 40
  35. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  36. {
  37. char *bp;
  38. bp = buf;
  39. /* First 7 bytes are cmd header */
  40. *bp++ = 0x0A;
  41. *bp++ = 1;
  42. *bp++ = 0;
  43. *bp++ = 0;
  44. *bp++ = pps_delay_ms;
  45. *bp++ = 0;
  46. *bp++ = 128;
  47. }
  48. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  49. char *buf, int pps_id, u32 size)
  50. {
  51. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  52. buf += DSI_CMD_PPS_HDR_SIZE;
  53. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  54. size);
  55. }
  56. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  57. char *buf, int pps_id, u32 size)
  58. {
  59. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  60. buf += DSI_CMD_PPS_HDR_SIZE;
  61. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  62. size);
  63. }
  64. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  65. {
  66. int rc = 0;
  67. int i;
  68. struct regulator *vreg = NULL;
  69. for (i = 0; i < panel->power_info.count; i++) {
  70. vreg = devm_regulator_get(panel->parent,
  71. panel->power_info.vregs[i].vreg_name);
  72. rc = PTR_ERR_OR_ZERO(vreg);
  73. if (rc) {
  74. DSI_ERR("failed to get %s regulator\n",
  75. panel->power_info.vregs[i].vreg_name);
  76. goto error_put;
  77. }
  78. panel->power_info.vregs[i].vreg = vreg;
  79. }
  80. return rc;
  81. error_put:
  82. for (i = i - 1; i >= 0; i--) {
  83. devm_regulator_put(panel->power_info.vregs[i].vreg);
  84. panel->power_info.vregs[i].vreg = NULL;
  85. }
  86. return rc;
  87. }
  88. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  89. {
  90. int rc = 0;
  91. int i;
  92. for (i = panel->power_info.count - 1; i >= 0; i--)
  93. devm_regulator_put(panel->power_info.vregs[i].vreg);
  94. return rc;
  95. }
  96. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  97. {
  98. int rc = 0;
  99. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  100. if (gpio_is_valid(r_config->reset_gpio)) {
  101. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  102. if (rc) {
  103. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  104. goto error;
  105. }
  106. }
  107. if (gpio_is_valid(r_config->disp_en_gpio)) {
  108. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  109. if (rc) {
  110. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  111. goto error_release_reset;
  112. }
  113. }
  114. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  115. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  116. if (rc) {
  117. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  118. goto error_release_disp_en;
  119. }
  120. }
  121. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  122. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  123. if (rc) {
  124. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  125. goto error_release_mode_sel;
  126. }
  127. }
  128. if (gpio_is_valid(panel->panel_test_gpio)) {
  129. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  130. if (rc) {
  131. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  132. rc);
  133. panel->panel_test_gpio = -1;
  134. rc = 0;
  135. }
  136. }
  137. goto error;
  138. error_release_mode_sel:
  139. if (gpio_is_valid(panel->bl_config.en_gpio))
  140. gpio_free(panel->bl_config.en_gpio);
  141. error_release_disp_en:
  142. if (gpio_is_valid(r_config->disp_en_gpio))
  143. gpio_free(r_config->disp_en_gpio);
  144. error_release_reset:
  145. if (gpio_is_valid(r_config->reset_gpio))
  146. gpio_free(r_config->reset_gpio);
  147. error:
  148. return rc;
  149. }
  150. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  151. {
  152. int rc = 0;
  153. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  154. if (gpio_is_valid(r_config->reset_gpio))
  155. gpio_free(r_config->reset_gpio);
  156. if (gpio_is_valid(r_config->disp_en_gpio))
  157. gpio_free(r_config->disp_en_gpio);
  158. if (gpio_is_valid(panel->bl_config.en_gpio))
  159. gpio_free(panel->bl_config.en_gpio);
  160. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  161. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  162. if (gpio_is_valid(panel->panel_test_gpio))
  163. gpio_free(panel->panel_test_gpio);
  164. return rc;
  165. }
  166. static int dsi_panel_trigger_esd_attack_sub(int reset_gpio)
  167. {
  168. if (!gpio_is_valid(reset_gpio)) {
  169. DSI_INFO("failed to pull down the reset gpio\n");
  170. return -EINVAL;
  171. }
  172. gpio_set_value(reset_gpio, 0);
  173. SDE_EVT32(SDE_EVTLOG_FUNC_CASE1);
  174. DSI_INFO("GPIO pulled low to simulate ESD\n");
  175. return 0;
  176. }
  177. static int dsi_panel_vm_trigger_esd_attack(struct dsi_panel *panel)
  178. {
  179. struct dsi_parser_utils *utils = &panel->utils;
  180. int reset_gpio;
  181. int rc = 0;
  182. reset_gpio = utils->get_named_gpio(utils->data,
  183. "qcom,platform-reset-gpio", 0);
  184. if (!gpio_is_valid(reset_gpio)) {
  185. DSI_ERR("[%s] reset gpio not provided\n", panel->name);
  186. return -EINVAL;
  187. }
  188. rc = gpio_request(reset_gpio, "reset_gpio");
  189. if (rc) {
  190. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  191. return rc;
  192. }
  193. rc = dsi_panel_trigger_esd_attack_sub(reset_gpio);
  194. gpio_free(reset_gpio);
  195. return rc;
  196. }
  197. static int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  198. {
  199. struct dsi_panel_reset_config *r_config;
  200. if (!panel) {
  201. DSI_ERR("Invalid panel param\n");
  202. return -EINVAL;
  203. }
  204. r_config = &panel->reset_config;
  205. if (!r_config) {
  206. DSI_ERR("Invalid panel reset configuration\n");
  207. return -EINVAL;
  208. }
  209. return dsi_panel_trigger_esd_attack_sub(r_config->reset_gpio);
  210. }
  211. static int dsi_panel_reset(struct dsi_panel *panel)
  212. {
  213. int rc = 0;
  214. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  215. int i;
  216. if (!gpio_is_valid(r_config->reset_gpio))
  217. goto skip_reset_gpio;
  218. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  219. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  220. if (rc) {
  221. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  222. goto exit;
  223. }
  224. }
  225. if (r_config->count) {
  226. rc = gpio_direction_output(r_config->reset_gpio,
  227. r_config->sequence[0].level);
  228. if (rc) {
  229. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  230. goto exit;
  231. }
  232. }
  233. for (i = 0; i < r_config->count; i++) {
  234. gpio_set_value(r_config->reset_gpio,
  235. r_config->sequence[i].level);
  236. if (r_config->sequence[i].sleep_ms)
  237. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  238. (r_config->sequence[i].sleep_ms * 1000) + 100);
  239. }
  240. skip_reset_gpio:
  241. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  242. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  243. if (rc)
  244. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  245. }
  246. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  247. bool out = true;
  248. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  249. || (panel->reset_config.mode_sel_state
  250. == MODE_GPIO_LOW))
  251. out = false;
  252. else if ((panel->reset_config.mode_sel_state
  253. == MODE_SEL_SINGLE_PORT) ||
  254. (panel->reset_config.mode_sel_state
  255. == MODE_GPIO_HIGH))
  256. out = true;
  257. rc = gpio_direction_output(
  258. panel->reset_config.lcd_mode_sel_gpio, out);
  259. if (rc)
  260. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  261. }
  262. if (gpio_is_valid(panel->panel_test_gpio)) {
  263. rc = gpio_direction_input(panel->panel_test_gpio);
  264. if (rc)
  265. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  266. rc);
  267. }
  268. exit:
  269. return rc;
  270. }
  271. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  272. {
  273. int rc = 0;
  274. struct pinctrl_state *state;
  275. if (panel->host_config.ext_bridge_mode)
  276. return 0;
  277. if (!panel->pinctrl.pinctrl)
  278. return 0;
  279. if (enable)
  280. state = panel->pinctrl.active;
  281. else
  282. state = panel->pinctrl.suspend;
  283. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  284. if (rc)
  285. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  286. panel->name, rc);
  287. return rc;
  288. }
  289. static int dsi_panel_power_on(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  293. if (rc) {
  294. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  295. panel->name, rc);
  296. goto exit;
  297. }
  298. rc = dsi_panel_set_pinctrl_state(panel, true);
  299. if (rc) {
  300. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  301. goto error_disable_vregs;
  302. }
  303. rc = dsi_panel_reset(panel);
  304. if (rc) {
  305. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  306. goto error_disable_gpio;
  307. }
  308. goto exit;
  309. error_disable_gpio:
  310. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  311. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  312. if (gpio_is_valid(panel->bl_config.en_gpio))
  313. gpio_set_value(panel->bl_config.en_gpio, 0);
  314. (void)dsi_panel_set_pinctrl_state(panel, false);
  315. error_disable_vregs:
  316. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  317. exit:
  318. return rc;
  319. }
  320. static int dsi_panel_power_off(struct dsi_panel *panel)
  321. {
  322. int rc = 0;
  323. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  324. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  325. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  326. !panel->reset_gpio_always_on)
  327. gpio_set_value(panel->reset_config.reset_gpio, 0);
  328. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  329. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  330. if (gpio_is_valid(panel->panel_test_gpio)) {
  331. rc = gpio_direction_input(panel->panel_test_gpio);
  332. if (rc)
  333. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  334. rc);
  335. }
  336. rc = dsi_panel_set_pinctrl_state(panel, false);
  337. if (rc) {
  338. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  339. rc);
  340. }
  341. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  342. if (rc)
  343. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  344. panel->name, rc);
  345. return rc;
  346. }
  347. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  348. enum dsi_cmd_set_type type)
  349. {
  350. int rc = 0, i = 0;
  351. ssize_t len;
  352. struct dsi_cmd_desc *cmds;
  353. u32 count;
  354. enum dsi_cmd_set_state state;
  355. struct dsi_display_mode *mode;
  356. if (!panel || !panel->cur_mode)
  357. return -EINVAL;
  358. mode = panel->cur_mode;
  359. cmds = mode->priv_info->cmd_sets[type].cmds;
  360. count = mode->priv_info->cmd_sets[type].count;
  361. state = mode->priv_info->cmd_sets[type].state;
  362. SDE_EVT32(type, state, count);
  363. if (count == 0) {
  364. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  365. panel->name, type);
  366. goto error;
  367. }
  368. cmds->ctrl_flags = 0;
  369. for (i = 0; i < count; i++) {
  370. if (state == DSI_CMD_SET_STATE_LP)
  371. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  372. if (type == DSI_CMD_SET_VID_SWITCH_OUT)
  373. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  374. len = dsi_host_transfer_sub(panel->host, cmds);
  375. if (len < 0) {
  376. rc = len;
  377. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  378. goto error;
  379. }
  380. if (cmds->post_wait_ms)
  381. usleep_range(cmds->post_wait_ms*1000,
  382. ((cmds->post_wait_ms*1000)+10));
  383. cmds++;
  384. }
  385. error:
  386. return rc;
  387. }
  388. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  389. {
  390. int rc = 0;
  391. if (panel->host_config.ext_bridge_mode)
  392. return 0;
  393. devm_pinctrl_put(panel->pinctrl.pinctrl);
  394. return rc;
  395. }
  396. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  397. {
  398. int rc = 0;
  399. if (panel->host_config.ext_bridge_mode)
  400. return 0;
  401. /* TODO: pinctrl is defined in dsi dt node */
  402. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  403. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  404. rc = PTR_ERR(panel->pinctrl.pinctrl);
  405. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  406. goto error;
  407. }
  408. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  409. "panel_active");
  410. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  411. rc = PTR_ERR(panel->pinctrl.active);
  412. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  413. goto error;
  414. }
  415. panel->pinctrl.suspend =
  416. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  417. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  418. rc = PTR_ERR(panel->pinctrl.suspend);
  419. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  420. goto error;
  421. }
  422. panel->pinctrl.pwm_pin =
  423. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  424. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  425. panel->pinctrl.pwm_pin = NULL;
  426. DSI_DEBUG("failed to get pinctrl pwm_pin");
  427. }
  428. error:
  429. return rc;
  430. }
  431. static int dsi_panel_wled_register(struct dsi_panel *panel,
  432. struct dsi_backlight_config *bl)
  433. {
  434. struct backlight_device *bd;
  435. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  436. if (!bd) {
  437. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  438. panel->name, -EPROBE_DEFER);
  439. return -EPROBE_DEFER;
  440. }
  441. bl->raw_bd = bd;
  442. return 0;
  443. }
  444. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  445. u32 bl_lvl)
  446. {
  447. int rc = 0;
  448. unsigned long mode_flags = 0;
  449. struct mipi_dsi_device *dsi = NULL;
  450. if (!panel || (bl_lvl > 0xffff)) {
  451. DSI_ERR("invalid params\n");
  452. return -EINVAL;
  453. }
  454. dsi = &panel->mipi_device;
  455. if (unlikely(panel->bl_config.lp_mode)) {
  456. mode_flags = dsi->mode_flags;
  457. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  458. }
  459. if (panel->bl_config.bl_inverted_dbv)
  460. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  461. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  462. if (rc < 0)
  463. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  464. if (unlikely(panel->bl_config.lp_mode))
  465. dsi->mode_flags = mode_flags;
  466. return rc;
  467. }
  468. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  469. u32 bl_lvl)
  470. {
  471. int rc = 0;
  472. u32 duty = 0;
  473. u32 period_ns = 0;
  474. struct dsi_backlight_config *bl;
  475. if (!panel) {
  476. DSI_ERR("Invalid Params\n");
  477. return -EINVAL;
  478. }
  479. bl = &panel->bl_config;
  480. if (!bl->pwm_bl) {
  481. DSI_ERR("pwm device not found\n");
  482. return -EINVAL;
  483. }
  484. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  485. duty = bl_lvl * period_ns;
  486. duty /= bl->bl_max_level;
  487. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  488. if (rc) {
  489. DSI_ERR("[%s] failed to change pwm config, rc=%d\n", panel->name,
  490. rc);
  491. goto error;
  492. }
  493. if (bl_lvl == 0 && bl->pwm_enabled) {
  494. pwm_disable(bl->pwm_bl);
  495. bl->pwm_enabled = false;
  496. return 0;
  497. }
  498. if (bl_lvl != 0 && !bl->pwm_enabled) {
  499. rc = pwm_enable(bl->pwm_bl);
  500. if (rc) {
  501. DSI_ERR("[%s] failed to enable pwm, rc=%d\n", panel->name,
  502. rc);
  503. goto error;
  504. }
  505. bl->pwm_enabled = true;
  506. }
  507. error:
  508. return rc;
  509. }
  510. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  511. {
  512. int rc = 0;
  513. struct dsi_backlight_config *bl = &panel->bl_config;
  514. if (panel->host_config.ext_bridge_mode)
  515. return 0;
  516. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  517. switch (bl->type) {
  518. case DSI_BACKLIGHT_WLED:
  519. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  520. break;
  521. case DSI_BACKLIGHT_DCS:
  522. rc = dsi_panel_update_backlight(panel, bl_lvl);
  523. break;
  524. case DSI_BACKLIGHT_EXTERNAL:
  525. break;
  526. case DSI_BACKLIGHT_PWM:
  527. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  528. break;
  529. default:
  530. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  531. rc = -ENOTSUPP;
  532. }
  533. return rc;
  534. }
  535. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  536. {
  537. u32 cur_bl_level;
  538. struct backlight_device *bd = bl->raw_bd;
  539. /* default the brightness level to 50% */
  540. cur_bl_level = bl->bl_max_level >> 1;
  541. switch (bl->type) {
  542. case DSI_BACKLIGHT_WLED:
  543. /* Try to query the backlight level from the backlight device */
  544. if (bd->ops && bd->ops->get_brightness)
  545. cur_bl_level = bd->ops->get_brightness(bd);
  546. break;
  547. case DSI_BACKLIGHT_DCS:
  548. case DSI_BACKLIGHT_EXTERNAL:
  549. case DSI_BACKLIGHT_PWM:
  550. default:
  551. /*
  552. * Ideally, we should read the backlight level from the
  553. * panel. For now, just set it default value.
  554. */
  555. break;
  556. }
  557. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  558. return cur_bl_level;
  559. }
  560. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  561. {
  562. struct dsi_backlight_config *bl = &panel->bl_config;
  563. bl->bl_level = dsi_panel_get_brightness(bl);
  564. }
  565. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  566. {
  567. int rc = 0;
  568. struct dsi_backlight_config *bl = &panel->bl_config;
  569. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  570. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  571. rc = PTR_ERR(bl->pwm_bl);
  572. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  573. rc);
  574. return rc;
  575. }
  576. if (panel->pinctrl.pwm_pin) {
  577. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  578. panel->pinctrl.pwm_pin);
  579. if (rc)
  580. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  581. panel->name, rc);
  582. }
  583. return 0;
  584. }
  585. static int dsi_panel_bl_register(struct dsi_panel *panel)
  586. {
  587. int rc = 0;
  588. struct dsi_backlight_config *bl = &panel->bl_config;
  589. if (panel->host_config.ext_bridge_mode)
  590. return 0;
  591. switch (bl->type) {
  592. case DSI_BACKLIGHT_WLED:
  593. rc = dsi_panel_wled_register(panel, bl);
  594. break;
  595. case DSI_BACKLIGHT_DCS:
  596. break;
  597. case DSI_BACKLIGHT_EXTERNAL:
  598. break;
  599. case DSI_BACKLIGHT_PWM:
  600. rc = dsi_panel_pwm_register(panel);
  601. break;
  602. default:
  603. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  604. rc = -ENOTSUPP;
  605. goto error;
  606. }
  607. error:
  608. return rc;
  609. }
  610. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  611. {
  612. struct dsi_backlight_config *bl = &panel->bl_config;
  613. devm_pwm_put(panel->parent, bl->pwm_bl);
  614. }
  615. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  616. {
  617. int rc = 0;
  618. struct dsi_backlight_config *bl = &panel->bl_config;
  619. if (panel->host_config.ext_bridge_mode)
  620. return 0;
  621. switch (bl->type) {
  622. case DSI_BACKLIGHT_WLED:
  623. break;
  624. case DSI_BACKLIGHT_DCS:
  625. break;
  626. case DSI_BACKLIGHT_EXTERNAL:
  627. break;
  628. case DSI_BACKLIGHT_PWM:
  629. dsi_panel_pwm_unregister(panel);
  630. break;
  631. default:
  632. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  633. rc = -ENOTSUPP;
  634. goto error;
  635. }
  636. error:
  637. return rc;
  638. }
  639. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  640. struct dsi_parser_utils *utils)
  641. {
  642. int rc = 0;
  643. u64 tmp64 = 0;
  644. struct dsi_display_mode *display_mode;
  645. struct dsi_display_mode_priv_info *priv_info;
  646. display_mode = container_of(mode, struct dsi_display_mode, timing);
  647. priv_info = display_mode->priv_info;
  648. rc = utils->read_u64(utils->data,
  649. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  650. if (rc == -EOVERFLOW) {
  651. tmp64 = 0;
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  654. }
  655. mode->clk_rate_hz = !rc ? tmp64 : 0;
  656. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  657. mode->pclk_scale.numer = 1;
  658. mode->pclk_scale.denom = 1;
  659. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  660. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  661. &mode->mdp_transfer_time_us);
  662. if (!rc)
  663. display_mode->priv_info->mdp_transfer_time_us =
  664. mode->mdp_transfer_time_us;
  665. else
  666. display_mode->priv_info->mdp_transfer_time_us = 0;
  667. priv_info->disable_rsc_solver = utils->read_bool(utils->data, "qcom,disable-rsc-solver");
  668. rc = utils->read_u32(utils->data,
  669. "qcom,mdss-dsi-panel-framerate",
  670. &mode->refresh_rate);
  671. if (rc) {
  672. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  673. rc);
  674. goto error;
  675. }
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  677. &mode->h_active);
  678. if (rc) {
  679. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  680. rc);
  681. goto error;
  682. }
  683. rc = utils->read_u32(utils->data,
  684. "qcom,mdss-dsi-h-front-porch",
  685. &mode->h_front_porch);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. rc = utils->read_u32(utils->data,
  692. "qcom,mdss-dsi-h-back-porch",
  693. &mode->h_back_porch);
  694. if (rc) {
  695. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  696. rc);
  697. goto error;
  698. }
  699. rc = utils->read_u32(utils->data,
  700. "qcom,mdss-dsi-h-pulse-width",
  701. &mode->h_sync_width);
  702. if (rc) {
  703. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  704. rc);
  705. goto error;
  706. }
  707. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  708. &mode->h_skew);
  709. if (rc)
  710. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  711. rc);
  712. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  713. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  714. mode->h_sync_width);
  715. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  716. &mode->v_active);
  717. if (rc) {
  718. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  719. rc);
  720. goto error;
  721. }
  722. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  723. &mode->v_back_porch);
  724. if (rc) {
  725. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  726. rc);
  727. goto error;
  728. }
  729. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  730. &mode->v_front_porch);
  731. if (rc) {
  732. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  733. rc);
  734. goto error;
  735. }
  736. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  737. &mode->v_sync_width);
  738. if (rc) {
  739. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  740. rc);
  741. goto error;
  742. }
  743. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  744. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  745. mode->v_sync_width);
  746. error:
  747. return rc;
  748. }
  749. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  750. struct dsi_parser_utils *utils,
  751. const char *name)
  752. {
  753. int rc = 0;
  754. u32 bpp = 0;
  755. enum dsi_pixel_format fmt;
  756. const char *packing;
  757. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  758. if (rc) {
  759. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  760. name, rc);
  761. return rc;
  762. }
  763. host->bpp = bpp;
  764. switch (bpp) {
  765. case 3:
  766. fmt = DSI_PIXEL_FORMAT_RGB111;
  767. break;
  768. case 8:
  769. fmt = DSI_PIXEL_FORMAT_RGB332;
  770. break;
  771. case 12:
  772. fmt = DSI_PIXEL_FORMAT_RGB444;
  773. break;
  774. case 16:
  775. fmt = DSI_PIXEL_FORMAT_RGB565;
  776. break;
  777. case 18:
  778. fmt = DSI_PIXEL_FORMAT_RGB666;
  779. break;
  780. case 24:
  781. default:
  782. fmt = DSI_PIXEL_FORMAT_RGB888;
  783. break;
  784. }
  785. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  786. packing = utils->get_property(utils->data,
  787. "qcom,mdss-dsi-pixel-packing",
  788. NULL);
  789. if (packing && !strcmp(packing, "loose"))
  790. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  791. }
  792. host->dst_format = fmt;
  793. return rc;
  794. }
  795. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  796. struct dsi_parser_utils *utils,
  797. const char *name)
  798. {
  799. int rc = 0;
  800. bool lane_enabled;
  801. u32 num_of_lanes = 0;
  802. lane_enabled = utils->read_bool(utils->data,
  803. "qcom,mdss-dsi-lane-0-state");
  804. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  805. lane_enabled = utils->read_bool(utils->data,
  806. "qcom,mdss-dsi-lane-1-state");
  807. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  808. lane_enabled = utils->read_bool(utils->data,
  809. "qcom,mdss-dsi-lane-2-state");
  810. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  811. lane_enabled = utils->read_bool(utils->data,
  812. "qcom,mdss-dsi-lane-3-state");
  813. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  814. if (host->data_lanes & DSI_DATA_LANE_0)
  815. num_of_lanes++;
  816. if (host->data_lanes & DSI_DATA_LANE_1)
  817. num_of_lanes++;
  818. if (host->data_lanes & DSI_DATA_LANE_2)
  819. num_of_lanes++;
  820. if (host->data_lanes & DSI_DATA_LANE_3)
  821. num_of_lanes++;
  822. host->num_data_lanes = num_of_lanes;
  823. if (host->data_lanes == 0) {
  824. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  825. rc = -EINVAL;
  826. }
  827. return rc;
  828. }
  829. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  830. struct dsi_parser_utils *utils,
  831. const char *name)
  832. {
  833. int rc = 0;
  834. const char *swap_mode;
  835. swap_mode = utils->get_property(utils->data,
  836. "qcom,mdss-dsi-color-order", NULL);
  837. if (swap_mode) {
  838. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  839. host->swap_mode = DSI_COLOR_SWAP_RGB;
  840. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  841. host->swap_mode = DSI_COLOR_SWAP_RBG;
  842. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  843. host->swap_mode = DSI_COLOR_SWAP_BRG;
  844. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  845. host->swap_mode = DSI_COLOR_SWAP_GRB;
  846. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  847. host->swap_mode = DSI_COLOR_SWAP_GBR;
  848. } else {
  849. DSI_ERR("[%s] Unrecognized color order-%s\n",
  850. name, swap_mode);
  851. rc = -EINVAL;
  852. }
  853. } else {
  854. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  855. host->swap_mode = DSI_COLOR_SWAP_RGB;
  856. }
  857. /* bit swap on color channel is not defined in dt */
  858. host->bit_swap_red = false;
  859. host->bit_swap_green = false;
  860. host->bit_swap_blue = false;
  861. return rc;
  862. }
  863. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  864. struct dsi_parser_utils *utils,
  865. const char *name)
  866. {
  867. const char *trig;
  868. int rc = 0;
  869. trig = utils->get_property(utils->data,
  870. "qcom,mdss-dsi-mdp-trigger", NULL);
  871. if (trig) {
  872. if (!strcmp(trig, "none")) {
  873. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  874. } else if (!strcmp(trig, "trigger_te")) {
  875. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  876. } else if (!strcmp(trig, "trigger_sw")) {
  877. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  878. } else if (!strcmp(trig, "trigger_sw_te")) {
  879. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  880. } else {
  881. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  882. name, trig);
  883. rc = -EINVAL;
  884. }
  885. } else {
  886. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  887. name);
  888. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  889. }
  890. trig = utils->get_property(utils->data,
  891. "qcom,mdss-dsi-dma-trigger", NULL);
  892. if (trig) {
  893. if (!strcmp(trig, "none")) {
  894. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  895. } else if (!strcmp(trig, "trigger_te")) {
  896. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  897. } else if (!strcmp(trig, "trigger_sw")) {
  898. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  899. } else if (!strcmp(trig, "trigger_sw_seof")) {
  900. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  901. } else if (!strcmp(trig, "trigger_sw_te")) {
  902. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  903. } else {
  904. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  905. name, trig);
  906. rc = -EINVAL;
  907. }
  908. } else {
  909. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  910. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  911. }
  912. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  913. &host->te_mode);
  914. if (rc) {
  915. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  916. host->te_mode = 1;
  917. rc = 0;
  918. }
  919. return rc;
  920. }
  921. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  922. struct dsi_parser_utils *utils,
  923. const char *name)
  924. {
  925. u32 val = 0, line_no = 0, window = 0;
  926. int rc = 0;
  927. bool panel_cphy_mode = false;
  928. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  929. if (!rc) {
  930. host->t_clk_post = val;
  931. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  932. }
  933. val = 0;
  934. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  935. if (!rc) {
  936. host->t_clk_pre = val;
  937. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  938. }
  939. host->ignore_rx_eot = utils->read_bool(utils->data,
  940. "qcom,mdss-dsi-rx-eot-ignore");
  941. host->append_tx_eot = utils->read_bool(utils->data,
  942. "qcom,mdss-dsi-tx-eot-append");
  943. host->ext_bridge_mode = utils->read_bool(utils->data,
  944. "qcom,mdss-dsi-ext-bridge-mode");
  945. host->force_hs_clk_lane = utils->read_bool(utils->data,
  946. "qcom,mdss-dsi-force-clock-lane-hs");
  947. panel_cphy_mode = utils->read_bool(utils->data,
  948. "qcom,panel-cphy-mode");
  949. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  950. : DSI_PHY_TYPE_DPHY;
  951. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  952. &line_no);
  953. if (rc)
  954. host->dma_sched_line = 0;
  955. else
  956. host->dma_sched_line = line_no;
  957. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  958. &window);
  959. if (rc)
  960. host->dma_sched_window = 0;
  961. else
  962. host->dma_sched_window = window;
  963. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  964. host->dma_sched_line, host->dma_sched_window);
  965. return 0;
  966. }
  967. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  968. struct dsi_parser_utils *utils,
  969. const char *name)
  970. {
  971. int rc = 0;
  972. u32 val = 0;
  973. bool supported = false;
  974. struct dsi_split_link_config *split_link = &host->split_link;
  975. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  976. if (!supported) {
  977. DSI_DEBUG("[%s] Split link is not supported\n", name);
  978. split_link->enabled = false;
  979. return;
  980. }
  981. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  982. if (rc || val < 1) {
  983. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  984. split_link->num_sublinks = 2;
  985. } else {
  986. split_link->num_sublinks = val;
  987. }
  988. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  989. if (rc || val < 1) {
  990. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  991. split_link->lanes_per_sublink = 2;
  992. } else {
  993. split_link->lanes_per_sublink = val;
  994. }
  995. supported = utils->read_bool(utils->data, "qcom,split-link-sublink-swap");
  996. if (!supported)
  997. split_link->sublink_swap = false;
  998. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  999. split_link->num_sublinks, split_link->lanes_per_sublink);
  1000. split_link->enabled = true;
  1001. }
  1002. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  1003. {
  1004. int rc = 0;
  1005. struct dsi_parser_utils *utils = &panel->utils;
  1006. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  1007. panel->name);
  1008. if (rc) {
  1009. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  1010. panel->name, rc);
  1011. goto error;
  1012. }
  1013. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  1014. panel->name);
  1015. if (rc) {
  1016. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  1017. panel->name, rc);
  1018. goto error;
  1019. }
  1020. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  1021. panel->name);
  1022. if (rc) {
  1023. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  1024. panel->name, rc);
  1025. goto error;
  1026. }
  1027. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  1028. panel->name);
  1029. if (rc) {
  1030. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  1031. panel->name, rc);
  1032. goto error;
  1033. }
  1034. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1035. panel->name);
  1036. if (rc) {
  1037. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1038. panel->name, rc);
  1039. goto error;
  1040. }
  1041. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1042. panel->name);
  1043. error:
  1044. return rc;
  1045. }
  1046. static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
  1047. struct device_node *of_node)
  1048. {
  1049. struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
  1050. struct dsi_parser_utils *utils = &panel->utils;
  1051. int val, rc = 0;
  1052. val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
  1053. if (val <= 0) {
  1054. DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
  1055. return rc;
  1056. } else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
  1057. DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
  1058. val, panel->dfps_caps.dfps_list_len);
  1059. return -EINVAL;
  1060. }
  1061. avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
  1062. if (!avr_caps->avr_step_fps_list)
  1063. return -ENOMEM;
  1064. rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
  1065. avr_caps->avr_step_fps_list, val);
  1066. if (rc) {
  1067. kfree(avr_caps->avr_step_fps_list);
  1068. return rc;
  1069. }
  1070. avr_caps->avr_step_fps_list_len = val;
  1071. return rc;
  1072. }
  1073. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1074. struct device_node *of_node)
  1075. {
  1076. int rc = 0;
  1077. u32 val = 0, i;
  1078. struct dsi_qsync_capabilities *qsync_caps = &panel->qsync_caps;
  1079. struct dsi_parser_utils *utils = &panel->utils;
  1080. const char *name = panel->name;
  1081. /**
  1082. * "mdss-dsi-qsync-min-refresh-rate" is defined in cmd mode and
  1083. * video mode when there is only one qsync min fps present.
  1084. */
  1085. rc = of_property_read_u32(of_node,
  1086. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1087. &val);
  1088. if (rc)
  1089. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1090. panel->name, rc);
  1091. qsync_caps->qsync_min_fps = val;
  1092. /**
  1093. * "dsi-supported-qsync-min-fps-list" may be defined in video
  1094. * mode, only in dfps case when "qcom,dsi-supported-dfps-list"
  1095. * is defined.
  1096. */
  1097. qsync_caps->qsync_min_fps_list_len = utils->count_u32_elems(utils->data,
  1098. "qcom,dsi-supported-qsync-min-fps-list");
  1099. if (qsync_caps->qsync_min_fps_list_len < 1)
  1100. goto qsync_support;
  1101. /**
  1102. * qcom,dsi-supported-qsync-min-fps-list cannot be defined
  1103. * along with qcom,mdss-dsi-qsync-min-refresh-rate.
  1104. */
  1105. if (qsync_caps->qsync_min_fps_list_len >= 1 &&
  1106. qsync_caps->qsync_min_fps) {
  1107. DSI_ERR("[%s] Both qsync nodes are defined\n",
  1108. name);
  1109. rc = -EINVAL;
  1110. goto error;
  1111. }
  1112. if (panel->dfps_caps.dfps_list_len !=
  1113. qsync_caps->qsync_min_fps_list_len) {
  1114. DSI_ERR("[%s] Qsync min fps list mismatch with dfps\n", name);
  1115. rc = -EINVAL;
  1116. goto error;
  1117. }
  1118. qsync_caps->qsync_min_fps_list =
  1119. kcalloc(qsync_caps->qsync_min_fps_list_len, sizeof(u32),
  1120. GFP_KERNEL);
  1121. if (!qsync_caps->qsync_min_fps_list) {
  1122. rc = -ENOMEM;
  1123. goto error;
  1124. }
  1125. rc = utils->read_u32_array(utils->data,
  1126. "qcom,dsi-supported-qsync-min-fps-list",
  1127. qsync_caps->qsync_min_fps_list,
  1128. qsync_caps->qsync_min_fps_list_len);
  1129. if (rc) {
  1130. DSI_ERR("[%s] Qsync min fps list parse failed\n", name);
  1131. rc = -EINVAL;
  1132. goto error;
  1133. }
  1134. qsync_caps->qsync_min_fps = qsync_caps->qsync_min_fps_list[0];
  1135. for (i = 1; i < qsync_caps->qsync_min_fps_list_len; i++) {
  1136. if (qsync_caps->qsync_min_fps_list[i] <
  1137. qsync_caps->qsync_min_fps)
  1138. qsync_caps->qsync_min_fps =
  1139. qsync_caps->qsync_min_fps_list[i];
  1140. }
  1141. qsync_support:
  1142. /* allow qsync support only if DFPS is with VFP approach */
  1143. if ((panel->dfps_caps.dfps_support) &&
  1144. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  1145. panel->qsync_caps.qsync_min_fps = 0;
  1146. error:
  1147. if (rc < 0) {
  1148. qsync_caps->qsync_min_fps = 0;
  1149. qsync_caps->qsync_min_fps_list_len = 0;
  1150. }
  1151. return rc;
  1152. }
  1153. static int dsi_panel_parse_dyn_clk_list(struct dsi_display_mode *mode,
  1154. struct dsi_parser_utils *utils)
  1155. {
  1156. int i, rc = 0;
  1157. struct msm_dyn_clk_list *bit_clk_list;
  1158. if (!mode || !mode->priv_info) {
  1159. DSI_ERR("invalid arguments\n");
  1160. return -EINVAL;
  1161. }
  1162. bit_clk_list = &mode->priv_info->bit_clk_list;
  1163. bit_clk_list->count = utils->count_u32_elems(utils->data, "qcom,dsi-dyn-clk-list");
  1164. if (bit_clk_list->count < 1 || bit_clk_list->count > 100) {
  1165. DSI_ERR("invalid number of bit clock values, must be between 1 and 100\n");
  1166. return -EINVAL;
  1167. }
  1168. bit_clk_list->rates = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1169. if (!bit_clk_list->rates) {
  1170. DSI_ERR("failed to allocate space for bit clock list\n");
  1171. rc = -ENOMEM;
  1172. goto error;
  1173. }
  1174. bit_clk_list->front_porches = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1175. if (!bit_clk_list->front_porches) {
  1176. DSI_ERR("failed to allocate space for front porch list\n");
  1177. rc = -ENOMEM;
  1178. goto error;
  1179. }
  1180. bit_clk_list->pixel_clks_khz = kcalloc(bit_clk_list->count, sizeof(u32), GFP_KERNEL);
  1181. if (!bit_clk_list->pixel_clks_khz) {
  1182. DSI_ERR("failed to allocate space for pclk list\n");
  1183. rc = -ENOMEM;
  1184. goto error;
  1185. }
  1186. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1187. bit_clk_list->rates, bit_clk_list->count);
  1188. if (rc) {
  1189. DSI_ERR("failed to parse supported bit clk list values, rc=%d\n", rc);
  1190. goto error;
  1191. }
  1192. for (i = 0; i < bit_clk_list->count; i++)
  1193. DSI_DEBUG("bit clk rate[%d]:%d\n", i, bit_clk_list->rates[i]);
  1194. return 0;
  1195. error:
  1196. bit_clk_list->count = 0;
  1197. kfree(bit_clk_list->rates);
  1198. kfree(bit_clk_list->front_porches);
  1199. kfree(bit_clk_list->pixel_clks_khz);
  1200. return rc;
  1201. }
  1202. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1203. {
  1204. int rc = 0;
  1205. bool supported = false;
  1206. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1207. struct dsi_parser_utils *utils = &panel->utils;
  1208. const char *type;
  1209. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1210. if (!supported) {
  1211. dyn_clk_caps->dyn_clk_support = false;
  1212. return rc;
  1213. }
  1214. dyn_clk_caps->dyn_clk_support = true;
  1215. type = utils->get_property(utils->data,
  1216. "qcom,dsi-dyn-clk-type", NULL);
  1217. if (!type) {
  1218. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1219. dyn_clk_caps->maintain_const_fps = false;
  1220. return 0;
  1221. }
  1222. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1223. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1224. dyn_clk_caps->maintain_const_fps = true;
  1225. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1226. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1227. dyn_clk_caps->maintain_const_fps = true;
  1228. } else {
  1229. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1230. dyn_clk_caps->maintain_const_fps = false;
  1231. }
  1232. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1233. return 0;
  1234. }
  1235. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1236. {
  1237. int rc = 0;
  1238. bool supported = false;
  1239. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1240. struct dsi_parser_utils *utils = &panel->utils;
  1241. const char *name = panel->name;
  1242. const char *type;
  1243. u32 i;
  1244. supported = utils->read_bool(utils->data,
  1245. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1246. if (!supported) {
  1247. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1248. dfps_caps->dfps_support = false;
  1249. return rc;
  1250. }
  1251. type = utils->get_property(utils->data,
  1252. "qcom,mdss-dsi-pan-fps-update", NULL);
  1253. if (!type) {
  1254. DSI_ERR("[%s] dfps type not defined\n", name);
  1255. rc = -EINVAL;
  1256. goto error;
  1257. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1258. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1259. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1260. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1261. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1262. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1263. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1264. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1265. } else {
  1266. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1267. rc = -EINVAL;
  1268. goto error;
  1269. }
  1270. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1271. "qcom,dsi-supported-dfps-list");
  1272. if (dfps_caps->dfps_list_len < 1) {
  1273. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1274. rc = -EINVAL;
  1275. goto error;
  1276. }
  1277. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1278. GFP_KERNEL);
  1279. if (!dfps_caps->dfps_list) {
  1280. rc = -ENOMEM;
  1281. goto error;
  1282. }
  1283. rc = utils->read_u32_array(utils->data,
  1284. "qcom,dsi-supported-dfps-list",
  1285. dfps_caps->dfps_list,
  1286. dfps_caps->dfps_list_len);
  1287. if (rc) {
  1288. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1289. rc = -EINVAL;
  1290. goto error;
  1291. }
  1292. dfps_caps->dfps_support = true;
  1293. /* calculate max and min fps */
  1294. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1295. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1296. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1297. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1298. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1299. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1300. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1301. }
  1302. error:
  1303. return rc;
  1304. }
  1305. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1306. struct dsi_parser_utils *utils,
  1307. const char *name)
  1308. {
  1309. int rc = 0;
  1310. const char *traffic_mode;
  1311. u32 vc_id = 0;
  1312. u32 val = 0;
  1313. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1314. if (rc) {
  1315. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1316. cfg->pulse_mode_hsa_he = false;
  1317. } else if (val == 1) {
  1318. cfg->pulse_mode_hsa_he = true;
  1319. } else if (val == 0) {
  1320. cfg->pulse_mode_hsa_he = false;
  1321. } else {
  1322. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1323. name);
  1324. rc = -EINVAL;
  1325. goto error;
  1326. }
  1327. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1328. "qcom,mdss-dsi-hfp-power-mode");
  1329. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1330. "qcom,mdss-dsi-hbp-power-mode");
  1331. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1332. "qcom,mdss-dsi-hsa-power-mode");
  1333. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1334. "qcom,mdss-dsi-last-line-interleave");
  1335. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1336. "qcom,mdss-dsi-bllp-eof-power-mode");
  1337. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1338. "qcom,mdss-dsi-bllp-power-mode");
  1339. traffic_mode = utils->get_property(utils->data,
  1340. "qcom,mdss-dsi-traffic-mode",
  1341. NULL);
  1342. if (!traffic_mode) {
  1343. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1344. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1345. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1346. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1347. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1348. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1349. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1350. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1351. } else {
  1352. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1353. traffic_mode);
  1354. rc = -EINVAL;
  1355. goto error;
  1356. }
  1357. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1358. &vc_id);
  1359. if (rc) {
  1360. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1361. cfg->vc_id = 0;
  1362. } else {
  1363. cfg->vc_id = vc_id;
  1364. }
  1365. error:
  1366. return rc;
  1367. }
  1368. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1369. struct dsi_parser_utils *utils,
  1370. const char *name)
  1371. {
  1372. u32 val = 0;
  1373. int rc = 0;
  1374. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1375. if (rc) {
  1376. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1377. cfg->wr_mem_start = 0x2C;
  1378. } else {
  1379. cfg->wr_mem_start = val;
  1380. }
  1381. val = 0;
  1382. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1383. &val);
  1384. if (rc) {
  1385. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1386. cfg->wr_mem_continue = 0x3C;
  1387. } else {
  1388. cfg->wr_mem_continue = val;
  1389. }
  1390. /* TODO: fix following */
  1391. cfg->max_cmd_packets_interleave = 0;
  1392. val = 0;
  1393. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1394. &val);
  1395. if (rc) {
  1396. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1397. cfg->insert_dcs_command = true;
  1398. } else if (val == 1) {
  1399. cfg->insert_dcs_command = true;
  1400. } else if (val == 0) {
  1401. cfg->insert_dcs_command = false;
  1402. } else {
  1403. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1404. name);
  1405. rc = -EINVAL;
  1406. goto error;
  1407. }
  1408. cfg->mdp_idle_ctrl_en =
  1409. utils->read_bool(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-en");
  1410. if (cfg->mdp_idle_ctrl_en) {
  1411. val = 0;
  1412. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-mdp-idle-ctrl-len", &val);
  1413. if (rc) {
  1414. DSI_DEBUG("[%s] mdp idle ctrl len is not defined\n", name);
  1415. cfg->mdp_idle_ctrl_len = 0;
  1416. cfg->mdp_idle_ctrl_en = false;
  1417. rc = 0;
  1418. } else {
  1419. cfg->mdp_idle_ctrl_len = val;
  1420. }
  1421. }
  1422. error:
  1423. return rc;
  1424. }
  1425. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1426. {
  1427. int rc = 0;
  1428. struct dsi_parser_utils *utils = &panel->utils;
  1429. bool panel_mode_switch_enabled;
  1430. enum dsi_op_mode panel_mode;
  1431. const char *mode;
  1432. mode = utils->get_property(utils->data,
  1433. "qcom,mdss-dsi-panel-type", NULL);
  1434. if (!mode) {
  1435. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1436. panel_mode = DSI_OP_VIDEO_MODE;
  1437. } else if (!strcmp(mode, "dsi_video_mode")) {
  1438. panel_mode = DSI_OP_VIDEO_MODE;
  1439. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1440. panel_mode = DSI_OP_CMD_MODE;
  1441. } else {
  1442. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1443. rc = -EINVAL;
  1444. goto error;
  1445. }
  1446. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1447. "qcom,mdss-dsi-panel-mode-switch");
  1448. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1449. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1450. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1451. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1452. utils,
  1453. panel->name);
  1454. if (rc) {
  1455. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1456. panel->name, rc);
  1457. goto error;
  1458. }
  1459. }
  1460. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1461. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1462. utils,
  1463. panel->name);
  1464. if (rc) {
  1465. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1466. panel->name, rc);
  1467. goto error;
  1468. }
  1469. }
  1470. panel->poms_align_vsync = utils->read_bool(utils->data,
  1471. "qcom,poms-align-panel-vsync");
  1472. panel->panel_mode = panel_mode;
  1473. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1474. error:
  1475. return rc;
  1476. }
  1477. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1478. {
  1479. int rc = 0;
  1480. u32 val = 0;
  1481. const char *str;
  1482. struct dsi_panel_phy_props *props = &panel->phy_props;
  1483. struct dsi_parser_utils *utils = &panel->utils;
  1484. const char *name = panel->name;
  1485. rc = utils->read_u32(utils->data,
  1486. "qcom,mdss-pan-physical-width-dimension", &val);
  1487. if (rc) {
  1488. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1489. props->panel_width_mm = 0;
  1490. rc = 0;
  1491. } else {
  1492. props->panel_width_mm = val;
  1493. }
  1494. rc = utils->read_u32(utils->data,
  1495. "qcom,mdss-pan-physical-height-dimension",
  1496. &val);
  1497. if (rc) {
  1498. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1499. props->panel_height_mm = 0;
  1500. rc = 0;
  1501. } else {
  1502. props->panel_height_mm = val;
  1503. }
  1504. str = utils->get_property(utils->data,
  1505. "qcom,mdss-dsi-panel-orientation", NULL);
  1506. if (!str) {
  1507. props->rotation = DSI_PANEL_ROTATE_NONE;
  1508. } else if (!strcmp(str, "180")) {
  1509. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1510. } else if (!strcmp(str, "hflip")) {
  1511. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1512. } else if (!strcmp(str, "vflip")) {
  1513. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1514. } else {
  1515. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1516. rc = -EINVAL;
  1517. goto error;
  1518. }
  1519. error:
  1520. return rc;
  1521. }
  1522. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1523. "qcom,mdss-dsi-pre-on-command",
  1524. "qcom,mdss-dsi-on-command",
  1525. "qcom,vid-on-commands",
  1526. "qcom,cmd-on-commands",
  1527. "qcom,mdss-dsi-post-panel-on-command",
  1528. "qcom,mdss-dsi-pre-off-command",
  1529. "qcom,mdss-dsi-off-command",
  1530. "qcom,mdss-dsi-post-off-command",
  1531. "qcom,mdss-dsi-pre-res-switch",
  1532. "qcom,mdss-dsi-res-switch",
  1533. "qcom,mdss-dsi-post-res-switch",
  1534. "qcom,video-mode-switch-in-commands",
  1535. "qcom,video-mode-switch-out-commands",
  1536. "qcom,cmd-mode-switch-in-commands",
  1537. "qcom,cmd-mode-switch-out-commands",
  1538. "qcom,mdss-dsi-panel-status-command",
  1539. "qcom,mdss-dsi-lp1-command",
  1540. "qcom,mdss-dsi-lp2-command",
  1541. "qcom,mdss-dsi-nolp-command",
  1542. "PPS not parsed from DTSI, generated dynamically",
  1543. "ROI not parsed from DTSI, generated dynamically",
  1544. "qcom,mdss-dsi-timing-switch-command",
  1545. "qcom,mdss-dsi-post-mode-switch-on-command",
  1546. "qcom,mdss-dsi-qsync-on-commands",
  1547. "qcom,mdss-dsi-qsync-off-commands",
  1548. };
  1549. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1550. "qcom,mdss-dsi-pre-on-command-state",
  1551. "qcom,mdss-dsi-on-command-state",
  1552. "qcom,vid-on-commands-state",
  1553. "qcom,cmd-on-commands-state",
  1554. "qcom,mdss-dsi-post-on-command-state",
  1555. "qcom,mdss-dsi-pre-off-command-state",
  1556. "qcom,mdss-dsi-off-command-state",
  1557. "qcom,mdss-dsi-post-off-command-state",
  1558. "qcom,mdss-dsi-pre-res-switch-state",
  1559. "qcom,mdss-dsi-res-switch-state",
  1560. "qcom,mdss-dsi-post-res-switch-state",
  1561. "qcom,video-mode-switch-in-commands-state",
  1562. "qcom,video-mode-switch-out-commands-state",
  1563. "qcom,cmd-mode-switch-in-commands-state",
  1564. "qcom,cmd-mode-switch-out-commands-state",
  1565. "qcom,mdss-dsi-panel-status-command-state",
  1566. "qcom,mdss-dsi-lp1-command-state",
  1567. "qcom,mdss-dsi-lp2-command-state",
  1568. "qcom,mdss-dsi-nolp-command-state",
  1569. "PPS not parsed from DTSI, generated dynamically",
  1570. "ROI not parsed from DTSI, generated dynamically",
  1571. "qcom,mdss-dsi-timing-switch-command-state",
  1572. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1573. "qcom,mdss-dsi-qsync-on-commands-state",
  1574. "qcom,mdss-dsi-qsync-off-commands-state",
  1575. };
  1576. int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1577. {
  1578. const u32 cmd_set_min_size = 7;
  1579. u32 count = 0;
  1580. u32 packet_length;
  1581. u32 tmp;
  1582. while (length >= cmd_set_min_size) {
  1583. packet_length = cmd_set_min_size;
  1584. tmp = ((data[5] << 8) | (data[6]));
  1585. packet_length += tmp;
  1586. if (packet_length > length) {
  1587. DSI_ERR("format error\n");
  1588. return -EINVAL;
  1589. }
  1590. length -= packet_length;
  1591. data += packet_length;
  1592. count++;
  1593. }
  1594. *cnt = count;
  1595. return 0;
  1596. }
  1597. int dsi_panel_create_cmd_packets(const char *data,
  1598. u32 length,
  1599. u32 count,
  1600. struct dsi_cmd_desc *cmd)
  1601. {
  1602. int rc = 0;
  1603. int i, j;
  1604. u8 *payload;
  1605. for (i = 0; i < count; i++) {
  1606. u32 size;
  1607. cmd[i].msg.type = data[0];
  1608. cmd[i].msg.channel = data[2];
  1609. cmd[i].msg.flags |= data[3];
  1610. cmd[i].ctrl = 0;
  1611. cmd[i].post_wait_ms = data[4];
  1612. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1613. if (cmd[i].msg.flags & MIPI_DSI_MSG_BATCH_COMMAND)
  1614. cmd[i].last_command = false;
  1615. else
  1616. cmd[i].last_command = true;
  1617. size = cmd[i].msg.tx_len * sizeof(u8);
  1618. payload = kzalloc(size, GFP_KERNEL);
  1619. if (!payload) {
  1620. rc = -ENOMEM;
  1621. goto error_free_payloads;
  1622. }
  1623. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1624. payload[j] = data[7 + j];
  1625. cmd[i].msg.tx_buf = payload;
  1626. data += (7 + cmd[i].msg.tx_len);
  1627. }
  1628. return rc;
  1629. error_free_payloads:
  1630. for (i = i - 1; i >= 0; i--) {
  1631. cmd--;
  1632. kfree(cmd->msg.tx_buf);
  1633. }
  1634. return rc;
  1635. }
  1636. void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1637. {
  1638. u32 i = 0;
  1639. struct dsi_cmd_desc *cmd;
  1640. for (i = 0; i < set->count; i++) {
  1641. cmd = &set->cmds[i];
  1642. kfree(cmd->msg.tx_buf);
  1643. }
  1644. }
  1645. void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1646. {
  1647. kfree(set->cmds);
  1648. }
  1649. int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1650. u32 packet_count)
  1651. {
  1652. u32 size;
  1653. size = packet_count * sizeof(*cmd->cmds);
  1654. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1655. if (!cmd->cmds)
  1656. return -ENOMEM;
  1657. cmd->count = packet_count;
  1658. return 0;
  1659. }
  1660. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1661. enum dsi_cmd_set_type type,
  1662. struct dsi_parser_utils *utils)
  1663. {
  1664. int rc = 0;
  1665. u32 length = 0;
  1666. const char *data;
  1667. const char *state;
  1668. u32 packet_count = 0;
  1669. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1670. &length);
  1671. if (!data) {
  1672. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1673. rc = -ENOTSUPP;
  1674. goto error;
  1675. }
  1676. DSI_DEBUG("type=%d, name=%s, length=%d\n", type, cmd_set_prop_map[type], length);
  1677. print_hex_dump_debug("", DUMP_PREFIX_NONE, 8, 1, data, length, false);
  1678. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1679. if (rc) {
  1680. DSI_ERR("commands failed, rc=%d\n", rc);
  1681. goto error;
  1682. }
  1683. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1684. packet_count, length);
  1685. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1686. if (rc) {
  1687. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1688. goto error;
  1689. }
  1690. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1691. cmd->cmds);
  1692. if (rc) {
  1693. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1694. goto error_free_mem;
  1695. }
  1696. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1697. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1698. cmd->state = DSI_CMD_SET_STATE_LP;
  1699. } else if (!strcmp(state, "dsi_hs_mode")) {
  1700. cmd->state = DSI_CMD_SET_STATE_HS;
  1701. } else {
  1702. DSI_ERR("[%s] command state unrecognized-%s\n",
  1703. cmd_set_state_map[type], state);
  1704. goto error_free_mem;
  1705. }
  1706. return rc;
  1707. error_free_mem:
  1708. kfree(cmd->cmds);
  1709. cmd->cmds = NULL;
  1710. error:
  1711. return rc;
  1712. }
  1713. static int dsi_panel_parse_cmd_sets(
  1714. struct dsi_display_mode_priv_info *priv_info,
  1715. struct dsi_parser_utils *utils)
  1716. {
  1717. int rc = 0;
  1718. struct dsi_panel_cmd_set *set;
  1719. u32 i;
  1720. if (!priv_info) {
  1721. DSI_ERR("invalid mode priv info\n");
  1722. return -EINVAL;
  1723. }
  1724. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1725. set = &priv_info->cmd_sets[i];
  1726. set->type = i;
  1727. set->count = 0;
  1728. if (i == DSI_CMD_SET_PPS) {
  1729. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1730. if (rc)
  1731. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1732. i, rc);
  1733. set->state = DSI_CMD_SET_STATE_LP;
  1734. } else {
  1735. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1736. if (rc)
  1737. DSI_DEBUG("failed to parse set %d\n", i);
  1738. }
  1739. }
  1740. rc = 0;
  1741. return rc;
  1742. }
  1743. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1744. {
  1745. int rc = 0;
  1746. int i;
  1747. u32 length = 0;
  1748. u32 count = 0;
  1749. u32 size = 0;
  1750. u32 *arr_32 = NULL;
  1751. const u32 *arr;
  1752. struct dsi_parser_utils *utils = &panel->utils;
  1753. struct dsi_reset_seq *seq;
  1754. if (panel->host_config.ext_bridge_mode)
  1755. return 0;
  1756. arr = utils->get_property(utils->data,
  1757. "qcom,mdss-dsi-reset-sequence", &length);
  1758. if (!arr) {
  1759. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1760. rc = -EINVAL;
  1761. goto error;
  1762. }
  1763. if (length & 0x1) {
  1764. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1765. panel->name);
  1766. rc = -EINVAL;
  1767. goto error;
  1768. }
  1769. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1770. length = length / sizeof(u32);
  1771. size = length * sizeof(u32);
  1772. arr_32 = kzalloc(size, GFP_KERNEL);
  1773. if (!arr_32) {
  1774. rc = -ENOMEM;
  1775. goto error;
  1776. }
  1777. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1778. arr_32, length);
  1779. if (rc) {
  1780. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1781. goto error_free_arr_32;
  1782. }
  1783. count = length / 2;
  1784. size = count * sizeof(*seq);
  1785. seq = kzalloc(size, GFP_KERNEL);
  1786. if (!seq) {
  1787. rc = -ENOMEM;
  1788. goto error_free_arr_32;
  1789. }
  1790. panel->reset_config.sequence = seq;
  1791. panel->reset_config.count = count;
  1792. for (i = 0; i < length; i += 2) {
  1793. seq->level = arr_32[i];
  1794. seq->sleep_ms = arr_32[i + 1];
  1795. seq++;
  1796. }
  1797. error_free_arr_32:
  1798. kfree(arr_32);
  1799. error:
  1800. return rc;
  1801. }
  1802. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1803. {
  1804. struct dsi_parser_utils *utils = &panel->utils;
  1805. const char *string;
  1806. int i, rc = 0;
  1807. panel->ulps_feature_enabled =
  1808. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1809. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1810. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1811. panel->ulps_suspend_enabled =
  1812. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1813. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1814. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1815. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1816. "qcom,mdss-dsi-te-using-wd");
  1817. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1818. "qcom,cmd-sync-wait-broadcast");
  1819. panel->lp11_init = utils->read_bool(utils->data,
  1820. "qcom,mdss-dsi-lp11-init");
  1821. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1822. "qcom,platform-reset-gpio-always-on");
  1823. panel->spr_info.enable = false;
  1824. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1825. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1826. if (!rc) {
  1827. // find match for pack-type string
  1828. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1829. if (msm_spr_pack_type_str[i] &&
  1830. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1831. panel->spr_info.enable = true;
  1832. panel->spr_info.pack_type = i;
  1833. break;
  1834. }
  1835. }
  1836. }
  1837. pr_debug("%s source side spr packing, pack-type %s\n",
  1838. panel->spr_info.enable ? "enable" : "disable",
  1839. panel->spr_info.enable ?
  1840. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1841. return 0;
  1842. }
  1843. static int dsi_panel_parse_jitter_config(
  1844. struct dsi_display_mode *mode,
  1845. struct dsi_parser_utils *utils)
  1846. {
  1847. int rc;
  1848. struct dsi_display_mode_priv_info *priv_info;
  1849. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1850. u64 jitter_val = 0;
  1851. priv_info = mode->priv_info;
  1852. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1853. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1854. if (rc) {
  1855. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1856. } else {
  1857. jitter_val = jitter[0];
  1858. jitter_val = div_u64(jitter_val, jitter[1]);
  1859. }
  1860. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1861. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1862. priv_info->panel_jitter_denom =
  1863. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1864. } else {
  1865. priv_info->panel_jitter_numer = jitter[0];
  1866. priv_info->panel_jitter_denom = jitter[1];
  1867. }
  1868. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1869. &priv_info->panel_prefill_lines);
  1870. if (rc) {
  1871. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1872. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1873. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1874. } else if (priv_info->panel_prefill_lines >=
  1875. DSI_V_TOTAL(&mode->timing)) {
  1876. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1877. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1878. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1879. }
  1880. return 0;
  1881. }
  1882. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1883. {
  1884. int rc = 0;
  1885. char *supply_name;
  1886. if (panel->host_config.ext_bridge_mode)
  1887. return 0;
  1888. if (!strcmp(panel->type, "primary"))
  1889. supply_name = "qcom,panel-supply-entries";
  1890. else
  1891. supply_name = "qcom,panel-sec-supply-entries";
  1892. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1893. &panel->power_info, supply_name);
  1894. if (rc) {
  1895. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1896. goto error;
  1897. }
  1898. error:
  1899. return rc;
  1900. }
  1901. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1902. struct msm_io_res *io_res)
  1903. {
  1904. struct dsi_parser_utils *utils = &panel->utils;
  1905. struct list_head *mem_list = &io_res->mem;
  1906. int reset_gpio;
  1907. int rc = 0;
  1908. reset_gpio = utils->get_named_gpio(utils->data,
  1909. "qcom,platform-reset-gpio", 0);
  1910. if (gpio_is_valid(reset_gpio)) {
  1911. rc = msm_dss_get_gpio_io_mem(reset_gpio, mem_list);
  1912. if (rc) {
  1913. DSI_ERR("[%s] failed to retrieve the reset gpio address\n", panel->name);
  1914. goto end;
  1915. }
  1916. }
  1917. end:
  1918. return rc;
  1919. }
  1920. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1921. {
  1922. int rc = 0;
  1923. const char *data;
  1924. struct dsi_parser_utils *utils = &panel->utils;
  1925. char *reset_gpio_name, *mode_set_gpio_name;
  1926. if (!strcmp(panel->type, "primary")) {
  1927. reset_gpio_name = "qcom,platform-reset-gpio";
  1928. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1929. } else {
  1930. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1931. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1932. }
  1933. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1934. reset_gpio_name, 0);
  1935. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1936. !panel->host_config.ext_bridge_mode) {
  1937. DSI_DEBUG("[%s] reset gpio not set, rc=%d\n", panel->name,
  1938. panel->reset_config.reset_gpio);
  1939. }
  1940. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1941. "qcom,5v-boost-gpio",
  1942. 0);
  1943. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1944. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1945. panel->name, rc);
  1946. panel->reset_config.disp_en_gpio =
  1947. utils->get_named_gpio(utils->data,
  1948. "qcom,platform-en-gpio", 0);
  1949. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1950. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1951. panel->name, rc);
  1952. }
  1953. }
  1954. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1955. utils->data, mode_set_gpio_name, 0);
  1956. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1957. DSI_DEBUG("mode gpio not specified\n");
  1958. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1959. data = utils->get_property(utils->data,
  1960. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1961. if (data) {
  1962. if (!strcmp(data, "single_port"))
  1963. panel->reset_config.mode_sel_state =
  1964. MODE_SEL_SINGLE_PORT;
  1965. else if (!strcmp(data, "dual_port"))
  1966. panel->reset_config.mode_sel_state =
  1967. MODE_SEL_DUAL_PORT;
  1968. else if (!strcmp(data, "high"))
  1969. panel->reset_config.mode_sel_state =
  1970. MODE_GPIO_HIGH;
  1971. else if (!strcmp(data, "low"))
  1972. panel->reset_config.mode_sel_state =
  1973. MODE_GPIO_LOW;
  1974. } else {
  1975. /* Set default mode as SPLIT mode */
  1976. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1977. }
  1978. /* TODO: release memory */
  1979. rc = dsi_panel_parse_reset_sequence(panel);
  1980. if (rc) {
  1981. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1982. panel->name, rc);
  1983. goto error;
  1984. }
  1985. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1986. "qcom,mdss-dsi-panel-test-pin",
  1987. 0);
  1988. if (!gpio_is_valid(panel->panel_test_gpio))
  1989. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1990. __LINE__);
  1991. error:
  1992. return rc;
  1993. }
  1994. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1995. {
  1996. int rc = 0;
  1997. u32 val;
  1998. struct dsi_backlight_config *config = &panel->bl_config;
  1999. struct dsi_parser_utils *utils = &panel->utils;
  2000. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  2001. &val);
  2002. if (rc) {
  2003. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  2004. goto error;
  2005. }
  2006. config->pwm_period_usecs = val;
  2007. error:
  2008. return rc;
  2009. }
  2010. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  2011. {
  2012. int rc = 0;
  2013. u32 val = 0;
  2014. const char *bl_type = NULL;
  2015. const char *data = NULL;
  2016. const char *state = NULL;
  2017. struct dsi_parser_utils *utils = &panel->utils;
  2018. char *bl_name = NULL;
  2019. if (!strcmp(panel->type, "primary"))
  2020. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  2021. else
  2022. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  2023. bl_type = utils->get_property(utils->data, bl_name, NULL);
  2024. if (!bl_type) {
  2025. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2026. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  2027. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  2028. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  2029. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  2030. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  2031. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  2032. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  2033. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  2034. } else {
  2035. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  2036. panel->name, bl_type);
  2037. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  2038. }
  2039. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  2040. if (!data) {
  2041. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2042. } else if (!strcmp(data, "delay_until_first_frame")) {
  2043. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  2044. } else {
  2045. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  2046. panel->name, data);
  2047. panel->bl_config.bl_update = BL_UPDATE_NONE;
  2048. }
  2049. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  2050. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  2051. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  2052. if (rc) {
  2053. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  2054. panel->name);
  2055. panel->bl_config.bl_min_level = 0;
  2056. } else {
  2057. panel->bl_config.bl_min_level = val;
  2058. }
  2059. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  2060. if (rc) {
  2061. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  2062. panel->name);
  2063. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  2064. } else {
  2065. panel->bl_config.bl_max_level = val;
  2066. }
  2067. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  2068. &val);
  2069. if (rc) {
  2070. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  2071. panel->name);
  2072. panel->bl_config.brightness_max_level = 255;
  2073. rc = 0;
  2074. } else {
  2075. panel->bl_config.brightness_max_level = val;
  2076. }
  2077. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  2078. "qcom,mdss-dsi-bl-inverted-dbv");
  2079. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  2080. if (!state || !strcmp(state, "dsi_hs_mode"))
  2081. panel->bl_config.lp_mode = false;
  2082. else if (!strcmp(state, "dsi_lp_mode"))
  2083. panel->bl_config.lp_mode = true;
  2084. else
  2085. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  2086. state);
  2087. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  2088. rc = dsi_panel_parse_bl_pwm_config(panel);
  2089. if (rc) {
  2090. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  2091. panel->name, rc);
  2092. goto error;
  2093. }
  2094. }
  2095. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  2096. "qcom,platform-bklight-en-gpio",
  2097. 0);
  2098. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  2099. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  2100. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2101. panel->name, rc);
  2102. rc = -EPROBE_DEFER;
  2103. goto error;
  2104. } else {
  2105. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  2106. panel->name, rc);
  2107. rc = 0;
  2108. goto error;
  2109. }
  2110. }
  2111. error:
  2112. return rc;
  2113. }
  2114. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  2115. struct dsi_parser_utils *utils)
  2116. {
  2117. const char *data;
  2118. u32 len, i;
  2119. int rc = 0;
  2120. struct dsi_display_mode_priv_info *priv_info;
  2121. u64 pixel_clk_khz;
  2122. if (!mode || !mode->priv_info)
  2123. return -EINVAL;
  2124. priv_info = mode->priv_info;
  2125. data = utils->get_property(utils->data,
  2126. "qcom,mdss-dsi-panel-phy-timings", &len);
  2127. if (!data) {
  2128. DSI_DEBUG("Unable to read Phy timing settings\n");
  2129. } else {
  2130. priv_info->phy_timing_val =
  2131. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2132. if (!priv_info->phy_timing_val)
  2133. return -EINVAL;
  2134. for (i = 0; i < len; i++)
  2135. priv_info->phy_timing_val[i] = data[i];
  2136. priv_info->phy_timing_len = len;
  2137. }
  2138. if (mode->panel_mode_caps & DSI_OP_VIDEO_MODE) {
  2139. /*
  2140. * For command mode we update the pclk as part of
  2141. * function dsi_panel_calc_dsi_transfer_time( )
  2142. * as we set it based on dsi clock or mdp transfer time.
  2143. */
  2144. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2145. DSI_V_TOTAL(&mode->timing) *
  2146. mode->timing.refresh_rate);
  2147. do_div(pixel_clk_khz, 1000);
  2148. mode->pixel_clk_khz = pixel_clk_khz;
  2149. }
  2150. return rc;
  2151. }
  2152. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2153. struct dsi_parser_utils *utils)
  2154. {
  2155. u32 data;
  2156. int rc = -EINVAL;
  2157. int intf_width;
  2158. const char *compression;
  2159. struct dsi_display_mode_priv_info *priv_info;
  2160. if (!mode || !mode->priv_info)
  2161. return -EINVAL;
  2162. priv_info = mode->priv_info;
  2163. priv_info->dsc_enabled = false;
  2164. compression = utils->get_property(utils->data,
  2165. "qcom,compression-mode", NULL);
  2166. if (compression && !strcmp(compression, "dsc"))
  2167. priv_info->dsc_enabled = true;
  2168. if (!priv_info->dsc_enabled) {
  2169. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2170. return 0;
  2171. }
  2172. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2173. if (rc) {
  2174. priv_info->dsc.config.dsc_version_major = 0x1;
  2175. priv_info->dsc.config.dsc_version_minor = 0x1;
  2176. rc = 0;
  2177. } else {
  2178. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2179. * major version information
  2180. */
  2181. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2182. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2183. if ((priv_info->dsc.config.dsc_version_major != 0x1) ||
  2184. ((priv_info->dsc.config.dsc_version_minor
  2185. != 0x1) &&
  2186. (priv_info->dsc.config.dsc_version_minor
  2187. != 0x2))) {
  2188. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2189. __func__,
  2190. priv_info->dsc.config.dsc_version_major,
  2191. priv_info->dsc.config.dsc_version_minor
  2192. );
  2193. rc = -EINVAL;
  2194. goto error;
  2195. }
  2196. }
  2197. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2198. if (rc) {
  2199. priv_info->dsc.scr_rev = 0x0;
  2200. rc = 0;
  2201. } else {
  2202. priv_info->dsc.scr_rev = data & 0xff;
  2203. /* only one scr rev supported */
  2204. if (priv_info->dsc.scr_rev > 0x1) {
  2205. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2206. __func__, priv_info->dsc.scr_rev);
  2207. rc = -EINVAL;
  2208. goto error;
  2209. }
  2210. }
  2211. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2212. if (rc) {
  2213. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2214. goto error;
  2215. }
  2216. priv_info->dsc.config.slice_height = data;
  2217. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2218. if (rc) {
  2219. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2220. goto error;
  2221. }
  2222. priv_info->dsc.config.slice_width = data;
  2223. intf_width = mode->timing.h_active;
  2224. if (intf_width % priv_info->dsc.config.slice_width) {
  2225. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2226. intf_width, priv_info->dsc.config.slice_width);
  2227. rc = -EINVAL;
  2228. goto error;
  2229. }
  2230. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2231. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2232. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2233. if (rc) {
  2234. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2235. goto error;
  2236. } else if (!data || (data > 2)) {
  2237. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2238. goto error;
  2239. }
  2240. priv_info->dsc.slice_per_pkt = data;
  2241. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2242. &data);
  2243. if (rc) {
  2244. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2245. goto error;
  2246. }
  2247. priv_info->dsc.config.bits_per_component = data;
  2248. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2249. if (rc) {
  2250. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2251. data = 0;
  2252. }
  2253. priv_info->dsc.pps_delay_ms = data;
  2254. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2255. &data);
  2256. if (rc) {
  2257. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2258. goto error;
  2259. }
  2260. priv_info->dsc.config.bits_per_pixel = data << 4;
  2261. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2262. &data);
  2263. if (rc) {
  2264. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2265. rc = 0;
  2266. data = MSM_CHROMA_444;
  2267. }
  2268. priv_info->dsc.chroma_format = data;
  2269. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2270. &data);
  2271. if (rc) {
  2272. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2273. rc = 0;
  2274. data = MSM_RGB;
  2275. }
  2276. priv_info->dsc.source_color_space = data;
  2277. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2278. "qcom,mdss-dsc-block-prediction-enable");
  2279. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2280. priv_info->dsc.config.slice_width);
  2281. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2282. priv_info->dsc.scr_rev);
  2283. if (rc) {
  2284. DSI_DEBUG("failed populating dsc params\n");
  2285. rc = -EINVAL;
  2286. goto error;
  2287. }
  2288. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2289. if (rc) {
  2290. DSI_DEBUG("failed populating other dsc params\n");
  2291. rc = -EINVAL;
  2292. goto error;
  2293. }
  2294. priv_info->pclk_scale.numer =
  2295. priv_info->dsc.config.bits_per_pixel >> 4;
  2296. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2297. priv_info->dsc.chroma_format,
  2298. priv_info->dsc.config.bits_per_component);
  2299. mode->timing.dsc_enabled = true;
  2300. mode->timing.dsc = &priv_info->dsc;
  2301. mode->timing.pclk_scale = priv_info->pclk_scale;
  2302. error:
  2303. return rc;
  2304. }
  2305. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2306. struct dsi_parser_utils *utils, int traffic_mode)
  2307. {
  2308. u32 data;
  2309. int rc = -EINVAL;
  2310. const char *compression;
  2311. struct dsi_display_mode_priv_info *priv_info;
  2312. int intf_width;
  2313. if (!mode || !mode->priv_info)
  2314. return -EINVAL;
  2315. priv_info = mode->priv_info;
  2316. priv_info->vdc_enabled = false;
  2317. compression = utils->get_property(utils->data,
  2318. "qcom,compression-mode", NULL);
  2319. if (compression && !strcmp(compression, "vdc"))
  2320. priv_info->vdc_enabled = true;
  2321. if (!priv_info->vdc_enabled) {
  2322. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2323. return 0;
  2324. }
  2325. priv_info->vdc.traffic_mode = traffic_mode;
  2326. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2327. if (rc) {
  2328. priv_info->vdc.version_major = 0x1;
  2329. priv_info->vdc.version_minor = 0x2;
  2330. priv_info->vdc.version_release = 0x0;
  2331. rc = 0;
  2332. } else {
  2333. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2334. * major version information
  2335. */
  2336. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2337. priv_info->vdc.version_minor = data & 0x0F;
  2338. if ((priv_info->vdc.version_major != 0x1) &&
  2339. ((priv_info->vdc.version_minor
  2340. != 0x2))) {
  2341. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2342. __func__,
  2343. priv_info->vdc.version_major,
  2344. priv_info->vdc.version_minor
  2345. );
  2346. rc = -EINVAL;
  2347. goto error;
  2348. }
  2349. }
  2350. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2351. if (rc) {
  2352. priv_info->vdc.version_release = 0x0;
  2353. rc = 0;
  2354. } else {
  2355. priv_info->vdc.version_release = data & 0xff;
  2356. /* only one release version is supported */
  2357. if (priv_info->vdc.version_release != 0x0) {
  2358. DSI_ERR("unsupported vdc release version %d\n",
  2359. priv_info->vdc.version_release);
  2360. rc = -EINVAL;
  2361. goto error;
  2362. }
  2363. }
  2364. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2365. priv_info->vdc.version_major,
  2366. priv_info->vdc.version_minor,
  2367. priv_info->vdc.version_release);
  2368. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2369. if (rc) {
  2370. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2371. goto error;
  2372. }
  2373. priv_info->vdc.slice_height = data;
  2374. /* slice height should be atleast 16 lines */
  2375. if (priv_info->vdc.slice_height < 16) {
  2376. DSI_ERR("invalid slice height %d\n",
  2377. priv_info->vdc.slice_height);
  2378. rc = -EINVAL;
  2379. goto error;
  2380. }
  2381. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2382. if (rc) {
  2383. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2384. goto error;
  2385. }
  2386. priv_info->vdc.slice_width = data;
  2387. /*
  2388. * slide-width should be multiple of 8
  2389. * slice-width should be atlease 64 pixels
  2390. */
  2391. if ((priv_info->vdc.slice_width & 7) ||
  2392. (priv_info->vdc.slice_width < 64)) {
  2393. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2394. rc = -EINVAL;
  2395. goto error;
  2396. }
  2397. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2398. if (rc) {
  2399. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2400. goto error;
  2401. } else if (!data || (data > 2)) {
  2402. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2403. rc = -EINVAL;
  2404. goto error;
  2405. }
  2406. intf_width = mode->timing.h_active;
  2407. priv_info->vdc.slice_per_pkt = data;
  2408. priv_info->vdc.frame_width = mode->timing.h_active;
  2409. priv_info->vdc.frame_height = mode->timing.v_active;
  2410. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2411. &data);
  2412. if (rc) {
  2413. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2414. goto error;
  2415. }
  2416. priv_info->vdc.bits_per_component = data;
  2417. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2418. if (rc) {
  2419. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2420. data = 0;
  2421. }
  2422. priv_info->vdc.pps_delay_ms = data;
  2423. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2424. &data);
  2425. if (rc) {
  2426. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2427. goto error;
  2428. }
  2429. priv_info->vdc.bits_per_pixel = data << 4;
  2430. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2431. &data);
  2432. if (rc) {
  2433. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2434. rc = 0;
  2435. data = MSM_CHROMA_444;
  2436. }
  2437. priv_info->vdc.chroma_format = data;
  2438. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2439. &data);
  2440. if (rc) {
  2441. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2442. rc = 0;
  2443. data = MSM_RGB;
  2444. }
  2445. priv_info->vdc.source_color_space = data;
  2446. rc = sde_vdc_populate_config(&priv_info->vdc,
  2447. intf_width, traffic_mode);
  2448. if (rc) {
  2449. DSI_DEBUG("failed populating vdc config\n");
  2450. rc = -EINVAL;
  2451. goto error;
  2452. }
  2453. priv_info->pclk_scale.numer =
  2454. priv_info->vdc.bits_per_pixel >> 4;
  2455. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2456. priv_info->vdc.chroma_format,
  2457. priv_info->vdc.bits_per_component);
  2458. mode->timing.vdc_enabled = true;
  2459. mode->timing.vdc = &priv_info->vdc;
  2460. mode->timing.pclk_scale = priv_info->pclk_scale;
  2461. error:
  2462. return rc;
  2463. }
  2464. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2465. {
  2466. int rc = 0;
  2467. struct drm_panel_hdr_properties *hdr_prop;
  2468. struct dsi_parser_utils *utils = &panel->utils;
  2469. hdr_prop = &panel->hdr_props;
  2470. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2471. "qcom,mdss-dsi-panel-hdr-enabled");
  2472. if (hdr_prop->hdr_enabled) {
  2473. rc = utils->read_u32_array(utils->data,
  2474. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2475. hdr_prop->display_primaries,
  2476. DISPLAY_PRIMARIES_MAX);
  2477. if (rc) {
  2478. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2479. __func__, __LINE__, rc);
  2480. hdr_prop->hdr_enabled = false;
  2481. return rc;
  2482. }
  2483. rc = utils->read_u32(utils->data,
  2484. "qcom,mdss-dsi-panel-peak-brightness",
  2485. &(hdr_prop->peak_brightness));
  2486. if (rc) {
  2487. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2488. __func__, __LINE__, rc);
  2489. hdr_prop->hdr_enabled = false;
  2490. return rc;
  2491. }
  2492. rc = utils->read_u32(utils->data,
  2493. "qcom,mdss-dsi-panel-blackness-level",
  2494. &(hdr_prop->blackness_level));
  2495. if (rc) {
  2496. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2497. __func__, __LINE__, rc);
  2498. hdr_prop->hdr_enabled = false;
  2499. return rc;
  2500. }
  2501. }
  2502. return 0;
  2503. }
  2504. static int dsi_panel_parse_topology(
  2505. struct dsi_display_mode_priv_info *priv_info,
  2506. struct dsi_parser_utils *utils,
  2507. int topology_override)
  2508. {
  2509. struct msm_display_topology *topology;
  2510. u32 top_count, top_sel, *array = NULL;
  2511. int i, len = 0;
  2512. int rc = -EINVAL;
  2513. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2514. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2515. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2516. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2517. return rc;
  2518. }
  2519. top_count = len / TOPOLOGY_SET_LEN;
  2520. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2521. if (!array)
  2522. return -ENOMEM;
  2523. rc = utils->read_u32_array(utils->data,
  2524. "qcom,display-topology", array, len);
  2525. if (rc) {
  2526. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2527. goto read_fail;
  2528. }
  2529. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2530. if (!topology) {
  2531. rc = -ENOMEM;
  2532. goto read_fail;
  2533. }
  2534. for (i = 0; i < top_count; i++) {
  2535. struct msm_display_topology *top = &topology[i];
  2536. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2537. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2538. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2539. }
  2540. if (topology_override >= 0 && topology_override < top_count) {
  2541. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2542. topology_override,
  2543. topology[topology_override].num_lm,
  2544. topology[topology_override].num_enc,
  2545. topology[topology_override].num_intf);
  2546. top_sel = topology_override;
  2547. goto parse_done;
  2548. }
  2549. rc = utils->read_u32(utils->data,
  2550. "qcom,default-topology-index", &top_sel);
  2551. if (rc) {
  2552. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2553. goto parse_fail;
  2554. }
  2555. if (top_sel >= top_count) {
  2556. rc = -EINVAL;
  2557. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2558. rc);
  2559. goto parse_fail;
  2560. }
  2561. if (!(priv_info->dsc_enabled || priv_info->vdc_enabled) !=
  2562. !topology[top_sel].num_enc) {
  2563. DSI_ERR("topology and compression info mismatch dsc:%d vdc:%d num_enc:%d\n",
  2564. priv_info->dsc_enabled, priv_info->vdc_enabled,
  2565. topology[top_sel].num_enc);
  2566. goto parse_fail;
  2567. }
  2568. if (priv_info->dsc_enabled)
  2569. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_DSC;
  2570. else if (priv_info->vdc_enabled)
  2571. topology[top_sel].comp_type = MSM_DISPLAY_COMPRESSION_VDC;
  2572. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2573. topology[top_sel].num_lm,
  2574. topology[top_sel].num_enc,
  2575. topology[top_sel].num_intf);
  2576. parse_done:
  2577. memcpy(&priv_info->topology, &topology[top_sel],
  2578. sizeof(struct msm_display_topology));
  2579. parse_fail:
  2580. kfree(topology);
  2581. read_fail:
  2582. kfree(array);
  2583. return rc;
  2584. }
  2585. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2586. struct msm_roi_alignment *align)
  2587. {
  2588. int len = 0, rc = 0;
  2589. u32 value[6];
  2590. struct property *data;
  2591. if (!align)
  2592. return -EINVAL;
  2593. memset(align, 0, sizeof(*align));
  2594. data = utils->find_property(utils->data,
  2595. "qcom,panel-roi-alignment", &len);
  2596. len /= sizeof(u32);
  2597. if (!data) {
  2598. DSI_ERR("panel roi alignment not found\n");
  2599. rc = -EINVAL;
  2600. } else if (len != 6) {
  2601. DSI_ERR("incorrect roi alignment len %d\n", len);
  2602. rc = -EINVAL;
  2603. } else {
  2604. rc = utils->read_u32_array(utils->data,
  2605. "qcom,panel-roi-alignment", value, len);
  2606. if (rc)
  2607. DSI_DEBUG("error reading panel roi alignment values\n");
  2608. else {
  2609. align->xstart_pix_align = value[0];
  2610. align->ystart_pix_align = value[1];
  2611. align->width_pix_align = value[2];
  2612. align->height_pix_align = value[3];
  2613. align->min_width = value[4];
  2614. align->min_height = value[5];
  2615. }
  2616. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2617. align->xstart_pix_align,
  2618. align->width_pix_align,
  2619. align->ystart_pix_align,
  2620. align->height_pix_align,
  2621. align->min_width,
  2622. align->min_height);
  2623. }
  2624. return rc;
  2625. }
  2626. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2627. struct dsi_parser_utils *utils)
  2628. {
  2629. struct msm_roi_caps *roi_caps = NULL;
  2630. const char *data;
  2631. int rc = 0;
  2632. if (!mode || !mode->priv_info) {
  2633. DSI_ERR("invalid arguments\n");
  2634. return -EINVAL;
  2635. }
  2636. roi_caps = &mode->priv_info->roi_caps;
  2637. memset(roi_caps, 0, sizeof(*roi_caps));
  2638. data = utils->get_property(utils->data,
  2639. "qcom,partial-update-enabled", NULL);
  2640. if (data) {
  2641. if (!strcmp(data, "dual_roi"))
  2642. roi_caps->num_roi = 2;
  2643. else if (!strcmp(data, "single_roi"))
  2644. roi_caps->num_roi = 1;
  2645. else {
  2646. DSI_INFO(
  2647. "invalid value for qcom,partial-update-enabled: %s\n",
  2648. data);
  2649. return 0;
  2650. }
  2651. } else {
  2652. DSI_DEBUG("partial update disabled as the property is not set\n");
  2653. return 0;
  2654. }
  2655. roi_caps->merge_rois = utils->read_bool(utils->data,
  2656. "qcom,partial-update-roi-merge");
  2657. roi_caps->enabled = roi_caps->num_roi > 0;
  2658. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2659. roi_caps->enabled);
  2660. if (roi_caps->enabled)
  2661. rc = dsi_panel_parse_roi_alignment(utils,
  2662. &roi_caps->align);
  2663. if (rc)
  2664. memset(roi_caps, 0, sizeof(*roi_caps));
  2665. return rc;
  2666. }
  2667. static bool dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2668. struct dsi_parser_utils *utils)
  2669. {
  2670. if (!mode || !mode->priv_info) {
  2671. DSI_ERR("invalid arguments\n");
  2672. return false;
  2673. }
  2674. if (utils->read_bool(utils->data, "qcom,mdss-dsi-video-mode"))
  2675. mode->panel_mode_caps |= DSI_OP_VIDEO_MODE;
  2676. if (utils->read_bool(utils->data, "qcom,mdss-dsi-cmd-mode"))
  2677. mode->panel_mode_caps |= DSI_OP_CMD_MODE;
  2678. if (!mode->panel_mode_caps)
  2679. return false;
  2680. return true;
  2681. };
  2682. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2683. {
  2684. int dms_enabled;
  2685. const char *data;
  2686. struct dsi_parser_utils *utils = &panel->utils;
  2687. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2688. dms_enabled = utils->read_bool(utils->data,
  2689. "qcom,dynamic-mode-switch-enabled");
  2690. if (!dms_enabled)
  2691. return 0;
  2692. data = utils->get_property(utils->data,
  2693. "qcom,dynamic-mode-switch-type", NULL);
  2694. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2695. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2696. } else {
  2697. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2698. panel->name, data);
  2699. return -EINVAL;
  2700. }
  2701. return 0;
  2702. };
  2703. /*
  2704. * The length of all the valid values to be checked should not be greater
  2705. * than the length of returned data from read command.
  2706. */
  2707. static bool
  2708. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2709. {
  2710. int i;
  2711. struct drm_panel_esd_config *config = &panel->esd_config;
  2712. for (i = 0; i < count; ++i) {
  2713. if (config->status_valid_params[i] >
  2714. config->status_cmds_rlen[i]) {
  2715. DSI_DEBUG("ignore valid params\n");
  2716. return false;
  2717. }
  2718. }
  2719. return true;
  2720. }
  2721. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2722. char *prop_key, u32 **target, u32 cmd_cnt)
  2723. {
  2724. int tmp;
  2725. if (!utils->find_property(utils->data, prop_key, &tmp))
  2726. return false;
  2727. tmp /= sizeof(u32);
  2728. if (tmp != cmd_cnt) {
  2729. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2730. tmp, cmd_cnt);
  2731. return false;
  2732. }
  2733. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2734. if (IS_ERR_OR_NULL(*target)) {
  2735. DSI_ERR("Error allocating memory for property\n");
  2736. return false;
  2737. }
  2738. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2739. DSI_ERR("cannot get values from dts\n");
  2740. kfree(*target);
  2741. *target = NULL;
  2742. return false;
  2743. }
  2744. return true;
  2745. }
  2746. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2747. {
  2748. kfree(esd_config->status_buf);
  2749. kfree(esd_config->return_buf);
  2750. kfree(esd_config->status_value);
  2751. kfree(esd_config->status_valid_params);
  2752. kfree(esd_config->status_cmds_rlen);
  2753. kfree(esd_config->status_cmd.cmds);
  2754. }
  2755. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2756. {
  2757. struct drm_panel_esd_config *esd_config;
  2758. int rc = 0;
  2759. u32 tmp;
  2760. u32 i, status_len, *lenp;
  2761. struct property *data;
  2762. struct dsi_parser_utils *utils = &panel->utils;
  2763. if (!panel) {
  2764. DSI_ERR("Invalid Params\n");
  2765. return -EINVAL;
  2766. }
  2767. esd_config = &panel->esd_config;
  2768. if (!esd_config)
  2769. return -EINVAL;
  2770. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2771. DSI_CMD_SET_PANEL_STATUS, utils);
  2772. if (!esd_config->status_cmd.count) {
  2773. DSI_ERR("panel status command parsing failed\n");
  2774. rc = -EINVAL;
  2775. goto error;
  2776. }
  2777. if (!dsi_panel_parse_esd_status_len(utils,
  2778. "qcom,mdss-dsi-panel-status-read-length",
  2779. &panel->esd_config.status_cmds_rlen,
  2780. esd_config->status_cmd.count)) {
  2781. DSI_ERR("Invalid status read length\n");
  2782. rc = -EINVAL;
  2783. goto error1;
  2784. }
  2785. if (dsi_panel_parse_esd_status_len(utils,
  2786. "qcom,mdss-dsi-panel-status-valid-params",
  2787. &panel->esd_config.status_valid_params,
  2788. esd_config->status_cmd.count)) {
  2789. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2790. esd_config->status_cmd.count)) {
  2791. rc = -EINVAL;
  2792. goto error2;
  2793. }
  2794. }
  2795. status_len = 0;
  2796. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2797. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2798. status_len += lenp[i];
  2799. if (!status_len) {
  2800. rc = -EINVAL;
  2801. goto error2;
  2802. }
  2803. /*
  2804. * Some panel may need multiple read commands to properly
  2805. * check panel status. Do a sanity check for proper status
  2806. * value which will be compared with the value read by dsi
  2807. * controller during ESD check. Also check if multiple read
  2808. * commands are there then, there should be corresponding
  2809. * status check values for each read command.
  2810. */
  2811. data = utils->find_property(utils->data,
  2812. "qcom,mdss-dsi-panel-status-value", &tmp);
  2813. tmp /= sizeof(u32);
  2814. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2815. esd_config->groups = tmp / status_len;
  2816. } else {
  2817. DSI_ERR("error parse panel-status-value\n");
  2818. rc = -EINVAL;
  2819. goto error2;
  2820. }
  2821. esd_config->status_value =
  2822. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2823. GFP_KERNEL);
  2824. if (!esd_config->status_value) {
  2825. rc = -ENOMEM;
  2826. goto error2;
  2827. }
  2828. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2829. sizeof(unsigned char), GFP_KERNEL);
  2830. if (!esd_config->return_buf) {
  2831. rc = -ENOMEM;
  2832. goto error3;
  2833. }
  2834. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2835. if (!esd_config->status_buf) {
  2836. rc = -ENOMEM;
  2837. goto error4;
  2838. }
  2839. rc = utils->read_u32_array(utils->data,
  2840. "qcom,mdss-dsi-panel-status-value",
  2841. esd_config->status_value, esd_config->groups * status_len);
  2842. if (rc) {
  2843. DSI_DEBUG("error reading panel status values\n");
  2844. memset(esd_config->status_value, 0,
  2845. esd_config->groups * status_len);
  2846. }
  2847. return 0;
  2848. error4:
  2849. kfree(esd_config->return_buf);
  2850. error3:
  2851. kfree(esd_config->status_value);
  2852. error2:
  2853. kfree(esd_config->status_valid_params);
  2854. kfree(esd_config->status_cmds_rlen);
  2855. error1:
  2856. kfree(esd_config->status_cmd.cmds);
  2857. error:
  2858. return rc;
  2859. }
  2860. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2861. {
  2862. int rc = 0;
  2863. const char *string;
  2864. struct drm_panel_esd_config *esd_config;
  2865. struct dsi_parser_utils *utils = &panel->utils;
  2866. u8 *esd_mode = NULL;
  2867. esd_config = &panel->esd_config;
  2868. esd_config->status_mode = ESD_MODE_MAX;
  2869. esd_config->esd_enabled = utils->read_bool(utils->data,
  2870. "qcom,esd-check-enabled");
  2871. if (!esd_config->esd_enabled)
  2872. return 0;
  2873. rc = utils->read_string(utils->data,
  2874. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2875. if (!rc) {
  2876. if (!strcmp(string, "bta_check")) {
  2877. esd_config->status_mode = ESD_MODE_SW_BTA;
  2878. } else if (!strcmp(string, "reg_read")) {
  2879. esd_config->status_mode = ESD_MODE_REG_READ;
  2880. } else if (!strcmp(string, "te_signal_check")) {
  2881. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2882. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2883. } else {
  2884. DSI_ERR("TE-ESD not valid for video mode\n");
  2885. rc = -EINVAL;
  2886. goto error;
  2887. }
  2888. } else {
  2889. DSI_ERR("No valid panel-status-check-mode string\n");
  2890. rc = -EINVAL;
  2891. goto error;
  2892. }
  2893. } else {
  2894. DSI_DEBUG("status check method not defined!\n");
  2895. rc = -EINVAL;
  2896. goto error;
  2897. }
  2898. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2899. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2900. if (rc) {
  2901. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2902. rc);
  2903. goto error;
  2904. }
  2905. esd_mode = "register_read";
  2906. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2907. esd_mode = "bta_trigger";
  2908. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2909. esd_mode = "te_check";
  2910. }
  2911. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2912. return 0;
  2913. error:
  2914. panel->esd_config.esd_enabled = false;
  2915. return rc;
  2916. }
  2917. static void dsi_panel_update_util(struct dsi_panel *panel,
  2918. struct device_node *parser_node)
  2919. {
  2920. struct dsi_parser_utils *utils = &panel->utils;
  2921. if (parser_node) {
  2922. *utils = *dsi_parser_get_parser_utils();
  2923. utils->data = parser_node;
  2924. DSI_DEBUG("switching to parser APIs\n");
  2925. goto end;
  2926. }
  2927. *utils = *dsi_parser_get_of_utils();
  2928. utils->data = panel->panel_of_node;
  2929. end:
  2930. utils->node = panel->panel_of_node;
  2931. }
  2932. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2933. {
  2934. return 0;
  2935. }
  2936. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2937. {
  2938. if (trusted_vm_env) {
  2939. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2940. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2941. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2942. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2943. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2944. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2945. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2946. panel->panel_ops.parse_power_cfg = dsi_panel_vm_stub;
  2947. panel->panel_ops.trigger_esd_attack = dsi_panel_vm_trigger_esd_attack;
  2948. } else {
  2949. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2950. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2951. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2952. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2953. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2954. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2955. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2956. panel->panel_ops.parse_power_cfg = dsi_panel_parse_power_cfg;
  2957. panel->panel_ops.trigger_esd_attack = dsi_panel_trigger_esd_attack;
  2958. }
  2959. }
  2960. struct dsi_panel *dsi_panel_get(struct device *parent,
  2961. struct device_node *of_node,
  2962. struct device_node *parser_node,
  2963. const char *type,
  2964. int topology_override,
  2965. bool trusted_vm_env)
  2966. {
  2967. struct dsi_panel *panel;
  2968. struct dsi_parser_utils *utils;
  2969. const char *panel_physical_type;
  2970. int rc = 0;
  2971. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2972. if (!panel)
  2973. return ERR_PTR(-ENOMEM);
  2974. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2975. panel->panel_of_node = of_node;
  2976. panel->parent = parent;
  2977. panel->type = type;
  2978. dsi_panel_update_util(panel, parser_node);
  2979. utils = &panel->utils;
  2980. panel->name = utils->get_property(utils->data,
  2981. "qcom,mdss-dsi-panel-name", NULL);
  2982. if (!panel->name)
  2983. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2984. /*
  2985. * Set panel type to LCD as default.
  2986. */
  2987. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2988. panel_physical_type = utils->get_property(utils->data,
  2989. "qcom,mdss-dsi-panel-physical-type", NULL);
  2990. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2991. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2992. rc = dsi_panel_parse_host_config(panel);
  2993. if (rc) {
  2994. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2995. rc);
  2996. goto error;
  2997. }
  2998. rc = dsi_panel_parse_panel_mode(panel);
  2999. if (rc) {
  3000. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  3001. rc);
  3002. goto error;
  3003. }
  3004. rc = dsi_panel_parse_dfps_caps(panel);
  3005. if (rc)
  3006. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  3007. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  3008. if (rc)
  3009. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  3010. rc = dsi_panel_parse_avr_caps(panel, of_node);
  3011. if (rc)
  3012. DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
  3013. rc = dsi_panel_parse_dyn_clk_caps(panel);
  3014. if (rc)
  3015. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  3016. rc = dsi_panel_parse_phy_props(panel);
  3017. if (rc) {
  3018. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  3019. rc);
  3020. goto error;
  3021. }
  3022. rc = panel->panel_ops.parse_gpios(panel);
  3023. if (rc) {
  3024. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  3025. goto error;
  3026. }
  3027. rc = panel->panel_ops.parse_power_cfg(panel);
  3028. if (rc)
  3029. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  3030. rc = dsi_panel_parse_bl_config(panel);
  3031. if (rc) {
  3032. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  3033. if (rc == -EPROBE_DEFER)
  3034. goto error;
  3035. }
  3036. rc = dsi_panel_parse_misc_features(panel);
  3037. if (rc)
  3038. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  3039. rc = dsi_panel_parse_hdr_config(panel);
  3040. if (rc)
  3041. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  3042. rc = dsi_panel_get_mode_count(panel);
  3043. if (rc) {
  3044. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  3045. goto error;
  3046. }
  3047. rc = dsi_panel_parse_dms_info(panel);
  3048. if (rc)
  3049. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  3050. rc = dsi_panel_parse_esd_config(panel);
  3051. if (rc)
  3052. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  3053. rc = dsi_panel_vreg_get(panel);
  3054. if (rc) {
  3055. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  3056. panel->name, rc);
  3057. goto error;
  3058. }
  3059. panel->power_mode = SDE_MODE_DPMS_OFF;
  3060. drm_panel_init(&panel->drm_panel, &panel->mipi_device.dev,
  3061. NULL, DRM_MODE_CONNECTOR_DSI);
  3062. panel->mipi_device.dev.of_node = of_node;
  3063. drm_panel_add(&panel->drm_panel);
  3064. mutex_init(&panel->panel_lock);
  3065. return panel;
  3066. error:
  3067. kfree(panel);
  3068. return ERR_PTR(rc);
  3069. }
  3070. void dsi_panel_put(struct dsi_panel *panel)
  3071. {
  3072. drm_panel_remove(&panel->drm_panel);
  3073. /* free resources allocated for ESD check */
  3074. dsi_panel_esd_config_deinit(&panel->esd_config);
  3075. kfree(panel->avr_caps.avr_step_fps_list);
  3076. kfree(panel);
  3077. }
  3078. int dsi_panel_drv_init(struct dsi_panel *panel,
  3079. struct mipi_dsi_host *host)
  3080. {
  3081. int rc = 0;
  3082. struct mipi_dsi_device *dev;
  3083. if (!panel || !host) {
  3084. DSI_ERR("invalid params\n");
  3085. return -EINVAL;
  3086. }
  3087. mutex_lock(&panel->panel_lock);
  3088. dev = &panel->mipi_device;
  3089. dev->host = host;
  3090. /*
  3091. * We dont have device structure since panel is not a device node.
  3092. * When using drm panel framework, the device is probed when the host is
  3093. * create.
  3094. */
  3095. dev->channel = 0;
  3096. dev->lanes = 4;
  3097. panel->host = host;
  3098. rc = panel->panel_ops.pinctrl_init(panel);
  3099. if (rc) {
  3100. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  3101. panel->name, rc);
  3102. goto exit;
  3103. }
  3104. rc = panel->panel_ops.gpio_request(panel);
  3105. if (rc) {
  3106. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  3107. rc);
  3108. goto error_pinctrl_deinit;
  3109. }
  3110. rc = panel->panel_ops.bl_register(panel);
  3111. if (rc) {
  3112. if (rc != -EPROBE_DEFER)
  3113. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  3114. panel->name, rc);
  3115. goto error_gpio_release;
  3116. }
  3117. goto exit;
  3118. error_gpio_release:
  3119. (void)dsi_panel_gpio_release(panel);
  3120. error_pinctrl_deinit:
  3121. (void)dsi_panel_pinctrl_deinit(panel);
  3122. exit:
  3123. mutex_unlock(&panel->panel_lock);
  3124. return rc;
  3125. }
  3126. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  3127. {
  3128. int rc = 0;
  3129. if (!panel) {
  3130. DSI_ERR("invalid params\n");
  3131. return -EINVAL;
  3132. }
  3133. mutex_lock(&panel->panel_lock);
  3134. rc = panel->panel_ops.bl_unregister(panel);
  3135. if (rc)
  3136. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3137. panel->name, rc);
  3138. rc = panel->panel_ops.gpio_release(panel);
  3139. if (rc)
  3140. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3141. rc);
  3142. rc = panel->panel_ops.pinctrl_deinit(panel);
  3143. if (rc)
  3144. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3145. rc);
  3146. rc = dsi_panel_vreg_put(panel);
  3147. if (rc)
  3148. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3149. panel->host = NULL;
  3150. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3151. mutex_unlock(&panel->panel_lock);
  3152. return rc;
  3153. }
  3154. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3155. struct dsi_display_mode *mode)
  3156. {
  3157. return 0;
  3158. }
  3159. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3160. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3161. {
  3162. const char *compression;
  3163. u32 *array = NULL, top_count, len, i;
  3164. int rc = -EINVAL;
  3165. bool dsc_enable = false;
  3166. *dsc_count = 0;
  3167. *lm_count = 0;
  3168. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3169. if (compression && !strcmp(compression, "dsc"))
  3170. dsc_enable = true;
  3171. len = utils->count_u32_elems(node, "qcom,display-topology");
  3172. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3173. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3174. return rc;
  3175. top_count = len / TOPOLOGY_SET_LEN;
  3176. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3177. if (!array)
  3178. return -ENOMEM;
  3179. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3180. if (rc) {
  3181. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3182. goto read_fail;
  3183. }
  3184. for (i = 0; i < top_count; i++) {
  3185. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3186. if (dsc_enable)
  3187. *dsc_count = max(*dsc_count,
  3188. array[i * TOPOLOGY_SET_LEN + 1]);
  3189. }
  3190. read_fail:
  3191. kfree(array);
  3192. return 0;
  3193. }
  3194. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3195. {
  3196. const u32 SINGLE_MODE_SUPPORT = 1;
  3197. struct dsi_parser_utils *utils;
  3198. struct device_node *timings_np, *child_np;
  3199. int num_dfps_rates;
  3200. int num_video_modes = 0, num_cmd_modes = 0;
  3201. int count, rc = 0;
  3202. u32 dsc_count = 0, lm_count = 0;
  3203. if (!panel) {
  3204. DSI_ERR("invalid params\n");
  3205. return -EINVAL;
  3206. }
  3207. utils = &panel->utils;
  3208. panel->num_timing_nodes = 0;
  3209. timings_np = utils->get_child_by_name(utils->data,
  3210. "qcom,mdss-dsi-display-timings");
  3211. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3212. DSI_ERR("no display timing nodes defined\n");
  3213. rc = -EINVAL;
  3214. goto error;
  3215. }
  3216. count = utils->get_child_count(timings_np);
  3217. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3218. count > DSI_MODE_MAX) {
  3219. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3220. rc = -EINVAL;
  3221. goto error;
  3222. }
  3223. /* No multiresolution support is available for video mode panels.
  3224. * Multi-mode is supported for video mode during POMS is enabled.
  3225. */
  3226. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3227. !panel->host_config.ext_bridge_mode &&
  3228. !panel->panel_mode_switch_enabled)
  3229. count = SINGLE_MODE_SUPPORT;
  3230. panel->num_timing_nodes = count;
  3231. dsi_for_each_child_node(timings_np, child_np) {
  3232. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3233. num_video_modes++;
  3234. else if (utils->read_bool(child_np,
  3235. "qcom,mdss-dsi-cmd-mode"))
  3236. num_cmd_modes++;
  3237. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3238. num_video_modes++;
  3239. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3240. num_cmd_modes++;
  3241. dsi_panel_get_max_res_count(utils, child_np,
  3242. &dsc_count, &lm_count);
  3243. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3244. panel->lm_count = max(lm_count, panel->lm_count);
  3245. }
  3246. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3247. panel->dfps_caps.dfps_list_len;
  3248. /*
  3249. * Inflate num_of_modes by fps in dfps.
  3250. * Single command mode for video mode panels supporting
  3251. * panel operating mode switch.
  3252. */
  3253. num_video_modes = num_video_modes * num_dfps_rates;
  3254. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3255. (panel->panel_mode_switch_enabled))
  3256. num_cmd_modes = 1;
  3257. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3258. error:
  3259. return rc;
  3260. }
  3261. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3262. struct dsi_panel_phy_props *phy_props)
  3263. {
  3264. int rc = 0;
  3265. if (!panel || !phy_props) {
  3266. DSI_ERR("invalid params\n");
  3267. return -EINVAL;
  3268. }
  3269. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3270. return rc;
  3271. }
  3272. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3273. struct dsi_dfps_capabilities *dfps_caps)
  3274. {
  3275. int rc = 0;
  3276. if (!panel || !dfps_caps) {
  3277. DSI_ERR("invalid params\n");
  3278. return -EINVAL;
  3279. }
  3280. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3281. return rc;
  3282. }
  3283. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3284. {
  3285. int i;
  3286. if (!mode->priv_info)
  3287. return;
  3288. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3289. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3290. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3291. }
  3292. kfree(mode->priv_info);
  3293. }
  3294. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3295. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3296. {
  3297. u32 frame_time_us, nslices;
  3298. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3299. dsi_transfer_time_us, pixel_clk_khz;
  3300. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3301. struct dsi_mode_info *timing = &mode->timing;
  3302. struct dsi_display_mode *display_mode;
  3303. u32 jitter_numer, jitter_denom, prefill_lines;
  3304. u32 min_threshold_us, prefill_time_us, max_transfer_us, packet_overhead;
  3305. u16 bpp;
  3306. /* Packet overhead in bits,
  3307. * DPHY: 4 bytes header + 2 bytes checksum + 1 byte dcs data command.
  3308. * CPHY: 8 bytes header + 4 bytes checksum + 2 bytes SYNC +
  3309. * 1 byte dcs data command.
  3310. */
  3311. if (config->phy_type & DSI_PHY_TYPE_CPHY)
  3312. packet_overhead = 120;
  3313. else
  3314. packet_overhead = 56;
  3315. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3316. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3317. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3318. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3319. if (timing->refresh_rate >= 120)
  3320. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3321. if (timing->dsc_enabled) {
  3322. nslices = (timing->h_active)/(dsc->config.slice_width);
  3323. /* (slice width x bit-per-pixel + packet overhead) x
  3324. * number of slices x height x fps / lane
  3325. */
  3326. bpp = DSC_BPP(dsc->config);
  3327. bits_per_line = ((dsc->config.slice_width * bpp) +
  3328. packet_overhead) * nslices;
  3329. bits_per_line = bits_per_line / (config->num_data_lanes);
  3330. min_bitclk_hz = (bits_per_line * timing->v_active *
  3331. timing->refresh_rate);
  3332. } else {
  3333. total_active_pixels = ((dsi_h_active_dce(timing)
  3334. * timing->v_active));
  3335. /* calculate the actual bitclk needed to transfer the frame */
  3336. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3337. (config->bpp));
  3338. do_div(min_bitclk_hz, config->num_data_lanes);
  3339. }
  3340. timing->min_dsi_clk_hz = min_bitclk_hz;
  3341. /*
  3342. * Apart from prefill line time, we need to take into account RSCC mode threshold time. In
  3343. * cases where RSC is disabled, as jitter is no longer considered we need to make sure we
  3344. * have enough time for DCS command transfer. As of now, the RSC threshold time and DCS
  3345. * threshold time are configured to 40us.
  3346. */
  3347. if (mode->priv_info->disable_rsc_solver) {
  3348. min_threshold_us = DCS_COMMAND_THRESHOLD_TIME_US;
  3349. } else {
  3350. min_threshold_us = mult_frac(frame_time_us, jitter_numer, (jitter_denom * 100));
  3351. min_threshold_us += RSCC_MODE_THRESHOLD_TIME_US;
  3352. }
  3353. /*
  3354. * Increase the prefill_lines proportionately as recommended
  3355. * 40lines for 60fps, 60 for 90fps, 120lines for 120fps, and so on.
  3356. */
  3357. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3358. timing->refresh_rate, 60);
  3359. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3360. (timing->v_active));
  3361. min_threshold_us = min_threshold_us + prefill_time_us;
  3362. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3363. if (timing->clk_rate_hz) {
  3364. /* adjust the transfer time proportionately for bit clk*/
  3365. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3366. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3367. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3368. } else if (mode->priv_info->mdp_transfer_time_us) {
  3369. max_transfer_us = frame_time_us - min_threshold_us;
  3370. mode->priv_info->mdp_transfer_time_us = min(
  3371. mode->priv_info->mdp_transfer_time_us,
  3372. max_transfer_us);
  3373. timing->dsi_transfer_time_us =
  3374. mode->priv_info->mdp_transfer_time_us;
  3375. } else {
  3376. if ((min_threshold_us > frame_threshold_us) ||
  3377. (mode->priv_info->disable_rsc_solver))
  3378. frame_threshold_us = min_threshold_us;
  3379. timing->dsi_transfer_time_us = frame_time_us -
  3380. frame_threshold_us;
  3381. }
  3382. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3383. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3384. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3385. timing->mdp_transfer_time_us =
  3386. mode->priv_info->mdp_transfer_time_us;
  3387. }
  3388. /* Calculate pclk_khz to update modeinfo */
  3389. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3390. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3391. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3392. do_div(pixel_clk_khz, config->bpp);
  3393. display_mode->pixel_clk_khz = pixel_clk_khz;
  3394. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3395. }
  3396. int dsi_panel_get_mode(struct dsi_panel *panel,
  3397. u32 index, struct dsi_display_mode *mode,
  3398. int topology_override)
  3399. {
  3400. struct device_node *timings_np, *child_np;
  3401. struct dsi_parser_utils *utils;
  3402. struct dsi_display_mode_priv_info *prv_info;
  3403. u32 child_idx = 0;
  3404. int rc = 0, num_timings;
  3405. int traffic_mode;
  3406. void *utils_data = NULL;
  3407. if (!panel || !mode) {
  3408. DSI_ERR("invalid params\n");
  3409. return -EINVAL;
  3410. }
  3411. mutex_lock(&panel->panel_lock);
  3412. utils = &panel->utils;
  3413. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3414. if (!mode->priv_info) {
  3415. rc = -ENOMEM;
  3416. goto done;
  3417. }
  3418. prv_info = mode->priv_info;
  3419. timings_np = utils->get_child_by_name(utils->data,
  3420. "qcom,mdss-dsi-display-timings");
  3421. if (!timings_np) {
  3422. DSI_ERR("no display timing nodes defined\n");
  3423. rc = -EINVAL;
  3424. goto parse_fail;
  3425. }
  3426. num_timings = utils->get_child_count(timings_np);
  3427. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3428. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3429. rc = -EINVAL;
  3430. goto parse_fail;
  3431. }
  3432. utils_data = utils->data;
  3433. traffic_mode = panel->video_config.traffic_mode;
  3434. dsi_for_each_child_node(timings_np, child_np) {
  3435. if (index != child_idx++)
  3436. continue;
  3437. utils->data = child_np;
  3438. if (panel->panel_mode_switch_enabled) {
  3439. if (!dsi_panel_parse_panel_mode_caps(mode, utils)) {
  3440. mode->panel_mode_caps = panel->panel_mode;
  3441. DSI_INFO("panel mode isn't specified in timing[%d]\n",
  3442. child_idx);
  3443. }
  3444. } else {
  3445. mode->panel_mode_caps = panel->panel_mode;
  3446. }
  3447. rc = utils->read_u32(utils->data, "cell-index", &mode->mode_idx);
  3448. if (rc)
  3449. mode->mode_idx = index;
  3450. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3451. if (rc) {
  3452. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3453. goto parse_fail;
  3454. }
  3455. if (panel->dyn_clk_caps.dyn_clk_support) {
  3456. rc = dsi_panel_parse_dyn_clk_list(mode, utils);
  3457. if (rc)
  3458. DSI_ERR("failed to parse dynamic clk rates, rc=%d\n", rc);
  3459. }
  3460. rc = dsi_panel_parse_dsc_params(mode, utils);
  3461. if (rc) {
  3462. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3463. goto parse_fail;
  3464. }
  3465. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode);
  3466. if (rc) {
  3467. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3468. goto parse_fail;
  3469. }
  3470. rc = dsi_panel_parse_topology(prv_info, utils,
  3471. topology_override);
  3472. if (rc) {
  3473. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3474. goto parse_fail;
  3475. }
  3476. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3477. if (rc) {
  3478. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3479. goto parse_fail;
  3480. }
  3481. rc = dsi_panel_parse_jitter_config(mode, utils);
  3482. if (rc)
  3483. DSI_ERR(
  3484. "failed to parse panel jitter config, rc=%d\n", rc);
  3485. rc = dsi_panel_parse_phy_timing(mode, utils);
  3486. if (rc) {
  3487. DSI_ERR(
  3488. "failed to parse panel phy timings, rc=%d\n", rc);
  3489. goto parse_fail;
  3490. }
  3491. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3492. if (rc)
  3493. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3494. }
  3495. goto done;
  3496. parse_fail:
  3497. kfree(mode->priv_info);
  3498. mode->priv_info = NULL;
  3499. done:
  3500. utils->data = utils_data;
  3501. mutex_unlock(&panel->panel_lock);
  3502. return rc;
  3503. }
  3504. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3505. struct dsi_display_mode *mode,
  3506. struct dsi_host_config *config)
  3507. {
  3508. int rc = 0;
  3509. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3510. if (!panel || !mode || !config) {
  3511. DSI_ERR("invalid params\n");
  3512. return -EINVAL;
  3513. }
  3514. mutex_lock(&panel->panel_lock);
  3515. config->panel_mode = panel->panel_mode;
  3516. memcpy(&config->common_config, &panel->host_config,
  3517. sizeof(config->common_config));
  3518. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3519. memcpy(&config->u.video_engine, &panel->video_config,
  3520. sizeof(config->u.video_engine));
  3521. } else {
  3522. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3523. sizeof(config->u.cmd_engine));
  3524. }
  3525. memcpy(&config->video_timing, &mode->timing,
  3526. sizeof(config->video_timing));
  3527. config->video_timing.mdp_transfer_time_us =
  3528. mode->priv_info->mdp_transfer_time_us;
  3529. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3530. config->video_timing.dsc = &mode->priv_info->dsc;
  3531. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3532. config->video_timing.vdc = &mode->priv_info->vdc;
  3533. if (dyn_clk_caps->dyn_clk_support)
  3534. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3535. else
  3536. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3537. config->esc_clk_rate_hz = 19200000;
  3538. mutex_unlock(&panel->panel_lock);
  3539. return rc;
  3540. }
  3541. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3542. {
  3543. int rc = 0;
  3544. if (!panel) {
  3545. DSI_ERR("invalid params\n");
  3546. return -EINVAL;
  3547. }
  3548. mutex_lock(&panel->panel_lock);
  3549. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3550. if (panel->lp11_init)
  3551. goto error;
  3552. rc = dsi_panel_power_on(panel);
  3553. if (rc) {
  3554. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3555. goto error;
  3556. }
  3557. error:
  3558. mutex_unlock(&panel->panel_lock);
  3559. return rc;
  3560. }
  3561. int dsi_panel_update_pps(struct dsi_panel *panel)
  3562. {
  3563. int rc = 0;
  3564. struct dsi_panel_cmd_set *set = NULL;
  3565. struct dsi_display_mode_priv_info *priv_info = NULL;
  3566. if (!panel || !panel->cur_mode) {
  3567. DSI_ERR("invalid params\n");
  3568. return -EINVAL;
  3569. }
  3570. mutex_lock(&panel->panel_lock);
  3571. priv_info = panel->cur_mode->priv_info;
  3572. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3573. if (priv_info->dsc_enabled)
  3574. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3575. panel->dce_pps_cmd, 0,
  3576. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3577. else if (priv_info->vdc_enabled)
  3578. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3579. panel->dce_pps_cmd, 0,
  3580. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3581. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3582. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3583. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3584. if (rc) {
  3585. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3586. goto error;
  3587. }
  3588. }
  3589. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3590. if (rc) {
  3591. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3592. panel->name, rc);
  3593. }
  3594. dsi_panel_destroy_cmd_packets(set);
  3595. error:
  3596. mutex_unlock(&panel->panel_lock);
  3597. return rc;
  3598. }
  3599. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3600. {
  3601. int rc = 0;
  3602. if (!panel) {
  3603. DSI_ERR("invalid params\n");
  3604. return -EINVAL;
  3605. }
  3606. mutex_lock(&panel->panel_lock);
  3607. if (!panel->panel_initialized)
  3608. goto exit;
  3609. /*
  3610. * Consider LP1->LP2->LP1.
  3611. * If the panel is already in LP mode, do not need to
  3612. * set the regulator.
  3613. * IBB and AB power mode would be set at the same time
  3614. * in PMIC driver, so we only call ibb setting that is enough.
  3615. */
  3616. if (dsi_panel_is_type_oled(panel) &&
  3617. panel->power_mode != SDE_MODE_DPMS_LP2)
  3618. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3619. "ibb", REGULATOR_MODE_IDLE);
  3620. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3621. if (rc)
  3622. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3623. panel->name, rc);
  3624. exit:
  3625. mutex_unlock(&panel->panel_lock);
  3626. return rc;
  3627. }
  3628. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3629. {
  3630. int rc = 0;
  3631. if (!panel) {
  3632. DSI_ERR("invalid params\n");
  3633. return -EINVAL;
  3634. }
  3635. mutex_lock(&panel->panel_lock);
  3636. if (!panel->panel_initialized)
  3637. goto exit;
  3638. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3639. if (rc)
  3640. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3641. panel->name, rc);
  3642. exit:
  3643. mutex_unlock(&panel->panel_lock);
  3644. return rc;
  3645. }
  3646. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3647. {
  3648. int rc = 0;
  3649. if (!panel) {
  3650. DSI_ERR("invalid params\n");
  3651. return -EINVAL;
  3652. }
  3653. mutex_lock(&panel->panel_lock);
  3654. if (!panel->panel_initialized)
  3655. goto exit;
  3656. /*
  3657. * Consider about LP1->LP2->NOLP.
  3658. */
  3659. if (dsi_panel_is_type_oled(panel) &&
  3660. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3661. panel->power_mode == SDE_MODE_DPMS_LP2))
  3662. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3663. "ibb", REGULATOR_MODE_NORMAL);
  3664. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3665. if (rc)
  3666. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3667. panel->name, rc);
  3668. exit:
  3669. mutex_unlock(&panel->panel_lock);
  3670. return rc;
  3671. }
  3672. int dsi_panel_prepare(struct dsi_panel *panel)
  3673. {
  3674. int rc = 0;
  3675. if (!panel) {
  3676. DSI_ERR("invalid params\n");
  3677. return -EINVAL;
  3678. }
  3679. mutex_lock(&panel->panel_lock);
  3680. if (panel->lp11_init) {
  3681. rc = dsi_panel_power_on(panel);
  3682. if (rc) {
  3683. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3684. panel->name, rc);
  3685. goto error;
  3686. }
  3687. }
  3688. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3689. if (rc) {
  3690. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3691. panel->name, rc);
  3692. goto error;
  3693. }
  3694. error:
  3695. mutex_unlock(&panel->panel_lock);
  3696. return rc;
  3697. }
  3698. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3699. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3700. {
  3701. static const int ROI_CMD_LEN = 5;
  3702. int rc = 0;
  3703. /* DTYPE_DCS_LWRITE */
  3704. char *caset, *paset;
  3705. set->cmds = NULL;
  3706. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3707. if (!caset) {
  3708. rc = -ENOMEM;
  3709. goto exit;
  3710. }
  3711. caset[0] = 0x2a;
  3712. caset[1] = (roi->x & 0xFF00) >> 8;
  3713. caset[2] = roi->x & 0xFF;
  3714. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3715. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3716. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3717. if (!paset) {
  3718. rc = -ENOMEM;
  3719. goto error_free_mem;
  3720. }
  3721. paset[0] = 0x2b;
  3722. paset[1] = (roi->y & 0xFF00) >> 8;
  3723. paset[2] = roi->y & 0xFF;
  3724. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3725. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3726. set->type = DSI_CMD_SET_ROI;
  3727. set->state = DSI_CMD_SET_STATE_LP;
  3728. set->count = 2; /* send caset + paset together */
  3729. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3730. if (!set->cmds) {
  3731. rc = -ENOMEM;
  3732. goto error_free_mem;
  3733. }
  3734. set->cmds[0].msg.channel = 0;
  3735. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3736. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3737. set->cmds[0].msg.flags |= MIPI_DSI_MSG_BATCH_COMMAND;
  3738. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3739. set->cmds[0].msg.tx_buf = caset;
  3740. set->cmds[0].msg.rx_len = 0;
  3741. set->cmds[0].msg.rx_buf = 0;
  3742. set->cmds[0].last_command = 0;
  3743. set->cmds[0].post_wait_ms = 0;
  3744. set->cmds[0].ctrl = unicast ? ctrl_idx : 0;
  3745. set->cmds[1].msg.channel = 0;
  3746. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3747. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST_COMMAND : 0;
  3748. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3749. set->cmds[1].msg.tx_buf = paset;
  3750. set->cmds[1].msg.rx_len = 0;
  3751. set->cmds[1].msg.rx_buf = 0;
  3752. set->cmds[1].last_command = 1;
  3753. set->cmds[1].post_wait_ms = 0;
  3754. set->cmds[1].ctrl = unicast ? ctrl_idx : 0;
  3755. goto exit;
  3756. error_free_mem:
  3757. kfree(caset);
  3758. kfree(paset);
  3759. kfree(set->cmds);
  3760. exit:
  3761. return rc;
  3762. }
  3763. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3764. int ctrl_idx)
  3765. {
  3766. int rc = 0;
  3767. if (!panel) {
  3768. DSI_ERR("invalid params\n");
  3769. return -EINVAL;
  3770. }
  3771. mutex_lock(&panel->panel_lock);
  3772. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3773. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3774. if (rc)
  3775. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3776. panel->name, rc);
  3777. mutex_unlock(&panel->panel_lock);
  3778. return rc;
  3779. }
  3780. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3781. int ctrl_idx)
  3782. {
  3783. int rc = 0;
  3784. if (!panel) {
  3785. DSI_ERR("invalid params\n");
  3786. return -EINVAL;
  3787. }
  3788. mutex_lock(&panel->panel_lock);
  3789. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3790. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3791. if (rc)
  3792. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3793. panel->name, rc);
  3794. mutex_unlock(&panel->panel_lock);
  3795. return rc;
  3796. }
  3797. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3798. struct dsi_rect *roi)
  3799. {
  3800. int rc = 0;
  3801. struct dsi_panel_cmd_set *set;
  3802. struct dsi_display_mode_priv_info *priv_info;
  3803. if (!panel || !panel->cur_mode) {
  3804. DSI_ERR("Invalid params\n");
  3805. return -EINVAL;
  3806. }
  3807. priv_info = panel->cur_mode->priv_info;
  3808. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3809. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3810. if (rc) {
  3811. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3812. panel->name, rc);
  3813. return rc;
  3814. }
  3815. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3816. roi->x, roi->y, roi->w, roi->h);
  3817. SDE_EVT32(roi->x, roi->y, roi->w, roi->h);
  3818. mutex_lock(&panel->panel_lock);
  3819. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3820. if (rc)
  3821. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3822. panel->name, rc);
  3823. mutex_unlock(&panel->panel_lock);
  3824. dsi_panel_destroy_cmd_packets(set);
  3825. dsi_panel_dealloc_cmd_packets(set);
  3826. return rc;
  3827. }
  3828. int dsi_panel_switch_cmd_mode_out(struct dsi_panel *panel)
  3829. {
  3830. int rc = 0;
  3831. if (!panel) {
  3832. DSI_ERR("Invalid params\n");
  3833. return -EINVAL;
  3834. }
  3835. mutex_lock(&panel->panel_lock);
  3836. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_OUT);
  3837. if (rc)
  3838. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_OUT cmds, rc=%d\n",
  3839. panel->name, rc);
  3840. mutex_unlock(&panel->panel_lock);
  3841. return rc;
  3842. }
  3843. int dsi_panel_switch_video_mode_out(struct dsi_panel *panel)
  3844. {
  3845. int rc = 0;
  3846. if (!panel) {
  3847. DSI_ERR("Invalid params\n");
  3848. return -EINVAL;
  3849. }
  3850. mutex_lock(&panel->panel_lock);
  3851. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_OUT);
  3852. if (rc)
  3853. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_OUT cmds, rc=%d\n",
  3854. panel->name, rc);
  3855. mutex_unlock(&panel->panel_lock);
  3856. return rc;
  3857. }
  3858. int dsi_panel_switch_video_mode_in(struct dsi_panel *panel)
  3859. {
  3860. int rc = 0;
  3861. if (!panel) {
  3862. DSI_ERR("Invalid params\n");
  3863. return -EINVAL;
  3864. }
  3865. mutex_lock(&panel->panel_lock);
  3866. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_SWITCH_IN);
  3867. if (rc)
  3868. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_SWITCH_IN cmds, rc=%d\n",
  3869. panel->name, rc);
  3870. mutex_unlock(&panel->panel_lock);
  3871. return rc;
  3872. }
  3873. int dsi_panel_switch_cmd_mode_in(struct dsi_panel *panel)
  3874. {
  3875. int rc = 0;
  3876. if (!panel) {
  3877. DSI_ERR("Invalid params\n");
  3878. return -EINVAL;
  3879. }
  3880. mutex_lock(&panel->panel_lock);
  3881. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_SWITCH_IN);
  3882. if (rc)
  3883. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_SWITCH_IN cmds, rc=%d\n",
  3884. panel->name, rc);
  3885. mutex_unlock(&panel->panel_lock);
  3886. return rc;
  3887. }
  3888. int dsi_panel_switch(struct dsi_panel *panel)
  3889. {
  3890. int rc = 0;
  3891. if (!panel) {
  3892. DSI_ERR("Invalid params\n");
  3893. return -EINVAL;
  3894. }
  3895. mutex_lock(&panel->panel_lock);
  3896. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3897. if (rc)
  3898. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3899. panel->name, rc);
  3900. mutex_unlock(&panel->panel_lock);
  3901. return rc;
  3902. }
  3903. int dsi_panel_post_switch(struct dsi_panel *panel)
  3904. {
  3905. int rc = 0;
  3906. if (!panel) {
  3907. DSI_ERR("Invalid params\n");
  3908. return -EINVAL;
  3909. }
  3910. mutex_lock(&panel->panel_lock);
  3911. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3912. if (rc)
  3913. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3914. panel->name, rc);
  3915. mutex_unlock(&panel->panel_lock);
  3916. return rc;
  3917. }
  3918. int dsi_panel_enable(struct dsi_panel *panel)
  3919. {
  3920. int rc = 0;
  3921. if (!panel) {
  3922. DSI_ERR("Invalid params\n");
  3923. return -EINVAL;
  3924. }
  3925. mutex_lock(&panel->panel_lock);
  3926. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3927. if (rc) {
  3928. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3929. panel->name, rc);
  3930. goto error;
  3931. }
  3932. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  3933. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_ON);
  3934. if (rc) {
  3935. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_ON cmds, rc=%d\n",
  3936. panel->name, rc);
  3937. goto error;
  3938. }
  3939. } else if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3940. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_ON);
  3941. if (rc) {
  3942. DSI_ERR("[%s] failed to send DSI_CMD_SET_VID_ON cmds, rc=%d\n",
  3943. panel->name, rc);
  3944. goto error;
  3945. }
  3946. }
  3947. panel->panel_initialized = true;
  3948. error:
  3949. mutex_unlock(&panel->panel_lock);
  3950. return rc;
  3951. }
  3952. int dsi_panel_post_enable(struct dsi_panel *panel)
  3953. {
  3954. int rc = 0;
  3955. if (!panel) {
  3956. DSI_ERR("invalid params\n");
  3957. return -EINVAL;
  3958. }
  3959. mutex_lock(&panel->panel_lock);
  3960. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3961. if (rc) {
  3962. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3963. panel->name, rc);
  3964. goto error;
  3965. }
  3966. error:
  3967. mutex_unlock(&panel->panel_lock);
  3968. return rc;
  3969. }
  3970. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3971. {
  3972. int rc = 0;
  3973. if (!panel) {
  3974. DSI_ERR("invalid params\n");
  3975. return -EINVAL;
  3976. }
  3977. mutex_lock(&panel->panel_lock);
  3978. if (gpio_is_valid(panel->bl_config.en_gpio))
  3979. gpio_set_value(panel->bl_config.en_gpio, 0);
  3980. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3981. if (rc) {
  3982. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3983. panel->name, rc);
  3984. goto error;
  3985. }
  3986. error:
  3987. mutex_unlock(&panel->panel_lock);
  3988. return rc;
  3989. }
  3990. int dsi_panel_disable(struct dsi_panel *panel)
  3991. {
  3992. int rc = 0;
  3993. if (!panel) {
  3994. DSI_ERR("invalid params\n");
  3995. return -EINVAL;
  3996. }
  3997. mutex_lock(&panel->panel_lock);
  3998. /* Avoid sending panel off commands when ESD recovery is underway */
  3999. if (!atomic_read(&panel->esd_recovery_pending)) {
  4000. /*
  4001. * Need to set IBB/AB regulator mode to STANDBY,
  4002. * if panel is going off from AOD mode.
  4003. */
  4004. if (dsi_panel_is_type_oled(panel) &&
  4005. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  4006. panel->power_mode == SDE_MODE_DPMS_LP2))
  4007. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  4008. "ibb", REGULATOR_MODE_STANDBY);
  4009. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  4010. if (rc) {
  4011. /*
  4012. * Sending panel off commands may fail when DSI
  4013. * controller is in a bad state. These failures can be
  4014. * ignored since controller will go for full reset on
  4015. * subsequent display enable anyway.
  4016. */
  4017. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  4018. panel->name, rc);
  4019. rc = 0;
  4020. }
  4021. }
  4022. panel->panel_initialized = false;
  4023. panel->power_mode = SDE_MODE_DPMS_OFF;
  4024. mutex_unlock(&panel->panel_lock);
  4025. return rc;
  4026. }
  4027. int dsi_panel_unprepare(struct dsi_panel *panel)
  4028. {
  4029. int rc = 0;
  4030. if (!panel) {
  4031. DSI_ERR("invalid params\n");
  4032. return -EINVAL;
  4033. }
  4034. mutex_lock(&panel->panel_lock);
  4035. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  4036. if (rc) {
  4037. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  4038. panel->name, rc);
  4039. goto error;
  4040. }
  4041. error:
  4042. mutex_unlock(&panel->panel_lock);
  4043. return rc;
  4044. }
  4045. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  4046. {
  4047. int rc = 0;
  4048. if (!panel) {
  4049. DSI_ERR("invalid params\n");
  4050. return -EINVAL;
  4051. }
  4052. mutex_lock(&panel->panel_lock);
  4053. rc = dsi_panel_power_off(panel);
  4054. if (rc) {
  4055. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  4056. panel->name, rc);
  4057. goto error;
  4058. }
  4059. error:
  4060. mutex_unlock(&panel->panel_lock);
  4061. return rc;
  4062. }