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wsa884x
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wsa884x-reg-shifts.h

wsa884x-reg-shifts.h 4.0 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef WSA884X_REG_SHIFTS_H
    7. 

  7. #define WSA884X_REG_SHIFTS_H
    8. 

  8. #include <linux/regmap.h>
    9. 

  9. #include <linux/device.h>
    10. 

  10. #include "wsa884x-registers.h"
    11. 

  11. 

  12. #define FIELD_SHIFT(register_name, field_name) \
    13. 

  13. 	WSA884X_##register_name##_##field_name##_SHIFT
    14. 

  14. 

  15. #define WSA884X_VBAT_SNS_BOP_FREQ_SHIFT 0x05
    16. 

  16. #define WSA884X_ISENSE2_ISENSE_GAIN_CTL_SHIFT 0x05
    17. 

  17. #define WSA884X_ADC_2_ISNS_LOAD_STORED_SHIFT 0x06
    18. 

  18. #define WSA884X_ADC_6_INTRLV_RST_OVRD_SHIFT 0x01
    19. 

  19. #define WSA884X_ADC_7_EN_AZ_REG_SHIFT 0x02
    20. 

  20. #define WSA884X_ADC_7_EN_SAR_REG_SHIFT 0x01
    21. 

  21. #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_OVRD_EN_SHIFT 0x07
    22. 

  22. #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_SHIFT 0x02
    23. 

  23. #define WSA884X_BOOST_MISC_SPKR_RDY_CTL_SHIFT 0x05
    24. 

  24. #define WSA884X_CKWD_CTL_0_CKWD_FDIV_SEL_SHIFT 0x05
    25. 

  25. #define WSA884X_CKWD_CTL_1_CKWD_VCOMP_VREF_SEL_SHIFT 0x00
    26. 

  26. #define WSA884X_CHIP_ID0_BYTE_0_SHIFT 0x00
    27. 

  27. #define WSA884X_PA_FSM_EN_GLOBAL_PA_EN_SHIFT 0x00
    28. 

  28. #define WSA884X_PA_FSM_BYP_CTL_PA_FSM_BYP_SHIFT 0x00
    29. 

  29. #define WSA884X_PA_FSM_BYP0_TSADC_EN_SHIFT 0x07
    30. 

  30. #define WSA884X_PA_FSM_BYP0_SPKR_PROT_EN_SHIFT 0x06
    31. 

  31. #define WSA884X_PA_FSM_BYP0_D_UNMUTE_SHIFT 0x05
    32. 

  32. #define WSA884X_PA_FSM_BYP0_BG_EN_SHIFT 0x02
    33. 

  33. #define WSA884X_PA_FSM_BYP0_CLK_WD_EN_SHIFT 0x01
    34. 

  34. #define WSA884X_PA_FSM_BYP0_DC_CAL_EN_SHIFT 0x00
    35. 

  35. #define WSA884X_TADC_VALUE_CTL_TEMP_VALUE_RD_EN_SHIFT 0x00
    36. 

  36. #define WSA884X_TEMP_CONFIG0_CTL_THRD_SAF2WAR_SHIFT 0x00
    37. 

  37. #define WSA884X_TEMP_CONFIG1_CTL_THRD_WAR2SAF_SHIFT 0x00
    38. 

  38. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_SHIFT 0x01
    39. 

  39. #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_FLT_EN_SHIFT 0x00
    40. 

  40. #define WSA884X_CDC_SPK_DSM_A2_0_COEF_A2_SHIFT 0x00
    41. 

  41. #define WSA884X_CDC_SPK_DSM_A2_1_COEF_A2_SHIFT 0x00
    42. 

  42. #define WSA884X_CDC_SPK_DSM_A3_0_COEF_A3_SHIFT 0x00
    43. 

  43. #define WSA884X_CDC_SPK_DSM_A3_1_COEF_A3_SHIFT 0x00
    44. 

  44. #define WSA884X_CDC_SPK_DSM_A4_0_COEF_A4_SHIFT 0x00
    45. 

  45. #define WSA884X_CDC_SPK_DSM_A4_1_COEF_A4_SHIFT 0x00
    46. 

  46. #define WSA884X_CDC_SPK_DSM_A5_0_COEF_A5_SHIFT 0x00
    47. 

  47. #define WSA884X_CDC_SPK_DSM_A5_1_COEF_A5_SHIFT 0x00
    48. 

  48. #define WSA884X_CDC_SPK_DSM_A6_0_COEF_A6_SHIFT 0x00
    49. 

  49. #define WSA884X_CDC_SPK_DSM_A7_0_COEF_A7_SHIFT 0x00
    50. 

  50. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C3_SHIFT 0x04
    51. 

  51. #define WSA884X_CDC_SPK_DSM_C_0_COEF_C2_SHIFT 0x00
    52. 

  52. #define WSA884X_CDC_SPK_DSM_C_1_COEF_C5_SHIFT 0x04
    53. 

  53. #define WSA884X_CDC_SPK_DSM_C_1_COEF_C4_SHIFT 0x00
    54. 

  54. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C7_SHIFT 0x04
    55. 

  55. #define WSA884X_CDC_SPK_DSM_C_2_COEF_C6_SHIFT 0x00
    56. 

  56. #define WSA884X_CDC_SPK_DSM_C_3_COEF_C7_SHIFT 0x00
    57. 

  57. #define WSA884X_CDC_SPK_DSM_R1_SAT_LIMIT_R1_SHIFT 0x00
    58. 

  58. #define WSA884X_CDC_SPK_DSM_R2_SAT_LIMIT_R2_SHIFT 0x00
    59. 

  59. #define WSA884X_CDC_SPK_DSM_R3_SAT_LIMIT_R3_SHIFT 0x00
    60. 

  60. #define WSA884X_CDC_SPK_DSM_R4_SAT_LIMIT_R4_SHIFT 0x00
    61. 

  61. #define WSA884X_CDC_SPK_DSM_R5_SAT_LIMIT_R5_SHIFT 0x00
    62. 

  62. #define WSA884X_CDC_SPK_DSM_R6_SAT_LIMIT_R6_SHIFT 0x00
    63. 

  63. #define WSA884X_CDC_SPK_DSM_R7_SAT_LIMIT_R7_SHIFT 0x00
    64. 

  64. #define WSA884X_PDM_WD_CTL_PDM_WD_EN_SHIFT 0x00
    65. 

  65. #define WSA884X_DRE_CTL_0_PROG_DELAY_SHIFT 0x04
    66. 

  66. #define WSA884X_DRE_CTL_0_OFFSET_SHIFT 0x00
    67. 

  67. #define WSA884X_DRE_CTL_1_CSR_GAIN_SHIFT 0x01
    68. 

  68. #define WSA884X_DRE_CTL_1_CSR_GAIN_EN_SHIFT 0x00
    69. 

  69. #define WSA884X_TAGC_CTL_THERMAL_THRESH_SHIFT 0x01
    70. 

  70. #define WSA884X_TAGC_CTL_THERMAL_AGC_EN_SHIFT 0x00
    71. 

  71. #define WSA884X_TAGC_TIME_REL_TIME_SHIFT 0x04
    72. 

  72. #define WSA884X_VAGC_CTL_VBAT_AGC_EN_SHIFT 0x00
    73. 

  73. #define WSA884X_VAGC_TIME_REL_TIME_SHIFT 0x02
    74. 

  74. #define WSA884X_VAGC_TIME_HLD_TIME_SHIFT 0x00
    75. 

  75. #define WSA884X_VAGC_ATTN_LVL_2_VBAT_ATTN_LVL_SHIFT 0x00
    76. 

  76. #define WSA884X_VAGC_ATTN_LVL_3_VBAT_ATTN_LVL_SHIFT 0x00
    77. 

  77. #define WSA884X_OTP_REG_0_WSA884X_ID_SHIFT 0x00
    78. 

  78. #define WSA884X_OTP_REG_1_LOW_TEMP_MSB_SHIFT 0x00
    79. 

  79. #define WSA884X_OTP_REG_2_LOW_TEMP_LSB_SHIFT 0x06
    80. 

  80. #define WSA884X_OTP_REG_3_HIGH_TEMP_MSB_SHIFT 0x00
    81. 

  81. #define WSA884X_OTP_REG_4_HIGH_TEMP_LSB_SHIFT 0x06
    82. 

  82. #define WSA884X_DRE_IDLE_DET_CTL_PA_OFF_FORCE_EN_SHIFT 0x06
    83. 

  83. #define WSA884X_DRE_IDLE_DET_CTL_PDM_WD_FORCE_EN_SHIFT 0x05
    84. 

  84. #define WSA884X_DRE_IDLE_DET_CTL_DRE_IDLE_FORCE_EN_SHIFT 0x04
    85. 

  85. #define WSA884X_DRE_IDLE_DET_CTL_DRE_FORCE_VALUE_SHIFT 0x00
    86. 

  86. 

  87. #endif /* WSA884X_REG_SHIFTS_H */
    88.