hal_be_api.h 4.4 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef _HAL_BE_API_H_
  20. #define _HAL_BE_API_H_
  21. #include "hal_hw_headers.h"
  22. #include "hal_rx.h"
  23. #define HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr) \
  24. ((struct rx_msdu_ext_desc_info *) \
  25. _OFFSET_TO_BYTE_PTR(msdu_details_ptr, \
  26. RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
  27. /**
  28. * hal_reo_setup_generic_be - Initialize HW REO block
  29. *
  30. * @hal_soc: Opaque HAL SOC handle
  31. * @reo_params: parameters needed by HAL for REO config
  32. */
  33. void hal_reo_setup_generic_be(struct hal_soc *soc,
  34. void *reoparams);
  35. /**
  36. * hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension
  37. * descriptor pointer.
  38. * @msdu_details_ptr: msdu details
  39. *
  40. * Return: msdu exntension descriptor pointer.
  41. */
  42. void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr);
  43. /**
  44. * hal_set_link_desc_addr_be - Setup link descriptor in a buffer_addr_info
  45. * HW structure
  46. *
  47. * @desc: Descriptor entry (from WBM_IDLE_LINK ring)
  48. * @cookie: SW cookie for the buffer/descriptor
  49. * @link_desc_paddr: Physical address of link descriptor entry
  50. * @bm_id: idle link BM id
  51. *
  52. */
  53. void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
  54. qdf_dma_addr_t link_desc_paddr,
  55. uint8_t bm_id);
  56. /**
  57. * hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips
  58. * @ hal_soc_hdl: hal_soc handle
  59. *
  60. * Return: None
  61. */
  62. void hal_hw_txrx_default_ops_attach_be(struct hal_soc *soc);
  63. uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc);
  64. uint8_t hal_rx_ret_buf_manager_get_be(hal_ring_desc_t ring_desc);
  65. void hal_rx_wbm_err_info_get_generic_be(void *wbm_desc, void *wbm_er_info1);
  66. /**
  67. * hal_reo_qdesc_setup - Setup HW REO queue descriptor
  68. *
  69. * @hal_soc: Opaque HAL SOC handle
  70. * @ba_window_size: BlockAck window size
  71. * @start_seq: Starting sequence number
  72. * @hw_qdesc_vaddr: Virtual address of REO queue descriptor memory
  73. * @hw_qdesc_paddr: Physical address of REO queue descriptor memory
  74. * @pn_type: PN type (one of the types defined in 'enum hal_pn_type')
  75. * @vdev_stats_id: vdev_stats_id to be programmed in REO Queue Descriptor
  76. */
  77. void hal_reo_qdesc_setup_be(hal_soc_handle_t hal_soc_hdl,
  78. int tid, uint32_t ba_window_size,
  79. uint32_t start_seq, void *hw_qdesc_vaddr,
  80. qdf_dma_addr_t hw_qdesc_paddr,
  81. int pn_type, uint8_t vdev_stats_id);
  82. /**
  83. * hal_cookie_conversion_reg_cfg_be() - set cookie conversion relevant register
  84. * for REO/WBM
  85. * @soc: HAL soc handle
  86. * @cc_cfg: structure pointer for HW cookie conversion configuration
  87. *
  88. * Return: None
  89. */
  90. void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl,
  91. struct hal_hw_cc_config *cc_cfg);
  92. /**
  93. * hal_reo_ix_remap_value_get() - Calculate reo remap register value from
  94. * ring_id_mask which is used for hash based
  95. * reo distribution
  96. *
  97. * @hal_soc: Handle to HAL SoC structure
  98. * @ring_id_mask: mask value indicating the rx rings 0th bit set indicate
  99. * REO2SW1 is included in hash distribution
  100. *
  101. * Return: REO remap value
  102. */
  103. uint32_t
  104. hal_reo_ix_remap_value_get_be(hal_soc_handle_t hal_soc_hdl,
  105. uint8_t rx_ring_mask);
  106. /**
  107. * hal_reo_ring_remap_value_get_be() - return REO remap value
  108. *
  109. * @ring_id: REO2SW ring id
  110. *
  111. * Return: REO remap value
  112. */
  113. uint8_t
  114. hal_reo_ring_remap_value_get_be(uint8_t rx_ring_id);
  115. /**
  116. * hal_setup_reo_swap() - Set the swap flag for big endian machines
  117. * @soc: HAL soc handle
  118. *
  119. * Return: None
  120. */
  121. void hal_setup_reo_swap(struct hal_soc *soc);
  122. /**
  123. * hal_get_idle_link_bm_id_be() - Get idle link BM id from chid_id
  124. * @chip_id: mlo chip_id
  125. *
  126. * Returns: RBM ID
  127. */
  128. uint8_t hal_get_idle_link_bm_id_be(uint8_t chip_id);
  129. #endif /* _HAL_BE_API_H_ */