cfg_dp.h 53 KB

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  1. /*
  2. * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. /**
  20. * DOC: This file contains definitions of Data Path configuration.
  21. */
  22. #ifndef _CFG_DP_H_
  23. #define _CFG_DP_H_
  24. #include "cfg_define.h"
  25. #include "wlan_init_cfg.h"
  26. #define WLAN_CFG_MAX_CLIENTS 64
  27. #define WLAN_CFG_MAX_CLIENTS_MIN 8
  28. #define WLAN_CFG_MAX_CLIENTS_MAX 64
  29. /* Change this to a lower value to enforce scattered idle list mode */
  30. #define WLAN_CFG_MAX_ALLOC_SIZE 0x200000
  31. #define WLAN_CFG_MAX_ALLOC_SIZE_MIN 0x80000
  32. #define WLAN_CFG_MAX_ALLOC_SIZE_MAX 0x200000
  33. #if defined(QCA_LL_TX_FLOW_CONTROL_V2) || \
  34. defined(QCA_LL_PDEV_TX_FLOW_CONTROL)
  35. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 10
  36. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 15
  37. #else
  38. #define WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET 0
  39. #define WLAN_CFG_TX_FLOW_STOP_QUEUE_TH 0
  40. #endif
  41. #define WLAN_CFG_PER_PDEV_TX_RING_MIN 0
  42. #define WLAN_CFG_PER_PDEV_TX_RING_MAX 1
  43. #ifdef IPA_OFFLOAD
  44. /* Size of TCL TX Ring */
  45. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  46. #define WLAN_CFG_TX_RING_SIZE 2048
  47. #else
  48. #define WLAN_CFG_TX_RING_SIZE 1024
  49. #endif
  50. #define WLAN_CFG_IPA_TX_RING_SIZE_MIN 1024
  51. #define WLAN_CFG_IPA_TX_RING_SIZE 1024
  52. #define WLAN_CFG_IPA_TX_RING_SIZE_MAX 8096
  53. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN 1024
  54. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE 1024
  55. #define WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX 8096
  56. #ifdef IPA_WDI3_TX_TWO_PIPES
  57. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN 1024
  58. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE 1024
  59. #define WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX 8096
  60. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN 1024
  61. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE 1024
  62. #define WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX 8096
  63. #endif
  64. #define WLAN_CFG_PER_PDEV_TX_RING 0
  65. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 2048
  66. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 3000
  67. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 1024
  68. #else
  69. #define WLAN_CFG_TX_RING_SIZE 512
  70. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  71. #define WLAN_CFG_PER_PDEV_TX_RING 1
  72. #else
  73. #define WLAN_CFG_PER_PDEV_TX_RING 0
  74. #endif
  75. #define WLAN_CFG_IPA_UC_TX_BUF_SIZE 0
  76. #define WLAN_CFG_IPA_UC_TX_PARTITION_BASE 0
  77. #define WLAN_CFG_IPA_UC_RX_IND_RING_COUNT 0
  78. #endif /* IPA_OFFLOAD */
  79. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  80. #define WLAN_CFG_PER_PDEV_RX_RING 0
  81. #define WLAN_CFG_PER_PDEV_LMAC_RING 0
  82. #define WLAN_LRO_ENABLE 0
  83. #ifdef QCA_WIFI_QCA6750
  84. #define WLAN_CFG_MAC_PER_TARGET 1
  85. #else
  86. #define WLAN_CFG_MAC_PER_TARGET 2
  87. #endif
  88. #if defined(TX_TO_NPEERS_INC_TX_DESCS)
  89. #define WLAN_CFG_TX_COMP_RING_SIZE 4096
  90. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  91. #define WLAN_CFG_NUM_TX_DESC 4096
  92. #define WLAN_CFG_NUM_TX_EXT_DESC 4096
  93. #else
  94. #define WLAN_CFG_TX_COMP_RING_SIZE 1024
  95. /* Tx Descriptor and Tx Extension Descriptor pool sizes */
  96. #define WLAN_CFG_NUM_TX_DESC 1024
  97. #define WLAN_CFG_NUM_TX_EXT_DESC 1024
  98. #endif
  99. /* Interrupt Mitigation - Batch threshold in terms of number of frames */
  100. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX 1
  101. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER 1
  102. /* Interrupt Mitigation - Timer threshold in us */
  103. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX 8
  104. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER 8
  105. #ifdef WLAN_DP_PER_RING_TYPE_CONFIG
  106. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX \
  107. WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING
  108. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX \
  109. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING
  110. #else
  111. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX 1
  112. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX 8
  113. #endif
  114. #endif /* WLAN_MAX_PDEVS */
  115. #ifdef NBUF_MEMORY_DEBUG
  116. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
  117. #else
  118. #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0x1FFFF
  119. #endif
  120. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD \
  121. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  122. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN 0
  123. #define WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX 0x200000
  124. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD \
  125. WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT
  126. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN 100
  127. #define WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX 0x200000
  128. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING 256
  129. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING 512
  130. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING 0
  131. #define WLAN_CFG_PER_PDEV_RX_RING_MIN 0
  132. #define WLAN_CFG_PER_PDEV_RX_RING_MAX 0
  133. #define WLAN_CFG_PER_PDEV_LMAC_RING_MIN 0
  134. #define WLAN_CFG_PER_PDEV_LMAC_RING_MAX 1
  135. #define WLAN_CFG_TX_RING_SIZE_MIN 512
  136. #define WLAN_CFG_TX_RING_SIZE_MAX 0x80000
  137. #define WLAN_CFG_TX_COMP_RING_SIZE_MIN 512
  138. #define WLAN_CFG_TX_COMP_RING_SIZE_MAX 0x80000
  139. #define WLAN_CFG_NUM_TX_DESC_MIN 16
  140. #define WLAN_CFG_NUM_TX_DESC_MAX 0x10000
  141. #define WLAN_CFG_NUM_TX_EXT_DESC_MIN 16
  142. #define WLAN_CFG_NUM_TX_EXT_DESC_MAX 0x80000
  143. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
  144. #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
  145. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
  146. #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
  147. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MIN 1
  148. #define WLAN_CFG_INT_BATCH_THRESHOLD_REO_RING_MAX 128
  149. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MIN 1
  150. #define WLAN_CFG_INT_BATCH_THRESHOLD_WBM_RELEASE_RING_MAX 128
  151. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN 1
  152. #define WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX 1
  153. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
  154. #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
  155. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
  156. #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
  157. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN 8
  158. #define WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX 1000
  159. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN 8
  160. #define WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX 512
  161. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN 8
  162. #define WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX 500
  163. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE 0x2000
  164. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN 0x2000
  165. #define WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX 0xc000
  166. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  167. /* Per vdev pools */
  168. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  169. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  170. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  171. #ifdef TX_PER_PDEV_DESC_POOL
  172. #define WLAN_CFG_NUM_TX_DESC_POOL MAX_PDEV_CNT
  173. #define WLAN_CFG_NUM_TXEXT_DESC_POOL MAX_PDEV_CNT
  174. #else /* TX_PER_PDEV_DESC_POOL */
  175. #define WLAN_CFG_NUM_TX_DESC_POOL 3
  176. #define WLAN_CFG_NUM_TXEXT_DESC_POOL 3
  177. #endif /* TX_PER_PDEV_DESC_POOL */
  178. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  179. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN 1
  180. #define WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX 4
  181. #define WLAN_CFG_HTT_PKT_TYPE 2
  182. #define WLAN_CFG_HTT_PKT_TYPE_MIN 2
  183. #define WLAN_CFG_HTT_PKT_TYPE_MAX 2
  184. #define WLAN_CFG_MAX_PEER_ID 64
  185. #define WLAN_CFG_MAX_PEER_ID_MIN 64
  186. #define WLAN_CFG_MAX_PEER_ID_MAX 64
  187. #define WLAN_CFG_RX_DEFRAG_TIMEOUT 100
  188. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN 100
  189. #define WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX 100
  190. #define WLAN_CFG_NUM_TCL_DATA_RINGS 3
  191. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 1
  192. #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX MAX_TCL_DATA_RINGS
  193. #define WLAN_CFG_NUM_TX_COMP_RINGS WLAN_CFG_NUM_TCL_DATA_RINGS
  194. #define WLAN_CFG_NUM_TX_COMP_RINGS_MIN WLAN_CFG_NUM_TCL_DATA_RINGS_MIN
  195. #define WLAN_CFG_NUM_TX_COMP_RINGS_MAX WLAN_CFG_NUM_TCL_DATA_RINGS_MAX
  196. #if defined(CONFIG_BERYLLIUM)
  197. #define WLAN_CFG_NUM_REO_DEST_RING 8
  198. #else
  199. #define WLAN_CFG_NUM_REO_DEST_RING 4
  200. #endif
  201. #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
  202. #define WLAN_CFG_NUM_REO_DEST_RING_MAX MAX_REO_DEST_RINGS
  203. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS 2
  204. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN 1
  205. #define WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX 3
  206. #define WLAN_CFG_NSS_NUM_REO_DEST_RING 2
  207. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN 1
  208. #define WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX 3
  209. #define WLAN_CFG_WBM_RELEASE_RING_SIZE 1024
  210. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN 64
  211. #define WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX 1024
  212. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE 512
  213. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN 32
  214. #define WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX 512
  215. #define WLAN_CFG_TCL_STATUS_RING_SIZE 32
  216. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MIN 32
  217. #define WLAN_CFG_TCL_STATUS_RING_SIZE_MAX 32
  218. #if defined(QCA_WIFI_QCA6290)
  219. #define WLAN_CFG_REO_DST_RING_SIZE 1024
  220. #else
  221. #define WLAN_CFG_REO_DST_RING_SIZE 2048
  222. #endif
  223. #define WLAN_CFG_REO_DST_RING_SIZE_MIN 8
  224. #define WLAN_CFG_REO_DST_RING_SIZE_MAX 8192
  225. #define WLAN_CFG_REO_REINJECT_RING_SIZE 128
  226. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MIN 32
  227. #define WLAN_CFG_REO_REINJECT_RING_SIZE_MAX 128
  228. #define WLAN_CFG_RX_RELEASE_RING_SIZE 1024
  229. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MIN 8
  230. #if defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
  231. defined(QCA_WIFI_QCA6750) || defined(QCA_WIFI_KIWI)
  232. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 1024
  233. #else
  234. #define WLAN_CFG_RX_RELEASE_RING_SIZE_MAX 8192
  235. #endif
  236. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE 256
  237. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN 128
  238. #define WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX 512
  239. #define WLAN_CFG_REO_CMD_RING_SIZE 128
  240. #define WLAN_CFG_REO_CMD_RING_SIZE_MIN 64
  241. #define WLAN_CFG_REO_CMD_RING_SIZE_MAX 128
  242. #define WLAN_CFG_REO_STATUS_RING_SIZE 256
  243. #define WLAN_CFG_REO_STATUS_RING_SIZE_MIN 128
  244. #define WLAN_CFG_REO_STATUS_RING_SIZE_MAX 2048
  245. #define WLAN_CFG_RXDMA_BUF_RING_SIZE 1024
  246. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN 1024
  247. #define WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX 4096
  248. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE 4096
  249. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN 16
  250. #define WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX 16384
  251. #define WLAN_CFG_TX_DESC_LIMIT_0 0
  252. #define WLAN_CFG_TX_DESC_LIMIT_0_MIN 4096
  253. #define WLAN_CFG_TX_DESC_LIMIT_0_MAX 32768
  254. #define WLAN_CFG_TX_DESC_LIMIT_1 0
  255. #define WLAN_CFG_TX_DESC_LIMIT_1_MIN 4096
  256. #define WLAN_CFG_TX_DESC_LIMIT_1_MAX 32768
  257. #define WLAN_CFG_TX_DESC_LIMIT_2 0
  258. #define WLAN_CFG_TX_DESC_LIMIT_2_MIN 4096
  259. #define WLAN_CFG_TX_DESC_LIMIT_2_MAX 32768
  260. #define WLAN_CFG_TX_DEVICE_LIMIT 65536
  261. #define WLAN_CFG_TX_DEVICE_LIMIT_MIN 16384
  262. #define WLAN_CFG_TX_DEVICE_LIMIT_MAX 65536
  263. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE 1024
  264. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN 128
  265. #define WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX 1024
  266. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE 4096
  267. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN 16
  268. #define WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX 8192
  269. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE 4096
  270. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN 16
  271. #define WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX 8192
  272. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE 2048
  273. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN 48
  274. #define WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX 8192
  275. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE 2048
  276. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN 48
  277. #define WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX 8192
  278. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE 1024
  279. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN 16
  280. #define WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX 8192
  281. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE 4096
  282. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN 4096
  283. #define WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX 16384
  284. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE 1024
  285. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN 1024
  286. #define WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX 8192
  287. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE 32
  288. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN 0
  289. #define WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX 256
  290. /**
  291. * Allocate as many RX descriptors as buffers in the SW2RXDMA
  292. * ring. This value may need to be tuned later.
  293. */
  294. #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
  295. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  296. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  297. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 1
  298. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  299. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  300. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 16384
  301. /**
  302. * For low memory AP cases using 1 will reduce the rx descriptors memory req
  303. */
  304. #elif defined(QCA_LOWMEM_CONFIG) || defined(QCA_512M_CONFIG)
  305. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 1
  306. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  307. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  308. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 4096
  309. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 1024
  310. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  311. /**
  312. * AP use cases need to allocate more RX Descriptors than the number of
  313. * entries avaialable in the SW2RXDMA buffer replenish ring. This is to account
  314. * for frames sitting in REO queues, HW-HW DMA rings etc. Hence using a
  315. * multiplication factor of 3, to allocate three times as many RX descriptors
  316. * as RX buffers.
  317. */
  318. #else
  319. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE 3
  320. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN 1
  321. #define WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX 3
  322. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE 12288
  323. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN 4096
  324. #define WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX 12288
  325. #endif
  326. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE 16384
  327. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN 1
  328. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX 16384
  329. #define WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT 128
  330. #define WLAN_CFG_PKTLOG_BUFFER_SIZE 10
  331. #define WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE 1
  332. #define WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE 10
  333. #ifdef IPA_OFFLOAD
  334. #define WLAN_CFG_NUM_REO_RINGS_MAP 0x7
  335. #else
  336. #define WLAN_CFG_NUM_REO_RINGS_MAP 0xF
  337. #endif
  338. #define WLAN_CFG_NUM_REO_RINGS_MAP_MIN 0x1
  339. #if defined(CONFIG_BERYLLIUM)
  340. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xFF
  341. #else
  342. #define WLAN_CFG_NUM_REO_RINGS_MAP_MAX 0xF
  343. #endif
  344. #define WLAN_CFG_RADIO_0_DEFAULT_REO 0x1
  345. #define WLAN_CFG_RADIO_1_DEFAULT_REO 0x2
  346. #define WLAN_CFG_RADIO_2_DEFAULT_REO 0x3
  347. #define WLAN_CFG_RADIO_DEFAULT_REO_MIN 0x1
  348. #define WLAN_CFG_RADIO_DEFAULT_REO_MAX 0x4
  349. #define WLAN_CFG_REO2PPE_RING_SIZE 1024
  350. #define WLAN_CFG_REO2PPE_RING_SIZE_MIN 64
  351. #define WLAN_CFG_REO2PPE_RING_SIZE_MAX 1024
  352. #define WLAN_CFG_PPE2TCL_RING_SIZE 1024
  353. #define WLAN_CFG_PPE2TCL_RING_SIZE_MIN 64
  354. #define WLAN_CFG_PPE2TCL_RING_SIZE_MAX 1024
  355. #define WLAN_CFG_PPE_RELEASE_RING_SIZE 1024
  356. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN 64
  357. #define WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX 1024
  358. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  359. #define WLAN_CFG_MLO_RX_RING_MAP 0xF
  360. #define WLAN_CFG_MLO_RX_RING_MAP_MIN 0x0
  361. #define WLAN_CFG_MLO_RX_RING_MAP_MAX 0xFF
  362. #endif
  363. #define WLAN_CFG_TX_CAPT_MAX_MEM_MIN 0
  364. #define WLAN_CFG_TX_CAPT_MAX_MEM_MAX 512
  365. #define WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT 0
  366. #define CFG_DP_MPDU_RETRY_THRESHOLD_MIN 0
  367. #define CFG_DP_MPDU_RETRY_THRESHOLD_MAX 255
  368. #define CFG_DP_MPDU_RETRY_THRESHOLD 0
  369. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR 0
  370. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN 0
  371. #define WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX 4
  372. /*
  373. * <ini>
  374. * "dp_tx_capt_max_mem_mb"- maximum memory used by Tx capture
  375. * @Min: 0
  376. * @Max: 512 MB
  377. * @Default: 0 (disabled)
  378. *
  379. * This ini entry is used to set a max limit beyond which frames
  380. * are dropped by Tx capture. User needs to set a non-zero value
  381. * to enable it.
  382. *
  383. * Usage: External
  384. *
  385. * </ini>
  386. */
  387. #define CFG_DP_TX_CAPT_MAX_MEM_MB \
  388. CFG_INI_UINT("dp_tx_capt_max_mem_mb", \
  389. WLAN_CFG_TX_CAPT_MAX_MEM_MIN, \
  390. WLAN_CFG_TX_CAPT_MAX_MEM_MAX, \
  391. WLAN_CFG_TX_CAPT_MAX_MEM_DEFAULT, \
  392. CFG_VALUE_OR_DEFAULT, "Max Memory (in MB) used by Tx Capture")
  393. /* DP INI Declarations */
  394. #define CFG_DP_HTT_PACKET_TYPE \
  395. CFG_INI_UINT("dp_htt_packet_type", \
  396. WLAN_CFG_HTT_PKT_TYPE_MIN, \
  397. WLAN_CFG_HTT_PKT_TYPE_MAX, \
  398. WLAN_CFG_HTT_PKT_TYPE, \
  399. CFG_VALUE_OR_DEFAULT, "DP HTT packet type")
  400. #define CFG_DP_INT_BATCH_THRESHOLD_OTHER \
  401. CFG_INI_UINT("dp_int_batch_threshold_other", \
  402. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MIN, \
  403. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER_MAX, \
  404. WLAN_CFG_INT_BATCH_THRESHOLD_OTHER, \
  405. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Other")
  406. #define CFG_DP_INT_BATCH_THRESHOLD_RX \
  407. CFG_INI_UINT("dp_int_batch_threshold_rx", \
  408. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN, \
  409. WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX, \
  410. WLAN_CFG_INT_BATCH_THRESHOLD_RX, \
  411. CFG_VALUE_OR_DEFAULT, "DP INT batch threshold Rx")
  412. #define CFG_DP_INT_BATCH_THRESHOLD_TX \
  413. CFG_INI_UINT("dp_int_batch_threshold_tx", \
  414. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN, \
  415. WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX, \
  416. WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
  417. CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
  418. #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
  419. CFG_INI_UINT("dp_int_timer_threshold_other", \
  420. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
  421. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MAX, \
  422. WLAN_CFG_INT_TIMER_THRESHOLD_OTHER, \
  423. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Other")
  424. #define CFG_DP_INT_TIMER_THRESHOLD_RX \
  425. CFG_INI_UINT("dp_int_timer_threshold_rx", \
  426. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN, \
  427. WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX, \
  428. WLAN_CFG_INT_TIMER_THRESHOLD_RX, \
  429. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Rx")
  430. #define CFG_DP_INT_TIMER_THRESHOLD_REO_RING \
  431. CFG_INI_UINT("dp_int_timer_threshold_reo_ring", \
  432. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MIN, \
  433. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING_MAX, \
  434. WLAN_CFG_INT_TIMER_THRESHOLD_REO_RING, \
  435. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Reo ring")
  436. #define CFG_DP_INT_TIMER_THRESHOLD_WBM_RELEASE_RING \
  437. CFG_INI_UINT("dp_int_timer_threshold_wbm_release_ring", \
  438. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MIN, \
  439. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING_MAX, \
  440. WLAN_CFG_INT_TIMER_THRESHOLD_WBM_RELEASE_RING, \
  441. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold wbm release ring")
  442. #define CFG_DP_INT_TIMER_THRESHOLD_TX \
  443. CFG_INI_UINT("dp_int_timer_threshold_tx", \
  444. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN, \
  445. WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX, \
  446. WLAN_CFG_INT_TIMER_THRESHOLD_TX, \
  447. CFG_VALUE_OR_DEFAULT, "DP INT timer threshold Tx")
  448. #define CFG_DP_MAX_ALLOC_SIZE \
  449. CFG_INI_UINT("dp_max_alloc_size", \
  450. WLAN_CFG_MAX_ALLOC_SIZE_MIN, \
  451. WLAN_CFG_MAX_ALLOC_SIZE_MAX, \
  452. WLAN_CFG_MAX_ALLOC_SIZE, \
  453. CFG_VALUE_OR_DEFAULT, "DP Max Alloc Size")
  454. #define CFG_DP_MAX_CLIENTS \
  455. CFG_INI_UINT("dp_max_clients", \
  456. WLAN_CFG_MAX_CLIENTS_MIN, \
  457. WLAN_CFG_MAX_CLIENTS_MAX, \
  458. WLAN_CFG_MAX_CLIENTS, \
  459. CFG_VALUE_OR_DEFAULT, "DP Max Clients")
  460. #define CFG_DP_MAX_PEER_ID \
  461. CFG_INI_UINT("dp_max_peer_id", \
  462. WLAN_CFG_MAX_PEER_ID_MIN, \
  463. WLAN_CFG_MAX_PEER_ID_MAX, \
  464. WLAN_CFG_MAX_PEER_ID, \
  465. CFG_VALUE_OR_DEFAULT, "DP Max Peer ID")
  466. #define CFG_DP_REO_DEST_RINGS \
  467. CFG_INI_UINT("dp_reo_dest_rings", \
  468. WLAN_CFG_NUM_REO_DEST_RING_MIN, \
  469. WLAN_CFG_NUM_REO_DEST_RING_MAX, \
  470. WLAN_CFG_NUM_REO_DEST_RING, \
  471. CFG_VALUE_OR_DEFAULT, "DP REO Destination Rings")
  472. #define CFG_DP_TX_COMP_RINGS \
  473. CFG_INI_UINT("dp_tx_comp_rings", \
  474. WLAN_CFG_NUM_TX_COMP_RINGS_MIN, \
  475. WLAN_CFG_NUM_TX_COMP_RINGS_MAX, \
  476. WLAN_CFG_NUM_TX_COMP_RINGS, \
  477. CFG_VALUE_OR_DEFAULT, "DP Tx Comp Rings")
  478. #define CFG_DP_TCL_DATA_RINGS \
  479. CFG_INI_UINT("dp_tcl_data_rings", \
  480. WLAN_CFG_NUM_TCL_DATA_RINGS_MIN, \
  481. WLAN_CFG_NUM_TCL_DATA_RINGS_MAX, \
  482. WLAN_CFG_NUM_TCL_DATA_RINGS, \
  483. CFG_VALUE_OR_DEFAULT, "DP TCL Data Rings")
  484. #define CFG_DP_NSS_REO_DEST_RINGS \
  485. CFG_INI_UINT("dp_nss_reo_dest_rings", \
  486. WLAN_CFG_NSS_NUM_REO_DEST_RING_MIN, \
  487. WLAN_CFG_NSS_NUM_REO_DEST_RING_MAX, \
  488. WLAN_CFG_NSS_NUM_REO_DEST_RING, \
  489. CFG_VALUE_OR_DEFAULT, "DP NSS REO Destination Rings")
  490. #define CFG_DP_NSS_TCL_DATA_RINGS \
  491. CFG_INI_UINT("dp_nss_tcl_data_rings", \
  492. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MIN, \
  493. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS_MAX, \
  494. WLAN_CFG_NSS_NUM_TCL_DATA_RINGS, \
  495. CFG_VALUE_OR_DEFAULT, "DP NSS TCL Data Rings")
  496. #define CFG_DP_TX_DESC \
  497. CFG_INI_UINT("dp_tx_desc", \
  498. WLAN_CFG_NUM_TX_DESC_MIN, \
  499. WLAN_CFG_NUM_TX_DESC_MAX, \
  500. WLAN_CFG_NUM_TX_DESC, \
  501. CFG_VALUE_OR_DEFAULT, "DP Tx Descriptors")
  502. #define CFG_DP_TX_EXT_DESC \
  503. CFG_INI_UINT("dp_tx_ext_desc", \
  504. WLAN_CFG_NUM_TX_EXT_DESC_MIN, \
  505. WLAN_CFG_NUM_TX_EXT_DESC_MAX, \
  506. WLAN_CFG_NUM_TX_EXT_DESC, \
  507. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors")
  508. #define CFG_DP_TX_EXT_DESC_POOLS \
  509. CFG_INI_UINT("dp_tx_ext_desc_pool", \
  510. WLAN_CFG_NUM_TXEXT_DESC_POOL_MIN, \
  511. WLAN_CFG_NUM_TXEXT_DESC_POOL_MAX, \
  512. WLAN_CFG_NUM_TXEXT_DESC_POOL, \
  513. CFG_VALUE_OR_DEFAULT, "DP Tx Ext Descriptors Pool")
  514. #define CFG_DP_PDEV_RX_RING \
  515. CFG_INI_UINT("dp_pdev_rx_ring", \
  516. WLAN_CFG_PER_PDEV_RX_RING_MIN, \
  517. WLAN_CFG_PER_PDEV_RX_RING_MAX, \
  518. WLAN_CFG_PER_PDEV_RX_RING, \
  519. CFG_VALUE_OR_DEFAULT, "DP PDEV Rx Ring")
  520. #define CFG_DP_PDEV_TX_RING \
  521. CFG_INI_UINT("dp_pdev_tx_ring", \
  522. WLAN_CFG_PER_PDEV_TX_RING_MIN, \
  523. WLAN_CFG_PER_PDEV_TX_RING_MAX, \
  524. WLAN_CFG_PER_PDEV_TX_RING, \
  525. CFG_VALUE_OR_DEFAULT, \
  526. "DP PDEV Tx Ring")
  527. #define CFG_DP_RX_DEFRAG_TIMEOUT \
  528. CFG_INI_UINT("dp_rx_defrag_timeout", \
  529. WLAN_CFG_RX_DEFRAG_TIMEOUT_MIN, \
  530. WLAN_CFG_RX_DEFRAG_TIMEOUT_MAX, \
  531. WLAN_CFG_RX_DEFRAG_TIMEOUT, \
  532. CFG_VALUE_OR_DEFAULT, "DP Rx Defrag Timeout")
  533. #define CFG_DP_TX_COMPL_RING_SIZE \
  534. CFG_INI_UINT("dp_tx_compl_ring_size", \
  535. WLAN_CFG_TX_COMP_RING_SIZE_MIN, \
  536. WLAN_CFG_TX_COMP_RING_SIZE_MAX, \
  537. WLAN_CFG_TX_COMP_RING_SIZE, \
  538. CFG_VALUE_OR_DEFAULT, "DP Tx Completion Ring Size")
  539. #define CFG_DP_TX_RING_SIZE \
  540. CFG_INI_UINT("dp_tx_ring_size", \
  541. WLAN_CFG_TX_RING_SIZE_MIN,\
  542. WLAN_CFG_TX_RING_SIZE_MAX,\
  543. WLAN_CFG_TX_RING_SIZE,\
  544. CFG_VALUE_OR_DEFAULT, "DP Tx Ring Size")
  545. #define CFG_DP_NSS_COMP_RING_SIZE \
  546. CFG_INI_UINT("dp_nss_comp_ring_size", \
  547. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MIN, \
  548. WLAN_CFG_NSS_TX_COMP_RING_SIZE_MAX, \
  549. WLAN_CFG_NSS_TX_COMP_RING_SIZE, \
  550. CFG_VALUE_OR_DEFAULT, "DP NSS completion Ring Size")
  551. #define CFG_DP_PDEV_LMAC_RING \
  552. CFG_INI_UINT("dp_pdev_lmac_ring", \
  553. WLAN_CFG_PER_PDEV_LMAC_RING_MIN, \
  554. WLAN_CFG_PER_PDEV_LMAC_RING_MAX, \
  555. WLAN_CFG_PER_PDEV_LMAC_RING, \
  556. CFG_VALUE_OR_DEFAULT, "DP pdev LMAC ring")
  557. /*
  558. * <ini>
  559. * dp_rx_pending_hl_threshold - High threshold of frame number to start
  560. * frame dropping scheme
  561. * @Min: 0
  562. * @Max: 524288
  563. * @Default: 393216
  564. *
  565. * This ini entry is used to set a high limit threshold to start frame
  566. * dropping scheme
  567. *
  568. * Usage: External
  569. *
  570. * </ini>
  571. */
  572. #define CFG_DP_RX_PENDING_HL_THRESHOLD \
  573. CFG_INI_UINT("dp_rx_pending_hl_threshold", \
  574. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MIN, \
  575. WLAN_CFG_RX_PENDING_HL_THRESHOLD_MAX, \
  576. WLAN_CFG_RX_PENDING_HL_THRESHOLD, \
  577. CFG_VALUE_OR_DEFAULT, "DP rx pending hl threshold")
  578. /*
  579. * <ini>
  580. * dp_rx_pending_lo_threshold - Low threshold of frame number to stop
  581. * frame dropping scheme
  582. * @Min: 100
  583. * @Max: 524288
  584. * @Default: 393216
  585. *
  586. * This ini entry is used to set a low limit threshold to stop frame
  587. * dropping scheme
  588. *
  589. * Usage: External
  590. *
  591. * </ini>
  592. */
  593. #define CFG_DP_RX_PENDING_LO_THRESHOLD \
  594. CFG_INI_UINT("dp_rx_pending_lo_threshold", \
  595. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MIN, \
  596. WLAN_CFG_RX_PENDING_LO_THRESHOLD_MAX, \
  597. WLAN_CFG_RX_PENDING_LO_THRESHOLD, \
  598. CFG_VALUE_OR_DEFAULT, "DP rx pending lo threshold")
  599. #define CFG_DP_BASE_HW_MAC_ID \
  600. CFG_INI_UINT("dp_base_hw_macid", \
  601. 0, 1, 1, \
  602. CFG_VALUE_OR_DEFAULT, "DP Base HW Mac ID")
  603. #define CFG_DP_RX_HASH \
  604. CFG_INI_BOOL("dp_rx_hash", true, \
  605. "DP Rx Hash")
  606. #define CFG_DP_TSO \
  607. CFG_INI_BOOL("TSOEnable", false, \
  608. "DP TSO Enabled")
  609. #define CFG_DP_LRO \
  610. CFG_INI_BOOL("LROEnable", WLAN_LRO_ENABLE, \
  611. "DP LRO Enable")
  612. #ifdef WLAN_USE_CONFIG_PARAMS
  613. /*
  614. * <ini>
  615. * dp_tx_desc_use_512p - Use 512M tx descriptor size
  616. * @Min: 0
  617. * @Max: 1
  618. * @Default: 0
  619. *
  620. * This ini entry is used as flag to use 512M tx descriptor size or not
  621. *
  622. * Usage: Internal
  623. *
  624. * </ini>
  625. */
  626. #define CFG_DP_TX_DESC_512P \
  627. CFG_INI_BOOL("dp_tx_desc_use_512p", false, \
  628. "DP TX DESC PINE SPECIFIC")
  629. /*
  630. * <ini>
  631. * dp_nss_3radio_ring - Use 3 Radio NSS comp ring size
  632. * @Min: 0
  633. * @Max: 1
  634. * @Default: 0
  635. *
  636. * This ini entry is used as flag to use 3 Radio NSS com ring size or not
  637. *
  638. * Usage: Internal
  639. *
  640. * </ini>
  641. */
  642. #define CFG_DP_NSS_3RADIO_RING \
  643. CFG_INI_BOOL("dp_nss_3radio_ring", false, \
  644. "DP NSS 3 RADIO RING SIZE")
  645. /*
  646. * <ini>
  647. * dp_mon_ring_per_512M - Update monitor status ring as 512M profile
  648. * @Min: 0
  649. * @Max: 1
  650. * @Default: 0
  651. *
  652. * This ini entry is used as flag to update monitor status ring as 512M profile
  653. *
  654. * Usage: Internal
  655. *
  656. * </ini>
  657. */
  658. #define CFG_DP_MON_STATUS_512M \
  659. CFG_INI_BOOL("dp_mon_ring_per_512M", false, \
  660. "DP MON STATUS RING SIZE PER 512M PROFILE")
  661. /*
  662. * <ini>
  663. * dp_mon_2chain_ring - Reduce monitor rings size as for 2 Chains case
  664. * @Min: 0
  665. * @Max: 1
  666. * @Default: 0
  667. *
  668. * This ini entry is used as flag to reduce monitor rings size as those used
  669. * in case of 2 Tx/RxChains
  670. *
  671. * Usage: Internal
  672. *
  673. * </ini>
  674. */
  675. #define CFG_DP_MON_2CHAIN_RING \
  676. CFG_INI_BOOL("dp_mon_2chain_ring", false, \
  677. "DP MON UPDATE RINGS FOR 2CHAIN")
  678. /*
  679. * <ini>
  680. * dp_mon_4chain_ring - Update monitor rings size for 4 Chains case
  681. * @Min: 0
  682. * @Max: 1
  683. * @Default: 0
  684. *
  685. * This ini entry is used as flag to reduce monitor rings size as those used
  686. * in case of 4 Tx/RxChains
  687. *
  688. * Usage: Internal
  689. *
  690. * </ini>
  691. */
  692. #define CFG_DP_MON_4CHAIN_RING \
  693. CFG_INI_BOOL("dp_mon_4chain_ring", false, \
  694. "DP MON UPDATE RINGS FOR 4CHAIN")
  695. /*
  696. * <ini>
  697. * dp_4radip_rdp_reo - Update RDP REO map based on 4 radio config
  698. * @Min: 0
  699. * @Max: 1
  700. * @Default: 0
  701. *
  702. * This ini entry is used as flag to update RDP reo map based on 4 Radio config
  703. *
  704. * Usage: Internal
  705. *
  706. * </ini>
  707. */
  708. #define CFG_DP_4RADIO_RDP_REO \
  709. CFG_INI_BOOL("dp_nss_4radio_rdp_reo", \
  710. false, "Update REO destination mapping for 4radio")
  711. #define CFG_DP_INI_SECTION_PARAMS \
  712. CFG(CFG_DP_NSS_3RADIO_RING) \
  713. CFG(CFG_DP_TX_DESC_512P) \
  714. CFG(CFG_DP_MON_STATUS_512M) \
  715. CFG(CFG_DP_MON_2CHAIN_RING) \
  716. CFG(CFG_DP_MON_4CHAIN_RING) \
  717. CFG(CFG_DP_4RADIO_RDP_REO)
  718. #else
  719. #define CFG_DP_INI_SECTION_PARAMS
  720. #endif
  721. /*
  722. * <ini>
  723. * CFG_DP_SG - Enable the SG feature standalonely
  724. * @Min: 0
  725. * @Max: 1
  726. * @Default: 1
  727. *
  728. * This ini entry is used to enable/disable SG feature standalonely.
  729. * Also does Rome support SG on TX, lithium does not.
  730. * For example the lithium does not support SG on UDP frames.
  731. * Which is able to handle SG only for TSO frames(in case TSO is enabled).
  732. *
  733. * Usage: External
  734. *
  735. * </ini>
  736. */
  737. #define CFG_DP_SG \
  738. CFG_INI_BOOL("dp_sg_support", false, \
  739. "DP SG Enable")
  740. #define WLAN_CFG_GRO_ENABLE_MIN 0
  741. #define WLAN_CFG_GRO_ENABLE_MAX 3
  742. #define WLAN_CFG_GRO_ENABLE_DEFAULT 0
  743. #define DP_GRO_ENABLE_BIT_SET BIT(0)
  744. #define DP_TC_BASED_DYNAMIC_GRO BIT(1)
  745. /*
  746. * <ini>
  747. * CFG_DP_GRO - Enable the GRO feature standalonely
  748. * @Min: 0
  749. * @Max: 3
  750. * @Default: 0
  751. *
  752. * This ini entry is used to enable/disable GRO feature standalonely.
  753. * Value 0: Disable GRO feature
  754. * Value 1: Enable GRO feature always
  755. * Value 3: Enable GRO dynamic feature where TC rule can control GRO
  756. * behavior
  757. *
  758. * Usage: External
  759. *
  760. * </ini>
  761. */
  762. #define CFG_DP_GRO \
  763. CFG_INI_UINT("GROEnable", \
  764. WLAN_CFG_GRO_ENABLE_MIN, \
  765. WLAN_CFG_GRO_ENABLE_MAX, \
  766. WLAN_CFG_GRO_ENABLE_DEFAULT, \
  767. CFG_VALUE_OR_DEFAULT, "DP GRO Enable")
  768. #define WLAN_CFG_TC_INGRESS_PRIO_MIN 0
  769. #define WLAN_CFG_TC_INGRESS_PRIO_MAX 0xFFFF
  770. #define WLAN_CFG_TC_INGRESS_PRIO_DEFAULT 0
  771. #define CFG_DP_TC_INGRESS_PRIO \
  772. CFG_INI_UINT("tc_ingress_prio", \
  773. WLAN_CFG_TC_INGRESS_PRIO_MIN, \
  774. WLAN_CFG_TC_INGRESS_PRIO_MAX, \
  775. WLAN_CFG_TC_INGRESS_PRIO_DEFAULT, \
  776. CFG_VALUE_OR_DEFAULT, "DP tc ingress prio")
  777. #define CFG_DP_OL_TX_CSUM \
  778. CFG_INI_BOOL("dp_offload_tx_csum_support", false, \
  779. "DP tx csum Enable")
  780. #define CFG_DP_OL_RX_CSUM \
  781. CFG_INI_BOOL("dp_offload_rx_csum_support", false, \
  782. "DP rx csum Enable")
  783. #define CFG_DP_RAWMODE \
  784. CFG_INI_BOOL("dp_rawmode_support", false, \
  785. "DP rawmode Enable")
  786. #define CFG_DP_PEER_FLOW_CTRL \
  787. CFG_INI_BOOL("dp_peer_flow_control_support", false, \
  788. "DP peer flow ctrl Enable")
  789. #define CFG_DP_NAPI \
  790. CFG_INI_BOOL("dp_napi_enabled", PLATFORM_VALUE(true, false), \
  791. "DP Napi Enabled")
  792. /*
  793. * <ini>
  794. * gEnableP2pIpTcpUdpChecksumOffload - Enable checksum offload for P2P mode
  795. * @Min: 0
  796. * @Max: 1
  797. * @Default: 1
  798. *
  799. * This ini entry is used to enable/disable TX checksum(UDP/TCP) for P2P modes.
  800. * This includes P2P device mode, P2P client mode and P2P GO mode.
  801. * The feature is enabled by default. To disable TX checksum for P2P, add the
  802. * following entry in ini file:
  803. * gEnableP2pIpTcpUdpChecksumOffload=0
  804. *
  805. * Usage: External
  806. *
  807. * </ini>
  808. */
  809. #define CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD \
  810. CFG_INI_BOOL("gEnableP2pIpTcpUdpChecksumOffload", true, \
  811. "DP TCP UDP Checksum Offload for P2P mode (device/cli/go)")
  812. /*
  813. * <ini>
  814. * gEnableNanIpTcpUdpChecksumOffload - Enable checksum offload for NAN mode
  815. * @Min: 0
  816. * @Max: 1
  817. * @Default: 1
  818. *
  819. * Usage: External
  820. *
  821. * </ini>
  822. */
  823. #define CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD \
  824. CFG_INI_BOOL("gEnableNanIpTcpUdpChecksumOffload", true, \
  825. "DP TCP UDP Checksum Offload for NAN mode")
  826. /*
  827. * <ini>
  828. * gEnableIpTcpUdpChecksumOffload - Enable checksum offload
  829. * @Min: 0
  830. * @Max: 1
  831. * @Default: 1
  832. *
  833. * Usage: External
  834. *
  835. * </ini>
  836. */
  837. #define CFG_DP_TCP_UDP_CKSUM_OFFLOAD \
  838. CFG_INI_BOOL("gEnableIpTcpUdpChecksumOffload", true, \
  839. "DP TCP UDP Checksum Offload")
  840. #define CFG_DP_DEFRAG_TIMEOUT_CHECK \
  841. CFG_INI_BOOL("dp_defrag_timeout_check", true, \
  842. "DP Defrag Timeout Check")
  843. #define CFG_DP_WBM_RELEASE_RING \
  844. CFG_INI_UINT("dp_wbm_release_ring", \
  845. WLAN_CFG_WBM_RELEASE_RING_SIZE_MIN, \
  846. WLAN_CFG_WBM_RELEASE_RING_SIZE_MAX, \
  847. WLAN_CFG_WBM_RELEASE_RING_SIZE, \
  848. CFG_VALUE_OR_DEFAULT, "DP WBM Release Ring")
  849. #define CFG_DP_TCL_CMD_CREDIT_RING \
  850. CFG_INI_UINT("dp_tcl_cmd_credit_ring", \
  851. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MIN, \
  852. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE_MAX, \
  853. WLAN_CFG_TCL_CMD_CREDIT_RING_SIZE, \
  854. CFG_VALUE_OR_DEFAULT, "DP TCL Cmd_Credit ring")
  855. #define CFG_DP_TCL_STATUS_RING \
  856. CFG_INI_UINT("dp_tcl_status_ring",\
  857. WLAN_CFG_TCL_STATUS_RING_SIZE_MIN, \
  858. WLAN_CFG_TCL_STATUS_RING_SIZE_MAX, \
  859. WLAN_CFG_TCL_STATUS_RING_SIZE, \
  860. CFG_VALUE_OR_DEFAULT, "DP TCL status ring")
  861. #define CFG_DP_REO_REINJECT_RING \
  862. CFG_INI_UINT("dp_reo_reinject_ring", \
  863. WLAN_CFG_REO_REINJECT_RING_SIZE_MIN, \
  864. WLAN_CFG_REO_REINJECT_RING_SIZE_MAX, \
  865. WLAN_CFG_REO_REINJECT_RING_SIZE, \
  866. CFG_VALUE_OR_DEFAULT, "DP REO reinject ring")
  867. #define CFG_DP_RX_RELEASE_RING \
  868. CFG_INI_UINT("dp_rx_release_ring", \
  869. WLAN_CFG_RX_RELEASE_RING_SIZE_MIN, \
  870. WLAN_CFG_RX_RELEASE_RING_SIZE_MAX, \
  871. WLAN_CFG_RX_RELEASE_RING_SIZE, \
  872. CFG_VALUE_OR_DEFAULT, "DP Rx release ring")
  873. #define CFG_DP_RX_DESTINATION_RING \
  874. CFG_INI_UINT("dp_reo_dst_ring", \
  875. WLAN_CFG_REO_DST_RING_SIZE_MIN, \
  876. WLAN_CFG_REO_DST_RING_SIZE_MAX, \
  877. WLAN_CFG_REO_DST_RING_SIZE, \
  878. CFG_VALUE_OR_DEFAULT, "DP REO destination ring")
  879. #define CFG_DP_REO_EXCEPTION_RING \
  880. CFG_INI_UINT("dp_reo_exception_ring", \
  881. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MIN, \
  882. WLAN_CFG_REO_EXCEPTION_RING_SIZE_MAX, \
  883. WLAN_CFG_REO_EXCEPTION_RING_SIZE, \
  884. CFG_VALUE_OR_DEFAULT, "DP REO exception ring")
  885. #define CFG_DP_REO_CMD_RING \
  886. CFG_INI_UINT("dp_reo_cmd_ring", \
  887. WLAN_CFG_REO_CMD_RING_SIZE_MIN, \
  888. WLAN_CFG_REO_CMD_RING_SIZE_MAX, \
  889. WLAN_CFG_REO_CMD_RING_SIZE, \
  890. CFG_VALUE_OR_DEFAULT, "DP REO command ring")
  891. #define CFG_DP_REO_STATUS_RING \
  892. CFG_INI_UINT("dp_reo_status_ring", \
  893. WLAN_CFG_REO_STATUS_RING_SIZE_MIN, \
  894. WLAN_CFG_REO_STATUS_RING_SIZE_MAX, \
  895. WLAN_CFG_REO_STATUS_RING_SIZE, \
  896. CFG_VALUE_OR_DEFAULT, "DP REO status ring")
  897. #define CFG_DP_RXDMA_BUF_RING \
  898. CFG_INI_UINT("dp_rxdma_buf_ring", \
  899. WLAN_CFG_RXDMA_BUF_RING_SIZE_MIN, \
  900. WLAN_CFG_RXDMA_BUF_RING_SIZE_MAX, \
  901. WLAN_CFG_RXDMA_BUF_RING_SIZE, \
  902. CFG_VALUE_OR_DEFAULT, "DP RXDMA buffer ring")
  903. #define CFG_DP_RXDMA_REFILL_RING \
  904. CFG_INI_UINT("dp_rxdma_refill_ring", \
  905. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MIN, \
  906. WLAN_CFG_RXDMA_REFILL_RING_SIZE_MAX, \
  907. WLAN_CFG_RXDMA_REFILL_RING_SIZE, \
  908. CFG_VALUE_OR_DEFAULT, "DP RXDMA refilll ring")
  909. #define CFG_DP_TX_DESC_LIMIT_0 \
  910. CFG_INI_UINT("dp_tx_desc_limit_0", \
  911. WLAN_CFG_TX_DESC_LIMIT_0_MIN, \
  912. WLAN_CFG_TX_DESC_LIMIT_0_MAX, \
  913. WLAN_CFG_TX_DESC_LIMIT_0, \
  914. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 0")
  915. #define CFG_DP_TX_DESC_LIMIT_1 \
  916. CFG_INI_UINT("dp_tx_desc_limit_1", \
  917. WLAN_CFG_TX_DESC_LIMIT_1_MIN, \
  918. WLAN_CFG_TX_DESC_LIMIT_1_MAX, \
  919. WLAN_CFG_TX_DESC_LIMIT_1, \
  920. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 1")
  921. #define CFG_DP_TX_DESC_LIMIT_2 \
  922. CFG_INI_UINT("dp_tx_desc_limit_2", \
  923. WLAN_CFG_TX_DESC_LIMIT_2_MIN, \
  924. WLAN_CFG_TX_DESC_LIMIT_2_MAX, \
  925. WLAN_CFG_TX_DESC_LIMIT_2, \
  926. CFG_VALUE_OR_DEFAULT, "DP TX DESC limit 2")
  927. #define CFG_DP_TX_DEVICE_LIMIT \
  928. CFG_INI_UINT("dp_tx_device_limit", \
  929. WLAN_CFG_TX_DEVICE_LIMIT_MIN, \
  930. WLAN_CFG_TX_DEVICE_LIMIT_MAX, \
  931. WLAN_CFG_TX_DEVICE_LIMIT, \
  932. CFG_VALUE_OR_DEFAULT, "DP TX DEVICE limit")
  933. #define CFG_DP_TX_SW_INTERNODE_QUEUE \
  934. CFG_INI_UINT("dp_tx_sw_internode_queue", \
  935. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MIN, \
  936. WLAN_CFG_TX_SW_INTERNODE_QUEUE_MAX, \
  937. WLAN_CFG_TX_SW_INTERNODE_QUEUE, \
  938. CFG_VALUE_OR_DEFAULT, "DP TX SW internode queue")
  939. #define CFG_DP_RXDMA_MONITOR_BUF_RING \
  940. CFG_INI_UINT("dp_rxdma_monitor_buf_ring", \
  941. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MIN, \
  942. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE_MAX, \
  943. WLAN_CFG_RXDMA_MONITOR_BUF_RING_SIZE, \
  944. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor buffer ring")
  945. #define CFG_DP_TX_MONITOR_BUF_RING \
  946. CFG_INI_UINT("dp_tx_monitor_buf_ring", \
  947. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MIN, \
  948. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE_MAX, \
  949. WLAN_CFG_TX_MONITOR_BUF_RING_SIZE, \
  950. CFG_VALUE_OR_DEFAULT, "DP TX monitor buffer ring")
  951. #define CFG_DP_RXDMA_MONITOR_DST_RING \
  952. CFG_INI_UINT("dp_rxdma_monitor_dst_ring", \
  953. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MIN, \
  954. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE_MAX, \
  955. WLAN_CFG_RXDMA_MONITOR_DST_RING_SIZE, \
  956. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  957. #define CFG_DP_TX_MONITOR_DST_RING \
  958. CFG_INI_UINT("dp_tx_monitor_dst_ring", \
  959. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MIN, \
  960. WLAN_CFG_TX_MONITOR_DST_RING_SIZE_MAX, \
  961. WLAN_CFG_TX_MONITOR_DST_RING_SIZE, \
  962. CFG_VALUE_OR_DEFAULT, "DP TX monitor destination ring")
  963. #define CFG_DP_RXDMA_MONITOR_STATUS_RING \
  964. CFG_INI_UINT("dp_rxdma_monitor_status_ring", \
  965. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MIN, \
  966. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE_MAX, \
  967. WLAN_CFG_RXDMA_MONITOR_STATUS_RING_SIZE, \
  968. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor status ring")
  969. #define CFG_DP_RXDMA_MONITOR_DESC_RING \
  970. CFG_INI_UINT("dp_rxdma_monitor_desc_ring", \
  971. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MIN, \
  972. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE_MAX, \
  973. WLAN_CFG_RXDMA_MONITOR_DESC_RING_SIZE, \
  974. CFG_VALUE_OR_DEFAULT, "DP RXDMA monitor destination ring")
  975. #define CFG_DP_RXDMA_ERR_DST_RING \
  976. CFG_INI_UINT("dp_rxdma_err_dst_ring", \
  977. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MIN, \
  978. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE_MAX, \
  979. WLAN_CFG_RXDMA_ERR_DST_RING_SIZE, \
  980. CFG_VALUE_OR_DEFAULT, "RXDMA err destination ring")
  981. #define CFG_DP_PER_PKT_LOGGING \
  982. CFG_INI_UINT("enable_verbose_debug", \
  983. 0, 0xffff, 0, \
  984. CFG_VALUE_OR_DEFAULT, "Enable excessive per packet logging")
  985. #define CFG_DP_TX_FLOW_START_QUEUE_OFFSET \
  986. CFG_INI_UINT("TxFlowStartQueueOffset", \
  987. 0, 30, WLAN_CFG_TX_FLOW_START_QUEUE_OFFSET, \
  988. CFG_VALUE_OR_DEFAULT, "Start queue offset")
  989. #define CFG_DP_TX_FLOW_STOP_QUEUE_TH \
  990. CFG_INI_UINT("TxFlowStopQueueThreshold", \
  991. 0, 50, 15, \
  992. CFG_VALUE_OR_DEFAULT, "Stop queue Threshold")
  993. #define CFG_DP_IPA_UC_TX_BUF_SIZE \
  994. CFG_INI_UINT("IpaUcTxBufSize", \
  995. 0, 4096, WLAN_CFG_IPA_UC_TX_BUF_SIZE, \
  996. CFG_VALUE_OR_DEFAULT, "IPA tx buffer size")
  997. #define CFG_DP_IPA_UC_TX_PARTITION_BASE \
  998. CFG_INI_UINT("IpaUcTxPartitionBase", \
  999. 0, 9000, WLAN_CFG_IPA_UC_TX_PARTITION_BASE, \
  1000. CFG_VALUE_OR_DEFAULT, "IPA tx partition base")
  1001. #define CFG_DP_IPA_UC_RX_IND_RING_COUNT \
  1002. CFG_INI_UINT("IpaUcRxIndRingCount", \
  1003. 0, 2048, WLAN_CFG_IPA_UC_RX_IND_RING_COUNT, \
  1004. CFG_VALUE_OR_DEFAULT, "IPA rx indication ring count")
  1005. #define CFG_DP_AP_STA_SECURITY_SEPERATION \
  1006. CFG_INI_BOOL("gDisableIntraBssFwd", \
  1007. false, "Disable intrs BSS Rx packets")
  1008. #define CFG_DP_ENABLE_DATA_STALL_DETECTION \
  1009. CFG_INI_UINT("gEnableDataStallDetection", \
  1010. 0, 0xFFFFFFFF, 0x1, \
  1011. CFG_VALUE_OR_DEFAULT, "Enable/Disable Data stall detection")
  1012. #define CFG_DP_RX_SW_DESC_WEIGHT \
  1013. CFG_INI_UINT("dp_rx_sw_desc_weight", \
  1014. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MIN, \
  1015. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE_MAX, \
  1016. WLAN_CFG_RX_SW_DESC_WEIGHT_SIZE, \
  1017. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC weight")
  1018. #define CFG_DP_RX_SW_DESC_NUM \
  1019. CFG_INI_UINT("dp_rx_sw_desc_num", \
  1020. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MIN, \
  1021. WLAN_CFG_RX_SW_DESC_NUM_SIZE_MAX, \
  1022. WLAN_CFG_RX_SW_DESC_NUM_SIZE, \
  1023. CFG_VALUE_OR_DEFAULT, "DP RX SW DESC num")
  1024. #define CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE \
  1025. CFG_INI_UINT("dp_rx_flow_search_table_size", \
  1026. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MIN, \
  1027. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_MAX, \
  1028. WLAN_CFG_RX_FLOW_SEARCH_TABLE_SIZE_DEFAULT, \
  1029. CFG_VALUE_OR_DEFAULT, \
  1030. "DP Rx Flow Search Table Size in number of entries")
  1031. #define CFG_DP_RX_FLOW_TAG_ENABLE \
  1032. CFG_INI_BOOL("dp_rx_flow_tag_enable", false, \
  1033. "Enable/Disable DP Rx Flow Tag")
  1034. #define CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV \
  1035. CFG_INI_BOOL("dp_rx_per_pdev_flow_search", false, \
  1036. "DP Rx Flow Search Table Is Per PDev")
  1037. #define CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE \
  1038. CFG_INI_BOOL("dp_rx_monitor_protocol_flow_tag_enable", true, \
  1039. "Enable/Disable Rx Protocol & Flow tags in Monitor mode")
  1040. #define CFG_DP_TX_PER_PKT_VDEV_ID_CHECK \
  1041. CFG_INI_BOOL("dp_tx_allow_per_pkt_vdev_id_check", false, \
  1042. "Enable/Disable tx Per Pkt vdev id check")
  1043. /*
  1044. * <ini>
  1045. * dp_rx_fisa_enable - Control Rx datapath FISA
  1046. * @Min: 0
  1047. * @Max: 1
  1048. * @Default: 1
  1049. *
  1050. * This ini is used to enable DP Rx FISA feature
  1051. *
  1052. * Related: dp_rx_flow_search_table_size
  1053. *
  1054. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1055. *
  1056. * Usage: Internal
  1057. *
  1058. * </ini>
  1059. */
  1060. #define CFG_DP_RX_FISA_ENABLE \
  1061. CFG_INI_BOOL("dp_rx_fisa_enable", true, \
  1062. "Enable/Disable DP Rx FISA")
  1063. /*
  1064. * <ini>
  1065. * dp_rx_fisa_lru_del_enable - Control Rx datapath FISA
  1066. * @Min: 0
  1067. * @Max: 1
  1068. * @Default: 1
  1069. *
  1070. * This ini is used to enable DP Rx FISA lru deletion feature
  1071. *
  1072. * Related: dp_rx_fisa_enable
  1073. *
  1074. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1075. *
  1076. * Usage: Internal
  1077. *
  1078. * </ini>
  1079. */
  1080. #define CFG_DP_RX_FISA_LRU_DEL_ENABLE \
  1081. CFG_INI_BOOL("dp_rx_fisa_lru_del_enable", true, \
  1082. "Enable/Disable DP Rx FISA LRU deletion")
  1083. #define CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD \
  1084. CFG_INI_UINT("mon_drop_thresh", \
  1085. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MIN, \
  1086. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE_MAX, \
  1087. WLAN_CFG_RXDMA_MONITOR_RX_DROP_THRESH_SIZE, \
  1088. CFG_VALUE_OR_DEFAULT, "RXDMA monitor rx drop theshold")
  1089. #define CFG_DP_PKTLOG_BUFFER_SIZE \
  1090. CFG_INI_UINT("PktlogBufSize", \
  1091. WLAN_CFG_PKTLOG_MIN_BUFFER_SIZE, \
  1092. WLAN_CFG_PKTLOG_MAX_BUFFER_SIZE, \
  1093. WLAN_CFG_PKTLOG_BUFFER_SIZE, \
  1094. CFG_VALUE_OR_DEFAULT, "Packet Log buffer size")
  1095. #define CFG_DP_FULL_MON_MODE \
  1096. CFG_INI_BOOL("full_mon_mode", \
  1097. false, "Full Monitor mode support")
  1098. #define CFG_DP_REO_RINGS_MAP \
  1099. CFG_INI_UINT("dp_reo_rings_map", \
  1100. WLAN_CFG_NUM_REO_RINGS_MAP_MIN, \
  1101. WLAN_CFG_NUM_REO_RINGS_MAP_MAX, \
  1102. WLAN_CFG_NUM_REO_RINGS_MAP, \
  1103. CFG_VALUE_OR_DEFAULT, "REO Destination Rings Mapping")
  1104. #define CFG_DP_RX_RADIO_0_DEFAULT_REO \
  1105. CFG_INI_UINT("dp_rx_radio0_default_reo", \
  1106. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1107. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1108. WLAN_CFG_RADIO_0_DEFAULT_REO, \
  1109. CFG_VALUE_OR_DEFAULT, "Radio0 to REO destination default mapping")
  1110. #define CFG_DP_RX_RADIO_1_DEFAULT_REO \
  1111. CFG_INI_UINT("dp_rx_radio1_default_reo", \
  1112. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1113. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1114. WLAN_CFG_RADIO_1_DEFAULT_REO, \
  1115. CFG_VALUE_OR_DEFAULT, "Radio1 to REO destination default mapping")
  1116. #define CFG_DP_RX_RADIO_2_DEFAULT_REO \
  1117. CFG_INI_UINT("dp_rx_radio2_default_reo", \
  1118. WLAN_CFG_RADIO_DEFAULT_REO_MIN, \
  1119. WLAN_CFG_RADIO_DEFAULT_REO_MAX, \
  1120. WLAN_CFG_RADIO_2_DEFAULT_REO, \
  1121. CFG_VALUE_OR_DEFAULT, "Radio2 to REO destination default mapping")
  1122. #define CFG_DP_PEER_EXT_STATS \
  1123. CFG_INI_BOOL("peer_ext_stats", \
  1124. false, "Peer extended stats")
  1125. #define CFG_DP_NAPI_SCALE_FACTOR \
  1126. CFG_INI_UINT("dp_napi_scale_factor", \
  1127. WLAN_CFG_DP_NAPI_SCALE_FACTOR_MIN, \
  1128. WLAN_CFG_DP_NAPI_SCALE_FACTOR_MAX, \
  1129. WLAN_CFG_DP_NAPI_SCALE_FACTOR, \
  1130. CFG_VALUE_OR_DEFAULT, "NAPI scale factor for DP")
  1131. /*
  1132. * <ini>
  1133. * legacy_mode_csum_disable - Disable csum offload for legacy 802.11abg modes
  1134. * @Min: 0
  1135. * @Max: 1
  1136. * @Default: Default value indicating if checksum should be disabled for
  1137. * legacy WLAN modes
  1138. *
  1139. * This ini is used to disable HW checksum offload capability for legacy
  1140. * connections
  1141. *
  1142. * Related: gEnableIpTcpUdpChecksumOffload should be enabled
  1143. *
  1144. * Usage: Internal
  1145. *
  1146. * </ini>
  1147. */
  1148. #ifndef DP_LEGACY_MODE_CSM_DEFAULT_DISABLE
  1149. #define DP_LEGACY_MODE_CSM_DEFAULT_DISABLE 1
  1150. #endif
  1151. #define CFG_DP_LEGACY_MODE_CSUM_DISABLE \
  1152. CFG_INI_BOOL("legacy_mode_csum_disable", \
  1153. DP_LEGACY_MODE_CSM_DEFAULT_DISABLE, \
  1154. "Enable/Disable legacy mode checksum")
  1155. #define CFG_DP_RX_BUFF_POOL_ENABLE \
  1156. CFG_INI_BOOL("dp_rx_buff_prealloc_pool", false, \
  1157. "Enable/Disable DP RX emergency buffer pool support")
  1158. #define CFG_DP_RX_REFILL_BUFF_POOL_ENABLE \
  1159. CFG_INI_BOOL("dp_rx_refill_buff_pool", false, \
  1160. "Enable/Disable DP RX refill buffer pool support")
  1161. #define CFG_DP_POLL_MODE_ENABLE \
  1162. CFG_INI_BOOL("dp_poll_mode_enable", false, \
  1163. "Enable/Disable Polling mode for data path")
  1164. #define CFG_DP_RX_FST_IN_CMEM \
  1165. CFG_INI_BOOL("dp_rx_fst_in_cmem", false, \
  1166. "Enable/Disable flow search table in CMEM")
  1167. /*
  1168. * <ini>
  1169. * gEnableSWLM - Control DP Software latency manager
  1170. * @Min: 0
  1171. * @Max: 1
  1172. * @Default: 0
  1173. *
  1174. * This ini is used to enable DP Software latency Manager
  1175. *
  1176. * Supported Feature: STA,P2P and SAP IPA disabled terminating
  1177. *
  1178. * Usage: Internal
  1179. *
  1180. * </ini>
  1181. */
  1182. #define CFG_DP_SWLM_ENABLE \
  1183. CFG_INI_BOOL("gEnableSWLM", false, \
  1184. "Enable/Disable DP SWLM")
  1185. /*
  1186. * <ini>
  1187. * wow_check_rx_pending_enable - control to check RX frames pending in Wow
  1188. * @Min: 0
  1189. * @Max: 1
  1190. * @Default: 0
  1191. *
  1192. * This ini is used to control DP Software to perform RX pending check
  1193. * before entering WoW mode
  1194. *
  1195. * Usage: Internal
  1196. *
  1197. * </ini>
  1198. */
  1199. #define CFG_DP_WOW_CHECK_RX_PENDING \
  1200. CFG_INI_BOOL("wow_check_rx_pending_enable", \
  1201. false, \
  1202. "enable rx frame pending check in WoW mode")
  1203. #define CFG_DP_DELAY_MON_REPLENISH \
  1204. CFG_INI_BOOL("delay_mon_replenish", \
  1205. true, "Delay Monitor Replenish")
  1206. #ifdef QCA_VDEV_STATS_HW_OFFLOAD_SUPPORT
  1207. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN 500
  1208. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX 2000
  1209. #define WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER 500
  1210. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG \
  1211. CFG_INI_BOOL("vdev_stats_hw_offload_config", \
  1212. false, "Offload vdev stats to HW")
  1213. #define CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER \
  1214. CFG_INI_UINT("vdev_stats_hw_offload_timer", \
  1215. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MIN, \
  1216. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER_MAX, \
  1217. WLAN_CFG_INT_VDEV_STATS_HW_OFFLOAD_TIMER, \
  1218. CFG_VALUE_OR_DEFAULT, \
  1219. "vdev stats hw offload timer duration")
  1220. #define CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1221. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_CONFIG) \
  1222. CFG(CFG_DP_VDEV_STATS_HW_OFFLOAD_TIMER)
  1223. #else
  1224. #define CFG_DP_VDEV_STATS_HW_OFFLOAD
  1225. #endif
  1226. /*
  1227. * <ini>
  1228. * ghw_cc_enable - enable HW cookie conversion by register
  1229. * @Min: 0
  1230. * @Max: 1
  1231. * @Default: 1
  1232. *
  1233. * This ini is used to control HW based 20 bits cookie to 64 bits
  1234. * Desc virtual address conversion
  1235. *
  1236. * Usage: Internal
  1237. *
  1238. * </ini>
  1239. */
  1240. #define CFG_DP_HW_CC_ENABLE \
  1241. CFG_INI_BOOL("ghw_cc_enable", \
  1242. true, "Enable/Disable HW cookie conversion")
  1243. #ifdef IPA_OFFLOAD
  1244. /*
  1245. * <ini>
  1246. * dp_ipa_tx_ring_size - Set tcl ring size for IPA
  1247. * @Min: 1024
  1248. * @Max: 8096
  1249. * @Default: 1024
  1250. *
  1251. * This ini sets the tcl ring size for IPA
  1252. *
  1253. * Related: N/A
  1254. *
  1255. * Supported Feature: IPA
  1256. *
  1257. * Usage: Internal
  1258. *
  1259. * </ini>
  1260. */
  1261. #define CFG_DP_IPA_TX_RING_SIZE \
  1262. CFG_INI_UINT("dp_ipa_tx_ring_size", \
  1263. WLAN_CFG_IPA_TX_RING_SIZE_MIN, \
  1264. WLAN_CFG_IPA_TX_RING_SIZE_MAX, \
  1265. WLAN_CFG_IPA_TX_RING_SIZE, \
  1266. CFG_VALUE_OR_DEFAULT, "IPA TCL ring size")
  1267. /*
  1268. * <ini>
  1269. * dp_ipa_tx_comp_ring_size - Set tx comp ring size for IPA
  1270. * @Min: 1024
  1271. * @Max: 8096
  1272. * @Default: 1024
  1273. *
  1274. * This ini sets the tx comp ring size for IPA
  1275. *
  1276. * Related: N/A
  1277. *
  1278. * Supported Feature: IPA
  1279. *
  1280. * Usage: Internal
  1281. *
  1282. * </ini>
  1283. */
  1284. #define CFG_DP_IPA_TX_COMP_RING_SIZE \
  1285. CFG_INI_UINT("dp_ipa_tx_comp_ring_size", \
  1286. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MIN, \
  1287. WLAN_CFG_IPA_TX_COMP_RING_SIZE_MAX, \
  1288. WLAN_CFG_IPA_TX_COMP_RING_SIZE, \
  1289. CFG_VALUE_OR_DEFAULT, "IPA tx comp ring size")
  1290. #ifdef IPA_WDI3_TX_TWO_PIPES
  1291. /*
  1292. * <ini>
  1293. * dp_ipa_tx_alt_ring_size - Set alt tcl ring size for IPA
  1294. * @Min: 1024
  1295. * @Max: 8096
  1296. * @Default: 1024
  1297. *
  1298. * This ini sets the alt tcl ring size for IPA
  1299. *
  1300. * Related: N/A
  1301. *
  1302. * Supported Feature: IPA
  1303. *
  1304. * Usage: Internal
  1305. *
  1306. * </ini>
  1307. */
  1308. #define CFG_DP_IPA_TX_ALT_RING_SIZE \
  1309. CFG_INI_UINT("dp_ipa_tx_alt_ring_size", \
  1310. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MIN, \
  1311. WLAN_CFG_IPA_TX_ALT_RING_SIZE_MAX, \
  1312. WLAN_CFG_IPA_TX_ALT_RING_SIZE, \
  1313. CFG_VALUE_OR_DEFAULT, \
  1314. "DP IPA TX Alternative Ring Size")
  1315. /*
  1316. * <ini>
  1317. * dp_ipa_tx_alt_comp_ring_size - Set tx alt comp ring size for IPA
  1318. * @Min: 1024
  1319. * @Max: 8096
  1320. * @Default: 1024
  1321. *
  1322. * This ini sets the tx alt comp ring size for IPA
  1323. *
  1324. * Related: N/A
  1325. *
  1326. * Supported Feature: IPA
  1327. *
  1328. * Usage: Internal
  1329. *
  1330. * </ini>
  1331. */
  1332. #define CFG_DP_IPA_TX_ALT_COMP_RING_SIZE \
  1333. CFG_INI_UINT("dp_ipa_tx_alt_comp_ring_size", \
  1334. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MIN, \
  1335. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE_MAX, \
  1336. WLAN_CFG_IPA_TX_ALT_COMP_RING_SIZE, \
  1337. CFG_VALUE_OR_DEFAULT, \
  1338. "DP IPA TX Alternative Completion Ring Size")
  1339. #define CFG_DP_IPA_TX_ALT_RING_CFG \
  1340. CFG(CFG_DP_IPA_TX_ALT_RING_SIZE) \
  1341. CFG(CFG_DP_IPA_TX_ALT_COMP_RING_SIZE)
  1342. #else
  1343. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1344. #endif
  1345. #define CFG_DP_IPA_TX_RING_CFG \
  1346. CFG(CFG_DP_IPA_TX_RING_SIZE) \
  1347. CFG(CFG_DP_IPA_TX_COMP_RING_SIZE)
  1348. #else
  1349. #define CFG_DP_IPA_TX_RING_CFG
  1350. #define CFG_DP_IPA_TX_ALT_RING_CFG
  1351. #endif
  1352. #ifdef WLAN_SUPPORT_PPEDS
  1353. #define CFG_DP_PPE_ENABLE \
  1354. CFG_INI_BOOL("ppe_enable", false, \
  1355. "DP ppe enable flag")
  1356. #define CFG_DP_REO2PPE_RING \
  1357. CFG_INI_UINT("dp_reo2ppe_ring", \
  1358. WLAN_CFG_REO2PPE_RING_SIZE_MIN, \
  1359. WLAN_CFG_REO2PPE_RING_SIZE_MAX, \
  1360. WLAN_CFG_REO2PPE_RING_SIZE, \
  1361. CFG_VALUE_OR_DEFAULT, "DP REO2PPE ring")
  1362. #define CFG_DP_PPE2TCL_RING \
  1363. CFG_INI_UINT("dp_ppe2tcl_ring", \
  1364. WLAN_CFG_PPE2TCL_RING_SIZE_MIN, \
  1365. WLAN_CFG_PPE2TCL_RING_SIZE_MAX, \
  1366. WLAN_CFG_PPE2TCL_RING_SIZE, \
  1367. CFG_VALUE_OR_DEFAULT, "DP PPE2TCL rings")
  1368. #define CFG_DP_PPE_RELEASE_RING \
  1369. CFG_INI_UINT("dp_ppe_release_ring", \
  1370. WLAN_CFG_PPE_RELEASE_RING_SIZE_MIN, \
  1371. WLAN_CFG_PPE_RELEASE_RING_SIZE_MAX, \
  1372. WLAN_CFG_PPE_RELEASE_RING_SIZE, \
  1373. CFG_VALUE_OR_DEFAULT, "DP PPE Release Ring")
  1374. #define CFG_DP_PPE_CONFIG \
  1375. CFG(CFG_DP_PPE_ENABLE) \
  1376. CFG(CFG_DP_REO2PPE_RING) \
  1377. CFG(CFG_DP_PPE2TCL_RING) \
  1378. CFG(CFG_DP_PPE_RELEASE_RING)
  1379. #else
  1380. #define CFG_DP_PPE_CONFIG
  1381. #endif
  1382. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  1383. /*
  1384. * <ini>
  1385. * dp_chip0_rx_ring_map - Set Rx ring map for CHIP 0
  1386. * @Min: 0x0
  1387. * @Max: 0xFF
  1388. * @Default: 0xF
  1389. *
  1390. * This ini sets Rx ring map for CHIP 0
  1391. *
  1392. * Usage: Internal
  1393. *
  1394. * </ini>
  1395. */
  1396. #define CFG_DP_MLO_CHIP0_RX_RING_MAP \
  1397. CFG_INI_UINT("dp_chip0_rx_ring_map", \
  1398. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1399. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1400. WLAN_CFG_MLO_RX_RING_MAP, \
  1401. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip0")
  1402. /*
  1403. * <ini>
  1404. * dp_chip1_rx_ring_map - Set Rx ring map for CHIP 1
  1405. * @Min: 0x0
  1406. * @Max: 0xFF
  1407. * @Default: 0xF
  1408. *
  1409. * This ini sets Rx ring map for CHIP 1
  1410. *
  1411. * Usage: Internal
  1412. *
  1413. * </ini>
  1414. */
  1415. #define CFG_DP_MLO_CHIP1_RX_RING_MAP \
  1416. CFG_INI_UINT("dp_chip1_rx_ring_map", \
  1417. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1418. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1419. WLAN_CFG_MLO_RX_RING_MAP, \
  1420. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip1")
  1421. /*
  1422. * <ini>
  1423. * dp_chip2_rx_ring_map - Set Rx ring map for CHIP 2
  1424. * @Min: 0x0
  1425. * @Max: 0xFF
  1426. * @Default: 0xF
  1427. *
  1428. * This ini sets Rx ring map for CHIP 2
  1429. *
  1430. * Usage: Internal
  1431. *
  1432. * </ini>
  1433. */
  1434. #define CFG_DP_MLO_CHIP2_RX_RING_MAP \
  1435. CFG_INI_UINT("dp_chip2_rx_ring_map", \
  1436. WLAN_CFG_MLO_RX_RING_MAP_MIN, \
  1437. WLAN_CFG_MLO_RX_RING_MAP_MAX, \
  1438. WLAN_CFG_MLO_RX_RING_MAP, \
  1439. CFG_VALUE_OR_DEFAULT, "DP Rx ring map chip2")
  1440. #define CFG_DP_MLO_CONFIG \
  1441. CFG(CFG_DP_MLO_CHIP0_RX_RING_MAP) \
  1442. CFG(CFG_DP_MLO_CHIP1_RX_RING_MAP) \
  1443. CFG(CFG_DP_MLO_CHIP2_RX_RING_MAP)
  1444. #else
  1445. #define CFG_DP_MLO_CONFIG
  1446. #endif
  1447. /*
  1448. * <ini>
  1449. * dp_mpdu_retry_threshold_1 - threshold to increment mpdu success with retries
  1450. * @Min: 0
  1451. * @Max: 255
  1452. * @Default: 0
  1453. *
  1454. * This ini entry is used to set first threshold to increment the value of
  1455. * mpdu_success_with_retries
  1456. *
  1457. * Usage: Internal
  1458. *
  1459. * </ini>
  1460. */
  1461. #define CFG_DP_MPDU_RETRY_THRESHOLD_1 \
  1462. CFG_INI_UINT("dp_mpdu_retry_threshold_1", \
  1463. CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \
  1464. CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \
  1465. CFG_DP_MPDU_RETRY_THRESHOLD, \
  1466. CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 1")
  1467. /*
  1468. * <ini>
  1469. * dp_mpdu_retry_threshold_2 - threshold to increment mpdu success with retries
  1470. * @Min: 0
  1471. * @Max: 255
  1472. * @Default: 0
  1473. *
  1474. * This ini entry is used to set second threshold to increment the value of
  1475. * mpdu_success_with_retries
  1476. *
  1477. * Usage: Internal
  1478. *
  1479. * </ini>
  1480. */
  1481. #define CFG_DP_MPDU_RETRY_THRESHOLD_2 \
  1482. CFG_INI_UINT("dp_mpdu_retry_threshold_2", \
  1483. CFG_DP_MPDU_RETRY_THRESHOLD_MIN, \
  1484. CFG_DP_MPDU_RETRY_THRESHOLD_MAX, \
  1485. CFG_DP_MPDU_RETRY_THRESHOLD, \
  1486. CFG_VALUE_OR_DEFAULT, "DP mpdu retry threshold 2")
  1487. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  1488. /* Macro enabling support marking of notify frames by host */
  1489. #define DP_MARK_NOTIFY_FRAME_SUPPORT 1
  1490. #else
  1491. #define DP_MARK_NOTIFY_FRAME_SUPPORT 0
  1492. #endif /* QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES */
  1493. /*
  1494. * <ini>
  1495. * Host DP AST entries database - Enable/Disable
  1496. *
  1497. * @Default: 0
  1498. *
  1499. * This ini enables/disables AST entries database on host
  1500. *
  1501. * Usage: Internal
  1502. *
  1503. * </ini>
  1504. */
  1505. #define CFG_DP_HOST_AST_DB_ENABLE \
  1506. CFG_INI_BOOL("host_ast_db_enable", false, \
  1507. "Host AST entries database Enable/Disable")
  1508. #define CFG_DP \
  1509. CFG(CFG_DP_HTT_PACKET_TYPE) \
  1510. CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
  1511. CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
  1512. CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
  1513. CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
  1514. CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
  1515. CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \
  1516. CFG(CFG_DP_MAX_ALLOC_SIZE) \
  1517. CFG(CFG_DP_MAX_CLIENTS) \
  1518. CFG(CFG_DP_MAX_PEER_ID) \
  1519. CFG(CFG_DP_REO_DEST_RINGS) \
  1520. CFG(CFG_DP_TX_COMP_RINGS) \
  1521. CFG(CFG_DP_TCL_DATA_RINGS) \
  1522. CFG(CFG_DP_NSS_REO_DEST_RINGS) \
  1523. CFG(CFG_DP_NSS_TCL_DATA_RINGS) \
  1524. CFG(CFG_DP_TX_DESC) \
  1525. CFG(CFG_DP_TX_EXT_DESC) \
  1526. CFG(CFG_DP_TX_EXT_DESC_POOLS) \
  1527. CFG(CFG_DP_PDEV_RX_RING) \
  1528. CFG(CFG_DP_PDEV_TX_RING) \
  1529. CFG(CFG_DP_RX_DEFRAG_TIMEOUT) \
  1530. CFG(CFG_DP_TX_COMPL_RING_SIZE) \
  1531. CFG(CFG_DP_TX_RING_SIZE) \
  1532. CFG(CFG_DP_NSS_COMP_RING_SIZE) \
  1533. CFG(CFG_DP_PDEV_LMAC_RING) \
  1534. CFG(CFG_DP_BASE_HW_MAC_ID) \
  1535. CFG(CFG_DP_RX_HASH) \
  1536. CFG(CFG_DP_TSO) \
  1537. CFG(CFG_DP_LRO) \
  1538. CFG(CFG_DP_SG) \
  1539. CFG(CFG_DP_GRO) \
  1540. CFG(CFG_DP_TC_INGRESS_PRIO) \
  1541. CFG(CFG_DP_OL_TX_CSUM) \
  1542. CFG(CFG_DP_OL_RX_CSUM) \
  1543. CFG(CFG_DP_RAWMODE) \
  1544. CFG(CFG_DP_PEER_FLOW_CTRL) \
  1545. CFG(CFG_DP_NAPI) \
  1546. CFG(CFG_DP_TCP_UDP_CKSUM_OFFLOAD) \
  1547. CFG(CFG_DP_NAN_TCP_UDP_CKSUM_OFFLOAD) \
  1548. CFG(CFG_DP_P2P_TCP_UDP_CKSUM_OFFLOAD) \
  1549. CFG(CFG_DP_DEFRAG_TIMEOUT_CHECK) \
  1550. CFG(CFG_DP_WBM_RELEASE_RING) \
  1551. CFG(CFG_DP_TCL_CMD_CREDIT_RING) \
  1552. CFG(CFG_DP_TCL_STATUS_RING) \
  1553. CFG(CFG_DP_REO_REINJECT_RING) \
  1554. CFG(CFG_DP_RX_RELEASE_RING) \
  1555. CFG(CFG_DP_REO_EXCEPTION_RING) \
  1556. CFG(CFG_DP_RX_DESTINATION_RING) \
  1557. CFG(CFG_DP_REO_CMD_RING) \
  1558. CFG(CFG_DP_REO_STATUS_RING) \
  1559. CFG(CFG_DP_RXDMA_BUF_RING) \
  1560. CFG(CFG_DP_RXDMA_REFILL_RING) \
  1561. CFG(CFG_DP_TX_DESC_LIMIT_0) \
  1562. CFG(CFG_DP_TX_DESC_LIMIT_1) \
  1563. CFG(CFG_DP_TX_DESC_LIMIT_2) \
  1564. CFG(CFG_DP_TX_DEVICE_LIMIT) \
  1565. CFG(CFG_DP_TX_SW_INTERNODE_QUEUE) \
  1566. CFG(CFG_DP_RXDMA_MONITOR_BUF_RING) \
  1567. CFG(CFG_DP_RXDMA_MONITOR_DST_RING) \
  1568. CFG(CFG_DP_RXDMA_MONITOR_STATUS_RING) \
  1569. CFG(CFG_DP_RXDMA_MONITOR_DESC_RING) \
  1570. CFG(CFG_DP_RXDMA_ERR_DST_RING) \
  1571. CFG(CFG_DP_PER_PKT_LOGGING) \
  1572. CFG(CFG_DP_TX_FLOW_START_QUEUE_OFFSET) \
  1573. CFG(CFG_DP_TX_FLOW_STOP_QUEUE_TH) \
  1574. CFG(CFG_DP_IPA_UC_TX_BUF_SIZE) \
  1575. CFG(CFG_DP_IPA_UC_TX_PARTITION_BASE) \
  1576. CFG(CFG_DP_IPA_UC_RX_IND_RING_COUNT) \
  1577. CFG(CFG_DP_AP_STA_SECURITY_SEPERATION) \
  1578. CFG(CFG_DP_ENABLE_DATA_STALL_DETECTION) \
  1579. CFG(CFG_DP_RX_SW_DESC_WEIGHT) \
  1580. CFG(CFG_DP_RX_SW_DESC_NUM) \
  1581. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_SIZE) \
  1582. CFG(CFG_DP_RX_FLOW_TAG_ENABLE) \
  1583. CFG(CFG_DP_RX_FLOW_SEARCH_TABLE_PER_PDEV) \
  1584. CFG(CFG_DP_RX_MON_PROTOCOL_FLOW_TAG_ENABLE) \
  1585. CFG(CFG_DP_RXDMA_MONITOR_RX_DROP_THRESHOLD) \
  1586. CFG(CFG_DP_PKTLOG_BUFFER_SIZE) \
  1587. CFG(CFG_DP_RX_FISA_ENABLE) \
  1588. CFG(CFG_DP_RX_FISA_LRU_DEL_ENABLE) \
  1589. CFG(CFG_DP_FULL_MON_MODE) \
  1590. CFG(CFG_DP_REO_RINGS_MAP) \
  1591. CFG(CFG_DP_PEER_EXT_STATS) \
  1592. CFG(CFG_DP_RX_BUFF_POOL_ENABLE) \
  1593. CFG(CFG_DP_RX_REFILL_BUFF_POOL_ENABLE) \
  1594. CFG(CFG_DP_RX_PENDING_HL_THRESHOLD) \
  1595. CFG(CFG_DP_RX_PENDING_LO_THRESHOLD) \
  1596. CFG(CFG_DP_LEGACY_MODE_CSUM_DISABLE) \
  1597. CFG(CFG_DP_POLL_MODE_ENABLE) \
  1598. CFG(CFG_DP_SWLM_ENABLE) \
  1599. CFG(CFG_DP_TX_PER_PKT_VDEV_ID_CHECK) \
  1600. CFG(CFG_DP_RX_FST_IN_CMEM) \
  1601. CFG(CFG_DP_RX_RADIO_0_DEFAULT_REO) \
  1602. CFG(CFG_DP_RX_RADIO_1_DEFAULT_REO) \
  1603. CFG(CFG_DP_RX_RADIO_2_DEFAULT_REO) \
  1604. CFG(CFG_DP_WOW_CHECK_RX_PENDING) \
  1605. CFG(CFG_DP_HW_CC_ENABLE) \
  1606. CFG(CFG_DP_DELAY_MON_REPLENISH) \
  1607. CFG(CFG_DP_TX_MONITOR_BUF_RING) \
  1608. CFG(CFG_DP_TX_MONITOR_DST_RING) \
  1609. CFG(CFG_DP_MPDU_RETRY_THRESHOLD_1) \
  1610. CFG(CFG_DP_MPDU_RETRY_THRESHOLD_2) \
  1611. CFG_DP_IPA_TX_RING_CFG \
  1612. CFG_DP_PPE_CONFIG \
  1613. CFG_DP_IPA_TX_ALT_RING_CFG \
  1614. CFG_DP_MLO_CONFIG \
  1615. CFG_DP_INI_SECTION_PARAMS \
  1616. CFG_DP_VDEV_STATS_HW_OFFLOAD \
  1617. CFG(CFG_DP_TX_CAPT_MAX_MEM_MB) \
  1618. CFG(CFG_DP_NAPI_SCALE_FACTOR) \
  1619. CFG(CFG_DP_HOST_AST_DB_ENABLE)
  1620. #endif /* _CFG_DP_H_ */