dp_be_rx.c 43 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #include "hal_be_rx_tlv.h"
  32. #ifdef MESH_MODE_SUPPORT
  33. #include "if_meta_hdr.h"
  34. #endif
  35. #include "dp_internal.h"
  36. #include "dp_ipa.h"
  37. #ifdef FEATURE_WDS
  38. #include "dp_txrx_wds.h"
  39. #endif
  40. #include "dp_hist.h"
  41. #include "dp_rx_buffer_pool.h"
  42. #ifndef AST_OFFLOAD_ENABLE
  43. static void
  44. dp_rx_wds_learn(struct dp_soc *soc,
  45. struct dp_vdev *vdev,
  46. uint8_t *rx_tlv_hdr,
  47. struct dp_txrx_peer *txrx_peer,
  48. qdf_nbuf_t nbuf,
  49. struct hal_rx_msdu_metadata msdu_metadata)
  50. {
  51. /* WDS Source Port Learning */
  52. if (qdf_likely(vdev->wds_enabled))
  53. dp_rx_wds_srcport_learn(soc,
  54. rx_tlv_hdr,
  55. txrx_peer,
  56. nbuf,
  57. msdu_metadata);
  58. }
  59. #else
  60. #ifdef QCA_SUPPORT_WDS_EXTENDED
  61. /**
  62. * dp_wds_ext_peer_learn_be() - function to send event to control
  63. * path on receiving 1st 4-address frame from backhaul.
  64. * @soc: DP soc
  65. * @ta_txrx_peer: WDS repeater txrx peer
  66. * @rx_tlv_hdr : start address of rx tlvs
  67. * @nbuf: RX packet buffer
  68. *
  69. * Return: void
  70. */
  71. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  72. struct dp_txrx_peer *ta_txrx_peer,
  73. uint8_t *rx_tlv_hdr,
  74. qdf_nbuf_t nbuf)
  75. {
  76. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  77. struct dp_peer *ta_base_peer;
  78. /* instead of checking addr4 is valid or not in per packet path
  79. * check for init bit, which will be set on reception of
  80. * first addr4 valid packet.
  81. */
  82. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  83. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  84. &ta_txrx_peer->wds_ext.init))
  85. return;
  86. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  87. hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)) {
  88. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  89. &ta_txrx_peer->wds_ext.init);
  90. ta_base_peer = dp_peer_get_ref_by_id(soc, ta_txrx_peer->peer_id,
  91. DP_MOD_ID_RX);
  92. if (!ta_base_peer)
  93. return;
  94. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  95. QDF_MAC_ADDR_SIZE);
  96. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  97. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  98. soc->ctrl_psoc,
  99. ta_txrx_peer->peer_id,
  100. ta_txrx_peer->vdev->vdev_id,
  101. wds_ext_src_mac);
  102. }
  103. }
  104. #else
  105. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  106. struct dp_txrx_peer *ta_txrx_peer,
  107. uint8_t *rx_tlv_hdr,
  108. qdf_nbuf_t nbuf)
  109. {
  110. }
  111. #endif
  112. static void
  113. dp_rx_wds_learn(struct dp_soc *soc,
  114. struct dp_vdev *vdev,
  115. uint8_t *rx_tlv_hdr,
  116. struct dp_txrx_peer *ta_txrx_peer,
  117. qdf_nbuf_t nbuf,
  118. struct hal_rx_msdu_metadata msdu_metadata)
  119. {
  120. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  121. }
  122. #endif
  123. /**
  124. * dp_rx_process_be() - Brain of the Rx processing functionality
  125. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  126. * @int_ctx: per interrupt context
  127. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  128. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  129. * @quota: No. of units (packets) that can be serviced in one shot.
  130. *
  131. * This function implements the core of Rx functionality. This is
  132. * expected to handle only non-error frames.
  133. *
  134. * Return: uint32_t: No. of elements processed
  135. */
  136. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  137. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  138. uint32_t quota)
  139. {
  140. hal_ring_desc_t ring_desc;
  141. hal_soc_handle_t hal_soc;
  142. struct dp_rx_desc *rx_desc = NULL;
  143. qdf_nbuf_t nbuf, next;
  144. bool near_full;
  145. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  146. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  147. uint32_t num_pending;
  148. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  149. uint16_t msdu_len = 0;
  150. uint16_t peer_id;
  151. uint8_t vdev_id;
  152. struct dp_txrx_peer *txrx_peer;
  153. dp_txrx_ref_handle txrx_ref_handle = NULL;
  154. struct dp_vdev *vdev;
  155. uint32_t pkt_len = 0;
  156. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  157. struct hal_rx_msdu_desc_info msdu_desc_info;
  158. enum hal_reo_error_status error;
  159. uint32_t peer_mdata;
  160. uint8_t *rx_tlv_hdr;
  161. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  162. uint8_t mac_id = 0;
  163. struct dp_pdev *rx_pdev;
  164. bool enh_flag;
  165. struct dp_srng *dp_rxdma_srng;
  166. struct rx_desc_pool *rx_desc_pool;
  167. struct dp_soc *soc = int_ctx->soc;
  168. uint8_t core_id = 0;
  169. struct cdp_tid_rx_stats *tid_stats;
  170. qdf_nbuf_t nbuf_head;
  171. qdf_nbuf_t nbuf_tail;
  172. qdf_nbuf_t deliver_list_head;
  173. qdf_nbuf_t deliver_list_tail;
  174. uint32_t num_rx_bufs_reaped = 0;
  175. uint32_t intr_id;
  176. struct hif_opaque_softc *scn;
  177. int32_t tid = 0;
  178. bool is_prev_msdu_last = true;
  179. uint32_t num_entries_avail = 0;
  180. uint32_t rx_ol_pkt_cnt = 0;
  181. uint32_t num_entries = 0;
  182. struct hal_rx_msdu_metadata msdu_metadata;
  183. QDF_STATUS status;
  184. qdf_nbuf_t ebuf_head;
  185. qdf_nbuf_t ebuf_tail;
  186. uint8_t pkt_capture_offload = 0;
  187. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  188. int max_reap_limit, ring_near_full;
  189. struct dp_soc *replenish_soc;
  190. uint8_t chip_id;
  191. DP_HIST_INIT();
  192. qdf_assert_always(soc && hal_ring_hdl);
  193. hal_soc = soc->hal_soc;
  194. qdf_assert_always(hal_soc);
  195. scn = soc->hif_handle;
  196. intr_id = int_ctx->dp_intr_id;
  197. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  198. dp_runtime_pm_mark_last_busy(soc);
  199. more_data:
  200. /* reset local variables here to be re-used in the function */
  201. nbuf_head = NULL;
  202. nbuf_tail = NULL;
  203. deliver_list_head = NULL;
  204. deliver_list_tail = NULL;
  205. txrx_peer = NULL;
  206. vdev = NULL;
  207. num_rx_bufs_reaped = 0;
  208. ebuf_head = NULL;
  209. ebuf_tail = NULL;
  210. ring_near_full = 0;
  211. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  212. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  213. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  214. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  215. qdf_mem_zero(head, sizeof(head));
  216. qdf_mem_zero(tail, sizeof(tail));
  217. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  218. &max_reap_limit);
  219. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  220. /*
  221. * Need API to convert from hal_ring pointer to
  222. * Ring Type / Ring Id combo
  223. */
  224. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  225. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  226. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  227. goto done;
  228. }
  229. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  230. /*
  231. * start reaping the buffers from reo ring and queue
  232. * them in per vdev queue.
  233. * Process the received pkts in a different per vdev loop.
  234. */
  235. while (qdf_likely(quota &&
  236. (ring_desc = hal_srng_dst_peek(hal_soc,
  237. hal_ring_hdl)))) {
  238. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  239. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  240. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  241. soc, hal_ring_hdl, error);
  242. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  243. 1);
  244. /* Don't know how to deal with this -- assert */
  245. qdf_assert(0);
  246. }
  247. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  248. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  249. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  250. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  251. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  252. break;
  253. }
  254. rx_desc = (struct dp_rx_desc *)
  255. hal_rx_get_reo_desc_va(ring_desc);
  256. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  257. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  258. ring_desc, rx_desc);
  259. if (QDF_IS_STATUS_ERROR(status)) {
  260. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  261. qdf_assert_always(!rx_desc->unmapped);
  262. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  263. rx_desc->unmapped = 1;
  264. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  265. rx_desc->pool_id);
  266. dp_rx_add_to_free_desc_list(
  267. &head[rx_desc->chip_id][rx_desc->pool_id],
  268. &tail[rx_desc->chip_id][rx_desc->pool_id],
  269. rx_desc);
  270. }
  271. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  272. continue;
  273. }
  274. /*
  275. * this is a unlikely scenario where the host is reaping
  276. * a descriptor which it already reaped just a while ago
  277. * but is yet to replenish it back to HW.
  278. * In this case host will dump the last 128 descriptors
  279. * including the software descriptor rx_desc and assert.
  280. */
  281. if (qdf_unlikely(!rx_desc->in_use)) {
  282. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  283. dp_info_rl("Reaping rx_desc not in use!");
  284. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  285. ring_desc, rx_desc);
  286. /* ignore duplicate RX desc and continue to process */
  287. /* Pop out the descriptor */
  288. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  289. continue;
  290. }
  291. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  292. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  293. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  294. dp_info_rl("Nbuf sanity check failure!");
  295. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  296. ring_desc, rx_desc);
  297. rx_desc->in_err_state = 1;
  298. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  299. continue;
  300. }
  301. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  302. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  303. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  304. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  305. ring_desc, rx_desc);
  306. }
  307. /* Get MPDU DESC info */
  308. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  309. /* Get MSDU DESC info */
  310. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  311. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  312. HAL_MSDU_F_MSDU_CONTINUATION)) {
  313. /* previous msdu has end bit set, so current one is
  314. * the new MPDU
  315. */
  316. if (is_prev_msdu_last) {
  317. /* Get number of entries available in HW ring */
  318. num_entries_avail =
  319. hal_srng_dst_num_valid(hal_soc,
  320. hal_ring_hdl, 1);
  321. /* For new MPDU check if we can read complete
  322. * MPDU by comparing the number of buffers
  323. * available and number of buffers needed to
  324. * reap this MPDU
  325. */
  326. if ((msdu_desc_info.msdu_len /
  327. (RX_DATA_BUFFER_SIZE -
  328. soc->rx_pkt_tlv_size) + 1) >
  329. num_entries_avail) {
  330. DP_STATS_INC(soc,
  331. rx.msdu_scatter_wait_break,
  332. 1);
  333. dp_rx_cookie_reset_invalid_bit(
  334. ring_desc);
  335. break;
  336. }
  337. is_prev_msdu_last = false;
  338. }
  339. }
  340. core_id = smp_processor_id();
  341. DP_STATS_INC(soc, rx.ring_packets[core_id][reo_ring_num], 1);
  342. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  343. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  344. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  345. HAL_MPDU_F_RAW_AMPDU))
  346. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  347. if (!is_prev_msdu_last &&
  348. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  349. is_prev_msdu_last = true;
  350. /* Pop out the descriptor*/
  351. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  352. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  353. peer_mdata = mpdu_desc_info.peer_meta_data;
  354. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  355. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  356. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  357. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  358. /* to indicate whether this msdu is rx offload */
  359. pkt_capture_offload =
  360. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  361. /*
  362. * save msdu flags first, last and continuation msdu in
  363. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  364. * length to nbuf->cb. This ensures the info required for
  365. * per pkt processing is always in the same cache line.
  366. * This helps in improving throughput for smaller pkt
  367. * sizes.
  368. */
  369. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  370. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  371. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  372. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  373. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  374. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  375. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  376. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  377. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  378. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  379. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  380. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  381. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  382. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  383. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  384. HAL_MPDU_F_QOS_CONTROL_VALID))
  385. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  386. /* set sw exception */
  387. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  388. rx_desc->nbuf,
  389. hal_rx_sw_exception_get_be(ring_desc));
  390. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  391. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  392. /*
  393. * move unmap after scattered msdu waiting break logic
  394. * in case double skb unmap happened.
  395. */
  396. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  397. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  398. rx_desc->unmapped = 1;
  399. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  400. ebuf_tail, rx_desc);
  401. /*
  402. * if continuation bit is set then we have MSDU spread
  403. * across multiple buffers, let us not decrement quota
  404. * till we reap all buffers of that MSDU.
  405. */
  406. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  407. quota -= 1;
  408. dp_rx_add_to_free_desc_list
  409. (&head[rx_desc->chip_id][rx_desc->pool_id],
  410. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  411. num_rx_bufs_reaped++;
  412. /*
  413. * only if complete msdu is received for scatter case,
  414. * then allow break.
  415. */
  416. if (is_prev_msdu_last &&
  417. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  418. max_reap_limit))
  419. break;
  420. }
  421. done:
  422. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  423. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  424. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  425. /*
  426. * continue with next mac_id if no pkts were reaped
  427. * from that pool
  428. */
  429. if (!rx_bufs_reaped[chip_id][mac_id])
  430. continue;
  431. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  432. dp_rxdma_srng =
  433. &replenish_soc->rx_refill_buf_ring[mac_id];
  434. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  435. dp_rx_buffers_replenish(replenish_soc, mac_id,
  436. dp_rxdma_srng, rx_desc_pool,
  437. rx_bufs_reaped[chip_id][mac_id],
  438. &head[chip_id][mac_id],
  439. &tail[chip_id][mac_id]);
  440. }
  441. }
  442. /* Peer can be NULL is case of LFR */
  443. if (qdf_likely(txrx_peer))
  444. vdev = NULL;
  445. /*
  446. * BIG loop where each nbuf is dequeued from global queue,
  447. * processed and queued back on a per vdev basis. These nbufs
  448. * are sent to stack as and when we run out of nbufs
  449. * or a new nbuf dequeued from global queue has a different
  450. * vdev when compared to previous nbuf.
  451. */
  452. nbuf = nbuf_head;
  453. while (nbuf) {
  454. next = nbuf->next;
  455. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  456. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  457. nbuf = next;
  458. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  459. continue;
  460. }
  461. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  462. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  463. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  464. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  465. peer_id, vdev_id)) {
  466. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  467. deliver_list_head,
  468. deliver_list_tail);
  469. deliver_list_head = NULL;
  470. deliver_list_tail = NULL;
  471. }
  472. /* Get TID from struct cb->tid_val, save to tid */
  473. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  474. tid = qdf_nbuf_get_tid_val(nbuf);
  475. if (qdf_unlikely(!txrx_peer)) {
  476. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  477. &txrx_ref_handle,
  478. DP_MOD_ID_RX);
  479. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  480. dp_txrx_peer_unref_delete(txrx_ref_handle,
  481. DP_MOD_ID_RX);
  482. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  483. &txrx_ref_handle,
  484. DP_MOD_ID_RX);
  485. }
  486. if (txrx_peer) {
  487. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  488. qdf_dp_trace_set_track(nbuf, QDF_RX);
  489. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  490. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  491. QDF_NBUF_RX_PKT_DATA_TRACK;
  492. }
  493. rx_bufs_used++;
  494. if (qdf_likely(txrx_peer)) {
  495. vdev = txrx_peer->vdev;
  496. } else {
  497. nbuf->next = NULL;
  498. dp_rx_deliver_to_pkt_capture_no_peer(
  499. soc, nbuf, pkt_capture_offload);
  500. if (!pkt_capture_offload)
  501. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  502. nbuf = next;
  503. continue;
  504. }
  505. if (qdf_unlikely(!vdev)) {
  506. dp_rx_nbuf_free(nbuf);
  507. nbuf = next;
  508. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  509. continue;
  510. }
  511. /* when hlos tid override is enabled, save tid in
  512. * skb->priority
  513. */
  514. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  515. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  516. qdf_nbuf_set_priority(nbuf, tid);
  517. rx_pdev = vdev->pdev;
  518. DP_RX_TID_SAVE(nbuf, tid);
  519. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  520. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  521. soc->wlan_cfg_ctx)) ||
  522. dp_rx_pkt_tracepoints_enabled())
  523. qdf_nbuf_set_timestamp(nbuf);
  524. enh_flag = rx_pdev->enhanced_stats_en;
  525. tid_stats =
  526. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  527. /*
  528. * Check if DMA completed -- msdu_done is the last bit
  529. * to be written
  530. */
  531. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  532. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  533. dp_err("MSDU DONE failure");
  534. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  535. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  536. QDF_TRACE_LEVEL_INFO);
  537. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  538. dp_rx_nbuf_free(nbuf);
  539. qdf_assert(0);
  540. nbuf = next;
  541. continue;
  542. }
  543. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  544. /*
  545. * First IF condition:
  546. * 802.11 Fragmented pkts are reinjected to REO
  547. * HW block as SG pkts and for these pkts we only
  548. * need to pull the RX TLVS header length.
  549. * Second IF condition:
  550. * The below condition happens when an MSDU is spread
  551. * across multiple buffers. This can happen in two cases
  552. * 1. The nbuf size is smaller then the received msdu.
  553. * ex: we have set the nbuf size to 2048 during
  554. * nbuf_alloc. but we received an msdu which is
  555. * 2304 bytes in size then this msdu is spread
  556. * across 2 nbufs.
  557. *
  558. * 2. AMSDUs when RAW mode is enabled.
  559. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  560. * across 1st nbuf and 2nd nbuf and last MSDU is
  561. * spread across 2nd nbuf and 3rd nbuf.
  562. *
  563. * for these scenarios let us create a skb frag_list and
  564. * append these buffers till the last MSDU of the AMSDU
  565. * Third condition:
  566. * This is the most likely case, we receive 802.3 pkts
  567. * decapsulated by HW, here we need to set the pkt length.
  568. */
  569. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr,
  570. &msdu_metadata);
  571. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  572. bool is_mcbc, is_sa_vld, is_da_vld;
  573. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  574. rx_tlv_hdr);
  575. is_sa_vld =
  576. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  577. rx_tlv_hdr);
  578. is_da_vld =
  579. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  580. rx_tlv_hdr);
  581. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  582. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  583. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  584. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  585. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  586. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  587. nbuf = dp_rx_sg_create(soc, nbuf);
  588. next = nbuf->next;
  589. if (qdf_nbuf_is_raw_frame(nbuf)) {
  590. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  591. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  592. rx.raw, 1,
  593. msdu_len);
  594. } else {
  595. dp_rx_nbuf_free(nbuf);
  596. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  597. dp_info_rl("scatter msdu len %d, dropped",
  598. msdu_len);
  599. nbuf = next;
  600. continue;
  601. }
  602. } else {
  603. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  604. pkt_len = msdu_len +
  605. msdu_metadata.l3_hdr_pad +
  606. soc->rx_pkt_tlv_size;
  607. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  608. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  609. }
  610. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  611. /*
  612. * process frame for mulitpass phrase processing
  613. */
  614. if (qdf_unlikely(vdev->multipass_en)) {
  615. if (dp_rx_multipass_process(txrx_peer, nbuf,
  616. tid) == false) {
  617. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  618. rx.multipass_rx_pkt_drop,
  619. 1);
  620. dp_rx_nbuf_free(nbuf);
  621. nbuf = next;
  622. continue;
  623. }
  624. }
  625. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  626. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  627. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  628. rx.policy_check_drop, 1);
  629. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  630. /* Drop & free packet */
  631. dp_rx_nbuf_free(nbuf);
  632. /* Statistics */
  633. nbuf = next;
  634. continue;
  635. }
  636. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  637. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  638. (hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)
  639. == false))) {
  640. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  641. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  642. rx.nawds_mcast_drop, 1);
  643. dp_rx_nbuf_free(nbuf);
  644. nbuf = next;
  645. continue;
  646. }
  647. /*
  648. * Drop non-EAPOL frames from unauthorized peer.
  649. */
  650. if (qdf_likely(txrx_peer) &&
  651. qdf_unlikely(!txrx_peer->authorize) &&
  652. !qdf_nbuf_is_raw_frame(nbuf)) {
  653. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  654. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  655. if (!is_eapol) {
  656. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  657. rx.peer_unauth_rx_pkt_drop,
  658. 1);
  659. dp_rx_nbuf_free(nbuf);
  660. nbuf = next;
  661. continue;
  662. }
  663. }
  664. if (soc->process_rx_status)
  665. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  666. /* Update the protocol tag in SKB based on CCE metadata */
  667. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  668. reo_ring_num, false, true);
  669. /* Update the flow tag in SKB based on FSE metadata */
  670. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  671. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  672. reo_ring_num, tid_stats);
  673. if (qdf_unlikely(vdev->mesh_vdev)) {
  674. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  675. == QDF_STATUS_SUCCESS) {
  676. dp_rx_info("%pK: mesh pkt filtered", soc);
  677. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  678. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  679. 1);
  680. dp_rx_nbuf_free(nbuf);
  681. nbuf = next;
  682. continue;
  683. }
  684. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  685. txrx_peer);
  686. }
  687. if (qdf_likely(vdev->rx_decap_type ==
  688. htt_cmn_pkt_type_ethernet) &&
  689. qdf_likely(!vdev->mesh_vdev)) {
  690. dp_rx_wds_learn(soc, vdev,
  691. rx_tlv_hdr,
  692. txrx_peer,
  693. nbuf,
  694. msdu_metadata);
  695. /* Intrabss-fwd */
  696. if (dp_rx_check_ap_bridge(vdev))
  697. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  698. rx_tlv_hdr,
  699. nbuf,
  700. msdu_metadata)) {
  701. nbuf = next;
  702. tid_stats->intrabss_cnt++;
  703. continue; /* Get next desc */
  704. }
  705. }
  706. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  707. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  708. nbuf);
  709. dp_rx_update_stats(soc, nbuf);
  710. DP_RX_LIST_APPEND(deliver_list_head,
  711. deliver_list_tail,
  712. nbuf);
  713. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  714. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  715. enh_flag);
  716. if (qdf_unlikely(txrx_peer->in_twt))
  717. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  718. rx.to_stack_twt, 1,
  719. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  720. tid_stats->delivered_to_stack++;
  721. nbuf = next;
  722. }
  723. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  724. pkt_capture_offload,
  725. deliver_list_head,
  726. deliver_list_tail);
  727. if (qdf_likely(txrx_peer))
  728. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  729. /*
  730. * If we are processing in near-full condition, there are 3 scenario
  731. * 1) Ring entries has reached critical state
  732. * 2) Ring entries are still near high threshold
  733. * 3) Ring entries are below the safe level
  734. *
  735. * One more loop will move the state to normal processing and yield
  736. */
  737. if (ring_near_full && quota)
  738. goto more_data;
  739. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  740. if (quota) {
  741. num_pending =
  742. dp_rx_srng_get_num_pending(hal_soc,
  743. hal_ring_hdl,
  744. num_entries,
  745. &near_full);
  746. if (num_pending) {
  747. DP_STATS_INC(soc, rx.hp_oos2, 1);
  748. if (!hif_exec_should_yield(scn, intr_id))
  749. goto more_data;
  750. if (qdf_unlikely(near_full)) {
  751. DP_STATS_INC(soc, rx.near_full, 1);
  752. goto more_data;
  753. }
  754. }
  755. }
  756. if (vdev && vdev->osif_fisa_flush)
  757. vdev->osif_fisa_flush(soc, reo_ring_num);
  758. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  759. vdev->osif_gro_flush(vdev->osif_vdev,
  760. reo_ring_num);
  761. }
  762. }
  763. /* Update histogram statistics by looping through pdev's */
  764. DP_RX_HIST_STATS_PER_PDEV();
  765. return rx_bufs_used; /* Assume no scale factor for now */
  766. }
  767. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  768. /**
  769. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  770. * @soc: Handle to DP Soc structure
  771. * @rx_desc_pool: Rx descriptor pool handler
  772. * @pool_id: Rx descriptor pool ID
  773. *
  774. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  775. */
  776. static QDF_STATUS
  777. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  778. struct rx_desc_pool *rx_desc_pool,
  779. uint32_t pool_id)
  780. {
  781. struct dp_hw_cookie_conversion_t *cc_ctx;
  782. struct dp_soc_be *be_soc;
  783. union dp_rx_desc_list_elem_t *rx_desc_elem;
  784. struct dp_spt_page_desc *page_desc;
  785. uint32_t ppt_idx = 0;
  786. uint32_t avail_entry_index = 0;
  787. if (!rx_desc_pool->pool_size) {
  788. dp_err("desc_num 0 !!");
  789. return QDF_STATUS_E_FAILURE;
  790. }
  791. be_soc = dp_get_be_soc_from_dp_soc(soc);
  792. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  793. page_desc = &cc_ctx->page_desc_base[0];
  794. rx_desc_elem = rx_desc_pool->freelist;
  795. while (rx_desc_elem) {
  796. if (avail_entry_index == 0) {
  797. if (ppt_idx >= cc_ctx->total_page_num) {
  798. dp_alert("insufficient secondary page tables");
  799. qdf_assert_always(0);
  800. }
  801. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  802. }
  803. /* put each RX Desc VA to SPT pages and
  804. * get corresponding ID
  805. */
  806. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  807. avail_entry_index,
  808. &rx_desc_elem->rx_desc);
  809. rx_desc_elem->rx_desc.cookie =
  810. dp_cc_desc_id_generate(page_desc->ppt_index,
  811. avail_entry_index);
  812. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  813. rx_desc_elem->rx_desc.pool_id = pool_id;
  814. rx_desc_elem->rx_desc.in_use = 0;
  815. rx_desc_elem = rx_desc_elem->next;
  816. avail_entry_index = (avail_entry_index + 1) &
  817. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  818. }
  819. return QDF_STATUS_SUCCESS;
  820. }
  821. #else
  822. static QDF_STATUS
  823. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  824. struct rx_desc_pool *rx_desc_pool,
  825. uint32_t pool_id)
  826. {
  827. struct dp_hw_cookie_conversion_t *cc_ctx;
  828. struct dp_soc_be *be_soc;
  829. struct dp_spt_page_desc *page_desc;
  830. uint32_t ppt_idx = 0;
  831. uint32_t avail_entry_index = 0;
  832. int i = 0;
  833. if (!rx_desc_pool->pool_size) {
  834. dp_err("desc_num 0 !!");
  835. return QDF_STATUS_E_FAILURE;
  836. }
  837. be_soc = dp_get_be_soc_from_dp_soc(soc);
  838. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  839. page_desc = &cc_ctx->page_desc_base[0];
  840. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  841. if (i == rx_desc_pool->pool_size - 1)
  842. rx_desc_pool->array[i].next = NULL;
  843. else
  844. rx_desc_pool->array[i].next =
  845. &rx_desc_pool->array[i + 1];
  846. if (avail_entry_index == 0) {
  847. if (ppt_idx >= cc_ctx->total_page_num) {
  848. dp_alert("insufficient secondary page tables");
  849. qdf_assert_always(0);
  850. }
  851. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  852. }
  853. /* put each RX Desc VA to SPT pages and
  854. * get corresponding ID
  855. */
  856. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  857. avail_entry_index,
  858. &rx_desc_pool->array[i].rx_desc);
  859. rx_desc_pool->array[i].rx_desc.cookie =
  860. dp_cc_desc_id_generate(page_desc->ppt_index,
  861. avail_entry_index);
  862. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  863. rx_desc_pool->array[i].rx_desc.in_use = 0;
  864. rx_desc_pool->array[i].rx_desc.chip_id =
  865. dp_mlo_get_chip_id(soc);
  866. avail_entry_index = (avail_entry_index + 1) &
  867. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  868. }
  869. return QDF_STATUS_SUCCESS;
  870. }
  871. #endif
  872. static void
  873. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  874. struct rx_desc_pool *rx_desc_pool,
  875. uint32_t pool_id)
  876. {
  877. struct dp_spt_page_desc *page_desc;
  878. struct dp_soc_be *be_soc;
  879. int i = 0;
  880. struct dp_hw_cookie_conversion_t *cc_ctx;
  881. be_soc = dp_get_be_soc_from_dp_soc(soc);
  882. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  883. for (i = 0; i < cc_ctx->total_page_num; i++) {
  884. page_desc = &cc_ctx->page_desc_base[i];
  885. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  886. }
  887. }
  888. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  889. struct rx_desc_pool *rx_desc_pool,
  890. uint32_t pool_id)
  891. {
  892. QDF_STATUS status = QDF_STATUS_SUCCESS;
  893. /* Only regular RX buffer desc pool use HW cookie conversion */
  894. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  895. dp_info("rx_desc_buf pool init");
  896. status = dp_rx_desc_pool_init_be_cc(soc,
  897. rx_desc_pool,
  898. pool_id);
  899. } else {
  900. dp_info("non_rx_desc_buf_pool init");
  901. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  902. pool_id);
  903. }
  904. return status;
  905. }
  906. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  907. struct rx_desc_pool *rx_desc_pool,
  908. uint32_t pool_id)
  909. {
  910. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  911. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  912. }
  913. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  914. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  915. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  916. void *ring_desc,
  917. struct dp_rx_desc **r_rx_desc)
  918. {
  919. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  920. /* HW cookie conversion done */
  921. *r_rx_desc = (struct dp_rx_desc *)
  922. hal_rx_wbm_get_desc_va(ring_desc);
  923. } else {
  924. /* SW do cookie conversion */
  925. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  926. *r_rx_desc = (struct dp_rx_desc *)
  927. dp_cc_desc_find(soc, cookie);
  928. }
  929. return QDF_STATUS_SUCCESS;
  930. }
  931. #else
  932. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  933. void *ring_desc,
  934. struct dp_rx_desc **r_rx_desc)
  935. {
  936. *r_rx_desc = (struct dp_rx_desc *)
  937. hal_rx_wbm_get_desc_va(ring_desc);
  938. return QDF_STATUS_SUCCESS;
  939. }
  940. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  941. #else
  942. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  943. void *ring_desc,
  944. struct dp_rx_desc **r_rx_desc)
  945. {
  946. /* SW do cookie conversion */
  947. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  948. *r_rx_desc = (struct dp_rx_desc *)
  949. dp_cc_desc_find(soc, cookie);
  950. return QDF_STATUS_SUCCESS;
  951. }
  952. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  953. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  954. uint32_t cookie)
  955. {
  956. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  957. }
  958. #if defined(WLAN_FEATURE_11BE_MLO)
  959. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  960. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  961. #define DP_RANDOM_MAC_OFFSET 1
  962. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  963. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  964. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  965. qdf_nbuf_t nbuf)
  966. {
  967. uint8_t random_mac[QDF_MAC_ADDR_SIZE] = {0};
  968. qdf_ether_header_t *eh =
  969. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  970. qdf_mem_copy(random_mac, &vdev->mld_mac_addr.raw[0], QDF_MAC_ADDR_SIZE);
  971. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  972. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  973. DP_MAC_LOCAL_ADMBIT_MASK;
  974. random_mac[DP_RANDOM_MAC_OFFSET] =
  975. random_mac[DP_RANDOM_MAC_OFFSET] ^ DP_RANDOM_MAC_ID_BIT_MASK;
  976. qdf_mem_copy(&eh->ether_shost[0], random_mac, QDF_MAC_ADDR_SIZE);
  977. }
  978. #ifdef QCA_SUPPORT_WDS_EXTENDED
  979. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  980. {
  981. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  982. }
  983. #else
  984. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  985. {
  986. return false;
  987. }
  988. #endif
  989. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  990. struct dp_vdev *vdev,
  991. struct dp_txrx_peer *peer,
  992. qdf_nbuf_t nbuf)
  993. {
  994. struct dp_vdev *mcast_primary_vdev = NULL;
  995. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  996. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  997. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  998. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  999. return false;
  1000. /*
  1001. * In the case of ME6, Backhaul WDS, NAWDS
  1002. * send the igmp pkt on the same link where it received,
  1003. * as these features will use peer based tcl metadata
  1004. */
  1005. qdf_nbuf_set_next(nbuf, NULL);
  1006. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1007. peer->nawds_enabled)
  1008. goto send_pkt;
  1009. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1010. goto send_pkt;
  1011. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1012. DP_MOD_ID_RX);
  1013. if (!mcast_primary_vdev) {
  1014. dp_rx_debug("Non mlo vdev");
  1015. goto send_pkt;
  1016. }
  1017. if (qdf_unlikely(vdev->wrap_vdev)) {
  1018. /* In the case of qwrap repeater send the original
  1019. * packet on the interface where it received,
  1020. * packet with dummy src on the mcast primary interface.
  1021. */
  1022. qdf_nbuf_t nbuf_copy;
  1023. nbuf_copy = qdf_nbuf_copy(nbuf);
  1024. if (qdf_likely(nbuf_copy))
  1025. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy,
  1026. NULL);
  1027. }
  1028. dp_rx_dummy_src_mac(vdev, nbuf);
  1029. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1030. mcast_primary_vdev,
  1031. peer,
  1032. nbuf,
  1033. NULL);
  1034. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1035. mcast_primary_vdev,
  1036. DP_MOD_ID_RX);
  1037. return true;
  1038. send_pkt:
  1039. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1040. &be_vdev->vdev,
  1041. peer,
  1042. nbuf,
  1043. NULL);
  1044. return true;
  1045. }
  1046. #else
  1047. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1048. struct dp_vdev *vdev,
  1049. struct dp_txrx_peer *peer,
  1050. qdf_nbuf_t nbuf)
  1051. {
  1052. return false;
  1053. }
  1054. #endif
  1055. #endif
  1056. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1057. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1058. hal_ring_handle_t hal_ring_hdl,
  1059. uint8_t reo_ring_num,
  1060. uint32_t quota)
  1061. {
  1062. struct dp_soc *soc = int_ctx->soc;
  1063. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1064. uint32_t work_done = 0;
  1065. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1066. DP_SRNG_THRESH_NEAR_FULL)
  1067. return 0;
  1068. qdf_atomic_set(&rx_ring->near_full, 1);
  1069. work_done++;
  1070. return work_done;
  1071. }
  1072. #endif
  1073. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1074. #ifdef WLAN_FEATURE_11BE_MLO
  1075. /**
  1076. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1077. * @ta_peer: transmitter peer handle
  1078. * @da_peer: destination peer handle
  1079. *
  1080. * Return: true - MLO forwarding case, false: not
  1081. */
  1082. static inline bool
  1083. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1084. struct dp_txrx_peer *da_peer)
  1085. {
  1086. /* one of TA/DA peer should belong to MLO connection peer,
  1087. * only MLD peer type is as expected
  1088. */
  1089. if (!IS_MLO_DP_MLD_TXRX_PEER(ta_peer) &&
  1090. !IS_MLO_DP_MLD_TXRX_PEER(da_peer))
  1091. return false;
  1092. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1093. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1094. &da_peer->vdev->mld_mac_addr))
  1095. return false;
  1096. return true;
  1097. }
  1098. #else
  1099. static inline bool
  1100. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1101. struct dp_txrx_peer *da_peer)
  1102. {
  1103. return false;
  1104. }
  1105. #endif
  1106. #ifdef INTRA_BSS_FWD_OFFLOAD
  1107. /**
  1108. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1109. for unicast frame
  1110. * @soc: SOC hanlde
  1111. * @nbuf: RX packet buffer
  1112. * @ta_peer: transmitter DP peer handle
  1113. * @msdu_metadata: MSDU meta data info
  1114. * @p_tx_vdev_id: get vdev id for Intra-BSS TX
  1115. *
  1116. * Return: true - intrabss allowed
  1117. false - not allow
  1118. */
  1119. static bool
  1120. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1121. struct dp_txrx_peer *ta_peer,
  1122. struct hal_rx_msdu_metadata *msdu_metadata,
  1123. struct dp_be_intrabss_params *params)
  1124. {
  1125. uint16_t da_peer_id;
  1126. struct dp_txrx_peer *da_peer;
  1127. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1128. if (!qdf_nbuf_is_intra_bss(nbuf))
  1129. return false;
  1130. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1131. params->dest_soc,
  1132. msdu_metadata->da_idx);
  1133. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1134. &txrx_ref_handle, DP_MOD_ID_RX);
  1135. if (!da_peer)
  1136. return false;
  1137. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1138. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1139. return true;
  1140. }
  1141. #else
  1142. #ifdef WLAN_MLO_MULTI_CHIP
  1143. static bool
  1144. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1145. struct dp_txrx_peer *ta_peer,
  1146. struct hal_rx_msdu_metadata *msdu_metadata,
  1147. struct dp_be_intrabss_params *params)
  1148. {
  1149. uint16_t da_peer_id;
  1150. struct dp_txrx_peer *da_peer;
  1151. bool ret = false;
  1152. uint8_t dest_chip_id;
  1153. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1154. struct dp_vdev_be *be_vdev =
  1155. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1156. struct dp_soc_be *be_soc =
  1157. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1158. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1159. return false;
  1160. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1161. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1162. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1163. /* use dest chip id when TA is MLD peer and DA is legacy */
  1164. if (be_soc->mlo_enabled &&
  1165. ta_peer->mld_peer &&
  1166. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1167. /* validate chip_id, get a ref, and re-assign soc */
  1168. params->dest_soc =
  1169. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1170. dest_chip_id);
  1171. if (!params->dest_soc)
  1172. return false;
  1173. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1174. da_peer_id,
  1175. &txrx_ref_handle,
  1176. DP_MOD_ID_RX);
  1177. if (!da_peer)
  1178. return false;
  1179. } else {
  1180. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1181. da_peer_id,
  1182. &txrx_ref_handle,
  1183. DP_MOD_ID_RX);
  1184. if (!da_peer)
  1185. return false;
  1186. params->dest_soc = da_peer->vdev->pdev->soc;
  1187. if (!params->dest_soc)
  1188. goto rel_da_peer;
  1189. }
  1190. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1191. /* If the source or destination peer in the isolation
  1192. * list then dont forward instead push to bridge stack.
  1193. */
  1194. if (dp_get_peer_isolation(ta_peer) ||
  1195. dp_get_peer_isolation(da_peer)) {
  1196. ret = false;
  1197. goto rel_da_peer;
  1198. }
  1199. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1200. ret = false;
  1201. goto rel_da_peer;
  1202. }
  1203. /* Same vdev, support Inra-BSS */
  1204. if (da_peer->vdev == ta_peer->vdev) {
  1205. ret = true;
  1206. goto rel_da_peer;
  1207. }
  1208. /* MLO specific Intra-BSS check */
  1209. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1210. /* use dest chip id for legacy dest peer */
  1211. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1212. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1213. params->tx_vdev_id) &&
  1214. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1215. params->tx_vdev_id)) {
  1216. /*dp_soc_unref_delete(soc);*/
  1217. goto rel_da_peer;
  1218. }
  1219. }
  1220. ret = true;
  1221. }
  1222. rel_da_peer:
  1223. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1224. return ret;
  1225. }
  1226. #else
  1227. static bool
  1228. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1229. struct dp_txrx_peer *ta_peer,
  1230. struct hal_rx_msdu_metadata *msdu_metadata,
  1231. struct dp_be_intrabss_params *params)
  1232. {
  1233. uint16_t da_peer_id;
  1234. struct dp_txrx_peer *da_peer;
  1235. bool ret = false;
  1236. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1237. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1238. return false;
  1239. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1240. params->dest_soc,
  1241. msdu_metadata->da_idx);
  1242. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1243. &txrx_ref_handle, DP_MOD_ID_RX);
  1244. if (!da_peer)
  1245. return false;
  1246. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1247. /* If the source or destination peer in the isolation
  1248. * list then dont forward instead push to bridge stack.
  1249. */
  1250. if (dp_get_peer_isolation(ta_peer) ||
  1251. dp_get_peer_isolation(da_peer))
  1252. goto rel_da_peer;
  1253. if (da_peer->bss_peer || da_peer == ta_peer)
  1254. goto rel_da_peer;
  1255. /* Same vdev, support Inra-BSS */
  1256. if (da_peer->vdev == ta_peer->vdev) {
  1257. ret = true;
  1258. goto rel_da_peer;
  1259. }
  1260. /* MLO specific Intra-BSS check */
  1261. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1262. ret = true;
  1263. goto rel_da_peer;
  1264. }
  1265. rel_da_peer:
  1266. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1267. return ret;
  1268. }
  1269. #endif /* WLAN_MLO_MULTI_CHIP */
  1270. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1271. /*
  1272. * dp_rx_intrabss_handle_nawds_be() - Forward mcbc intrabss pkts in nawds case
  1273. * @soc: core txrx main context
  1274. * @ta_txrx_peer: source txrx_peer entry
  1275. * @nbuf_copy: nbuf that has to be intrabss forwarded
  1276. * @tid_stats: tid_stats structure
  1277. *
  1278. * Return: true if it is forwarded else false
  1279. */
  1280. bool
  1281. dp_rx_intrabss_handle_nawds_be(struct dp_soc *soc,
  1282. struct dp_txrx_peer *ta_txrx_peer,
  1283. qdf_nbuf_t nbuf_copy,
  1284. struct cdp_tid_rx_stats *tid_stats)
  1285. {
  1286. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1287. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1288. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1289. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1290. tx_exc_metadata.is_intrabss_fwd = 1;
  1291. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1292. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1293. ta_txrx_peer->vdev->vdev_id,
  1294. nbuf_copy,
  1295. &tx_exc_metadata)) {
  1296. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1297. rx.intra_bss.fail, 1,
  1298. len);
  1299. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1300. qdf_nbuf_free(nbuf_copy);
  1301. } else {
  1302. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1303. rx.intra_bss.pkts, 1,
  1304. len);
  1305. tid_stats->intrabss_cnt++;
  1306. }
  1307. return true;
  1308. }
  1309. return false;
  1310. }
  1311. /*
  1312. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  1313. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1314. * @soc: core txrx main context
  1315. * @ta_peer: source peer entry
  1316. * @rx_tlv_hdr: start address of rx tlvs
  1317. * @nbuf: nbuf that has to be intrabss forwarded
  1318. * @msdu_metadata: msdu metadata
  1319. *
  1320. * Return: true if it is forwarded else false
  1321. */
  1322. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1323. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1324. struct hal_rx_msdu_metadata msdu_metadata)
  1325. {
  1326. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1327. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1328. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1329. tid_stats.tid_rx_stats[ring_id][tid];
  1330. bool ret = false;
  1331. struct dp_be_intrabss_params params;
  1332. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1333. * source, then clone the pkt and send the cloned pkt for
  1334. * intra BSS forwarding and original pkt up the network stack
  1335. * Note: how do we handle multicast pkts. do we forward
  1336. * all multicast pkts as is or let a higher layer module
  1337. * like igmpsnoop decide whether to forward or not with
  1338. * Mcast enhancement.
  1339. */
  1340. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1341. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1342. nbuf, tid_stats);
  1343. }
  1344. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1345. nbuf))
  1346. return true;
  1347. params.dest_soc = soc;
  1348. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer,
  1349. &msdu_metadata, &params)) {
  1350. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1351. params.tx_vdev_id,
  1352. rx_tlv_hdr, nbuf, tid_stats);
  1353. }
  1354. return ret;
  1355. }
  1356. #endif