dp_main.c 193 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #ifdef IPA_OFFLOAD
  75. /* Exclude IPA rings from the interrupt context */
  76. #define TX_RING_MASK_VAL 0xb
  77. #define RX_RING_MASK_VAL 0x7
  78. #else
  79. #define TX_RING_MASK_VAL 0xF
  80. #define RX_RING_MASK_VAL 0xF
  81. #endif
  82. bool rx_hash = 1;
  83. qdf_declare_param(rx_hash, bool);
  84. #define STR_MAXLEN 64
  85. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  86. /* PPDU stats mask sent to FW to enable enhanced stats */
  87. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  88. /* PPDU stats mask sent to FW to support debug sniffer feature */
  89. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  90. /**
  91. * default_dscp_tid_map - Default DSCP-TID mapping
  92. *
  93. * DSCP TID AC
  94. * 000000 0 WME_AC_BE
  95. * 001000 1 WME_AC_BK
  96. * 010000 1 WME_AC_BK
  97. * 011000 0 WME_AC_BE
  98. * 100000 5 WME_AC_VI
  99. * 101000 5 WME_AC_VI
  100. * 110000 6 WME_AC_VO
  101. * 111000 6 WME_AC_VO
  102. */
  103. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  104. 0, 0, 0, 0, 0, 0, 0, 0,
  105. 1, 1, 1, 1, 1, 1, 1, 1,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 0, 0, 0, 0, 0, 0, 0, 0,
  108. 5, 5, 5, 5, 5, 5, 5, 5,
  109. 5, 5, 5, 5, 5, 5, 5, 5,
  110. 6, 6, 6, 6, 6, 6, 6, 6,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. };
  113. /*
  114. * struct dp_rate_debug
  115. *
  116. * @mcs_type: print string for a given mcs
  117. * @valid: valid mcs rate?
  118. */
  119. struct dp_rate_debug {
  120. char mcs_type[DP_MAX_MCS_STRING_LEN];
  121. uint8_t valid;
  122. };
  123. #define MCS_VALID 1
  124. #define MCS_INVALID 0
  125. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  126. {
  127. {"OFDM 48 Mbps", MCS_VALID},
  128. {"OFDM 24 Mbps", MCS_VALID},
  129. {"OFDM 12 Mbps", MCS_VALID},
  130. {"OFDM 6 Mbps ", MCS_VALID},
  131. {"OFDM 54 Mbps", MCS_VALID},
  132. {"OFDM 36 Mbps", MCS_VALID},
  133. {"OFDM 18 Mbps", MCS_VALID},
  134. {"OFDM 9 Mbps ", MCS_VALID},
  135. {"INVALID ", MCS_INVALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_VALID},
  140. },
  141. {
  142. {"CCK 11 Mbps Long ", MCS_VALID},
  143. {"CCK 5.5 Mbps Long ", MCS_VALID},
  144. {"CCK 2 Mbps Long ", MCS_VALID},
  145. {"CCK 1 Mbps Long ", MCS_VALID},
  146. {"CCK 11 Mbps Short ", MCS_VALID},
  147. {"CCK 5.5 Mbps Short", MCS_VALID},
  148. {"CCK 2 Mbps Short ", MCS_VALID},
  149. {"INVALID ", MCS_INVALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_VALID},
  155. },
  156. {
  157. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  158. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  160. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  161. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  162. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  163. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  164. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  165. {"INVALID ", MCS_INVALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_VALID},
  170. },
  171. {
  172. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  173. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  175. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  176. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  177. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  178. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  179. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  180. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  181. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  182. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  183. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  184. {"INVALID ", MCS_VALID},
  185. },
  186. {
  187. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  188. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  190. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  191. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  192. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  193. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  194. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  195. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  196. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  197. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  198. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  199. {"INVALID ", MCS_VALID},
  200. }
  201. };
  202. /**
  203. * @brief Cpu ring map types
  204. */
  205. enum dp_cpu_ring_map_types {
  206. DP_DEFAULT_MAP,
  207. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  208. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  209. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  210. DP_CPU_RING_MAP_MAX
  211. };
  212. /**
  213. * @brief Cpu to tx ring map
  214. */
  215. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  216. {0x0, 0x1, 0x2, 0x0},
  217. {0x1, 0x2, 0x1, 0x2},
  218. {0x0, 0x2, 0x0, 0x2},
  219. {0x2, 0x2, 0x2, 0x2}
  220. };
  221. /**
  222. * @brief Select the type of statistics
  223. */
  224. enum dp_stats_type {
  225. STATS_FW = 0,
  226. STATS_HOST = 1,
  227. STATS_TYPE_MAX = 2,
  228. };
  229. /**
  230. * @brief General Firmware statistics options
  231. *
  232. */
  233. enum dp_fw_stats {
  234. TXRX_FW_STATS_INVALID = -1,
  235. };
  236. /**
  237. * dp_stats_mapping_table - Firmware and Host statistics
  238. * currently supported
  239. */
  240. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  241. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  242. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  252. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  253. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  260. /* Last ENUM for HTT FW STATS */
  261. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  262. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  263. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  269. };
  270. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  271. struct cdp_peer *peer_hdl,
  272. uint8_t *mac_addr,
  273. enum cdp_txrx_ast_entry_type type,
  274. uint32_t flags)
  275. {
  276. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  277. (struct dp_peer *)peer_hdl,
  278. mac_addr,
  279. type,
  280. flags);
  281. }
  282. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  283. void *ast_entry_hdl)
  284. {
  285. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  286. qdf_spin_lock_bh(&soc->ast_lock);
  287. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  288. (struct dp_ast_entry *)ast_entry_hdl);
  289. qdf_spin_unlock_bh(&soc->ast_lock);
  290. }
  291. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  292. struct cdp_peer *peer_hdl,
  293. void *ast_entry_hdl,
  294. uint32_t flags)
  295. {
  296. int status;
  297. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  298. qdf_spin_lock_bh(&soc->ast_lock);
  299. status = dp_peer_update_ast(soc,
  300. (struct dp_peer *)peer_hdl,
  301. (struct dp_ast_entry *)ast_entry_hdl,
  302. flags);
  303. qdf_spin_unlock_bh(&soc->ast_lock);
  304. return status;
  305. }
  306. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  307. uint8_t *ast_mac_addr)
  308. {
  309. struct dp_ast_entry *ast_entry;
  310. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  311. qdf_spin_lock_bh(&soc->ast_lock);
  312. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  313. qdf_spin_unlock_bh(&soc->ast_lock);
  314. return (void *)ast_entry;
  315. }
  316. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  317. void *ast_entry_hdl)
  318. {
  319. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  320. (struct dp_ast_entry *)ast_entry_hdl);
  321. }
  322. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  323. void *ast_entry_hdl)
  324. {
  325. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  326. (struct dp_ast_entry *)ast_entry_hdl);
  327. }
  328. static void dp_peer_ast_set_type_wifi3(
  329. struct cdp_soc_t *soc_hdl,
  330. void *ast_entry_hdl,
  331. enum cdp_txrx_ast_entry_type type)
  332. {
  333. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  334. (struct dp_ast_entry *)ast_entry_hdl,
  335. type);
  336. }
  337. /**
  338. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  339. * @ring_num: ring num of the ring being queried
  340. * @grp_mask: the grp_mask array for the ring type in question.
  341. *
  342. * The grp_mask array is indexed by group number and the bit fields correspond
  343. * to ring numbers. We are finding which interrupt group a ring belongs to.
  344. *
  345. * Return: the index in the grp_mask array with the ring number.
  346. * -QDF_STATUS_E_NOENT if no entry is found
  347. */
  348. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  349. {
  350. int ext_group_num;
  351. int mask = 1 << ring_num;
  352. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  353. ext_group_num++) {
  354. if (mask & grp_mask[ext_group_num])
  355. return ext_group_num;
  356. }
  357. return -QDF_STATUS_E_NOENT;
  358. }
  359. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  360. enum hal_ring_type ring_type,
  361. int ring_num)
  362. {
  363. int *grp_mask;
  364. switch (ring_type) {
  365. case WBM2SW_RELEASE:
  366. /* dp_tx_comp_handler - soc->tx_comp_ring */
  367. if (ring_num < 3)
  368. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  369. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  370. else if (ring_num == 3) {
  371. /* sw treats this as a separate ring type */
  372. grp_mask = &soc->wlan_cfg_ctx->
  373. int_rx_wbm_rel_ring_mask[0];
  374. ring_num = 0;
  375. } else {
  376. qdf_assert(0);
  377. return -QDF_STATUS_E_NOENT;
  378. }
  379. break;
  380. case REO_EXCEPTION:
  381. /* dp_rx_err_process - &soc->reo_exception_ring */
  382. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  383. break;
  384. case REO_DST:
  385. /* dp_rx_process - soc->reo_dest_ring */
  386. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  387. break;
  388. case REO_STATUS:
  389. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  390. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  391. break;
  392. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  393. case RXDMA_MONITOR_STATUS:
  394. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  395. case RXDMA_MONITOR_DST:
  396. /* dp_mon_process */
  397. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  398. break;
  399. case RXDMA_DST:
  400. /* dp_rxdma_err_process */
  401. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  402. break;
  403. case RXDMA_BUF:
  404. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  405. break;
  406. case RXDMA_MONITOR_BUF:
  407. /* TODO: support low_thresh interrupt */
  408. return -QDF_STATUS_E_NOENT;
  409. break;
  410. case TCL_DATA:
  411. case TCL_CMD:
  412. case REO_CMD:
  413. case SW2WBM_RELEASE:
  414. case WBM_IDLE_LINK:
  415. /* normally empty SW_TO_HW rings */
  416. return -QDF_STATUS_E_NOENT;
  417. break;
  418. case TCL_STATUS:
  419. case REO_REINJECT:
  420. /* misc unused rings */
  421. return -QDF_STATUS_E_NOENT;
  422. break;
  423. case CE_SRC:
  424. case CE_DST:
  425. case CE_DST_STATUS:
  426. /* CE_rings - currently handled by hif */
  427. default:
  428. return -QDF_STATUS_E_NOENT;
  429. break;
  430. }
  431. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  432. }
  433. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  434. *ring_params, int ring_type, int ring_num)
  435. {
  436. int msi_group_number;
  437. int msi_data_count;
  438. int ret;
  439. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  440. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  441. &msi_data_count, &msi_data_start,
  442. &msi_irq_start);
  443. if (ret)
  444. return;
  445. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  446. ring_num);
  447. if (msi_group_number < 0) {
  448. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  449. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  450. ring_type, ring_num);
  451. ring_params->msi_addr = 0;
  452. ring_params->msi_data = 0;
  453. return;
  454. }
  455. if (msi_group_number > msi_data_count) {
  456. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  457. FL("2 msi_groups will share an msi; msi_group_num %d"),
  458. msi_group_number);
  459. QDF_ASSERT(0);
  460. }
  461. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  462. ring_params->msi_addr = addr_low;
  463. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  464. ring_params->msi_data = (msi_group_number % msi_data_count)
  465. + msi_data_start;
  466. ring_params->flags |= HAL_SRNG_MSI_INTR;
  467. }
  468. /**
  469. * dp_print_ast_stats() - Dump AST table contents
  470. * @soc: Datapath soc handle
  471. *
  472. * return void
  473. */
  474. #ifdef FEATURE_WDS
  475. static void dp_print_ast_stats(struct dp_soc *soc)
  476. {
  477. uint8_t i;
  478. uint8_t num_entries = 0;
  479. struct dp_vdev *vdev;
  480. struct dp_pdev *pdev;
  481. struct dp_peer *peer;
  482. struct dp_ast_entry *ase, *tmp_ase;
  483. DP_PRINT_STATS("AST Stats:");
  484. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  485. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  486. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  487. DP_PRINT_STATS("AST Table:");
  488. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  489. pdev = soc->pdev_list[i];
  490. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  491. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  492. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  493. DP_PRINT_STATS("%6d mac_addr = %pM"
  494. " peer_mac_addr = %pM"
  495. " type = %d"
  496. " next_hop = %d"
  497. " is_active = %d"
  498. " is_bss = %d"
  499. " ast_idx = %d"
  500. " pdev_id = %d"
  501. " vdev_id = %d",
  502. ++num_entries,
  503. ase->mac_addr.raw,
  504. ase->peer->mac_addr.raw,
  505. ase->type,
  506. ase->next_hop,
  507. ase->is_active,
  508. ase->is_bss,
  509. ase->ast_idx,
  510. ase->pdev_id,
  511. ase->vdev_id);
  512. }
  513. }
  514. }
  515. }
  516. }
  517. #else
  518. static void dp_print_ast_stats(struct dp_soc *soc)
  519. {
  520. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  521. return;
  522. }
  523. #endif
  524. /*
  525. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  526. */
  527. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  528. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  529. {
  530. void *hal_soc = soc->hal_soc;
  531. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  532. /* TODO: See if we should get align size from hal */
  533. uint32_t ring_base_align = 8;
  534. struct hal_srng_params ring_params;
  535. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  536. /* TODO: Currently hal layer takes care of endianness related settings.
  537. * See if these settings need to passed from DP layer
  538. */
  539. ring_params.flags = 0;
  540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  541. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  542. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  543. srng->hal_srng = NULL;
  544. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  545. srng->num_entries = num_entries;
  546. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  547. soc->osdev, soc->osdev->dev, srng->alloc_size,
  548. &(srng->base_paddr_unaligned));
  549. if (!srng->base_vaddr_unaligned) {
  550. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  551. FL("alloc failed - ring_type: %d, ring_num %d"),
  552. ring_type, ring_num);
  553. return QDF_STATUS_E_NOMEM;
  554. }
  555. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  556. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  557. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  558. ((unsigned long)(ring_params.ring_base_vaddr) -
  559. (unsigned long)srng->base_vaddr_unaligned);
  560. ring_params.num_entries = num_entries;
  561. if (soc->intr_mode == DP_INTR_MSI) {
  562. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  564. FL("Using MSI for ring_type: %d, ring_num %d"),
  565. ring_type, ring_num);
  566. } else {
  567. ring_params.msi_data = 0;
  568. ring_params.msi_addr = 0;
  569. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  570. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  571. ring_type, ring_num);
  572. }
  573. /*
  574. * Setup interrupt timer and batch counter thresholds for
  575. * interrupt mitigation based on ring type
  576. */
  577. if (ring_type == REO_DST) {
  578. ring_params.intr_timer_thres_us =
  579. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  580. ring_params.intr_batch_cntr_thres_entries =
  581. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  582. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  583. ring_params.intr_timer_thres_us =
  584. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  585. ring_params.intr_batch_cntr_thres_entries =
  586. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  587. } else {
  588. ring_params.intr_timer_thres_us =
  589. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  590. ring_params.intr_batch_cntr_thres_entries =
  591. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  592. }
  593. /* Enable low threshold interrupts for rx buffer rings (regular and
  594. * monitor buffer rings.
  595. * TODO: See if this is required for any other ring
  596. */
  597. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  598. (ring_type == RXDMA_MONITOR_STATUS)) {
  599. /* TODO: Setting low threshold to 1/8th of ring size
  600. * see if this needs to be configurable
  601. */
  602. ring_params.low_threshold = num_entries >> 3;
  603. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  604. ring_params.intr_timer_thres_us = 0x1000;
  605. }
  606. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  607. mac_id, &ring_params);
  608. if (!srng->hal_srng) {
  609. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  610. srng->alloc_size,
  611. srng->base_vaddr_unaligned,
  612. srng->base_paddr_unaligned, 0);
  613. }
  614. return 0;
  615. }
  616. /**
  617. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  618. * Any buffers allocated and attached to ring entries are expected to be freed
  619. * before calling this function.
  620. */
  621. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  622. int ring_type, int ring_num)
  623. {
  624. if (!srng->hal_srng) {
  625. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  626. FL("Ring type: %d, num:%d not setup"),
  627. ring_type, ring_num);
  628. return;
  629. }
  630. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  631. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  632. srng->alloc_size,
  633. srng->base_vaddr_unaligned,
  634. srng->base_paddr_unaligned, 0);
  635. srng->hal_srng = NULL;
  636. }
  637. /* TODO: Need this interface from HIF */
  638. void *hif_get_hal_handle(void *hif_handle);
  639. /*
  640. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  641. * @dp_ctx: DP SOC handle
  642. * @budget: Number of frames/descriptors that can be processed in one shot
  643. *
  644. * Return: remaining budget/quota for the soc device
  645. */
  646. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  647. {
  648. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  649. struct dp_soc *soc = int_ctx->soc;
  650. int ring = 0;
  651. uint32_t work_done = 0;
  652. int budget = dp_budget;
  653. uint8_t tx_mask = int_ctx->tx_ring_mask;
  654. uint8_t rx_mask = int_ctx->rx_ring_mask;
  655. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  656. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  657. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  658. uint32_t remaining_quota = dp_budget;
  659. struct dp_pdev *pdev = NULL;
  660. /* Process Tx completion interrupts first to return back buffers */
  661. while (tx_mask) {
  662. if (tx_mask & 0x1) {
  663. work_done = dp_tx_comp_handler(soc,
  664. soc->tx_comp_ring[ring].hal_srng,
  665. remaining_quota);
  666. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  667. "tx mask 0x%x ring %d, budget %d, work_done %d",
  668. tx_mask, ring, budget, work_done);
  669. budget -= work_done;
  670. if (budget <= 0)
  671. goto budget_done;
  672. remaining_quota = budget;
  673. }
  674. tx_mask = tx_mask >> 1;
  675. ring++;
  676. }
  677. /* Process REO Exception ring interrupt */
  678. if (rx_err_mask) {
  679. work_done = dp_rx_err_process(soc,
  680. soc->reo_exception_ring.hal_srng,
  681. remaining_quota);
  682. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  683. "REO Exception Ring: work_done %d budget %d",
  684. work_done, budget);
  685. budget -= work_done;
  686. if (budget <= 0) {
  687. goto budget_done;
  688. }
  689. remaining_quota = budget;
  690. }
  691. /* Process Rx WBM release ring interrupt */
  692. if (rx_wbm_rel_mask) {
  693. work_done = dp_rx_wbm_err_process(soc,
  694. soc->rx_rel_ring.hal_srng, remaining_quota);
  695. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  696. "WBM Release Ring: work_done %d budget %d",
  697. work_done, budget);
  698. budget -= work_done;
  699. if (budget <= 0) {
  700. goto budget_done;
  701. }
  702. remaining_quota = budget;
  703. }
  704. /* Process Rx interrupts */
  705. if (rx_mask) {
  706. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  707. if (rx_mask & (1 << ring)) {
  708. work_done = dp_rx_process(int_ctx,
  709. soc->reo_dest_ring[ring].hal_srng,
  710. remaining_quota);
  711. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  712. "rx mask 0x%x ring %d, work_done %d budget %d",
  713. rx_mask, ring, work_done, budget);
  714. budget -= work_done;
  715. if (budget <= 0)
  716. goto budget_done;
  717. remaining_quota = budget;
  718. }
  719. }
  720. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  721. /* Need to check on this, why is required */
  722. work_done = dp_rxdma_err_process(soc, ring,
  723. remaining_quota);
  724. budget -= work_done;
  725. }
  726. }
  727. if (reo_status_mask)
  728. dp_reo_status_ring_handler(soc);
  729. /* Process LMAC interrupts */
  730. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  731. pdev = soc->pdev_list[ring];
  732. if (pdev == NULL)
  733. continue;
  734. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  735. work_done = dp_mon_process(soc, ring, remaining_quota);
  736. budget -= work_done;
  737. if (budget <= 0)
  738. goto budget_done;
  739. remaining_quota = budget;
  740. }
  741. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  742. work_done = dp_rxdma_err_process(soc, ring,
  743. remaining_quota);
  744. budget -= work_done;
  745. if (budget <= 0)
  746. goto budget_done;
  747. remaining_quota = budget;
  748. }
  749. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  750. union dp_rx_desc_list_elem_t *desc_list = NULL;
  751. union dp_rx_desc_list_elem_t *tail = NULL;
  752. struct dp_srng *rx_refill_buf_ring =
  753. &pdev->rx_refill_buf_ring;
  754. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  755. dp_rx_buffers_replenish(soc, ring,
  756. rx_refill_buf_ring,
  757. &soc->rx_desc_buf[ring], 0,
  758. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  759. }
  760. }
  761. qdf_lro_flush(int_ctx->lro_ctx);
  762. budget_done:
  763. return dp_budget - budget;
  764. }
  765. #ifdef DP_INTR_POLL_BASED
  766. /* dp_interrupt_timer()- timer poll for interrupts
  767. *
  768. * @arg: SoC Handle
  769. *
  770. * Return:
  771. *
  772. */
  773. static void dp_interrupt_timer(void *arg)
  774. {
  775. struct dp_soc *soc = (struct dp_soc *) arg;
  776. int i;
  777. if (qdf_atomic_read(&soc->cmn_init_done)) {
  778. for (i = 0;
  779. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  780. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  781. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  782. }
  783. }
  784. /*
  785. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  786. * @txrx_soc: DP SOC handle
  787. *
  788. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  789. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  790. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  791. *
  792. * Return: 0 for success. nonzero for failure.
  793. */
  794. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  795. {
  796. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  797. int i;
  798. soc->intr_mode = DP_INTR_POLL;
  799. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  800. soc->intr_ctx[i].dp_intr_id = i;
  801. soc->intr_ctx[i].tx_ring_mask =
  802. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  803. soc->intr_ctx[i].rx_ring_mask =
  804. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  805. soc->intr_ctx[i].rx_mon_ring_mask =
  806. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  807. soc->intr_ctx[i].rx_err_ring_mask =
  808. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  809. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  810. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  811. soc->intr_ctx[i].reo_status_ring_mask =
  812. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  813. soc->intr_ctx[i].rxdma2host_ring_mask =
  814. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  815. soc->intr_ctx[i].soc = soc;
  816. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  817. }
  818. qdf_timer_init(soc->osdev, &soc->int_timer,
  819. dp_interrupt_timer, (void *)soc,
  820. QDF_TIMER_TYPE_WAKE_APPS);
  821. return QDF_STATUS_SUCCESS;
  822. }
  823. #if defined(CONFIG_MCL)
  824. extern int con_mode_monitor;
  825. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  826. /*
  827. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  828. * @txrx_soc: DP SOC handle
  829. *
  830. * Call the appropriate attach function based on the mode of operation.
  831. * This is a WAR for enabling monitor mode.
  832. *
  833. * Return: 0 for success. nonzero for failure.
  834. */
  835. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  836. {
  837. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  838. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  839. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  840. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  841. "%s: Poll mode", __func__);
  842. return dp_soc_interrupt_attach_poll(txrx_soc);
  843. } else {
  844. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  845. "%s: Interrupt mode", __func__);
  846. return dp_soc_interrupt_attach(txrx_soc);
  847. }
  848. }
  849. #else
  850. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  851. {
  852. return dp_soc_interrupt_attach_poll(txrx_soc);
  853. }
  854. #endif
  855. #endif
  856. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  857. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  858. {
  859. int j;
  860. int num_irq = 0;
  861. int tx_mask =
  862. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  863. int rx_mask =
  864. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  865. int rx_mon_mask =
  866. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  867. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  868. soc->wlan_cfg_ctx, intr_ctx_num);
  869. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  870. soc->wlan_cfg_ctx, intr_ctx_num);
  871. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  872. soc->wlan_cfg_ctx, intr_ctx_num);
  873. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  874. soc->wlan_cfg_ctx, intr_ctx_num);
  875. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  876. soc->wlan_cfg_ctx, intr_ctx_num);
  877. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  878. if (tx_mask & (1 << j)) {
  879. irq_id_map[num_irq++] =
  880. (wbm2host_tx_completions_ring1 - j);
  881. }
  882. if (rx_mask & (1 << j)) {
  883. irq_id_map[num_irq++] =
  884. (reo2host_destination_ring1 - j);
  885. }
  886. if (rxdma2host_ring_mask & (1 << j)) {
  887. irq_id_map[num_irq++] =
  888. rxdma2host_destination_ring_mac1 -
  889. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  890. }
  891. if (host2rxdma_ring_mask & (1 << j)) {
  892. irq_id_map[num_irq++] =
  893. host2rxdma_host_buf_ring_mac1 -
  894. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  895. }
  896. if (rx_mon_mask & (1 << j)) {
  897. irq_id_map[num_irq++] =
  898. ppdu_end_interrupts_mac1 -
  899. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  900. irq_id_map[num_irq++] =
  901. rxdma2host_monitor_status_ring_mac1 -
  902. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  903. }
  904. if (rx_wbm_rel_ring_mask & (1 << j))
  905. irq_id_map[num_irq++] = wbm2host_rx_release;
  906. if (rx_err_ring_mask & (1 << j))
  907. irq_id_map[num_irq++] = reo2host_exception;
  908. if (reo_status_ring_mask & (1 << j))
  909. irq_id_map[num_irq++] = reo2host_status;
  910. }
  911. *num_irq_r = num_irq;
  912. }
  913. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  914. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  915. int msi_vector_count, int msi_vector_start)
  916. {
  917. int tx_mask = wlan_cfg_get_tx_ring_mask(
  918. soc->wlan_cfg_ctx, intr_ctx_num);
  919. int rx_mask = wlan_cfg_get_rx_ring_mask(
  920. soc->wlan_cfg_ctx, intr_ctx_num);
  921. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  922. soc->wlan_cfg_ctx, intr_ctx_num);
  923. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  924. soc->wlan_cfg_ctx, intr_ctx_num);
  925. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  926. soc->wlan_cfg_ctx, intr_ctx_num);
  927. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  928. soc->wlan_cfg_ctx, intr_ctx_num);
  929. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  930. soc->wlan_cfg_ctx, intr_ctx_num);
  931. unsigned int vector =
  932. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  933. int num_irq = 0;
  934. soc->intr_mode = DP_INTR_MSI;
  935. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  936. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  937. irq_id_map[num_irq++] =
  938. pld_get_msi_irq(soc->osdev->dev, vector);
  939. *num_irq_r = num_irq;
  940. }
  941. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  942. int *irq_id_map, int *num_irq)
  943. {
  944. int msi_vector_count, ret;
  945. uint32_t msi_base_data, msi_vector_start;
  946. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  947. &msi_vector_count,
  948. &msi_base_data,
  949. &msi_vector_start);
  950. if (ret)
  951. return dp_soc_interrupt_map_calculate_integrated(soc,
  952. intr_ctx_num, irq_id_map, num_irq);
  953. else
  954. dp_soc_interrupt_map_calculate_msi(soc,
  955. intr_ctx_num, irq_id_map, num_irq,
  956. msi_vector_count, msi_vector_start);
  957. }
  958. /*
  959. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  960. * @txrx_soc: DP SOC handle
  961. *
  962. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  963. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  964. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  965. *
  966. * Return: 0 for success. nonzero for failure.
  967. */
  968. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  969. {
  970. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  971. int i = 0;
  972. int num_irq = 0;
  973. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  974. int ret = 0;
  975. /* Map of IRQ ids registered with one interrupt context */
  976. int irq_id_map[HIF_MAX_GRP_IRQ];
  977. int tx_mask =
  978. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  979. int rx_mask =
  980. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  981. int rx_mon_mask =
  982. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  983. int rx_err_ring_mask =
  984. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  985. int rx_wbm_rel_ring_mask =
  986. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  987. int reo_status_ring_mask =
  988. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  989. int rxdma2host_ring_mask =
  990. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  991. int host2rxdma_ring_mask =
  992. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  993. soc->intr_ctx[i].dp_intr_id = i;
  994. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  995. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  996. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  997. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  998. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  999. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1000. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1001. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1002. soc->intr_ctx[i].soc = soc;
  1003. num_irq = 0;
  1004. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1005. &num_irq);
  1006. ret = hif_register_ext_group(soc->hif_handle,
  1007. num_irq, irq_id_map, dp_service_srngs,
  1008. &soc->intr_ctx[i], "dp_intr",
  1009. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1010. if (ret) {
  1011. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1012. FL("failed, ret = %d"), ret);
  1013. return QDF_STATUS_E_FAILURE;
  1014. }
  1015. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1016. }
  1017. hif_configure_ext_group_interrupts(soc->hif_handle);
  1018. return QDF_STATUS_SUCCESS;
  1019. }
  1020. /*
  1021. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1022. * @txrx_soc: DP SOC handle
  1023. *
  1024. * Return: void
  1025. */
  1026. static void dp_soc_interrupt_detach(void *txrx_soc)
  1027. {
  1028. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1029. int i;
  1030. if (soc->intr_mode == DP_INTR_POLL) {
  1031. qdf_timer_stop(&soc->int_timer);
  1032. qdf_timer_free(&soc->int_timer);
  1033. } else {
  1034. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1035. }
  1036. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1037. soc->intr_ctx[i].tx_ring_mask = 0;
  1038. soc->intr_ctx[i].rx_ring_mask = 0;
  1039. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1040. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1041. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1042. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1043. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1044. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1045. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1046. }
  1047. }
  1048. #define AVG_MAX_MPDUS_PER_TID 128
  1049. #define AVG_TIDS_PER_CLIENT 2
  1050. #define AVG_FLOWS_PER_TID 2
  1051. #define AVG_MSDUS_PER_FLOW 128
  1052. #define AVG_MSDUS_PER_MPDU 4
  1053. /*
  1054. * Allocate and setup link descriptor pool that will be used by HW for
  1055. * various link and queue descriptors and managed by WBM
  1056. */
  1057. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1058. {
  1059. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1060. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1061. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1062. uint32_t num_mpdus_per_link_desc =
  1063. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1064. uint32_t num_msdus_per_link_desc =
  1065. hal_num_msdus_per_link_desc(soc->hal_soc);
  1066. uint32_t num_mpdu_links_per_queue_desc =
  1067. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1068. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1069. uint32_t total_link_descs, total_mem_size;
  1070. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1071. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1072. uint32_t num_link_desc_banks;
  1073. uint32_t last_bank_size = 0;
  1074. uint32_t entry_size, num_entries;
  1075. int i;
  1076. uint32_t desc_id = 0;
  1077. /* Only Tx queue descriptors are allocated from common link descriptor
  1078. * pool Rx queue descriptors are not included in this because (REO queue
  1079. * extension descriptors) they are expected to be allocated contiguously
  1080. * with REO queue descriptors
  1081. */
  1082. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1083. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1084. num_mpdu_queue_descs = num_mpdu_link_descs /
  1085. num_mpdu_links_per_queue_desc;
  1086. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1087. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1088. num_msdus_per_link_desc;
  1089. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1090. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1091. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1092. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1093. /* Round up to power of 2 */
  1094. total_link_descs = 1;
  1095. while (total_link_descs < num_entries)
  1096. total_link_descs <<= 1;
  1097. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1098. FL("total_link_descs: %u, link_desc_size: %d"),
  1099. total_link_descs, link_desc_size);
  1100. total_mem_size = total_link_descs * link_desc_size;
  1101. total_mem_size += link_desc_align;
  1102. if (total_mem_size <= max_alloc_size) {
  1103. num_link_desc_banks = 0;
  1104. last_bank_size = total_mem_size;
  1105. } else {
  1106. num_link_desc_banks = (total_mem_size) /
  1107. (max_alloc_size - link_desc_align);
  1108. last_bank_size = total_mem_size %
  1109. (max_alloc_size - link_desc_align);
  1110. }
  1111. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1112. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1113. total_mem_size, num_link_desc_banks);
  1114. for (i = 0; i < num_link_desc_banks; i++) {
  1115. soc->link_desc_banks[i].base_vaddr_unaligned =
  1116. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1117. max_alloc_size,
  1118. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1119. soc->link_desc_banks[i].size = max_alloc_size;
  1120. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1121. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1122. ((unsigned long)(
  1123. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1124. link_desc_align));
  1125. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1126. soc->link_desc_banks[i].base_paddr_unaligned) +
  1127. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1128. (unsigned long)(
  1129. soc->link_desc_banks[i].base_vaddr_unaligned));
  1130. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1131. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1132. FL("Link descriptor memory alloc failed"));
  1133. goto fail;
  1134. }
  1135. }
  1136. if (last_bank_size) {
  1137. /* Allocate last bank in case total memory required is not exact
  1138. * multiple of max_alloc_size
  1139. */
  1140. soc->link_desc_banks[i].base_vaddr_unaligned =
  1141. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1142. last_bank_size,
  1143. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1144. soc->link_desc_banks[i].size = last_bank_size;
  1145. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1146. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1147. ((unsigned long)(
  1148. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1149. link_desc_align));
  1150. soc->link_desc_banks[i].base_paddr =
  1151. (unsigned long)(
  1152. soc->link_desc_banks[i].base_paddr_unaligned) +
  1153. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1154. (unsigned long)(
  1155. soc->link_desc_banks[i].base_vaddr_unaligned));
  1156. }
  1157. /* Allocate and setup link descriptor idle list for HW internal use */
  1158. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1159. total_mem_size = entry_size * total_link_descs;
  1160. if (total_mem_size <= max_alloc_size) {
  1161. void *desc;
  1162. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1163. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1164. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1165. FL("Link desc idle ring setup failed"));
  1166. goto fail;
  1167. }
  1168. hal_srng_access_start_unlocked(soc->hal_soc,
  1169. soc->wbm_idle_link_ring.hal_srng);
  1170. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1171. soc->link_desc_banks[i].base_paddr; i++) {
  1172. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1173. ((unsigned long)(
  1174. soc->link_desc_banks[i].base_vaddr) -
  1175. (unsigned long)(
  1176. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1177. / link_desc_size;
  1178. unsigned long paddr = (unsigned long)(
  1179. soc->link_desc_banks[i].base_paddr);
  1180. while (num_entries && (desc = hal_srng_src_get_next(
  1181. soc->hal_soc,
  1182. soc->wbm_idle_link_ring.hal_srng))) {
  1183. hal_set_link_desc_addr(desc,
  1184. LINK_DESC_COOKIE(desc_id, i), paddr);
  1185. num_entries--;
  1186. desc_id++;
  1187. paddr += link_desc_size;
  1188. }
  1189. }
  1190. hal_srng_access_end_unlocked(soc->hal_soc,
  1191. soc->wbm_idle_link_ring.hal_srng);
  1192. } else {
  1193. uint32_t num_scatter_bufs;
  1194. uint32_t num_entries_per_buf;
  1195. uint32_t rem_entries;
  1196. uint8_t *scatter_buf_ptr;
  1197. uint16_t scatter_buf_num;
  1198. soc->wbm_idle_scatter_buf_size =
  1199. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1200. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1201. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1202. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1203. soc->hal_soc, total_mem_size,
  1204. soc->wbm_idle_scatter_buf_size);
  1205. for (i = 0; i < num_scatter_bufs; i++) {
  1206. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1207. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1208. soc->wbm_idle_scatter_buf_size,
  1209. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1210. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1211. QDF_TRACE(QDF_MODULE_ID_DP,
  1212. QDF_TRACE_LEVEL_ERROR,
  1213. FL("Scatter list memory alloc failed"));
  1214. goto fail;
  1215. }
  1216. }
  1217. /* Populate idle list scatter buffers with link descriptor
  1218. * pointers
  1219. */
  1220. scatter_buf_num = 0;
  1221. scatter_buf_ptr = (uint8_t *)(
  1222. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1223. rem_entries = num_entries_per_buf;
  1224. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1225. soc->link_desc_banks[i].base_paddr; i++) {
  1226. uint32_t num_link_descs =
  1227. (soc->link_desc_banks[i].size -
  1228. ((unsigned long)(
  1229. soc->link_desc_banks[i].base_vaddr) -
  1230. (unsigned long)(
  1231. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1232. / link_desc_size;
  1233. unsigned long paddr = (unsigned long)(
  1234. soc->link_desc_banks[i].base_paddr);
  1235. while (num_link_descs) {
  1236. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1237. LINK_DESC_COOKIE(desc_id, i), paddr);
  1238. num_link_descs--;
  1239. desc_id++;
  1240. paddr += link_desc_size;
  1241. rem_entries--;
  1242. if (rem_entries) {
  1243. scatter_buf_ptr += entry_size;
  1244. } else {
  1245. rem_entries = num_entries_per_buf;
  1246. scatter_buf_num++;
  1247. if (scatter_buf_num >= num_scatter_bufs)
  1248. break;
  1249. scatter_buf_ptr = (uint8_t *)(
  1250. soc->wbm_idle_scatter_buf_base_vaddr[
  1251. scatter_buf_num]);
  1252. }
  1253. }
  1254. }
  1255. /* Setup link descriptor idle list in HW */
  1256. hal_setup_link_idle_list(soc->hal_soc,
  1257. soc->wbm_idle_scatter_buf_base_paddr,
  1258. soc->wbm_idle_scatter_buf_base_vaddr,
  1259. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1260. (uint32_t)(scatter_buf_ptr -
  1261. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1262. scatter_buf_num-1])), total_link_descs);
  1263. }
  1264. return 0;
  1265. fail:
  1266. if (soc->wbm_idle_link_ring.hal_srng) {
  1267. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1268. WBM_IDLE_LINK, 0);
  1269. }
  1270. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1271. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1272. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1273. soc->wbm_idle_scatter_buf_size,
  1274. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1275. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1276. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1277. }
  1278. }
  1279. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1280. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1281. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1282. soc->link_desc_banks[i].size,
  1283. soc->link_desc_banks[i].base_vaddr_unaligned,
  1284. soc->link_desc_banks[i].base_paddr_unaligned,
  1285. 0);
  1286. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1287. }
  1288. }
  1289. return QDF_STATUS_E_FAILURE;
  1290. }
  1291. /*
  1292. * Free link descriptor pool that was setup HW
  1293. */
  1294. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1295. {
  1296. int i;
  1297. if (soc->wbm_idle_link_ring.hal_srng) {
  1298. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1299. WBM_IDLE_LINK, 0);
  1300. }
  1301. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1302. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1303. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1304. soc->wbm_idle_scatter_buf_size,
  1305. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1306. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1307. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1308. }
  1309. }
  1310. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1311. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1312. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1313. soc->link_desc_banks[i].size,
  1314. soc->link_desc_banks[i].base_vaddr_unaligned,
  1315. soc->link_desc_banks[i].base_paddr_unaligned,
  1316. 0);
  1317. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1318. }
  1319. }
  1320. }
  1321. /* TODO: Following should be configurable */
  1322. #define WBM_RELEASE_RING_SIZE 64
  1323. #define TCL_CMD_RING_SIZE 32
  1324. #define TCL_STATUS_RING_SIZE 32
  1325. #if defined(QCA_WIFI_QCA6290)
  1326. #define REO_DST_RING_SIZE 1024
  1327. #else
  1328. #define REO_DST_RING_SIZE 2048
  1329. #endif
  1330. #define REO_REINJECT_RING_SIZE 32
  1331. #define RX_RELEASE_RING_SIZE 1024
  1332. #define REO_EXCEPTION_RING_SIZE 128
  1333. #define REO_CMD_RING_SIZE 64
  1334. #define REO_STATUS_RING_SIZE 128
  1335. #define RXDMA_BUF_RING_SIZE 1024
  1336. #define RXDMA_REFILL_RING_SIZE 4096
  1337. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1338. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1339. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1340. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1341. #define RXDMA_ERR_DST_RING_SIZE 1024
  1342. /*
  1343. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1344. * @soc: Datapath SOC handle
  1345. *
  1346. * This is a timer function used to age out stale WDS nodes from
  1347. * AST table
  1348. */
  1349. #ifdef FEATURE_WDS
  1350. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1351. {
  1352. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1353. struct dp_pdev *pdev;
  1354. struct dp_vdev *vdev;
  1355. struct dp_peer *peer;
  1356. struct dp_ast_entry *ase, *temp_ase;
  1357. int i;
  1358. qdf_spin_lock_bh(&soc->ast_lock);
  1359. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1360. pdev = soc->pdev_list[i];
  1361. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1362. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1363. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1364. /*
  1365. * Do not expire static ast entries
  1366. * and HM WDS entries
  1367. */
  1368. if (ase->type ==
  1369. CDP_TXRX_AST_TYPE_STATIC ||
  1370. ase->type ==
  1371. CDP_TXRX_AST_TYPE_WDS_HM)
  1372. continue;
  1373. if (ase->is_active) {
  1374. ase->is_active = FALSE;
  1375. continue;
  1376. }
  1377. DP_STATS_INC(soc, ast.aged_out, 1);
  1378. dp_peer_del_ast(soc, ase);
  1379. }
  1380. }
  1381. }
  1382. }
  1383. qdf_spin_unlock_bh(&soc->ast_lock);
  1384. if (qdf_atomic_read(&soc->cmn_init_done))
  1385. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1386. }
  1387. /*
  1388. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1389. * @soc: Datapath SOC handle
  1390. *
  1391. * Return: None
  1392. */
  1393. static void dp_soc_wds_attach(struct dp_soc *soc)
  1394. {
  1395. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1396. dp_wds_aging_timer_fn, (void *)soc,
  1397. QDF_TIMER_TYPE_WAKE_APPS);
  1398. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1399. }
  1400. /*
  1401. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1402. * @txrx_soc: DP SOC handle
  1403. *
  1404. * Return: None
  1405. */
  1406. static void dp_soc_wds_detach(struct dp_soc *soc)
  1407. {
  1408. qdf_timer_stop(&soc->wds_aging_timer);
  1409. qdf_timer_free(&soc->wds_aging_timer);
  1410. }
  1411. #else
  1412. static void dp_soc_wds_attach(struct dp_soc *soc)
  1413. {
  1414. }
  1415. static void dp_soc_wds_detach(struct dp_soc *soc)
  1416. {
  1417. }
  1418. #endif
  1419. /*
  1420. * dp_soc_reset_ring_map() - Reset cpu ring map
  1421. * @soc: Datapath soc handler
  1422. *
  1423. * This api resets the default cpu ring map
  1424. */
  1425. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1426. {
  1427. uint8_t i;
  1428. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1429. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1430. if (nss_config == 1) {
  1431. /*
  1432. * Setting Tx ring map for one nss offloaded radio
  1433. */
  1434. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1435. } else if (nss_config == 2) {
  1436. /*
  1437. * Setting Tx ring for two nss offloaded radios
  1438. */
  1439. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1440. } else {
  1441. /*
  1442. * Setting Tx ring map for all nss offloaded radios
  1443. */
  1444. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1445. }
  1446. }
  1447. }
  1448. /*
  1449. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1450. * @dp_soc - DP soc handle
  1451. * @ring_type - ring type
  1452. * @ring_num - ring_num
  1453. *
  1454. * return 0 or 1
  1455. */
  1456. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1457. {
  1458. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1459. uint8_t status = 0;
  1460. switch (ring_type) {
  1461. case WBM2SW_RELEASE:
  1462. case REO_DST:
  1463. case RXDMA_BUF:
  1464. status = ((nss_config) & (1 << ring_num));
  1465. break;
  1466. default:
  1467. break;
  1468. }
  1469. return status;
  1470. }
  1471. /*
  1472. * dp_soc_reset_intr_mask() - reset interrupt mask
  1473. * @dp_soc - DP Soc handle
  1474. *
  1475. * Return: Return void
  1476. */
  1477. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1478. {
  1479. uint8_t j;
  1480. int *grp_mask = NULL;
  1481. int group_number, mask, num_ring;
  1482. /* number of tx ring */
  1483. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1484. /*
  1485. * group mask for tx completion ring.
  1486. */
  1487. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1488. /* loop and reset the mask for only offloaded ring */
  1489. for (j = 0; j < num_ring; j++) {
  1490. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1491. continue;
  1492. }
  1493. /*
  1494. * Group number corresponding to tx offloaded ring.
  1495. */
  1496. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1497. if (group_number < 0) {
  1498. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1499. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1500. WBM2SW_RELEASE, j);
  1501. return;
  1502. }
  1503. /* reset the tx mask for offloaded ring */
  1504. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1505. mask &= (~(1 << j));
  1506. /*
  1507. * reset the interrupt mask for offloaded ring.
  1508. */
  1509. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1510. }
  1511. /* number of rx rings */
  1512. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1513. /*
  1514. * group mask for reo destination ring.
  1515. */
  1516. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1517. /* loop and reset the mask for only offloaded ring */
  1518. for (j = 0; j < num_ring; j++) {
  1519. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1520. continue;
  1521. }
  1522. /*
  1523. * Group number corresponding to rx offloaded ring.
  1524. */
  1525. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1526. if (group_number < 0) {
  1527. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1528. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1529. REO_DST, j);
  1530. return;
  1531. }
  1532. /* set the interrupt mask for offloaded ring */
  1533. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1534. mask &= (~(1 << j));
  1535. /*
  1536. * set the interrupt mask to zero for rx offloaded radio.
  1537. */
  1538. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1539. }
  1540. /*
  1541. * group mask for Rx buffer refill ring
  1542. */
  1543. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1544. /* loop and reset the mask for only offloaded ring */
  1545. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1546. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1547. continue;
  1548. }
  1549. /*
  1550. * Group number corresponding to rx offloaded ring.
  1551. */
  1552. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1553. if (group_number < 0) {
  1554. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1555. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1556. REO_DST, j);
  1557. return;
  1558. }
  1559. /* set the interrupt mask for offloaded ring */
  1560. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1561. group_number);
  1562. mask &= (~(1 << j));
  1563. /*
  1564. * set the interrupt mask to zero for rx offloaded radio.
  1565. */
  1566. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1567. group_number, mask);
  1568. }
  1569. }
  1570. #ifdef IPA_OFFLOAD
  1571. /**
  1572. * dp_reo_remap_config() - configure reo remap register value based
  1573. * nss configuration.
  1574. * based on offload_radio value below remap configuration
  1575. * get applied.
  1576. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1577. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1578. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1579. * 3 - both Radios handled by NSS (remap not required)
  1580. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1581. *
  1582. * @remap1: output parameter indicates reo remap 1 register value
  1583. * @remap2: output parameter indicates reo remap 2 register value
  1584. * Return: bool type, true if remap is configured else false.
  1585. */
  1586. static bool dp_reo_remap_config(struct dp_soc *soc,
  1587. uint32_t *remap1,
  1588. uint32_t *remap2)
  1589. {
  1590. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1591. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1592. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1593. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1594. return true;
  1595. }
  1596. #else
  1597. static bool dp_reo_remap_config(struct dp_soc *soc,
  1598. uint32_t *remap1,
  1599. uint32_t *remap2)
  1600. {
  1601. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1602. switch (offload_radio) {
  1603. case 0:
  1604. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1605. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1606. (0x3 << 18) | (0x4 << 21)) << 8;
  1607. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1608. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1609. (0x3 << 18) | (0x4 << 21)) << 8;
  1610. break;
  1611. case 1:
  1612. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1613. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1614. (0x2 << 18) | (0x3 << 21)) << 8;
  1615. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1616. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1617. (0x4 << 18) | (0x2 << 21)) << 8;
  1618. break;
  1619. case 2:
  1620. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1621. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1622. (0x1 << 18) | (0x3 << 21)) << 8;
  1623. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1624. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1625. (0x4 << 18) | (0x1 << 21)) << 8;
  1626. break;
  1627. case 3:
  1628. /* return false if both radios are offloaded to NSS */
  1629. return false;
  1630. }
  1631. return true;
  1632. }
  1633. #endif
  1634. /*
  1635. * dp_reo_frag_dst_set() - configure reo register to set the
  1636. * fragment destination ring
  1637. * @soc : Datapath soc
  1638. * @frag_dst_ring : output parameter to set fragment destination ring
  1639. *
  1640. * Based on offload_radio below fragment destination rings is selected
  1641. * 0 - TCL
  1642. * 1 - SW1
  1643. * 2 - SW2
  1644. * 3 - SW3
  1645. * 4 - SW4
  1646. * 5 - Release
  1647. * 6 - FW
  1648. * 7 - alternate select
  1649. *
  1650. * return: void
  1651. */
  1652. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1653. {
  1654. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1655. switch (offload_radio) {
  1656. case 0:
  1657. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1658. break;
  1659. case 3:
  1660. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1661. break;
  1662. default:
  1663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1664. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1665. break;
  1666. }
  1667. }
  1668. /*
  1669. * dp_soc_cmn_setup() - Common SoC level initializion
  1670. * @soc: Datapath SOC handle
  1671. *
  1672. * This is an internal function used to setup common SOC data structures,
  1673. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1674. */
  1675. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1676. {
  1677. int i;
  1678. struct hal_reo_params reo_params;
  1679. int tx_ring_size;
  1680. int tx_comp_ring_size;
  1681. if (qdf_atomic_read(&soc->cmn_init_done))
  1682. return 0;
  1683. if (dp_peer_find_attach(soc))
  1684. goto fail0;
  1685. if (dp_hw_link_desc_pool_setup(soc))
  1686. goto fail1;
  1687. /* Setup SRNG rings */
  1688. /* Common rings */
  1689. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1690. WBM_RELEASE_RING_SIZE)) {
  1691. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1692. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1693. goto fail1;
  1694. }
  1695. soc->num_tcl_data_rings = 0;
  1696. /* Tx data rings */
  1697. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1698. soc->num_tcl_data_rings =
  1699. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1700. tx_comp_ring_size =
  1701. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1702. tx_ring_size =
  1703. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1704. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1705. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1706. TCL_DATA, i, 0, tx_ring_size)) {
  1707. QDF_TRACE(QDF_MODULE_ID_DP,
  1708. QDF_TRACE_LEVEL_ERROR,
  1709. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1710. goto fail1;
  1711. }
  1712. /*
  1713. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1714. * count
  1715. */
  1716. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1717. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1718. QDF_TRACE(QDF_MODULE_ID_DP,
  1719. QDF_TRACE_LEVEL_ERROR,
  1720. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1721. goto fail1;
  1722. }
  1723. }
  1724. } else {
  1725. /* This will be incremented during per pdev ring setup */
  1726. soc->num_tcl_data_rings = 0;
  1727. }
  1728. if (dp_tx_soc_attach(soc)) {
  1729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1730. FL("dp_tx_soc_attach failed"));
  1731. goto fail1;
  1732. }
  1733. /* TCL command and status rings */
  1734. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1735. TCL_CMD_RING_SIZE)) {
  1736. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1737. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1738. goto fail1;
  1739. }
  1740. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1741. TCL_STATUS_RING_SIZE)) {
  1742. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1743. FL("dp_srng_setup failed for tcl_status_ring"));
  1744. goto fail1;
  1745. }
  1746. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1747. * descriptors
  1748. */
  1749. /* Rx data rings */
  1750. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1751. soc->num_reo_dest_rings =
  1752. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1753. QDF_TRACE(QDF_MODULE_ID_DP,
  1754. QDF_TRACE_LEVEL_ERROR,
  1755. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1756. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1757. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1758. i, 0, REO_DST_RING_SIZE)) {
  1759. QDF_TRACE(QDF_MODULE_ID_DP,
  1760. QDF_TRACE_LEVEL_ERROR,
  1761. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1762. goto fail1;
  1763. }
  1764. }
  1765. } else {
  1766. /* This will be incremented during per pdev ring setup */
  1767. soc->num_reo_dest_rings = 0;
  1768. }
  1769. /* LMAC RxDMA to SW Rings configuration */
  1770. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1771. /* Only valid for MCL */
  1772. struct dp_pdev *pdev = soc->pdev_list[0];
  1773. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1774. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1775. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1776. QDF_TRACE(QDF_MODULE_ID_DP,
  1777. QDF_TRACE_LEVEL_ERROR,
  1778. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1779. goto fail1;
  1780. }
  1781. }
  1782. }
  1783. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1784. /* REO reinjection ring */
  1785. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1786. REO_REINJECT_RING_SIZE)) {
  1787. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1788. FL("dp_srng_setup failed for reo_reinject_ring"));
  1789. goto fail1;
  1790. }
  1791. /* Rx release ring */
  1792. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1793. RX_RELEASE_RING_SIZE)) {
  1794. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1795. FL("dp_srng_setup failed for rx_rel_ring"));
  1796. goto fail1;
  1797. }
  1798. /* Rx exception ring */
  1799. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1800. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1801. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1802. FL("dp_srng_setup failed for reo_exception_ring"));
  1803. goto fail1;
  1804. }
  1805. /* REO command and status rings */
  1806. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1807. REO_CMD_RING_SIZE)) {
  1808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1809. FL("dp_srng_setup failed for reo_cmd_ring"));
  1810. goto fail1;
  1811. }
  1812. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1813. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1814. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1815. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1816. REO_STATUS_RING_SIZE)) {
  1817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1818. FL("dp_srng_setup failed for reo_status_ring"));
  1819. goto fail1;
  1820. }
  1821. qdf_spinlock_create(&soc->ast_lock);
  1822. dp_soc_wds_attach(soc);
  1823. /* Reset the cpu ring map if radio is NSS offloaded */
  1824. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1825. dp_soc_reset_cpu_ring_map(soc);
  1826. dp_soc_reset_intr_mask(soc);
  1827. }
  1828. /* Setup HW REO */
  1829. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1830. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1831. /*
  1832. * Reo ring remap is not required if both radios
  1833. * are offloaded to NSS
  1834. */
  1835. if (!dp_reo_remap_config(soc,
  1836. &reo_params.remap1,
  1837. &reo_params.remap2))
  1838. goto out;
  1839. reo_params.rx_hash_enabled = true;
  1840. }
  1841. /* setup the global rx defrag waitlist */
  1842. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1843. soc->rx.defrag.timeout_ms =
  1844. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1845. soc->rx.flags.defrag_timeout_check =
  1846. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1847. out:
  1848. /*
  1849. * set the fragment destination ring
  1850. */
  1851. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1852. hal_reo_setup(soc->hal_soc, &reo_params);
  1853. qdf_atomic_set(&soc->cmn_init_done, 1);
  1854. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1855. return 0;
  1856. fail1:
  1857. /*
  1858. * Cleanup will be done as part of soc_detach, which will
  1859. * be called on pdev attach failure
  1860. */
  1861. fail0:
  1862. return QDF_STATUS_E_FAILURE;
  1863. }
  1864. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1865. static void dp_lro_hash_setup(struct dp_soc *soc)
  1866. {
  1867. struct cdp_lro_hash_config lro_hash;
  1868. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1869. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1871. FL("LRO disabled RX hash disabled"));
  1872. return;
  1873. }
  1874. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1875. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1876. lro_hash.lro_enable = 1;
  1877. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1878. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1879. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1880. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1881. }
  1882. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1883. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1884. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1885. LRO_IPV4_SEED_ARR_SZ));
  1886. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1887. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1888. LRO_IPV6_SEED_ARR_SZ));
  1889. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1890. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1891. lro_hash.lro_enable, lro_hash.tcp_flag,
  1892. lro_hash.tcp_flag_mask);
  1893. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1894. QDF_TRACE_LEVEL_ERROR,
  1895. (void *)lro_hash.toeplitz_hash_ipv4,
  1896. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1897. LRO_IPV4_SEED_ARR_SZ));
  1898. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1899. QDF_TRACE_LEVEL_ERROR,
  1900. (void *)lro_hash.toeplitz_hash_ipv6,
  1901. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1902. LRO_IPV6_SEED_ARR_SZ));
  1903. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1904. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1905. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1906. (soc->ctrl_psoc, &lro_hash);
  1907. }
  1908. /*
  1909. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1910. * @soc: data path SoC handle
  1911. * @pdev: Physical device handle
  1912. *
  1913. * Return: 0 - success, > 0 - failure
  1914. */
  1915. #ifdef QCA_HOST2FW_RXBUF_RING
  1916. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1917. struct dp_pdev *pdev)
  1918. {
  1919. int max_mac_rings =
  1920. wlan_cfg_get_num_mac_rings
  1921. (pdev->wlan_cfg_ctx);
  1922. int i;
  1923. for (i = 0; i < max_mac_rings; i++) {
  1924. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1925. "%s: pdev_id %d mac_id %d\n",
  1926. __func__, pdev->pdev_id, i);
  1927. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1928. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1929. QDF_TRACE(QDF_MODULE_ID_DP,
  1930. QDF_TRACE_LEVEL_ERROR,
  1931. FL("failed rx mac ring setup"));
  1932. return QDF_STATUS_E_FAILURE;
  1933. }
  1934. }
  1935. return QDF_STATUS_SUCCESS;
  1936. }
  1937. #else
  1938. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1939. struct dp_pdev *pdev)
  1940. {
  1941. return QDF_STATUS_SUCCESS;
  1942. }
  1943. #endif
  1944. /**
  1945. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1946. * @pdev - DP_PDEV handle
  1947. *
  1948. * Return: void
  1949. */
  1950. static inline void
  1951. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1952. {
  1953. uint8_t map_id;
  1954. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1955. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1956. sizeof(default_dscp_tid_map));
  1957. }
  1958. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1959. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1960. pdev->dscp_tid_map[map_id],
  1961. map_id);
  1962. }
  1963. }
  1964. #ifdef QCA_SUPPORT_SON
  1965. /**
  1966. * dp_mark_peer_inact(): Update peer inactivity status
  1967. * @peer_handle - datapath peer handle
  1968. *
  1969. * Return: void
  1970. */
  1971. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1972. {
  1973. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1974. struct dp_pdev *pdev;
  1975. struct dp_soc *soc;
  1976. bool inactive_old;
  1977. if (!peer)
  1978. return;
  1979. pdev = peer->vdev->pdev;
  1980. soc = pdev->soc;
  1981. inactive_old = peer->peer_bs_inact_flag == 1;
  1982. if (!inactive)
  1983. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1984. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1985. if (inactive_old != inactive) {
  1986. struct ieee80211com *ic;
  1987. struct ol_ath_softc_net80211 *scn;
  1988. scn = (struct ol_ath_softc_net80211 *)pdev->osif_pdev;
  1989. ic = &scn->sc_ic;
  1990. /**
  1991. * Note: a node lookup can happen in RX datapath context
  1992. * when a node changes from inactive to active (at most once
  1993. * per inactivity timeout threshold)
  1994. */
  1995. if (soc->cdp_soc.ol_ops->record_act_change) {
  1996. soc->cdp_soc.ol_ops->record_act_change(ic->ic_pdev_obj,
  1997. peer->mac_addr.raw, !inactive);
  1998. }
  1999. }
  2000. }
  2001. /**
  2002. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2003. *
  2004. * Periodically checks the inactivity status
  2005. */
  2006. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2007. {
  2008. struct dp_pdev *pdev;
  2009. struct dp_vdev *vdev;
  2010. struct dp_peer *peer;
  2011. struct dp_soc *soc;
  2012. int i;
  2013. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2014. qdf_spin_lock(&soc->peer_ref_mutex);
  2015. for (i = 0; i < soc->pdev_count; i++) {
  2016. pdev = soc->pdev_list[i];
  2017. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2018. if (vdev->opmode != wlan_op_mode_ap)
  2019. continue;
  2020. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2021. if (!peer->authorize) {
  2022. /**
  2023. * Inactivity check only interested in
  2024. * connected node
  2025. */
  2026. continue;
  2027. }
  2028. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2029. /**
  2030. * This check ensures we do not wait extra long
  2031. * due to the potential race condition
  2032. */
  2033. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2034. }
  2035. if (peer->peer_bs_inact > 0) {
  2036. /* Do not let it wrap around */
  2037. peer->peer_bs_inact--;
  2038. }
  2039. if (peer->peer_bs_inact == 0)
  2040. dp_mark_peer_inact(peer, true);
  2041. }
  2042. }
  2043. }
  2044. qdf_spin_unlock(&soc->peer_ref_mutex);
  2045. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2046. soc->pdev_bs_inact_interval * 1000);
  2047. }
  2048. /**
  2049. * dp_free_inact_timer(): free inact timer
  2050. * @timer - inact timer handle
  2051. *
  2052. * Return: bool
  2053. */
  2054. void dp_free_inact_timer(struct dp_soc *soc)
  2055. {
  2056. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2057. }
  2058. #else
  2059. void dp_mark_peer_inact(void *peer, bool inactive)
  2060. {
  2061. return;
  2062. }
  2063. void dp_free_inact_timer(struct dp_soc *soc)
  2064. {
  2065. return;
  2066. }
  2067. #endif
  2068. /*
  2069. * dp_pdev_attach_wifi3() - attach txrx pdev
  2070. * @ctrl_pdev: Opaque PDEV object
  2071. * @txrx_soc: Datapath SOC handle
  2072. * @htc_handle: HTC handle for host-target interface
  2073. * @qdf_osdev: QDF OS device
  2074. * @pdev_id: PDEV ID
  2075. *
  2076. * Return: DP PDEV handle on success, NULL on failure
  2077. */
  2078. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2079. struct cdp_cfg *ctrl_pdev,
  2080. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2081. {
  2082. int tx_ring_size;
  2083. int tx_comp_ring_size;
  2084. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2085. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2086. if (!pdev) {
  2087. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2088. FL("DP PDEV memory allocation failed"));
  2089. goto fail0;
  2090. }
  2091. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2092. if (!pdev->wlan_cfg_ctx) {
  2093. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2094. FL("pdev cfg_attach failed"));
  2095. qdf_mem_free(pdev);
  2096. goto fail0;
  2097. }
  2098. /*
  2099. * set nss pdev config based on soc config
  2100. */
  2101. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2102. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2103. pdev->soc = soc;
  2104. pdev->osif_pdev = ctrl_pdev;
  2105. pdev->pdev_id = pdev_id;
  2106. soc->pdev_list[pdev_id] = pdev;
  2107. soc->pdev_count++;
  2108. TAILQ_INIT(&pdev->vdev_list);
  2109. pdev->vdev_count = 0;
  2110. qdf_spinlock_create(&pdev->tx_mutex);
  2111. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2112. TAILQ_INIT(&pdev->neighbour_peers_list);
  2113. if (dp_soc_cmn_setup(soc)) {
  2114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2115. FL("dp_soc_cmn_setup failed"));
  2116. goto fail1;
  2117. }
  2118. /* Setup per PDEV TCL rings if configured */
  2119. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2120. tx_ring_size =
  2121. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2122. tx_comp_ring_size =
  2123. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2124. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2125. pdev_id, pdev_id, tx_ring_size)) {
  2126. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2127. FL("dp_srng_setup failed for tcl_data_ring"));
  2128. goto fail1;
  2129. }
  2130. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2131. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2133. FL("dp_srng_setup failed for tx_comp_ring"));
  2134. goto fail1;
  2135. }
  2136. soc->num_tcl_data_rings++;
  2137. }
  2138. /* Tx specific init */
  2139. if (dp_tx_pdev_attach(pdev)) {
  2140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2141. FL("dp_tx_pdev_attach failed"));
  2142. goto fail1;
  2143. }
  2144. /* Setup per PDEV REO rings if configured */
  2145. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2146. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2147. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2148. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2149. FL("dp_srng_setup failed for reo_dest_ringn"));
  2150. goto fail1;
  2151. }
  2152. soc->num_reo_dest_rings++;
  2153. }
  2154. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2155. RXDMA_REFILL_RING_SIZE)) {
  2156. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2157. FL("dp_srng_setup failed rx refill ring"));
  2158. goto fail1;
  2159. }
  2160. if (dp_rxdma_ring_setup(soc, pdev)) {
  2161. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2162. FL("RXDMA ring config failed"));
  2163. goto fail1;
  2164. }
  2165. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2166. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2167. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2168. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2169. goto fail1;
  2170. }
  2171. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2172. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2174. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2175. goto fail1;
  2176. }
  2177. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2178. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2179. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2180. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2181. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2182. goto fail1;
  2183. }
  2184. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2185. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2186. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2187. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2188. goto fail1;
  2189. }
  2190. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2191. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2192. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2193. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2194. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2195. goto fail1;
  2196. }
  2197. }
  2198. /* Setup second Rx refill buffer ring */
  2199. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2,
  2200. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2201. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2202. FL("dp_srng_setup failed second rx refill ring"));
  2203. goto fail1;
  2204. }
  2205. if (dp_ipa_ring_resource_setup(soc, pdev))
  2206. goto fail1;
  2207. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2208. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2209. FL("dp_ipa_uc_attach failed"));
  2210. goto fail1;
  2211. }
  2212. /* Rx specific init */
  2213. if (dp_rx_pdev_attach(pdev)) {
  2214. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2215. FL("dp_rx_pdev_attach failed"));
  2216. goto fail0;
  2217. }
  2218. DP_STATS_INIT(pdev);
  2219. /* Monitor filter init */
  2220. pdev->mon_filter_mode = MON_FILTER_ALL;
  2221. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2222. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2223. pdev->fp_data_filter = FILTER_DATA_ALL;
  2224. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2225. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2226. pdev->mo_data_filter = FILTER_DATA_ALL;
  2227. #ifndef CONFIG_WIN
  2228. /* MCL */
  2229. dp_local_peer_id_pool_init(pdev);
  2230. #endif
  2231. dp_dscp_tid_map_setup(pdev);
  2232. /* Rx monitor mode specific init */
  2233. if (dp_rx_pdev_mon_attach(pdev)) {
  2234. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2235. "dp_rx_pdev_attach failed\n");
  2236. goto fail1;
  2237. }
  2238. if (dp_wdi_event_attach(pdev)) {
  2239. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2240. "dp_wdi_evet_attach failed\n");
  2241. goto fail1;
  2242. }
  2243. /* set the reo destination during initialization */
  2244. pdev->reo_dest = pdev->pdev_id + 1;
  2245. return (struct cdp_pdev *)pdev;
  2246. fail1:
  2247. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2248. fail0:
  2249. return NULL;
  2250. }
  2251. /*
  2252. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2253. * @soc: data path SoC handle
  2254. * @pdev: Physical device handle
  2255. *
  2256. * Return: void
  2257. */
  2258. #ifdef QCA_HOST2FW_RXBUF_RING
  2259. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2260. struct dp_pdev *pdev)
  2261. {
  2262. int max_mac_rings =
  2263. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2264. int i;
  2265. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2266. max_mac_rings : MAX_RX_MAC_RINGS;
  2267. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2268. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2269. RXDMA_BUF, 1);
  2270. qdf_timer_free(&soc->mon_reap_timer);
  2271. }
  2272. #else
  2273. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2274. struct dp_pdev *pdev)
  2275. {
  2276. }
  2277. #endif
  2278. /*
  2279. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2280. * @pdev: device object
  2281. *
  2282. * Return: void
  2283. */
  2284. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2285. {
  2286. struct dp_neighbour_peer *peer = NULL;
  2287. struct dp_neighbour_peer *temp_peer = NULL;
  2288. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2289. neighbour_peer_list_elem, temp_peer) {
  2290. /* delete this peer from the list */
  2291. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2292. peer, neighbour_peer_list_elem);
  2293. qdf_mem_free(peer);
  2294. }
  2295. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2296. }
  2297. /*
  2298. * dp_pdev_detach_wifi3() - detach txrx pdev
  2299. * @txrx_pdev: Datapath PDEV handle
  2300. * @force: Force detach
  2301. *
  2302. */
  2303. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2304. {
  2305. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2306. struct dp_soc *soc = pdev->soc;
  2307. qdf_nbuf_t curr_nbuf, next_nbuf;
  2308. dp_wdi_event_detach(pdev);
  2309. dp_tx_pdev_detach(pdev);
  2310. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2311. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2312. TCL_DATA, pdev->pdev_id);
  2313. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2314. WBM2SW_RELEASE, pdev->pdev_id);
  2315. }
  2316. dp_pktlogmod_exit(pdev);
  2317. dp_rx_pdev_detach(pdev);
  2318. dp_rx_pdev_mon_detach(pdev);
  2319. dp_neighbour_peers_detach(pdev);
  2320. qdf_spinlock_destroy(&pdev->tx_mutex);
  2321. dp_ipa_uc_detach(soc, pdev);
  2322. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF, 2);
  2323. /* Cleanup per PDEV REO rings if configured */
  2324. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2325. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2326. REO_DST, pdev->pdev_id);
  2327. }
  2328. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2329. dp_rxdma_ring_cleanup(soc, pdev);
  2330. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2331. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2332. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2333. RXDMA_MONITOR_STATUS, 0);
  2334. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2335. RXDMA_MONITOR_DESC, 0);
  2336. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2337. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2338. } else {
  2339. int i;
  2340. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2341. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2342. RXDMA_DST, 0);
  2343. }
  2344. curr_nbuf = pdev->invalid_peer_head_msdu;
  2345. while (curr_nbuf) {
  2346. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2347. qdf_nbuf_free(curr_nbuf);
  2348. curr_nbuf = next_nbuf;
  2349. }
  2350. soc->pdev_list[pdev->pdev_id] = NULL;
  2351. soc->pdev_count--;
  2352. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2353. qdf_mem_free(pdev->dp_txrx_handle);
  2354. qdf_mem_free(pdev);
  2355. }
  2356. /*
  2357. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2358. * @soc: DP SOC handle
  2359. */
  2360. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2361. {
  2362. struct reo_desc_list_node *desc;
  2363. struct dp_rx_tid *rx_tid;
  2364. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2365. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2366. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2367. rx_tid = &desc->rx_tid;
  2368. qdf_mem_unmap_nbytes_single(soc->osdev,
  2369. rx_tid->hw_qdesc_paddr,
  2370. QDF_DMA_BIDIRECTIONAL,
  2371. rx_tid->hw_qdesc_alloc_size);
  2372. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2373. qdf_mem_free(desc);
  2374. }
  2375. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2376. qdf_list_destroy(&soc->reo_desc_freelist);
  2377. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2378. }
  2379. /*
  2380. * dp_soc_detach_wifi3() - Detach txrx SOC
  2381. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2382. */
  2383. static void dp_soc_detach_wifi3(void *txrx_soc)
  2384. {
  2385. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2386. int i;
  2387. qdf_atomic_set(&soc->cmn_init_done, 0);
  2388. qdf_flush_work(&soc->htt_stats.work);
  2389. qdf_disable_work(&soc->htt_stats.work);
  2390. /* Free pending htt stats messages */
  2391. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2392. dp_free_inact_timer(soc);
  2393. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2394. if (soc->pdev_list[i])
  2395. dp_pdev_detach_wifi3(
  2396. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2397. }
  2398. dp_peer_find_detach(soc);
  2399. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2400. * SW descriptors
  2401. */
  2402. /* Free the ring memories */
  2403. /* Common rings */
  2404. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2405. dp_tx_soc_detach(soc);
  2406. /* Tx data rings */
  2407. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2408. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2409. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2410. TCL_DATA, i);
  2411. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2412. WBM2SW_RELEASE, i);
  2413. }
  2414. }
  2415. /* TCL command and status rings */
  2416. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2417. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2418. /* Rx data rings */
  2419. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2420. soc->num_reo_dest_rings =
  2421. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2422. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2423. /* TODO: Get number of rings and ring sizes
  2424. * from wlan_cfg
  2425. */
  2426. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2427. REO_DST, i);
  2428. }
  2429. }
  2430. /* REO reinjection ring */
  2431. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2432. /* Rx release ring */
  2433. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2434. /* Rx exception ring */
  2435. /* TODO: Better to store ring_type and ring_num in
  2436. * dp_srng during setup
  2437. */
  2438. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2439. /* REO command and status rings */
  2440. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2441. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2442. dp_hw_link_desc_pool_cleanup(soc);
  2443. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2444. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2445. htt_soc_detach(soc->htt_handle);
  2446. dp_reo_cmdlist_destroy(soc);
  2447. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2448. dp_reo_desc_freelist_destroy(soc);
  2449. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2450. dp_soc_wds_detach(soc);
  2451. qdf_spinlock_destroy(&soc->ast_lock);
  2452. qdf_mem_free(soc);
  2453. }
  2454. /*
  2455. * dp_rxdma_ring_config() - configure the RX DMA rings
  2456. *
  2457. * This function is used to configure the MAC rings.
  2458. * On MCL host provides buffers in Host2FW ring
  2459. * FW refills (copies) buffers to the ring and updates
  2460. * ring_idx in register
  2461. *
  2462. * @soc: data path SoC handle
  2463. *
  2464. * Return: void
  2465. */
  2466. #ifdef QCA_HOST2FW_RXBUF_RING
  2467. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2468. {
  2469. int i;
  2470. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2471. struct dp_pdev *pdev = soc->pdev_list[i];
  2472. if (pdev) {
  2473. int mac_id = 0;
  2474. int j;
  2475. bool dbs_enable = 0;
  2476. int max_mac_rings =
  2477. wlan_cfg_get_num_mac_rings
  2478. (pdev->wlan_cfg_ctx);
  2479. htt_srng_setup(soc->htt_handle, 0,
  2480. pdev->rx_refill_buf_ring.hal_srng,
  2481. RXDMA_BUF);
  2482. if (pdev->rx_refill_buf_ring2.hal_srng)
  2483. htt_srng_setup(soc->htt_handle, 0,
  2484. pdev->rx_refill_buf_ring2.hal_srng,
  2485. RXDMA_BUF);
  2486. if (soc->cdp_soc.ol_ops->
  2487. is_hw_dbs_2x2_capable) {
  2488. dbs_enable = soc->cdp_soc.ol_ops->
  2489. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2490. }
  2491. if (dbs_enable) {
  2492. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2493. QDF_TRACE_LEVEL_ERROR,
  2494. FL("DBS enabled max_mac_rings %d\n"),
  2495. max_mac_rings);
  2496. } else {
  2497. max_mac_rings = 1;
  2498. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2499. QDF_TRACE_LEVEL_ERROR,
  2500. FL("DBS disabled, max_mac_rings %d\n"),
  2501. max_mac_rings);
  2502. }
  2503. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2504. FL("pdev_id %d max_mac_rings %d\n"),
  2505. pdev->pdev_id, max_mac_rings);
  2506. for (j = 0; j < max_mac_rings; j++) {
  2507. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2508. QDF_TRACE_LEVEL_ERROR,
  2509. FL("mac_id %d\n"), mac_id);
  2510. htt_srng_setup(soc->htt_handle, mac_id,
  2511. pdev->rx_mac_buf_ring[j]
  2512. .hal_srng,
  2513. RXDMA_BUF);
  2514. htt_srng_setup(soc->htt_handle, mac_id,
  2515. pdev->rxdma_err_dst_ring[j]
  2516. .hal_srng,
  2517. RXDMA_DST);
  2518. mac_id++;
  2519. }
  2520. /* Configure monitor mode rings */
  2521. htt_srng_setup(soc->htt_handle, i,
  2522. pdev->rxdma_mon_buf_ring.hal_srng,
  2523. RXDMA_MONITOR_BUF);
  2524. htt_srng_setup(soc->htt_handle, i,
  2525. pdev->rxdma_mon_dst_ring.hal_srng,
  2526. RXDMA_MONITOR_DST);
  2527. htt_srng_setup(soc->htt_handle, i,
  2528. pdev->rxdma_mon_status_ring.hal_srng,
  2529. RXDMA_MONITOR_STATUS);
  2530. htt_srng_setup(soc->htt_handle, i,
  2531. pdev->rxdma_mon_desc_ring.hal_srng,
  2532. RXDMA_MONITOR_DESC);
  2533. }
  2534. }
  2535. /*
  2536. * Timer to reap rxdma status rings.
  2537. * Needed until we enable ppdu end interrupts
  2538. */
  2539. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2540. dp_service_mon_rings, (void *)soc,
  2541. QDF_TIMER_TYPE_WAKE_APPS);
  2542. soc->reap_timer_init = 1;
  2543. }
  2544. #else
  2545. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2546. {
  2547. int i;
  2548. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2549. struct dp_pdev *pdev = soc->pdev_list[i];
  2550. if (pdev) {
  2551. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2552. htt_srng_setup(soc->htt_handle, i,
  2553. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2554. htt_srng_setup(soc->htt_handle, i,
  2555. pdev->rxdma_mon_buf_ring.hal_srng,
  2556. RXDMA_MONITOR_BUF);
  2557. htt_srng_setup(soc->htt_handle, i,
  2558. pdev->rxdma_mon_dst_ring.hal_srng,
  2559. RXDMA_MONITOR_DST);
  2560. htt_srng_setup(soc->htt_handle, i,
  2561. pdev->rxdma_mon_status_ring.hal_srng,
  2562. RXDMA_MONITOR_STATUS);
  2563. htt_srng_setup(soc->htt_handle, i,
  2564. pdev->rxdma_mon_desc_ring.hal_srng,
  2565. RXDMA_MONITOR_DESC);
  2566. htt_srng_setup(soc->htt_handle, i,
  2567. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2568. RXDMA_DST);
  2569. }
  2570. }
  2571. }
  2572. #endif
  2573. /*
  2574. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2575. * @txrx_soc: Datapath SOC handle
  2576. */
  2577. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2578. {
  2579. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2580. htt_soc_attach_target(soc->htt_handle);
  2581. dp_rxdma_ring_config(soc);
  2582. DP_STATS_INIT(soc);
  2583. /* initialize work queue for stats processing */
  2584. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2585. return 0;
  2586. }
  2587. /*
  2588. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2589. * @txrx_soc: Datapath SOC handle
  2590. */
  2591. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2592. {
  2593. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2594. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2595. }
  2596. /*
  2597. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2598. * @txrx_soc: Datapath SOC handle
  2599. * @nss_cfg: nss config
  2600. */
  2601. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2602. {
  2603. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2604. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2605. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2606. /*
  2607. * TODO: masked out based on the per offloaded radio
  2608. */
  2609. if (config == dp_nss_cfg_dbdc) {
  2610. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2611. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2612. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2613. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2614. }
  2615. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2616. FL("nss-wifi<0> nss config is enabled"));
  2617. }
  2618. /*
  2619. * dp_vdev_attach_wifi3() - attach txrx vdev
  2620. * @txrx_pdev: Datapath PDEV handle
  2621. * @vdev_mac_addr: MAC address of the virtual interface
  2622. * @vdev_id: VDEV Id
  2623. * @wlan_op_mode: VDEV operating mode
  2624. *
  2625. * Return: DP VDEV handle on success, NULL on failure
  2626. */
  2627. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2628. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2629. {
  2630. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2631. struct dp_soc *soc = pdev->soc;
  2632. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2633. int tx_ring_size;
  2634. if (!vdev) {
  2635. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2636. FL("DP VDEV memory allocation failed"));
  2637. goto fail0;
  2638. }
  2639. vdev->pdev = pdev;
  2640. vdev->vdev_id = vdev_id;
  2641. vdev->opmode = op_mode;
  2642. vdev->osdev = soc->osdev;
  2643. vdev->osif_rx = NULL;
  2644. vdev->osif_rsim_rx_decap = NULL;
  2645. vdev->osif_get_key = NULL;
  2646. vdev->osif_rx_mon = NULL;
  2647. vdev->osif_tx_free_ext = NULL;
  2648. vdev->osif_vdev = NULL;
  2649. vdev->delete.pending = 0;
  2650. vdev->safemode = 0;
  2651. vdev->drop_unenc = 1;
  2652. vdev->sec_type = cdp_sec_type_none;
  2653. #ifdef notyet
  2654. vdev->filters_num = 0;
  2655. #endif
  2656. qdf_mem_copy(
  2657. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2658. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2659. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2660. vdev->dscp_tid_map_id = 0;
  2661. vdev->mcast_enhancement_en = 0;
  2662. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2663. /* TODO: Initialize default HTT meta data that will be used in
  2664. * TCL descriptors for packets transmitted from this VDEV
  2665. */
  2666. TAILQ_INIT(&vdev->peer_list);
  2667. /* add this vdev into the pdev's list */
  2668. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2669. pdev->vdev_count++;
  2670. dp_tx_vdev_attach(vdev);
  2671. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2672. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2673. goto fail1;
  2674. if ((soc->intr_mode == DP_INTR_POLL) &&
  2675. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2676. if (pdev->vdev_count == 1)
  2677. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2678. }
  2679. dp_lro_hash_setup(soc);
  2680. /* LRO */
  2681. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2682. wlan_op_mode_sta == vdev->opmode)
  2683. vdev->lro_enable = true;
  2684. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2685. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2687. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2688. DP_STATS_INIT(vdev);
  2689. if (wlan_op_mode_sta == vdev->opmode)
  2690. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2691. vdev->mac_addr.raw);
  2692. return (struct cdp_vdev *)vdev;
  2693. fail1:
  2694. dp_tx_vdev_detach(vdev);
  2695. qdf_mem_free(vdev);
  2696. fail0:
  2697. return NULL;
  2698. }
  2699. /**
  2700. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2701. * @vdev: Datapath VDEV handle
  2702. * @osif_vdev: OSIF vdev handle
  2703. * @txrx_ops: Tx and Rx operations
  2704. *
  2705. * Return: DP VDEV handle on success, NULL on failure
  2706. */
  2707. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2708. void *osif_vdev,
  2709. struct ol_txrx_ops *txrx_ops)
  2710. {
  2711. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2712. vdev->osif_vdev = osif_vdev;
  2713. vdev->osif_rx = txrx_ops->rx.rx;
  2714. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2715. vdev->osif_get_key = txrx_ops->get_key;
  2716. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2717. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2718. #ifdef notyet
  2719. #if ATH_SUPPORT_WAPI
  2720. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2721. #endif
  2722. #endif
  2723. #ifdef UMAC_SUPPORT_PROXY_ARP
  2724. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2725. #endif
  2726. vdev->me_convert = txrx_ops->me_convert;
  2727. /* TODO: Enable the following once Tx code is integrated */
  2728. if (vdev->mesh_vdev)
  2729. txrx_ops->tx.tx = dp_tx_send_mesh;
  2730. else
  2731. txrx_ops->tx.tx = dp_tx_send;
  2732. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2733. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2734. "DP Vdev Register success");
  2735. }
  2736. /*
  2737. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2738. * @txrx_vdev: Datapath VDEV handle
  2739. * @callback: Callback OL_IF on completion of detach
  2740. * @cb_context: Callback context
  2741. *
  2742. */
  2743. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2744. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2745. {
  2746. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2747. struct dp_pdev *pdev = vdev->pdev;
  2748. struct dp_soc *soc = pdev->soc;
  2749. /* preconditions */
  2750. qdf_assert(vdev);
  2751. /* remove the vdev from its parent pdev's list */
  2752. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2753. /*
  2754. * Use peer_ref_mutex while accessing peer_list, in case
  2755. * a peer is in the process of being removed from the list.
  2756. */
  2757. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2758. /* check that the vdev has no peers allocated */
  2759. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2760. /* debug print - will be removed later */
  2761. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2762. FL("not deleting vdev object %pK (%pM)"
  2763. "until deletion finishes for all its peers"),
  2764. vdev, vdev->mac_addr.raw);
  2765. /* indicate that the vdev needs to be deleted */
  2766. vdev->delete.pending = 1;
  2767. vdev->delete.callback = callback;
  2768. vdev->delete.context = cb_context;
  2769. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2770. return;
  2771. }
  2772. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2773. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2774. vdev->vdev_id);
  2775. dp_tx_vdev_detach(vdev);
  2776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2777. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2778. if (wlan_op_mode_sta == vdev->opmode)
  2779. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2780. qdf_mem_free(vdev);
  2781. if (callback)
  2782. callback(cb_context);
  2783. }
  2784. /*
  2785. * dp_peer_create_wifi3() - attach txrx peer
  2786. * @txrx_vdev: Datapath VDEV handle
  2787. * @peer_mac_addr: Peer MAC address
  2788. *
  2789. * Return: DP peeer handle on success, NULL on failure
  2790. */
  2791. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2792. uint8_t *peer_mac_addr)
  2793. {
  2794. struct dp_peer *peer;
  2795. int i;
  2796. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2797. struct dp_pdev *pdev;
  2798. struct dp_soc *soc;
  2799. /* preconditions */
  2800. qdf_assert(vdev);
  2801. qdf_assert(peer_mac_addr);
  2802. pdev = vdev->pdev;
  2803. soc = pdev->soc;
  2804. #ifdef notyet
  2805. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2806. soc->mempool_ol_ath_peer);
  2807. #else
  2808. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2809. #endif
  2810. if (!peer)
  2811. return NULL; /* failure */
  2812. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2813. TAILQ_INIT(&peer->ast_entry_list);
  2814. /* store provided params */
  2815. peer->vdev = vdev;
  2816. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  2817. qdf_spinlock_create(&peer->peer_info_lock);
  2818. qdf_mem_copy(
  2819. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2820. /* TODO: See of rx_opt_proc is really required */
  2821. peer->rx_opt_proc = soc->rx_opt_proc;
  2822. /* initialize the peer_id */
  2823. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2824. peer->peer_ids[i] = HTT_INVALID_PEER;
  2825. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2826. qdf_atomic_init(&peer->ref_cnt);
  2827. /* keep one reference for attach */
  2828. qdf_atomic_inc(&peer->ref_cnt);
  2829. /* add this peer into the vdev's list */
  2830. if (wlan_op_mode_sta == vdev->opmode)
  2831. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  2832. else
  2833. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2834. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2835. /* TODO: See if hash based search is required */
  2836. dp_peer_find_hash_add(soc, peer);
  2837. /* Initialize the peer state */
  2838. peer->state = OL_TXRX_PEER_STATE_DISC;
  2839. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2840. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2841. vdev, peer, peer->mac_addr.raw,
  2842. qdf_atomic_read(&peer->ref_cnt));
  2843. /*
  2844. * For every peer MAp message search and set if bss_peer
  2845. */
  2846. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2847. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2848. "vdev bss_peer!!!!");
  2849. peer->bss_peer = 1;
  2850. vdev->vap_bss_peer = peer;
  2851. }
  2852. #ifndef CONFIG_WIN
  2853. dp_local_peer_id_alloc(pdev, peer);
  2854. #endif
  2855. DP_STATS_INIT(peer);
  2856. return (void *)peer;
  2857. }
  2858. /*
  2859. * dp_peer_setup_wifi3() - initialize the peer
  2860. * @vdev_hdl: virtual device object
  2861. * @peer: Peer object
  2862. *
  2863. * Return: void
  2864. */
  2865. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2866. {
  2867. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2868. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2869. struct dp_pdev *pdev;
  2870. struct dp_soc *soc;
  2871. bool hash_based = 0;
  2872. enum cdp_host_reo_dest_ring reo_dest;
  2873. /* preconditions */
  2874. qdf_assert(vdev);
  2875. qdf_assert(peer);
  2876. pdev = vdev->pdev;
  2877. soc = pdev->soc;
  2878. peer->last_assoc_rcvd = 0;
  2879. peer->last_disassoc_rcvd = 0;
  2880. peer->last_deauth_rcvd = 0;
  2881. /*
  2882. * hash based steering is disabled for Radios which are offloaded
  2883. * to NSS
  2884. */
  2885. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2886. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2888. FL("hash based steering for pdev: %d is %d\n"),
  2889. pdev->pdev_id, hash_based);
  2890. /*
  2891. * Below line of code will ensure the proper reo_dest ring is choosen
  2892. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2893. */
  2894. reo_dest = pdev->reo_dest;
  2895. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2896. /* TODO: Check the destination ring number to be passed to FW */
  2897. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2898. pdev->osif_pdev, peer->mac_addr.raw,
  2899. peer->vdev->vdev_id, hash_based, reo_dest);
  2900. }
  2901. dp_peer_rx_init(pdev, peer);
  2902. return;
  2903. }
  2904. /*
  2905. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2906. * @vdev_handle: virtual device object
  2907. * @htt_pkt_type: type of pkt
  2908. *
  2909. * Return: void
  2910. */
  2911. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2912. enum htt_cmn_pkt_type val)
  2913. {
  2914. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2915. vdev->tx_encap_type = val;
  2916. }
  2917. /*
  2918. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2919. * @vdev_handle: virtual device object
  2920. * @htt_pkt_type: type of pkt
  2921. *
  2922. * Return: void
  2923. */
  2924. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  2925. enum htt_cmn_pkt_type val)
  2926. {
  2927. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2928. vdev->rx_decap_type = val;
  2929. }
  2930. /*
  2931. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  2932. * @pdev_handle: physical device object
  2933. * @val: reo destination ring index (1 - 4)
  2934. *
  2935. * Return: void
  2936. */
  2937. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  2938. enum cdp_host_reo_dest_ring val)
  2939. {
  2940. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2941. if (pdev)
  2942. pdev->reo_dest = val;
  2943. }
  2944. /*
  2945. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  2946. * @pdev_handle: physical device object
  2947. *
  2948. * Return: reo destination ring index
  2949. */
  2950. static enum cdp_host_reo_dest_ring
  2951. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  2952. {
  2953. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2954. if (pdev)
  2955. return pdev->reo_dest;
  2956. else
  2957. return cdp_host_reo_dest_ring_unknown;
  2958. }
  2959. #ifdef QCA_SUPPORT_SON
  2960. static void dp_son_peer_authorize(struct dp_peer *peer)
  2961. {
  2962. struct dp_soc *soc;
  2963. soc = peer->vdev->pdev->soc;
  2964. peer->peer_bs_inact_flag = 0;
  2965. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2966. return;
  2967. }
  2968. #else
  2969. static void dp_son_peer_authorize(struct dp_peer *peer)
  2970. {
  2971. return;
  2972. }
  2973. #endif
  2974. /*
  2975. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  2976. * @pdev_handle: device object
  2977. * @val: value to be set
  2978. *
  2979. * Return: void
  2980. */
  2981. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  2982. uint32_t val)
  2983. {
  2984. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  2985. /* Enable/Disable smart mesh filtering. This flag will be checked
  2986. * during rx processing to check if packets are from NAC clients.
  2987. */
  2988. pdev->filter_neighbour_peers = val;
  2989. return 0;
  2990. }
  2991. /*
  2992. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  2993. * address for smart mesh filtering
  2994. * @pdev_handle: device object
  2995. * @cmd: Add/Del command
  2996. * @macaddr: nac client mac address
  2997. *
  2998. * Return: void
  2999. */
  3000. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3001. uint32_t cmd, uint8_t *macaddr)
  3002. {
  3003. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3004. struct dp_neighbour_peer *peer = NULL;
  3005. if (!macaddr)
  3006. goto fail0;
  3007. /* Store address of NAC (neighbour peer) which will be checked
  3008. * against TA of received packets.
  3009. */
  3010. if (cmd == DP_NAC_PARAM_ADD) {
  3011. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3012. sizeof(*peer));
  3013. if (!peer) {
  3014. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3015. FL("DP neighbour peer node memory allocation failed"));
  3016. goto fail0;
  3017. }
  3018. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3019. macaddr, DP_MAC_ADDR_LEN);
  3020. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3021. /* add this neighbour peer into the list */
  3022. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3023. neighbour_peer_list_elem);
  3024. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3025. return 1;
  3026. } else if (cmd == DP_NAC_PARAM_DEL) {
  3027. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3028. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3029. neighbour_peer_list_elem) {
  3030. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3031. macaddr, DP_MAC_ADDR_LEN)) {
  3032. /* delete this peer from the list */
  3033. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3034. peer, neighbour_peer_list_elem);
  3035. qdf_mem_free(peer);
  3036. break;
  3037. }
  3038. }
  3039. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3040. return 1;
  3041. }
  3042. fail0:
  3043. return 0;
  3044. }
  3045. /*
  3046. * dp_get_sec_type() - Get the security type
  3047. * @peer: Datapath peer handle
  3048. * @sec_idx: Security id (mcast, ucast)
  3049. *
  3050. * return sec_type: Security type
  3051. */
  3052. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3053. {
  3054. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3055. return dpeer->security[sec_idx].sec_type;
  3056. }
  3057. /*
  3058. * dp_peer_authorize() - authorize txrx peer
  3059. * @peer_handle: Datapath peer handle
  3060. * @authorize
  3061. *
  3062. */
  3063. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3064. {
  3065. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3066. struct dp_soc *soc;
  3067. if (peer != NULL) {
  3068. soc = peer->vdev->pdev->soc;
  3069. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3070. dp_son_peer_authorize(peer);
  3071. peer->authorize = authorize ? 1 : 0;
  3072. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3073. }
  3074. }
  3075. #ifdef QCA_SUPPORT_SON
  3076. /*
  3077. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3078. * @pdev_handle: Device handle
  3079. * @new_threshold : updated threshold value
  3080. *
  3081. */
  3082. static void
  3083. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3084. u_int16_t new_threshold)
  3085. {
  3086. struct dp_vdev *vdev;
  3087. struct dp_peer *peer;
  3088. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3089. struct dp_soc *soc = pdev->soc;
  3090. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3091. if (old_threshold == new_threshold)
  3092. return;
  3093. soc->pdev_bs_inact_reload = new_threshold;
  3094. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3095. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3096. if (vdev->opmode != wlan_op_mode_ap)
  3097. continue;
  3098. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3099. if (!peer->authorize)
  3100. continue;
  3101. if (old_threshold - peer->peer_bs_inact >=
  3102. new_threshold) {
  3103. dp_mark_peer_inact((void *)peer, true);
  3104. peer->peer_bs_inact = 0;
  3105. } else {
  3106. peer->peer_bs_inact = new_threshold -
  3107. (old_threshold - peer->peer_bs_inact);
  3108. }
  3109. }
  3110. }
  3111. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3112. }
  3113. /**
  3114. * dp_txrx_reset_inact_count(): Reset inact count
  3115. * @pdev_handle - device handle
  3116. *
  3117. * Return: void
  3118. */
  3119. static void
  3120. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3121. {
  3122. struct dp_vdev *vdev = NULL;
  3123. struct dp_peer *peer = NULL;
  3124. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3125. struct dp_soc *soc = pdev->soc;
  3126. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3127. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3128. if (vdev->opmode != wlan_op_mode_ap)
  3129. continue;
  3130. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3131. if (!peer->authorize)
  3132. continue;
  3133. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3134. }
  3135. }
  3136. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3137. }
  3138. /**
  3139. * dp_set_inact_params(): set inactivity params
  3140. * @pdev_handle - device handle
  3141. * @inact_check_interval - inactivity interval
  3142. * @inact_normal - Inactivity normal
  3143. * @inact_overload - Inactivity overload
  3144. *
  3145. * Return: bool
  3146. */
  3147. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3148. u_int16_t inact_check_interval,
  3149. u_int16_t inact_normal, u_int16_t inact_overload)
  3150. {
  3151. struct dp_soc *soc;
  3152. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3153. if (!pdev)
  3154. return false;
  3155. soc = pdev->soc;
  3156. if (!soc)
  3157. return false;
  3158. soc->pdev_bs_inact_interval = inact_check_interval;
  3159. soc->pdev_bs_inact_normal = inact_normal;
  3160. soc->pdev_bs_inact_overload = inact_overload;
  3161. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3162. soc->pdev_bs_inact_normal);
  3163. return true;
  3164. }
  3165. /**
  3166. * dp_start_inact_timer(): Inactivity timer start
  3167. * @pdev_handle - device handle
  3168. * @enable - Inactivity timer start/stop
  3169. *
  3170. * Return: bool
  3171. */
  3172. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3173. {
  3174. struct dp_soc *soc;
  3175. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3176. if (!pdev)
  3177. return false;
  3178. soc = pdev->soc;
  3179. if (!soc)
  3180. return false;
  3181. if (enable) {
  3182. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3183. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3184. soc->pdev_bs_inact_interval * 1000);
  3185. } else {
  3186. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3187. }
  3188. return true;
  3189. }
  3190. /**
  3191. * dp_set_overload(): Set inactivity overload
  3192. * @pdev_handle - device handle
  3193. * @overload - overload status
  3194. *
  3195. * Return: void
  3196. */
  3197. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3198. {
  3199. struct dp_soc *soc;
  3200. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3201. if (!pdev)
  3202. return;
  3203. soc = pdev->soc;
  3204. if (!soc)
  3205. return;
  3206. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3207. overload ? soc->pdev_bs_inact_overload :
  3208. soc->pdev_bs_inact_normal);
  3209. }
  3210. /**
  3211. * dp_peer_is_inact(): check whether peer is inactive
  3212. * @peer_handle - datapath peer handle
  3213. *
  3214. * Return: bool
  3215. */
  3216. bool dp_peer_is_inact(void *peer_handle)
  3217. {
  3218. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3219. if (!peer)
  3220. return false;
  3221. return peer->peer_bs_inact_flag == 1;
  3222. }
  3223. /**
  3224. * dp_init_inact_timer: initialize the inact timer
  3225. * @soc - SOC handle
  3226. *
  3227. * Return: void
  3228. */
  3229. void dp_init_inact_timer(struct dp_soc *soc)
  3230. {
  3231. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3232. dp_txrx_peer_find_inact_timeout_handler,
  3233. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3234. }
  3235. #else
  3236. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3237. u_int16_t inact_normal, u_int16_t inact_overload)
  3238. {
  3239. return false;
  3240. }
  3241. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3242. {
  3243. return false;
  3244. }
  3245. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3246. {
  3247. return;
  3248. }
  3249. void dp_init_inact_timer(struct dp_soc *soc)
  3250. {
  3251. return;
  3252. }
  3253. bool dp_peer_is_inact(void *peer)
  3254. {
  3255. return false;
  3256. }
  3257. #endif
  3258. /*
  3259. * dp_peer_unref_delete() - unref and delete peer
  3260. * @peer_handle: Datapath peer handle
  3261. *
  3262. */
  3263. void dp_peer_unref_delete(void *peer_handle)
  3264. {
  3265. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3266. struct dp_peer *bss_peer = NULL;
  3267. struct dp_vdev *vdev = peer->vdev;
  3268. struct dp_pdev *pdev = vdev->pdev;
  3269. struct dp_soc *soc = pdev->soc;
  3270. struct dp_peer *tmppeer;
  3271. int found = 0;
  3272. uint16_t peer_id;
  3273. /*
  3274. * Hold the lock all the way from checking if the peer ref count
  3275. * is zero until the peer references are removed from the hash
  3276. * table and vdev list (if the peer ref count is zero).
  3277. * This protects against a new HL tx operation starting to use the
  3278. * peer object just after this function concludes it's done being used.
  3279. * Furthermore, the lock needs to be held while checking whether the
  3280. * vdev's list of peers is empty, to make sure that list is not modified
  3281. * concurrently with the empty check.
  3282. */
  3283. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3284. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3285. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3286. peer, qdf_atomic_read(&peer->ref_cnt));
  3287. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3288. peer_id = peer->peer_ids[0];
  3289. /*
  3290. * Make sure that the reference to the peer in
  3291. * peer object map is removed
  3292. */
  3293. if (peer_id != HTT_INVALID_PEER)
  3294. soc->peer_id_to_obj_map[peer_id] = NULL;
  3295. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3296. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3297. /* remove the reference to the peer from the hash table */
  3298. dp_peer_find_hash_remove(soc, peer);
  3299. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3300. if (tmppeer == peer) {
  3301. found = 1;
  3302. break;
  3303. }
  3304. }
  3305. if (found) {
  3306. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3307. peer_list_elem);
  3308. } else {
  3309. /*Ignoring the remove operation as peer not found*/
  3310. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3311. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3312. peer, vdev, &peer->vdev->peer_list);
  3313. }
  3314. /* cleanup the peer data */
  3315. dp_peer_cleanup(vdev, peer);
  3316. /* check whether the parent vdev has no peers left */
  3317. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3318. /*
  3319. * Now that there are no references to the peer, we can
  3320. * release the peer reference lock.
  3321. */
  3322. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3323. /*
  3324. * Check if the parent vdev was waiting for its peers
  3325. * to be deleted, in order for it to be deleted too.
  3326. */
  3327. if (vdev->delete.pending) {
  3328. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3329. vdev->delete.callback;
  3330. void *vdev_delete_context =
  3331. vdev->delete.context;
  3332. QDF_TRACE(QDF_MODULE_ID_DP,
  3333. QDF_TRACE_LEVEL_INFO_HIGH,
  3334. FL("deleting vdev object %pK (%pM)"
  3335. " - its last peer is done"),
  3336. vdev, vdev->mac_addr.raw);
  3337. /* all peers are gone, go ahead and delete it */
  3338. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id,
  3339. FLOW_TYPE_VDEV,
  3340. vdev->vdev_id);
  3341. dp_tx_vdev_detach(vdev);
  3342. QDF_TRACE(QDF_MODULE_ID_DP,
  3343. QDF_TRACE_LEVEL_INFO_HIGH,
  3344. FL("deleting vdev object %pK (%pM)"),
  3345. vdev, vdev->mac_addr.raw);
  3346. qdf_mem_free(vdev);
  3347. if (vdev_delete_cb)
  3348. vdev_delete_cb(vdev_delete_context);
  3349. }
  3350. } else {
  3351. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3352. }
  3353. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3354. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3355. vdev->vdev_id, peer->mac_addr.raw);
  3356. }
  3357. #ifdef notyet
  3358. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3359. #else
  3360. if (!vdev || !vdev->vap_bss_peer)
  3361. goto free_peer;
  3362. bss_peer = vdev->vap_bss_peer;
  3363. DP_UPDATE_STATS(bss_peer, peer);
  3364. free_peer:
  3365. qdf_mem_free(peer);
  3366. #endif
  3367. } else {
  3368. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3369. }
  3370. }
  3371. /*
  3372. * dp_peer_detach_wifi3() – Detach txrx peer
  3373. * @peer_handle: Datapath peer handle
  3374. * @bitmap: bitmap indicating special handling of request.
  3375. *
  3376. */
  3377. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3378. {
  3379. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3380. /* redirect the peer's rx delivery function to point to a
  3381. * discard func
  3382. */
  3383. peer->rx_opt_proc = dp_rx_discard;
  3384. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3385. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3386. #ifndef CONFIG_WIN
  3387. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3388. #endif
  3389. qdf_spinlock_destroy(&peer->peer_info_lock);
  3390. /*
  3391. * Remove the reference added during peer_attach.
  3392. * The peer will still be left allocated until the
  3393. * PEER_UNMAP message arrives to remove the other
  3394. * reference, added by the PEER_MAP message.
  3395. */
  3396. dp_peer_unref_delete(peer_handle);
  3397. }
  3398. /*
  3399. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3400. * @peer_handle: Datapath peer handle
  3401. *
  3402. */
  3403. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3404. {
  3405. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3406. return vdev->mac_addr.raw;
  3407. }
  3408. /*
  3409. * dp_vdev_set_wds() - Enable per packet stats
  3410. * @vdev_handle: DP VDEV handle
  3411. * @val: value
  3412. *
  3413. * Return: none
  3414. */
  3415. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3416. {
  3417. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3418. vdev->wds_enabled = val;
  3419. return 0;
  3420. }
  3421. /*
  3422. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3423. * @peer_handle: Datapath peer handle
  3424. *
  3425. */
  3426. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3427. uint8_t vdev_id)
  3428. {
  3429. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3430. struct dp_vdev *vdev = NULL;
  3431. if (qdf_unlikely(!pdev))
  3432. return NULL;
  3433. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3434. if (vdev->vdev_id == vdev_id)
  3435. break;
  3436. }
  3437. return (struct cdp_vdev *)vdev;
  3438. }
  3439. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3440. {
  3441. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3442. return vdev->opmode;
  3443. }
  3444. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3445. {
  3446. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3447. struct dp_pdev *pdev = vdev->pdev;
  3448. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3449. }
  3450. /**
  3451. * dp_reset_monitor_mode() - Disable monitor mode
  3452. * @pdev_handle: Datapath PDEV handle
  3453. *
  3454. * Return: 0 on success, not 0 on failure
  3455. */
  3456. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3457. {
  3458. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3459. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3460. struct dp_soc *soc;
  3461. uint8_t pdev_id;
  3462. pdev_id = pdev->pdev_id;
  3463. soc = pdev->soc;
  3464. pdev->monitor_vdev = NULL;
  3465. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3466. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3467. pdev->rxdma_mon_buf_ring.hal_srng,
  3468. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3469. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3470. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3471. RX_BUFFER_SIZE, &htt_tlv_filter);
  3472. return 0;
  3473. }
  3474. /**
  3475. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3476. * @vdev_handle: Datapath VDEV handle
  3477. * @smart_monitor: Flag to denote if its smart monitor mode
  3478. *
  3479. * Return: 0 on success, not 0 on failure
  3480. */
  3481. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3482. uint8_t smart_monitor)
  3483. {
  3484. /* Many monitor VAPs can exists in a system but only one can be up at
  3485. * anytime
  3486. */
  3487. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3488. struct dp_pdev *pdev;
  3489. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3490. struct dp_soc *soc;
  3491. uint8_t pdev_id;
  3492. qdf_assert(vdev);
  3493. pdev = vdev->pdev;
  3494. pdev_id = pdev->pdev_id;
  3495. soc = pdev->soc;
  3496. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3497. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3498. pdev, pdev_id, soc, vdev);
  3499. /*Check if current pdev's monitor_vdev exists */
  3500. if (pdev->monitor_vdev) {
  3501. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3502. "vdev=%pK\n", vdev);
  3503. qdf_assert(vdev);
  3504. }
  3505. pdev->monitor_vdev = vdev;
  3506. /* If smart monitor mode, do not configure monitor ring */
  3507. if (smart_monitor)
  3508. return QDF_STATUS_SUCCESS;
  3509. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3510. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3511. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3512. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3513. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3514. pdev->mo_data_filter);
  3515. htt_tlv_filter.mpdu_start = 1;
  3516. htt_tlv_filter.msdu_start = 1;
  3517. htt_tlv_filter.packet = 1;
  3518. htt_tlv_filter.msdu_end = 1;
  3519. htt_tlv_filter.mpdu_end = 1;
  3520. htt_tlv_filter.packet_header = 1;
  3521. htt_tlv_filter.attention = 1;
  3522. htt_tlv_filter.ppdu_start = 0;
  3523. htt_tlv_filter.ppdu_end = 0;
  3524. htt_tlv_filter.ppdu_end_user_stats = 0;
  3525. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3526. htt_tlv_filter.ppdu_end_status_done = 0;
  3527. htt_tlv_filter.header_per_msdu = 1;
  3528. htt_tlv_filter.enable_fp =
  3529. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3530. htt_tlv_filter.enable_md = 0;
  3531. htt_tlv_filter.enable_mo =
  3532. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3533. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3534. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3535. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3536. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3537. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3538. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3539. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3540. pdev->rxdma_mon_buf_ring.hal_srng,
  3541. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3542. htt_tlv_filter.mpdu_start = 1;
  3543. htt_tlv_filter.msdu_start = 1;
  3544. htt_tlv_filter.packet = 0;
  3545. htt_tlv_filter.msdu_end = 1;
  3546. htt_tlv_filter.mpdu_end = 1;
  3547. htt_tlv_filter.packet_header = 1;
  3548. htt_tlv_filter.attention = 1;
  3549. htt_tlv_filter.ppdu_start = 1;
  3550. htt_tlv_filter.ppdu_end = 1;
  3551. htt_tlv_filter.ppdu_end_user_stats = 1;
  3552. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3553. htt_tlv_filter.ppdu_end_status_done = 1;
  3554. htt_tlv_filter.header_per_msdu = 0;
  3555. htt_tlv_filter.enable_fp =
  3556. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3557. htt_tlv_filter.enable_md = 0;
  3558. htt_tlv_filter.enable_mo =
  3559. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3560. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3561. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3562. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3563. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3564. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3565. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3566. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3567. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3568. RX_BUFFER_SIZE, &htt_tlv_filter);
  3569. return QDF_STATUS_SUCCESS;
  3570. }
  3571. /**
  3572. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3573. * @pdev_handle: Datapath PDEV handle
  3574. * @filter_val: Flag to select Filter for monitor mode
  3575. * Return: 0 on success, not 0 on failure
  3576. */
  3577. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3578. struct cdp_monitor_filter *filter_val)
  3579. {
  3580. /* Many monitor VAPs can exists in a system but only one can be up at
  3581. * anytime
  3582. */
  3583. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3584. struct dp_vdev *vdev = pdev->monitor_vdev;
  3585. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3586. struct dp_soc *soc;
  3587. uint8_t pdev_id;
  3588. pdev_id = pdev->pdev_id;
  3589. soc = pdev->soc;
  3590. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3591. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3592. pdev, pdev_id, soc, vdev);
  3593. /*Check if current pdev's monitor_vdev exists */
  3594. if (!pdev->monitor_vdev) {
  3595. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3596. "vdev=%pK\n", vdev);
  3597. qdf_assert(vdev);
  3598. }
  3599. /* update filter mode, type in pdev structure */
  3600. pdev->mon_filter_mode = filter_val->mode;
  3601. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3602. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3603. pdev->fp_data_filter = filter_val->fp_data;
  3604. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3605. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3606. pdev->mo_data_filter = filter_val->mo_data;
  3607. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3608. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3609. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3610. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3611. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3612. pdev->mo_data_filter);
  3613. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3614. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3615. pdev->rxdma_mon_buf_ring.hal_srng,
  3616. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3617. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3618. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3619. RX_BUFFER_SIZE, &htt_tlv_filter);
  3620. htt_tlv_filter.mpdu_start = 1;
  3621. htt_tlv_filter.msdu_start = 1;
  3622. htt_tlv_filter.packet = 1;
  3623. htt_tlv_filter.msdu_end = 1;
  3624. htt_tlv_filter.mpdu_end = 1;
  3625. htt_tlv_filter.packet_header = 1;
  3626. htt_tlv_filter.attention = 1;
  3627. htt_tlv_filter.ppdu_start = 0;
  3628. htt_tlv_filter.ppdu_end = 0;
  3629. htt_tlv_filter.ppdu_end_user_stats = 0;
  3630. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3631. htt_tlv_filter.ppdu_end_status_done = 0;
  3632. htt_tlv_filter.header_per_msdu = 1;
  3633. htt_tlv_filter.enable_fp =
  3634. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3635. htt_tlv_filter.enable_md = 0;
  3636. htt_tlv_filter.enable_mo =
  3637. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3638. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3639. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3640. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3641. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3642. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3643. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3644. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3645. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3646. RX_BUFFER_SIZE, &htt_tlv_filter);
  3647. htt_tlv_filter.mpdu_start = 1;
  3648. htt_tlv_filter.msdu_start = 1;
  3649. htt_tlv_filter.packet = 0;
  3650. htt_tlv_filter.msdu_end = 1;
  3651. htt_tlv_filter.mpdu_end = 1;
  3652. htt_tlv_filter.packet_header = 1;
  3653. htt_tlv_filter.attention = 1;
  3654. htt_tlv_filter.ppdu_start = 1;
  3655. htt_tlv_filter.ppdu_end = 1;
  3656. htt_tlv_filter.ppdu_end_user_stats = 1;
  3657. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3658. htt_tlv_filter.ppdu_end_status_done = 1;
  3659. htt_tlv_filter.header_per_msdu = 0;
  3660. htt_tlv_filter.enable_fp =
  3661. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3662. htt_tlv_filter.enable_md = 0;
  3663. htt_tlv_filter.enable_mo =
  3664. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3665. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3666. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3667. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3668. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3669. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3670. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3671. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3672. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3673. RX_BUFFER_SIZE, &htt_tlv_filter);
  3674. return QDF_STATUS_SUCCESS;
  3675. }
  3676. /**
  3677. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3678. * @vdev_handle: Datapath VDEV handle
  3679. * Return: true on ucast filter flag set
  3680. */
  3681. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3682. {
  3683. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3684. struct dp_pdev *pdev;
  3685. pdev = vdev->pdev;
  3686. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3687. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3688. return true;
  3689. return false;
  3690. }
  3691. /**
  3692. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3693. * @vdev_handle: Datapath VDEV handle
  3694. * Return: true on mcast filter flag set
  3695. */
  3696. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3697. {
  3698. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3699. struct dp_pdev *pdev;
  3700. pdev = vdev->pdev;
  3701. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3702. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3703. return true;
  3704. return false;
  3705. }
  3706. /**
  3707. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3708. * @vdev_handle: Datapath VDEV handle
  3709. * Return: true on non data filter flag set
  3710. */
  3711. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3712. {
  3713. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3714. struct dp_pdev *pdev;
  3715. pdev = vdev->pdev;
  3716. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3717. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3718. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3719. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3720. return true;
  3721. }
  3722. }
  3723. return false;
  3724. }
  3725. #ifdef MESH_MODE_SUPPORT
  3726. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3727. {
  3728. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3729. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3730. FL("val %d"), val);
  3731. vdev->mesh_vdev = val;
  3732. }
  3733. /*
  3734. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3735. * @vdev_hdl: virtual device object
  3736. * @val: value to be set
  3737. *
  3738. * Return: void
  3739. */
  3740. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3741. {
  3742. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3744. FL("val %d"), val);
  3745. vdev->mesh_rx_filter = val;
  3746. }
  3747. #endif
  3748. /*
  3749. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3750. * Current scope is bar recieved count
  3751. *
  3752. * @pdev_handle: DP_PDEV handle
  3753. *
  3754. * Return: void
  3755. */
  3756. #define STATS_PROC_TIMEOUT (HZ/10)
  3757. static void
  3758. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3759. {
  3760. struct dp_vdev *vdev;
  3761. struct dp_peer *peer;
  3762. uint32_t waitcnt;
  3763. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3764. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3765. if (!peer) {
  3766. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3767. FL("DP Invalid Peer refernce"));
  3768. return;
  3769. }
  3770. waitcnt = 0;
  3771. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3772. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  3773. && waitcnt < 10) {
  3774. schedule_timeout_interruptible(
  3775. STATS_PROC_TIMEOUT);
  3776. waitcnt++;
  3777. }
  3778. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  3779. }
  3780. }
  3781. }
  3782. /**
  3783. * dp_rx_bar_stats_cb(): BAR received stats callback
  3784. * @soc: SOC handle
  3785. * @cb_ctxt: Call back context
  3786. * @reo_status: Reo status
  3787. *
  3788. * return: void
  3789. */
  3790. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3791. union hal_reo_status *reo_status)
  3792. {
  3793. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3794. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3795. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3796. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3797. queue_status->header.status);
  3798. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3799. return;
  3800. }
  3801. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3802. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3803. }
  3804. /**
  3805. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3806. * @vdev: DP VDEV handle
  3807. *
  3808. * return: void
  3809. */
  3810. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3811. {
  3812. struct dp_peer *peer = NULL;
  3813. struct dp_soc *soc = vdev->pdev->soc;
  3814. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3815. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3816. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3817. DP_UPDATE_STATS(vdev, peer);
  3818. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3819. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3820. &vdev->stats, (uint16_t) vdev->vdev_id,
  3821. UPDATE_VDEV_STATS);
  3822. }
  3823. /**
  3824. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3825. * @pdev: DP PDEV handle
  3826. *
  3827. * return: void
  3828. */
  3829. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3830. {
  3831. struct dp_vdev *vdev = NULL;
  3832. struct dp_soc *soc = pdev->soc;
  3833. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3834. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3835. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3836. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3837. dp_aggregate_vdev_stats(vdev);
  3838. DP_UPDATE_STATS(pdev, vdev);
  3839. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3840. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3841. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3842. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3843. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3844. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3845. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3846. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3847. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3848. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3849. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3850. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  3851. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  3852. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  3853. DP_STATS_AGGR(pdev, vdev,
  3854. tx_i.mcast_en.dropped_map_error);
  3855. DP_STATS_AGGR(pdev, vdev,
  3856. tx_i.mcast_en.dropped_self_mac);
  3857. DP_STATS_AGGR(pdev, vdev,
  3858. tx_i.mcast_en.dropped_send_fail);
  3859. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  3860. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  3861. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  3862. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  3863. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  3864. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  3865. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  3866. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  3867. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  3868. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  3869. pdev->stats.tx_i.dropped.dropped_pkt.num =
  3870. pdev->stats.tx_i.dropped.dma_error +
  3871. pdev->stats.tx_i.dropped.ring_full +
  3872. pdev->stats.tx_i.dropped.enqueue_fail +
  3873. pdev->stats.tx_i.dropped.desc_na +
  3874. pdev->stats.tx_i.dropped.res_full;
  3875. pdev->stats.tx.last_ack_rssi =
  3876. vdev->stats.tx.last_ack_rssi;
  3877. pdev->stats.tx_i.tso.num_seg =
  3878. vdev->stats.tx_i.tso.num_seg;
  3879. }
  3880. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3881. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  3882. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  3883. }
  3884. /**
  3885. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  3886. * @pdev: DP_PDEV Handle
  3887. *
  3888. * Return:void
  3889. */
  3890. static inline void
  3891. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  3892. {
  3893. uint8_t index = 0;
  3894. DP_PRINT_STATS("PDEV Tx Stats:\n");
  3895. DP_PRINT_STATS("Received From Stack:");
  3896. DP_PRINT_STATS(" Packets = %d",
  3897. pdev->stats.tx_i.rcvd.num);
  3898. DP_PRINT_STATS(" Bytes = %llu",
  3899. pdev->stats.tx_i.rcvd.bytes);
  3900. DP_PRINT_STATS("Processed:");
  3901. DP_PRINT_STATS(" Packets = %d",
  3902. pdev->stats.tx_i.processed.num);
  3903. DP_PRINT_STATS(" Bytes = %llu",
  3904. pdev->stats.tx_i.processed.bytes);
  3905. DP_PRINT_STATS("Completions:");
  3906. DP_PRINT_STATS(" Packets = %d",
  3907. pdev->stats.tx.comp_pkt.num);
  3908. DP_PRINT_STATS(" Bytes = %llu",
  3909. pdev->stats.tx.comp_pkt.bytes);
  3910. DP_PRINT_STATS("Dropped:");
  3911. DP_PRINT_STATS(" Total = %d",
  3912. pdev->stats.tx_i.dropped.dropped_pkt.num);
  3913. DP_PRINT_STATS(" Dma_map_error = %d",
  3914. pdev->stats.tx_i.dropped.dma_error);
  3915. DP_PRINT_STATS(" Ring Full = %d",
  3916. pdev->stats.tx_i.dropped.ring_full);
  3917. DP_PRINT_STATS(" Descriptor Not available = %d",
  3918. pdev->stats.tx_i.dropped.desc_na);
  3919. DP_PRINT_STATS(" HW enqueue failed= %d",
  3920. pdev->stats.tx_i.dropped.enqueue_fail);
  3921. DP_PRINT_STATS(" Resources Full = %d",
  3922. pdev->stats.tx_i.dropped.res_full);
  3923. DP_PRINT_STATS(" FW removed = %d",
  3924. pdev->stats.tx.dropped.fw_rem);
  3925. DP_PRINT_STATS(" FW removed transmitted = %d",
  3926. pdev->stats.tx.dropped.fw_rem_tx);
  3927. DP_PRINT_STATS(" FW removed untransmitted = %d",
  3928. pdev->stats.tx.dropped.fw_rem_notx);
  3929. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  3930. pdev->stats.tx.dropped.age_out);
  3931. DP_PRINT_STATS("Scatter Gather:");
  3932. DP_PRINT_STATS(" Packets = %d",
  3933. pdev->stats.tx_i.sg.sg_pkt.num);
  3934. DP_PRINT_STATS(" Bytes = %llu",
  3935. pdev->stats.tx_i.sg.sg_pkt.bytes);
  3936. DP_PRINT_STATS(" Dropped By Host = %d",
  3937. pdev->stats.tx_i.sg.dropped_host);
  3938. DP_PRINT_STATS(" Dropped By Target = %d",
  3939. pdev->stats.tx_i.sg.dropped_target);
  3940. DP_PRINT_STATS("TSO:");
  3941. DP_PRINT_STATS(" Number of Segments = %d",
  3942. pdev->stats.tx_i.tso.num_seg);
  3943. DP_PRINT_STATS(" Packets = %d",
  3944. pdev->stats.tx_i.tso.tso_pkt.num);
  3945. DP_PRINT_STATS(" Bytes = %llu",
  3946. pdev->stats.tx_i.tso.tso_pkt.bytes);
  3947. DP_PRINT_STATS(" Dropped By Host = %d",
  3948. pdev->stats.tx_i.tso.dropped_host);
  3949. DP_PRINT_STATS("Mcast Enhancement:");
  3950. DP_PRINT_STATS(" Packets = %d",
  3951. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  3952. DP_PRINT_STATS(" Bytes = %llu",
  3953. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  3954. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  3955. pdev->stats.tx_i.mcast_en.dropped_map_error);
  3956. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  3957. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  3958. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  3959. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  3960. DP_PRINT_STATS(" Unicast sent = %d",
  3961. pdev->stats.tx_i.mcast_en.ucast);
  3962. DP_PRINT_STATS("Raw:");
  3963. DP_PRINT_STATS(" Packets = %d",
  3964. pdev->stats.tx_i.raw.raw_pkt.num);
  3965. DP_PRINT_STATS(" Bytes = %llu",
  3966. pdev->stats.tx_i.raw.raw_pkt.bytes);
  3967. DP_PRINT_STATS(" DMA map error = %d",
  3968. pdev->stats.tx_i.raw.dma_map_error);
  3969. DP_PRINT_STATS("Reinjected:");
  3970. DP_PRINT_STATS(" Packets = %d",
  3971. pdev->stats.tx_i.reinject_pkts.num);
  3972. DP_PRINT_STATS("Bytes = %llu\n",
  3973. pdev->stats.tx_i.reinject_pkts.bytes);
  3974. DP_PRINT_STATS("Inspected:");
  3975. DP_PRINT_STATS(" Packets = %d",
  3976. pdev->stats.tx_i.inspect_pkts.num);
  3977. DP_PRINT_STATS(" Bytes = %llu",
  3978. pdev->stats.tx_i.inspect_pkts.bytes);
  3979. DP_PRINT_STATS("Nawds Multicast:");
  3980. DP_PRINT_STATS(" Packets = %d",
  3981. pdev->stats.tx_i.nawds_mcast.num);
  3982. DP_PRINT_STATS(" Bytes = %llu",
  3983. pdev->stats.tx_i.nawds_mcast.bytes);
  3984. DP_PRINT_STATS("CCE Classified:");
  3985. DP_PRINT_STATS(" CCE Classified Packets: %u",
  3986. pdev->stats.tx_i.cce_classified);
  3987. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  3988. pdev->stats.tx_i.cce_classified_raw);
  3989. DP_PRINT_STATS("Mesh stats:");
  3990. DP_PRINT_STATS(" frames to firmware: %u",
  3991. pdev->stats.tx_i.mesh.exception_fw);
  3992. DP_PRINT_STATS(" completions from fw: %u",
  3993. pdev->stats.tx_i.mesh.completion_fw);
  3994. DP_PRINT_STATS("PPDU stats counter");
  3995. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  3996. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  3997. pdev->stats.ppdu_stats_counter[index]);
  3998. }
  3999. }
  4000. /**
  4001. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4002. * @pdev: DP_PDEV Handle
  4003. *
  4004. * Return: void
  4005. */
  4006. static inline void
  4007. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4008. {
  4009. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4010. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4011. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4012. pdev->stats.rx.rcvd_reo[0].num,
  4013. pdev->stats.rx.rcvd_reo[1].num,
  4014. pdev->stats.rx.rcvd_reo[2].num,
  4015. pdev->stats.rx.rcvd_reo[3].num);
  4016. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4017. pdev->stats.rx.rcvd_reo[0].bytes,
  4018. pdev->stats.rx.rcvd_reo[1].bytes,
  4019. pdev->stats.rx.rcvd_reo[2].bytes,
  4020. pdev->stats.rx.rcvd_reo[3].bytes);
  4021. DP_PRINT_STATS("Replenished:");
  4022. DP_PRINT_STATS(" Packets = %d",
  4023. pdev->stats.replenish.pkts.num);
  4024. DP_PRINT_STATS(" Bytes = %llu",
  4025. pdev->stats.replenish.pkts.bytes);
  4026. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4027. pdev->stats.buf_freelist);
  4028. DP_PRINT_STATS(" Low threshold intr = %d",
  4029. pdev->stats.replenish.low_thresh_intrs);
  4030. DP_PRINT_STATS("Dropped:");
  4031. DP_PRINT_STATS(" msdu_not_done = %d",
  4032. pdev->stats.dropped.msdu_not_done);
  4033. DP_PRINT_STATS("Sent To Stack:");
  4034. DP_PRINT_STATS(" Packets = %d",
  4035. pdev->stats.rx.to_stack.num);
  4036. DP_PRINT_STATS(" Bytes = %llu",
  4037. pdev->stats.rx.to_stack.bytes);
  4038. DP_PRINT_STATS("Multicast/Broadcast:");
  4039. DP_PRINT_STATS(" Packets = %d",
  4040. pdev->stats.rx.multicast.num);
  4041. DP_PRINT_STATS(" Bytes = %llu",
  4042. pdev->stats.rx.multicast.bytes);
  4043. DP_PRINT_STATS("Errors:");
  4044. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4045. pdev->stats.replenish.rxdma_err);
  4046. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4047. pdev->stats.err.desc_alloc_fail);
  4048. /* Get bar_recv_cnt */
  4049. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4050. DP_PRINT_STATS("BAR Received Count: = %d",
  4051. pdev->stats.rx.bar_recv_cnt);
  4052. }
  4053. /**
  4054. * dp_print_soc_tx_stats(): Print SOC level stats
  4055. * @soc DP_SOC Handle
  4056. *
  4057. * Return: void
  4058. */
  4059. static inline void
  4060. dp_print_soc_tx_stats(struct dp_soc *soc)
  4061. {
  4062. DP_PRINT_STATS("SOC Tx Stats:\n");
  4063. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4064. soc->stats.tx.desc_in_use);
  4065. DP_PRINT_STATS("Invalid peer:");
  4066. DP_PRINT_STATS(" Packets = %d",
  4067. soc->stats.tx.tx_invalid_peer.num);
  4068. DP_PRINT_STATS(" Bytes = %llu",
  4069. soc->stats.tx.tx_invalid_peer.bytes);
  4070. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4071. soc->stats.tx.tcl_ring_full[0],
  4072. soc->stats.tx.tcl_ring_full[1],
  4073. soc->stats.tx.tcl_ring_full[2]);
  4074. }
  4075. /**
  4076. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4077. * @soc: DP_SOC Handle
  4078. *
  4079. * Return:void
  4080. */
  4081. static inline void
  4082. dp_print_soc_rx_stats(struct dp_soc *soc)
  4083. {
  4084. uint32_t i;
  4085. char reo_error[DP_REO_ERR_LENGTH];
  4086. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4087. uint8_t index = 0;
  4088. DP_PRINT_STATS("SOC Rx Stats:\n");
  4089. DP_PRINT_STATS("Errors:\n");
  4090. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4091. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4092. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4093. DP_PRINT_STATS("Invalid RBM = %d",
  4094. soc->stats.rx.err.invalid_rbm);
  4095. DP_PRINT_STATS("Invalid Vdev = %d",
  4096. soc->stats.rx.err.invalid_vdev);
  4097. DP_PRINT_STATS("Invalid Pdev = %d",
  4098. soc->stats.rx.err.invalid_pdev);
  4099. DP_PRINT_STATS("Invalid Peer = %d",
  4100. soc->stats.rx.err.rx_invalid_peer.num);
  4101. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4102. soc->stats.rx.err.hal_ring_access_fail);
  4103. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4104. index += qdf_snprint(&rxdma_error[index],
  4105. DP_RXDMA_ERR_LENGTH - index,
  4106. " %d", soc->stats.rx.err.rxdma_error[i]);
  4107. }
  4108. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4109. rxdma_error);
  4110. index = 0;
  4111. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4112. index += qdf_snprint(&reo_error[index],
  4113. DP_REO_ERR_LENGTH - index,
  4114. " %d", soc->stats.rx.err.reo_error[i]);
  4115. }
  4116. DP_PRINT_STATS("REO Error(0-14):%s",
  4117. reo_error);
  4118. }
  4119. /**
  4120. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4121. * @soc: DP_SOC handle
  4122. * @srng: DP_SRNG handle
  4123. * @ring_name: SRNG name
  4124. *
  4125. * Return: void
  4126. */
  4127. static inline void
  4128. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4129. char *ring_name)
  4130. {
  4131. uint32_t tailp;
  4132. uint32_t headp;
  4133. if (srng->hal_srng != NULL) {
  4134. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4135. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4136. ring_name, headp, tailp);
  4137. }
  4138. }
  4139. /**
  4140. * dp_print_ring_stats(): Print tail and head pointer
  4141. * @pdev: DP_PDEV handle
  4142. *
  4143. * Return:void
  4144. */
  4145. static inline void
  4146. dp_print_ring_stats(struct dp_pdev *pdev)
  4147. {
  4148. uint32_t i;
  4149. char ring_name[STR_MAXLEN + 1];
  4150. dp_print_ring_stat_from_hal(pdev->soc,
  4151. &pdev->soc->reo_exception_ring,
  4152. "Reo Exception Ring");
  4153. dp_print_ring_stat_from_hal(pdev->soc,
  4154. &pdev->soc->reo_reinject_ring,
  4155. "Reo Inject Ring");
  4156. dp_print_ring_stat_from_hal(pdev->soc,
  4157. &pdev->soc->reo_cmd_ring,
  4158. "Reo Command Ring");
  4159. dp_print_ring_stat_from_hal(pdev->soc,
  4160. &pdev->soc->reo_status_ring,
  4161. "Reo Status Ring");
  4162. dp_print_ring_stat_from_hal(pdev->soc,
  4163. &pdev->soc->rx_rel_ring,
  4164. "Rx Release ring");
  4165. dp_print_ring_stat_from_hal(pdev->soc,
  4166. &pdev->soc->tcl_cmd_ring,
  4167. "Tcl command Ring");
  4168. dp_print_ring_stat_from_hal(pdev->soc,
  4169. &pdev->soc->tcl_status_ring,
  4170. "Tcl Status Ring");
  4171. dp_print_ring_stat_from_hal(pdev->soc,
  4172. &pdev->soc->wbm_desc_rel_ring,
  4173. "Wbm Desc Rel Ring");
  4174. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4175. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4176. dp_print_ring_stat_from_hal(pdev->soc,
  4177. &pdev->soc->reo_dest_ring[i],
  4178. ring_name);
  4179. }
  4180. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4181. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4182. dp_print_ring_stat_from_hal(pdev->soc,
  4183. &pdev->soc->tcl_data_ring[i],
  4184. ring_name);
  4185. }
  4186. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4187. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4188. dp_print_ring_stat_from_hal(pdev->soc,
  4189. &pdev->soc->tx_comp_ring[i],
  4190. ring_name);
  4191. }
  4192. dp_print_ring_stat_from_hal(pdev->soc,
  4193. &pdev->rx_refill_buf_ring,
  4194. "Rx Refill Buf Ring");
  4195. dp_print_ring_stat_from_hal(pdev->soc,
  4196. &pdev->rx_refill_buf_ring2,
  4197. "Second Rx Refill Buf Ring");
  4198. dp_print_ring_stat_from_hal(pdev->soc,
  4199. &pdev->rxdma_mon_buf_ring,
  4200. "Rxdma Mon Buf Ring");
  4201. dp_print_ring_stat_from_hal(pdev->soc,
  4202. &pdev->rxdma_mon_dst_ring,
  4203. "Rxdma Mon Dst Ring");
  4204. dp_print_ring_stat_from_hal(pdev->soc,
  4205. &pdev->rxdma_mon_status_ring,
  4206. "Rxdma Mon Status Ring");
  4207. dp_print_ring_stat_from_hal(pdev->soc,
  4208. &pdev->rxdma_mon_desc_ring,
  4209. "Rxdma mon desc Ring");
  4210. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4211. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4212. dp_print_ring_stat_from_hal(pdev->soc,
  4213. &pdev->rxdma_err_dst_ring[i],
  4214. ring_name);
  4215. }
  4216. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4217. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4218. dp_print_ring_stat_from_hal(pdev->soc,
  4219. &pdev->rx_mac_buf_ring[i],
  4220. ring_name);
  4221. }
  4222. }
  4223. /**
  4224. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4225. * @vdev: DP_VDEV handle
  4226. *
  4227. * Return:void
  4228. */
  4229. static inline void
  4230. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4231. {
  4232. struct dp_peer *peer = NULL;
  4233. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4234. DP_STATS_CLR(vdev->pdev);
  4235. DP_STATS_CLR(vdev->pdev->soc);
  4236. DP_STATS_CLR(vdev);
  4237. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4238. if (!peer)
  4239. return;
  4240. DP_STATS_CLR(peer);
  4241. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4242. soc->cdp_soc.ol_ops->update_dp_stats(
  4243. vdev->pdev->osif_pdev,
  4244. &peer->stats,
  4245. peer->peer_ids[0],
  4246. UPDATE_PEER_STATS);
  4247. }
  4248. }
  4249. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4250. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4251. &vdev->stats, (uint16_t)vdev->vdev_id,
  4252. UPDATE_VDEV_STATS);
  4253. }
  4254. /**
  4255. * dp_print_rx_rates(): Print Rx rate stats
  4256. * @vdev: DP_VDEV handle
  4257. *
  4258. * Return:void
  4259. */
  4260. static inline void
  4261. dp_print_rx_rates(struct dp_vdev *vdev)
  4262. {
  4263. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4264. uint8_t i, mcs, pkt_type;
  4265. uint8_t index = 0;
  4266. char nss[DP_NSS_LENGTH];
  4267. DP_PRINT_STATS("Rx Rate Info:\n");
  4268. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4269. index = 0;
  4270. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4271. if (!dp_rate_string[pkt_type][mcs].valid)
  4272. continue;
  4273. DP_PRINT_STATS(" %s = %d",
  4274. dp_rate_string[pkt_type][mcs].mcs_type,
  4275. pdev->stats.rx.pkt_type[pkt_type].
  4276. mcs_count[mcs]);
  4277. }
  4278. DP_PRINT_STATS("\n");
  4279. }
  4280. index = 0;
  4281. for (i = 0; i < SS_COUNT; i++) {
  4282. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4283. " %d", pdev->stats.rx.nss[i]);
  4284. }
  4285. DP_PRINT_STATS("NSS(1-8) = %s",
  4286. nss);
  4287. DP_PRINT_STATS("SGI ="
  4288. " 0.8us %d,"
  4289. " 0.4us %d,"
  4290. " 1.6us %d,"
  4291. " 3.2us %d,",
  4292. pdev->stats.rx.sgi_count[0],
  4293. pdev->stats.rx.sgi_count[1],
  4294. pdev->stats.rx.sgi_count[2],
  4295. pdev->stats.rx.sgi_count[3]);
  4296. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4297. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4298. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4299. DP_PRINT_STATS("Reception Type ="
  4300. " SU: %d,"
  4301. " MU_MIMO:%d,"
  4302. " MU_OFDMA:%d,"
  4303. " MU_OFDMA_MIMO:%d\n",
  4304. pdev->stats.rx.reception_type[0],
  4305. pdev->stats.rx.reception_type[1],
  4306. pdev->stats.rx.reception_type[2],
  4307. pdev->stats.rx.reception_type[3]);
  4308. DP_PRINT_STATS("Aggregation:\n");
  4309. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4310. pdev->stats.rx.ampdu_cnt);
  4311. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4312. pdev->stats.rx.non_ampdu_cnt);
  4313. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4314. pdev->stats.rx.amsdu_cnt);
  4315. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4316. pdev->stats.rx.non_amsdu_cnt);
  4317. }
  4318. /**
  4319. * dp_print_tx_rates(): Print tx rates
  4320. * @vdev: DP_VDEV handle
  4321. *
  4322. * Return:void
  4323. */
  4324. static inline void
  4325. dp_print_tx_rates(struct dp_vdev *vdev)
  4326. {
  4327. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4328. uint8_t mcs, pkt_type;
  4329. uint32_t index;
  4330. DP_PRINT_STATS("Tx Rate Info:\n");
  4331. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4332. index = 0;
  4333. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4334. if (!dp_rate_string[pkt_type][mcs].valid)
  4335. continue;
  4336. DP_PRINT_STATS(" %s = %d",
  4337. dp_rate_string[pkt_type][mcs].mcs_type,
  4338. pdev->stats.tx.pkt_type[pkt_type].
  4339. mcs_count[mcs]);
  4340. }
  4341. DP_PRINT_STATS("\n");
  4342. }
  4343. DP_PRINT_STATS("SGI ="
  4344. " 0.8us %d"
  4345. " 0.4us %d"
  4346. " 1.6us %d"
  4347. " 3.2us %d",
  4348. pdev->stats.tx.sgi_count[0],
  4349. pdev->stats.tx.sgi_count[1],
  4350. pdev->stats.tx.sgi_count[2],
  4351. pdev->stats.tx.sgi_count[3]);
  4352. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4353. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4354. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4355. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4356. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4357. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4358. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4359. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4360. DP_PRINT_STATS("Aggregation:\n");
  4361. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4362. pdev->stats.tx.amsdu_cnt);
  4363. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4364. pdev->stats.tx.non_amsdu_cnt);
  4365. }
  4366. /**
  4367. * dp_print_peer_stats():print peer stats
  4368. * @peer: DP_PEER handle
  4369. *
  4370. * return void
  4371. */
  4372. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4373. {
  4374. uint8_t i, mcs, pkt_type;
  4375. uint32_t index;
  4376. char nss[DP_NSS_LENGTH];
  4377. DP_PRINT_STATS("Node Tx Stats:\n");
  4378. DP_PRINT_STATS("Total Packet Completions = %d",
  4379. peer->stats.tx.comp_pkt.num);
  4380. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4381. peer->stats.tx.comp_pkt.bytes);
  4382. DP_PRINT_STATS("Success Packets = %d",
  4383. peer->stats.tx.tx_success.num);
  4384. DP_PRINT_STATS("Success Bytes = %llu",
  4385. peer->stats.tx.tx_success.bytes);
  4386. DP_PRINT_STATS("Unicast Success Packets = %d",
  4387. peer->stats.tx.ucast.num);
  4388. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4389. peer->stats.tx.ucast.bytes);
  4390. DP_PRINT_STATS("Multicast Success Packets = %d",
  4391. peer->stats.tx.mcast.num);
  4392. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4393. peer->stats.tx.mcast.bytes);
  4394. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4395. peer->stats.tx.bcast.num);
  4396. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4397. peer->stats.tx.bcast.bytes);
  4398. DP_PRINT_STATS("Packets Failed = %d",
  4399. peer->stats.tx.tx_failed);
  4400. DP_PRINT_STATS("Packets In OFDMA = %d",
  4401. peer->stats.tx.ofdma);
  4402. DP_PRINT_STATS("Packets In STBC = %d",
  4403. peer->stats.tx.stbc);
  4404. DP_PRINT_STATS("Packets In LDPC = %d",
  4405. peer->stats.tx.ldpc);
  4406. DP_PRINT_STATS("Packet Retries = %d",
  4407. peer->stats.tx.retries);
  4408. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4409. peer->stats.tx.amsdu_cnt);
  4410. DP_PRINT_STATS("Last Packet RSSI = %d",
  4411. peer->stats.tx.last_ack_rssi);
  4412. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4413. peer->stats.tx.dropped.fw_rem);
  4414. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4415. peer->stats.tx.dropped.fw_rem_tx);
  4416. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4417. peer->stats.tx.dropped.fw_rem_notx);
  4418. DP_PRINT_STATS("Dropped : Age Out = %d",
  4419. peer->stats.tx.dropped.age_out);
  4420. DP_PRINT_STATS("NAWDS : ");
  4421. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4422. peer->stats.tx.nawds_mcast_drop);
  4423. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4424. peer->stats.tx.nawds_mcast.num);
  4425. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4426. peer->stats.tx.nawds_mcast.bytes);
  4427. DP_PRINT_STATS("Rate Info:");
  4428. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4429. index = 0;
  4430. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4431. if (!dp_rate_string[pkt_type][mcs].valid)
  4432. continue;
  4433. DP_PRINT_STATS(" %s = %d",
  4434. dp_rate_string[pkt_type][mcs].mcs_type,
  4435. peer->stats.tx.pkt_type[pkt_type].
  4436. mcs_count[mcs]);
  4437. }
  4438. DP_PRINT_STATS("\n");
  4439. }
  4440. DP_PRINT_STATS("SGI = "
  4441. " 0.8us %d"
  4442. " 0.4us %d"
  4443. " 1.6us %d"
  4444. " 3.2us %d",
  4445. peer->stats.tx.sgi_count[0],
  4446. peer->stats.tx.sgi_count[1],
  4447. peer->stats.tx.sgi_count[2],
  4448. peer->stats.tx.sgi_count[3]);
  4449. DP_PRINT_STATS("Excess Retries per AC ");
  4450. DP_PRINT_STATS(" Best effort = %d",
  4451. peer->stats.tx.excess_retries_per_ac[0]);
  4452. DP_PRINT_STATS(" Background= %d",
  4453. peer->stats.tx.excess_retries_per_ac[1]);
  4454. DP_PRINT_STATS(" Video = %d",
  4455. peer->stats.tx.excess_retries_per_ac[2]);
  4456. DP_PRINT_STATS(" Voice = %d",
  4457. peer->stats.tx.excess_retries_per_ac[3]);
  4458. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4459. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4460. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4461. index = 0;
  4462. for (i = 0; i < SS_COUNT; i++) {
  4463. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4464. " %d", peer->stats.tx.nss[i]);
  4465. }
  4466. DP_PRINT_STATS("NSS(1-8) = %s",
  4467. nss);
  4468. DP_PRINT_STATS("Aggregation:");
  4469. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4470. peer->stats.tx.amsdu_cnt);
  4471. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4472. peer->stats.tx.non_amsdu_cnt);
  4473. DP_PRINT_STATS("Node Rx Stats:");
  4474. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4475. peer->stats.rx.to_stack.num);
  4476. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4477. peer->stats.rx.to_stack.bytes);
  4478. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4479. DP_PRINT_STATS("Ring Id = %d", i);
  4480. DP_PRINT_STATS(" Packets Received = %d",
  4481. peer->stats.rx.rcvd_reo[i].num);
  4482. DP_PRINT_STATS(" Bytes Received = %llu",
  4483. peer->stats.rx.rcvd_reo[i].bytes);
  4484. }
  4485. DP_PRINT_STATS("Multicast Packets Received = %d",
  4486. peer->stats.rx.multicast.num);
  4487. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4488. peer->stats.rx.multicast.bytes);
  4489. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4490. peer->stats.rx.bcast.num);
  4491. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4492. peer->stats.rx.bcast.bytes);
  4493. DP_PRINT_STATS("WDS Packets Received = %d",
  4494. peer->stats.rx.wds.num);
  4495. DP_PRINT_STATS("WDS Bytes Received = %llu",
  4496. peer->stats.rx.wds.bytes);
  4497. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4498. peer->stats.rx.intra_bss.pkts.num);
  4499. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4500. peer->stats.rx.intra_bss.pkts.bytes);
  4501. DP_PRINT_STATS("Raw Packets Received = %d",
  4502. peer->stats.rx.raw.num);
  4503. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4504. peer->stats.rx.raw.bytes);
  4505. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4506. peer->stats.rx.err.mic_err);
  4507. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4508. peer->stats.rx.err.decrypt_err);
  4509. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4510. peer->stats.rx.non_ampdu_cnt);
  4511. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4512. peer->stats.rx.ampdu_cnt);
  4513. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4514. peer->stats.rx.non_amsdu_cnt);
  4515. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4516. peer->stats.rx.amsdu_cnt);
  4517. DP_PRINT_STATS("NAWDS : ");
  4518. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4519. peer->stats.rx.nawds_mcast_drop.num);
  4520. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4521. peer->stats.rx.nawds_mcast_drop.bytes);
  4522. DP_PRINT_STATS("SGI ="
  4523. " 0.8us %d"
  4524. " 0.4us %d"
  4525. " 1.6us %d"
  4526. " 3.2us %d",
  4527. peer->stats.rx.sgi_count[0],
  4528. peer->stats.rx.sgi_count[1],
  4529. peer->stats.rx.sgi_count[2],
  4530. peer->stats.rx.sgi_count[3]);
  4531. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4532. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4533. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4534. DP_PRINT_STATS("Reception Type ="
  4535. " SU %d,"
  4536. " MU_MIMO %d,"
  4537. " MU_OFDMA %d,"
  4538. " MU_OFDMA_MIMO %d",
  4539. peer->stats.rx.reception_type[0],
  4540. peer->stats.rx.reception_type[1],
  4541. peer->stats.rx.reception_type[2],
  4542. peer->stats.rx.reception_type[3]);
  4543. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4544. index = 0;
  4545. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4546. if (!dp_rate_string[pkt_type][mcs].valid)
  4547. continue;
  4548. DP_PRINT_STATS(" %s = %d",
  4549. dp_rate_string[pkt_type][mcs].mcs_type,
  4550. peer->stats.rx.pkt_type[pkt_type].
  4551. mcs_count[mcs]);
  4552. }
  4553. DP_PRINT_STATS("\n");
  4554. }
  4555. index = 0;
  4556. for (i = 0; i < SS_COUNT; i++) {
  4557. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4558. " %d", peer->stats.rx.nss[i]);
  4559. }
  4560. DP_PRINT_STATS("NSS(1-8) = %s",
  4561. nss);
  4562. DP_PRINT_STATS("Aggregation:");
  4563. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4564. peer->stats.rx.ampdu_cnt);
  4565. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4566. peer->stats.rx.non_ampdu_cnt);
  4567. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4568. peer->stats.rx.amsdu_cnt);
  4569. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4570. peer->stats.rx.non_amsdu_cnt);
  4571. }
  4572. /**
  4573. * dp_print_host_stats()- Function to print the stats aggregated at host
  4574. * @vdev_handle: DP_VDEV handle
  4575. * @type: host stats type
  4576. *
  4577. * Available Stat types
  4578. * TXRX_CLEAR_STATS : Clear the stats
  4579. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4580. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4581. * TXRX_TX_HOST_STATS: Print Tx Stats
  4582. * TXRX_RX_HOST_STATS: Print Rx Stats
  4583. * TXRX_AST_STATS: Print AST Stats
  4584. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4585. *
  4586. * Return: 0 on success, print error message in case of failure
  4587. */
  4588. static int
  4589. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4590. {
  4591. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4592. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4593. dp_aggregate_pdev_stats(pdev);
  4594. switch (type) {
  4595. case TXRX_CLEAR_STATS:
  4596. dp_txrx_host_stats_clr(vdev);
  4597. break;
  4598. case TXRX_RX_RATE_STATS:
  4599. dp_print_rx_rates(vdev);
  4600. break;
  4601. case TXRX_TX_RATE_STATS:
  4602. dp_print_tx_rates(vdev);
  4603. break;
  4604. case TXRX_TX_HOST_STATS:
  4605. dp_print_pdev_tx_stats(pdev);
  4606. dp_print_soc_tx_stats(pdev->soc);
  4607. break;
  4608. case TXRX_RX_HOST_STATS:
  4609. dp_print_pdev_rx_stats(pdev);
  4610. dp_print_soc_rx_stats(pdev->soc);
  4611. break;
  4612. case TXRX_AST_STATS:
  4613. dp_print_ast_stats(pdev->soc);
  4614. break;
  4615. case TXRX_SRNG_PTR_STATS:
  4616. dp_print_ring_stats(pdev);
  4617. break;
  4618. default:
  4619. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4620. break;
  4621. }
  4622. return 0;
  4623. }
  4624. /*
  4625. * dp_get_host_peer_stats()- function to print peer stats
  4626. * @pdev_handle: DP_PDEV handle
  4627. * @mac_addr: mac address of the peer
  4628. *
  4629. * Return: void
  4630. */
  4631. static void
  4632. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4633. {
  4634. struct dp_peer *peer;
  4635. uint8_t local_id;
  4636. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4637. &local_id);
  4638. if (!peer) {
  4639. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4640. "%s: Invalid peer\n", __func__);
  4641. return;
  4642. }
  4643. dp_print_peer_stats(peer);
  4644. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4645. return;
  4646. }
  4647. /*
  4648. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4649. * @pdev: DP_PDEV handle
  4650. *
  4651. * Return: void
  4652. */
  4653. static void
  4654. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4655. {
  4656. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4657. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4658. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4659. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4660. RX_BUFFER_SIZE, &htt_tlv_filter);
  4661. }
  4662. /*
  4663. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4664. * @pdev: DP_PDEV handle
  4665. *
  4666. * Return: void
  4667. */
  4668. static void
  4669. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4670. {
  4671. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4672. htt_tlv_filter.mpdu_start = 0;
  4673. htt_tlv_filter.msdu_start = 0;
  4674. htt_tlv_filter.packet = 0;
  4675. htt_tlv_filter.msdu_end = 0;
  4676. htt_tlv_filter.mpdu_end = 0;
  4677. htt_tlv_filter.packet_header = 1;
  4678. htt_tlv_filter.attention = 1;
  4679. htt_tlv_filter.ppdu_start = 1;
  4680. htt_tlv_filter.ppdu_end = 1;
  4681. htt_tlv_filter.ppdu_end_user_stats = 1;
  4682. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4683. htt_tlv_filter.ppdu_end_status_done = 1;
  4684. htt_tlv_filter.enable_fp = 1;
  4685. htt_tlv_filter.enable_md = 0;
  4686. htt_tlv_filter.enable_mo = 0;
  4687. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4688. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4689. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4690. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4691. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4692. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4693. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4694. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4695. RX_BUFFER_SIZE, &htt_tlv_filter);
  4696. }
  4697. /*
  4698. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4699. * @pdev_handle: DP_PDEV handle
  4700. * @val: user provided value
  4701. *
  4702. * Return: void
  4703. */
  4704. static void
  4705. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4706. {
  4707. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4708. switch (val) {
  4709. case 0:
  4710. pdev->tx_sniffer_enable = 0;
  4711. pdev->mcopy_mode = 0;
  4712. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  4713. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4714. dp_ppdu_ring_reset(pdev);
  4715. } else if (pdev->enhanced_stats_en) {
  4716. dp_h2t_cfg_stats_msg_send(pdev,
  4717. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4718. }
  4719. break;
  4720. case 1:
  4721. pdev->tx_sniffer_enable = 1;
  4722. pdev->mcopy_mode = 0;
  4723. if (!pdev->pktlog_ppdu_stats)
  4724. dp_h2t_cfg_stats_msg_send(pdev,
  4725. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4726. break;
  4727. case 2:
  4728. pdev->mcopy_mode = 1;
  4729. pdev->tx_sniffer_enable = 0;
  4730. if (!pdev->enhanced_stats_en)
  4731. dp_ppdu_ring_cfg(pdev);
  4732. if (!pdev->pktlog_ppdu_stats)
  4733. dp_h2t_cfg_stats_msg_send(pdev,
  4734. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4735. break;
  4736. default:
  4737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4738. "Invalid value\n");
  4739. break;
  4740. }
  4741. }
  4742. /*
  4743. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4744. * @pdev_handle: DP_PDEV handle
  4745. *
  4746. * Return: void
  4747. */
  4748. static void
  4749. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4750. {
  4751. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4752. pdev->enhanced_stats_en = 1;
  4753. if (!pdev->mcopy_mode)
  4754. dp_ppdu_ring_cfg(pdev);
  4755. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4756. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4757. }
  4758. /*
  4759. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4760. * @pdev_handle: DP_PDEV handle
  4761. *
  4762. * Return: void
  4763. */
  4764. static void
  4765. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4766. {
  4767. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4768. pdev->enhanced_stats_en = 0;
  4769. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4770. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4771. if (!pdev->mcopy_mode)
  4772. dp_ppdu_ring_reset(pdev);
  4773. }
  4774. /*
  4775. * dp_get_fw_peer_stats()- function to print peer stats
  4776. * @pdev_handle: DP_PDEV handle
  4777. * @mac_addr: mac address of the peer
  4778. * @cap: Type of htt stats requested
  4779. *
  4780. * Currently Supporting only MAC ID based requests Only
  4781. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4782. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4783. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4784. *
  4785. * Return: void
  4786. */
  4787. static void
  4788. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4789. uint32_t cap)
  4790. {
  4791. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4792. int i;
  4793. uint32_t config_param0 = 0;
  4794. uint32_t config_param1 = 0;
  4795. uint32_t config_param2 = 0;
  4796. uint32_t config_param3 = 0;
  4797. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4798. config_param0 |= (1 << (cap + 1));
  4799. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4800. config_param1 |= (1 << i);
  4801. }
  4802. config_param2 |= (mac_addr[0] & 0x000000ff);
  4803. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4804. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4805. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4806. config_param3 |= (mac_addr[4] & 0x000000ff);
  4807. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4808. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4809. config_param0, config_param1, config_param2,
  4810. config_param3, 0);
  4811. }
  4812. /* This struct definition will be removed from here
  4813. * once it get added in FW headers*/
  4814. struct httstats_cmd_req {
  4815. uint32_t config_param0;
  4816. uint32_t config_param1;
  4817. uint32_t config_param2;
  4818. uint32_t config_param3;
  4819. int cookie;
  4820. u_int8_t stats_id;
  4821. };
  4822. /*
  4823. * dp_get_htt_stats: function to process the httstas request
  4824. * @pdev_handle: DP pdev handle
  4825. * @data: pointer to request data
  4826. * @data_len: length for request data
  4827. *
  4828. * return: void
  4829. */
  4830. static void
  4831. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4832. {
  4833. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4834. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4835. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4836. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4837. req->config_param0, req->config_param1,
  4838. req->config_param2, req->config_param3,
  4839. req->cookie);
  4840. }
  4841. /*
  4842. * dp_set_pdev_param: function to set parameters in pdev
  4843. * @pdev_handle: DP pdev handle
  4844. * @param: parameter type to be set
  4845. * @val: value of parameter to be set
  4846. *
  4847. * return: void
  4848. */
  4849. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  4850. enum cdp_pdev_param_type param, uint8_t val)
  4851. {
  4852. switch (param) {
  4853. case CDP_CONFIG_DEBUG_SNIFFER:
  4854. dp_config_debug_sniffer(pdev_handle, val);
  4855. break;
  4856. default:
  4857. break;
  4858. }
  4859. }
  4860. /*
  4861. * dp_set_vdev_param: function to set parameters in vdev
  4862. * @param: parameter type to be set
  4863. * @val: value of parameter to be set
  4864. *
  4865. * return: void
  4866. */
  4867. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  4868. enum cdp_vdev_param_type param, uint32_t val)
  4869. {
  4870. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4871. switch (param) {
  4872. case CDP_ENABLE_WDS:
  4873. vdev->wds_enabled = val;
  4874. break;
  4875. case CDP_ENABLE_NAWDS:
  4876. vdev->nawds_enabled = val;
  4877. break;
  4878. case CDP_ENABLE_MCAST_EN:
  4879. vdev->mcast_enhancement_en = val;
  4880. break;
  4881. case CDP_ENABLE_PROXYSTA:
  4882. vdev->proxysta_vdev = val;
  4883. break;
  4884. case CDP_UPDATE_TDLS_FLAGS:
  4885. vdev->tdls_link_connected = val;
  4886. break;
  4887. case CDP_CFG_WDS_AGING_TIMER:
  4888. if (val == 0)
  4889. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  4890. else if (val != vdev->wds_aging_timer_val)
  4891. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  4892. vdev->wds_aging_timer_val = val;
  4893. break;
  4894. case CDP_ENABLE_AP_BRIDGE:
  4895. if (wlan_op_mode_sta != vdev->opmode)
  4896. vdev->ap_bridge_enabled = val;
  4897. else
  4898. vdev->ap_bridge_enabled = false;
  4899. break;
  4900. case CDP_ENABLE_CIPHER:
  4901. vdev->sec_type = val;
  4902. break;
  4903. case CDP_ENABLE_QWRAP_ISOLATION:
  4904. vdev->isolation_vdev = val;
  4905. break;
  4906. default:
  4907. break;
  4908. }
  4909. dp_tx_vdev_update_search_flags(vdev);
  4910. }
  4911. /**
  4912. * dp_peer_set_nawds: set nawds bit in peer
  4913. * @peer_handle: pointer to peer
  4914. * @value: enable/disable nawds
  4915. *
  4916. * return: void
  4917. */
  4918. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  4919. {
  4920. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  4921. peer->nawds_enabled = value;
  4922. }
  4923. /*
  4924. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  4925. * @vdev_handle: DP_VDEV handle
  4926. * @map_id:ID of map that needs to be updated
  4927. *
  4928. * Return: void
  4929. */
  4930. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  4931. uint8_t map_id)
  4932. {
  4933. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4934. vdev->dscp_tid_map_id = map_id;
  4935. return;
  4936. }
  4937. /*
  4938. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  4939. * @pdev_handle: DP_PDEV handle
  4940. * @buf: to hold pdev_stats
  4941. *
  4942. * Return: int
  4943. */
  4944. static int
  4945. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  4946. {
  4947. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4948. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  4949. dp_aggregate_pdev_stats(pdev);
  4950. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  4951. return TXRX_STATS_LEVEL;
  4952. }
  4953. /**
  4954. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  4955. * @pdev: DP_PDEV handle
  4956. * @map_id: ID of map that needs to be updated
  4957. * @tos: index value in map
  4958. * @tid: tid value passed by the user
  4959. *
  4960. * Return: void
  4961. */
  4962. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  4963. uint8_t map_id, uint8_t tos, uint8_t tid)
  4964. {
  4965. uint8_t dscp;
  4966. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  4967. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  4968. pdev->dscp_tid_map[map_id][dscp] = tid;
  4969. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  4970. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  4971. map_id, dscp);
  4972. return;
  4973. }
  4974. /**
  4975. * dp_fw_stats_process(): Process TxRX FW stats request
  4976. * @vdev_handle: DP VDEV handle
  4977. * @req: stats request
  4978. *
  4979. * return: int
  4980. */
  4981. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  4982. struct cdp_txrx_stats_req *req)
  4983. {
  4984. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4985. struct dp_pdev *pdev = NULL;
  4986. uint32_t stats = req->stats;
  4987. if (!vdev) {
  4988. DP_TRACE(NONE, "VDEV not found");
  4989. return 1;
  4990. }
  4991. pdev = vdev->pdev;
  4992. /*
  4993. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  4994. * from param0 to param3 according to below rule:
  4995. *
  4996. * PARAM:
  4997. * - config_param0 : start_offset (stats type)
  4998. * - config_param1 : stats bmask from start offset
  4999. * - config_param2 : stats bmask from start offset + 32
  5000. * - config_param3 : stats bmask from start offset + 64
  5001. */
  5002. if (req->stats == CDP_TXRX_STATS_0) {
  5003. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5004. req->param1 = 0xFFFFFFFF;
  5005. req->param2 = 0xFFFFFFFF;
  5006. req->param3 = 0xFFFFFFFF;
  5007. }
  5008. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5009. req->param1, req->param2, req->param3, 0);
  5010. }
  5011. /**
  5012. * dp_txrx_stats_request - function to map to firmware and host stats
  5013. * @vdev: virtual handle
  5014. * @req: stats request
  5015. *
  5016. * Return: integer
  5017. */
  5018. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5019. struct cdp_txrx_stats_req *req)
  5020. {
  5021. int host_stats;
  5022. int fw_stats;
  5023. enum cdp_stats stats;
  5024. if (!vdev || !req) {
  5025. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5026. "Invalid vdev/req instance");
  5027. return 0;
  5028. }
  5029. stats = req->stats;
  5030. if (stats >= CDP_TXRX_MAX_STATS)
  5031. return 0;
  5032. /*
  5033. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5034. * has to be updated if new FW HTT stats added
  5035. */
  5036. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5037. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5038. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5039. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5040. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5041. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5042. stats, fw_stats, host_stats);
  5043. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5044. /* update request with FW stats type */
  5045. req->stats = fw_stats;
  5046. return dp_fw_stats_process(vdev, req);
  5047. }
  5048. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5049. (host_stats <= TXRX_HOST_STATS_MAX))
  5050. return dp_print_host_stats(vdev, host_stats);
  5051. else
  5052. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5053. "Wrong Input for TxRx Stats");
  5054. return 0;
  5055. }
  5056. /**
  5057. * dp_txrx_stats() - function to map to firmware and host stats
  5058. * @vdev: virtual handle
  5059. * @stats: type of statistics requested
  5060. *
  5061. * Return: integer
  5062. */
  5063. static int dp_txrx_stats(struct cdp_vdev *vdev, enum cdp_stats stats)
  5064. {
  5065. struct cdp_txrx_stats_req req = {0,};
  5066. req.stats = stats;
  5067. return dp_txrx_stats_request(vdev, &req);
  5068. }
  5069. /*
  5070. * dp_print_napi_stats(): NAPI stats
  5071. * @soc - soc handle
  5072. */
  5073. static void dp_print_napi_stats(struct dp_soc *soc)
  5074. {
  5075. hif_print_napi_stats(soc->hif_handle);
  5076. }
  5077. /*
  5078. * dp_print_per_ring_stats(): Packet count per ring
  5079. * @soc - soc handle
  5080. */
  5081. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5082. {
  5083. uint8_t ring;
  5084. uint16_t core;
  5085. uint64_t total_packets;
  5086. DP_TRACE(FATAL, "Reo packets per ring:");
  5087. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5088. total_packets = 0;
  5089. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5090. for (core = 0; core < NR_CPUS; core++) {
  5091. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5092. core, soc->stats.rx.ring_packets[core][ring]);
  5093. total_packets += soc->stats.rx.ring_packets[core][ring];
  5094. }
  5095. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5096. ring, total_packets);
  5097. }
  5098. }
  5099. /*
  5100. * dp_txrx_path_stats() - Function to display dump stats
  5101. * @soc - soc handle
  5102. *
  5103. * return: none
  5104. */
  5105. static void dp_txrx_path_stats(struct dp_soc *soc)
  5106. {
  5107. uint8_t error_code;
  5108. uint8_t loop_pdev;
  5109. struct dp_pdev *pdev;
  5110. uint8_t i;
  5111. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5112. pdev = soc->pdev_list[loop_pdev];
  5113. dp_aggregate_pdev_stats(pdev);
  5114. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5115. "Tx path Statistics:");
  5116. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5117. pdev->stats.tx_i.rcvd.num,
  5118. pdev->stats.tx_i.rcvd.bytes);
  5119. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5120. pdev->stats.tx_i.processed.num,
  5121. pdev->stats.tx_i.processed.bytes);
  5122. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5123. pdev->stats.tx.tx_success.num,
  5124. pdev->stats.tx.tx_success.bytes);
  5125. DP_TRACE(FATAL, "Dropped in host:");
  5126. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5127. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5128. DP_TRACE(FATAL, "Descriptor not available: %u",
  5129. pdev->stats.tx_i.dropped.desc_na);
  5130. DP_TRACE(FATAL, "Ring full: %u",
  5131. pdev->stats.tx_i.dropped.ring_full);
  5132. DP_TRACE(FATAL, "Enqueue fail: %u",
  5133. pdev->stats.tx_i.dropped.enqueue_fail);
  5134. DP_TRACE(FATAL, "DMA Error: %u",
  5135. pdev->stats.tx_i.dropped.dma_error);
  5136. DP_TRACE(FATAL, "Dropped in hardware:");
  5137. DP_TRACE(FATAL, "total packets dropped: %u",
  5138. pdev->stats.tx.tx_failed);
  5139. DP_TRACE(FATAL, "mpdu age out: %u",
  5140. pdev->stats.tx.dropped.age_out);
  5141. DP_TRACE(FATAL, "firmware removed: %u",
  5142. pdev->stats.tx.dropped.fw_rem);
  5143. DP_TRACE(FATAL, "firmware removed tx: %u",
  5144. pdev->stats.tx.dropped.fw_rem_tx);
  5145. DP_TRACE(FATAL, "firmware removed notx %u",
  5146. pdev->stats.tx.dropped.fw_rem_notx);
  5147. DP_TRACE(FATAL, "peer_invalid: %u",
  5148. pdev->soc->stats.tx.tx_invalid_peer.num);
  5149. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5150. DP_TRACE(FATAL, "Single Packet: %u",
  5151. pdev->stats.tx_comp_histogram.pkts_1);
  5152. DP_TRACE(FATAL, "2-20 Packets: %u",
  5153. pdev->stats.tx_comp_histogram.pkts_2_20);
  5154. DP_TRACE(FATAL, "21-40 Packets: %u",
  5155. pdev->stats.tx_comp_histogram.pkts_21_40);
  5156. DP_TRACE(FATAL, "41-60 Packets: %u",
  5157. pdev->stats.tx_comp_histogram.pkts_41_60);
  5158. DP_TRACE(FATAL, "61-80 Packets: %u",
  5159. pdev->stats.tx_comp_histogram.pkts_61_80);
  5160. DP_TRACE(FATAL, "81-100 Packets: %u",
  5161. pdev->stats.tx_comp_histogram.pkts_81_100);
  5162. DP_TRACE(FATAL, "101-200 Packets: %u",
  5163. pdev->stats.tx_comp_histogram.pkts_101_200);
  5164. DP_TRACE(FATAL, " 201+ Packets: %u",
  5165. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5166. DP_TRACE(FATAL, "Rx path statistics");
  5167. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5168. pdev->stats.rx.to_stack.num,
  5169. pdev->stats.rx.to_stack.bytes);
  5170. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5171. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5172. i, pdev->stats.rx.rcvd_reo[i].num,
  5173. pdev->stats.rx.rcvd_reo[i].bytes);
  5174. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5175. pdev->stats.rx.intra_bss.pkts.num,
  5176. pdev->stats.rx.intra_bss.pkts.bytes);
  5177. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5178. pdev->stats.rx.intra_bss.fail.num,
  5179. pdev->stats.rx.intra_bss.fail.bytes);
  5180. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5181. pdev->stats.rx.raw.num,
  5182. pdev->stats.rx.raw.bytes);
  5183. DP_TRACE(FATAL, "dropped: error %u msdus",
  5184. pdev->stats.rx.err.mic_err);
  5185. DP_TRACE(FATAL, "peer invalid %u",
  5186. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5187. DP_TRACE(FATAL, "Reo Statistics");
  5188. DP_TRACE(FATAL, "rbm error: %u msdus",
  5189. pdev->soc->stats.rx.err.invalid_rbm);
  5190. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5191. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5192. DP_TRACE(FATAL, "Reo errors");
  5193. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5194. error_code++) {
  5195. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5196. error_code,
  5197. pdev->soc->stats.rx.err.reo_error[error_code]);
  5198. }
  5199. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5200. error_code++) {
  5201. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5202. error_code,
  5203. pdev->soc->stats.rx.err
  5204. .rxdma_error[error_code]);
  5205. }
  5206. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5207. DP_TRACE(FATAL, "Single Packet: %u",
  5208. pdev->stats.rx_ind_histogram.pkts_1);
  5209. DP_TRACE(FATAL, "2-20 Packets: %u",
  5210. pdev->stats.rx_ind_histogram.pkts_2_20);
  5211. DP_TRACE(FATAL, "21-40 Packets: %u",
  5212. pdev->stats.rx_ind_histogram.pkts_21_40);
  5213. DP_TRACE(FATAL, "41-60 Packets: %u",
  5214. pdev->stats.rx_ind_histogram.pkts_41_60);
  5215. DP_TRACE(FATAL, "61-80 Packets: %u",
  5216. pdev->stats.rx_ind_histogram.pkts_61_80);
  5217. DP_TRACE(FATAL, "81-100 Packets: %u",
  5218. pdev->stats.rx_ind_histogram.pkts_81_100);
  5219. DP_TRACE(FATAL, "101-200 Packets: %u",
  5220. pdev->stats.rx_ind_histogram.pkts_101_200);
  5221. DP_TRACE(FATAL, " 201+ Packets: %u",
  5222. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5223. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5224. __func__,
  5225. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5226. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5227. pdev->soc->wlan_cfg_ctx->rx_hash,
  5228. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5229. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5230. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5231. __func__,
  5232. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5233. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5234. #endif
  5235. }
  5236. }
  5237. /*
  5238. * dp_txrx_dump_stats() - Dump statistics
  5239. * @value - Statistics option
  5240. */
  5241. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5242. enum qdf_stats_verbosity_level level)
  5243. {
  5244. struct dp_soc *soc =
  5245. (struct dp_soc *)psoc;
  5246. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5247. if (!soc) {
  5248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5249. "%s: soc is NULL", __func__);
  5250. return QDF_STATUS_E_INVAL;
  5251. }
  5252. switch (value) {
  5253. case CDP_TXRX_PATH_STATS:
  5254. dp_txrx_path_stats(soc);
  5255. break;
  5256. case CDP_RX_RING_STATS:
  5257. dp_print_per_ring_stats(soc);
  5258. break;
  5259. case CDP_TXRX_TSO_STATS:
  5260. /* TODO: NOT IMPLEMENTED */
  5261. break;
  5262. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5263. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5264. break;
  5265. case CDP_DP_NAPI_STATS:
  5266. dp_print_napi_stats(soc);
  5267. break;
  5268. case CDP_TXRX_DESC_STATS:
  5269. /* TODO: NOT IMPLEMENTED */
  5270. break;
  5271. default:
  5272. status = QDF_STATUS_E_INVAL;
  5273. break;
  5274. }
  5275. return status;
  5276. }
  5277. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5278. /**
  5279. * dp_update_flow_control_parameters() - API to store datapath
  5280. * config parameters
  5281. * @soc: soc handle
  5282. * @cfg: ini parameter handle
  5283. *
  5284. * Return: void
  5285. */
  5286. static inline
  5287. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5288. struct cdp_config_params *params)
  5289. {
  5290. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5291. params->tx_flow_stop_queue_threshold;
  5292. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5293. params->tx_flow_start_queue_offset;
  5294. }
  5295. #else
  5296. static inline
  5297. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5298. struct cdp_config_params *params)
  5299. {
  5300. }
  5301. #endif
  5302. /**
  5303. * dp_update_config_parameters() - API to store datapath
  5304. * config parameters
  5305. * @soc: soc handle
  5306. * @cfg: ini parameter handle
  5307. *
  5308. * Return: status
  5309. */
  5310. static
  5311. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5312. struct cdp_config_params *params)
  5313. {
  5314. struct dp_soc *soc = (struct dp_soc *)psoc;
  5315. if (!(soc)) {
  5316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5317. "%s: Invalid handle", __func__);
  5318. return QDF_STATUS_E_INVAL;
  5319. }
  5320. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5321. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5322. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5323. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5324. params->tcp_udp_checksumoffload;
  5325. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5326. dp_update_flow_control_parameters(soc, params);
  5327. return QDF_STATUS_SUCCESS;
  5328. }
  5329. /**
  5330. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5331. * config parameters
  5332. * @vdev_handle - datapath vdev handle
  5333. * @cfg: ini parameter handle
  5334. *
  5335. * Return: status
  5336. */
  5337. #ifdef WDS_VENDOR_EXTENSION
  5338. void
  5339. dp_txrx_set_wds_rx_policy(
  5340. struct cdp_vdev *vdev_handle,
  5341. u_int32_t val)
  5342. {
  5343. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5344. struct dp_peer *peer;
  5345. if (vdev->opmode == wlan_op_mode_ap) {
  5346. /* for ap, set it on bss_peer */
  5347. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5348. if (peer->bss_peer) {
  5349. peer->wds_ecm.wds_rx_filter = 1;
  5350. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5351. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5352. break;
  5353. }
  5354. }
  5355. } else if (vdev->opmode == wlan_op_mode_sta) {
  5356. peer = TAILQ_FIRST(&vdev->peer_list);
  5357. peer->wds_ecm.wds_rx_filter = 1;
  5358. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5359. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5360. }
  5361. }
  5362. /**
  5363. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5364. *
  5365. * @peer_handle - datapath peer handle
  5366. * @wds_tx_ucast: policy for unicast transmission
  5367. * @wds_tx_mcast: policy for multicast transmission
  5368. *
  5369. * Return: void
  5370. */
  5371. void
  5372. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5373. int wds_tx_ucast, int wds_tx_mcast)
  5374. {
  5375. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5376. if (wds_tx_ucast || wds_tx_mcast) {
  5377. peer->wds_enabled = 1;
  5378. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5379. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5380. } else {
  5381. peer->wds_enabled = 0;
  5382. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5383. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5384. }
  5385. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5386. FL("Policy Update set to :\
  5387. peer->wds_enabled %d\
  5388. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5389. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5390. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5391. peer->wds_ecm.wds_tx_mcast_4addr);
  5392. return;
  5393. }
  5394. #endif
  5395. static struct cdp_wds_ops dp_ops_wds = {
  5396. .vdev_set_wds = dp_vdev_set_wds,
  5397. #ifdef WDS_VENDOR_EXTENSION
  5398. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5399. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5400. #endif
  5401. };
  5402. /*
  5403. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5404. * @soc - datapath soc handle
  5405. * @peer - datapath peer handle
  5406. *
  5407. * Delete the AST entries belonging to a peer
  5408. */
  5409. #ifdef FEATURE_WDS
  5410. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5411. struct dp_peer *peer)
  5412. {
  5413. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5414. qdf_spin_lock_bh(&soc->ast_lock);
  5415. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5416. dp_peer_del_ast(soc, ast_entry);
  5417. qdf_spin_unlock_bh(&soc->ast_lock);
  5418. }
  5419. #else
  5420. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5421. struct dp_peer *peer)
  5422. {
  5423. }
  5424. #endif
  5425. /*
  5426. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5427. * @vdev_handle - datapath vdev handle
  5428. * @callback - callback function
  5429. * @ctxt: callback context
  5430. *
  5431. */
  5432. static void
  5433. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5434. ol_txrx_data_tx_cb callback, void *ctxt)
  5435. {
  5436. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5437. vdev->tx_non_std_data_callback.func = callback;
  5438. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5439. }
  5440. /**
  5441. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5442. * @pdev_hdl: datapath pdev handle
  5443. *
  5444. * Return: opaque pointer to dp txrx handle
  5445. */
  5446. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5447. {
  5448. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5449. return pdev->dp_txrx_handle;
  5450. }
  5451. /**
  5452. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5453. * @pdev_hdl: datapath pdev handle
  5454. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5455. *
  5456. * Return: void
  5457. */
  5458. static void
  5459. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5460. {
  5461. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5462. pdev->dp_txrx_handle = dp_txrx_hdl;
  5463. }
  5464. /**
  5465. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5466. * @soc_handle: datapath soc handle
  5467. *
  5468. * Return: opaque pointer to external dp (non-core DP)
  5469. */
  5470. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5471. {
  5472. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5473. return soc->external_txrx_handle;
  5474. }
  5475. /**
  5476. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5477. * @soc_handle: datapath soc handle
  5478. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5479. *
  5480. * Return: void
  5481. */
  5482. static void
  5483. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5484. {
  5485. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5486. soc->external_txrx_handle = txrx_handle;
  5487. }
  5488. #ifdef CONFIG_WIN
  5489. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5490. {
  5491. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5492. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5493. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5494. peer->delete_in_progress = true;
  5495. dp_peer_delete_ast_entries(soc, peer);
  5496. }
  5497. #endif
  5498. static struct cdp_cmn_ops dp_ops_cmn = {
  5499. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5500. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5501. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5502. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5503. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5504. .txrx_peer_create = dp_peer_create_wifi3,
  5505. .txrx_peer_setup = dp_peer_setup_wifi3,
  5506. #ifdef CONFIG_WIN
  5507. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5508. #else
  5509. .txrx_peer_teardown = NULL,
  5510. #endif
  5511. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  5512. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  5513. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  5514. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  5515. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  5516. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  5517. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  5518. .txrx_peer_delete = dp_peer_delete_wifi3,
  5519. .txrx_vdev_register = dp_vdev_register_wifi3,
  5520. .txrx_soc_detach = dp_soc_detach_wifi3,
  5521. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5522. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5523. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5524. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5525. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5526. .delba_process = dp_delba_process_wifi3,
  5527. .set_addba_response = dp_set_addba_response,
  5528. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5529. .flush_cache_rx_queue = NULL,
  5530. /* TODO: get API's for dscp-tid need to be added*/
  5531. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5532. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5533. .txrx_stats = dp_txrx_stats,
  5534. .txrx_stats_request = dp_txrx_stats_request,
  5535. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5536. .display_stats = dp_txrx_dump_stats,
  5537. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5538. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5539. #ifdef DP_INTR_POLL_BASED
  5540. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5541. #else
  5542. .txrx_intr_attach = dp_soc_interrupt_attach,
  5543. #endif
  5544. .txrx_intr_detach = dp_soc_interrupt_detach,
  5545. .set_pn_check = dp_set_pn_check_wifi3,
  5546. .update_config_parameters = dp_update_config_parameters,
  5547. /* TODO: Add other functions */
  5548. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5549. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5550. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5551. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  5552. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  5553. .tx_send = dp_tx_send,
  5554. };
  5555. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5556. .txrx_peer_authorize = dp_peer_authorize,
  5557. #ifdef QCA_SUPPORT_SON
  5558. .txrx_set_inact_params = dp_set_inact_params,
  5559. .txrx_start_inact_timer = dp_start_inact_timer,
  5560. .txrx_set_overload = dp_set_overload,
  5561. .txrx_peer_is_inact = dp_peer_is_inact,
  5562. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5563. #endif
  5564. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5565. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5566. #ifdef MESH_MODE_SUPPORT
  5567. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5568. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5569. #endif
  5570. .txrx_set_vdev_param = dp_set_vdev_param,
  5571. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5572. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5573. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5574. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5575. .txrx_update_filter_neighbour_peers =
  5576. dp_update_filter_neighbour_peers,
  5577. .txrx_get_sec_type = dp_get_sec_type,
  5578. /* TODO: Add other functions */
  5579. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5580. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5581. #ifdef WDI_EVENT_ENABLE
  5582. .txrx_get_pldev = dp_get_pldev,
  5583. #endif
  5584. .txrx_set_pdev_param = dp_set_pdev_param,
  5585. };
  5586. static struct cdp_me_ops dp_ops_me = {
  5587. #ifdef ATH_SUPPORT_IQUE
  5588. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5589. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5590. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5591. #endif
  5592. };
  5593. static struct cdp_mon_ops dp_ops_mon = {
  5594. .txrx_monitor_set_filter_ucast_data = NULL,
  5595. .txrx_monitor_set_filter_mcast_data = NULL,
  5596. .txrx_monitor_set_filter_non_data = NULL,
  5597. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5598. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5599. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5600. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5601. /* Added support for HK advance filter */
  5602. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5603. };
  5604. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5605. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5606. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5607. .get_htt_stats = dp_get_htt_stats,
  5608. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5609. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5610. .txrx_stats_publish = dp_txrx_stats_publish,
  5611. /* TODO */
  5612. };
  5613. static struct cdp_raw_ops dp_ops_raw = {
  5614. /* TODO */
  5615. };
  5616. #ifdef CONFIG_WIN
  5617. static struct cdp_pflow_ops dp_ops_pflow = {
  5618. /* TODO */
  5619. };
  5620. #endif /* CONFIG_WIN */
  5621. #ifdef FEATURE_RUNTIME_PM
  5622. /**
  5623. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5624. * @opaque_pdev: DP pdev context
  5625. *
  5626. * DP is ready to runtime suspend if there are no pending TX packets.
  5627. *
  5628. * Return: QDF_STATUS
  5629. */
  5630. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5631. {
  5632. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5633. struct dp_soc *soc = pdev->soc;
  5634. /* Call DP TX flow control API to check if there is any
  5635. pending packets */
  5636. if (soc->intr_mode == DP_INTR_POLL)
  5637. qdf_timer_stop(&soc->int_timer);
  5638. return QDF_STATUS_SUCCESS;
  5639. }
  5640. /**
  5641. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5642. * @opaque_pdev: DP pdev context
  5643. *
  5644. * Resume DP for runtime PM.
  5645. *
  5646. * Return: QDF_STATUS
  5647. */
  5648. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5649. {
  5650. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5651. struct dp_soc *soc = pdev->soc;
  5652. void *hal_srng;
  5653. int i;
  5654. if (soc->intr_mode == DP_INTR_POLL)
  5655. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5656. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5657. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5658. if (hal_srng) {
  5659. /* We actually only need to acquire the lock */
  5660. hal_srng_access_start(soc->hal_soc, hal_srng);
  5661. /* Update SRC ring head pointer for HW to send
  5662. all pending packets */
  5663. hal_srng_access_end(soc->hal_soc, hal_srng);
  5664. }
  5665. }
  5666. return QDF_STATUS_SUCCESS;
  5667. }
  5668. #endif /* FEATURE_RUNTIME_PM */
  5669. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5670. {
  5671. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5672. struct dp_soc *soc = pdev->soc;
  5673. if (soc->intr_mode == DP_INTR_POLL)
  5674. qdf_timer_stop(&soc->int_timer);
  5675. return QDF_STATUS_SUCCESS;
  5676. }
  5677. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5678. {
  5679. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5680. struct dp_soc *soc = pdev->soc;
  5681. if (soc->intr_mode == DP_INTR_POLL)
  5682. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5683. return QDF_STATUS_SUCCESS;
  5684. }
  5685. #ifndef CONFIG_WIN
  5686. static struct cdp_misc_ops dp_ops_misc = {
  5687. .tx_non_std = dp_tx_non_std,
  5688. .get_opmode = dp_get_opmode,
  5689. #ifdef FEATURE_RUNTIME_PM
  5690. .runtime_suspend = dp_runtime_suspend,
  5691. .runtime_resume = dp_runtime_resume,
  5692. #endif /* FEATURE_RUNTIME_PM */
  5693. .pkt_log_init = dp_pkt_log_init,
  5694. .pkt_log_con_service = dp_pkt_log_con_service,
  5695. };
  5696. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5697. /* WIFI 3.0 DP implement as required. */
  5698. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5699. .register_pause_cb = dp_txrx_register_pause_cb,
  5700. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5701. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5702. };
  5703. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5704. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5705. };
  5706. #ifdef IPA_OFFLOAD
  5707. static struct cdp_ipa_ops dp_ops_ipa = {
  5708. .ipa_get_resource = dp_ipa_get_resource,
  5709. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5710. .ipa_op_response = dp_ipa_op_response,
  5711. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5712. .ipa_get_stat = dp_ipa_get_stat,
  5713. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5714. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5715. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5716. .ipa_setup = dp_ipa_setup,
  5717. .ipa_cleanup = dp_ipa_cleanup,
  5718. .ipa_setup_iface = dp_ipa_setup_iface,
  5719. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5720. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5721. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5722. .ipa_set_perf_level = dp_ipa_set_perf_level
  5723. };
  5724. #endif
  5725. static struct cdp_bus_ops dp_ops_bus = {
  5726. .bus_suspend = dp_bus_suspend,
  5727. .bus_resume = dp_bus_resume
  5728. };
  5729. static struct cdp_ocb_ops dp_ops_ocb = {
  5730. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5731. };
  5732. static struct cdp_throttle_ops dp_ops_throttle = {
  5733. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5734. };
  5735. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5736. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5737. };
  5738. static struct cdp_cfg_ops dp_ops_cfg = {
  5739. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5740. };
  5741. /*
  5742. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5743. * @dev: physical device instance
  5744. * @peer_mac_addr: peer mac address
  5745. * @local_id: local id for the peer
  5746. * @debug_id: to track enum peer access
  5747. * Return: peer instance pointer
  5748. */
  5749. static inline void *
  5750. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5751. u8 *local_id,
  5752. enum peer_debug_id_type debug_id)
  5753. {
  5754. /*
  5755. * Currently this function does not implement the "get ref"
  5756. * functionality and is mapped to dp_find_peer_by_addr which does not
  5757. * increment the peer ref count. So the peer state is uncertain after
  5758. * calling this API. The functionality needs to be implemented.
  5759. * Accordingly the corresponding release_ref function is NULL.
  5760. */
  5761. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5762. }
  5763. static struct cdp_peer_ops dp_ops_peer = {
  5764. .register_peer = dp_register_peer,
  5765. .clear_peer = dp_clear_peer,
  5766. .find_peer_by_addr = dp_find_peer_by_addr,
  5767. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5768. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5769. .peer_release_ref = NULL,
  5770. .local_peer_id = dp_local_peer_id,
  5771. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5772. .peer_state_update = dp_peer_state_update,
  5773. .get_vdevid = dp_get_vdevid,
  5774. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5775. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5776. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5777. .get_peer_state = dp_get_peer_state,
  5778. .last_assoc_received = dp_get_last_assoc_received,
  5779. .last_disassoc_received = dp_get_last_disassoc_received,
  5780. .last_deauth_received = dp_get_last_deauth_received,
  5781. };
  5782. #endif
  5783. static struct cdp_ops dp_txrx_ops = {
  5784. .cmn_drv_ops = &dp_ops_cmn,
  5785. .ctrl_ops = &dp_ops_ctrl,
  5786. .me_ops = &dp_ops_me,
  5787. .mon_ops = &dp_ops_mon,
  5788. .host_stats_ops = &dp_ops_host_stats,
  5789. .wds_ops = &dp_ops_wds,
  5790. .raw_ops = &dp_ops_raw,
  5791. #ifdef CONFIG_WIN
  5792. .pflow_ops = &dp_ops_pflow,
  5793. #endif /* CONFIG_WIN */
  5794. #ifndef CONFIG_WIN
  5795. .misc_ops = &dp_ops_misc,
  5796. .cfg_ops = &dp_ops_cfg,
  5797. .flowctl_ops = &dp_ops_flowctl,
  5798. .l_flowctl_ops = &dp_ops_l_flowctl,
  5799. #ifdef IPA_OFFLOAD
  5800. .ipa_ops = &dp_ops_ipa,
  5801. #endif
  5802. .bus_ops = &dp_ops_bus,
  5803. .ocb_ops = &dp_ops_ocb,
  5804. .peer_ops = &dp_ops_peer,
  5805. .throttle_ops = &dp_ops_throttle,
  5806. .mob_stats_ops = &dp_ops_mob_stats,
  5807. #endif
  5808. };
  5809. /*
  5810. * dp_soc_set_txrx_ring_map()
  5811. * @dp_soc: DP handler for soc
  5812. *
  5813. * Return: Void
  5814. */
  5815. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  5816. {
  5817. uint32_t i;
  5818. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  5819. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  5820. }
  5821. }
  5822. /*
  5823. * dp_soc_attach_wifi3() - Attach txrx SOC
  5824. * @ctrl_psoc: Opaque SOC handle from control plane
  5825. * @htc_handle: Opaque HTC handle
  5826. * @hif_handle: Opaque HIF handle
  5827. * @qdf_osdev: QDF device
  5828. *
  5829. * Return: DP SOC handle on success, NULL on failure
  5830. */
  5831. /*
  5832. * Local prototype added to temporarily address warning caused by
  5833. * -Wmissing-prototypes. A more correct solution, namely to expose
  5834. * a prototype in an appropriate header file, will come later.
  5835. */
  5836. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5837. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5838. struct ol_if_ops *ol_ops);
  5839. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  5840. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  5841. struct ol_if_ops *ol_ops)
  5842. {
  5843. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  5844. if (!soc) {
  5845. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5846. FL("DP SOC memory allocation failed"));
  5847. goto fail0;
  5848. }
  5849. soc->cdp_soc.ops = &dp_txrx_ops;
  5850. soc->cdp_soc.ol_ops = ol_ops;
  5851. soc->ctrl_psoc = ctrl_psoc;
  5852. soc->osdev = qdf_osdev;
  5853. soc->hif_handle = hif_handle;
  5854. soc->hal_soc = hif_get_hal_handle(hif_handle);
  5855. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  5856. soc->hal_soc, qdf_osdev);
  5857. if (!soc->htt_handle) {
  5858. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5859. FL("HTT attach failed"));
  5860. goto fail1;
  5861. }
  5862. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  5863. if (!soc->wlan_cfg_ctx) {
  5864. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5865. FL("wlan_cfg_soc_attach failed"));
  5866. goto fail2;
  5867. }
  5868. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  5869. soc->cce_disable = false;
  5870. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  5871. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5872. CDP_CFG_MAX_PEER_ID);
  5873. if (ret != -EINVAL) {
  5874. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  5875. }
  5876. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  5877. CDP_CFG_CCE_DISABLE);
  5878. if (ret)
  5879. soc->cce_disable = true;
  5880. }
  5881. qdf_spinlock_create(&soc->peer_ref_mutex);
  5882. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  5883. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  5884. /* fill the tx/rx cpu ring map*/
  5885. dp_soc_set_txrx_ring_map(soc);
  5886. qdf_spinlock_create(&soc->htt_stats.lock);
  5887. /* initialize work queue for stats processing */
  5888. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  5889. /*Initialize inactivity timer for wifison */
  5890. dp_init_inact_timer(soc);
  5891. return (void *)soc;
  5892. fail2:
  5893. htt_soc_detach(soc->htt_handle);
  5894. fail1:
  5895. qdf_mem_free(soc);
  5896. fail0:
  5897. return NULL;
  5898. }
  5899. /*
  5900. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  5901. *
  5902. * @soc: handle to DP soc
  5903. * @mac_id: MAC id
  5904. *
  5905. * Return: Return pdev corresponding to MAC
  5906. */
  5907. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5908. {
  5909. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5910. return soc->pdev_list[mac_id];
  5911. /* Typically for MCL as there only 1 PDEV*/
  5912. return soc->pdev_list[0];
  5913. }
  5914. /*
  5915. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  5916. *
  5917. * @soc: handle to DP soc
  5918. * @mac_id: MAC id
  5919. *
  5920. * Return: ring id
  5921. */
  5922. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  5923. {
  5924. /*
  5925. * Single pdev using both MACs will operate on both MAC rings,
  5926. * which is the case for MCL.
  5927. */
  5928. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  5929. return mac_id;
  5930. /* For WIN each PDEV will operate one ring, so index is zero. */
  5931. return 0;
  5932. }
  5933. /*
  5934. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  5935. * @soc: DP SoC context
  5936. * @max_mac_rings: No of MAC rings
  5937. *
  5938. * Return: None
  5939. */
  5940. static
  5941. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  5942. int *max_mac_rings)
  5943. {
  5944. bool dbs_enable = false;
  5945. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  5946. dbs_enable = soc->cdp_soc.ol_ops->
  5947. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  5948. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  5949. }
  5950. /*
  5951. * dp_set_pktlog_wifi3() - attach txrx vdev
  5952. * @pdev: Datapath PDEV handle
  5953. * @event: which event's notifications are being subscribed to
  5954. * @enable: WDI event subscribe or not. (True or False)
  5955. *
  5956. * Return: Success, NULL on failure
  5957. */
  5958. #ifdef WDI_EVENT_ENABLE
  5959. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  5960. bool enable)
  5961. {
  5962. struct dp_soc *soc = pdev->soc;
  5963. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5964. int max_mac_rings = wlan_cfg_get_num_mac_rings
  5965. (pdev->wlan_cfg_ctx);
  5966. uint8_t mac_id = 0;
  5967. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  5968. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  5969. FL("Max_mac_rings %d \n"),
  5970. max_mac_rings);
  5971. if (enable) {
  5972. switch (event) {
  5973. case WDI_EVENT_RX_DESC:
  5974. if (pdev->monitor_vdev) {
  5975. /* Nothing needs to be done if monitor mode is
  5976. * enabled
  5977. */
  5978. return 0;
  5979. }
  5980. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  5981. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  5982. htt_tlv_filter.mpdu_start = 1;
  5983. htt_tlv_filter.msdu_start = 1;
  5984. htt_tlv_filter.msdu_end = 1;
  5985. htt_tlv_filter.mpdu_end = 1;
  5986. htt_tlv_filter.packet_header = 1;
  5987. htt_tlv_filter.attention = 1;
  5988. htt_tlv_filter.ppdu_start = 1;
  5989. htt_tlv_filter.ppdu_end = 1;
  5990. htt_tlv_filter.ppdu_end_user_stats = 1;
  5991. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5992. htt_tlv_filter.ppdu_end_status_done = 1;
  5993. htt_tlv_filter.enable_fp = 1;
  5994. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5995. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5996. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5997. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5998. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5999. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6000. for (mac_id = 0; mac_id < max_mac_rings;
  6001. mac_id++) {
  6002. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6003. pdev->pdev_id + mac_id,
  6004. pdev->rxdma_mon_status_ring
  6005. .hal_srng,
  6006. RXDMA_MONITOR_STATUS,
  6007. RX_BUFFER_SIZE,
  6008. &htt_tlv_filter);
  6009. }
  6010. if (soc->reap_timer_init)
  6011. qdf_timer_mod(&soc->mon_reap_timer,
  6012. DP_INTR_POLL_TIMER_MS);
  6013. }
  6014. break;
  6015. case WDI_EVENT_LITE_RX:
  6016. if (pdev->monitor_vdev) {
  6017. /* Nothing needs to be done if monitor mode is
  6018. * enabled
  6019. */
  6020. return 0;
  6021. }
  6022. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6023. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6024. htt_tlv_filter.ppdu_start = 1;
  6025. htt_tlv_filter.ppdu_end = 1;
  6026. htt_tlv_filter.ppdu_end_user_stats = 1;
  6027. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6028. htt_tlv_filter.ppdu_end_status_done = 1;
  6029. htt_tlv_filter.mpdu_start = 1;
  6030. htt_tlv_filter.enable_fp = 1;
  6031. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6032. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6033. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6034. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6035. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6036. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6037. for (mac_id = 0; mac_id < max_mac_rings;
  6038. mac_id++) {
  6039. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6040. pdev->pdev_id + mac_id,
  6041. pdev->rxdma_mon_status_ring
  6042. .hal_srng,
  6043. RXDMA_MONITOR_STATUS,
  6044. RX_BUFFER_SIZE_PKTLOG_LITE,
  6045. &htt_tlv_filter);
  6046. }
  6047. if (soc->reap_timer_init)
  6048. qdf_timer_mod(&soc->mon_reap_timer,
  6049. DP_INTR_POLL_TIMER_MS);
  6050. }
  6051. break;
  6052. case WDI_EVENT_LITE_T2H:
  6053. if (pdev->monitor_vdev) {
  6054. /* Nothing needs to be done if monitor mode is
  6055. * enabled
  6056. */
  6057. return 0;
  6058. }
  6059. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6060. * passing value 0xffff. Once these macros will define
  6061. * in htt header file will use proper macros
  6062. */
  6063. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6064. pdev->pktlog_ppdu_stats = true;
  6065. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  6066. pdev->pdev_id + mac_id);
  6067. }
  6068. break;
  6069. default:
  6070. /* Nothing needs to be done for other pktlog types */
  6071. break;
  6072. }
  6073. } else {
  6074. switch (event) {
  6075. case WDI_EVENT_RX_DESC:
  6076. case WDI_EVENT_LITE_RX:
  6077. if (pdev->monitor_vdev) {
  6078. /* Nothing needs to be done if monitor mode is
  6079. * enabled
  6080. */
  6081. return 0;
  6082. }
  6083. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6084. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6085. for (mac_id = 0; mac_id < max_mac_rings;
  6086. mac_id++) {
  6087. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6088. pdev->pdev_id + mac_id,
  6089. pdev->rxdma_mon_status_ring
  6090. .hal_srng,
  6091. RXDMA_MONITOR_STATUS,
  6092. RX_BUFFER_SIZE,
  6093. &htt_tlv_filter);
  6094. }
  6095. if (soc->reap_timer_init)
  6096. qdf_timer_stop(&soc->mon_reap_timer);
  6097. }
  6098. break;
  6099. case WDI_EVENT_LITE_T2H:
  6100. if (pdev->monitor_vdev) {
  6101. /* Nothing needs to be done if monitor mode is
  6102. * enabled
  6103. */
  6104. return 0;
  6105. }
  6106. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6107. * passing value 0. Once these macros will define in htt
  6108. * header file will use proper macros
  6109. */
  6110. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6111. pdev->pktlog_ppdu_stats = false;
  6112. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6113. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6114. pdev->pdev_id + mac_id);
  6115. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6116. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6117. pdev->pdev_id + mac_id);
  6118. } else if (pdev->enhanced_stats_en) {
  6119. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6120. pdev->pdev_id + mac_id);
  6121. }
  6122. }
  6123. break;
  6124. default:
  6125. /* Nothing needs to be done for other pktlog types */
  6126. break;
  6127. }
  6128. }
  6129. return 0;
  6130. }
  6131. #endif
  6132. #ifdef CONFIG_MCL
  6133. /*
  6134. * dp_service_mon_rings()- timer to reap monitor rings
  6135. * reqd as we are not getting ppdu end interrupts
  6136. * @arg: SoC Handle
  6137. *
  6138. * Return:
  6139. *
  6140. */
  6141. static void dp_service_mon_rings(void *arg)
  6142. {
  6143. struct dp_soc *soc = (struct dp_soc *) arg;
  6144. int ring = 0, work_done;
  6145. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  6146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6147. FL("Reaped %d descs from Monitor rings"), work_done);
  6148. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6149. }
  6150. #ifndef REMOVE_PKT_LOG
  6151. /**
  6152. * dp_pkt_log_init() - API to initialize packet log
  6153. * @ppdev: physical device handle
  6154. * @scn: HIF context
  6155. *
  6156. * Return: none
  6157. */
  6158. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6159. {
  6160. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6161. if (handle->pkt_log_init) {
  6162. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6163. "%s: Packet log not initialized", __func__);
  6164. return;
  6165. }
  6166. pktlog_sethandle(&handle->pl_dev, scn);
  6167. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6168. if (pktlogmod_init(scn)) {
  6169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6170. "%s: pktlogmod_init failed", __func__);
  6171. handle->pkt_log_init = false;
  6172. } else {
  6173. handle->pkt_log_init = true;
  6174. }
  6175. }
  6176. /**
  6177. * dp_pkt_log_con_service() - connect packet log service
  6178. * @ppdev: physical device handle
  6179. * @scn: device context
  6180. *
  6181. * Return: none
  6182. */
  6183. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6184. {
  6185. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6186. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6187. pktlog_htc_attach();
  6188. }
  6189. /**
  6190. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6191. * @handle: Pdev handle
  6192. *
  6193. * Return: none
  6194. */
  6195. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6196. {
  6197. void *scn = (void *)handle->soc->hif_handle;
  6198. if (!scn) {
  6199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6200. "%s: Invalid hif(scn) handle", __func__);
  6201. return;
  6202. }
  6203. pktlogmod_exit(scn);
  6204. handle->pkt_log_init = false;
  6205. }
  6206. #endif
  6207. #else
  6208. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6209. #endif