cvp_hfi.c 116 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/io.h>
  12. #include <linux/iommu.h>
  13. #include <linux/iopoll.h>
  14. #include <linux/of.h>
  15. #include <linux/pm_qos.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/slab.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/soc/qcom/llcc-qcom.h>
  21. #include <linux/qcom_scm.h>
  22. #include <linux/soc/qcom/smem.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/reset.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #define FIRMWARE_SIZE 0X00A00000
  32. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  33. #define QDSS_IOVA_START 0x80001000
  34. #define MIN_PAYLOAD_SIZE 3
  35. const struct msm_cvp_hfi_defs cvp_hfi_defs[] = {
  36. {
  37. .size = HFI_DFS_CONFIG_CMD_SIZE,
  38. .type = HFI_CMD_SESSION_CVP_DFS_CONFIG,
  39. .buf_offset = 0,
  40. .buf_num = 0,
  41. .resp = HAL_SESSION_DFS_CONFIG_CMD_DONE,
  42. },
  43. {
  44. .size = HFI_DFS_FRAME_CMD_SIZE,
  45. .type = HFI_CMD_SESSION_CVP_DFS_FRAME,
  46. .buf_offset = HFI_DFS_FRAME_BUFFERS_OFFSET,
  47. .buf_num = HFI_DFS_BUF_NUM,
  48. .resp = HAL_NO_RESP,
  49. },
  50. {
  51. .size = HFI_DME_CONFIG_CMD_SIZE,
  52. .type = HFI_CMD_SESSION_CVP_DME_CONFIG,
  53. .buf_offset = 0,
  54. .buf_num = 0,
  55. .resp = HAL_SESSION_DME_CONFIG_CMD_DONE,
  56. },
  57. {
  58. .size = HFI_DME_BASIC_CONFIG_CMD_SIZE,
  59. .type = HFI_CMD_SESSION_CVP_DME_BASIC_CONFIG,
  60. .buf_offset = 0,
  61. .buf_num = 0,
  62. .resp = HAL_SESSION_DME_BASIC_CONFIG_CMD_DONE,
  63. },
  64. {
  65. .size = HFI_DME_FRAME_CMD_SIZE,
  66. .type = HFI_CMD_SESSION_CVP_DME_FRAME,
  67. .buf_offset = HFI_DME_FRAME_BUFFERS_OFFSET,
  68. .buf_num = HFI_DME_BUF_NUM,
  69. .resp = HAL_NO_RESP,
  70. },
  71. {
  72. .size = HFI_PERSIST_CMD_SIZE,
  73. .type = HFI_CMD_SESSION_CVP_SET_PERSIST_BUFFERS,
  74. .buf_offset = HFI_PERSIST_BUFFERS_OFFSET,
  75. .buf_num = HFI_PERSIST_BUF_NUM,
  76. .resp = HAL_SESSION_PERSIST_SET_DONE,
  77. },
  78. {
  79. .size = 0xffffffff,
  80. .type = HFI_CMD_SESSION_CVP_RELEASE_PERSIST_BUFFERS,
  81. .buf_offset = 0,
  82. .buf_num = 0,
  83. .resp = HAL_SESSION_PERSIST_REL_DONE,
  84. },
  85. {
  86. .size = HFI_DS_CMD_SIZE,
  87. .type = HFI_CMD_SESSION_CVP_DS,
  88. .buf_offset = HFI_DS_BUFFERS_OFFSET,
  89. .buf_num = HFI_DS_BUF_NUM,
  90. .resp = HAL_NO_RESP,
  91. },
  92. {
  93. .size = HFI_OF_CONFIG_CMD_SIZE,
  94. .type = HFI_CMD_SESSION_CVP_CV_TME_CONFIG,
  95. .buf_offset = 0,
  96. .buf_num = 0,
  97. .resp = HAL_SESSION_TME_CONFIG_CMD_DONE,
  98. },
  99. {
  100. .size = HFI_OF_FRAME_CMD_SIZE,
  101. .type = HFI_CMD_SESSION_CVP_CV_TME_FRAME,
  102. .buf_offset = HFI_OF_BUFFERS_OFFSET,
  103. .buf_num = HFI_OF_BUF_NUM,
  104. .resp = HAL_NO_RESP,
  105. },
  106. {
  107. .size = HFI_ODT_CONFIG_CMD_SIZE,
  108. .type = HFI_CMD_SESSION_CVP_CV_ODT_CONFIG,
  109. .buf_offset = 0,
  110. .buf_num = 0,
  111. .resp = HAL_SESSION_ODT_CONFIG_CMD_DONE,
  112. },
  113. {
  114. .size = HFI_ODT_FRAME_CMD_SIZE,
  115. .type = HFI_CMD_SESSION_CVP_CV_ODT_FRAME,
  116. .buf_offset = HFI_ODT_BUFFERS_OFFSET,
  117. .buf_num = HFI_ODT_BUF_NUM,
  118. .resp = HAL_NO_RESP,
  119. },
  120. {
  121. .size = HFI_OD_CONFIG_CMD_SIZE,
  122. .type = HFI_CMD_SESSION_CVP_CV_OD_CONFIG,
  123. .buf_offset = 0,
  124. .buf_num = 0,
  125. .resp = HAL_SESSION_OD_CONFIG_CMD_DONE,
  126. },
  127. {
  128. .size = HFI_OD_FRAME_CMD_SIZE,
  129. .type = HFI_CMD_SESSION_CVP_CV_OD_FRAME,
  130. .buf_offset = HFI_OD_BUFFERS_OFFSET,
  131. .buf_num = HFI_OD_BUF_NUM,
  132. .resp = HAL_NO_RESP,
  133. },
  134. {
  135. .size = HFI_NCC_CONFIG_CMD_SIZE,
  136. .type = HFI_CMD_SESSION_CVP_NCC_CONFIG,
  137. .buf_offset = 0,
  138. .buf_num = 0,
  139. .resp = HAL_SESSION_NCC_CONFIG_CMD_DONE,
  140. },
  141. {
  142. .size = HFI_NCC_FRAME_CMD_SIZE,
  143. .type = HFI_CMD_SESSION_CVP_NCC_FRAME,
  144. .buf_offset = HFI_NCC_BUFFERS_OFFSET,
  145. .buf_num = HFI_NCC_BUF_NUM,
  146. .resp = HAL_NO_RESP,
  147. },
  148. {
  149. .size = HFI_ICA_CONFIG_CMD_SIZE,
  150. .type = HFI_CMD_SESSION_CVP_ICA_CONFIG,
  151. .buf_offset = 0,
  152. .buf_num = 0,
  153. .resp = HAL_SESSION_ICA_CONFIG_CMD_DONE,
  154. },
  155. {
  156. .size = HFI_ICA_FRAME_CMD_SIZE,
  157. .type = HFI_CMD_SESSION_CVP_ICA_FRAME,
  158. .buf_offset = HFI_ICA_BUFFERS_OFFSET,
  159. .buf_num = HFI_ICA_BUF_NUM,
  160. .resp = HAL_NO_RESP,
  161. },
  162. {
  163. .size = HFI_HCD_CONFIG_CMD_SIZE,
  164. .type = HFI_CMD_SESSION_CVP_HCD_CONFIG,
  165. .buf_offset = 0,
  166. .buf_num = 0,
  167. .resp = HAL_SESSION_HCD_CONFIG_CMD_DONE,
  168. },
  169. {
  170. .size = HFI_HCD_FRAME_CMD_SIZE,
  171. .type = HFI_CMD_SESSION_CVP_HCD_FRAME,
  172. .buf_offset = HFI_HCD_BUFFERS_OFFSET,
  173. .buf_num = HFI_HCD_BUF_NUM,
  174. .resp = HAL_NO_RESP,
  175. },
  176. {
  177. .size = HFI_DCM_CONFIG_CMD_SIZE,
  178. .type = HFI_CMD_SESSION_CVP_DC_CONFIG,
  179. .buf_offset = 0,
  180. .buf_num = 0,
  181. .resp = HAL_SESSION_DC_CONFIG_CMD_DONE,
  182. },
  183. {
  184. .size = HFI_DCM_FRAME_CMD_SIZE,
  185. .type = HFI_CMD_SESSION_CVP_DC_FRAME,
  186. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  187. .buf_num = HFI_DCM_BUF_NUM,
  188. .resp = HAL_NO_RESP,
  189. },
  190. {
  191. .size = HFI_DCM_CONFIG_CMD_SIZE,
  192. .type = HFI_CMD_SESSION_CVP_DCM_CONFIG,
  193. .buf_offset = 0,
  194. .buf_num = 0,
  195. .resp = HAL_SESSION_DCM_CONFIG_CMD_DONE,
  196. },
  197. {
  198. .size = HFI_DCM_FRAME_CMD_SIZE,
  199. .type = HFI_CMD_SESSION_CVP_DCM_FRAME,
  200. .buf_offset = HFI_DCM_BUFFERS_OFFSET,
  201. .buf_num = HFI_DCM_BUF_NUM,
  202. .resp = HAL_NO_RESP,
  203. },
  204. {
  205. .size = HFI_PYS_HCD_CONFIG_CMD_SIZE,
  206. .type = HFI_CMD_SESSION_CVP_PYS_HCD_CONFIG,
  207. .buf_offset = 0,
  208. .buf_num = 0,
  209. .resp = HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE,
  210. },
  211. {
  212. .size = HFI_PYS_HCD_FRAME_CMD_SIZE,
  213. .type = HFI_CMD_SESSION_CVP_PYS_HCD_FRAME,
  214. .buf_offset = HFI_PYS_HCD_BUFFERS_OFFSET,
  215. .buf_num = HFI_PYS_HCD_BUF_NUM,
  216. .resp = HAL_NO_RESP,
  217. },
  218. {
  219. .size = 0xFFFFFFFF,
  220. .type = HFI_CMD_SESSION_CVP_SET_MODEL_BUFFERS,
  221. .buf_offset = 0,
  222. .buf_num = 0,
  223. .resp = HAL_SESSION_MODEL_BUF_CMD_DONE,
  224. },
  225. {
  226. .size = 0xFFFFFFFF,
  227. .type = HFI_CMD_SESSION_CVP_FD_CONFIG,
  228. .buf_offset = 0,
  229. .buf_num = 0,
  230. .resp = HAL_SESSION_FD_CONFIG_CMD_DONE,
  231. },
  232. {
  233. .size = 0xFFFFFFFF,
  234. .type = HFI_CMD_SESSION_CVP_FD_FRAME,
  235. .buf_offset = 0,
  236. .buf_num = 0,
  237. .resp = HAL_NO_RESP,
  238. },
  239. };
  240. struct cvp_tzbsp_memprot {
  241. u32 cp_start;
  242. u32 cp_size;
  243. u32 cp_nonpixel_start;
  244. u32 cp_nonpixel_size;
  245. };
  246. #define TZBSP_PIL_SET_STATE 0xA
  247. #define TZBSP_CVP_PAS_ID 26
  248. /* Poll interval in uS */
  249. #define POLL_INTERVAL_US 50
  250. enum tzbsp_subsys_state {
  251. TZ_SUBSYS_STATE_SUSPEND = 0,
  252. TZ_SUBSYS_STATE_RESUME = 1,
  253. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  254. };
  255. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  256. .data = NULL,
  257. .data_count = 0,
  258. };
  259. const int cvp_max_packets = 32;
  260. static void iris_hfi_pm_handler(struct work_struct *work);
  261. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  262. static inline int __resume(struct iris_hfi_device *device);
  263. static inline int __suspend(struct iris_hfi_device *device);
  264. static int __disable_regulators(struct iris_hfi_device *device);
  265. static int __enable_regulators(struct iris_hfi_device *device);
  266. static inline int __prepare_enable_clks(struct iris_hfi_device *device);
  267. static inline void __disable_unprepare_clks(struct iris_hfi_device *device);
  268. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  269. static int __initialize_packetization(struct iris_hfi_device *device);
  270. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  271. u32 session_id);
  272. static bool __is_session_valid(struct iris_hfi_device *device,
  273. struct cvp_hal_session *session, const char *func);
  274. static int __set_clocks(struct iris_hfi_device *device, u32 freq);
  275. static int __iface_cmdq_write(struct iris_hfi_device *device,
  276. void *pkt);
  277. static int __load_fw(struct iris_hfi_device *device);
  278. static void __unload_fw(struct iris_hfi_device *device);
  279. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  280. static int __enable_subcaches(struct iris_hfi_device *device);
  281. static int __set_subcaches(struct iris_hfi_device *device);
  282. static int __release_subcaches(struct iris_hfi_device *device);
  283. static int __disable_subcaches(struct iris_hfi_device *device);
  284. static int __power_collapse(struct iris_hfi_device *device, bool force);
  285. static int iris_hfi_noc_error_info(void *dev);
  286. static void interrupt_init_iris2(struct iris_hfi_device *device);
  287. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  288. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  289. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  290. static void power_off_iris2(struct iris_hfi_device *device);
  291. static int __set_ubwc_config(struct iris_hfi_device *device);
  292. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  293. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  294. static struct iris_hfi_vpu_ops iris2_ops = {
  295. .interrupt_init = interrupt_init_iris2,
  296. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  297. .clock_config_on_enable = clock_config_on_enable_vpu5,
  298. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  299. .power_off = power_off_iris2,
  300. .noc_error_info = __noc_error_info_iris2,
  301. };
  302. /**
  303. * Utility function to enforce some of our assumptions. Spam calls to this
  304. * in hotspots in code to double check some of the assumptions that we hold.
  305. */
  306. static inline void __strict_check(struct iris_hfi_device *device)
  307. {
  308. msm_cvp_res_handle_fatal_hw_error(device->res,
  309. !mutex_is_locked(&device->lock));
  310. }
  311. static inline void __set_state(struct iris_hfi_device *device,
  312. enum iris_hfi_state state)
  313. {
  314. device->state = state;
  315. }
  316. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  317. {
  318. return device->state != IRIS_STATE_DEINIT;
  319. }
  320. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  321. {
  322. return device->res->sys_cache_present;
  323. }
  324. #define ROW_SIZE 32
  325. int get_pkt_index(struct cvp_hal_session_cmd_pkt *hdr)
  326. {
  327. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  328. for (i = 0; i < pkt_num; i++)
  329. if (cvp_hfi_defs[i].type == hdr->packet_type)
  330. return i;
  331. return -EINVAL;
  332. }
  333. int get_hfi_version(void)
  334. {
  335. struct msm_cvp_core *core;
  336. struct iris_hfi_device *hfi;
  337. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  338. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  339. return hfi->version;
  340. }
  341. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  342. {
  343. struct msm_cvp_core *core;
  344. struct iris_hfi_device *device;
  345. u32 minor_ver;
  346. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  347. if (core)
  348. device = core->device->hfi_device_data;
  349. else
  350. return 0;
  351. if (!device) {
  352. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  353. return 0;
  354. }
  355. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  356. HFI_VERSION_MINOR_SHIFT;
  357. if (minor_ver < 2)
  358. return sizeof(struct cvp_hfi_msg_session_hdr);
  359. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  360. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  361. else
  362. return sizeof(struct cvp_hfi_msg_session_hdr);
  363. }
  364. unsigned int get_msg_session_id(void *msg)
  365. {
  366. struct cvp_hfi_msg_session_hdr *hdr =
  367. (struct cvp_hfi_msg_session_hdr *)msg;
  368. return hdr->session_id;
  369. }
  370. unsigned int get_msg_errorcode(void *msg)
  371. {
  372. struct cvp_hfi_msg_session_hdr *hdr =
  373. (struct cvp_hfi_msg_session_hdr *)msg;
  374. return hdr->error_type;
  375. }
  376. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  377. unsigned int *error_type, unsigned int *config_id)
  378. {
  379. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  380. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  381. *session_id = cfg->session_id;
  382. *error_type = cfg->error_type;
  383. *config_id = cfg->op_conf_id;
  384. return 0;
  385. }
  386. int get_signal_from_pkt_type(unsigned int type)
  387. {
  388. int i, pkt_num = ARRAY_SIZE(cvp_hfi_defs);
  389. for (i = 0; i < pkt_num; i++)
  390. if (cvp_hfi_defs[i].type == type)
  391. return cvp_hfi_defs[i].resp;
  392. return -EINVAL;
  393. }
  394. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  395. {
  396. u32 c = 0, packet_size = *(u32 *)packet;
  397. /*
  398. * row must contain enough for 0xdeadbaad * 8 to be converted into
  399. * "de ad ba ab " * 8 + '\0'
  400. */
  401. char row[3 * ROW_SIZE];
  402. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  403. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  404. packet_size % ROW_SIZE : ROW_SIZE;
  405. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  406. ROW_SIZE, 4, row, sizeof(row), false);
  407. dprintk(log_level, "%s\n", row);
  408. }
  409. }
  410. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  411. {
  412. int rc;
  413. struct cvp_hal_session *temp;
  414. if (msm_cvp_dsp_disable)
  415. return 0;
  416. list_for_each_entry(temp, &device->sess_head, list) {
  417. /* if forceful suspend, don't check session pause info */
  418. if (force)
  419. continue;
  420. /* don't suspend if cvp session is not paused */
  421. if (!(temp->flags & SESSION_PAUSE)) {
  422. dprintk(CVP_DSP,
  423. "%s: cvp session %x not paused\n",
  424. __func__, hash32_ptr(temp));
  425. return -EBUSY;
  426. }
  427. }
  428. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  429. rc = cvp_dsp_suspend(flags);
  430. if (rc) {
  431. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  432. __func__, rc);
  433. return -EINVAL;
  434. }
  435. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  436. return 0;
  437. }
  438. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  439. {
  440. int rc;
  441. if (msm_cvp_dsp_disable)
  442. return 0;
  443. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  444. rc = cvp_dsp_resume(flags);
  445. if (rc) {
  446. dprintk(CVP_ERR,
  447. "%s: dsp resume failed with error %d\n",
  448. __func__, rc);
  449. return rc;
  450. }
  451. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  452. return rc;
  453. }
  454. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  455. {
  456. int rc;
  457. if (msm_cvp_dsp_disable)
  458. return 0;
  459. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  460. rc = cvp_dsp_shutdown(flags);
  461. if (rc) {
  462. dprintk(CVP_ERR,
  463. "%s: dsp shutdown failed with error %d\n",
  464. __func__, rc);
  465. WARN_ON(1);
  466. }
  467. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  468. return rc;
  469. }
  470. static int __acquire_regulator(struct regulator_info *rinfo,
  471. struct iris_hfi_device *device)
  472. {
  473. int rc = 0;
  474. if (rinfo->has_hw_power_collapse) {
  475. rc = regulator_set_mode(rinfo->regulator,
  476. REGULATOR_MODE_NORMAL);
  477. if (rc) {
  478. /*
  479. * This is somewhat fatal, but nothing we can do
  480. * about it. We can't disable the regulator w/o
  481. * getting it back under s/w control
  482. */
  483. dprintk(CVP_WARN,
  484. "Failed to acquire regulator control: %s\n",
  485. rinfo->name);
  486. } else {
  487. dprintk(CVP_PWR,
  488. "Acquire regulator control from HW: %s\n",
  489. rinfo->name);
  490. }
  491. }
  492. if (!regulator_is_enabled(rinfo->regulator)) {
  493. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  494. rinfo->name);
  495. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  496. }
  497. return rc;
  498. }
  499. static int __hand_off_regulator(struct regulator_info *rinfo)
  500. {
  501. int rc = 0;
  502. if (rinfo->has_hw_power_collapse) {
  503. rc = regulator_set_mode(rinfo->regulator,
  504. REGULATOR_MODE_FAST);
  505. if (rc) {
  506. dprintk(CVP_WARN,
  507. "Failed to hand off regulator control: %s\n",
  508. rinfo->name);
  509. } else {
  510. dprintk(CVP_PWR,
  511. "Hand off regulator control to HW: %s\n",
  512. rinfo->name);
  513. }
  514. }
  515. return rc;
  516. }
  517. static int __hand_off_regulators(struct iris_hfi_device *device)
  518. {
  519. struct regulator_info *rinfo;
  520. int rc = 0, c = 0;
  521. iris_hfi_for_each_regulator(device, rinfo) {
  522. rc = __hand_off_regulator(rinfo);
  523. /*
  524. * If one regulator hand off failed, driver should take
  525. * the control for other regulators back.
  526. */
  527. if (rc)
  528. goto err_reg_handoff_failed;
  529. c++;
  530. }
  531. return rc;
  532. err_reg_handoff_failed:
  533. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  534. __acquire_regulator(rinfo, device);
  535. return rc;
  536. }
  537. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  538. bool *rx_req_is_set)
  539. {
  540. struct cvp_hfi_queue_header *queue;
  541. u32 packet_size_in_words, new_write_idx;
  542. u32 empty_space, read_idx, write_idx;
  543. u32 *write_ptr;
  544. if (!qinfo || !packet) {
  545. dprintk(CVP_ERR, "Invalid Params\n");
  546. return -EINVAL;
  547. } else if (!qinfo->q_array.align_virtual_addr) {
  548. dprintk(CVP_WARN, "Queues have already been freed\n");
  549. return -EINVAL;
  550. }
  551. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  552. if (!queue) {
  553. dprintk(CVP_ERR, "queue not present\n");
  554. return -ENOENT;
  555. }
  556. if (msm_cvp_debug & CVP_PKT) {
  557. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  558. __dump_packet(packet, CVP_PKT);
  559. }
  560. packet_size_in_words = (*(u32 *)packet) >> 2;
  561. if (!packet_size_in_words || packet_size_in_words >
  562. qinfo->q_array.mem_size>>2) {
  563. dprintk(CVP_ERR, "Invalid packet size\n");
  564. return -ENODATA;
  565. }
  566. spin_lock(&qinfo->hfi_lock);
  567. read_idx = queue->qhdr_read_idx;
  568. write_idx = queue->qhdr_write_idx;
  569. empty_space = (write_idx >= read_idx) ?
  570. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  571. (read_idx - write_idx);
  572. if (empty_space <= packet_size_in_words) {
  573. queue->qhdr_tx_req = 1;
  574. spin_unlock(&qinfo->hfi_lock);
  575. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  576. empty_space, packet_size_in_words);
  577. return -ENOTEMPTY;
  578. }
  579. queue->qhdr_tx_req = 0;
  580. new_write_idx = write_idx + packet_size_in_words;
  581. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  582. (write_idx << 2));
  583. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  584. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  585. qinfo->q_array.mem_size)) {
  586. spin_unlock(&qinfo->hfi_lock);
  587. dprintk(CVP_ERR, "Invalid write index\n");
  588. return -ENODATA;
  589. }
  590. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  591. memcpy(write_ptr, packet, packet_size_in_words << 2);
  592. } else {
  593. new_write_idx -= qinfo->q_array.mem_size >> 2;
  594. memcpy(write_ptr, packet, (packet_size_in_words -
  595. new_write_idx) << 2);
  596. memcpy((void *)qinfo->q_array.align_virtual_addr,
  597. packet + ((packet_size_in_words - new_write_idx) << 2),
  598. new_write_idx << 2);
  599. }
  600. /*
  601. * Memory barrier to make sure packet is written before updating the
  602. * write index
  603. */
  604. mb();
  605. queue->qhdr_write_idx = new_write_idx;
  606. if (rx_req_is_set)
  607. *rx_req_is_set = queue->qhdr_rx_req == 1;
  608. /*
  609. * Memory barrier to make sure write index is updated before an
  610. * interrupt is raised.
  611. */
  612. mb();
  613. spin_unlock(&qinfo->hfi_lock);
  614. return 0;
  615. }
  616. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  617. u32 *pb_tx_req_is_set)
  618. {
  619. struct cvp_hfi_queue_header *queue;
  620. u32 packet_size_in_words, new_read_idx;
  621. u32 *read_ptr;
  622. u32 receive_request = 0;
  623. u32 read_idx, write_idx;
  624. int rc = 0;
  625. if (!qinfo || !packet || !pb_tx_req_is_set) {
  626. dprintk(CVP_ERR, "Invalid Params\n");
  627. return -EINVAL;
  628. } else if (!qinfo->q_array.align_virtual_addr) {
  629. dprintk(CVP_WARN, "Queues have already been freed\n");
  630. return -EINVAL;
  631. }
  632. /*
  633. * Memory barrier to make sure data is valid before
  634. *reading it
  635. */
  636. mb();
  637. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  638. if (!queue) {
  639. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  640. return -ENOMEM;
  641. }
  642. /*
  643. * Do not set receive request for debug queue, if set,
  644. * Iris generates interrupt for debug messages even
  645. * when there is no response message available.
  646. * In general debug queue will not become full as it
  647. * is being emptied out for every interrupt from Iris.
  648. * Iris will anyway generates interrupt if it is full.
  649. */
  650. spin_lock(&qinfo->hfi_lock);
  651. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  652. receive_request = 1;
  653. read_idx = queue->qhdr_read_idx;
  654. write_idx = queue->qhdr_write_idx;
  655. if (read_idx == write_idx) {
  656. queue->qhdr_rx_req = receive_request;
  657. /*
  658. * mb() to ensure qhdr is updated in main memory
  659. * so that iris reads the updated header values
  660. */
  661. mb();
  662. *pb_tx_req_is_set = 0;
  663. if (write_idx != queue->qhdr_write_idx) {
  664. queue->qhdr_rx_req = 0;
  665. } else {
  666. spin_unlock(&qinfo->hfi_lock);
  667. dprintk(CVP_HFI,
  668. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  669. receive_request ? "message" : "debug",
  670. queue->qhdr_rx_req, queue->qhdr_tx_req,
  671. queue->qhdr_read_idx);
  672. return -ENODATA;
  673. }
  674. }
  675. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  676. (read_idx << 2));
  677. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  678. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  679. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  680. spin_unlock(&qinfo->hfi_lock);
  681. dprintk(CVP_ERR, "Invalid read index\n");
  682. return -ENODATA;
  683. }
  684. packet_size_in_words = (*read_ptr) >> 2;
  685. if (!packet_size_in_words) {
  686. spin_unlock(&qinfo->hfi_lock);
  687. dprintk(CVP_ERR, "Zero packet size\n");
  688. return -ENODATA;
  689. }
  690. new_read_idx = read_idx + packet_size_in_words;
  691. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  692. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  693. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  694. memcpy(packet, read_ptr,
  695. packet_size_in_words << 2);
  696. } else {
  697. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  698. memcpy(packet, read_ptr,
  699. (packet_size_in_words - new_read_idx) << 2);
  700. memcpy(packet + ((packet_size_in_words -
  701. new_read_idx) << 2),
  702. (u8 *)qinfo->q_array.align_virtual_addr,
  703. new_read_idx << 2);
  704. }
  705. } else {
  706. dprintk(CVP_WARN,
  707. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  708. read_idx, packet_size_in_words << 2);
  709. dprintk(CVP_WARN, "Dropping this packet\n");
  710. new_read_idx = write_idx;
  711. rc = -ENODATA;
  712. }
  713. if (new_read_idx != queue->qhdr_write_idx)
  714. queue->qhdr_rx_req = 0;
  715. else
  716. queue->qhdr_rx_req = receive_request;
  717. queue->qhdr_read_idx = new_read_idx;
  718. /*
  719. * mb() to ensure qhdr is updated in main memory
  720. * so that iris reads the updated header values
  721. */
  722. mb();
  723. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  724. spin_unlock(&qinfo->hfi_lock);
  725. if ((msm_cvp_debug & CVP_PKT) &&
  726. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  727. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  728. __dump_packet(packet, CVP_PKT);
  729. }
  730. return rc;
  731. }
  732. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  733. u32 size, u32 align, u32 flags)
  734. {
  735. struct msm_cvp_smem *alloc = &mem->mem_data;
  736. int rc = 0;
  737. if (!dev || !mem || !size) {
  738. dprintk(CVP_ERR, "Invalid Params\n");
  739. return -EINVAL;
  740. }
  741. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  742. rc = msm_cvp_smem_alloc(size, align, flags, 1, (void *)dev->res, alloc);
  743. if (rc) {
  744. dprintk(CVP_ERR, "Alloc failed\n");
  745. rc = -ENOMEM;
  746. goto fail_smem_alloc;
  747. }
  748. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  749. alloc->kvaddr, size);
  750. mem->mem_size = alloc->size;
  751. mem->align_virtual_addr = alloc->kvaddr;
  752. mem->align_device_addr = alloc->device_addr;
  753. return rc;
  754. fail_smem_alloc:
  755. return rc;
  756. }
  757. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  758. {
  759. if (!dev || !mem) {
  760. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  761. return;
  762. }
  763. msm_cvp_smem_free(mem);
  764. }
  765. static void __write_register(struct iris_hfi_device *device,
  766. u32 reg, u32 value)
  767. {
  768. u32 hwiosymaddr = reg;
  769. u8 *base_addr;
  770. if (!device) {
  771. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  772. return;
  773. }
  774. __strict_check(device);
  775. if (!device->power_enabled) {
  776. dprintk(CVP_WARN,
  777. "HFI Write register failed : Power is OFF\n");
  778. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  779. return;
  780. }
  781. base_addr = device->cvp_hal_data->register_base;
  782. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  783. base_addr, hwiosymaddr, value);
  784. base_addr += hwiosymaddr;
  785. writel_relaxed(value, base_addr);
  786. /*
  787. * Memory barrier to make sure value is written into the register.
  788. */
  789. wmb();
  790. }
  791. static int __read_register(struct iris_hfi_device *device, u32 reg)
  792. {
  793. int rc = 0;
  794. u8 *base_addr;
  795. if (!device) {
  796. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  797. return -EINVAL;
  798. }
  799. __strict_check(device);
  800. if (!device->power_enabled) {
  801. dprintk(CVP_WARN,
  802. "HFI Read register failed : Power is OFF\n");
  803. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  804. return -EINVAL;
  805. }
  806. base_addr = device->cvp_hal_data->register_base;
  807. rc = readl_relaxed(base_addr + reg);
  808. /*
  809. * Memory barrier to make sure value is read correctly from the
  810. * register.
  811. */
  812. rmb();
  813. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  814. base_addr, reg, rc);
  815. return rc;
  816. }
  817. static void __set_registers(struct iris_hfi_device *device)
  818. {
  819. struct reg_set *reg_set;
  820. int i;
  821. if (!device->res) {
  822. dprintk(CVP_ERR,
  823. "device resources null, cannot set registers\n");
  824. return;
  825. }
  826. reg_set = &device->res->reg_set;
  827. for (i = 0; i < reg_set->count; i++) {
  828. __write_register(device, reg_set->reg_tbl[i].reg,
  829. reg_set->reg_tbl[i].value);
  830. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  831. reg_set->reg_tbl[i].reg,
  832. reg_set->reg_tbl[i].value);
  833. }
  834. }
  835. /*
  836. * The existence of this function is a hack for 8996 (or certain Iris versions)
  837. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  838. * (after calling __hand_off_regulators()), the values of the threshold
  839. * registers (typically programmed by TZ) are incorrectly reset. As a result
  840. * reprogram these registers at certain agreed upon points.
  841. */
  842. static void __set_threshold_registers(struct iris_hfi_device *device)
  843. {
  844. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  845. version &= ~GENMASK(15, 0);
  846. if (version != (0x3 << 28 | 0x43 << 16))
  847. return;
  848. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  849. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  850. }
  851. static int __unvote_buses(struct iris_hfi_device *device)
  852. {
  853. int rc = 0;
  854. struct bus_info *bus = NULL;
  855. kfree(device->bus_vote.data);
  856. device->bus_vote.data = NULL;
  857. device->bus_vote.data_count = 0;
  858. iris_hfi_for_each_bus(device, bus) {
  859. rc = icc_set_bw(bus->client, 0, 0);
  860. if (rc) {
  861. dprintk(CVP_ERR,
  862. "%s: Failed unvoting bus\n", __func__);
  863. goto err_unknown_device;
  864. }
  865. }
  866. err_unknown_device:
  867. return rc;
  868. }
  869. static int __vote_buses(struct iris_hfi_device *device,
  870. struct cvp_bus_vote_data *data, int num_data)
  871. {
  872. int rc = 0;
  873. struct bus_info *bus = NULL;
  874. struct cvp_bus_vote_data *new_data = NULL;
  875. if (!num_data) {
  876. dprintk(CVP_PWR, "No vote data available\n");
  877. goto no_data_count;
  878. } else if (!data) {
  879. dprintk(CVP_ERR, "Invalid voting data\n");
  880. return -EINVAL;
  881. }
  882. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  883. if (!new_data) {
  884. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  885. rc = -ENOMEM;
  886. goto err_no_mem;
  887. }
  888. no_data_count:
  889. kfree(device->bus_vote.data);
  890. device->bus_vote.data = new_data;
  891. device->bus_vote.data_count = num_data;
  892. iris_hfi_for_each_bus(device, bus) {
  893. if (bus) {
  894. rc = icc_set_bw(bus->client, bus->range[1], 0);
  895. if (rc)
  896. dprintk(CVP_ERR,
  897. "Failed voting bus %s to ab %u\n",
  898. bus->name, bus->range[1]*1000);
  899. }
  900. }
  901. err_no_mem:
  902. return rc;
  903. }
  904. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  905. {
  906. int rc = 0;
  907. struct iris_hfi_device *device = dev;
  908. if (!device)
  909. return -EINVAL;
  910. mutex_lock(&device->lock);
  911. rc = __vote_buses(device, d, n);
  912. mutex_unlock(&device->lock);
  913. return rc;
  914. }
  915. static int __core_set_resource(struct iris_hfi_device *device,
  916. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  917. {
  918. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  919. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  920. int rc = 0;
  921. if (!device || !resource_hdr || !resource_value) {
  922. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  923. return -EINVAL;
  924. }
  925. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  926. rc = call_hfi_pkt_op(device, sys_set_resource,
  927. pkt, resource_hdr, resource_value);
  928. if (rc) {
  929. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  930. goto err_create_pkt;
  931. }
  932. rc = __iface_cmdq_write(device, pkt);
  933. if (rc)
  934. rc = -ENOTEMPTY;
  935. err_create_pkt:
  936. return rc;
  937. }
  938. static int __core_release_resource(struct iris_hfi_device *device,
  939. struct cvp_resource_hdr *resource_hdr)
  940. {
  941. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  942. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  943. int rc = 0;
  944. if (!device || !resource_hdr) {
  945. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  946. return -EINVAL;
  947. }
  948. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  949. rc = call_hfi_pkt_op(device, sys_release_resource,
  950. pkt, resource_hdr);
  951. if (rc) {
  952. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  953. goto err_create_pkt;
  954. }
  955. rc = __iface_cmdq_write(device, pkt);
  956. if (rc)
  957. rc = -ENOTEMPTY;
  958. err_create_pkt:
  959. return rc;
  960. }
  961. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  962. {
  963. int rc = 0;
  964. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  965. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  966. if (rc) {
  967. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  968. return rc;
  969. }
  970. return 0;
  971. }
  972. static inline int __boot_firmware(struct iris_hfi_device *device)
  973. {
  974. int rc = 0, loop = 10;
  975. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  976. u32 reg_gdsc;
  977. /*
  978. * Hand off control of regulators to h/w _after_ enabling clocks.
  979. * Note that the GDSC will turn off when switching from normal
  980. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  981. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  982. */
  983. if (__enable_hw_power_collapse(device))
  984. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  985. while (loop) {
  986. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  987. if (reg_gdsc & 0x80000000) {
  988. usleep_range(100, 200);
  989. loop--;
  990. } else {
  991. break;
  992. }
  993. }
  994. if (!loop)
  995. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  996. ctrl_init_val = BIT(0);
  997. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  998. while (!ctrl_status && count < max_tries) {
  999. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  1000. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  1001. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  1002. rc = -ENODATA;
  1003. break;
  1004. }
  1005. /* Reduce to 1/100th and x100 of max_tries */
  1006. usleep_range(500, 1000);
  1007. count++;
  1008. }
  1009. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  1010. dprintk(CVP_ERR, "Failed to boot FW status: %x\n",
  1011. ctrl_status);
  1012. rc = -ENODEV;
  1013. }
  1014. /* Enable interrupt before sending commands to tensilica */
  1015. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  1016. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  1017. return rc;
  1018. }
  1019. static int iris_hfi_resume(void *dev)
  1020. {
  1021. int rc = 0;
  1022. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1023. if (!device) {
  1024. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1025. return -EINVAL;
  1026. }
  1027. dprintk(CVP_CORE, "Resuming Iris\n");
  1028. mutex_lock(&device->lock);
  1029. rc = __resume(device);
  1030. mutex_unlock(&device->lock);
  1031. return rc;
  1032. }
  1033. static int iris_hfi_suspend(void *dev)
  1034. {
  1035. int rc = 0;
  1036. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1037. if (!device) {
  1038. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1039. return -EINVAL;
  1040. } else if (!device->res->sw_power_collapsible) {
  1041. return -ENOTSUPP;
  1042. }
  1043. dprintk(CVP_CORE, "Suspending Iris\n");
  1044. mutex_lock(&device->lock);
  1045. rc = __power_collapse(device, true);
  1046. if (rc) {
  1047. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  1048. rc = -EBUSY;
  1049. }
  1050. mutex_unlock(&device->lock);
  1051. /* Cancel pending delayed works if any */
  1052. if (!rc)
  1053. cancel_delayed_work(&iris_hfi_pm_work);
  1054. return rc;
  1055. }
  1056. static void cvp_dump_csr(struct iris_hfi_device *dev)
  1057. {
  1058. u32 reg;
  1059. if (!dev)
  1060. return;
  1061. if (!dev->power_enabled || dev->reg_dumped)
  1062. return;
  1063. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  1064. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  1065. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  1066. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  1067. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  1068. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  1069. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  1070. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  1071. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  1072. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  1073. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  1074. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  1075. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  1076. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  1077. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  1078. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  1079. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  1080. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  1081. dev->reg_dumped = true;
  1082. }
  1083. static int iris_hfi_flush_debug_queue(void *dev)
  1084. {
  1085. int rc = 0;
  1086. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  1087. if (!device) {
  1088. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  1089. return -EINVAL;
  1090. }
  1091. cvp_dump_csr(device);
  1092. mutex_lock(&device->lock);
  1093. if (!device->power_enabled) {
  1094. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  1095. rc = -EINVAL;
  1096. goto exit;
  1097. }
  1098. __flush_debug_queue(device, NULL);
  1099. exit:
  1100. mutex_unlock(&device->lock);
  1101. return rc;
  1102. }
  1103. static int __set_clocks(struct iris_hfi_device *device, u32 freq)
  1104. {
  1105. struct clock_info *cl;
  1106. int rc = 0;
  1107. iris_hfi_for_each_clock(device, cl) {
  1108. if (cl->has_scaling) {/* has_scaling */
  1109. device->clk_freq = freq;
  1110. if (msm_cvp_clock_voting)
  1111. freq = msm_cvp_clock_voting;
  1112. rc = clk_set_rate(cl->clk, freq);
  1113. if (rc) {
  1114. dprintk(CVP_ERR,
  1115. "Failed to set clock rate %u %s: %d %s\n",
  1116. freq, cl->name, rc, __func__);
  1117. return rc;
  1118. }
  1119. dprintk(CVP_PWR, "Scaling clock %s to %u\n",
  1120. cl->name, freq);
  1121. }
  1122. }
  1123. return 0;
  1124. }
  1125. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  1126. {
  1127. int rc = 0;
  1128. struct iris_hfi_device *device = dev;
  1129. if (!device) {
  1130. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  1131. return -EINVAL;
  1132. }
  1133. mutex_lock(&device->lock);
  1134. if (__resume(device)) {
  1135. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  1136. rc = -ENODEV;
  1137. goto exit;
  1138. }
  1139. rc = __set_clocks(device, freq);
  1140. exit:
  1141. mutex_unlock(&device->lock);
  1142. return rc;
  1143. }
  1144. static int __scale_clocks(struct iris_hfi_device *device)
  1145. {
  1146. int rc = 0;
  1147. struct allowed_clock_rates_table *allowed_clks_tbl = NULL;
  1148. u32 rate = 0;
  1149. allowed_clks_tbl = device->res->allowed_clks_tbl;
  1150. rate = device->clk_freq ? device->clk_freq :
  1151. allowed_clks_tbl[0].clock_rate;
  1152. dprintk(CVP_PWR, "%s: scale clock rate %d\n", __func__, rate);
  1153. rc = __set_clocks(device, rate);
  1154. return rc;
  1155. }
  1156. /* Writes into cmdq without raising an interrupt */
  1157. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  1158. void *pkt, bool *requires_interrupt)
  1159. {
  1160. struct cvp_iface_q_info *q_info;
  1161. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  1162. int result = -E2BIG;
  1163. if (!device || !pkt) {
  1164. dprintk(CVP_ERR, "Invalid Params\n");
  1165. return -EINVAL;
  1166. }
  1167. __strict_check(device);
  1168. if (!__core_in_valid_state(device)) {
  1169. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1170. result = -EINVAL;
  1171. goto err_q_null;
  1172. }
  1173. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1174. device->last_packet_type = cmd_packet->packet_type;
  1175. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1176. if (!q_info) {
  1177. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1178. goto err_q_null;
  1179. }
  1180. if (!q_info->q_array.align_virtual_addr) {
  1181. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1182. result = -ENODATA;
  1183. goto err_q_null;
  1184. }
  1185. if (__resume(device)) {
  1186. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1187. goto err_q_write;
  1188. }
  1189. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1190. if (device->res->sw_power_collapsible) {
  1191. cancel_delayed_work(&iris_hfi_pm_work);
  1192. if (!queue_delayed_work(device->iris_pm_workq,
  1193. &iris_hfi_pm_work,
  1194. msecs_to_jiffies(
  1195. device->res->msm_cvp_pwr_collapse_delay))) {
  1196. dprintk(CVP_PWR,
  1197. "PM work already scheduled\n");
  1198. }
  1199. }
  1200. result = 0;
  1201. } else {
  1202. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1203. }
  1204. err_q_write:
  1205. err_q_null:
  1206. return result;
  1207. }
  1208. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1209. {
  1210. bool needs_interrupt = false;
  1211. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1212. if (!rc && needs_interrupt) {
  1213. /* Consumer of cmdq prefers that we raise an interrupt */
  1214. rc = 0;
  1215. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1216. }
  1217. return rc;
  1218. }
  1219. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1220. {
  1221. u32 tx_req_is_set = 0;
  1222. int rc = 0;
  1223. struct cvp_iface_q_info *q_info;
  1224. if (!pkt) {
  1225. dprintk(CVP_ERR, "Invalid Params\n");
  1226. return -EINVAL;
  1227. }
  1228. __strict_check(device);
  1229. if (!__core_in_valid_state(device)) {
  1230. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1231. rc = -EINVAL;
  1232. goto read_error_null;
  1233. }
  1234. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1235. if (q_info->q_array.align_virtual_addr == NULL) {
  1236. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1237. rc = -ENODATA;
  1238. goto read_error_null;
  1239. }
  1240. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1241. if (tx_req_is_set)
  1242. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1243. rc = 0;
  1244. } else
  1245. rc = -ENODATA;
  1246. read_error_null:
  1247. return rc;
  1248. }
  1249. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1250. {
  1251. u32 tx_req_is_set = 0;
  1252. int rc = 0;
  1253. struct cvp_iface_q_info *q_info;
  1254. if (!pkt) {
  1255. dprintk(CVP_ERR, "Invalid Params\n");
  1256. return -EINVAL;
  1257. }
  1258. __strict_check(device);
  1259. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1260. if (q_info->q_array.align_virtual_addr == NULL) {
  1261. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1262. rc = -ENODATA;
  1263. goto dbg_error_null;
  1264. }
  1265. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1266. if (tx_req_is_set)
  1267. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1268. rc = 0;
  1269. } else
  1270. rc = -ENODATA;
  1271. dbg_error_null:
  1272. return rc;
  1273. }
  1274. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1275. {
  1276. q_hdr->qhdr_status = 0x1;
  1277. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1278. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1279. q_hdr->qhdr_pkt_size = 0;
  1280. q_hdr->qhdr_rx_wm = 0x1;
  1281. q_hdr->qhdr_tx_wm = 0x1;
  1282. q_hdr->qhdr_rx_req = 0x1;
  1283. q_hdr->qhdr_tx_req = 0x0;
  1284. q_hdr->qhdr_rx_irq_status = 0x0;
  1285. q_hdr->qhdr_tx_irq_status = 0x0;
  1286. q_hdr->qhdr_read_idx = 0x0;
  1287. q_hdr->qhdr_write_idx = 0x0;
  1288. }
  1289. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1290. {
  1291. int i;
  1292. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1293. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1294. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1295. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1296. return;
  1297. }
  1298. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1299. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1300. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1301. mem_data->kvaddr, mem_data->dma_handle);
  1302. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1303. device->dsp_iface_queues[i].q_hdr = NULL;
  1304. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1305. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1306. }
  1307. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1308. device->dsp_iface_q_table.align_device_addr = 0;
  1309. }
  1310. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1311. {
  1312. int rc = 0;
  1313. u32 i;
  1314. struct cvp_iface_q_info *iface_q;
  1315. int offset = 0;
  1316. phys_addr_t fw_bias = 0;
  1317. size_t q_size;
  1318. struct msm_cvp_smem *mem_data;
  1319. void *kvaddr;
  1320. dma_addr_t dma_handle;
  1321. dma_addr_t iova;
  1322. struct context_bank_info *cb;
  1323. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1324. mem_data = &dev->dsp_iface_q_table.mem_data;
  1325. /* Allocate dsp queues from CDSP device memory */
  1326. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1327. &dma_handle, GFP_KERNEL);
  1328. if (IS_ERR_OR_NULL(kvaddr)) {
  1329. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1330. goto fail_dma_alloc;
  1331. }
  1332. cb = msm_cvp_smem_get_context_bank(0, dev->res, 0);
  1333. if (!cb) {
  1334. dprintk(CVP_ERR,
  1335. "%s: failed to get context bank\n", __func__);
  1336. goto fail_dma_map;
  1337. }
  1338. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1339. q_size, DMA_BIDIRECTIONAL, 0);
  1340. if (dma_mapping_error(cb->dev, iova)) {
  1341. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1342. goto fail_dma_map;
  1343. }
  1344. dprintk(CVP_DSP,
  1345. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1346. __func__, kvaddr, dma_handle, iova, q_size);
  1347. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1348. mem_data->kvaddr = kvaddr;
  1349. mem_data->device_addr = iova;
  1350. mem_data->dma_handle = dma_handle;
  1351. mem_data->size = q_size;
  1352. mem_data->ion_flags = 0;
  1353. mem_data->mapping_info.cb_info = cb;
  1354. if (!is_iommu_present(dev->res))
  1355. fw_bias = dev->cvp_hal_data->firmware_base;
  1356. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1357. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1358. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1359. offset = dev->dsp_iface_q_table.mem_size;
  1360. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1361. iface_q = &dev->dsp_iface_queues[i];
  1362. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1363. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1364. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1365. offset += iface_q->q_array.mem_size;
  1366. spin_lock_init(&iface_q->hfi_lock);
  1367. }
  1368. cvp_dsp_init_hfi_queue_hdr(dev);
  1369. return rc;
  1370. fail_dma_map:
  1371. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1372. fail_dma_alloc:
  1373. return -ENOMEM;
  1374. }
  1375. static void __interface_queues_release(struct iris_hfi_device *device)
  1376. {
  1377. int i;
  1378. struct cvp_hfi_mem_map_table *qdss;
  1379. struct cvp_hfi_mem_map *mem_map;
  1380. int num_entries = device->res->qdss_addr_set.count;
  1381. unsigned long mem_map_table_base_addr;
  1382. struct context_bank_info *cb;
  1383. if (device->qdss.align_virtual_addr) {
  1384. qdss = (struct cvp_hfi_mem_map_table *)
  1385. device->qdss.align_virtual_addr;
  1386. qdss->mem_map_num_entries = num_entries;
  1387. mem_map_table_base_addr =
  1388. device->qdss.align_device_addr +
  1389. sizeof(struct cvp_hfi_mem_map_table);
  1390. qdss->mem_map_table_base_addr =
  1391. (u32)mem_map_table_base_addr;
  1392. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1393. mem_map_table_base_addr) {
  1394. dprintk(CVP_ERR,
  1395. "Invalid mem_map_table_base_addr %#lx",
  1396. mem_map_table_base_addr);
  1397. }
  1398. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1399. cb = msm_cvp_smem_get_context_bank(false, device->res, 0);
  1400. for (i = 0; cb && i < num_entries; i++) {
  1401. iommu_unmap(cb->domain,
  1402. mem_map[i].virtual_addr,
  1403. mem_map[i].size);
  1404. }
  1405. __smem_free(device, &device->qdss.mem_data);
  1406. }
  1407. __smem_free(device, &device->iface_q_table.mem_data);
  1408. __smem_free(device, &device->sfr.mem_data);
  1409. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1410. device->iface_queues[i].q_hdr = NULL;
  1411. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1412. device->iface_queues[i].q_array.align_device_addr = 0;
  1413. }
  1414. device->iface_q_table.align_virtual_addr = NULL;
  1415. device->iface_q_table.align_device_addr = 0;
  1416. device->qdss.align_virtual_addr = NULL;
  1417. device->qdss.align_device_addr = 0;
  1418. device->sfr.align_virtual_addr = NULL;
  1419. device->sfr.align_device_addr = 0;
  1420. device->mem_addr.align_virtual_addr = NULL;
  1421. device->mem_addr.align_device_addr = 0;
  1422. __interface_dsp_queues_release(device);
  1423. }
  1424. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1425. struct cvp_hfi_mem_map *mem_map,
  1426. struct iommu_domain *domain)
  1427. {
  1428. int i;
  1429. int rc = 0;
  1430. dma_addr_t iova = QDSS_IOVA_START;
  1431. int num_entries = dev->res->qdss_addr_set.count;
  1432. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1433. if (!num_entries)
  1434. return -ENODATA;
  1435. for (i = 0; i < num_entries; i++) {
  1436. if (domain) {
  1437. rc = iommu_map(domain, iova,
  1438. qdss_addr_tbl[i].start,
  1439. qdss_addr_tbl[i].size,
  1440. IOMMU_READ | IOMMU_WRITE);
  1441. if (rc) {
  1442. dprintk(CVP_ERR,
  1443. "IOMMU QDSS mapping failed for addr %#x\n",
  1444. qdss_addr_tbl[i].start);
  1445. rc = -ENOMEM;
  1446. break;
  1447. }
  1448. } else {
  1449. iova = qdss_addr_tbl[i].start;
  1450. }
  1451. mem_map[i].virtual_addr = (u32)iova;
  1452. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1453. mem_map[i].size = qdss_addr_tbl[i].size;
  1454. mem_map[i].attr = 0x0;
  1455. iova += mem_map[i].size;
  1456. }
  1457. if (i < num_entries) {
  1458. dprintk(CVP_ERR,
  1459. "QDSS mapping failed, Freeing other entries %d\n", i);
  1460. for (--i; domain && i >= 0; i--) {
  1461. iommu_unmap(domain,
  1462. mem_map[i].virtual_addr,
  1463. mem_map[i].size);
  1464. }
  1465. }
  1466. return rc;
  1467. }
  1468. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1469. {
  1470. __write_register(device, CVP_UC_REGION_ADDR,
  1471. (u32)device->iface_q_table.align_device_addr);
  1472. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1473. __write_register(device, CVP_QTBL_ADDR,
  1474. (u32)device->iface_q_table.align_device_addr);
  1475. __write_register(device, CVP_QTBL_INFO, 0x01);
  1476. if (device->sfr.align_device_addr)
  1477. __write_register(device, CVP_SFR_ADDR,
  1478. (u32)device->sfr.align_device_addr);
  1479. if (device->qdss.align_device_addr)
  1480. __write_register(device, CVP_MMAP_ADDR,
  1481. (u32)device->qdss.align_device_addr);
  1482. call_iris_op(device, setup_dsp_uc_memmap, device);
  1483. }
  1484. static int __interface_queues_init(struct iris_hfi_device *dev)
  1485. {
  1486. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1487. struct cvp_hfi_queue_header *q_hdr;
  1488. u32 i;
  1489. int rc = 0;
  1490. struct cvp_hfi_mem_map_table *qdss;
  1491. struct cvp_hfi_mem_map *mem_map;
  1492. struct cvp_iface_q_info *iface_q;
  1493. struct cvp_hfi_sfr_struct *vsfr;
  1494. struct cvp_mem_addr *mem_addr;
  1495. int offset = 0;
  1496. int num_entries = dev->res->qdss_addr_set.count;
  1497. phys_addr_t fw_bias = 0;
  1498. size_t q_size;
  1499. unsigned long mem_map_table_base_addr;
  1500. struct context_bank_info *cb;
  1501. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1502. mem_addr = &dev->mem_addr;
  1503. if (!is_iommu_present(dev->res))
  1504. fw_bias = dev->cvp_hal_data->firmware_base;
  1505. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1506. if (rc) {
  1507. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1508. goto fail_alloc_queue;
  1509. }
  1510. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1511. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1512. fw_bias;
  1513. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1514. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1515. offset += dev->iface_q_table.mem_size;
  1516. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1517. iface_q = &dev->iface_queues[i];
  1518. iface_q->q_array.align_device_addr = mem_addr->align_device_addr
  1519. + offset - fw_bias;
  1520. iface_q->q_array.align_virtual_addr =
  1521. mem_addr->align_virtual_addr + offset;
  1522. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1523. offset += iface_q->q_array.mem_size;
  1524. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1525. dev->iface_q_table.align_virtual_addr, i);
  1526. __set_queue_hdr_defaults(iface_q->q_hdr);
  1527. spin_lock_init(&iface_q->hfi_lock);
  1528. }
  1529. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1530. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1531. SMEM_UNCACHED);
  1532. if (rc) {
  1533. dprintk(CVP_WARN,
  1534. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1535. dev->qdss.align_device_addr = 0;
  1536. } else {
  1537. dev->qdss.align_device_addr =
  1538. mem_addr->align_device_addr - fw_bias;
  1539. dev->qdss.align_virtual_addr =
  1540. mem_addr->align_virtual_addr;
  1541. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1542. dev->qdss.mem_data = mem_addr->mem_data;
  1543. }
  1544. }
  1545. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1546. if (rc) {
  1547. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1548. dev->sfr.align_device_addr = 0;
  1549. } else {
  1550. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1551. fw_bias;
  1552. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1553. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1554. dev->sfr.mem_data = mem_addr->mem_data;
  1555. }
  1556. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1557. dev->iface_q_table.align_virtual_addr;
  1558. q_tbl_hdr->qtbl_version = 0;
  1559. q_tbl_hdr->device_addr = (void *)dev;
  1560. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1561. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1562. q_tbl_hdr->qtbl_qhdr0_offset =
  1563. sizeof(struct cvp_hfi_queue_table_header);
  1564. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1565. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1566. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1567. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1568. q_hdr = iface_q->q_hdr;
  1569. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1570. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1571. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1572. q_hdr = iface_q->q_hdr;
  1573. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1574. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1575. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1576. q_hdr = iface_q->q_hdr;
  1577. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1578. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1579. /*
  1580. * Set receive request to zero on debug queue as there is no
  1581. * need of interrupt from cvp hardware for debug messages
  1582. */
  1583. q_hdr->qhdr_rx_req = 0;
  1584. if (dev->qdss.align_virtual_addr) {
  1585. qdss =
  1586. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1587. qdss->mem_map_num_entries = num_entries;
  1588. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1589. sizeof(struct cvp_hfi_mem_map_table);
  1590. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1591. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1592. cb = msm_cvp_smem_get_context_bank(false, dev->res, 0);
  1593. if (!cb) {
  1594. dprintk(CVP_ERR,
  1595. "%s: failed to get context bank\n", __func__);
  1596. return -EINVAL;
  1597. }
  1598. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1599. if (rc) {
  1600. dprintk(CVP_ERR,
  1601. "IOMMU mapping failed, Freeing qdss memdata\n");
  1602. __smem_free(dev, &dev->qdss.mem_data);
  1603. dev->qdss.align_virtual_addr = NULL;
  1604. dev->qdss.align_device_addr = 0;
  1605. }
  1606. }
  1607. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1608. if (vsfr)
  1609. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1610. rc = __interface_dsp_queues_init(dev);
  1611. if (rc) {
  1612. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1613. goto fail_alloc_queue;
  1614. }
  1615. __setup_ucregion_memory_map(dev);
  1616. return 0;
  1617. fail_alloc_queue:
  1618. return -ENOMEM;
  1619. }
  1620. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1621. {
  1622. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1623. int rc = 0;
  1624. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1625. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1626. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1627. if (rc) {
  1628. dprintk(CVP_WARN,
  1629. "Debug mode setting to FW failed\n");
  1630. return -ENOTEMPTY;
  1631. }
  1632. if (__iface_cmdq_write(device, pkt))
  1633. return -ENOTEMPTY;
  1634. return 0;
  1635. }
  1636. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1637. bool enable)
  1638. {
  1639. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1640. int rc = 0;
  1641. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1642. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1643. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1644. if (__iface_cmdq_write(device, pkt))
  1645. return -ENOTEMPTY;
  1646. return 0;
  1647. }
  1648. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1649. {
  1650. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1651. int rc = 0;
  1652. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1653. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1654. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1655. pkt, mode);
  1656. if (rc) {
  1657. dprintk(CVP_WARN,
  1658. "Coverage mode setting to FW failed\n");
  1659. return -ENOTEMPTY;
  1660. }
  1661. if (__iface_cmdq_write(device, pkt)) {
  1662. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1663. return -ENOTEMPTY;
  1664. }
  1665. return 0;
  1666. }
  1667. static int __sys_set_power_control(struct iris_hfi_device *device,
  1668. bool enable)
  1669. {
  1670. struct regulator_info *rinfo;
  1671. bool supported = false;
  1672. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1673. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1674. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1675. iris_hfi_for_each_regulator(device, rinfo) {
  1676. if (rinfo->has_hw_power_collapse) {
  1677. supported = true;
  1678. break;
  1679. }
  1680. }
  1681. if (!supported)
  1682. return 0;
  1683. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1684. if (__iface_cmdq_write(device, pkt))
  1685. return -ENOTEMPTY;
  1686. return 0;
  1687. }
  1688. static int iris_hfi_core_init(void *device)
  1689. {
  1690. int rc = 0;
  1691. u32 ipcc_iova;
  1692. struct cvp_hfi_cmd_sys_init_packet pkt;
  1693. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1694. struct iris_hfi_device *dev;
  1695. if (!device) {
  1696. dprintk(CVP_ERR, "Invalid device\n");
  1697. return -ENODEV;
  1698. }
  1699. dev = device;
  1700. dprintk(CVP_CORE, "Core initializing\n");
  1701. mutex_lock(&dev->lock);
  1702. dev->bus_vote.data =
  1703. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1704. if (!dev->bus_vote.data) {
  1705. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1706. rc = -ENOMEM;
  1707. goto err_no_mem;
  1708. }
  1709. dev->bus_vote.data_count = 1;
  1710. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1711. rc = __load_fw(dev);
  1712. if (rc) {
  1713. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1714. goto err_load_fw;
  1715. }
  1716. __set_state(dev, IRIS_STATE_INIT);
  1717. dev->reg_dumped = false;
  1718. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1719. &dev->cvp_hal_data->firmware_base,
  1720. dev->cvp_hal_data->register_base);
  1721. rc = __interface_queues_init(dev);
  1722. if (rc) {
  1723. dprintk(CVP_ERR, "failed to init queues\n");
  1724. rc = -ENOMEM;
  1725. goto err_core_init;
  1726. }
  1727. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1728. if (!rc) {
  1729. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1730. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1731. }
  1732. rc = __boot_firmware(dev);
  1733. if (rc) {
  1734. dprintk(CVP_ERR, "Failed to start core\n");
  1735. rc = -ENODEV;
  1736. goto err_core_init;
  1737. }
  1738. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1739. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1740. if (rc) {
  1741. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1742. goto err_core_init;
  1743. }
  1744. if (__iface_cmdq_write(dev, &pkt)) {
  1745. rc = -ENOTEMPTY;
  1746. goto err_core_init;
  1747. }
  1748. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1749. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1750. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1751. __sys_set_debug(device, msm_cvp_fw_debug);
  1752. __enable_subcaches(device);
  1753. __set_subcaches(device);
  1754. __set_ubwc_config(device);
  1755. __sys_set_idle_indicator(device, true);
  1756. if (dev->res->pm_qos_latency_us)
  1757. pm_qos_add_request(&dev->qos, PM_QOS_CPU_DMA_LATENCY,
  1758. dev->res->pm_qos_latency_us);
  1759. mutex_unlock(&dev->lock);
  1760. cvp_dsp_send_hfi_queue();
  1761. dprintk(CVP_CORE, "Core inited successfully\n");
  1762. return 0;
  1763. err_core_init:
  1764. __set_state(dev, IRIS_STATE_DEINIT);
  1765. __unload_fw(dev);
  1766. err_load_fw:
  1767. err_no_mem:
  1768. dprintk(CVP_ERR, "Core init failed\n");
  1769. mutex_unlock(&dev->lock);
  1770. return rc;
  1771. }
  1772. static int iris_hfi_core_release(void *dev)
  1773. {
  1774. int rc = 0;
  1775. struct iris_hfi_device *device = dev;
  1776. struct cvp_hal_session *session, *next;
  1777. if (!device) {
  1778. dprintk(CVP_ERR, "invalid device\n");
  1779. return -ENODEV;
  1780. }
  1781. mutex_lock(&device->lock);
  1782. dprintk(CVP_WARN, "Core releasing\n");
  1783. if (device->res->pm_qos_latency_us &&
  1784. pm_qos_request_active(&device->qos))
  1785. pm_qos_remove_request(&device->qos);
  1786. __resume(device);
  1787. __set_state(device, IRIS_STATE_DEINIT);
  1788. __dsp_shutdown(device, 0);
  1789. __unload_fw(device);
  1790. /* unlink all sessions from device */
  1791. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1792. list_del(&session->list);
  1793. session->device = NULL;
  1794. }
  1795. dprintk(CVP_CORE, "Core released successfully\n");
  1796. mutex_unlock(&device->lock);
  1797. return rc;
  1798. }
  1799. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1800. {
  1801. u32 intr_status = 0, mask = 0;
  1802. if (!device) {
  1803. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1804. return;
  1805. }
  1806. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1807. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1808. if (intr_status & mask) {
  1809. device->intr_status |= intr_status;
  1810. device->reg_count++;
  1811. dprintk(CVP_CORE,
  1812. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1813. device, device->reg_count, intr_status);
  1814. } else {
  1815. device->spur_count++;
  1816. }
  1817. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1818. }
  1819. static int iris_hfi_core_trigger_ssr(void *device,
  1820. enum hal_ssr_trigger_type type)
  1821. {
  1822. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1823. int rc = 0;
  1824. struct iris_hfi_device *dev;
  1825. if (!device) {
  1826. dprintk(CVP_ERR, "invalid device\n");
  1827. return -ENODEV;
  1828. }
  1829. dev = device;
  1830. if (mutex_trylock(&dev->lock)) {
  1831. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1832. if (rc) {
  1833. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1834. __func__);
  1835. goto err_create_pkt;
  1836. }
  1837. if (__iface_cmdq_write(dev, &pkt))
  1838. rc = -ENOTEMPTY;
  1839. } else {
  1840. return -EAGAIN;
  1841. }
  1842. err_create_pkt:
  1843. mutex_unlock(&dev->lock);
  1844. return rc;
  1845. }
  1846. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1847. {
  1848. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1849. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1850. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1851. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1852. }
  1853. static void __session_clean(struct cvp_hal_session *session)
  1854. {
  1855. struct cvp_hal_session *temp, *next;
  1856. struct iris_hfi_device *device;
  1857. if (!session || !session->device) {
  1858. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1859. return;
  1860. }
  1861. device = session->device;
  1862. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1863. /*
  1864. * session might have been removed from the device list in
  1865. * core_release, so check and remove if it is in the list
  1866. */
  1867. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1868. if (session == temp) {
  1869. list_del(&session->list);
  1870. break;
  1871. }
  1872. }
  1873. /* Poison the session handle with zeros */
  1874. *session = (struct cvp_hal_session){ {0} };
  1875. kfree(session);
  1876. }
  1877. static int iris_hfi_session_clean(void *session)
  1878. {
  1879. struct cvp_hal_session *sess_close;
  1880. struct iris_hfi_device *device;
  1881. if (!session) {
  1882. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1883. return -EINVAL;
  1884. }
  1885. sess_close = session;
  1886. device = sess_close->device;
  1887. if (!device) {
  1888. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1889. return -EINVAL;
  1890. }
  1891. mutex_lock(&device->lock);
  1892. __session_clean(sess_close);
  1893. mutex_unlock(&device->lock);
  1894. return 0;
  1895. }
  1896. static int iris_hfi_session_init(void *device, void *session_id,
  1897. void **new_session)
  1898. {
  1899. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1900. struct iris_hfi_device *dev;
  1901. struct cvp_hal_session *s;
  1902. if (!device || !new_session) {
  1903. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1904. return -EINVAL;
  1905. }
  1906. dev = device;
  1907. mutex_lock(&dev->lock);
  1908. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1909. if (!s) {
  1910. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1911. goto err_session_init_fail;
  1912. }
  1913. s->session_id = session_id;
  1914. s->device = dev;
  1915. dprintk(CVP_SESS,
  1916. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1917. list_add_tail(&s->list, &dev->sess_head);
  1918. __set_default_sys_properties(device);
  1919. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1920. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1921. goto err_session_init_fail;
  1922. }
  1923. *new_session = s;
  1924. if (__iface_cmdq_write(dev, &pkt))
  1925. goto err_session_init_fail;
  1926. mutex_unlock(&dev->lock);
  1927. return 0;
  1928. err_session_init_fail:
  1929. if (s)
  1930. __session_clean(s);
  1931. *new_session = NULL;
  1932. mutex_unlock(&dev->lock);
  1933. return -EINVAL;
  1934. }
  1935. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1936. {
  1937. struct cvp_hal_session_cmd_pkt pkt;
  1938. int rc = 0;
  1939. struct iris_hfi_device *device = session->device;
  1940. if (!__is_session_valid(device, session, __func__))
  1941. return -ECONNRESET;
  1942. rc = call_hfi_pkt_op(device, session_cmd,
  1943. &pkt, pkt_type, session);
  1944. if (rc == -EPERM)
  1945. return 0;
  1946. if (rc) {
  1947. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  1948. goto err_create_pkt;
  1949. }
  1950. if (__iface_cmdq_write(session->device, &pkt))
  1951. rc = -ENOTEMPTY;
  1952. err_create_pkt:
  1953. return rc;
  1954. }
  1955. static int iris_hfi_session_end(void *session)
  1956. {
  1957. struct cvp_hal_session *sess;
  1958. struct iris_hfi_device *device;
  1959. int rc = 0;
  1960. if (!session) {
  1961. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1962. return -EINVAL;
  1963. }
  1964. sess = session;
  1965. device = sess->device;
  1966. if (!device) {
  1967. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  1968. return -EINVAL;
  1969. }
  1970. mutex_lock(&device->lock);
  1971. if (msm_cvp_fw_coverage) {
  1972. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  1973. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  1974. }
  1975. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  1976. mutex_unlock(&device->lock);
  1977. return rc;
  1978. }
  1979. static int iris_hfi_session_abort(void *sess)
  1980. {
  1981. struct cvp_hal_session *session = sess;
  1982. struct iris_hfi_device *device;
  1983. int rc = 0;
  1984. if (!session || !session->device) {
  1985. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1986. return -EINVAL;
  1987. }
  1988. device = session->device;
  1989. mutex_lock(&device->lock);
  1990. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  1991. mutex_unlock(&device->lock);
  1992. return rc;
  1993. }
  1994. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  1995. {
  1996. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  1997. int rc = 0;
  1998. struct cvp_hal_session *session = sess;
  1999. struct iris_hfi_device *device;
  2000. if (!session || !session->device || !iova || !size) {
  2001. dprintk(CVP_ERR, "Invalid Params\n");
  2002. return -EINVAL;
  2003. }
  2004. device = session->device;
  2005. mutex_lock(&device->lock);
  2006. if (!__is_session_valid(device, session, __func__)) {
  2007. rc = -ECONNRESET;
  2008. goto err_create_pkt;
  2009. }
  2010. rc = call_hfi_pkt_op(device, session_set_buffers,
  2011. &pkt, session, iova, size);
  2012. if (rc) {
  2013. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2014. goto err_create_pkt;
  2015. }
  2016. if (__iface_cmdq_write(session->device, &pkt))
  2017. rc = -ENOTEMPTY;
  2018. err_create_pkt:
  2019. mutex_unlock(&device->lock);
  2020. return rc;
  2021. }
  2022. static int iris_hfi_session_release_buffers(void *sess)
  2023. {
  2024. struct cvp_session_release_buffers_packet pkt;
  2025. int rc = 0;
  2026. struct cvp_hal_session *session = sess;
  2027. struct iris_hfi_device *device;
  2028. if (!session || !session->device) {
  2029. dprintk(CVP_ERR, "Invalid Params\n");
  2030. return -EINVAL;
  2031. }
  2032. device = session->device;
  2033. mutex_lock(&device->lock);
  2034. if (!__is_session_valid(device, session, __func__)) {
  2035. rc = -ECONNRESET;
  2036. goto err_create_pkt;
  2037. }
  2038. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2039. if (rc) {
  2040. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2041. goto err_create_pkt;
  2042. }
  2043. if (__iface_cmdq_write(session->device, &pkt))
  2044. rc = -ENOTEMPTY;
  2045. err_create_pkt:
  2046. mutex_unlock(&device->lock);
  2047. return rc;
  2048. }
  2049. static int iris_hfi_session_send(void *sess,
  2050. struct cvp_kmd_hfi_packet *in_pkt)
  2051. {
  2052. int rc = 0;
  2053. struct cvp_kmd_hfi_packet pkt;
  2054. struct cvp_hal_session *session = sess;
  2055. struct iris_hfi_device *device;
  2056. if (!session || !session->device) {
  2057. dprintk(CVP_ERR, "invalid session");
  2058. return -ENODEV;
  2059. }
  2060. device = session->device;
  2061. mutex_lock(&device->lock);
  2062. if (!__is_session_valid(device, session, __func__)) {
  2063. rc = -ECONNRESET;
  2064. goto err_send_pkt;
  2065. }
  2066. rc = call_hfi_pkt_op(device, session_send,
  2067. &pkt, session, in_pkt);
  2068. if (rc) {
  2069. dprintk(CVP_ERR,
  2070. "failed to create pkt\n");
  2071. goto err_send_pkt;
  2072. }
  2073. if (__iface_cmdq_write(session->device, &pkt))
  2074. rc = -ENOTEMPTY;
  2075. err_send_pkt:
  2076. mutex_unlock(&device->lock);
  2077. return rc;
  2078. return rc;
  2079. }
  2080. static int iris_hfi_session_flush(void *sess)
  2081. {
  2082. struct cvp_hal_session *session = sess;
  2083. struct iris_hfi_device *device;
  2084. int rc = 0;
  2085. if (!session || !session->device) {
  2086. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2087. return -EINVAL;
  2088. }
  2089. device = session->device;
  2090. mutex_lock(&device->lock);
  2091. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2092. mutex_unlock(&device->lock);
  2093. return rc;
  2094. }
  2095. static int __check_core_registered(struct iris_hfi_device *device,
  2096. phys_addr_t fw_addr, u8 *reg_addr, u32 reg_size,
  2097. phys_addr_t irq)
  2098. {
  2099. struct cvp_hal_data *cvp_hal_data;
  2100. if (!device) {
  2101. dprintk(CVP_INFO, "no device Registered\n");
  2102. return -EINVAL;
  2103. }
  2104. cvp_hal_data = device->cvp_hal_data;
  2105. if (!cvp_hal_data)
  2106. return -EINVAL;
  2107. if (cvp_hal_data->irq == irq &&
  2108. (CONTAINS(cvp_hal_data->firmware_base,
  2109. FIRMWARE_SIZE, fw_addr) ||
  2110. CONTAINS(fw_addr, FIRMWARE_SIZE,
  2111. cvp_hal_data->firmware_base) ||
  2112. CONTAINS(cvp_hal_data->register_base,
  2113. reg_size, reg_addr) ||
  2114. CONTAINS(reg_addr, reg_size,
  2115. cvp_hal_data->register_base) ||
  2116. OVERLAPS(cvp_hal_data->register_base,
  2117. reg_size, reg_addr, reg_size) ||
  2118. OVERLAPS(reg_addr, reg_size,
  2119. cvp_hal_data->register_base,
  2120. reg_size) ||
  2121. OVERLAPS(cvp_hal_data->firmware_base,
  2122. FIRMWARE_SIZE, fw_addr,
  2123. FIRMWARE_SIZE) ||
  2124. OVERLAPS(fw_addr, FIRMWARE_SIZE,
  2125. cvp_hal_data->firmware_base,
  2126. FIRMWARE_SIZE))) {
  2127. return 0;
  2128. }
  2129. dprintk(CVP_INFO, "Device not registered\n");
  2130. return -EINVAL;
  2131. }
  2132. static void __process_fatal_error(
  2133. struct iris_hfi_device *device)
  2134. {
  2135. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2136. cmd_done.device_id = device->device_id;
  2137. device->callback(HAL_SYS_ERROR, &cmd_done);
  2138. }
  2139. static int __prepare_pc(struct iris_hfi_device *device)
  2140. {
  2141. int rc = 0;
  2142. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2143. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2144. if (rc) {
  2145. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2146. goto err_pc_prep;
  2147. }
  2148. if (__iface_cmdq_write(device, &pkt))
  2149. rc = -ENOTEMPTY;
  2150. if (rc)
  2151. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2152. err_pc_prep:
  2153. return rc;
  2154. }
  2155. static void iris_hfi_pm_handler(struct work_struct *work)
  2156. {
  2157. int rc = 0;
  2158. struct msm_cvp_core *core;
  2159. struct iris_hfi_device *device;
  2160. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2161. if (core)
  2162. device = core->device->hfi_device_data;
  2163. else
  2164. return;
  2165. if (!device) {
  2166. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2167. return;
  2168. }
  2169. dprintk(CVP_PWR,
  2170. "Entering %s\n", __func__);
  2171. /*
  2172. * It is ok to check this variable outside the lock since
  2173. * it is being updated in this context only
  2174. */
  2175. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2176. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2177. device->skip_pc_count);
  2178. device->skip_pc_count = 0;
  2179. __process_fatal_error(device);
  2180. return;
  2181. }
  2182. mutex_lock(&device->lock);
  2183. if (gfa_cv.state == DSP_SUSPEND)
  2184. rc = __power_collapse(device, true);
  2185. else
  2186. rc = __power_collapse(device, false);
  2187. mutex_unlock(&device->lock);
  2188. switch (rc) {
  2189. case 0:
  2190. device->skip_pc_count = 0;
  2191. /* Cancel pending delayed works if any */
  2192. cancel_delayed_work(&iris_hfi_pm_work);
  2193. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2194. __func__);
  2195. break;
  2196. case -EBUSY:
  2197. device->skip_pc_count = 0;
  2198. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2199. queue_delayed_work(device->iris_pm_workq,
  2200. &iris_hfi_pm_work, msecs_to_jiffies(
  2201. device->res->msm_cvp_pwr_collapse_delay));
  2202. break;
  2203. case -EAGAIN:
  2204. device->skip_pc_count++;
  2205. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2206. __func__, device->skip_pc_count);
  2207. queue_delayed_work(device->iris_pm_workq,
  2208. &iris_hfi_pm_work, msecs_to_jiffies(
  2209. device->res->msm_cvp_pwr_collapse_delay));
  2210. break;
  2211. default:
  2212. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2213. break;
  2214. }
  2215. }
  2216. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2217. {
  2218. int rc = 0;
  2219. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2220. u32 flags = 0;
  2221. int count = 0;
  2222. const int max_tries = 150;
  2223. if (!device) {
  2224. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2225. return -EINVAL;
  2226. }
  2227. if (!device->power_enabled) {
  2228. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2229. __func__);
  2230. goto exit;
  2231. }
  2232. rc = __core_in_valid_state(device);
  2233. if (!rc) {
  2234. dprintk(CVP_WARN,
  2235. "Core is in bad state, Skipping power collapse\n");
  2236. return -EINVAL;
  2237. }
  2238. rc = __dsp_suspend(device, force, flags);
  2239. if (rc == -EBUSY)
  2240. goto exit;
  2241. else if (rc)
  2242. goto skip_power_off;
  2243. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2244. CVP_CTRL_STATUS_PC_READY;
  2245. if (!pc_ready) {
  2246. wfi_status = __read_register(device,
  2247. CVP_WRAPPER_CPU_STATUS);
  2248. idle_status = __read_register(device,
  2249. CVP_CTRL_STATUS);
  2250. if (!(wfi_status & BIT(0))) {
  2251. dprintk(CVP_WARN,
  2252. "Skipping PC as wfi_status (%#x) bit not set\n",
  2253. wfi_status);
  2254. goto skip_power_off;
  2255. }
  2256. if (!(idle_status & BIT(30))) {
  2257. dprintk(CVP_WARN,
  2258. "Skipping PC as idle_status (%#x) bit not set\n",
  2259. idle_status);
  2260. goto skip_power_off;
  2261. }
  2262. rc = __prepare_pc(device);
  2263. if (rc) {
  2264. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2265. goto skip_power_off;
  2266. }
  2267. while (count < max_tries) {
  2268. wfi_status = __read_register(device,
  2269. CVP_WRAPPER_CPU_STATUS);
  2270. pc_ready = __read_register(device,
  2271. CVP_CTRL_STATUS);
  2272. if ((wfi_status & BIT(0)) && (pc_ready &
  2273. CVP_CTRL_STATUS_PC_READY))
  2274. break;
  2275. usleep_range(150, 250);
  2276. count++;
  2277. }
  2278. if (count == max_tries) {
  2279. dprintk(CVP_ERR,
  2280. "Skip PC. Core is not in right state (%#x, %#x)\n",
  2281. wfi_status, pc_ready);
  2282. goto skip_power_off;
  2283. }
  2284. }
  2285. __flush_debug_queue(device, device->raw_packet);
  2286. rc = __suspend(device);
  2287. if (rc)
  2288. dprintk(CVP_ERR, "Failed __suspend\n");
  2289. exit:
  2290. return rc;
  2291. skip_power_off:
  2292. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2293. wfi_status, idle_status, pc_ready);
  2294. __flush_debug_queue(device, device->raw_packet);
  2295. return -EAGAIN;
  2296. }
  2297. static void __process_sys_error(struct iris_hfi_device *device)
  2298. {
  2299. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2300. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2301. if (vsfr) {
  2302. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2303. /*
  2304. * SFR isn't guaranteed to be NULL terminated
  2305. * since SYS_ERROR indicates that Iris is in the
  2306. * process of crashing.
  2307. */
  2308. if (p == NULL)
  2309. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2310. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2311. vsfr->rg_data);
  2312. }
  2313. }
  2314. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2315. {
  2316. bool local_packet = false;
  2317. enum cvp_msg_prio log_level = CVP_FW;
  2318. if (!device) {
  2319. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2320. return;
  2321. }
  2322. if (!packet) {
  2323. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2324. if (!packet) {
  2325. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2326. __func__);
  2327. return;
  2328. }
  2329. local_packet = true;
  2330. /*
  2331. * Local packek is used when something FATAL occurred.
  2332. * It is good to print these logs by default.
  2333. */
  2334. log_level = CVP_ERR;
  2335. }
  2336. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2337. if (pkt_size < pkt_hdr_size || \
  2338. payload_size < MIN_PAYLOAD_SIZE || \
  2339. payload_size > \
  2340. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2341. dprintk(CVP_ERR, \
  2342. "%s: invalid msg size - %d\n", \
  2343. __func__, pkt->msg_size); \
  2344. continue; \
  2345. } \
  2346. })
  2347. while (!__iface_dbgq_read(device, packet)) {
  2348. struct cvp_hfi_packet_header *pkt =
  2349. (struct cvp_hfi_packet_header *) packet;
  2350. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2351. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2352. __func__);
  2353. continue;
  2354. }
  2355. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2356. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2357. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2358. SKIP_INVALID_PKT(pkt->size,
  2359. pkt->msg_size, sizeof(*pkt));
  2360. /*
  2361. * All fw messages starts with new line character. This
  2362. * causes dprintk to print this message in two lines
  2363. * in the kernel log. Ignoring the first character
  2364. * from the message fixes this to print it in a single
  2365. * line.
  2366. */
  2367. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2368. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2369. }
  2370. }
  2371. #undef SKIP_INVALID_PKT
  2372. if (local_packet)
  2373. kfree(packet);
  2374. }
  2375. static bool __is_session_valid(struct iris_hfi_device *device,
  2376. struct cvp_hal_session *session, const char *func)
  2377. {
  2378. struct cvp_hal_session *temp = NULL;
  2379. if (!device || !session)
  2380. goto invalid;
  2381. list_for_each_entry(temp, &device->sess_head, list)
  2382. if (session == temp)
  2383. return true;
  2384. invalid:
  2385. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2386. func, device, session);
  2387. return false;
  2388. }
  2389. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2390. u32 session_id)
  2391. {
  2392. struct cvp_hal_session *temp = NULL;
  2393. list_for_each_entry(temp, &device->sess_head, list) {
  2394. if (session_id == hash32_ptr(temp))
  2395. return temp;
  2396. }
  2397. return NULL;
  2398. }
  2399. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2400. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2401. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2402. static void process_system_msg(struct msm_cvp_cb_info *info,
  2403. struct iris_hfi_device *device,
  2404. void *raw_packet)
  2405. {
  2406. struct cvp_hal_sys_init_done sys_init_done = {0};
  2407. switch (info->response_type) {
  2408. case HAL_SYS_ERROR:
  2409. __process_sys_error(device);
  2410. break;
  2411. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2412. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2413. break;
  2414. case HAL_SYS_INIT_DONE:
  2415. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2416. sys_init_done.capabilities =
  2417. device->sys_init_capabilities;
  2418. cvp_hfi_process_sys_init_done_prop_read(
  2419. (struct cvp_hfi_msg_sys_init_done_packet *)
  2420. raw_packet, &sys_init_done);
  2421. info->response.cmd.data.sys_init_done = sys_init_done;
  2422. break;
  2423. default:
  2424. break;
  2425. }
  2426. }
  2427. static void **get_session_id(struct msm_cvp_cb_info *info)
  2428. {
  2429. void **session_id = NULL;
  2430. /* For session-related packets, validate session */
  2431. switch (info->response_type) {
  2432. case HAL_SESSION_INIT_DONE:
  2433. case HAL_SESSION_END_DONE:
  2434. case HAL_SESSION_ABORT_DONE:
  2435. case HAL_SESSION_STOP_DONE:
  2436. case HAL_SESSION_FLUSH_DONE:
  2437. case HAL_SESSION_SET_BUFFER_DONE:
  2438. case HAL_SESSION_SUSPEND_DONE:
  2439. case HAL_SESSION_RESUME_DONE:
  2440. case HAL_SESSION_SET_PROP_DONE:
  2441. case HAL_SESSION_GET_PROP_DONE:
  2442. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2443. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2444. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2445. case HAL_SESSION_DFS_CONFIG_CMD_DONE:
  2446. case HAL_SESSION_DME_CONFIG_CMD_DONE:
  2447. case HAL_SESSION_TME_CONFIG_CMD_DONE:
  2448. case HAL_SESSION_ODT_CONFIG_CMD_DONE:
  2449. case HAL_SESSION_OD_CONFIG_CMD_DONE:
  2450. case HAL_SESSION_NCC_CONFIG_CMD_DONE:
  2451. case HAL_SESSION_ICA_CONFIG_CMD_DONE:
  2452. case HAL_SESSION_HCD_CONFIG_CMD_DONE:
  2453. case HAL_SESSION_DCM_CONFIG_CMD_DONE:
  2454. case HAL_SESSION_DC_CONFIG_CMD_DONE:
  2455. case HAL_SESSION_PYS_HCD_CONFIG_CMD_DONE:
  2456. case HAL_SESSION_DME_BASIC_CONFIG_CMD_DONE:
  2457. case HAL_SESSION_DFS_FRAME_CMD_DONE:
  2458. case HAL_SESSION_DME_FRAME_CMD_DONE:
  2459. case HAL_SESSION_ICA_FRAME_CMD_DONE:
  2460. case HAL_SESSION_FD_FRAME_CMD_DONE:
  2461. case HAL_SESSION_PERSIST_SET_DONE:
  2462. case HAL_SESSION_PERSIST_REL_DONE:
  2463. case HAL_SESSION_FD_CONFIG_CMD_DONE:
  2464. case HAL_SESSION_MODEL_BUF_CMD_DONE:
  2465. case HAL_SESSION_PROPERTY_INFO:
  2466. case HAL_SESSION_EVENT_CHANGE:
  2467. session_id = &info->response.cmd.session_id;
  2468. break;
  2469. case HAL_SESSION_ERROR:
  2470. session_id = &info->response.data.session_id;
  2471. break;
  2472. case HAL_RESPONSE_UNUSED:
  2473. default:
  2474. session_id = NULL;
  2475. break;
  2476. }
  2477. return session_id;
  2478. }
  2479. static void print_msg_hdr(void *hdr)
  2480. {
  2481. struct cvp_hfi_msg_session_hdr *new_hdr =
  2482. (struct cvp_hfi_msg_session_hdr *)hdr;
  2483. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x\n",
  2484. new_hdr->size, new_hdr->packet_type,
  2485. new_hdr->session_id,
  2486. new_hdr->client_data.transaction_id,
  2487. new_hdr->client_data.data1,
  2488. new_hdr->client_data.data2,
  2489. new_hdr->error_type);
  2490. }
  2491. static int __response_handler(struct iris_hfi_device *device)
  2492. {
  2493. struct msm_cvp_cb_info *packets;
  2494. int packet_count = 0;
  2495. u8 *raw_packet = NULL;
  2496. bool requeue_pm_work = true;
  2497. if (!device || device->state != IRIS_STATE_INIT)
  2498. return 0;
  2499. packets = device->response_pkt;
  2500. raw_packet = device->raw_packet;
  2501. if (!raw_packet || !packets) {
  2502. dprintk(CVP_ERR,
  2503. "%s: Invalid args : Res packet = %p, Raw packet = %p\n",
  2504. __func__, packets, raw_packet);
  2505. return 0;
  2506. }
  2507. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2508. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2509. device->sfr.align_virtual_addr;
  2510. struct msm_cvp_cb_info info = {
  2511. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2512. .response.cmd = {
  2513. .device_id = device->device_id,
  2514. }
  2515. };
  2516. if (vsfr)
  2517. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2518. vsfr->rg_data);
  2519. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2520. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2521. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2522. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2523. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2524. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2525. packets[packet_count++] = info;
  2526. goto exit;
  2527. }
  2528. /* Bleed the msg queue dry of packets */
  2529. while (!__iface_msgq_read(device, raw_packet)) {
  2530. void **session_id = NULL;
  2531. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2532. struct cvp_hfi_msg_session_hdr *hdr =
  2533. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2534. int rc = 0;
  2535. print_msg_hdr(hdr);
  2536. rc = cvp_hfi_process_msg_packet(device->device_id,
  2537. raw_packet, info);
  2538. if (rc) {
  2539. dprintk(CVP_WARN,
  2540. "Corrupt/unknown packet found, discarding\n");
  2541. --packet_count;
  2542. continue;
  2543. } else if (info->response_type == HAL_NO_RESP) {
  2544. --packet_count;
  2545. continue;
  2546. }
  2547. /* Process the packet types that we're interested in */
  2548. process_system_msg(info, device, raw_packet);
  2549. session_id = get_session_id(info);
  2550. /*
  2551. * hfi_process_msg_packet provides a session_id that's a hashed
  2552. * value of struct cvp_hal_session, we need to coerce the hashed
  2553. * value back to pointer that we can use. Ideally, hfi_process\
  2554. * _msg_packet should take care of this, but it doesn't have
  2555. * required information for it
  2556. */
  2557. if (session_id) {
  2558. struct cvp_hal_session *session = NULL;
  2559. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2560. dprintk(CVP_ERR,
  2561. "Upper 32-bits != 0 for sess_id=%pK\n",
  2562. *session_id);
  2563. }
  2564. session = __get_session(device,
  2565. (u32)(uintptr_t)*session_id);
  2566. if (!session) {
  2567. dprintk(CVP_ERR, _INVALID_MSG_,
  2568. info->response_type,
  2569. *session_id);
  2570. --packet_count;
  2571. continue;
  2572. }
  2573. *session_id = session->session_id;
  2574. }
  2575. if (packet_count >= cvp_max_packets) {
  2576. dprintk(CVP_WARN,
  2577. "Too many packets in message queue!\n");
  2578. break;
  2579. }
  2580. /* do not read packets after sys error packet */
  2581. if (info->response_type == HAL_SYS_ERROR)
  2582. break;
  2583. }
  2584. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2585. cancel_delayed_work(&iris_hfi_pm_work);
  2586. if (!queue_delayed_work(device->iris_pm_workq,
  2587. &iris_hfi_pm_work,
  2588. msecs_to_jiffies(
  2589. device->res->msm_cvp_pwr_collapse_delay))) {
  2590. dprintk(CVP_ERR, "PM work already scheduled\n");
  2591. }
  2592. }
  2593. exit:
  2594. __flush_debug_queue(device, raw_packet);
  2595. return packet_count;
  2596. }
  2597. static void iris_hfi_core_work_handler(struct work_struct *work)
  2598. {
  2599. struct msm_cvp_core *core;
  2600. struct iris_hfi_device *device;
  2601. int num_responses = 0, i = 0;
  2602. u32 intr_status;
  2603. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2604. if (core)
  2605. device = core->device->hfi_device_data;
  2606. else
  2607. return;
  2608. mutex_lock(&device->lock);
  2609. if (!__core_in_valid_state(device)) {
  2610. dprintk(CVP_WARN, "%s - Core not in init state\n", __func__);
  2611. goto err_no_work;
  2612. }
  2613. if (!device->callback) {
  2614. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2615. device);
  2616. goto err_no_work;
  2617. }
  2618. if (__resume(device)) {
  2619. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2620. goto err_no_work;
  2621. }
  2622. __core_clear_interrupt(device);
  2623. num_responses = __response_handler(device);
  2624. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2625. __func__, num_responses);
  2626. err_no_work:
  2627. /* Keep the interrupt status before releasing device lock */
  2628. intr_status = device->intr_status;
  2629. mutex_unlock(&device->lock);
  2630. /*
  2631. * Issue the callbacks outside of the locked contex to preserve
  2632. * re-entrancy.
  2633. */
  2634. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2635. i < num_responses; ++i) {
  2636. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2637. void *rsp = (void *)&r->response;
  2638. if (!__core_in_valid_state(device)) {
  2639. dprintk(CVP_ERR,
  2640. _INVALID_STATE_, (i + 1), num_responses);
  2641. break;
  2642. }
  2643. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2644. (i + 1), num_responses, r->response_type);
  2645. device->callback(r->response_type, rsp);
  2646. }
  2647. /* We need re-enable the irq which was disabled in ISR handler */
  2648. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2649. enable_irq(device->cvp_hal_data->irq);
  2650. /*
  2651. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2652. * it above doesn't guarantee the atomicity that we're aiming for.
  2653. */
  2654. }
  2655. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2656. static irqreturn_t iris_hfi_isr(int irq, void *dev)
  2657. {
  2658. struct iris_hfi_device *device = dev;
  2659. disable_irq_nosync(irq);
  2660. queue_work(device->cvp_workq, &iris_hfi_work);
  2661. return IRQ_HANDLED;
  2662. }
  2663. static int __init_regs_and_interrupts(struct iris_hfi_device *device,
  2664. struct msm_cvp_platform_resources *res)
  2665. {
  2666. struct cvp_hal_data *hal = NULL;
  2667. int rc = 0;
  2668. rc = __check_core_registered(device, res->firmware_base,
  2669. (u8 *)(uintptr_t)res->register_base,
  2670. res->register_size, res->irq);
  2671. if (!rc) {
  2672. dprintk(CVP_ERR, "Core present/Already added\n");
  2673. rc = -EEXIST;
  2674. goto err_core_init;
  2675. }
  2676. hal = kzalloc(sizeof(*hal), GFP_KERNEL);
  2677. if (!hal) {
  2678. dprintk(CVP_ERR, "Failed to alloc\n");
  2679. rc = -ENOMEM;
  2680. goto err_core_init;
  2681. }
  2682. hal->irq = res->irq;
  2683. hal->firmware_base = res->firmware_base;
  2684. hal->register_base = devm_ioremap_nocache(&res->pdev->dev,
  2685. res->register_base, res->register_size);
  2686. hal->register_size = res->register_size;
  2687. if (!hal->register_base) {
  2688. dprintk(CVP_ERR,
  2689. "could not map reg addr %pa of size %d\n",
  2690. &res->register_base, res->register_size);
  2691. goto error_irq_fail;
  2692. }
  2693. device->cvp_hal_data = hal;
  2694. rc = request_irq(res->irq, iris_hfi_isr, IRQF_TRIGGER_HIGH,
  2695. "msm_cvp", device);
  2696. if (unlikely(rc)) {
  2697. dprintk(CVP_ERR, "() :request_irq failed\n");
  2698. goto error_irq_fail;
  2699. }
  2700. disable_irq_nosync(res->irq);
  2701. dprintk(CVP_INFO,
  2702. "firmware_base = %pa, register_base = %pa, register_size = %d\n",
  2703. &res->firmware_base, &res->register_base,
  2704. res->register_size);
  2705. return rc;
  2706. error_irq_fail:
  2707. kfree(hal);
  2708. err_core_init:
  2709. return rc;
  2710. }
  2711. static inline void __deinit_clocks(struct iris_hfi_device *device)
  2712. {
  2713. struct clock_info *cl;
  2714. device->clk_freq = 0;
  2715. iris_hfi_for_each_clock_reverse(device, cl) {
  2716. if (cl->clk) {
  2717. clk_put(cl->clk);
  2718. cl->clk = NULL;
  2719. }
  2720. }
  2721. }
  2722. static inline int __init_clocks(struct iris_hfi_device *device)
  2723. {
  2724. int rc = 0;
  2725. struct clock_info *cl = NULL;
  2726. if (!device) {
  2727. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2728. return -EINVAL;
  2729. }
  2730. iris_hfi_for_each_clock(device, cl) {
  2731. dprintk(CVP_PWR, "%s: scalable? %d, count %d\n",
  2732. cl->name, cl->has_scaling, cl->count);
  2733. }
  2734. iris_hfi_for_each_clock(device, cl) {
  2735. if (!cl->clk) {
  2736. cl->clk = clk_get(&device->res->pdev->dev, cl->name);
  2737. if (IS_ERR_OR_NULL(cl->clk)) {
  2738. dprintk(CVP_ERR,
  2739. "Failed to get clock: %s\n", cl->name);
  2740. rc = PTR_ERR(cl->clk) ?: -EINVAL;
  2741. cl->clk = NULL;
  2742. goto err_clk_get;
  2743. }
  2744. }
  2745. }
  2746. device->clk_freq = 0;
  2747. return 0;
  2748. err_clk_get:
  2749. __deinit_clocks(device);
  2750. return rc;
  2751. }
  2752. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2753. int reset_index, enum reset_state state,
  2754. enum power_state pwr_state)
  2755. {
  2756. int rc = 0;
  2757. struct reset_control *rst;
  2758. struct reset_info rst_info;
  2759. struct reset_set *rst_set = &res->reset_set;
  2760. if (!rst_set->reset_tbl)
  2761. return 0;
  2762. rst_info = rst_set->reset_tbl[reset_index];
  2763. rst = rst_info.rst;
  2764. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2765. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2766. switch (state) {
  2767. case INIT:
  2768. if (rst)
  2769. goto skip_reset_init;
  2770. rst = devm_reset_control_get(&res->pdev->dev,
  2771. rst_set->reset_tbl[reset_index].name);
  2772. if (IS_ERR(rst))
  2773. rc = PTR_ERR(rst);
  2774. rst_set->reset_tbl[reset_index].rst = rst;
  2775. break;
  2776. case ASSERT:
  2777. if (!rst) {
  2778. rc = PTR_ERR(rst);
  2779. goto failed_to_reset;
  2780. }
  2781. if (pwr_state != rst_info.required_state)
  2782. break;
  2783. rc = reset_control_assert(rst);
  2784. break;
  2785. case DEASSERT:
  2786. if (!rst) {
  2787. rc = PTR_ERR(rst);
  2788. goto failed_to_reset;
  2789. }
  2790. if (pwr_state != rst_info.required_state)
  2791. break;
  2792. rc = reset_control_deassert(rst);
  2793. break;
  2794. default:
  2795. dprintk(CVP_ERR, "Invalid reset request\n");
  2796. if (rc)
  2797. goto failed_to_reset;
  2798. }
  2799. return 0;
  2800. skip_reset_init:
  2801. failed_to_reset:
  2802. return rc;
  2803. }
  2804. static inline void __disable_unprepare_clks(struct iris_hfi_device *device)
  2805. {
  2806. struct clock_info *cl;
  2807. if (!device) {
  2808. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2809. return;
  2810. }
  2811. iris_hfi_for_each_clock_reverse(device, cl) {
  2812. dprintk(CVP_PWR, "Clock: %s disable and unprepare\n",
  2813. cl->name);
  2814. clk_disable_unprepare(cl->clk);
  2815. }
  2816. }
  2817. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2818. {
  2819. int rc, i;
  2820. enum power_state s;
  2821. if (!device) {
  2822. dprintk(CVP_ERR, "NULL device\n");
  2823. rc = -EINVAL;
  2824. goto failed_to_reset;
  2825. }
  2826. if (device->power_enabled)
  2827. s = CVP_POWER_ON;
  2828. else
  2829. s = CVP_POWER_OFF;
  2830. for (i = 0; i < device->res->reset_set.count; i++) {
  2831. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2832. if (rc) {
  2833. dprintk(CVP_ERR,
  2834. "failed to assert reset clocks\n");
  2835. goto failed_to_reset;
  2836. }
  2837. /* wait for deassert */
  2838. usleep_range(1000, 1050);
  2839. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2840. if (rc) {
  2841. dprintk(CVP_ERR,
  2842. "failed to deassert reset clocks\n");
  2843. goto failed_to_reset;
  2844. }
  2845. }
  2846. return 0;
  2847. failed_to_reset:
  2848. return rc;
  2849. }
  2850. static inline int __prepare_enable_clks(struct iris_hfi_device *device)
  2851. {
  2852. struct clock_info *cl = NULL, *cl_fail = NULL;
  2853. int rc = 0, c = 0;
  2854. if (!device) {
  2855. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  2856. return -EINVAL;
  2857. }
  2858. iris_hfi_for_each_clock(device, cl) {
  2859. /*
  2860. * For the clocks we control, set the rate prior to preparing
  2861. * them. Since we don't really have a load at this point, scale
  2862. * it to the lowest frequency possible
  2863. */
  2864. if (cl->has_scaling)
  2865. clk_set_rate(cl->clk, clk_round_rate(cl->clk, 0));
  2866. rc = clk_prepare_enable(cl->clk);
  2867. if (rc) {
  2868. dprintk(CVP_ERR, "Failed to enable clocks\n");
  2869. cl_fail = cl;
  2870. goto fail_clk_enable;
  2871. }
  2872. c++;
  2873. dprintk(CVP_PWR, "Clock: %s prepared and enabled\n", cl->name);
  2874. }
  2875. return rc;
  2876. fail_clk_enable:
  2877. iris_hfi_for_each_clock_reverse_continue(device, cl, c) {
  2878. dprintk(CVP_ERR, "Clock: %s disable and unprepare\n",
  2879. cl->name);
  2880. clk_disable_unprepare(cl->clk);
  2881. }
  2882. return rc;
  2883. }
  2884. static void __deinit_bus(struct iris_hfi_device *device)
  2885. {
  2886. struct bus_info *bus = NULL;
  2887. if (!device)
  2888. return;
  2889. kfree(device->bus_vote.data);
  2890. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2891. iris_hfi_for_each_bus_reverse(device, bus) {
  2892. dev_set_drvdata(bus->dev, NULL);
  2893. icc_put(bus->client);
  2894. bus->client = NULL;
  2895. }
  2896. }
  2897. static int __init_bus(struct iris_hfi_device *device)
  2898. {
  2899. struct bus_info *bus = NULL;
  2900. int rc = 0;
  2901. if (!device)
  2902. return -EINVAL;
  2903. iris_hfi_for_each_bus(device, bus) {
  2904. /*
  2905. * This is stupid, but there's no other easy way to ahold
  2906. * of struct bus_info in iris_hfi_devfreq_*()
  2907. */
  2908. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2909. dev_name(bus->dev));
  2910. dev_set_drvdata(bus->dev, device);
  2911. bus->client = icc_get(&device->res->pdev->dev,
  2912. bus->master, bus->slave);
  2913. if (IS_ERR_OR_NULL(bus->client)) {
  2914. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2915. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2916. bus->name, rc);
  2917. bus->client = NULL;
  2918. goto err_add_dev;
  2919. }
  2920. }
  2921. return 0;
  2922. err_add_dev:
  2923. __deinit_bus(device);
  2924. return rc;
  2925. }
  2926. static void __deinit_regulators(struct iris_hfi_device *device)
  2927. {
  2928. struct regulator_info *rinfo = NULL;
  2929. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2930. if (rinfo->regulator) {
  2931. regulator_put(rinfo->regulator);
  2932. rinfo->regulator = NULL;
  2933. }
  2934. }
  2935. }
  2936. static int __init_regulators(struct iris_hfi_device *device)
  2937. {
  2938. int rc = 0;
  2939. struct regulator_info *rinfo = NULL;
  2940. iris_hfi_for_each_regulator(device, rinfo) {
  2941. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2942. rinfo->name);
  2943. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2944. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2945. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2946. rinfo->name);
  2947. rinfo->regulator = NULL;
  2948. goto err_reg_get;
  2949. }
  2950. }
  2951. return 0;
  2952. err_reg_get:
  2953. __deinit_regulators(device);
  2954. return rc;
  2955. }
  2956. static void __deinit_subcaches(struct iris_hfi_device *device)
  2957. {
  2958. struct subcache_info *sinfo = NULL;
  2959. if (!device) {
  2960. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2961. device);
  2962. goto exit;
  2963. }
  2964. if (!is_sys_cache_present(device))
  2965. goto exit;
  2966. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2967. if (sinfo->subcache) {
  2968. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2969. sinfo->name);
  2970. llcc_slice_putd(sinfo->subcache);
  2971. sinfo->subcache = NULL;
  2972. }
  2973. }
  2974. exit:
  2975. return;
  2976. }
  2977. static int __init_subcaches(struct iris_hfi_device *device)
  2978. {
  2979. int rc = 0;
  2980. struct subcache_info *sinfo = NULL;
  2981. if (!device) {
  2982. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2983. device);
  2984. return -EINVAL;
  2985. }
  2986. if (!is_sys_cache_present(device))
  2987. return 0;
  2988. iris_hfi_for_each_subcache(device, sinfo) {
  2989. if (!strcmp("cvp", sinfo->name)) {
  2990. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2991. } else if (!strcmp("cvpfw", sinfo->name)) {
  2992. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2993. } else {
  2994. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2995. sinfo->name);
  2996. }
  2997. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2998. rc = PTR_ERR(sinfo->subcache) ?
  2999. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  3000. dprintk(CVP_ERR,
  3001. "init_subcaches: invalid subcache: %s rc %d\n",
  3002. sinfo->name, rc);
  3003. sinfo->subcache = NULL;
  3004. goto err_subcache_get;
  3005. }
  3006. dprintk(CVP_CORE, "init_subcaches: %s\n",
  3007. sinfo->name);
  3008. }
  3009. return 0;
  3010. err_subcache_get:
  3011. __deinit_subcaches(device);
  3012. return rc;
  3013. }
  3014. static int __init_resources(struct iris_hfi_device *device,
  3015. struct msm_cvp_platform_resources *res)
  3016. {
  3017. int i, rc = 0;
  3018. rc = __init_regulators(device);
  3019. if (rc) {
  3020. dprintk(CVP_ERR, "Failed to get all regulators\n");
  3021. return -ENODEV;
  3022. }
  3023. rc = __init_clocks(device);
  3024. if (rc) {
  3025. dprintk(CVP_ERR, "Failed to init clocks\n");
  3026. rc = -ENODEV;
  3027. goto err_init_clocks;
  3028. }
  3029. for (i = 0; i < device->res->reset_set.count; i++) {
  3030. rc = __handle_reset_clk(res, i, INIT, 0);
  3031. if (rc) {
  3032. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  3033. rc = -ENODEV;
  3034. goto err_init_reset_clk;
  3035. }
  3036. }
  3037. rc = __init_bus(device);
  3038. if (rc) {
  3039. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  3040. goto err_init_bus;
  3041. }
  3042. rc = __init_subcaches(device);
  3043. if (rc)
  3044. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  3045. device->sys_init_capabilities =
  3046. kzalloc(sizeof(struct msm_cvp_capability)
  3047. * CVP_MAX_SESSIONS, GFP_KERNEL);
  3048. return rc;
  3049. err_init_reset_clk:
  3050. err_init_bus:
  3051. __deinit_clocks(device);
  3052. err_init_clocks:
  3053. __deinit_regulators(device);
  3054. return rc;
  3055. }
  3056. static void __deinit_resources(struct iris_hfi_device *device)
  3057. {
  3058. __deinit_subcaches(device);
  3059. __deinit_bus(device);
  3060. __deinit_clocks(device);
  3061. __deinit_regulators(device);
  3062. kfree(device->sys_init_capabilities);
  3063. device->sys_init_capabilities = NULL;
  3064. }
  3065. static int __disable_regulator(struct regulator_info *rinfo,
  3066. struct iris_hfi_device *device)
  3067. {
  3068. int rc = 0;
  3069. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  3070. /*
  3071. * This call is needed. Driver needs to acquire the control back
  3072. * from HW in order to disable the regualtor. Else the behavior
  3073. * is unknown.
  3074. */
  3075. rc = __acquire_regulator(rinfo, device);
  3076. if (rc) {
  3077. /*
  3078. * This is somewhat fatal, but nothing we can do
  3079. * about it. We can't disable the regulator w/o
  3080. * getting it back under s/w control
  3081. */
  3082. dprintk(CVP_WARN,
  3083. "Failed to acquire control on %s\n",
  3084. rinfo->name);
  3085. goto disable_regulator_failed;
  3086. }
  3087. rc = regulator_disable(rinfo->regulator);
  3088. if (rc) {
  3089. dprintk(CVP_WARN,
  3090. "Failed to disable %s: %d\n",
  3091. rinfo->name, rc);
  3092. goto disable_regulator_failed;
  3093. }
  3094. return 0;
  3095. disable_regulator_failed:
  3096. /* Bring attention to this issue */
  3097. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3098. return rc;
  3099. }
  3100. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  3101. {
  3102. int rc = 0;
  3103. if (!msm_cvp_fw_low_power_mode) {
  3104. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  3105. return 0;
  3106. }
  3107. rc = __hand_off_regulators(device);
  3108. if (rc)
  3109. dprintk(CVP_WARN,
  3110. "%s : Failed to enable HW power collapse %d\n",
  3111. __func__, rc);
  3112. return rc;
  3113. }
  3114. static int __enable_regulators(struct iris_hfi_device *device)
  3115. {
  3116. int rc = 0, c = 0;
  3117. struct regulator_info *rinfo;
  3118. dprintk(CVP_PWR, "Enabling regulators\n");
  3119. iris_hfi_for_each_regulator(device, rinfo) {
  3120. rc = regulator_enable(rinfo->regulator);
  3121. if (rc) {
  3122. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3123. rinfo->name, rc);
  3124. goto err_reg_enable_failed;
  3125. }
  3126. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3127. c++;
  3128. }
  3129. return 0;
  3130. err_reg_enable_failed:
  3131. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  3132. __disable_regulator(rinfo, device);
  3133. return rc;
  3134. }
  3135. static int __disable_regulators(struct iris_hfi_device *device)
  3136. {
  3137. struct regulator_info *rinfo;
  3138. dprintk(CVP_PWR, "Disabling regulators\n");
  3139. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3140. __disable_regulator(rinfo, device);
  3141. if (rinfo->has_hw_power_collapse)
  3142. regulator_set_mode(rinfo->regulator,
  3143. REGULATOR_MODE_NORMAL);
  3144. }
  3145. return 0;
  3146. }
  3147. static int __enable_subcaches(struct iris_hfi_device *device)
  3148. {
  3149. int rc = 0;
  3150. u32 c = 0;
  3151. struct subcache_info *sinfo;
  3152. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3153. return 0;
  3154. /* Activate subcaches */
  3155. iris_hfi_for_each_subcache(device, sinfo) {
  3156. rc = llcc_slice_activate(sinfo->subcache);
  3157. if (rc) {
  3158. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3159. sinfo->name, rc);
  3160. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3161. goto err_activate_fail;
  3162. }
  3163. sinfo->isactive = true;
  3164. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3165. c++;
  3166. }
  3167. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3168. return 0;
  3169. err_activate_fail:
  3170. __release_subcaches(device);
  3171. __disable_subcaches(device);
  3172. return 0;
  3173. }
  3174. static int __set_subcaches(struct iris_hfi_device *device)
  3175. {
  3176. int rc = 0;
  3177. u32 c = 0;
  3178. struct subcache_info *sinfo;
  3179. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3180. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3181. struct cvp_hfi_resource_subcache_type *sc_res;
  3182. struct cvp_resource_hdr rhdr;
  3183. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3184. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3185. return 0;
  3186. }
  3187. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3188. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3189. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3190. iris_hfi_for_each_subcache(device, sinfo) {
  3191. if (sinfo->isactive) {
  3192. sc_res[c].size = sinfo->subcache->slice_size;
  3193. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3194. c++;
  3195. }
  3196. }
  3197. /* Set resource to CVP for activated subcaches */
  3198. if (c) {
  3199. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3200. rhdr.resource_handle = sc_res_info; /* cookie */
  3201. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3202. sc_res_info->num_entries = c;
  3203. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3204. if (rc) {
  3205. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3206. goto err_fail_set_subacaches;
  3207. }
  3208. iris_hfi_for_each_subcache(device, sinfo) {
  3209. if (sinfo->isactive)
  3210. sinfo->isset = true;
  3211. }
  3212. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3213. device->res->sys_cache_res_set = true;
  3214. }
  3215. return 0;
  3216. err_fail_set_subacaches:
  3217. __disable_subcaches(device);
  3218. return 0;
  3219. }
  3220. static int __release_subcaches(struct iris_hfi_device *device)
  3221. {
  3222. struct subcache_info *sinfo;
  3223. int rc = 0;
  3224. u32 c = 0;
  3225. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3226. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3227. struct cvp_hfi_resource_subcache_type *sc_res;
  3228. struct cvp_resource_hdr rhdr;
  3229. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3230. return 0;
  3231. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3232. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3233. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3234. /* Release resource command to Iris */
  3235. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3236. if (sinfo->isset) {
  3237. /* Update the entry */
  3238. sc_res[c].size = sinfo->subcache->slice_size;
  3239. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3240. c++;
  3241. sinfo->isset = false;
  3242. }
  3243. }
  3244. if (c > 0) {
  3245. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3246. rhdr.resource_handle = sc_res_info; /* cookie */
  3247. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3248. rc = __core_release_resource(device, &rhdr);
  3249. if (rc)
  3250. dprintk(CVP_WARN,
  3251. "Failed to release %d subcaches\n", c);
  3252. }
  3253. device->res->sys_cache_res_set = false;
  3254. return 0;
  3255. }
  3256. static int __disable_subcaches(struct iris_hfi_device *device)
  3257. {
  3258. struct subcache_info *sinfo;
  3259. int rc = 0;
  3260. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3261. return 0;
  3262. /* De-activate subcaches */
  3263. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3264. if (sinfo->isactive) {
  3265. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3266. sinfo->name);
  3267. rc = llcc_slice_deactivate(sinfo->subcache);
  3268. if (rc) {
  3269. dprintk(CVP_WARN,
  3270. "Failed to de-activate %s: %d\n",
  3271. sinfo->name, rc);
  3272. }
  3273. sinfo->isactive = false;
  3274. }
  3275. }
  3276. return 0;
  3277. }
  3278. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3279. {
  3280. u32 mask_val = 0;
  3281. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3282. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3283. /* Write 0 to unmask CPU and WD interrupts */
  3284. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3285. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3286. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3287. CVP_WRAPPER_INTR_MASK, mask_val);
  3288. }
  3289. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3290. {
  3291. /* initialize DSP QTBL & UCREGION with CPU queues */
  3292. __write_register(device, HFI_DSP_QTBL_ADDR,
  3293. (u32)device->dsp_iface_q_table.align_device_addr);
  3294. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3295. (u32)device->dsp_iface_q_table.align_device_addr);
  3296. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3297. device->dsp_iface_q_table.mem_data.size);
  3298. }
  3299. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3300. {
  3301. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3302. }
  3303. static int __set_ubwc_config(struct iris_hfi_device *device)
  3304. {
  3305. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3306. int rc = 0;
  3307. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3308. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3309. if (!device->res->ubwc_config)
  3310. return 0;
  3311. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3312. device->res->ubwc_config);
  3313. if (rc) {
  3314. dprintk(CVP_WARN,
  3315. "ubwc config setting to FW failed\n");
  3316. rc = -ENOTEMPTY;
  3317. goto fail_to_set_ubwc_config;
  3318. }
  3319. if (__iface_cmdq_write(device, pkt)) {
  3320. rc = -ENOTEMPTY;
  3321. goto fail_to_set_ubwc_config;
  3322. }
  3323. fail_to_set_ubwc_config:
  3324. return rc;
  3325. }
  3326. static int __iris_power_on(struct iris_hfi_device *device)
  3327. {
  3328. int rc = 0;
  3329. if (device->power_enabled)
  3330. return 0;
  3331. /* Vote for all hardware resources */
  3332. rc = __vote_buses(device, device->bus_vote.data,
  3333. device->bus_vote.data_count);
  3334. if (rc) {
  3335. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3336. goto fail_vote_buses;
  3337. }
  3338. rc = __enable_regulators(device);
  3339. if (rc) {
  3340. dprintk(CVP_ERR, "Failed to enable GDSC, err = %d\n", rc);
  3341. goto fail_enable_gdsc;
  3342. }
  3343. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3344. if (rc) {
  3345. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3346. goto fail_enable_clks;
  3347. }
  3348. rc = __prepare_enable_clks(device);
  3349. if (rc) {
  3350. dprintk(CVP_ERR, "Failed to enable clocks: %d\n", rc);
  3351. goto fail_enable_clks;
  3352. }
  3353. rc = __scale_clocks(device);
  3354. if (rc) {
  3355. dprintk(CVP_WARN,
  3356. "Failed to scale clocks, perf may regress\n");
  3357. rc = 0;
  3358. }
  3359. /*Do not access registers before this point!*/
  3360. device->power_enabled = true;
  3361. dprintk(CVP_PWR, "Done with scaling\n");
  3362. /*
  3363. * Re-program all of the registers that get reset as a result of
  3364. * regulator_disable() and _enable()
  3365. */
  3366. __set_registers(device);
  3367. dprintk(CVP_CORE, "Done with register set\n");
  3368. call_iris_op(device, interrupt_init, device);
  3369. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3370. device->intr_status = 0;
  3371. enable_irq(device->cvp_hal_data->irq);
  3372. return rc;
  3373. fail_enable_clks:
  3374. __disable_regulators(device);
  3375. fail_enable_gdsc:
  3376. __unvote_buses(device);
  3377. fail_vote_buses:
  3378. device->power_enabled = false;
  3379. return rc;
  3380. }
  3381. void power_off_common(struct iris_hfi_device *device)
  3382. {
  3383. if (!device->power_enabled)
  3384. return;
  3385. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3386. disable_irq_nosync(device->cvp_hal_data->irq);
  3387. device->intr_status = 0;
  3388. __disable_unprepare_clks(device);
  3389. if (__disable_regulators(device))
  3390. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3391. if (__unvote_buses(device))
  3392. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3393. device->power_enabled = false;
  3394. }
  3395. static inline int __suspend(struct iris_hfi_device *device)
  3396. {
  3397. int rc = 0;
  3398. if (!device) {
  3399. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3400. return -EINVAL;
  3401. } else if (!device->power_enabled) {
  3402. dprintk(CVP_PWR, "Power already disabled\n");
  3403. return 0;
  3404. }
  3405. dprintk(CVP_PWR, "Entering suspend\n");
  3406. if (device->res->pm_qos_latency_us &&
  3407. pm_qos_request_active(&device->qos))
  3408. pm_qos_remove_request(&device->qos);
  3409. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3410. if (rc) {
  3411. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3412. goto err_tzbsp_suspend;
  3413. }
  3414. __disable_subcaches(device);
  3415. call_iris_op(device, power_off, device);
  3416. dprintk(CVP_PWR, "Iris power off\n");
  3417. return rc;
  3418. err_tzbsp_suspend:
  3419. return rc;
  3420. }
  3421. static void power_off_iris2(struct iris_hfi_device *device)
  3422. {
  3423. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3424. u32 pc_ready, wfi_status, sbm_ln0_low;
  3425. u32 main_sbm_ln0_low, main_sbm_ln1_high;
  3426. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3427. return;
  3428. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3429. disable_irq_nosync(device->cvp_hal_data->irq);
  3430. device->intr_status = 0;
  3431. /* HPG 6.1.2 Step 1 */
  3432. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3433. /* HPG 6.1.2 Step 2, noc to low power */
  3434. __write_register(device, CVP_AON_WRAPPER_MVP_NOC_LPI_CONTROL, 0x1);
  3435. while (!reg_status && count < max_count) {
  3436. lpi_status =
  3437. __read_register(device,
  3438. CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
  3439. reg_status = lpi_status & BIT(0);
  3440. /* Wait for noc lpi status to be set */
  3441. usleep_range(50, 100);
  3442. count++;
  3443. }
  3444. dprintk(CVP_PWR,
  3445. "Noc: lpi_status %x noc_status %x (count %d)\n",
  3446. lpi_status, reg_status, count);
  3447. if (count == max_count) {
  3448. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3449. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3450. sbm_ln0_low =
  3451. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3452. main_sbm_ln0_low = __read_register(device,
  3453. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3454. main_sbm_ln1_high = __read_register(device,
  3455. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3456. dprintk(CVP_WARN,
  3457. "NOC not in qaccept status %x %x %x %x %x %x %x\n",
  3458. reg_status, lpi_status, wfi_status, pc_ready,
  3459. sbm_ln0_low, main_sbm_ln0_low, main_sbm_ln1_high);
  3460. }
  3461. /* HPG 6.1.2 Step 3, debug bridge to low power */
  3462. __write_register(device,
  3463. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3464. reg_status = 0;
  3465. count = 0;
  3466. while ((reg_status != 0x7) && count < max_count) {
  3467. lpi_status = __read_register(device,
  3468. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3469. reg_status = lpi_status & 0x7;
  3470. /* Wait for debug bridge lpi status to be set */
  3471. usleep_range(50, 100);
  3472. count++;
  3473. }
  3474. dprintk(CVP_PWR,
  3475. "DBLP Set : lpi_status %d reg_status %d (count %d)\n",
  3476. lpi_status, reg_status, count);
  3477. if (count == max_count) {
  3478. dprintk(CVP_WARN,
  3479. "DBLP Set: status %x %x\n", reg_status, lpi_status);
  3480. }
  3481. /* HPG 6.1.2 Step 4, debug bridge to lpi release */
  3482. __write_register(device,
  3483. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3484. lpi_status = 0x1;
  3485. count = 0;
  3486. while (lpi_status && count < max_count) {
  3487. lpi_status = __read_register(device,
  3488. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3489. usleep_range(50, 100);
  3490. count++;
  3491. }
  3492. dprintk(CVP_PWR,
  3493. "DBLP Release: lpi_status %d(count %d)\n",
  3494. lpi_status, count);
  3495. if (count == max_count) {
  3496. dprintk(CVP_WARN,
  3497. "DBLP Release: lpi_status %x\n", lpi_status);
  3498. }
  3499. /* HPG 6.1.2 Step 6 */
  3500. __disable_unprepare_clks(device);
  3501. /*
  3502. * HPG 6.1.2 Step 7 & 8
  3503. * per new HPG update, core clock reset will be unnecessary
  3504. */
  3505. if (__unvote_buses(device))
  3506. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3507. /* HPG 6.1.2 Step 5 */
  3508. if (__disable_regulators(device))
  3509. dprintk(CVP_WARN, "Failed to disable regulators\n");
  3510. /*Do not access registers after this point!*/
  3511. device->power_enabled = false;
  3512. }
  3513. static inline int __resume(struct iris_hfi_device *device)
  3514. {
  3515. int rc = 0;
  3516. u32 flags = 0, reg_gdsc, reg_cbcr;
  3517. if (!device) {
  3518. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3519. return -EINVAL;
  3520. } else if (device->power_enabled) {
  3521. goto exit;
  3522. } else if (!__core_in_valid_state(device)) {
  3523. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3524. return -EINVAL;
  3525. }
  3526. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3527. rc = __iris_power_on(device);
  3528. if (rc) {
  3529. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3530. goto err_iris_power_on;
  3531. }
  3532. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3533. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3534. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3535. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3536. reg_gdsc, reg_cbcr);
  3537. /* Reboot the firmware */
  3538. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3539. if (rc) {
  3540. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3541. goto err_set_cvp_state;
  3542. }
  3543. __setup_ucregion_memory_map(device);
  3544. /* Wait for boot completion */
  3545. rc = __boot_firmware(device);
  3546. if (rc) {
  3547. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3548. goto err_reset_core;
  3549. }
  3550. /*
  3551. * Work around for H/W bug, need to reprogram these registers once
  3552. * firmware is out reset
  3553. */
  3554. __set_threshold_registers(device);
  3555. if (device->res->pm_qos_latency_us)
  3556. pm_qos_add_request(&device->qos, PM_QOS_CPU_DMA_LATENCY,
  3557. device->res->pm_qos_latency_us);
  3558. __sys_set_debug(device, msm_cvp_fw_debug);
  3559. __enable_subcaches(device);
  3560. __set_subcaches(device);
  3561. __dsp_resume(device, flags);
  3562. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3563. exit:
  3564. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3565. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3566. device->skip_pc_count = 0;
  3567. return rc;
  3568. err_reset_core:
  3569. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3570. err_set_cvp_state:
  3571. call_iris_op(device, power_off, device);
  3572. err_iris_power_on:
  3573. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3574. return rc;
  3575. }
  3576. static int __load_fw(struct iris_hfi_device *device)
  3577. {
  3578. int rc = 0;
  3579. /* Initialize resources */
  3580. rc = __init_resources(device, device->res);
  3581. if (rc) {
  3582. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3583. goto fail_init_res;
  3584. }
  3585. rc = __initialize_packetization(device);
  3586. if (rc) {
  3587. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3588. goto fail_init_pkt;
  3589. }
  3590. rc = __iris_power_on(device);
  3591. if (rc) {
  3592. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3593. goto fail_iris_power_on;
  3594. }
  3595. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3596. || device->res->use_non_secure_pil) {
  3597. rc = load_cvp_fw_impl(device);
  3598. if (rc)
  3599. goto fail_load_fw;
  3600. }
  3601. return rc;
  3602. fail_load_fw:
  3603. call_iris_op(device, power_off, device);
  3604. fail_iris_power_on:
  3605. fail_init_pkt:
  3606. __deinit_resources(device);
  3607. fail_init_res:
  3608. return rc;
  3609. }
  3610. static void __unload_fw(struct iris_hfi_device *device)
  3611. {
  3612. if (!device->resources.fw.cookie)
  3613. return;
  3614. cancel_delayed_work(&iris_hfi_pm_work);
  3615. if (device->state != IRIS_STATE_DEINIT)
  3616. flush_workqueue(device->iris_pm_workq);
  3617. unload_cvp_fw_impl(device);
  3618. __interface_queues_release(device);
  3619. call_iris_op(device, power_off, device);
  3620. __deinit_resources(device);
  3621. dprintk(CVP_WARN, "Firmware unloaded\n");
  3622. }
  3623. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3624. {
  3625. int i = 0;
  3626. struct iris_hfi_device *device = dev;
  3627. if (!device || !fw_info) {
  3628. dprintk(CVP_ERR,
  3629. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3630. __func__, device, fw_info);
  3631. return -EINVAL;
  3632. }
  3633. mutex_lock(&device->lock);
  3634. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3635. ;
  3636. if (i == CVP_VERSION_LENGTH - 1) {
  3637. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3638. fw_info->version[0] = '\0';
  3639. goto fail_version_string;
  3640. }
  3641. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3642. CVP_VERSION_LENGTH);
  3643. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3644. fail_version_string:
  3645. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3646. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3647. fw_info->register_base = device->res->register_base;
  3648. fw_info->register_size = device->cvp_hal_data->register_size;
  3649. fw_info->irq = device->cvp_hal_data->irq;
  3650. mutex_unlock(&device->lock);
  3651. return 0;
  3652. }
  3653. static int iris_hfi_get_core_capabilities(void *dev)
  3654. {
  3655. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3656. return 0;
  3657. }
  3658. static u32 cvp_arp_test_regs[16];
  3659. static u32 cvp_dma_test_regs[512];
  3660. static const char * const mid_names[16] = {
  3661. "CVP_FW",
  3662. "ARP_DATA",
  3663. "CVP_OD_NON_PIXEL",
  3664. "CVP_OD_ORIG_PIXEL",
  3665. "CVP_OD_WR_PIXEL",
  3666. "CVP_MPU_ORIG_PIXEL",
  3667. "CVP_MPU_REF_PIXEL",
  3668. "CVP_MPU_NON_PIXEL",
  3669. "CVP_MPU_DFS",
  3670. "CVP_FDU_NON_PIXEL",
  3671. "CVP_FDU_PIXEL",
  3672. "CVP_ICA_PIXEL",
  3673. "Invalid",
  3674. "Invalid",
  3675. "Invalid",
  3676. "Invalid"
  3677. };
  3678. static void __print_reg_details(u32 val)
  3679. {
  3680. u32 mid, sid;
  3681. mid = (val >> 5) & 0xF;
  3682. sid = (val >> 2) & 0x7;
  3683. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3684. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3685. }
  3686. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3687. {
  3688. u32 val = 0, regi, i;
  3689. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3690. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_LOW: %#x\n", val);
  3691. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3692. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3693. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3694. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3695. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3696. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3697. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3698. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3699. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3700. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3701. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3702. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3703. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3704. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3705. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3706. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3707. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3708. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3709. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3710. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3711. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3712. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3713. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3714. dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3715. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3716. dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: %#x\n", val);
  3717. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3718. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH: %#x\n", val);
  3719. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3720. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW: %#x\n", val);
  3721. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3722. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW: %#x\n", val);
  3723. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3724. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW: %#x\n", val);
  3725. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3726. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW: %#x\n", val);
  3727. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3728. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH: %#x\n", val);
  3729. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3730. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW: %#x\n", val);
  3731. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3732. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH: %#x\n", val);
  3733. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3734. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW: %#x\n", val);
  3735. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3736. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH: %#x\n", val);
  3737. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3738. __print_reg_details(val);
  3739. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3740. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH: %#x\n", val);
  3741. #define CVP_SS_CLK_HALT 0x8
  3742. #define CVP_SS_CLK_EN 0xC
  3743. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3744. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3745. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3746. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3747. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3748. __write_register(device, CVP_SS_CLK_HALT, 0);
  3749. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3750. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3751. for (i = 0; i < 15; i++) {
  3752. regi = 0xC0000000 + i;
  3753. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3754. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3755. cvp_arp_test_regs[i] = val;
  3756. dprintk(CVP_ERR, "ARP_CTL:%x - %x\n", regi, val);
  3757. }
  3758. for (i = 0; i < 512; i++) {
  3759. regi = 0x40000000 + i;
  3760. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3761. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3762. cvp_dma_test_regs[i] = val;
  3763. dprintk(CVP_ERR, "DMA_CTL:%x - %x\n", regi, val);
  3764. }
  3765. }
  3766. static int iris_hfi_noc_error_info(void *dev)
  3767. {
  3768. struct iris_hfi_device *device;
  3769. if (!dev) {
  3770. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3771. return -EINVAL;
  3772. }
  3773. device = dev;
  3774. mutex_lock(&device->lock);
  3775. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3776. call_iris_op(device, noc_error_info, device);
  3777. mutex_unlock(&device->lock);
  3778. return 0;
  3779. }
  3780. static int __initialize_packetization(struct iris_hfi_device *device)
  3781. {
  3782. int rc = 0;
  3783. if (!device || !device->res) {
  3784. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3785. return -EINVAL;
  3786. }
  3787. device->packetization_type = HFI_PACKETIZATION_4XX;
  3788. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3789. device->packetization_type);
  3790. if (!device->pkt_ops) {
  3791. rc = -EINVAL;
  3792. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3793. }
  3794. return rc;
  3795. }
  3796. void __init_cvp_ops(struct iris_hfi_device *device)
  3797. {
  3798. device->vpu_ops = &iris2_ops;
  3799. }
  3800. static struct iris_hfi_device *__add_device(u32 device_id,
  3801. struct msm_cvp_platform_resources *res,
  3802. hfi_cmd_response_callback callback)
  3803. {
  3804. struct iris_hfi_device *hdevice = NULL;
  3805. int rc = 0;
  3806. if (!res || !callback) {
  3807. dprintk(CVP_ERR, "Invalid Parameters\n");
  3808. return NULL;
  3809. }
  3810. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3811. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3812. if (!hdevice) {
  3813. dprintk(CVP_ERR, "failed to allocate new device\n");
  3814. goto exit;
  3815. }
  3816. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3817. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3818. if (!hdevice->response_pkt) {
  3819. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3820. goto err_cleanup;
  3821. }
  3822. hdevice->raw_packet =
  3823. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3824. if (!hdevice->raw_packet) {
  3825. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3826. goto err_cleanup;
  3827. }
  3828. rc = __init_regs_and_interrupts(hdevice, res);
  3829. if (rc)
  3830. goto err_cleanup;
  3831. hdevice->res = res;
  3832. hdevice->device_id = device_id;
  3833. hdevice->callback = callback;
  3834. __init_cvp_ops(hdevice);
  3835. hdevice->cvp_workq = create_singlethread_workqueue(
  3836. "msm_cvp_workerq_iris");
  3837. if (!hdevice->cvp_workq) {
  3838. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3839. goto err_cleanup;
  3840. }
  3841. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3842. "pm_workerq_iris");
  3843. if (!hdevice->iris_pm_workq) {
  3844. dprintk(CVP_ERR, ": create pm workq failed\n");
  3845. goto err_cleanup;
  3846. }
  3847. mutex_init(&hdevice->lock);
  3848. INIT_LIST_HEAD(&hdevice->sess_head);
  3849. return hdevice;
  3850. err_cleanup:
  3851. if (hdevice->iris_pm_workq)
  3852. destroy_workqueue(hdevice->iris_pm_workq);
  3853. if (hdevice->cvp_workq)
  3854. destroy_workqueue(hdevice->cvp_workq);
  3855. kfree(hdevice->response_pkt);
  3856. kfree(hdevice->raw_packet);
  3857. kfree(hdevice);
  3858. exit:
  3859. return NULL;
  3860. }
  3861. static struct iris_hfi_device *__get_device(u32 device_id,
  3862. struct msm_cvp_platform_resources *res,
  3863. hfi_cmd_response_callback callback)
  3864. {
  3865. if (!res || !callback) {
  3866. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  3867. return NULL;
  3868. }
  3869. return __add_device(device_id, res, callback);
  3870. }
  3871. void cvp_iris_hfi_delete_device(void *device)
  3872. {
  3873. struct msm_cvp_core *core;
  3874. struct iris_hfi_device *dev = NULL;
  3875. if (!device)
  3876. return;
  3877. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3878. if (core)
  3879. dev = core->device->hfi_device_data;
  3880. if (!dev)
  3881. return;
  3882. mutex_destroy(&dev->lock);
  3883. destroy_workqueue(dev->cvp_workq);
  3884. destroy_workqueue(dev->iris_pm_workq);
  3885. free_irq(dev->cvp_hal_data->irq, dev);
  3886. iounmap(dev->cvp_hal_data->register_base);
  3887. iounmap(dev->cvp_hal_data->gcc_reg_base);
  3888. kfree(dev->cvp_hal_data);
  3889. kfree(dev->response_pkt);
  3890. kfree(dev->raw_packet);
  3891. kfree(dev);
  3892. }
  3893. static int iris_hfi_validate_session(void *sess, const char *func)
  3894. {
  3895. struct cvp_hal_session *session = sess;
  3896. int rc = 0;
  3897. struct iris_hfi_device *device;
  3898. if (!session || !session->device) {
  3899. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  3900. return -EINVAL;
  3901. }
  3902. device = session->device;
  3903. mutex_lock(&device->lock);
  3904. if (!__is_session_valid(device, session, func))
  3905. rc = -ECONNRESET;
  3906. mutex_unlock(&device->lock);
  3907. return rc;
  3908. }
  3909. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  3910. {
  3911. hdev->core_init = iris_hfi_core_init;
  3912. hdev->core_release = iris_hfi_core_release;
  3913. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  3914. hdev->session_init = iris_hfi_session_init;
  3915. hdev->session_end = iris_hfi_session_end;
  3916. hdev->session_abort = iris_hfi_session_abort;
  3917. hdev->session_clean = iris_hfi_session_clean;
  3918. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  3919. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  3920. hdev->session_send = iris_hfi_session_send;
  3921. hdev->session_flush = iris_hfi_session_flush;
  3922. hdev->scale_clocks = iris_hfi_scale_clocks;
  3923. hdev->vote_bus = iris_hfi_vote_buses;
  3924. hdev->get_fw_info = iris_hfi_get_fw_info;
  3925. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  3926. hdev->suspend = iris_hfi_suspend;
  3927. hdev->resume = iris_hfi_resume;
  3928. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  3929. hdev->noc_error_info = iris_hfi_noc_error_info;
  3930. hdev->validate_session = iris_hfi_validate_session;
  3931. }
  3932. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  3933. struct msm_cvp_platform_resources *res,
  3934. hfi_cmd_response_callback callback)
  3935. {
  3936. int rc = 0;
  3937. if (!hdev || !res || !callback) {
  3938. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  3939. hdev, res, callback);
  3940. rc = -EINVAL;
  3941. goto err_iris_hfi_init;
  3942. }
  3943. hdev->hfi_device_data = __get_device(device_id, res, callback);
  3944. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  3945. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  3946. goto err_iris_hfi_init;
  3947. }
  3948. iris_init_hfi_callbacks(hdev);
  3949. err_iris_hfi_init:
  3950. return rc;
  3951. }