sde_encoder_phys.h 29 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef __SDE_ENCODER_PHYS_H__
  6. #define __SDE_ENCODER_PHYS_H__
  7. #include <linux/jiffies.h>
  8. #include <linux/sde_rsc.h>
  9. #include "sde_kms.h"
  10. #include "sde_hw_intf.h"
  11. #include "sde_hw_pingpong.h"
  12. #include "sde_hw_ctl.h"
  13. #include "sde_hw_top.h"
  14. #include "sde_hw_wb.h"
  15. #include "sde_hw_cdm.h"
  16. #include "sde_encoder.h"
  17. #include "sde_connector.h"
  18. #define SDE_ENCODER_NAME_MAX 16
  19. /* wait for at most 2 vsync for lowest refresh rate (24hz) */
  20. #define KICKOFF_TIMEOUT_MS 84
  21. #define KICKOFF_TIMEOUT_JIFFIES msecs_to_jiffies(KICKOFF_TIMEOUT_MS)
  22. #define MAX_TE_PROFILE_COUNT 5
  23. /**
  24. * enum sde_enc_split_role - Role this physical encoder will play in a
  25. * split-panel configuration, where one panel is master, and others slaves.
  26. * Masters have extra responsibilities, like managing the VBLANK IRQ.
  27. * @ENC_ROLE_SOLO: This is the one and only panel. This encoder is master.
  28. * @ENC_ROLE_MASTER: This encoder is the master of a split panel config.
  29. * @ENC_ROLE_SLAVE: This encoder is not the master of a split panel config.
  30. * @ENC_ROLE_SKIP: This encoder is not participating in kickoffs
  31. */
  32. enum sde_enc_split_role {
  33. ENC_ROLE_SOLO,
  34. ENC_ROLE_MASTER,
  35. ENC_ROLE_SLAVE,
  36. ENC_ROLE_SKIP
  37. };
  38. /**
  39. * enum sde_enc_enable_state - current enabled state of the physical encoder
  40. * @SDE_ENC_DISABLING: Encoder transitioning to disable state
  41. * Events bounding transition are encoder type specific
  42. * @SDE_ENC_DISABLED: Encoder is disabled
  43. * @SDE_ENC_ENABLING: Encoder transitioning to enabled
  44. * Events bounding transition are encoder type specific
  45. * @SDE_ENC_ENABLED: Encoder is enabled
  46. * @SDE_ENC_ERR_NEEDS_HW_RESET: Encoder is enabled, but requires a hw_reset
  47. * to recover from a previous error
  48. * @SDE_ENC_TIMING_ENGINE_RECONFIG: Encoder is enabled and timing engine
  49. * parameters are updated
  50. */
  51. enum sde_enc_enable_state {
  52. SDE_ENC_DISABLING,
  53. SDE_ENC_DISABLED,
  54. SDE_ENC_ENABLING,
  55. SDE_ENC_ENABLED,
  56. SDE_ENC_ERR_NEEDS_HW_RESET,
  57. SDE_ENC_TIMING_ENGINE_RECONFIG,
  58. };
  59. struct sde_encoder_phys;
  60. /**
  61. * struct sde_encoder_virt_ops - Interface the containing virtual encoder
  62. * provides for the physical encoders to use to callback.
  63. * @handle_vblank_virt: Notify virtual encoder of vblank IRQ reception
  64. * Note: This is called from IRQ handler context.
  65. * @handle_underrun_virt: Notify virtual encoder of underrun IRQ reception
  66. * Note: This is called from IRQ handler context.
  67. * @handle_frame_done: Notify virtual encoder that this phys encoder
  68. * completes last request frame.
  69. * @get_qsync_fps: Returns the min fps for the qsync feature.
  70. */
  71. struct sde_encoder_virt_ops {
  72. void (*handle_vblank_virt)(struct drm_encoder *parent,
  73. struct sde_encoder_phys *phys);
  74. void (*handle_underrun_virt)(struct drm_encoder *parent,
  75. struct sde_encoder_phys *phys);
  76. void (*handle_frame_done)(struct drm_encoder *parent,
  77. struct sde_encoder_phys *phys, u32 event);
  78. void (*get_qsync_fps)(struct drm_encoder *parent,
  79. u32 *qsync_fps);
  80. };
  81. /**
  82. * struct sde_encoder_phys_ops - Interface the physical encoders provide to
  83. * the containing virtual encoder.
  84. * @late_register: DRM Call. Add Userspace interfaces, debugfs.
  85. * @prepare_commit: MSM Atomic Call, start of atomic commit sequence
  86. * @is_master: Whether this phys_enc is the current master
  87. * encoder. Can be switched at enable time. Based
  88. * on split_role and current mode (CMD/VID).
  89. * @mode_fixup: DRM Call. Fixup a DRM mode.
  90. * @cont_splash_mode_set: mode set with specific HW resources during
  91. * cont splash enabled state.
  92. * @mode_set: DRM Call. Set a DRM mode.
  93. * This likely caches the mode, for use at enable.
  94. * @enable: DRM Call. Enable a DRM mode.
  95. * @disable: DRM Call. Disable mode.
  96. * @atomic_check: DRM Call. Atomic check new DRM state.
  97. * @destroy: DRM Call. Destroy and release resources.
  98. * @get_hw_resources: Populate the structure with the hardware
  99. * resources that this phys_enc is using.
  100. * Expect no overlap between phys_encs.
  101. * @control_vblank_irq Register/Deregister for VBLANK IRQ
  102. * @wait_for_commit_done: Wait for hardware to have flushed the
  103. * current pending frames to hardware
  104. * @wait_for_tx_complete: Wait for hardware to transfer the pixels
  105. * to the panel
  106. * @wait_for_vblank: Wait for VBLANK, for sub-driver internal use
  107. * @prepare_for_kickoff: Do any work necessary prior to a kickoff
  108. * For CMD encoder, may wait for previous tx done
  109. * @handle_post_kickoff: Do any work necessary post-kickoff work
  110. * @trigger_flush: Process flush event on physical encoder
  111. * @trigger_start: Process start event on physical encoder
  112. * @needs_single_flush: Whether encoder slaves need to be flushed
  113. * @setup_misr: Sets up MISR, enable and disables based on sysfs
  114. * @collect_misr: Collects MISR data on frame update
  115. * @hw_reset: Issue HW recovery such as CTL reset and clear
  116. * SDE_ENC_ERR_NEEDS_HW_RESET state
  117. * @irq_control: Handler to enable/disable all the encoder IRQs
  118. * @update_split_role: Update the split role of the phys enc
  119. * @control_te: Interface to control the vsync_enable status
  120. * @restore: Restore all the encoder configs.
  121. * @is_autorefresh_enabled: provides the autorefresh current
  122. * enable/disable state.
  123. * @get_line_count: Obtain current internal vertical line count
  124. * @get_wr_line_count: Obtain current output vertical line count
  125. * @wait_dma_trigger: Returns true if lut dma has to trigger and wait
  126. * unitl transaction is complete.
  127. * @wait_for_active: Wait for display scan line to be in active area
  128. * @setup_vsync_source: Configure vsync source selection for cmd mode.
  129. * @get_underrun_line_count: Obtain and log current internal vertical line
  130. * count and underrun line count
  131. */
  132. struct sde_encoder_phys_ops {
  133. int (*late_register)(struct sde_encoder_phys *encoder,
  134. struct dentry *debugfs_root);
  135. void (*prepare_commit)(struct sde_encoder_phys *encoder);
  136. bool (*is_master)(struct sde_encoder_phys *encoder);
  137. bool (*mode_fixup)(struct sde_encoder_phys *encoder,
  138. const struct drm_display_mode *mode,
  139. struct drm_display_mode *adjusted_mode);
  140. void (*mode_set)(struct sde_encoder_phys *encoder,
  141. struct drm_display_mode *mode,
  142. struct drm_display_mode *adjusted_mode);
  143. void (*cont_splash_mode_set)(struct sde_encoder_phys *encoder,
  144. struct drm_display_mode *adjusted_mode);
  145. void (*enable)(struct sde_encoder_phys *encoder);
  146. void (*disable)(struct sde_encoder_phys *encoder);
  147. int (*atomic_check)(struct sde_encoder_phys *encoder,
  148. struct drm_crtc_state *crtc_state,
  149. struct drm_connector_state *conn_state);
  150. void (*destroy)(struct sde_encoder_phys *encoder);
  151. void (*get_hw_resources)(struct sde_encoder_phys *encoder,
  152. struct sde_encoder_hw_resources *hw_res,
  153. struct drm_connector_state *conn_state);
  154. int (*control_vblank_irq)(struct sde_encoder_phys *enc, bool enable);
  155. int (*wait_for_commit_done)(struct sde_encoder_phys *phys_enc);
  156. int (*wait_for_tx_complete)(struct sde_encoder_phys *phys_enc);
  157. int (*wait_for_vblank)(struct sde_encoder_phys *phys_enc);
  158. int (*prepare_for_kickoff)(struct sde_encoder_phys *phys_enc,
  159. struct sde_encoder_kickoff_params *params);
  160. void (*handle_post_kickoff)(struct sde_encoder_phys *phys_enc);
  161. void (*trigger_flush)(struct sde_encoder_phys *phys_enc);
  162. void (*trigger_start)(struct sde_encoder_phys *phys_enc);
  163. bool (*needs_single_flush)(struct sde_encoder_phys *phys_enc);
  164. void (*setup_misr)(struct sde_encoder_phys *phys_encs,
  165. bool enable, u32 frame_count);
  166. int (*collect_misr)(struct sde_encoder_phys *phys_enc, bool nonblock,
  167. u32 *misr_value);
  168. void (*hw_reset)(struct sde_encoder_phys *phys_enc);
  169. void (*irq_control)(struct sde_encoder_phys *phys, bool enable);
  170. void (*update_split_role)(struct sde_encoder_phys *phys_enc,
  171. enum sde_enc_split_role role);
  172. void (*control_te)(struct sde_encoder_phys *phys_enc, bool enable);
  173. void (*restore)(struct sde_encoder_phys *phys);
  174. bool (*is_autorefresh_enabled)(struct sde_encoder_phys *phys);
  175. int (*get_line_count)(struct sde_encoder_phys *phys);
  176. int (*get_wr_line_count)(struct sde_encoder_phys *phys);
  177. bool (*wait_dma_trigger)(struct sde_encoder_phys *phys);
  178. int (*wait_for_active)(struct sde_encoder_phys *phys);
  179. void (*setup_vsync_source)(struct sde_encoder_phys *phys,
  180. u32 vsync_source, bool is_dummy);
  181. u32 (*get_underrun_line_count)(struct sde_encoder_phys *phys);
  182. };
  183. /**
  184. * enum sde_intr_idx - sde encoder interrupt index
  185. * @INTR_IDX_VSYNC: Vsync interrupt for video mode panel
  186. * @INTR_IDX_PINGPONG: Pingpong done interrupt for cmd mode panel
  187. * @INTR_IDX_UNDERRUN: Underrun interrupt for video and cmd mode panel
  188. * @INTR_IDX_RDPTR: Readpointer done interrupt for cmd mode panel
  189. * @INTR_IDX_WB_DONE: Writeback done interrupt for WB
  190. * @INTR_IDX_PP1_OVFL: Pingpong overflow interrupt on PP1 for Concurrent WB
  191. * @INTR_IDX_PP2_OVFL: Pingpong overflow interrupt on PP2 for Concurrent WB
  192. * @INTR_IDX_PP3_OVFL: Pingpong overflow interrupt on PP3 for Concurrent WB
  193. * @INTR_IDX_PP4_OVFL: Pingpong overflow interrupt on PP4 for Concurrent WB
  194. * @INTR_IDX_PP5_OVFL: Pingpong overflow interrupt on PP5 for Concurrent WB
  195. * @INTR_IDX_AUTOREFRESH_DONE: Autorefresh done for cmd mode panel meaning
  196. * autorefresh has triggered a double buffer flip
  197. * @INTR_IDX_WRPTR: Writepointer start interrupt for cmd mode panel
  198. */
  199. enum sde_intr_idx {
  200. INTR_IDX_VSYNC,
  201. INTR_IDX_PINGPONG,
  202. INTR_IDX_UNDERRUN,
  203. INTR_IDX_CTL_START,
  204. INTR_IDX_RDPTR,
  205. INTR_IDX_AUTOREFRESH_DONE,
  206. INTR_IDX_WB_DONE,
  207. INTR_IDX_PP1_OVFL,
  208. INTR_IDX_PP2_OVFL,
  209. INTR_IDX_PP3_OVFL,
  210. INTR_IDX_PP4_OVFL,
  211. INTR_IDX_PP5_OVFL,
  212. INTR_IDX_WRPTR,
  213. INTR_IDX_MAX,
  214. };
  215. /**
  216. * sde_encoder_irq - tracking structure for interrupts
  217. * @name: string name of interrupt
  218. * @intr_type: Encoder interrupt type
  219. * @intr_idx: Encoder interrupt enumeration
  220. * @hw_idx: HW Block ID
  221. * @irq_idx: IRQ interface lookup index from SDE IRQ framework
  222. * will be -EINVAL if IRQ is not registered
  223. * @irq_cb: interrupt callback
  224. */
  225. struct sde_encoder_irq {
  226. const char *name;
  227. enum sde_intr_type intr_type;
  228. enum sde_intr_idx intr_idx;
  229. int hw_idx;
  230. int irq_idx;
  231. struct sde_irq_callback cb;
  232. };
  233. /**
  234. * struct sde_encoder_phys - physical encoder that drives a single INTF block
  235. * tied to a specific panel / sub-panel. Abstract type, sub-classed by
  236. * phys_vid or phys_cmd for video mode or command mode encs respectively.
  237. * @parent: Pointer to the containing virtual encoder
  238. * @connector: If a mode is set, cached pointer to the active connector
  239. * @ops: Operations exposed to the virtual encoder
  240. * @parent_ops: Callbacks exposed by the parent to the phys_enc
  241. * @hw_mdptop: Hardware interface to the top registers
  242. * @hw_ctl: Hardware interface to the ctl registers
  243. * @hw_intf: Hardware interface to INTF registers
  244. * @hw_cdm: Hardware interface to the cdm registers
  245. * @hw_qdss: Hardware interface to the qdss registers
  246. * @cdm_cfg: Chroma-down hardware configuration
  247. * @hw_pp: Hardware interface to the ping pong registers
  248. * @sde_kms: Pointer to the sde_kms top level
  249. * @cached_mode: DRM mode cached at mode_set time, acted on in enable
  250. * @enabled: Whether the encoder has enabled and running a mode
  251. * @split_role: Role to play in a split-panel configuration
  252. * @intf_mode: Interface mode
  253. * @intf_idx: Interface index on sde hardware
  254. * @intf_cfg: Interface hardware configuration
  255. * @intf_cfg_v1: Interface hardware configuration to be used if control
  256. * path supports SDE_CTL_ACTIVE_CFG
  257. * @comp_type: Type of compression supported
  258. * @comp_ratio: Compression ratio
  259. * @dsc_extra_pclk_cycle_cnt: Extra pclk cycle count for DSC over DP
  260. * @dsc_extra_disp_width: Additional display width for DSC over DP
  261. * @poms_align_vsync: poms with vsync aligned
  262. * @dce_bytes_per_line: Compressed bytes per line
  263. * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes
  264. * @enable_state: Enable state tracking
  265. * @vblank_refcount: Reference count of vblank request
  266. * @vblank_cached_refcount: Reference count of vblank cached request
  267. * @wbirq_refcount: Reference count of wb irq request
  268. * @vsync_cnt: Vsync count for the physical encoder
  269. * @underrun_cnt: Underrun count for the physical encoder
  270. * @pending_kickoff_cnt: Atomic counter tracking the number of kickoffs
  271. * vs. the number of done/vblank irqs. Should hover
  272. * between 0-2 Incremented when a new kickoff is
  273. * scheduled. Decremented in irq handler
  274. * @pending_retire_fence_cnt: Atomic counter tracking the pending retire
  275. * fences that have to be signalled.
  276. * @pending_kickoff_wq: Wait queue for blocking until kickoff completes
  277. * @irq: IRQ tracking structures
  278. * @has_intf_te: Interface TE configuration support
  279. * @cont_splash_enabled: Variable to store continuous splash settings.
  280. * @in_clone_mode Indicates if encoder is in clone mode ref@CWB
  281. * @vfp_cached: cached vertical front porch to be used for
  282. * programming ROT and MDP fetch start
  283. * @frame_trigger_mode: frame trigger mode indication for command
  284. * mode display
  285. * @recovered: flag set to true when recovered from pp timeout
  286. */
  287. struct sde_encoder_phys {
  288. struct drm_encoder *parent;
  289. struct drm_connector *connector;
  290. struct sde_encoder_phys_ops ops;
  291. struct sde_encoder_virt_ops parent_ops;
  292. struct sde_hw_mdp *hw_mdptop;
  293. struct sde_hw_ctl *hw_ctl;
  294. struct sde_hw_intf *hw_intf;
  295. struct sde_hw_cdm *hw_cdm;
  296. struct sde_hw_qdss *hw_qdss;
  297. struct sde_hw_cdm_cfg cdm_cfg;
  298. struct sde_hw_pingpong *hw_pp;
  299. struct sde_kms *sde_kms;
  300. struct drm_display_mode cached_mode;
  301. enum sde_enc_split_role split_role;
  302. enum sde_intf_mode intf_mode;
  303. enum sde_intf intf_idx;
  304. struct sde_hw_intf_cfg intf_cfg;
  305. struct sde_hw_intf_cfg_v1 intf_cfg_v1;
  306. enum msm_display_compression_type comp_type;
  307. u32 comp_ratio;
  308. u32 dsc_extra_pclk_cycle_cnt;
  309. u32 dsc_extra_disp_width;
  310. bool poms_align_vsync;
  311. u32 dce_bytes_per_line;
  312. spinlock_t *enc_spinlock;
  313. enum sde_enc_enable_state enable_state;
  314. struct mutex *vblank_ctl_lock;
  315. atomic_t vblank_refcount;
  316. atomic_t vblank_cached_refcount;
  317. atomic_t wbirq_refcount;
  318. atomic_t vsync_cnt;
  319. atomic_t underrun_cnt;
  320. atomic_t pending_kickoff_cnt;
  321. atomic_t pending_retire_fence_cnt;
  322. wait_queue_head_t pending_kickoff_wq;
  323. struct sde_encoder_irq irq[INTR_IDX_MAX];
  324. bool has_intf_te;
  325. bool cont_splash_enabled;
  326. bool in_clone_mode;
  327. int vfp_cached;
  328. enum frame_trigger_mode_type frame_trigger_mode;
  329. bool recovered;
  330. };
  331. static inline int sde_encoder_phys_inc_pending(struct sde_encoder_phys *phys)
  332. {
  333. return atomic_inc_return(&phys->pending_kickoff_cnt);
  334. }
  335. /**
  336. * struct sde_encoder_phys_vid - sub-class of sde_encoder_phys to handle video
  337. * mode specific operations
  338. * @base: Baseclass physical encoder structure
  339. * @timing_params: Current timing parameter
  340. * @error_count: Number of consecutive kickoffs that experienced an error
  341. */
  342. struct sde_encoder_phys_vid {
  343. struct sde_encoder_phys base;
  344. struct intf_timing_params timing_params;
  345. int error_count;
  346. };
  347. /**
  348. * struct sde_encoder_phys_cmd_autorefresh - autorefresh state tracking
  349. * @cfg: current active autorefresh configuration
  350. * @kickoff_cnt: atomic count tracking autorefresh done irq kickoffs pending
  351. * @kickoff_wq: wait queue for waiting on autorefresh done irq
  352. */
  353. struct sde_encoder_phys_cmd_autorefresh {
  354. struct sde_hw_autorefresh cfg;
  355. atomic_t kickoff_cnt;
  356. wait_queue_head_t kickoff_wq;
  357. };
  358. /**
  359. * struct sde_encoder_phys_cmd_te_timestamp - list node to keep track of
  360. * rd_ptr/TE timestamp
  361. * @list: list node
  362. * @timestamp: TE timestamp
  363. */
  364. struct sde_encoder_phys_cmd_te_timestamp {
  365. struct list_head list;
  366. ktime_t timestamp;
  367. };
  368. /**
  369. * struct sde_encoder_phys_cmd - sub-class of sde_encoder_phys to handle command
  370. * mode specific operations
  371. * @base: Baseclass physical encoder structure
  372. * @stream_sel: Stream selection for multi-stream interfaces
  373. * @pp_timeout_report_cnt: number of pingpong done irq timeout errors
  374. * @autorefresh: autorefresh feature state
  375. * @pending_vblank_cnt: Atomic counter tracking pending wait for VBLANK
  376. * @pending_vblank_wq: Wait queue for blocking until VBLANK received
  377. * @wr_ptr_wait_success: log wr_ptr_wait success for release fence trigger
  378. * @te_timestamp_list: List head for the TE timestamp list
  379. * @te_timestamp: Array of size MAX_TE_PROFILE_COUNT te_timestamp_list elements
  380. */
  381. struct sde_encoder_phys_cmd {
  382. struct sde_encoder_phys base;
  383. int stream_sel;
  384. int pp_timeout_report_cnt;
  385. struct sde_encoder_phys_cmd_autorefresh autorefresh;
  386. atomic_t pending_vblank_cnt;
  387. wait_queue_head_t pending_vblank_wq;
  388. bool wr_ptr_wait_success;
  389. struct list_head te_timestamp_list;
  390. struct sde_encoder_phys_cmd_te_timestamp
  391. te_timestamp[MAX_TE_PROFILE_COUNT];
  392. };
  393. /**
  394. * struct sde_encoder_phys_wb - sub-class of sde_encoder_phys to handle
  395. * writeback specific operations
  396. * @base: Baseclass physical encoder structure
  397. * @hw_wb: Hardware interface to the wb registers
  398. * @wbdone_timeout: Timeout value for writeback done in msec
  399. * @bypass_irqreg: Bypass irq register/unregister if non-zero
  400. * @wb_cfg: Writeback hardware configuration
  401. * @cdp_cfg: Writeback CDP configuration
  402. * @wb_roi: Writeback region-of-interest
  403. * @wb_fmt: Writeback pixel format
  404. * @wb_fb: Pointer to current writeback framebuffer
  405. * @wb_aspace: Pointer to current writeback address space
  406. * @cwb_old_fb: Pointer to old writeback framebuffer
  407. * @cwb_old_aspace: Pointer to old writeback address space
  408. * @frame_count: Counter of completed writeback operations
  409. * @kickoff_count: Counter of issued writeback operations
  410. * @aspace: address space identifier for non-secure/secure domain
  411. * @wb_dev: Pointer to writeback device
  412. * @start_time: Start time of writeback latest request
  413. * @end_time: End time of writeback latest request
  414. * @bo_disable: Buffer object(s) to use during the disabling state
  415. * @fb_disable: Frame buffer to use during the disabling state
  416. * @crtc Pointer to drm_crtc
  417. */
  418. struct sde_encoder_phys_wb {
  419. struct sde_encoder_phys base;
  420. struct sde_hw_wb *hw_wb;
  421. u32 wbdone_timeout;
  422. u32 bypass_irqreg;
  423. struct sde_hw_wb_cfg wb_cfg;
  424. struct sde_hw_wb_cdp_cfg cdp_cfg;
  425. struct sde_rect wb_roi;
  426. const struct sde_format *wb_fmt;
  427. struct drm_framebuffer *wb_fb;
  428. struct msm_gem_address_space *wb_aspace;
  429. struct drm_framebuffer *cwb_old_fb;
  430. struct msm_gem_address_space *cwb_old_aspace;
  431. u32 frame_count;
  432. u32 kickoff_count;
  433. struct msm_gem_address_space *aspace[SDE_IOMMU_DOMAIN_MAX];
  434. struct sde_wb_device *wb_dev;
  435. ktime_t start_time;
  436. ktime_t end_time;
  437. struct drm_gem_object *bo_disable[SDE_MAX_PLANES];
  438. struct drm_framebuffer *fb_disable;
  439. struct drm_crtc *crtc;
  440. };
  441. /**
  442. * struct sde_enc_phys_init_params - initialization parameters for phys encs
  443. * @sde_kms: Pointer to the sde_kms top level
  444. * @parent: Pointer to the containing virtual encoder
  445. * @parent_ops: Callbacks exposed by the parent to the phys_enc
  446. * @split_role: Role to play in a split-panel configuration
  447. * @intf_idx: Interface index this phys_enc will control
  448. * @wb_idx: Writeback index this phys_enc will control
  449. * @comp_type: Type of compression supported
  450. * @enc_spinlock: Virtual-Encoder-Wide Spin Lock for IRQ purposes
  451. */
  452. struct sde_enc_phys_init_params {
  453. struct sde_kms *sde_kms;
  454. struct drm_encoder *parent;
  455. struct sde_encoder_virt_ops parent_ops;
  456. enum sde_enc_split_role split_role;
  457. enum sde_intf intf_idx;
  458. enum sde_wb wb_idx;
  459. enum msm_display_compression_type comp_type;
  460. spinlock_t *enc_spinlock;
  461. struct mutex *vblank_ctl_lock;
  462. };
  463. /**
  464. * sde_encoder_wait_info - container for passing arguments to irq wait functions
  465. * @wq: wait queue structure
  466. * @atomic_cnt: wait until atomic_cnt equals zero
  467. * @count_check: wait for specific atomic_cnt instead of zero.
  468. * @timeout_ms: timeout value in milliseconds
  469. */
  470. struct sde_encoder_wait_info {
  471. wait_queue_head_t *wq;
  472. atomic_t *atomic_cnt;
  473. u32 count_check;
  474. s64 timeout_ms;
  475. };
  476. /**
  477. * sde_encoder_phys_vid_init - Construct a new video mode physical encoder
  478. * @p: Pointer to init params structure
  479. * Return: Error code or newly allocated encoder
  480. */
  481. struct sde_encoder_phys *sde_encoder_phys_vid_init(
  482. struct sde_enc_phys_init_params *p);
  483. /**
  484. * sde_encoder_phys_cmd_init - Construct a new command mode physical encoder
  485. * @p: Pointer to init params structure
  486. * Return: Error code or newly allocated encoder
  487. */
  488. struct sde_encoder_phys *sde_encoder_phys_cmd_init(
  489. struct sde_enc_phys_init_params *p);
  490. /**
  491. * sde_encoder_phys_wb_init - Construct a new writeback physical encoder
  492. * @p: Pointer to init params structure
  493. * Return: Error code or newly allocated encoder
  494. */
  495. #if IS_ENABLED(CONFIG_DRM_SDE_WB)
  496. struct sde_encoder_phys *sde_encoder_phys_wb_init(
  497. struct sde_enc_phys_init_params *p);
  498. #else
  499. static inline
  500. struct sde_encoder_phys *sde_encoder_phys_wb_init(
  501. struct sde_enc_phys_init_params *p)
  502. {
  503. return NULL;
  504. }
  505. #endif /* CONFIG_DRM_SDE_WB */
  506. void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc,
  507. struct drm_framebuffer *fb, const struct sde_format *format,
  508. struct sde_rect *wb_roi);
  509. /**
  510. * sde_encoder_helper_get_pp_line_count - pingpong linecount helper function
  511. * @drm_enc: Pointer to drm encoder structure
  512. * @info: structure used to populate the pp line count information
  513. */
  514. void sde_encoder_helper_get_pp_line_count(struct drm_encoder *drm_enc,
  515. struct sde_hw_pp_vsync_info *info);
  516. /**
  517. * sde_encoder_helper_trigger_flush - control flush helper function
  518. * This helper function may be optionally specified by physical
  519. * encoders if they require ctl_flush triggering.
  520. * @phys_enc: Pointer to physical encoder structure
  521. */
  522. void sde_encoder_helper_trigger_flush(struct sde_encoder_phys *phys_enc);
  523. /**
  524. * sde_encoder_helper_trigger_start - control start helper function
  525. * This helper function may be optionally specified by physical
  526. * encoders if they require ctl_start triggering.
  527. * @phys_enc: Pointer to physical encoder structure
  528. */
  529. void sde_encoder_helper_trigger_start(struct sde_encoder_phys *phys_enc);
  530. /**
  531. * sde_encoder_helper_vsync_config - configure vsync source for cmd mode
  532. * @phys_enc: Pointer to physical encoder structure
  533. * @vsync_source: vsync source selection
  534. * @is_dummy: used only for RSC
  535. */
  536. void sde_encoder_helper_vsync_config(struct sde_encoder_phys *phys_enc,
  537. u32 vsync_source, bool is_dummy);
  538. /**
  539. * sde_encoder_helper_wait_event_timeout - wait for event with timeout
  540. * taking into account that jiffies may jump between reads leading to
  541. * incorrectly detected timeouts. Prevent failure in this scenario by
  542. * making sure that elapsed time during wait is valid.
  543. * @drm_id: drm object id for logging
  544. * @hw_id: hw instance id for logging
  545. * @info: wait info structure
  546. */
  547. int sde_encoder_helper_wait_event_timeout(
  548. int32_t drm_id,
  549. int32_t hw_id,
  550. struct sde_encoder_wait_info *info);
  551. /*
  552. * sde_encoder_get_fps - get the allowed panel jitter in nanoseconds
  553. * @encoder: Pointer to drm encoder object
  554. */
  555. void sde_encoder_helper_get_jitter_bounds_ns(struct drm_encoder *encoder,
  556. u64 *l_bound, u64 *u_bound);
  557. /**
  558. * sde_encoder_helper_switch_vsync - switch vsync source to WD or default
  559. * @drm_enc: Pointer to drm encoder structure
  560. * @watchdog_te: switch vsync source to watchdog TE
  561. */
  562. int sde_encoder_helper_switch_vsync(struct drm_encoder *drm_enc,
  563. bool watchdog_te);
  564. /**
  565. * sde_encoder_helper_hw_reset - issue ctl hw reset
  566. * This helper function may be optionally specified by physical
  567. * encoders if they require ctl hw reset. If state is currently
  568. * SDE_ENC_ERR_NEEDS_HW_RESET, it is set back to SDE_ENC_ENABLED.
  569. * @phys_enc: Pointer to physical encoder structure
  570. */
  571. void sde_encoder_helper_hw_reset(struct sde_encoder_phys *phys_enc);
  572. static inline enum sde_3d_blend_mode sde_encoder_helper_get_3d_blend_mode(
  573. struct sde_encoder_phys *phys_enc)
  574. {
  575. struct msm_display_topology def;
  576. enum sde_enc_split_role split_role;
  577. int ret, num_lm;
  578. bool mode_3d;
  579. if (!phys_enc || phys_enc->enable_state == SDE_ENC_DISABLING ||
  580. !phys_enc->connector || !phys_enc->connector->state)
  581. return BLEND_3D_NONE;
  582. ret = sde_connector_state_get_topology
  583. (phys_enc->connector->state, &def);
  584. if (ret)
  585. return BLEND_3D_NONE;
  586. num_lm = def.num_lm;
  587. mode_3d = (num_lm > def.num_enc) ? true : false;
  588. split_role = phys_enc->split_role;
  589. if (split_role == ENC_ROLE_SOLO && num_lm == 2 && mode_3d)
  590. return BLEND_3D_H_ROW_INT;
  591. if ((split_role == ENC_ROLE_MASTER || split_role == ENC_ROLE_SLAVE)
  592. && num_lm == 4 && mode_3d)
  593. return BLEND_3D_H_ROW_INT;
  594. return BLEND_3D_NONE;
  595. }
  596. /**
  597. * sde_encoder_helper_split_config - split display configuration helper function
  598. * This helper function may be used by physical encoders to configure
  599. * the split display related registers.
  600. * @phys_enc: Pointer to physical encoder structure
  601. * @interface: enum sde_intf setting
  602. */
  603. void sde_encoder_helper_split_config(
  604. struct sde_encoder_phys *phys_enc,
  605. enum sde_intf interface);
  606. /**
  607. * sde_encoder_helper_reset_mixers - reset mixers associated with phys enc
  608. * @phys_enc: Pointer to physical encoder structure
  609. * @fb: Optional fb for specifying new mixer output resolution, may be NULL
  610. * Return: Zero on success
  611. */
  612. int sde_encoder_helper_reset_mixers(struct sde_encoder_phys *phys_enc,
  613. struct drm_framebuffer *fb);
  614. /**
  615. * sde_encoder_helper_report_irq_timeout - utility to report error that irq has
  616. * timed out, including reporting frame error event to crtc and debug dump
  617. * @phys_enc: Pointer to physical encoder structure
  618. * @intr_idx: Failing interrupt index
  619. */
  620. void sde_encoder_helper_report_irq_timeout(struct sde_encoder_phys *phys_enc,
  621. enum sde_intr_idx intr_idx);
  622. /**
  623. * sde_encoder_helper_wait_for_irq - utility to wait on an irq.
  624. * note: will call sde_encoder_helper_wait_for_irq on timeout
  625. * @phys_enc: Pointer to physical encoder structure
  626. * @intr_idx: encoder interrupt index
  627. * @wait_info: wait info struct
  628. * @Return: 0 or -ERROR
  629. */
  630. int sde_encoder_helper_wait_for_irq(struct sde_encoder_phys *phys_enc,
  631. enum sde_intr_idx intr_idx,
  632. struct sde_encoder_wait_info *wait_info);
  633. /**
  634. * sde_encoder_helper_register_irq - register and enable an irq
  635. * @phys_enc: Pointer to physical encoder structure
  636. * @intr_idx: encoder interrupt index
  637. * @Return: 0 or -ERROR
  638. */
  639. int sde_encoder_helper_register_irq(struct sde_encoder_phys *phys_enc,
  640. enum sde_intr_idx intr_idx);
  641. /**
  642. * sde_encoder_helper_unregister_irq - unregister and disable an irq
  643. * @phys_enc: Pointer to physical encoder structure
  644. * @intr_idx: encoder interrupt index
  645. * @Return: 0 or -ERROR
  646. */
  647. int sde_encoder_helper_unregister_irq(struct sde_encoder_phys *phys_enc,
  648. enum sde_intr_idx intr_idx);
  649. /**
  650. * sde_encoder_helper_update_intf_cfg - update interface configuration for
  651. * single control path.
  652. * @phys_enc: Pointer to physical encoder structure
  653. */
  654. void sde_encoder_helper_update_intf_cfg(
  655. struct sde_encoder_phys *phys_enc);
  656. /**
  657. * _sde_encoder_phys_is_dual_ctl - check if encoder needs dual ctl path.
  658. * @phys_enc: Pointer to physical encoder structure
  659. * @Return: true if dual ctl paths else false
  660. */
  661. static inline bool _sde_encoder_phys_is_dual_ctl(
  662. struct sde_encoder_phys *phys_enc)
  663. {
  664. struct sde_kms *sde_kms;
  665. enum sde_rm_topology_name topology;
  666. const struct sde_rm_topology_def* def;
  667. if (!phys_enc) {
  668. pr_err("invalid phys_enc\n");
  669. return false;
  670. }
  671. sde_kms = phys_enc->sde_kms;
  672. if (!sde_kms) {
  673. pr_err("invalid kms\n");
  674. return false;
  675. }
  676. topology = sde_connector_get_topology_name(phys_enc->connector);
  677. def = sde_rm_topology_get_topology_def(&sde_kms->rm, topology);
  678. if (IS_ERR_OR_NULL(def)) {
  679. pr_err("invalid topology\n");
  680. return false;
  681. }
  682. return (def->num_ctl == 2) ? true : false;
  683. }
  684. /**
  685. * _sde_encoder_phys_is_ppsplit - check if pp_split is enabled
  686. * @phys_enc: Pointer to physical encoder structure
  687. * @Return: true or false
  688. */
  689. static inline bool _sde_encoder_phys_is_ppsplit(
  690. struct sde_encoder_phys *phys_enc)
  691. {
  692. enum sde_rm_topology_name topology;
  693. if (!phys_enc) {
  694. pr_err("invalid phys_enc\n");
  695. return false;
  696. }
  697. topology = sde_connector_get_topology_name(phys_enc->connector);
  698. if (topology == SDE_RM_TOPOLOGY_PPSPLIT)
  699. return true;
  700. return false;
  701. }
  702. static inline bool sde_encoder_phys_needs_single_flush(
  703. struct sde_encoder_phys *phys_enc)
  704. {
  705. if (!phys_enc)
  706. return false;
  707. return (_sde_encoder_phys_is_ppsplit(phys_enc) ||
  708. !_sde_encoder_phys_is_dual_ctl(phys_enc));
  709. }
  710. /**
  711. * sde_encoder_helper_phys_disable - helper function to disable virt encoder
  712. * @phys_enc: Pointer to physical encoder structure
  713. * @wb_enc: Pointer to writeback encoder structure
  714. */
  715. void sde_encoder_helper_phys_disable(struct sde_encoder_phys *phys_enc,
  716. struct sde_encoder_phys_wb *wb_enc);
  717. /**
  718. * sde_encoder_helper_setup_misr - helper function to setup misr
  719. * @phys_enc: Pointer to physical encoder structure
  720. * @enable: enable/disable flag
  721. * @frame_count: frame count for misr
  722. */
  723. void sde_encoder_helper_setup_misr(struct sde_encoder_phys *phys_enc,
  724. bool enable, u32 frame_count);
  725. /**
  726. * sde_encoder_helper_collect_misr - helper function to collect misr
  727. * @phys_enc: Pointer to physical encoder structure
  728. * @nonblock: blocking/non-blocking flag
  729. * @misr_value: pointer to misr value
  730. * @Return: zero on success
  731. */
  732. int sde_encoder_helper_collect_misr(struct sde_encoder_phys *phys_enc,
  733. bool nonblock, u32 *misr_value);
  734. #endif /* __sde_encoder_phys_H__ */