dp_rx.c 63 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef CONFIG_WIN
  32. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  33. {
  34. return vdev->ap_bridge_enabled;
  35. }
  36. #else
  37. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  38. {
  39. if (vdev->opmode != wlan_op_mode_sta)
  40. return true;
  41. else
  42. return false;
  43. }
  44. #endif
  45. #ifdef ATH_RX_PRI_SAVE
  46. static inline void dp_rx_save_tid_ts(qdf_nbuf_t nbuf, uint8_t tid, bool flag)
  47. {
  48. qdf_nbuf_set_priority(nbuf, tid);
  49. if (qdf_unlikely(flag))
  50. qdf_nbuf_set_timestamp(nbuf);
  51. }
  52. #else
  53. static inline void dp_rx_save_tid_ts(qdf_nbuf_t nbuf, uint8_t tid, bool flag)
  54. {
  55. if (qdf_unlikely(flag)) {
  56. qdf_nbuf_set_priority(nbuf, tid);
  57. qdf_nbuf_set_timestamp(nbuf);
  58. }
  59. }
  60. #endif
  61. /*
  62. * dp_rx_dump_info_and_assert() - dump RX Ring info and Rx Desc info
  63. *
  64. * @soc: core txrx main context
  65. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  66. * @ring_desc: opaque pointer to the RX ring descriptor
  67. * @rx_desc: host rs descriptor
  68. *
  69. * Return: void
  70. */
  71. void dp_rx_dump_info_and_assert(struct dp_soc *soc, void *hal_ring,
  72. void *ring_desc, struct dp_rx_desc *rx_desc)
  73. {
  74. void *hal_soc = soc->hal_soc;
  75. dp_rx_desc_dump(rx_desc);
  76. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  77. hal_srng_dump_ring(hal_soc, hal_ring);
  78. qdf_assert_always(0);
  79. }
  80. /*
  81. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  82. * called during dp rx initialization
  83. * and at the end of dp_rx_process.
  84. *
  85. * @soc: core txrx main context
  86. * @mac_id: mac_id which is one of 3 mac_ids
  87. * @dp_rxdma_srng: dp rxdma circular ring
  88. * @rx_desc_pool: Pointer to free Rx descriptor pool
  89. * @num_req_buffers: number of buffer to be replenished
  90. * @desc_list: list of descs if called from dp_rx_process
  91. * or NULL during dp rx initialization or out of buffer
  92. * interrupt.
  93. * @tail: tail of descs list
  94. * Return: return success or failure
  95. */
  96. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  97. struct dp_srng *dp_rxdma_srng,
  98. struct rx_desc_pool *rx_desc_pool,
  99. uint32_t num_req_buffers,
  100. union dp_rx_desc_list_elem_t **desc_list,
  101. union dp_rx_desc_list_elem_t **tail)
  102. {
  103. uint32_t num_alloc_desc;
  104. uint16_t num_desc_to_free = 0;
  105. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  106. uint32_t num_entries_avail;
  107. uint32_t count;
  108. int sync_hw_ptr = 1;
  109. qdf_dma_addr_t paddr;
  110. qdf_nbuf_t rx_netbuf;
  111. void *rxdma_ring_entry;
  112. union dp_rx_desc_list_elem_t *next;
  113. QDF_STATUS ret;
  114. void *rxdma_srng;
  115. rxdma_srng = dp_rxdma_srng->hal_srng;
  116. if (!rxdma_srng) {
  117. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  118. "rxdma srng not initialized");
  119. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  120. return QDF_STATUS_E_FAILURE;
  121. }
  122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  123. "requested %d buffers for replenish", num_req_buffers);
  124. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  125. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  126. rxdma_srng,
  127. sync_hw_ptr);
  128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  129. "no of available entries in rxdma ring: %d",
  130. num_entries_avail);
  131. if (!(*desc_list) && (num_entries_avail >
  132. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  133. num_req_buffers = num_entries_avail;
  134. } else if (num_entries_avail < num_req_buffers) {
  135. num_desc_to_free = num_req_buffers - num_entries_avail;
  136. num_req_buffers = num_entries_avail;
  137. }
  138. if (qdf_unlikely(!num_req_buffers)) {
  139. num_desc_to_free = num_req_buffers;
  140. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  141. goto free_descs;
  142. }
  143. /*
  144. * if desc_list is NULL, allocate the descs from freelist
  145. */
  146. if (!(*desc_list)) {
  147. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  148. rx_desc_pool,
  149. num_req_buffers,
  150. desc_list,
  151. tail);
  152. if (!num_alloc_desc) {
  153. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  154. "no free rx_descs in freelist");
  155. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  156. num_req_buffers);
  157. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  158. return QDF_STATUS_E_NOMEM;
  159. }
  160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  161. "%d rx desc allocated", num_alloc_desc);
  162. num_req_buffers = num_alloc_desc;
  163. }
  164. count = 0;
  165. while (count < num_req_buffers) {
  166. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  167. RX_BUFFER_SIZE,
  168. RX_BUFFER_RESERVATION,
  169. RX_BUFFER_ALIGNMENT,
  170. FALSE);
  171. if (!rx_netbuf) {
  172. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  173. continue;
  174. }
  175. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  176. QDF_DMA_BIDIRECTIONAL);
  177. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  178. qdf_nbuf_free(rx_netbuf);
  179. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  180. continue;
  181. }
  182. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  183. /*
  184. * check if the physical address of nbuf->data is
  185. * less then 0x50000000 then free the nbuf and try
  186. * allocating new nbuf. We can try for 100 times.
  187. * this is a temp WAR till we fix it properly.
  188. */
  189. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  190. if (ret == QDF_STATUS_E_FAILURE) {
  191. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  192. break;
  193. }
  194. count++;
  195. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  196. rxdma_srng);
  197. qdf_assert_always(rxdma_ring_entry);
  198. next = (*desc_list)->next;
  199. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  200. /* rx_desc.in_use should be zero at this time*/
  201. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  202. (*desc_list)->rx_desc.in_use = 1;
  203. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  204. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  205. (unsigned long long)paddr,
  206. (*desc_list)->rx_desc.cookie);
  207. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  208. (*desc_list)->rx_desc.cookie,
  209. rx_desc_pool->owner);
  210. *desc_list = next;
  211. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  212. }
  213. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  214. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  215. num_req_buffers, num_desc_to_free);
  216. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, num_req_buffers,
  217. (RX_BUFFER_SIZE * num_req_buffers));
  218. free_descs:
  219. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  220. /*
  221. * add any available free desc back to the free list
  222. */
  223. if (*desc_list)
  224. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  225. mac_id, rx_desc_pool);
  226. return QDF_STATUS_SUCCESS;
  227. }
  228. /*
  229. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  230. * pkts to RAW mode simulation to
  231. * decapsulate the pkt.
  232. *
  233. * @vdev: vdev on which RAW mode is enabled
  234. * @nbuf_list: list of RAW pkts to process
  235. * @peer: peer object from which the pkt is rx
  236. *
  237. * Return: void
  238. */
  239. void
  240. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  241. struct dp_peer *peer)
  242. {
  243. qdf_nbuf_t deliver_list_head = NULL;
  244. qdf_nbuf_t deliver_list_tail = NULL;
  245. qdf_nbuf_t nbuf;
  246. nbuf = nbuf_list;
  247. while (nbuf) {
  248. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  249. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  250. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  251. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  252. /*
  253. * reset the chfrag_start and chfrag_end bits in nbuf cb
  254. * as this is a non-amsdu pkt and RAW mode simulation expects
  255. * these bit s to be 0 for non-amsdu pkt.
  256. */
  257. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  258. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  259. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  260. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  261. }
  262. nbuf = next;
  263. }
  264. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  265. &deliver_list_tail, (struct cdp_peer*) peer);
  266. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  267. }
  268. #ifdef DP_LFR
  269. /*
  270. * In case of LFR, data of a new peer might be sent up
  271. * even before peer is added.
  272. */
  273. static inline struct dp_vdev *
  274. dp_get_vdev_from_peer(struct dp_soc *soc,
  275. uint16_t peer_id,
  276. struct dp_peer *peer,
  277. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  278. {
  279. struct dp_vdev *vdev;
  280. uint8_t vdev_id;
  281. if (unlikely(!peer)) {
  282. if (peer_id != HTT_INVALID_PEER) {
  283. vdev_id = DP_PEER_METADATA_ID_GET(
  284. mpdu_desc_info.peer_meta_data);
  285. QDF_TRACE(QDF_MODULE_ID_DP,
  286. QDF_TRACE_LEVEL_DEBUG,
  287. FL("PeerID %d not found use vdevID %d"),
  288. peer_id, vdev_id);
  289. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  290. vdev_id);
  291. } else {
  292. QDF_TRACE(QDF_MODULE_ID_DP,
  293. QDF_TRACE_LEVEL_DEBUG,
  294. FL("Invalid PeerID %d"),
  295. peer_id);
  296. return NULL;
  297. }
  298. } else {
  299. vdev = peer->vdev;
  300. }
  301. return vdev;
  302. }
  303. #else
  304. static inline struct dp_vdev *
  305. dp_get_vdev_from_peer(struct dp_soc *soc,
  306. uint16_t peer_id,
  307. struct dp_peer *peer,
  308. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  309. {
  310. if (unlikely(!peer)) {
  311. QDF_TRACE(QDF_MODULE_ID_DP,
  312. QDF_TRACE_LEVEL_DEBUG,
  313. FL("Peer not found for peerID %d"),
  314. peer_id);
  315. return NULL;
  316. } else {
  317. return peer->vdev;
  318. }
  319. }
  320. #endif
  321. /**
  322. * dp_rx_da_learn() - Add AST entry based on DA lookup
  323. * This is a WAR for HK 1.0 and will
  324. * be removed in HK 2.0
  325. *
  326. * @soc: core txrx main context
  327. * @rx_tlv_hdr : start address of rx tlvs
  328. * @ta_peer : Transmitter peer entry
  329. * @nbuf : nbuf to retrieve destination mac for which AST will be added
  330. *
  331. */
  332. #ifdef FEATURE_WDS
  333. static void
  334. dp_rx_da_learn(struct dp_soc *soc,
  335. uint8_t *rx_tlv_hdr,
  336. struct dp_peer *ta_peer,
  337. qdf_nbuf_t nbuf)
  338. {
  339. /* For HKv2 DA port learing is not needed */
  340. if (qdf_likely(soc->ast_override_support))
  341. return;
  342. if (qdf_unlikely(!ta_peer))
  343. return;
  344. if (qdf_unlikely(ta_peer->vdev->opmode != wlan_op_mode_ap))
  345. return;
  346. if (!soc->da_war_enabled)
  347. return;
  348. if (qdf_unlikely(!hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  349. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  350. dp_peer_add_ast(soc,
  351. ta_peer,
  352. qdf_nbuf_data(nbuf),
  353. CDP_TXRX_AST_TYPE_DA,
  354. IEEE80211_NODE_F_WDS_HM);
  355. }
  356. }
  357. #else
  358. static void
  359. dp_rx_da_learn(struct dp_soc *soc,
  360. uint8_t *rx_tlv_hdr,
  361. struct dp_peer *ta_peer,
  362. qdf_nbuf_t nbuf)
  363. {
  364. }
  365. #endif
  366. /**
  367. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  368. *
  369. * @soc: core txrx main context
  370. * @ta_peer : source peer entry
  371. * @rx_tlv_hdr : start address of rx tlvs
  372. * @nbuf : nbuf that has to be intrabss forwarded
  373. *
  374. * Return: bool: true if it is forwarded else false
  375. */
  376. static bool
  377. dp_rx_intrabss_fwd(struct dp_soc *soc,
  378. struct dp_peer *ta_peer,
  379. uint8_t *rx_tlv_hdr,
  380. qdf_nbuf_t nbuf)
  381. {
  382. uint16_t da_idx;
  383. uint16_t len;
  384. struct dp_peer *da_peer;
  385. struct dp_ast_entry *ast_entry;
  386. qdf_nbuf_t nbuf_copy;
  387. uint8_t tid = qdf_nbuf_get_priority(nbuf);
  388. struct cdp_tid_rx_stats *tid_stats =
  389. &ta_peer->vdev->pdev->stats.tid_stats.tid_rx_stats[tid];
  390. /* check if the destination peer is available in peer table
  391. * and also check if the source peer and destination peer
  392. * belong to the same vap and destination peer is not bss peer.
  393. */
  394. if ((hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  395. !hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  396. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  397. ast_entry = soc->ast_table[da_idx];
  398. if (!ast_entry)
  399. return false;
  400. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  401. ast_entry->is_active = TRUE;
  402. return false;
  403. }
  404. da_peer = ast_entry->peer;
  405. if (!da_peer)
  406. return false;
  407. /* TA peer cannot be same as peer(DA) on which AST is present
  408. * this indicates a change in topology and that AST entries
  409. * are yet to be updated.
  410. */
  411. if (da_peer == ta_peer)
  412. return false;
  413. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  414. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  415. len = qdf_nbuf_len(nbuf);
  416. /* linearize the nbuf just before we send to
  417. * dp_tx_send()
  418. */
  419. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf))) {
  420. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  421. return false;
  422. nbuf = qdf_nbuf_unshare(nbuf);
  423. if (!nbuf) {
  424. DP_STATS_INC_PKT(ta_peer,
  425. rx.intra_bss.fail,
  426. 1,
  427. len);
  428. /* return true even though the pkt is
  429. * not forwarded. Basically skb_unshare
  430. * failed and we want to continue with
  431. * next nbuf.
  432. */
  433. tid_stats->fail_cnt[INTRABSS_DROP]++;
  434. return true;
  435. }
  436. }
  437. if (!dp_tx_send(ta_peer->vdev, nbuf)) {
  438. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  439. len);
  440. return true;
  441. } else {
  442. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  443. len);
  444. tid_stats->fail_cnt[INTRABSS_DROP]++;
  445. return false;
  446. }
  447. }
  448. }
  449. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  450. * source, then clone the pkt and send the cloned pkt for
  451. * intra BSS forwarding and original pkt up the network stack
  452. * Note: how do we handle multicast pkts. do we forward
  453. * all multicast pkts as is or let a higher layer module
  454. * like igmpsnoop decide whether to forward or not with
  455. * Mcast enhancement.
  456. */
  457. else if (qdf_unlikely((hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  458. !ta_peer->bss_peer))) {
  459. nbuf_copy = qdf_nbuf_copy(nbuf);
  460. if (!nbuf_copy)
  461. return false;
  462. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  463. len = qdf_nbuf_len(nbuf_copy);
  464. if (dp_tx_send(ta_peer->vdev, nbuf_copy)) {
  465. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  466. tid_stats->fail_cnt[INTRABSS_DROP]++;
  467. qdf_nbuf_free(nbuf_copy);
  468. } else {
  469. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  470. tid_stats->intrabss_cnt++;
  471. }
  472. }
  473. /* return false as we have to still send the original pkt
  474. * up the stack
  475. */
  476. return false;
  477. }
  478. #ifdef MESH_MODE_SUPPORT
  479. /**
  480. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  481. *
  482. * @vdev: DP Virtual device handle
  483. * @nbuf: Buffer pointer
  484. * @rx_tlv_hdr: start of rx tlv header
  485. * @peer: pointer to peer
  486. *
  487. * This function allocated memory for mesh receive stats and fill the
  488. * required stats. Stores the memory address in skb cb.
  489. *
  490. * Return: void
  491. */
  492. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  493. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  494. {
  495. struct mesh_recv_hdr_s *rx_info = NULL;
  496. uint32_t pkt_type;
  497. uint32_t nss;
  498. uint32_t rate_mcs;
  499. uint32_t bw;
  500. /* fill recv mesh stats */
  501. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  502. /* upper layers are resposible to free this memory */
  503. if (!rx_info) {
  504. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  505. "Memory allocation failed for mesh rx stats");
  506. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  507. return;
  508. }
  509. rx_info->rs_flags = MESH_RXHDR_VER1;
  510. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  511. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  512. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  513. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  514. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  515. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  516. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  517. if (vdev->osif_get_key)
  518. vdev->osif_get_key(vdev->osif_vdev,
  519. &rx_info->rs_decryptkey[0],
  520. &peer->mac_addr.raw[0],
  521. rx_info->rs_keyix);
  522. }
  523. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  524. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  525. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  526. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  527. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  528. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  529. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  530. (bw << 24);
  531. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  532. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  533. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  534. rx_info->rs_flags,
  535. rx_info->rs_rssi,
  536. rx_info->rs_channel,
  537. rx_info->rs_ratephy1,
  538. rx_info->rs_keyix);
  539. }
  540. /**
  541. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  542. *
  543. * @vdev: DP Virtual device handle
  544. * @nbuf: Buffer pointer
  545. * @rx_tlv_hdr: start of rx tlv header
  546. *
  547. * This checks if the received packet is matching any filter out
  548. * catogery and and drop the packet if it matches.
  549. *
  550. * Return: status(0 indicates drop, 1 indicate to no drop)
  551. */
  552. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  553. uint8_t *rx_tlv_hdr)
  554. {
  555. union dp_align_mac_addr mac_addr;
  556. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  557. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  558. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  559. return QDF_STATUS_SUCCESS;
  560. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  561. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  562. return QDF_STATUS_SUCCESS;
  563. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  564. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  565. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  566. return QDF_STATUS_SUCCESS;
  567. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  568. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  569. &mac_addr.raw[0]))
  570. return QDF_STATUS_E_FAILURE;
  571. if (!qdf_mem_cmp(&mac_addr.raw[0],
  572. &vdev->mac_addr.raw[0],
  573. QDF_MAC_ADDR_SIZE))
  574. return QDF_STATUS_SUCCESS;
  575. }
  576. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  577. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  578. &mac_addr.raw[0]))
  579. return QDF_STATUS_E_FAILURE;
  580. if (!qdf_mem_cmp(&mac_addr.raw[0],
  581. &vdev->mac_addr.raw[0],
  582. QDF_MAC_ADDR_SIZE))
  583. return QDF_STATUS_SUCCESS;
  584. }
  585. }
  586. return QDF_STATUS_E_FAILURE;
  587. }
  588. #else
  589. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  590. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  591. {
  592. }
  593. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  594. uint8_t *rx_tlv_hdr)
  595. {
  596. return QDF_STATUS_E_FAILURE;
  597. }
  598. #endif
  599. #ifdef CONFIG_WIN
  600. /**
  601. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  602. * clients
  603. * @pdev: DP pdev handle
  604. * @rx_pkt_hdr: Rx packet Header
  605. *
  606. * return: dp_vdev*
  607. */
  608. static
  609. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  610. uint8_t *rx_pkt_hdr)
  611. {
  612. struct ieee80211_frame *wh;
  613. struct dp_neighbour_peer *peer = NULL;
  614. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  615. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  616. return NULL;
  617. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  618. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  619. neighbour_peer_list_elem) {
  620. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  621. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  622. QDF_TRACE(
  623. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  624. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  625. peer->neighbour_peers_macaddr.raw[0],
  626. peer->neighbour_peers_macaddr.raw[1],
  627. peer->neighbour_peers_macaddr.raw[2],
  628. peer->neighbour_peers_macaddr.raw[3],
  629. peer->neighbour_peers_macaddr.raw[4],
  630. peer->neighbour_peers_macaddr.raw[5]);
  631. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  632. return pdev->monitor_vdev;
  633. }
  634. }
  635. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  636. return NULL;
  637. }
  638. /**
  639. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  640. * @soc: DP SOC handle
  641. * @mpdu: mpdu for which peer is invalid
  642. *
  643. * return: integer type
  644. */
  645. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  646. {
  647. struct dp_invalid_peer_msg msg;
  648. struct dp_vdev *vdev = NULL;
  649. struct dp_pdev *pdev = NULL;
  650. struct ieee80211_frame *wh;
  651. uint8_t i;
  652. qdf_nbuf_t curr_nbuf, next_nbuf;
  653. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  654. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  655. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  657. "Drop decapped frames");
  658. goto free;
  659. }
  660. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  661. if (!DP_FRAME_IS_DATA(wh)) {
  662. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  663. "NAWDS valid only for data frames");
  664. goto free;
  665. }
  666. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  668. "Invalid nbuf length");
  669. goto free;
  670. }
  671. for (i = 0; i < MAX_PDEV_CNT; i++) {
  672. pdev = soc->pdev_list[i];
  673. if (!pdev) {
  674. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  675. "PDEV not found");
  676. continue;
  677. }
  678. if (pdev->filter_neighbour_peers) {
  679. /* Next Hop scenario not yet handle */
  680. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  681. if (vdev) {
  682. dp_rx_mon_deliver(soc, i,
  683. pdev->invalid_peer_head_msdu,
  684. pdev->invalid_peer_tail_msdu);
  685. pdev->invalid_peer_head_msdu = NULL;
  686. pdev->invalid_peer_tail_msdu = NULL;
  687. return 0;
  688. }
  689. }
  690. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  691. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  692. QDF_MAC_ADDR_SIZE) == 0) {
  693. goto out;
  694. }
  695. }
  696. }
  697. if (!vdev) {
  698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  699. "VDEV not found");
  700. goto free;
  701. }
  702. out:
  703. msg.wh = wh;
  704. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  705. msg.nbuf = mpdu;
  706. msg.vdev_id = vdev->vdev_id;
  707. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  708. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  709. &msg);
  710. free:
  711. /* Drop and free packet */
  712. curr_nbuf = mpdu;
  713. while (curr_nbuf) {
  714. next_nbuf = qdf_nbuf_next(curr_nbuf);
  715. qdf_nbuf_free(curr_nbuf);
  716. curr_nbuf = next_nbuf;
  717. }
  718. return 0;
  719. }
  720. /**
  721. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  722. * @soc: DP SOC handle
  723. * @mpdu: mpdu for which peer is invalid
  724. * @mpdu_done: if an mpdu is completed
  725. *
  726. * return: integer type
  727. */
  728. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  729. qdf_nbuf_t mpdu, bool mpdu_done)
  730. {
  731. /* Only trigger the process when mpdu is completed */
  732. if (mpdu_done)
  733. dp_rx_process_invalid_peer(soc, mpdu);
  734. }
  735. #else
  736. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu)
  737. {
  738. qdf_nbuf_t curr_nbuf, next_nbuf;
  739. struct dp_pdev *pdev;
  740. uint8_t i;
  741. struct dp_vdev *vdev = NULL;
  742. struct ieee80211_frame *wh;
  743. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  744. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  745. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  746. if (!DP_FRAME_IS_DATA(wh)) {
  747. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  748. "only for data frames");
  749. goto free;
  750. }
  751. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  753. "Invalid nbuf length");
  754. goto free;
  755. }
  756. for (i = 0; i < MAX_PDEV_CNT; i++) {
  757. pdev = soc->pdev_list[i];
  758. if (!pdev) {
  759. QDF_TRACE(QDF_MODULE_ID_DP,
  760. QDF_TRACE_LEVEL_ERROR,
  761. "PDEV not found");
  762. continue;
  763. }
  764. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  765. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  766. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  767. QDF_MAC_ADDR_SIZE) == 0) {
  768. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  769. goto out;
  770. }
  771. }
  772. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  773. }
  774. if (!vdev) {
  775. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  776. "VDEV not found");
  777. goto free;
  778. }
  779. out:
  780. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  781. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  782. free:
  783. /* reset the head and tail pointers */
  784. for (i = 0; i < MAX_PDEV_CNT; i++) {
  785. pdev = soc->pdev_list[i];
  786. if (!pdev) {
  787. QDF_TRACE(QDF_MODULE_ID_DP,
  788. QDF_TRACE_LEVEL_ERROR,
  789. "PDEV not found");
  790. continue;
  791. }
  792. pdev->invalid_peer_head_msdu = NULL;
  793. pdev->invalid_peer_tail_msdu = NULL;
  794. }
  795. /* Drop and free packet */
  796. curr_nbuf = mpdu;
  797. while (curr_nbuf) {
  798. next_nbuf = qdf_nbuf_next(curr_nbuf);
  799. qdf_nbuf_free(curr_nbuf);
  800. curr_nbuf = next_nbuf;
  801. }
  802. return 0;
  803. }
  804. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  805. qdf_nbuf_t mpdu, bool mpdu_done)
  806. {
  807. /* Process the nbuf */
  808. dp_rx_process_invalid_peer(soc, mpdu);
  809. }
  810. #endif
  811. #ifdef RECEIVE_OFFLOAD
  812. /**
  813. * dp_rx_print_offload_info() - Print offload info from RX TLV
  814. * @rx_tlv: RX TLV for which offload information is to be printed
  815. *
  816. * Return: None
  817. */
  818. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  819. {
  820. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  821. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  822. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  823. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  824. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  825. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  826. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  827. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  828. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  829. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  830. dp_verbose_debug("---------------------------------------------------------");
  831. }
  832. /**
  833. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  834. * @soc: DP SOC handle
  835. * @rx_tlv: RX TLV received for the msdu
  836. * @msdu: msdu for which GRO info needs to be filled
  837. *
  838. * Return: None
  839. */
  840. static
  841. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  842. qdf_nbuf_t msdu)
  843. {
  844. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  845. return;
  846. /* Filling up RX offload info only for TCP packets */
  847. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  848. return;
  849. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  850. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  851. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  852. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  853. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  854. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  855. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  856. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  857. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  858. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  859. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  860. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  861. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  862. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  863. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  864. HAL_RX_TLV_GET_IPV6(rx_tlv);
  865. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  866. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  867. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  868. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  869. dp_rx_print_offload_info(rx_tlv);
  870. }
  871. #else
  872. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  873. qdf_nbuf_t msdu)
  874. {
  875. }
  876. #endif /* RECEIVE_OFFLOAD */
  877. /**
  878. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  879. *
  880. * @nbuf: pointer to msdu.
  881. * @mpdu_len: mpdu length
  882. *
  883. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  884. */
  885. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  886. {
  887. bool last_nbuf;
  888. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  889. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  890. last_nbuf = false;
  891. } else {
  892. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  893. last_nbuf = true;
  894. }
  895. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  896. return last_nbuf;
  897. }
  898. /**
  899. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  900. * multiple nbufs.
  901. * @nbuf: pointer to the first msdu of an amsdu.
  902. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  903. *
  904. *
  905. * This function implements the creation of RX frag_list for cases
  906. * where an MSDU is spread across multiple nbufs.
  907. *
  908. * Return: returns the head nbuf which contains complete frag_list.
  909. */
  910. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  911. {
  912. qdf_nbuf_t parent, next, frag_list;
  913. uint16_t frag_list_len = 0;
  914. uint16_t mpdu_len;
  915. bool last_nbuf;
  916. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  917. /*
  918. * this is a case where the complete msdu fits in one single nbuf.
  919. * in this case HW sets both start and end bit and we only need to
  920. * reset these bits for RAW mode simulator to decap the pkt
  921. */
  922. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  923. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  924. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  925. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  926. return nbuf;
  927. }
  928. /*
  929. * This is a case where we have multiple msdus (A-MSDU) spread across
  930. * multiple nbufs. here we create a fraglist out of these nbufs.
  931. *
  932. * the moment we encounter a nbuf with continuation bit set we
  933. * know for sure we have an MSDU which is spread across multiple
  934. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  935. */
  936. parent = nbuf;
  937. frag_list = nbuf->next;
  938. nbuf = nbuf->next;
  939. /*
  940. * set the start bit in the first nbuf we encounter with continuation
  941. * bit set. This has the proper mpdu length set as it is the first
  942. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  943. * nbufs will form the frag_list of the parent nbuf.
  944. */
  945. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  946. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  947. /*
  948. * this is where we set the length of the fragments which are
  949. * associated to the parent nbuf. We iterate through the frag_list
  950. * till we hit the last_nbuf of the list.
  951. */
  952. do {
  953. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  954. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  955. frag_list_len += qdf_nbuf_len(nbuf);
  956. if (last_nbuf) {
  957. next = nbuf->next;
  958. nbuf->next = NULL;
  959. break;
  960. }
  961. nbuf = nbuf->next;
  962. } while (!last_nbuf);
  963. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  964. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  965. parent->next = next;
  966. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  967. return parent;
  968. }
  969. /**
  970. * dp_rx_compute_delay() - Compute and fill in all timestamps
  971. * to pass in correct fields
  972. *
  973. * @vdev: pdev handle
  974. * @tx_desc: tx descriptor
  975. * @tid: tid value
  976. * Return: none
  977. */
  978. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  979. {
  980. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  981. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  982. uint8_t tid = qdf_nbuf_get_priority(nbuf);
  983. uint32_t interframe_delay =
  984. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  985. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  986. CDP_DELAY_STATS_REAP_STACK);
  987. /*
  988. * Update interframe delay stats calculated at deliver_data_ol point.
  989. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  990. * interframe delay will not be calculate correctly for 1st frame.
  991. * On the other side, this will help in avoiding extra per packet check
  992. * of vdev->prev_rx_deliver_tstamp.
  993. */
  994. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  995. CDP_DELAY_STATS_RX_INTERFRAME);
  996. vdev->prev_rx_deliver_tstamp = current_ts;
  997. }
  998. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  999. struct dp_peer *peer,
  1000. qdf_nbuf_t nbuf_head,
  1001. qdf_nbuf_t nbuf_tail)
  1002. {
  1003. struct cdp_tid_rx_stats *stats = NULL;
  1004. uint8_t tid = 0;
  1005. /*
  1006. * highly unlikely to have a vdev without a registered rx
  1007. * callback function. if so let us free the nbuf_list.
  1008. */
  1009. if (qdf_unlikely(!vdev->osif_rx)) {
  1010. qdf_nbuf_t nbuf;
  1011. do {
  1012. nbuf = nbuf_head;
  1013. nbuf_head = nbuf_head->next;
  1014. tid = qdf_nbuf_get_priority(nbuf);
  1015. stats = &vdev->pdev->stats.tid_stats.tid_rx_stats[tid];
  1016. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1017. stats->delivered_to_stack--;
  1018. qdf_nbuf_free(nbuf);
  1019. } while (nbuf_head);
  1020. return;
  1021. }
  1022. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1023. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1024. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1025. &nbuf_tail, (struct cdp_peer *) peer);
  1026. }
  1027. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1028. }
  1029. /**
  1030. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1031. * @nbuf: pointer to the first msdu of an amsdu.
  1032. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1033. *
  1034. * The ipsumed field of the skb is set based on whether HW validated the
  1035. * IP/TCP/UDP checksum.
  1036. *
  1037. * Return: void
  1038. */
  1039. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1040. qdf_nbuf_t nbuf,
  1041. uint8_t *rx_tlv_hdr)
  1042. {
  1043. qdf_nbuf_rx_cksum_t cksum = {0};
  1044. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1045. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1046. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1047. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1048. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1049. } else {
  1050. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1051. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1052. }
  1053. }
  1054. /**
  1055. * dp_rx_msdu_stats_update() - update per msdu stats.
  1056. * @soc: core txrx main context
  1057. * @nbuf: pointer to the first msdu of an amsdu.
  1058. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1059. * @peer: pointer to the peer object.
  1060. * @ring_id: reo dest ring number on which pkt is reaped.
  1061. *
  1062. * update all the per msdu stats for that nbuf.
  1063. * Return: void
  1064. */
  1065. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1066. qdf_nbuf_t nbuf,
  1067. uint8_t *rx_tlv_hdr,
  1068. struct dp_peer *peer,
  1069. uint8_t ring_id)
  1070. {
  1071. bool is_ampdu, is_not_amsdu;
  1072. uint16_t peer_id;
  1073. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1074. struct dp_vdev *vdev = peer->vdev;
  1075. qdf_ether_header_t *eh;
  1076. uint16_t msdu_len = qdf_nbuf_len(nbuf);
  1077. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  1078. hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr));
  1079. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1080. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1081. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1082. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1083. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1084. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  1085. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1086. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1087. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1088. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1089. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1090. }
  1091. }
  1092. /*
  1093. * currently we can return from here as we have similar stats
  1094. * updated at per ppdu level instead of msdu level
  1095. */
  1096. if (!soc->process_rx_status)
  1097. return;
  1098. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1099. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1100. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1101. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1102. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1103. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc, rx_tlv_hdr);
  1104. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1105. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1106. rx_tlv_hdr);
  1107. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1108. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1109. DP_STATS_INC(peer, rx.bw[bw], 1);
  1110. DP_STATS_INC(peer, rx.nss[nss], 1);
  1111. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1112. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1113. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1114. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1115. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1116. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1117. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1118. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1119. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1120. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1121. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1122. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1123. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1124. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1125. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1126. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1127. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1128. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1129. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1130. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1131. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1132. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1133. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1134. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1135. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1136. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1137. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1138. if ((soc->process_rx_status) &&
  1139. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1140. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1141. if (!vdev->pdev)
  1142. return;
  1143. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1144. &peer->stats, peer_id,
  1145. UPDATE_PEER_STATS,
  1146. vdev->pdev->pdev_id);
  1147. #endif
  1148. }
  1149. }
  1150. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1151. void *rx_tlv_hdr)
  1152. {
  1153. if ((hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr) &&
  1154. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1155. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1156. (hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr) &&
  1157. (hal_rx_msdu_end_da_idx_get(soc->hal_soc,
  1158. rx_tlv_hdr) >
  1159. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1160. return false;
  1161. return true;
  1162. }
  1163. #ifdef WDS_VENDOR_EXTENSION
  1164. int dp_wds_rx_policy_check(
  1165. uint8_t *rx_tlv_hdr,
  1166. struct dp_vdev *vdev,
  1167. struct dp_peer *peer,
  1168. int rx_mcast
  1169. )
  1170. {
  1171. struct dp_peer *bss_peer;
  1172. int fr_ds, to_ds, rx_3addr, rx_4addr;
  1173. int rx_policy_ucast, rx_policy_mcast;
  1174. if (vdev->opmode == wlan_op_mode_ap) {
  1175. TAILQ_FOREACH(bss_peer, &vdev->peer_list, peer_list_elem) {
  1176. if (bss_peer->bss_peer) {
  1177. /* if wds policy check is not enabled on this vdev, accept all frames */
  1178. if (!bss_peer->wds_ecm.wds_rx_filter) {
  1179. return 1;
  1180. }
  1181. break;
  1182. }
  1183. }
  1184. rx_policy_ucast = bss_peer->wds_ecm.wds_rx_ucast_4addr;
  1185. rx_policy_mcast = bss_peer->wds_ecm.wds_rx_mcast_4addr;
  1186. } else { /* sta mode */
  1187. if (!peer->wds_ecm.wds_rx_filter) {
  1188. return 1;
  1189. }
  1190. rx_policy_ucast = peer->wds_ecm.wds_rx_ucast_4addr;
  1191. rx_policy_mcast = peer->wds_ecm.wds_rx_mcast_4addr;
  1192. }
  1193. /* ------------------------------------------------
  1194. * self
  1195. * peer- rx rx-
  1196. * wds ucast mcast dir policy accept note
  1197. * ------------------------------------------------
  1198. * 1 1 0 11 x1 1 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint met; so, accept
  1199. * 1 1 0 01 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1200. * 1 1 0 10 x1 0 AP configured to accept ds-to-ds Rx ucast from wds peers, constraint not met; so, drop
  1201. * 1 1 0 00 x1 0 bad frame, won't see it
  1202. * 1 0 1 11 1x 1 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint met; so, accept
  1203. * 1 0 1 01 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1204. * 1 0 1 10 1x 0 AP configured to accept ds-to-ds Rx mcast from wds peers, constraint not met; so, drop
  1205. * 1 0 1 00 1x 0 bad frame, won't see it
  1206. * 1 1 0 11 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1207. * 1 1 0 01 x0 0 AP configured to accept from-ds Rx ucast from wds peers, constraint not met; so, drop
  1208. * 1 1 0 10 x0 1 AP configured to accept from-ds Rx ucast from wds peers, constraint met; so, accept
  1209. * 1 1 0 00 x0 0 bad frame, won't see it
  1210. * 1 0 1 11 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1211. * 1 0 1 01 0x 0 AP configured to accept from-ds Rx mcast from wds peers, constraint not met; so, drop
  1212. * 1 0 1 10 0x 1 AP configured to accept from-ds Rx mcast from wds peers, constraint met; so, accept
  1213. * 1 0 1 00 0x 0 bad frame, won't see it
  1214. *
  1215. * 0 x x 11 xx 0 we only accept td-ds Rx frames from non-wds peers in mode.
  1216. * 0 x x 01 xx 1
  1217. * 0 x x 10 xx 0
  1218. * 0 x x 00 xx 0 bad frame, won't see it
  1219. * ------------------------------------------------
  1220. */
  1221. fr_ds = hal_rx_mpdu_get_fr_ds(rx_tlv_hdr);
  1222. to_ds = hal_rx_mpdu_get_to_ds(rx_tlv_hdr);
  1223. rx_3addr = fr_ds ^ to_ds;
  1224. rx_4addr = fr_ds & to_ds;
  1225. if (vdev->opmode == wlan_op_mode_ap) {
  1226. if ((!peer->wds_enabled && rx_3addr && to_ds) ||
  1227. (peer->wds_enabled && !rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1228. (peer->wds_enabled && rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1229. return 1;
  1230. }
  1231. } else { /* sta mode */
  1232. if ((!rx_mcast && (rx_4addr == rx_policy_ucast)) ||
  1233. (rx_mcast && (rx_4addr == rx_policy_mcast))) {
  1234. return 1;
  1235. }
  1236. }
  1237. return 0;
  1238. }
  1239. #else
  1240. int dp_wds_rx_policy_check(
  1241. uint8_t *rx_tlv_hdr,
  1242. struct dp_vdev *vdev,
  1243. struct dp_peer *peer,
  1244. int rx_mcast
  1245. )
  1246. {
  1247. return 1;
  1248. }
  1249. #endif
  1250. #ifdef RX_DESC_DEBUG_CHECK
  1251. /**
  1252. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1253. * corruption
  1254. *
  1255. * @ring_desc: REO ring descriptor
  1256. * @rx_desc: Rx descriptor
  1257. *
  1258. * Return: NONE
  1259. */
  1260. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1261. struct dp_rx_desc *rx_desc)
  1262. {
  1263. struct hal_buf_info hbi;
  1264. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1265. /* Sanity check for possible buffer paddr corruption */
  1266. qdf_assert_always((&hbi)->paddr ==
  1267. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1268. }
  1269. #else
  1270. static inline void dp_rx_desc_nbuf_sanity_check(void *ring_desc,
  1271. struct dp_rx_desc *rx_desc)
  1272. {
  1273. }
  1274. #endif
  1275. /**
  1276. * dp_rx_process() - Brain of the Rx processing functionality
  1277. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1278. * @soc: core txrx main context
  1279. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1280. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1281. * @quota: No. of units (packets) that can be serviced in one shot.
  1282. *
  1283. * This function implements the core of Rx functionality. This is
  1284. * expected to handle only non-error frames.
  1285. *
  1286. * Return: uint32_t: No. of elements processed
  1287. */
  1288. uint32_t dp_rx_process(struct dp_intr *int_ctx, void *hal_ring,
  1289. uint8_t reo_ring_num, uint32_t quota)
  1290. {
  1291. void *hal_soc;
  1292. void *ring_desc;
  1293. struct dp_rx_desc *rx_desc = NULL;
  1294. qdf_nbuf_t nbuf, next;
  1295. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  1296. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  1297. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1298. uint32_t l2_hdr_offset = 0;
  1299. uint16_t msdu_len = 0;
  1300. uint16_t peer_id;
  1301. struct dp_peer *peer = NULL;
  1302. struct dp_vdev *vdev = NULL;
  1303. uint32_t pkt_len = 0;
  1304. struct hal_rx_mpdu_desc_info mpdu_desc_info = { 0 };
  1305. struct hal_rx_msdu_desc_info msdu_desc_info = { 0 };
  1306. enum hal_reo_error_status error;
  1307. uint32_t peer_mdata;
  1308. uint8_t *rx_tlv_hdr;
  1309. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  1310. uint8_t mac_id = 0;
  1311. struct dp_pdev *pdev;
  1312. struct dp_pdev *rx_pdev;
  1313. struct dp_srng *dp_rxdma_srng;
  1314. struct rx_desc_pool *rx_desc_pool;
  1315. struct dp_soc *soc = int_ctx->soc;
  1316. uint8_t ring_id = 0;
  1317. uint8_t core_id = 0;
  1318. qdf_nbuf_t nbuf_head = NULL;
  1319. qdf_nbuf_t nbuf_tail = NULL;
  1320. qdf_nbuf_t deliver_list_head = NULL;
  1321. qdf_nbuf_t deliver_list_tail = NULL;
  1322. int32_t tid = 0;
  1323. uint32_t dst_num_valid = 0;
  1324. struct cdp_tid_rx_stats *tid_stats;
  1325. DP_HIST_INIT();
  1326. /* Debug -- Remove later */
  1327. qdf_assert(soc && hal_ring);
  1328. hal_soc = soc->hal_soc;
  1329. /* Debug -- Remove later */
  1330. qdf_assert(hal_soc);
  1331. hif_pm_runtime_mark_last_busy(soc->osdev->dev);
  1332. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  1333. /*
  1334. * Need API to convert from hal_ring pointer to
  1335. * Ring Type / Ring Id combo
  1336. */
  1337. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1338. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1339. FL("HAL RING Access Failed -- %pK"), hal_ring);
  1340. hal_srng_access_end(hal_soc, hal_ring);
  1341. goto done;
  1342. }
  1343. /*
  1344. * start reaping the buffers from reo ring and queue
  1345. * them in per vdev queue.
  1346. * Process the received pkts in a different per vdev loop.
  1347. */
  1348. while (qdf_likely(quota)) {
  1349. ring_desc = hal_srng_dst_get_next(hal_soc, hal_ring);
  1350. /*
  1351. * in case HW has updated hp after we cached the hp
  1352. * ring_desc can be NULL even there are entries
  1353. * available in the ring. Update the cached_hp
  1354. * and reap the buffers available to read complete
  1355. * mpdu in one reap
  1356. *
  1357. * This is needed for RAW mode we have to read all
  1358. * msdus corresponding to amsdu in one reap to create
  1359. * SG list properly but due to mismatch in cached_hp
  1360. * and actual hp sometimes we are unable to read
  1361. * complete mpdu in one reap.
  1362. */
  1363. if (qdf_unlikely(!ring_desc)) {
  1364. dst_num_valid = hal_srng_dst_num_valid(hal_soc,
  1365. hal_ring,
  1366. true);
  1367. if (dst_num_valid) {
  1368. DP_STATS_INC(soc, rx.hp_oos, 1);
  1369. hal_srng_access_end_unlocked(hal_soc,
  1370. hal_ring);
  1371. continue;
  1372. } else {
  1373. break;
  1374. }
  1375. }
  1376. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1377. ring_id = hal_srng_ring_id_get(hal_ring);
  1378. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1379. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1380. FL("HAL RING 0x%pK:error %d"), hal_ring, error);
  1381. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1382. /* Don't know how to deal with this -- assert */
  1383. qdf_assert(0);
  1384. }
  1385. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1386. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1387. qdf_assert(rx_desc);
  1388. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1389. /*
  1390. * this is a unlikely scenario where the host is reaping
  1391. * a descriptor which it already reaped just a while ago
  1392. * but is yet to replenish it back to HW.
  1393. * In this case host will dump the last 128 descriptors
  1394. * including the software descriptor rx_desc and assert.
  1395. */
  1396. if (qdf_unlikely(!rx_desc->in_use)) {
  1397. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1398. dp_err("Reaping rx_desc not in use!");
  1399. dp_rx_dump_info_and_assert(soc, hal_ring,
  1400. ring_desc, rx_desc);
  1401. }
  1402. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1403. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1404. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1405. dp_rx_dump_info_and_assert(soc, hal_ring,
  1406. ring_desc, rx_desc);
  1407. }
  1408. rx_bufs_reaped[rx_desc->pool_id]++;
  1409. /* TODO */
  1410. /*
  1411. * Need a separate API for unmapping based on
  1412. * phyiscal address
  1413. */
  1414. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1415. QDF_DMA_BIDIRECTIONAL);
  1416. rx_desc->unmapped = 1;
  1417. core_id = smp_processor_id();
  1418. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1419. /* Get MPDU DESC info */
  1420. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1421. hal_rx_mpdu_peer_meta_data_set(qdf_nbuf_data(rx_desc->nbuf),
  1422. mpdu_desc_info.peer_meta_data);
  1423. /* Get MSDU DESC info */
  1424. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1425. /*
  1426. * save msdu flags first, last and continuation msdu in
  1427. * nbuf->cb
  1428. */
  1429. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1430. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1431. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1432. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1433. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1434. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1435. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1436. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1437. /*
  1438. * if continuation bit is set then we have MSDU spread
  1439. * across multiple buffers, let us not decrement quota
  1440. * till we reap all buffers of that MSDU.
  1441. */
  1442. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1443. quota -= 1;
  1444. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1445. &tail[rx_desc->pool_id],
  1446. rx_desc);
  1447. }
  1448. done:
  1449. hal_srng_access_end(hal_soc, hal_ring);
  1450. if (nbuf_tail)
  1451. QDF_NBUF_CB_RX_FLUSH_IND(nbuf_tail) = 1;
  1452. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1453. /*
  1454. * continue with next mac_id if no pkts were reaped
  1455. * from that pool
  1456. */
  1457. if (!rx_bufs_reaped[mac_id])
  1458. continue;
  1459. pdev = soc->pdev_list[mac_id];
  1460. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1461. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1462. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1463. rx_desc_pool, rx_bufs_reaped[mac_id],
  1464. &head[mac_id], &tail[mac_id]);
  1465. }
  1466. /* Peer can be NULL is case of LFR */
  1467. if (qdf_likely(peer))
  1468. vdev = NULL;
  1469. /*
  1470. * BIG loop where each nbuf is dequeued from global queue,
  1471. * processed and queued back on a per vdev basis. These nbufs
  1472. * are sent to stack as and when we run out of nbufs
  1473. * or a new nbuf dequeued from global queue has a different
  1474. * vdev when compared to previous nbuf.
  1475. */
  1476. nbuf = nbuf_head;
  1477. while (nbuf) {
  1478. next = nbuf->next;
  1479. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1480. /* Get TID from first msdu per MPDU, save to skb->priority */
  1481. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1482. tid = hal_rx_mpdu_start_tid_get(soc->hal_soc,
  1483. rx_tlv_hdr);
  1484. /*
  1485. * Check if DMA completed -- msdu_done is the last bit
  1486. * to be written
  1487. */
  1488. rx_pdev = soc->pdev_list[rx_desc->pool_id];
  1489. dp_rx_save_tid_ts(nbuf, tid, rx_pdev->delay_stats_flag);
  1490. tid_stats = &rx_pdev->stats.tid_stats.tid_rx_stats[tid];
  1491. if (qdf_unlikely(!hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1492. dp_err("MSDU DONE failure");
  1493. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1494. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1495. QDF_TRACE_LEVEL_INFO);
  1496. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1497. qdf_nbuf_free(nbuf);
  1498. qdf_assert(0);
  1499. nbuf = next;
  1500. continue;
  1501. }
  1502. tid_stats->msdu_cnt++;
  1503. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1504. tid_stats->mcast_msdu_cnt++;
  1505. if (qdf_nbuf_is_bcast_pkt(nbuf))
  1506. tid_stats->bcast_msdu_cnt++;
  1507. }
  1508. peer_mdata = hal_rx_mpdu_peer_meta_data_get(rx_tlv_hdr);
  1509. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1510. peer = dp_peer_find_by_id(soc, peer_id);
  1511. if (peer) {
  1512. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1513. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1514. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1515. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1516. QDF_NBUF_RX_PKT_DATA_TRACK;
  1517. }
  1518. rx_bufs_used++;
  1519. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1520. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1521. deliver_list_tail);
  1522. deliver_list_head = NULL;
  1523. deliver_list_tail = NULL;
  1524. }
  1525. if (qdf_likely(peer)) {
  1526. vdev = peer->vdev;
  1527. } else {
  1528. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1529. qdf_nbuf_len(nbuf));
  1530. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1531. qdf_nbuf_free(nbuf);
  1532. nbuf = next;
  1533. continue;
  1534. }
  1535. if (qdf_unlikely(!vdev)) {
  1536. tid_stats->fail_cnt[INVALID_PEER_VDEV]++;
  1537. qdf_nbuf_free(nbuf);
  1538. nbuf = next;
  1539. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1540. dp_peer_unref_del_find_by_id(peer);
  1541. continue;
  1542. }
  1543. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1544. /*
  1545. * First IF condition:
  1546. * 802.11 Fragmented pkts are reinjected to REO
  1547. * HW block as SG pkts and for these pkts we only
  1548. * need to pull the RX TLVS header length.
  1549. * Second IF condition:
  1550. * The below condition happens when an MSDU is spread
  1551. * across multiple buffers. This can happen in two cases
  1552. * 1. The nbuf size is smaller then the received msdu.
  1553. * ex: we have set the nbuf size to 2048 during
  1554. * nbuf_alloc. but we received an msdu which is
  1555. * 2304 bytes in size then this msdu is spread
  1556. * across 2 nbufs.
  1557. *
  1558. * 2. AMSDUs when RAW mode is enabled.
  1559. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1560. * across 1st nbuf and 2nd nbuf and last MSDU is
  1561. * spread across 2nd nbuf and 3rd nbuf.
  1562. *
  1563. * for these scenarios let us create a skb frag_list and
  1564. * append these buffers till the last MSDU of the AMSDU
  1565. * Third condition:
  1566. * This is the most likely case, we receive 802.3 pkts
  1567. * decapsulated by HW, here we need to set the pkt length.
  1568. */
  1569. if (qdf_unlikely(qdf_nbuf_get_ext_list(nbuf)))
  1570. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1571. else if (qdf_unlikely(vdev->rx_decap_type ==
  1572. htt_cmn_pkt_type_raw)) {
  1573. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1574. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1575. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1576. DP_STATS_INC_PKT(peer, rx.raw, 1,
  1577. msdu_len);
  1578. next = nbuf->next;
  1579. } else {
  1580. l2_hdr_offset =
  1581. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1582. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  1583. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1584. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1585. qdf_nbuf_pull_head(nbuf,
  1586. RX_PKT_TLVS_LEN +
  1587. l2_hdr_offset);
  1588. }
  1589. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  1590. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  1591. QDF_TRACE(QDF_MODULE_ID_DP,
  1592. QDF_TRACE_LEVEL_ERROR,
  1593. FL("Policy Check Drop pkt"));
  1594. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1595. /* Drop & free packet */
  1596. qdf_nbuf_free(nbuf);
  1597. /* Statistics */
  1598. nbuf = next;
  1599. dp_peer_unref_del_find_by_id(peer);
  1600. continue;
  1601. }
  1602. if (qdf_unlikely(peer && peer->bss_peer)) {
  1603. QDF_TRACE(QDF_MODULE_ID_DP,
  1604. QDF_TRACE_LEVEL_ERROR,
  1605. FL("received pkt with same src MAC"));
  1606. tid_stats->fail_cnt[MEC_DROP]++;
  1607. DP_STATS_INC_PKT(peer, rx.mec_drop, 1, msdu_len);
  1608. /* Drop & free packet */
  1609. qdf_nbuf_free(nbuf);
  1610. /* Statistics */
  1611. nbuf = next;
  1612. dp_peer_unref_del_find_by_id(peer);
  1613. continue;
  1614. }
  1615. if (qdf_unlikely(peer && (peer->nawds_enabled == true) &&
  1616. (hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr)) &&
  1617. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) == false))) {
  1618. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1619. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1620. qdf_nbuf_free(nbuf);
  1621. nbuf = next;
  1622. dp_peer_unref_del_find_by_id(peer);
  1623. continue;
  1624. }
  1625. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1626. dp_set_rx_queue(nbuf, ring_id);
  1627. /* Update the protocol tag in SKB based on CCE metadata */
  1628. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1629. /*
  1630. * HW structures call this L3 header padding --
  1631. * even though this is actually the offset from
  1632. * the buffer beginning where the L2 header
  1633. * begins.
  1634. */
  1635. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1636. FL("rxhash: flow id toeplitz: 0x%x"),
  1637. hal_rx_msdu_start_toeplitz_get(rx_tlv_hdr));
  1638. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer, ring_id);
  1639. if (qdf_unlikely(vdev->mesh_vdev)) {
  1640. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1641. == QDF_STATUS_SUCCESS) {
  1642. QDF_TRACE(QDF_MODULE_ID_DP,
  1643. QDF_TRACE_LEVEL_INFO_MED,
  1644. FL("mesh pkt filtered"));
  1645. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1646. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1647. 1);
  1648. qdf_nbuf_free(nbuf);
  1649. nbuf = next;
  1650. dp_peer_unref_del_find_by_id(peer);
  1651. continue;
  1652. }
  1653. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1654. }
  1655. #ifdef QCA_WIFI_NAPIER_EMULATION_DBG /* Debug code, remove later */
  1656. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1657. "p_id %d msdu_len %d hdr_off %d",
  1658. peer_id, msdu_len, l2_hdr_offset);
  1659. print_hex_dump(KERN_ERR,
  1660. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  1661. qdf_nbuf_data(nbuf), 128, false);
  1662. #endif /* NAPIER_EMULATION */
  1663. if (qdf_likely(vdev->rx_decap_type ==
  1664. htt_cmn_pkt_type_ethernet) &&
  1665. qdf_likely(!vdev->mesh_vdev)) {
  1666. /* WDS Destination Address Learning */
  1667. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1668. /* Due to HW issue, sometimes we see that the sa_idx
  1669. * and da_idx are invalid with sa_valid and da_valid
  1670. * bits set
  1671. *
  1672. * in this case we also see that value of
  1673. * sa_sw_peer_id is set as 0
  1674. *
  1675. * Drop the packet if sa_idx and da_idx OOB or
  1676. * sa_sw_peerid is 0
  1677. */
  1678. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr)) {
  1679. qdf_nbuf_free(nbuf);
  1680. nbuf = next;
  1681. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1682. continue;
  1683. }
  1684. /* WDS Source Port Learning */
  1685. if (vdev->wds_enabled)
  1686. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1687. peer, nbuf);
  1688. /* Intrabss-fwd */
  1689. if (dp_rx_check_ap_bridge(vdev))
  1690. if (dp_rx_intrabss_fwd(soc,
  1691. peer,
  1692. rx_tlv_hdr,
  1693. nbuf)) {
  1694. nbuf = next;
  1695. dp_peer_unref_del_find_by_id(peer);
  1696. tid_stats->intrabss_cnt++;
  1697. continue; /* Get next desc */
  1698. }
  1699. }
  1700. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf);
  1701. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1702. DP_RX_LIST_APPEND(deliver_list_head,
  1703. deliver_list_tail,
  1704. nbuf);
  1705. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1706. qdf_nbuf_len(nbuf));
  1707. tid_stats->delivered_to_stack++;
  1708. nbuf = next;
  1709. dp_peer_unref_del_find_by_id(peer);
  1710. }
  1711. /* Update histogram statistics by looping through pdev's */
  1712. DP_RX_HIST_STATS_PER_PDEV();
  1713. if (deliver_list_head)
  1714. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1715. deliver_list_tail);
  1716. return rx_bufs_used; /* Assume no scale factor for now */
  1717. }
  1718. /**
  1719. * dp_rx_detach() - detach dp rx
  1720. * @pdev: core txrx pdev context
  1721. *
  1722. * This function will detach DP RX into main device context
  1723. * will free DP Rx resources.
  1724. *
  1725. * Return: void
  1726. */
  1727. void
  1728. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1729. {
  1730. uint8_t pdev_id = pdev->pdev_id;
  1731. struct dp_soc *soc = pdev->soc;
  1732. struct rx_desc_pool *rx_desc_pool;
  1733. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1734. if (rx_desc_pool->pool_size != 0) {
  1735. if (!dp_is_soc_reinit(soc))
  1736. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  1737. else
  1738. dp_rx_desc_nbuf_pool_free(soc, rx_desc_pool);
  1739. }
  1740. return;
  1741. }
  1742. static QDF_STATUS
  1743. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1744. struct dp_srng *dp_rxdma_srng,
  1745. struct rx_desc_pool *rx_desc_pool,
  1746. uint32_t num_req_buffers,
  1747. union dp_rx_desc_list_elem_t **desc_list,
  1748. union dp_rx_desc_list_elem_t **tail)
  1749. {
  1750. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1751. void *rxdma_srng = dp_rxdma_srng->hal_srng;
  1752. union dp_rx_desc_list_elem_t *next;
  1753. void *rxdma_ring_entry;
  1754. qdf_dma_addr_t paddr;
  1755. void **rx_nbuf_arr;
  1756. uint32_t nr_descs;
  1757. uint32_t nr_nbuf;
  1758. qdf_nbuf_t nbuf;
  1759. QDF_STATUS ret;
  1760. int i;
  1761. if (qdf_unlikely(!rxdma_srng)) {
  1762. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1763. return QDF_STATUS_E_FAILURE;
  1764. }
  1765. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1766. "requested %u RX buffers for driver attach", num_req_buffers);
  1767. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1768. num_req_buffers, desc_list, tail);
  1769. if (!nr_descs) {
  1770. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1771. "no free rx_descs in freelist");
  1772. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1773. return QDF_STATUS_E_NOMEM;
  1774. }
  1775. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1776. "got %u RX descs for driver attach", nr_descs);
  1777. rx_nbuf_arr = qdf_mem_malloc(nr_descs * sizeof(*rx_nbuf_arr));
  1778. if (!rx_nbuf_arr) {
  1779. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1780. "failed to allocate nbuf array");
  1781. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1782. return QDF_STATUS_E_NOMEM;
  1783. }
  1784. for (nr_nbuf = 0; nr_nbuf < nr_descs; nr_nbuf++) {
  1785. nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1786. RX_BUFFER_RESERVATION,
  1787. RX_BUFFER_ALIGNMENT,
  1788. FALSE);
  1789. if (!nbuf) {
  1790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1791. "nbuf alloc failed");
  1792. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1793. break;
  1794. }
  1795. ret = qdf_nbuf_map_single(dp_soc->osdev, nbuf,
  1796. QDF_DMA_BIDIRECTIONAL);
  1797. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1798. qdf_nbuf_free(nbuf);
  1799. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1800. "nbuf map failed");
  1801. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1802. break;
  1803. }
  1804. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1805. ret = check_x86_paddr(dp_soc, &nbuf, &paddr, dp_pdev);
  1806. if (ret == QDF_STATUS_E_FAILURE) {
  1807. qdf_nbuf_unmap_single(dp_soc->osdev, nbuf,
  1808. QDF_DMA_BIDIRECTIONAL);
  1809. qdf_nbuf_free(nbuf);
  1810. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1811. "nbuf check x86 failed");
  1812. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1813. break;
  1814. }
  1815. rx_nbuf_arr[nr_nbuf] = (void *)nbuf;
  1816. }
  1817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1818. "allocated %u nbuf for driver attach", nr_nbuf);
  1819. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  1820. for (i = 0; i < nr_nbuf; i++) {
  1821. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  1822. rxdma_srng);
  1823. qdf_assert_always(rxdma_ring_entry);
  1824. next = (*desc_list)->next;
  1825. nbuf = rx_nbuf_arr[i];
  1826. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  1827. dp_rx_desc_prep(&((*desc_list)->rx_desc), nbuf);
  1828. (*desc_list)->rx_desc.in_use = 1;
  1829. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  1830. (*desc_list)->rx_desc.cookie,
  1831. rx_desc_pool->owner);
  1832. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  1833. *desc_list = next;
  1834. }
  1835. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  1836. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1837. "filled %u RX buffers for driver attach", nr_nbuf);
  1838. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, RX_BUFFER_SIZE *
  1839. nr_nbuf);
  1840. qdf_mem_free(rx_nbuf_arr);
  1841. return QDF_STATUS_SUCCESS;
  1842. }
  1843. /**
  1844. * dp_rx_attach() - attach DP RX
  1845. * @pdev: core txrx pdev context
  1846. *
  1847. * This function will attach a DP RX instance into the main
  1848. * device (SOC) context. Will allocate dp rx resource and
  1849. * initialize resources.
  1850. *
  1851. * Return: QDF_STATUS_SUCCESS: success
  1852. * QDF_STATUS_E_RESOURCES: Error return
  1853. */
  1854. QDF_STATUS
  1855. dp_rx_pdev_attach(struct dp_pdev *pdev)
  1856. {
  1857. uint8_t pdev_id = pdev->pdev_id;
  1858. struct dp_soc *soc = pdev->soc;
  1859. uint32_t rxdma_entries;
  1860. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1861. union dp_rx_desc_list_elem_t *tail = NULL;
  1862. struct dp_srng *dp_rxdma_srng;
  1863. struct rx_desc_pool *rx_desc_pool;
  1864. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  1865. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1866. "nss-wifi<4> skip Rx refil %d", pdev_id);
  1867. return QDF_STATUS_SUCCESS;
  1868. }
  1869. pdev = soc->pdev_list[pdev_id];
  1870. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1871. rxdma_entries = dp_rxdma_srng->num_entries;
  1872. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  1873. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1874. dp_rx_desc_pool_alloc(soc, pdev_id,
  1875. DP_RX_DESC_ALLOC_MULTIPLIER * rxdma_entries,
  1876. rx_desc_pool);
  1877. rx_desc_pool->owner = DP_WBM2SW_RBM;
  1878. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  1879. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  1880. rx_desc_pool, rxdma_entries - 1,
  1881. &desc_list, &tail);
  1882. }
  1883. /*
  1884. * dp_rx_nbuf_prepare() - prepare RX nbuf
  1885. * @soc: core txrx main context
  1886. * @pdev: core txrx pdev context
  1887. *
  1888. * This function alloc & map nbuf for RX dma usage, retry it if failed
  1889. * until retry times reaches max threshold or succeeded.
  1890. *
  1891. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  1892. */
  1893. qdf_nbuf_t
  1894. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  1895. {
  1896. uint8_t *buf;
  1897. int32_t nbuf_retry_count;
  1898. QDF_STATUS ret;
  1899. qdf_nbuf_t nbuf = NULL;
  1900. for (nbuf_retry_count = 0; nbuf_retry_count <
  1901. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  1902. nbuf_retry_count++) {
  1903. /* Allocate a new skb */
  1904. nbuf = qdf_nbuf_alloc(soc->osdev,
  1905. RX_BUFFER_SIZE,
  1906. RX_BUFFER_RESERVATION,
  1907. RX_BUFFER_ALIGNMENT,
  1908. FALSE);
  1909. if (!nbuf) {
  1910. DP_STATS_INC(pdev,
  1911. replenish.nbuf_alloc_fail, 1);
  1912. continue;
  1913. }
  1914. buf = qdf_nbuf_data(nbuf);
  1915. memset(buf, 0, RX_BUFFER_SIZE);
  1916. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  1917. QDF_DMA_BIDIRECTIONAL);
  1918. /* nbuf map failed */
  1919. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1920. qdf_nbuf_free(nbuf);
  1921. DP_STATS_INC(pdev, replenish.map_err, 1);
  1922. continue;
  1923. }
  1924. /* qdf_nbuf alloc and map succeeded */
  1925. break;
  1926. }
  1927. /* qdf_nbuf still alloc or map failed */
  1928. if (qdf_unlikely(nbuf_retry_count >=
  1929. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  1930. return NULL;
  1931. return nbuf;
  1932. }