msm_smem.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/dma-buf.h>
  6. #include <linux/dma-heap.h>
  7. #include <linux/dma-direction.h>
  8. #include <linux/iommu.h>
  9. #include <linux/msm_dma_iommu_mapping.h>
  10. #include <linux/ion.h>
  11. #include <linux/msm_ion.h>
  12. #include <soc/qcom/secure_buffer.h>
  13. #include <linux/mem-buf.h>
  14. #include <linux/slab.h>
  15. #include <linux/types.h>
  16. #include <linux/qcom-dma-mapping.h>
  17. #include "msm_cvp_core.h"
  18. #include "msm_cvp_debug.h"
  19. #include "msm_cvp_resources.h"
  20. #include "cvp_core_hfi.h"
  21. #include "msm_cvp_dsp.h"
  22. static int msm_dma_get_device_address(struct dma_buf *dbuf, u32 align,
  23. dma_addr_t *iova, u32 flags, struct msm_cvp_platform_resources *res,
  24. struct cvp_dma_mapping_info *mapping_info)
  25. {
  26. int rc = 0;
  27. struct dma_buf_attachment *attach;
  28. struct sg_table *table = NULL;
  29. struct context_bank_info *cb = NULL;
  30. if (!dbuf || !iova || !mapping_info) {
  31. dprintk(CVP_ERR, "Invalid params: %pK, %pK, %pK\n",
  32. dbuf, iova, mapping_info);
  33. return -EINVAL;
  34. }
  35. if (is_iommu_present(res)) {
  36. cb = msm_cvp_smem_get_context_bank(res, flags);
  37. if (!cb) {
  38. dprintk(CVP_ERR,
  39. "%s: Failed to get context bank device\n",
  40. __func__);
  41. rc = -EIO;
  42. goto mem_map_failed;
  43. }
  44. /* Prepare a dma buf for dma on the given device */
  45. attach = dma_buf_attach(dbuf, cb->dev);
  46. if (IS_ERR_OR_NULL(attach)) {
  47. rc = PTR_ERR(attach) ?: -ENOMEM;
  48. dprintk(CVP_ERR, "Failed to attach dmabuf\n");
  49. goto mem_buf_attach_failed;
  50. }
  51. /*
  52. * Get the scatterlist for the given attachment
  53. * Mapping of sg is taken care by map attachment
  54. */
  55. attach->dma_map_attrs = DMA_ATTR_DELAYED_UNMAP;
  56. /*
  57. * We do not need dma_map function to perform cache operations
  58. * on the whole buffer size and hence pass skip sync flag.
  59. * We do the required cache operations separately for the
  60. * required buffer size
  61. */
  62. attach->dma_map_attrs |= DMA_ATTR_SKIP_CPU_SYNC;
  63. if (res->sys_cache_present)
  64. attach->dma_map_attrs |=
  65. DMA_ATTR_IOMMU_USE_UPSTREAM_HINT;
  66. table = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
  67. if (IS_ERR_OR_NULL(table)) {
  68. rc = PTR_ERR(table) ?: -ENOMEM;
  69. dprintk(CVP_ERR, "Failed to map table\n");
  70. goto mem_map_table_failed;
  71. }
  72. if (table->sgl) {
  73. *iova = table->sgl->dma_address;
  74. } else {
  75. dprintk(CVP_ERR, "sgl is NULL\n");
  76. rc = -ENOMEM;
  77. goto mem_map_sg_failed;
  78. }
  79. mapping_info->dev = cb->dev;
  80. mapping_info->domain = cb->domain;
  81. mapping_info->table = table;
  82. mapping_info->attach = attach;
  83. mapping_info->buf = dbuf;
  84. mapping_info->cb_info = (void *)cb;
  85. } else {
  86. dprintk(CVP_MEM, "iommu not present, use phys mem addr\n");
  87. }
  88. return 0;
  89. mem_map_sg_failed:
  90. dma_buf_unmap_attachment(attach, table, DMA_BIDIRECTIONAL);
  91. mem_map_table_failed:
  92. dma_buf_detach(dbuf, attach);
  93. mem_buf_attach_failed:
  94. mem_map_failed:
  95. return rc;
  96. }
  97. static int msm_dma_put_device_address(u32 flags,
  98. struct cvp_dma_mapping_info *mapping_info)
  99. {
  100. int rc = 0;
  101. if (!mapping_info) {
  102. dprintk(CVP_WARN, "Invalid mapping_info\n");
  103. return -EINVAL;
  104. }
  105. if (!mapping_info->dev || !mapping_info->table ||
  106. !mapping_info->buf || !mapping_info->attach ||
  107. !mapping_info->cb_info) {
  108. dprintk(CVP_WARN, "Invalid params\n");
  109. return -EINVAL;
  110. }
  111. dma_buf_unmap_attachment(mapping_info->attach,
  112. mapping_info->table, DMA_BIDIRECTIONAL);
  113. dma_buf_detach(mapping_info->buf, mapping_info->attach);
  114. mapping_info->dev = NULL;
  115. mapping_info->domain = NULL;
  116. mapping_info->table = NULL;
  117. mapping_info->attach = NULL;
  118. mapping_info->buf = NULL;
  119. mapping_info->cb_info = NULL;
  120. return rc;
  121. }
  122. struct dma_buf *msm_cvp_smem_get_dma_buf(int fd)
  123. {
  124. struct dma_buf *dma_buf;
  125. dma_buf = dma_buf_get(fd);
  126. if (IS_ERR_OR_NULL(dma_buf)) {
  127. dprintk(CVP_ERR, "Failed to get dma_buf for %d, error %ld\n",
  128. fd, PTR_ERR(dma_buf));
  129. dma_buf = NULL;
  130. }
  131. return dma_buf;
  132. }
  133. void msm_cvp_smem_put_dma_buf(void *dma_buf)
  134. {
  135. if (!dma_buf) {
  136. dprintk(CVP_ERR, "%s: NULL dma_buf\n", __func__);
  137. return;
  138. }
  139. dma_heap_buffer_free((struct dma_buf *)dma_buf);
  140. }
  141. int msm_cvp_map_smem(struct msm_cvp_inst *inst,
  142. struct msm_cvp_smem *smem,
  143. const char *str)
  144. {
  145. int *vmid_list;
  146. int *perms_list;
  147. int nelems = 0;
  148. int rc = 0;
  149. dma_addr_t iova = 0;
  150. u32 temp = 0;
  151. u32 align = SZ_4K;
  152. struct dma_buf *dma_buf;
  153. if (!inst || !smem) {
  154. dprintk(CVP_ERR, "%s: Invalid params: %pK %pK\n",
  155. __func__, inst, smem);
  156. return -EINVAL;
  157. }
  158. dma_buf = smem->dma_buf;
  159. rc = mem_buf_dma_buf_copy_vmperm(dma_buf,
  160. &vmid_list, &perms_list, &nelems);
  161. if (rc) {
  162. dprintk(CVP_ERR, "%s fail to get vmid and perms %d\n",
  163. __func__, rc);
  164. return rc;
  165. }
  166. for (temp = 0; temp < nelems; temp++) {
  167. if (vmid_list[temp] == VMID_CP_PIXEL)
  168. smem->flags |= (SMEM_SECURE | SMEM_PIXEL);
  169. else if (vmid_list[temp] == VMID_CP_NON_PIXEL)
  170. smem->flags |= (SMEM_SECURE | SMEM_NON_PIXEL);
  171. else if (vmid_list[temp] == VMID_CP_CAMERA)
  172. smem->flags |= (SMEM_SECURE | SMEM_CAMERA);
  173. }
  174. rc = msm_dma_get_device_address(dma_buf, align, &iova, smem->flags,
  175. &(inst->core->resources), &smem->mapping_info);
  176. if (rc) {
  177. dprintk(CVP_ERR, "Failed to get device address: %d\n", rc);
  178. goto exit;
  179. }
  180. temp = (u32)iova;
  181. if ((dma_addr_t)temp != iova) {
  182. dprintk(CVP_ERR, "iova(%pa) truncated to %#x", &iova, temp);
  183. rc = -EINVAL;
  184. goto exit;
  185. }
  186. smem->size = dma_buf->size;
  187. smem->device_addr = (u32)iova;
  188. print_smem(CVP_MEM, str, inst, smem);
  189. goto success;
  190. exit:
  191. smem->device_addr = 0x0;
  192. success:
  193. kfree(vmid_list);
  194. kfree(perms_list);
  195. return rc;
  196. }
  197. int msm_cvp_unmap_smem(struct msm_cvp_inst *inst,
  198. struct msm_cvp_smem *smem,
  199. const char *str)
  200. {
  201. int rc = 0;
  202. if (!smem) {
  203. dprintk(CVP_ERR, "%s: Invalid params: %pK\n", __func__, smem);
  204. rc = -EINVAL;
  205. goto exit;
  206. }
  207. print_smem(CVP_MEM, str, inst, smem);
  208. rc = msm_dma_put_device_address(smem->flags, &smem->mapping_info);
  209. if (rc) {
  210. dprintk(CVP_ERR, "Failed to put device address: %d\n", rc);
  211. goto exit;
  212. }
  213. smem->device_addr = 0x0;
  214. exit:
  215. return rc;
  216. }
  217. static int alloc_dma_mem(size_t size, u32 align, int map_kernel,
  218. struct msm_cvp_platform_resources *res, struct msm_cvp_smem *mem)
  219. {
  220. dma_addr_t iova = 0;
  221. int rc = 0;
  222. struct dma_buf *dbuf = NULL;
  223. struct dma_heap *heap = NULL;
  224. if (!res) {
  225. dprintk(CVP_ERR, "%s: NULL res\n", __func__);
  226. return -EINVAL;
  227. }
  228. align = ALIGN(align, SZ_4K);
  229. size = ALIGN(size, SZ_4K);
  230. if (is_iommu_present(res)) {
  231. heap = dma_heap_find("qcom,system");
  232. dprintk(CVP_MEM, "%s size %zx align %d flag %d\n",
  233. __func__, size, align, mem->flags);
  234. } else {
  235. dprintk(CVP_ERR,
  236. "No IOMMU CB: allocate shared memory heap size %zx align %d\n",
  237. size, align);
  238. }
  239. if (mem->flags & SMEM_NON_PIXEL)
  240. heap = dma_heap_find("qcom,secure-non-pixel");
  241. else if (mem->flags & SMEM_PIXEL)
  242. heap = dma_heap_find("qcom,secure-pixel");
  243. dbuf = dma_heap_buffer_alloc(heap, size, 0, 0);
  244. if (IS_ERR_OR_NULL(dbuf)) {
  245. dprintk(CVP_ERR,
  246. "Failed to allocate shared memory = %x bytes, %x %x\n",
  247. size, mem->flags, PTR_ERR(dbuf));
  248. rc = -ENOMEM;
  249. goto fail_shared_mem_alloc;
  250. }
  251. if (!gfa_cv.dmabuf_f_op)
  252. gfa_cv.dmabuf_f_op = (const struct file_operations *)dbuf->file->f_op;
  253. mem->size = size;
  254. mem->dma_buf = dbuf;
  255. mem->kvaddr = NULL;
  256. rc = msm_dma_get_device_address(dbuf, align, &iova, mem->flags,
  257. res, &mem->mapping_info);
  258. if (rc) {
  259. dprintk(CVP_ERR, "Failed to get device address: %d\n",
  260. rc);
  261. goto fail_device_address;
  262. }
  263. mem->device_addr = (u32)iova;
  264. if ((dma_addr_t)mem->device_addr != iova) {
  265. dprintk(CVP_ERR, "iova(%pa) truncated to %#x",
  266. &iova, mem->device_addr);
  267. goto fail_device_address;
  268. }
  269. if (map_kernel) {
  270. dma_buf_begin_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  271. mem->kvaddr = dma_buf_vmap(dbuf);
  272. if (!mem->kvaddr) {
  273. dprintk(CVP_ERR,
  274. "Failed to map shared mem in kernel\n");
  275. rc = -EIO;
  276. goto fail_map;
  277. }
  278. }
  279. dprintk(CVP_MEM,
  280. "%s: dma_buf=%pK,iova=%x,size=%d,kvaddr=%pK,flags=%#lx\n",
  281. __func__, mem->dma_buf, mem->device_addr, mem->size,
  282. mem->kvaddr, mem->flags);
  283. return rc;
  284. fail_map:
  285. if (map_kernel)
  286. dma_buf_end_cpu_access(dbuf, DMA_BIDIRECTIONAL);
  287. fail_device_address:
  288. dma_heap_buffer_free(dbuf);
  289. fail_shared_mem_alloc:
  290. return rc;
  291. }
  292. static int free_dma_mem(struct msm_cvp_smem *mem)
  293. {
  294. dprintk(CVP_MEM,
  295. "%s: dma_buf = %pK, device_addr = %x, size = %d, kvaddr = %pK\n",
  296. __func__, mem->dma_buf, mem->device_addr, mem->size, mem->kvaddr);
  297. if (mem->device_addr) {
  298. msm_dma_put_device_address(mem->flags, &mem->mapping_info);
  299. mem->device_addr = 0x0;
  300. }
  301. if (mem->kvaddr) {
  302. dma_buf_vunmap(mem->dma_buf, mem->kvaddr);
  303. mem->kvaddr = NULL;
  304. dma_buf_end_cpu_access(mem->dma_buf, DMA_BIDIRECTIONAL);
  305. }
  306. if (mem->dma_buf) {
  307. dma_heap_buffer_free(mem->dma_buf);
  308. mem->dma_buf = NULL;
  309. }
  310. return 0;
  311. }
  312. int msm_cvp_smem_alloc(size_t size, u32 align, int map_kernel,
  313. void *res, struct msm_cvp_smem *smem)
  314. {
  315. int rc = 0;
  316. if (!smem || !size) {
  317. dprintk(CVP_ERR, "%s: NULL smem or %d size\n",
  318. __func__, (u32)size);
  319. return -EINVAL;
  320. }
  321. rc = alloc_dma_mem(size, align, map_kernel,
  322. (struct msm_cvp_platform_resources *)res, smem);
  323. return rc;
  324. }
  325. int msm_cvp_smem_free(struct msm_cvp_smem *smem)
  326. {
  327. int rc = 0;
  328. if (!smem) {
  329. dprintk(CVP_ERR, "NULL smem passed\n");
  330. return -EINVAL;
  331. }
  332. rc = free_dma_mem(smem);
  333. return rc;
  334. };
  335. int msm_cvp_smem_cache_operations(struct dma_buf *dbuf,
  336. enum smem_cache_ops cache_op, unsigned long offset, unsigned long size)
  337. {
  338. int rc = 0;
  339. if (!dbuf) {
  340. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  341. return -EINVAL;
  342. }
  343. switch (cache_op) {
  344. case SMEM_CACHE_CLEAN:
  345. case SMEM_CACHE_CLEAN_INVALIDATE:
  346. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  347. offset, size);
  348. if (rc)
  349. break;
  350. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_BIDIRECTIONAL,
  351. offset, size);
  352. break;
  353. case SMEM_CACHE_INVALIDATE:
  354. rc = dma_buf_begin_cpu_access_partial(dbuf, DMA_TO_DEVICE,
  355. offset, size);
  356. if (rc)
  357. break;
  358. rc = dma_buf_end_cpu_access_partial(dbuf, DMA_FROM_DEVICE,
  359. offset, size);
  360. break;
  361. default:
  362. dprintk(CVP_ERR, "%s: cache (%d) operation not supported\n",
  363. __func__, cache_op);
  364. rc = -EINVAL;
  365. break;
  366. }
  367. return rc;
  368. }
  369. struct context_bank_info *msm_cvp_smem_get_context_bank(
  370. struct msm_cvp_platform_resources *res,
  371. unsigned int flags)
  372. {
  373. struct context_bank_info *cb = NULL, *match = NULL;
  374. char *search_str;
  375. char *non_secure_cb = "cvp_hlos";
  376. char *secure_nonpixel_cb = "cvp_sec_nonpixel";
  377. char *secure_pixel_cb = "cvp_sec_pixel";
  378. bool is_secure = (flags & SMEM_SECURE) ? true : false;
  379. if (flags & SMEM_PIXEL)
  380. search_str = secure_pixel_cb;
  381. else if (flags & SMEM_NON_PIXEL)
  382. search_str = secure_nonpixel_cb;
  383. else
  384. search_str = non_secure_cb;
  385. list_for_each_entry(cb, &res->context_banks, list) {
  386. if (cb->is_secure == is_secure &&
  387. !strcmp(search_str, cb->name)) {
  388. match = cb;
  389. break;
  390. }
  391. }
  392. if (!match)
  393. dprintk(CVP_ERR,
  394. "%s: cb not found for flags %x, is_secure %d\n",
  395. __func__, flags, is_secure);
  396. return match;
  397. }
  398. int msm_cvp_map_ipcc_regs(u32 *iova)
  399. {
  400. struct context_bank_info *cb;
  401. struct msm_cvp_core *core;
  402. struct cvp_hfi_device *hfi_ops;
  403. struct iris_hfi_device *dev = NULL;
  404. phys_addr_t paddr;
  405. u32 size;
  406. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  407. if (core) {
  408. hfi_ops = core->device;
  409. if (hfi_ops)
  410. dev = hfi_ops->hfi_device_data;
  411. }
  412. if (!dev)
  413. return -EINVAL;
  414. paddr = dev->res->ipcc_reg_base;
  415. size = dev->res->ipcc_reg_size;
  416. if (!paddr || !size)
  417. return -EINVAL;
  418. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  419. if (!cb) {
  420. dprintk(CVP_ERR, "%s: fail to get context bank\n", __func__);
  421. return -EINVAL;
  422. }
  423. *iova = dma_map_resource(cb->dev, paddr, size, DMA_BIDIRECTIONAL, 0);
  424. if (*iova == DMA_MAPPING_ERROR) {
  425. dprintk(CVP_WARN, "%s: fail to map IPCC regs\n", __func__);
  426. return -EFAULT;
  427. }
  428. return 0;
  429. }