dp_main.c 212 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /* PPDU stats mask sent to FW to support BPR feature*/
  92. #define DP_PPDU_STATS_CFG_BPR 0x2000
  93. /* PPDU stats mask sent to FW to support BPR and enhanced stats feature */
  94. #define DP_PPDU_STATS_CFG_BPR_ENH (DP_PPDU_STATS_CFG_BPR | \
  95. DP_PPDU_STATS_CFG_ENH_STATS)
  96. /* PPDU stats mask sent to FW to support BPR and pcktlog stats feature */
  97. #define DP_PPDU_STATS_CFG_BPR_PKTLOG (DP_PPDU_STATS_CFG_BPR | \
  98. DP_PPDU_TXLITE_STATS_BITMASK_CFG)
  99. /**
  100. * default_dscp_tid_map - Default DSCP-TID mapping
  101. *
  102. * DSCP TID
  103. * 000000 0
  104. * 001000 1
  105. * 010000 2
  106. * 011000 3
  107. * 100000 4
  108. * 101000 5
  109. * 110000 6
  110. * 111000 7
  111. */
  112. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  113. 0, 0, 0, 0, 0, 0, 0, 0,
  114. 1, 1, 1, 1, 1, 1, 1, 1,
  115. 2, 2, 2, 2, 2, 2, 2, 2,
  116. 3, 3, 3, 3, 3, 3, 3, 3,
  117. 4, 4, 4, 4, 4, 4, 4, 4,
  118. 5, 5, 5, 5, 5, 5, 5, 5,
  119. 6, 6, 6, 6, 6, 6, 6, 6,
  120. 7, 7, 7, 7, 7, 7, 7, 7,
  121. };
  122. /*
  123. * struct dp_rate_debug
  124. *
  125. * @mcs_type: print string for a given mcs
  126. * @valid: valid mcs rate?
  127. */
  128. struct dp_rate_debug {
  129. char mcs_type[DP_MAX_MCS_STRING_LEN];
  130. uint8_t valid;
  131. };
  132. #define MCS_VALID 1
  133. #define MCS_INVALID 0
  134. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  135. {
  136. {"OFDM 48 Mbps", MCS_VALID},
  137. {"OFDM 24 Mbps", MCS_VALID},
  138. {"OFDM 12 Mbps", MCS_VALID},
  139. {"OFDM 6 Mbps ", MCS_VALID},
  140. {"OFDM 54 Mbps", MCS_VALID},
  141. {"OFDM 36 Mbps", MCS_VALID},
  142. {"OFDM 18 Mbps", MCS_VALID},
  143. {"OFDM 9 Mbps ", MCS_VALID},
  144. {"INVALID ", MCS_INVALID},
  145. {"INVALID ", MCS_INVALID},
  146. {"INVALID ", MCS_INVALID},
  147. {"INVALID ", MCS_INVALID},
  148. {"INVALID ", MCS_VALID},
  149. },
  150. {
  151. {"CCK 11 Mbps Long ", MCS_VALID},
  152. {"CCK 5.5 Mbps Long ", MCS_VALID},
  153. {"CCK 2 Mbps Long ", MCS_VALID},
  154. {"CCK 1 Mbps Long ", MCS_VALID},
  155. {"CCK 11 Mbps Short ", MCS_VALID},
  156. {"CCK 5.5 Mbps Short", MCS_VALID},
  157. {"CCK 2 Mbps Short ", MCS_VALID},
  158. {"INVALID ", MCS_INVALID},
  159. {"INVALID ", MCS_INVALID},
  160. {"INVALID ", MCS_INVALID},
  161. {"INVALID ", MCS_INVALID},
  162. {"INVALID ", MCS_INVALID},
  163. {"INVALID ", MCS_VALID},
  164. },
  165. {
  166. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  167. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  168. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  169. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  170. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  171. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  172. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  173. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  174. {"INVALID ", MCS_INVALID},
  175. {"INVALID ", MCS_INVALID},
  176. {"INVALID ", MCS_INVALID},
  177. {"INVALID ", MCS_INVALID},
  178. {"INVALID ", MCS_VALID},
  179. },
  180. {
  181. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  182. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  183. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  184. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  185. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  186. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  187. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  188. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  189. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  190. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  191. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  192. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  193. {"INVALID ", MCS_VALID},
  194. },
  195. {
  196. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  197. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  198. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  199. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  200. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  201. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  202. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  203. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  204. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  205. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  206. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  207. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  208. {"INVALID ", MCS_VALID},
  209. }
  210. };
  211. /**
  212. * @brief Cpu ring map types
  213. */
  214. enum dp_cpu_ring_map_types {
  215. DP_DEFAULT_MAP,
  216. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  217. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  218. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  219. DP_CPU_RING_MAP_MAX
  220. };
  221. /**
  222. * @brief Cpu to tx ring map
  223. */
  224. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  225. {0x0, 0x1, 0x2, 0x0},
  226. {0x1, 0x2, 0x1, 0x2},
  227. {0x0, 0x2, 0x0, 0x2},
  228. {0x2, 0x2, 0x2, 0x2}
  229. };
  230. /**
  231. * @brief Select the type of statistics
  232. */
  233. enum dp_stats_type {
  234. STATS_FW = 0,
  235. STATS_HOST = 1,
  236. STATS_TYPE_MAX = 2,
  237. };
  238. /**
  239. * @brief General Firmware statistics options
  240. *
  241. */
  242. enum dp_fw_stats {
  243. TXRX_FW_STATS_INVALID = -1,
  244. };
  245. /**
  246. * dp_stats_mapping_table - Firmware and Host statistics
  247. * currently supported
  248. */
  249. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  250. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  253. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  261. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  262. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  263. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  264. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  265. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  266. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  267. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  268. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  269. /* Last ENUM for HTT FW STATS */
  270. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  271. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  272. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  273. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  274. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  275. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  276. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  277. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  278. {TXRX_FW_STATS_INVALID, TXRX_RX_MON_STATS},
  279. };
  280. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  281. struct cdp_peer *peer_hdl,
  282. uint8_t *mac_addr,
  283. enum cdp_txrx_ast_entry_type type,
  284. uint32_t flags)
  285. {
  286. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  287. (struct dp_peer *)peer_hdl,
  288. mac_addr,
  289. type,
  290. flags);
  291. }
  292. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. void *ast_entry_hdl)
  294. {
  295. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  296. qdf_spin_lock_bh(&soc->ast_lock);
  297. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  298. (struct dp_ast_entry *)ast_entry_hdl);
  299. qdf_spin_unlock_bh(&soc->ast_lock);
  300. }
  301. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  302. struct cdp_peer *peer_hdl,
  303. uint8_t *wds_macaddr,
  304. uint32_t flags)
  305. {
  306. int status;
  307. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  308. struct dp_ast_entry *ast_entry = NULL;
  309. qdf_spin_lock_bh(&soc->ast_lock);
  310. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  311. status = dp_peer_update_ast(soc,
  312. (struct dp_peer *)peer_hdl,
  313. ast_entry,
  314. flags);
  315. qdf_spin_unlock_bh(&soc->ast_lock);
  316. return status;
  317. }
  318. /*
  319. * dp_wds_reset_ast_wifi3() - Reset the is_active param for ast entry
  320. * @soc_handle: Datapath SOC handle
  321. * @wds_macaddr: MAC address of the WDS entry to be added
  322. * @vdev_hdl: vdev handle
  323. * Return: None
  324. */
  325. static void dp_wds_reset_ast_wifi3(struct cdp_soc_t *soc_hdl,
  326. uint8_t *wds_macaddr, void *vdev_hdl)
  327. {
  328. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  329. struct dp_ast_entry *ast_entry = NULL;
  330. qdf_spin_lock_bh(&soc->ast_lock);
  331. ast_entry = dp_peer_ast_hash_find(soc, wds_macaddr);
  332. if (ast_entry->type != CDP_TXRX_AST_TYPE_STATIC) {
  333. ast_entry->is_active = TRUE;
  334. }
  335. qdf_spin_unlock_bh(&soc->ast_lock);
  336. }
  337. /*
  338. * dp_wds_reset_ast_table_wifi3() - Reset the is_active param for all ast entry
  339. * @soc: Datapath SOC handle
  340. * @vdev_hdl: vdev handle
  341. *
  342. * Return: None
  343. */
  344. static void dp_wds_reset_ast_table_wifi3(struct cdp_soc_t *soc_hdl,
  345. void *vdev_hdl)
  346. {
  347. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  348. struct dp_pdev *pdev;
  349. struct dp_vdev *vdev;
  350. struct dp_peer *peer;
  351. struct dp_ast_entry *ase, *temp_ase;
  352. int i;
  353. qdf_spin_lock_bh(&soc->ast_lock);
  354. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  355. pdev = soc->pdev_list[i];
  356. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  357. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  358. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  359. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  360. if (ase->type ==
  361. CDP_TXRX_AST_TYPE_STATIC)
  362. continue;
  363. ase->is_active = TRUE;
  364. }
  365. }
  366. }
  367. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  368. }
  369. qdf_spin_unlock_bh(&soc->ast_lock);
  370. }
  371. /*
  372. * dp_wds_flush_ast_table_wifi3() - Delete all wds and hmwds ast entry
  373. * @soc: Datapath SOC handle
  374. *
  375. * Return: None
  376. */
  377. static void dp_wds_flush_ast_table_wifi3(struct cdp_soc_t *soc_hdl)
  378. {
  379. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  380. struct dp_pdev *pdev;
  381. struct dp_vdev *vdev;
  382. struct dp_peer *peer;
  383. struct dp_ast_entry *ase, *temp_ase;
  384. int i;
  385. qdf_spin_lock_bh(&soc->ast_lock);
  386. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  387. pdev = soc->pdev_list[i];
  388. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  389. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  390. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  391. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  392. if (ase->type ==
  393. CDP_TXRX_AST_TYPE_STATIC)
  394. continue;
  395. dp_peer_del_ast(soc, ase);
  396. }
  397. }
  398. }
  399. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  400. }
  401. qdf_spin_unlock_bh(&soc->ast_lock);
  402. }
  403. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  404. uint8_t *ast_mac_addr)
  405. {
  406. struct dp_ast_entry *ast_entry;
  407. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  408. qdf_spin_lock_bh(&soc->ast_lock);
  409. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  410. qdf_spin_unlock_bh(&soc->ast_lock);
  411. return (void *)ast_entry;
  412. }
  413. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  414. void *ast_entry_hdl)
  415. {
  416. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  417. (struct dp_ast_entry *)ast_entry_hdl);
  418. }
  419. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  420. void *ast_entry_hdl)
  421. {
  422. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  423. (struct dp_ast_entry *)ast_entry_hdl);
  424. }
  425. static void dp_peer_ast_set_type_wifi3(
  426. struct cdp_soc_t *soc_hdl,
  427. void *ast_entry_hdl,
  428. enum cdp_txrx_ast_entry_type type)
  429. {
  430. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  431. (struct dp_ast_entry *)ast_entry_hdl,
  432. type);
  433. }
  434. /**
  435. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  436. * @ring_num: ring num of the ring being queried
  437. * @grp_mask: the grp_mask array for the ring type in question.
  438. *
  439. * The grp_mask array is indexed by group number and the bit fields correspond
  440. * to ring numbers. We are finding which interrupt group a ring belongs to.
  441. *
  442. * Return: the index in the grp_mask array with the ring number.
  443. * -QDF_STATUS_E_NOENT if no entry is found
  444. */
  445. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  446. {
  447. int ext_group_num;
  448. int mask = 1 << ring_num;
  449. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  450. ext_group_num++) {
  451. if (mask & grp_mask[ext_group_num])
  452. return ext_group_num;
  453. }
  454. return -QDF_STATUS_E_NOENT;
  455. }
  456. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  457. enum hal_ring_type ring_type,
  458. int ring_num)
  459. {
  460. int *grp_mask;
  461. switch (ring_type) {
  462. case WBM2SW_RELEASE:
  463. /* dp_tx_comp_handler - soc->tx_comp_ring */
  464. if (ring_num < 3)
  465. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  466. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  467. else if (ring_num == 3) {
  468. /* sw treats this as a separate ring type */
  469. grp_mask = &soc->wlan_cfg_ctx->
  470. int_rx_wbm_rel_ring_mask[0];
  471. ring_num = 0;
  472. } else {
  473. qdf_assert(0);
  474. return -QDF_STATUS_E_NOENT;
  475. }
  476. break;
  477. case REO_EXCEPTION:
  478. /* dp_rx_err_process - &soc->reo_exception_ring */
  479. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  480. break;
  481. case REO_DST:
  482. /* dp_rx_process - soc->reo_dest_ring */
  483. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  484. break;
  485. case REO_STATUS:
  486. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  487. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  488. break;
  489. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  490. case RXDMA_MONITOR_STATUS:
  491. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  492. case RXDMA_MONITOR_DST:
  493. /* dp_mon_process */
  494. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  495. break;
  496. case RXDMA_DST:
  497. /* dp_rxdma_err_process */
  498. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  499. break;
  500. case RXDMA_BUF:
  501. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  502. break;
  503. case RXDMA_MONITOR_BUF:
  504. /* TODO: support low_thresh interrupt */
  505. return -QDF_STATUS_E_NOENT;
  506. break;
  507. case TCL_DATA:
  508. case TCL_CMD:
  509. case REO_CMD:
  510. case SW2WBM_RELEASE:
  511. case WBM_IDLE_LINK:
  512. /* normally empty SW_TO_HW rings */
  513. return -QDF_STATUS_E_NOENT;
  514. break;
  515. case TCL_STATUS:
  516. case REO_REINJECT:
  517. /* misc unused rings */
  518. return -QDF_STATUS_E_NOENT;
  519. break;
  520. case CE_SRC:
  521. case CE_DST:
  522. case CE_DST_STATUS:
  523. /* CE_rings - currently handled by hif */
  524. default:
  525. return -QDF_STATUS_E_NOENT;
  526. break;
  527. }
  528. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  529. }
  530. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  531. *ring_params, int ring_type, int ring_num)
  532. {
  533. int msi_group_number;
  534. int msi_data_count;
  535. int ret;
  536. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  537. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  538. &msi_data_count, &msi_data_start,
  539. &msi_irq_start);
  540. if (ret)
  541. return;
  542. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  543. ring_num);
  544. if (msi_group_number < 0) {
  545. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  546. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  547. ring_type, ring_num);
  548. ring_params->msi_addr = 0;
  549. ring_params->msi_data = 0;
  550. return;
  551. }
  552. if (msi_group_number > msi_data_count) {
  553. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  554. FL("2 msi_groups will share an msi; msi_group_num %d"),
  555. msi_group_number);
  556. QDF_ASSERT(0);
  557. }
  558. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  559. ring_params->msi_addr = addr_low;
  560. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  561. ring_params->msi_data = (msi_group_number % msi_data_count)
  562. + msi_data_start;
  563. ring_params->flags |= HAL_SRNG_MSI_INTR;
  564. }
  565. /**
  566. * dp_print_ast_stats() - Dump AST table contents
  567. * @soc: Datapath soc handle
  568. *
  569. * return void
  570. */
  571. #ifdef FEATURE_AST
  572. static void dp_print_ast_stats(struct dp_soc *soc)
  573. {
  574. uint8_t i;
  575. uint8_t num_entries = 0;
  576. struct dp_vdev *vdev;
  577. struct dp_pdev *pdev;
  578. struct dp_peer *peer;
  579. struct dp_ast_entry *ase, *tmp_ase;
  580. char type[5][10] = {"NONE", "STATIC", "WDS", "MEC", "HMWDS"};
  581. DP_PRINT_STATS("AST Stats:");
  582. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  583. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  584. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  585. DP_PRINT_STATS("AST Table:");
  586. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  587. pdev = soc->pdev_list[i];
  588. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  589. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  590. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  591. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  592. DP_PRINT_STATS("%6d mac_addr = %pM"
  593. " peer_mac_addr = %pM"
  594. " type = %s"
  595. " next_hop = %d"
  596. " is_active = %d"
  597. " is_bss = %d"
  598. " ast_idx = %d"
  599. " pdev_id = %d"
  600. " vdev_id = %d",
  601. ++num_entries,
  602. ase->mac_addr.raw,
  603. ase->peer->mac_addr.raw,
  604. type[ase->type],
  605. ase->next_hop,
  606. ase->is_active,
  607. ase->is_bss,
  608. ase->ast_idx,
  609. ase->pdev_id,
  610. ase->vdev_id);
  611. }
  612. }
  613. }
  614. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  615. }
  616. }
  617. #else
  618. static void dp_print_ast_stats(struct dp_soc *soc)
  619. {
  620. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_AST");
  621. return;
  622. }
  623. #endif
  624. static void dp_print_peer_table(struct dp_vdev *vdev)
  625. {
  626. struct dp_peer *peer = NULL;
  627. DP_PRINT_STATS("Dumping Peer Table Stats:");
  628. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  629. if (!peer) {
  630. DP_PRINT_STATS("Invalid Peer");
  631. return;
  632. }
  633. DP_PRINT_STATS(" peer_mac_addr = %pM"
  634. " nawds_enabled = %d"
  635. " bss_peer = %d"
  636. " wapi = %d"
  637. " wds_enabled = %d"
  638. " delete in progress = %d",
  639. peer->mac_addr.raw,
  640. peer->nawds_enabled,
  641. peer->bss_peer,
  642. peer->wapi,
  643. peer->wds_enabled,
  644. peer->delete_in_progress);
  645. }
  646. }
  647. /*
  648. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  649. */
  650. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  651. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  652. {
  653. void *hal_soc = soc->hal_soc;
  654. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  655. /* TODO: See if we should get align size from hal */
  656. uint32_t ring_base_align = 8;
  657. struct hal_srng_params ring_params;
  658. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  659. /* TODO: Currently hal layer takes care of endianness related settings.
  660. * See if these settings need to passed from DP layer
  661. */
  662. ring_params.flags = 0;
  663. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  664. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  665. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  666. srng->hal_srng = NULL;
  667. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  668. srng->num_entries = num_entries;
  669. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  670. soc->osdev, soc->osdev->dev, srng->alloc_size,
  671. &(srng->base_paddr_unaligned));
  672. if (!srng->base_vaddr_unaligned) {
  673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  674. FL("alloc failed - ring_type: %d, ring_num %d"),
  675. ring_type, ring_num);
  676. return QDF_STATUS_E_NOMEM;
  677. }
  678. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  679. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  680. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  681. ((unsigned long)(ring_params.ring_base_vaddr) -
  682. (unsigned long)srng->base_vaddr_unaligned);
  683. ring_params.num_entries = num_entries;
  684. if (soc->intr_mode == DP_INTR_MSI) {
  685. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  687. FL("Using MSI for ring_type: %d, ring_num %d"),
  688. ring_type, ring_num);
  689. } else {
  690. ring_params.msi_data = 0;
  691. ring_params.msi_addr = 0;
  692. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  693. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  694. ring_type, ring_num);
  695. }
  696. /*
  697. * Setup interrupt timer and batch counter thresholds for
  698. * interrupt mitigation based on ring type
  699. */
  700. if (ring_type == REO_DST) {
  701. ring_params.intr_timer_thres_us =
  702. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  703. ring_params.intr_batch_cntr_thres_entries =
  704. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  705. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  706. ring_params.intr_timer_thres_us =
  707. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  708. ring_params.intr_batch_cntr_thres_entries =
  709. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  710. } else {
  711. ring_params.intr_timer_thres_us =
  712. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  713. ring_params.intr_batch_cntr_thres_entries =
  714. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  715. }
  716. /* Enable low threshold interrupts for rx buffer rings (regular and
  717. * monitor buffer rings.
  718. * TODO: See if this is required for any other ring
  719. */
  720. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  721. (ring_type == RXDMA_MONITOR_STATUS)) {
  722. /* TODO: Setting low threshold to 1/8th of ring size
  723. * see if this needs to be configurable
  724. */
  725. ring_params.low_threshold = num_entries >> 3;
  726. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  727. ring_params.intr_timer_thres_us =
  728. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  729. ring_params.intr_batch_cntr_thres_entries = 0;
  730. }
  731. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  732. mac_id, &ring_params);
  733. if (!srng->hal_srng) {
  734. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  735. srng->alloc_size,
  736. srng->base_vaddr_unaligned,
  737. srng->base_paddr_unaligned, 0);
  738. }
  739. return 0;
  740. }
  741. /**
  742. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  743. * Any buffers allocated and attached to ring entries are expected to be freed
  744. * before calling this function.
  745. */
  746. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  747. int ring_type, int ring_num)
  748. {
  749. if (!srng->hal_srng) {
  750. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  751. FL("Ring type: %d, num:%d not setup"),
  752. ring_type, ring_num);
  753. return;
  754. }
  755. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  756. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  757. srng->alloc_size,
  758. srng->base_vaddr_unaligned,
  759. srng->base_paddr_unaligned, 0);
  760. srng->hal_srng = NULL;
  761. }
  762. /* TODO: Need this interface from HIF */
  763. void *hif_get_hal_handle(void *hif_handle);
  764. /*
  765. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  766. * @dp_ctx: DP SOC handle
  767. * @budget: Number of frames/descriptors that can be processed in one shot
  768. *
  769. * Return: remaining budget/quota for the soc device
  770. */
  771. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  772. {
  773. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  774. struct dp_soc *soc = int_ctx->soc;
  775. int ring = 0;
  776. uint32_t work_done = 0;
  777. int budget = dp_budget;
  778. uint8_t tx_mask = int_ctx->tx_ring_mask;
  779. uint8_t rx_mask = int_ctx->rx_ring_mask;
  780. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  781. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  782. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  783. uint32_t remaining_quota = dp_budget;
  784. struct dp_pdev *pdev = NULL;
  785. int mac_id;
  786. /* Process Tx completion interrupts first to return back buffers */
  787. while (tx_mask) {
  788. if (tx_mask & 0x1) {
  789. work_done = dp_tx_comp_handler(soc,
  790. soc->tx_comp_ring[ring].hal_srng,
  791. remaining_quota);
  792. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  793. "tx mask 0x%x ring %d, budget %d, work_done %d",
  794. tx_mask, ring, budget, work_done);
  795. budget -= work_done;
  796. if (budget <= 0)
  797. goto budget_done;
  798. remaining_quota = budget;
  799. }
  800. tx_mask = tx_mask >> 1;
  801. ring++;
  802. }
  803. /* Process REO Exception ring interrupt */
  804. if (rx_err_mask) {
  805. work_done = dp_rx_err_process(soc,
  806. soc->reo_exception_ring.hal_srng,
  807. remaining_quota);
  808. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  809. "REO Exception Ring: work_done %d budget %d",
  810. work_done, budget);
  811. budget -= work_done;
  812. if (budget <= 0) {
  813. goto budget_done;
  814. }
  815. remaining_quota = budget;
  816. }
  817. /* Process Rx WBM release ring interrupt */
  818. if (rx_wbm_rel_mask) {
  819. work_done = dp_rx_wbm_err_process(soc,
  820. soc->rx_rel_ring.hal_srng, remaining_quota);
  821. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  822. "WBM Release Ring: work_done %d budget %d",
  823. work_done, budget);
  824. budget -= work_done;
  825. if (budget <= 0) {
  826. goto budget_done;
  827. }
  828. remaining_quota = budget;
  829. }
  830. /* Process Rx interrupts */
  831. if (rx_mask) {
  832. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  833. if (rx_mask & (1 << ring)) {
  834. work_done = dp_rx_process(int_ctx,
  835. soc->reo_dest_ring[ring].hal_srng,
  836. remaining_quota);
  837. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  838. "rx mask 0x%x ring %d, work_done %d budget %d",
  839. rx_mask, ring, work_done, budget);
  840. budget -= work_done;
  841. if (budget <= 0)
  842. goto budget_done;
  843. remaining_quota = budget;
  844. }
  845. }
  846. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  847. work_done = dp_rxdma_err_process(soc, ring,
  848. remaining_quota);
  849. budget -= work_done;
  850. }
  851. }
  852. if (reo_status_mask)
  853. dp_reo_status_ring_handler(soc);
  854. /* Process LMAC interrupts */
  855. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  856. pdev = soc->pdev_list[ring];
  857. if (pdev == NULL)
  858. continue;
  859. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  860. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  861. pdev->pdev_id);
  862. if (int_ctx->rx_mon_ring_mask & (1 << mac_for_pdev)) {
  863. work_done = dp_mon_process(soc, mac_for_pdev,
  864. remaining_quota);
  865. budget -= work_done;
  866. if (budget <= 0)
  867. goto budget_done;
  868. remaining_quota = budget;
  869. }
  870. if (int_ctx->rxdma2host_ring_mask &
  871. (1 << mac_for_pdev)) {
  872. work_done = dp_rxdma_err_process(soc,
  873. mac_for_pdev,
  874. remaining_quota);
  875. budget -= work_done;
  876. if (budget <= 0)
  877. goto budget_done;
  878. remaining_quota = budget;
  879. }
  880. if (int_ctx->host2rxdma_ring_mask &
  881. (1 << mac_for_pdev)) {
  882. union dp_rx_desc_list_elem_t *desc_list = NULL;
  883. union dp_rx_desc_list_elem_t *tail = NULL;
  884. struct dp_srng *rx_refill_buf_ring =
  885. &pdev->rx_refill_buf_ring;
  886. DP_STATS_INC(pdev, replenish.low_thresh_intrs,
  887. 1);
  888. dp_rx_buffers_replenish(soc, mac_for_pdev,
  889. rx_refill_buf_ring,
  890. &soc->rx_desc_buf[mac_for_pdev], 0,
  891. &desc_list, &tail);
  892. }
  893. }
  894. }
  895. qdf_lro_flush(int_ctx->lro_ctx);
  896. budget_done:
  897. return dp_budget - budget;
  898. }
  899. #ifdef DP_INTR_POLL_BASED
  900. /* dp_interrupt_timer()- timer poll for interrupts
  901. *
  902. * @arg: SoC Handle
  903. *
  904. * Return:
  905. *
  906. */
  907. static void dp_interrupt_timer(void *arg)
  908. {
  909. struct dp_soc *soc = (struct dp_soc *) arg;
  910. int i;
  911. if (qdf_atomic_read(&soc->cmn_init_done)) {
  912. for (i = 0;
  913. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  914. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  915. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  916. }
  917. }
  918. /*
  919. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  920. * @txrx_soc: DP SOC handle
  921. *
  922. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  923. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  924. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  925. *
  926. * Return: 0 for success. nonzero for failure.
  927. */
  928. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  929. {
  930. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  931. int i;
  932. soc->intr_mode = DP_INTR_POLL;
  933. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  934. soc->intr_ctx[i].dp_intr_id = i;
  935. soc->intr_ctx[i].tx_ring_mask =
  936. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  937. soc->intr_ctx[i].rx_ring_mask =
  938. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  939. soc->intr_ctx[i].rx_mon_ring_mask =
  940. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  941. soc->intr_ctx[i].rx_err_ring_mask =
  942. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  943. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  944. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  945. soc->intr_ctx[i].reo_status_ring_mask =
  946. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  947. soc->intr_ctx[i].rxdma2host_ring_mask =
  948. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  949. soc->intr_ctx[i].soc = soc;
  950. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  951. }
  952. qdf_timer_init(soc->osdev, &soc->int_timer,
  953. dp_interrupt_timer, (void *)soc,
  954. QDF_TIMER_TYPE_WAKE_APPS);
  955. return QDF_STATUS_SUCCESS;
  956. }
  957. #if defined(CONFIG_MCL)
  958. extern int con_mode_monitor;
  959. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  960. /*
  961. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  962. * @txrx_soc: DP SOC handle
  963. *
  964. * Call the appropriate attach function based on the mode of operation.
  965. * This is a WAR for enabling monitor mode.
  966. *
  967. * Return: 0 for success. nonzero for failure.
  968. */
  969. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  970. {
  971. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  972. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  973. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  974. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  975. "%s: Poll mode", __func__);
  976. return dp_soc_interrupt_attach_poll(txrx_soc);
  977. } else {
  978. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  979. "%s: Interrupt mode", __func__);
  980. return dp_soc_interrupt_attach(txrx_soc);
  981. }
  982. }
  983. #else
  984. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  985. {
  986. return dp_soc_interrupt_attach_poll(txrx_soc);
  987. }
  988. #endif
  989. #endif
  990. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  991. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  992. {
  993. int j;
  994. int num_irq = 0;
  995. int tx_mask =
  996. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  997. int rx_mask =
  998. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  999. int rx_mon_mask =
  1000. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  1001. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1002. soc->wlan_cfg_ctx, intr_ctx_num);
  1003. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1004. soc->wlan_cfg_ctx, intr_ctx_num);
  1005. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1006. soc->wlan_cfg_ctx, intr_ctx_num);
  1007. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1008. soc->wlan_cfg_ctx, intr_ctx_num);
  1009. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  1010. soc->wlan_cfg_ctx, intr_ctx_num);
  1011. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  1012. if (tx_mask & (1 << j)) {
  1013. irq_id_map[num_irq++] =
  1014. (wbm2host_tx_completions_ring1 - j);
  1015. }
  1016. if (rx_mask & (1 << j)) {
  1017. irq_id_map[num_irq++] =
  1018. (reo2host_destination_ring1 - j);
  1019. }
  1020. if (rxdma2host_ring_mask & (1 << j)) {
  1021. irq_id_map[num_irq++] =
  1022. rxdma2host_destination_ring_mac1 -
  1023. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1024. }
  1025. if (host2rxdma_ring_mask & (1 << j)) {
  1026. irq_id_map[num_irq++] =
  1027. host2rxdma_host_buf_ring_mac1 -
  1028. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1029. }
  1030. if (rx_mon_mask & (1 << j)) {
  1031. irq_id_map[num_irq++] =
  1032. ppdu_end_interrupts_mac1 -
  1033. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1034. irq_id_map[num_irq++] =
  1035. rxdma2host_monitor_status_ring_mac1 -
  1036. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  1037. }
  1038. if (rx_wbm_rel_ring_mask & (1 << j))
  1039. irq_id_map[num_irq++] = wbm2host_rx_release;
  1040. if (rx_err_ring_mask & (1 << j))
  1041. irq_id_map[num_irq++] = reo2host_exception;
  1042. if (reo_status_ring_mask & (1 << j))
  1043. irq_id_map[num_irq++] = reo2host_status;
  1044. }
  1045. *num_irq_r = num_irq;
  1046. }
  1047. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  1048. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  1049. int msi_vector_count, int msi_vector_start)
  1050. {
  1051. int tx_mask = wlan_cfg_get_tx_ring_mask(
  1052. soc->wlan_cfg_ctx, intr_ctx_num);
  1053. int rx_mask = wlan_cfg_get_rx_ring_mask(
  1054. soc->wlan_cfg_ctx, intr_ctx_num);
  1055. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  1056. soc->wlan_cfg_ctx, intr_ctx_num);
  1057. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  1058. soc->wlan_cfg_ctx, intr_ctx_num);
  1059. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  1060. soc->wlan_cfg_ctx, intr_ctx_num);
  1061. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  1062. soc->wlan_cfg_ctx, intr_ctx_num);
  1063. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  1064. soc->wlan_cfg_ctx, intr_ctx_num);
  1065. unsigned int vector =
  1066. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  1067. int num_irq = 0;
  1068. soc->intr_mode = DP_INTR_MSI;
  1069. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  1070. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  1071. irq_id_map[num_irq++] =
  1072. pld_get_msi_irq(soc->osdev->dev, vector);
  1073. *num_irq_r = num_irq;
  1074. }
  1075. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  1076. int *irq_id_map, int *num_irq)
  1077. {
  1078. int msi_vector_count, ret;
  1079. uint32_t msi_base_data, msi_vector_start;
  1080. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  1081. &msi_vector_count,
  1082. &msi_base_data,
  1083. &msi_vector_start);
  1084. if (ret)
  1085. return dp_soc_interrupt_map_calculate_integrated(soc,
  1086. intr_ctx_num, irq_id_map, num_irq);
  1087. else
  1088. dp_soc_interrupt_map_calculate_msi(soc,
  1089. intr_ctx_num, irq_id_map, num_irq,
  1090. msi_vector_count, msi_vector_start);
  1091. }
  1092. /*
  1093. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  1094. * @txrx_soc: DP SOC handle
  1095. *
  1096. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  1097. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  1098. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  1099. *
  1100. * Return: 0 for success. nonzero for failure.
  1101. */
  1102. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  1103. {
  1104. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1105. int i = 0;
  1106. int num_irq = 0;
  1107. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1108. int ret = 0;
  1109. /* Map of IRQ ids registered with one interrupt context */
  1110. int irq_id_map[HIF_MAX_GRP_IRQ];
  1111. int tx_mask =
  1112. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  1113. int rx_mask =
  1114. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  1115. int rx_mon_mask =
  1116. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  1117. int rx_err_ring_mask =
  1118. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  1119. int rx_wbm_rel_ring_mask =
  1120. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  1121. int reo_status_ring_mask =
  1122. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  1123. int rxdma2host_ring_mask =
  1124. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  1125. int host2rxdma_ring_mask =
  1126. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  1127. soc->intr_ctx[i].dp_intr_id = i;
  1128. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  1129. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  1130. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  1131. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  1132. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1133. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1134. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1135. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1136. soc->intr_ctx[i].soc = soc;
  1137. num_irq = 0;
  1138. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1139. &num_irq);
  1140. ret = hif_register_ext_group(soc->hif_handle,
  1141. num_irq, irq_id_map, dp_service_srngs,
  1142. &soc->intr_ctx[i], "dp_intr",
  1143. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1144. if (ret) {
  1145. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1146. FL("failed, ret = %d"), ret);
  1147. return QDF_STATUS_E_FAILURE;
  1148. }
  1149. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1150. }
  1151. hif_configure_ext_group_interrupts(soc->hif_handle);
  1152. return QDF_STATUS_SUCCESS;
  1153. }
  1154. /*
  1155. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1156. * @txrx_soc: DP SOC handle
  1157. *
  1158. * Return: void
  1159. */
  1160. static void dp_soc_interrupt_detach(void *txrx_soc)
  1161. {
  1162. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1163. int i;
  1164. if (soc->intr_mode == DP_INTR_POLL) {
  1165. qdf_timer_stop(&soc->int_timer);
  1166. qdf_timer_free(&soc->int_timer);
  1167. } else {
  1168. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1169. }
  1170. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1171. soc->intr_ctx[i].tx_ring_mask = 0;
  1172. soc->intr_ctx[i].rx_ring_mask = 0;
  1173. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1174. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1175. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1176. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1177. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1178. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1179. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1180. }
  1181. }
  1182. #define AVG_MAX_MPDUS_PER_TID 128
  1183. #define AVG_TIDS_PER_CLIENT 2
  1184. #define AVG_FLOWS_PER_TID 2
  1185. #define AVG_MSDUS_PER_FLOW 128
  1186. #define AVG_MSDUS_PER_MPDU 4
  1187. /*
  1188. * Allocate and setup link descriptor pool that will be used by HW for
  1189. * various link and queue descriptors and managed by WBM
  1190. */
  1191. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1192. {
  1193. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1194. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1195. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1196. uint32_t num_mpdus_per_link_desc =
  1197. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1198. uint32_t num_msdus_per_link_desc =
  1199. hal_num_msdus_per_link_desc(soc->hal_soc);
  1200. uint32_t num_mpdu_links_per_queue_desc =
  1201. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1202. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1203. uint32_t total_link_descs, total_mem_size;
  1204. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1205. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1206. uint32_t num_link_desc_banks;
  1207. uint32_t last_bank_size = 0;
  1208. uint32_t entry_size, num_entries;
  1209. int i;
  1210. uint32_t desc_id = 0;
  1211. /* Only Tx queue descriptors are allocated from common link descriptor
  1212. * pool Rx queue descriptors are not included in this because (REO queue
  1213. * extension descriptors) they are expected to be allocated contiguously
  1214. * with REO queue descriptors
  1215. */
  1216. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1217. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1218. num_mpdu_queue_descs = num_mpdu_link_descs /
  1219. num_mpdu_links_per_queue_desc;
  1220. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1221. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1222. num_msdus_per_link_desc;
  1223. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1224. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1225. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1226. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1227. /* Round up to power of 2 */
  1228. total_link_descs = 1;
  1229. while (total_link_descs < num_entries)
  1230. total_link_descs <<= 1;
  1231. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1232. FL("total_link_descs: %u, link_desc_size: %d"),
  1233. total_link_descs, link_desc_size);
  1234. total_mem_size = total_link_descs * link_desc_size;
  1235. total_mem_size += link_desc_align;
  1236. if (total_mem_size <= max_alloc_size) {
  1237. num_link_desc_banks = 0;
  1238. last_bank_size = total_mem_size;
  1239. } else {
  1240. num_link_desc_banks = (total_mem_size) /
  1241. (max_alloc_size - link_desc_align);
  1242. last_bank_size = total_mem_size %
  1243. (max_alloc_size - link_desc_align);
  1244. }
  1245. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1246. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1247. total_mem_size, num_link_desc_banks);
  1248. for (i = 0; i < num_link_desc_banks; i++) {
  1249. soc->link_desc_banks[i].base_vaddr_unaligned =
  1250. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1251. max_alloc_size,
  1252. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1253. soc->link_desc_banks[i].size = max_alloc_size;
  1254. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1255. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1256. ((unsigned long)(
  1257. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1258. link_desc_align));
  1259. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1260. soc->link_desc_banks[i].base_paddr_unaligned) +
  1261. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1262. (unsigned long)(
  1263. soc->link_desc_banks[i].base_vaddr_unaligned));
  1264. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1265. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1266. FL("Link descriptor memory alloc failed"));
  1267. goto fail;
  1268. }
  1269. }
  1270. if (last_bank_size) {
  1271. /* Allocate last bank in case total memory required is not exact
  1272. * multiple of max_alloc_size
  1273. */
  1274. soc->link_desc_banks[i].base_vaddr_unaligned =
  1275. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1276. last_bank_size,
  1277. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1278. soc->link_desc_banks[i].size = last_bank_size;
  1279. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1280. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1281. ((unsigned long)(
  1282. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1283. link_desc_align));
  1284. soc->link_desc_banks[i].base_paddr =
  1285. (unsigned long)(
  1286. soc->link_desc_banks[i].base_paddr_unaligned) +
  1287. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1288. (unsigned long)(
  1289. soc->link_desc_banks[i].base_vaddr_unaligned));
  1290. }
  1291. /* Allocate and setup link descriptor idle list for HW internal use */
  1292. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1293. total_mem_size = entry_size * total_link_descs;
  1294. if (total_mem_size <= max_alloc_size) {
  1295. void *desc;
  1296. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1297. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1298. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1299. FL("Link desc idle ring setup failed"));
  1300. goto fail;
  1301. }
  1302. hal_srng_access_start_unlocked(soc->hal_soc,
  1303. soc->wbm_idle_link_ring.hal_srng);
  1304. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1305. soc->link_desc_banks[i].base_paddr; i++) {
  1306. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1307. ((unsigned long)(
  1308. soc->link_desc_banks[i].base_vaddr) -
  1309. (unsigned long)(
  1310. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1311. / link_desc_size;
  1312. unsigned long paddr = (unsigned long)(
  1313. soc->link_desc_banks[i].base_paddr);
  1314. while (num_entries && (desc = hal_srng_src_get_next(
  1315. soc->hal_soc,
  1316. soc->wbm_idle_link_ring.hal_srng))) {
  1317. hal_set_link_desc_addr(desc,
  1318. LINK_DESC_COOKIE(desc_id, i), paddr);
  1319. num_entries--;
  1320. desc_id++;
  1321. paddr += link_desc_size;
  1322. }
  1323. }
  1324. hal_srng_access_end_unlocked(soc->hal_soc,
  1325. soc->wbm_idle_link_ring.hal_srng);
  1326. } else {
  1327. uint32_t num_scatter_bufs;
  1328. uint32_t num_entries_per_buf;
  1329. uint32_t rem_entries;
  1330. uint8_t *scatter_buf_ptr;
  1331. uint16_t scatter_buf_num;
  1332. soc->wbm_idle_scatter_buf_size =
  1333. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1334. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1335. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1336. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1337. soc->hal_soc, total_mem_size,
  1338. soc->wbm_idle_scatter_buf_size);
  1339. if (num_scatter_bufs > MAX_IDLE_SCATTER_BUFS) {
  1340. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1341. FL("scatter bufs size out of bounds"));
  1342. goto fail;
  1343. }
  1344. for (i = 0; i < num_scatter_bufs; i++) {
  1345. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1346. qdf_mem_alloc_consistent(soc->osdev,
  1347. soc->osdev->dev,
  1348. soc->wbm_idle_scatter_buf_size,
  1349. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1350. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1351. QDF_TRACE(QDF_MODULE_ID_DP,
  1352. QDF_TRACE_LEVEL_ERROR,
  1353. FL("Scatter list memory alloc failed"));
  1354. goto fail;
  1355. }
  1356. }
  1357. /* Populate idle list scatter buffers with link descriptor
  1358. * pointers
  1359. */
  1360. scatter_buf_num = 0;
  1361. scatter_buf_ptr = (uint8_t *)(
  1362. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1363. rem_entries = num_entries_per_buf;
  1364. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1365. soc->link_desc_banks[i].base_paddr; i++) {
  1366. uint32_t num_link_descs =
  1367. (soc->link_desc_banks[i].size -
  1368. ((unsigned long)(
  1369. soc->link_desc_banks[i].base_vaddr) -
  1370. (unsigned long)(
  1371. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1372. / link_desc_size;
  1373. unsigned long paddr = (unsigned long)(
  1374. soc->link_desc_banks[i].base_paddr);
  1375. while (num_link_descs) {
  1376. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1377. LINK_DESC_COOKIE(desc_id, i), paddr);
  1378. num_link_descs--;
  1379. desc_id++;
  1380. paddr += link_desc_size;
  1381. rem_entries--;
  1382. if (rem_entries) {
  1383. scatter_buf_ptr += entry_size;
  1384. } else {
  1385. rem_entries = num_entries_per_buf;
  1386. scatter_buf_num++;
  1387. if (scatter_buf_num >= num_scatter_bufs)
  1388. break;
  1389. scatter_buf_ptr = (uint8_t *)(
  1390. soc->wbm_idle_scatter_buf_base_vaddr[
  1391. scatter_buf_num]);
  1392. }
  1393. }
  1394. }
  1395. /* Setup link descriptor idle list in HW */
  1396. hal_setup_link_idle_list(soc->hal_soc,
  1397. soc->wbm_idle_scatter_buf_base_paddr,
  1398. soc->wbm_idle_scatter_buf_base_vaddr,
  1399. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1400. (uint32_t)(scatter_buf_ptr -
  1401. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1402. scatter_buf_num-1])), total_link_descs);
  1403. }
  1404. return 0;
  1405. fail:
  1406. if (soc->wbm_idle_link_ring.hal_srng) {
  1407. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1408. WBM_IDLE_LINK, 0);
  1409. }
  1410. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1411. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1412. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1413. soc->wbm_idle_scatter_buf_size,
  1414. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1415. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1416. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1417. }
  1418. }
  1419. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1420. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1421. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1422. soc->link_desc_banks[i].size,
  1423. soc->link_desc_banks[i].base_vaddr_unaligned,
  1424. soc->link_desc_banks[i].base_paddr_unaligned,
  1425. 0);
  1426. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1427. }
  1428. }
  1429. return QDF_STATUS_E_FAILURE;
  1430. }
  1431. /*
  1432. * Free link descriptor pool that was setup HW
  1433. */
  1434. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1435. {
  1436. int i;
  1437. if (soc->wbm_idle_link_ring.hal_srng) {
  1438. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1439. WBM_IDLE_LINK, 0);
  1440. }
  1441. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1442. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1443. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1444. soc->wbm_idle_scatter_buf_size,
  1445. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1446. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1447. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1448. }
  1449. }
  1450. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1451. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1452. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1453. soc->link_desc_banks[i].size,
  1454. soc->link_desc_banks[i].base_vaddr_unaligned,
  1455. soc->link_desc_banks[i].base_paddr_unaligned,
  1456. 0);
  1457. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1458. }
  1459. }
  1460. }
  1461. /* TODO: Following should be configurable */
  1462. #define WBM_RELEASE_RING_SIZE 64
  1463. #define TCL_CMD_RING_SIZE 32
  1464. #define TCL_STATUS_RING_SIZE 32
  1465. #if defined(QCA_WIFI_QCA6290)
  1466. #define REO_DST_RING_SIZE 1024
  1467. #else
  1468. #define REO_DST_RING_SIZE 2048
  1469. #endif
  1470. #define REO_REINJECT_RING_SIZE 32
  1471. #define RX_RELEASE_RING_SIZE 1024
  1472. #define REO_EXCEPTION_RING_SIZE 128
  1473. #define REO_CMD_RING_SIZE 64
  1474. #define REO_STATUS_RING_SIZE 128
  1475. #define RXDMA_BUF_RING_SIZE 1024
  1476. #define RXDMA_REFILL_RING_SIZE 4096
  1477. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1478. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1479. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1480. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1481. #define RXDMA_ERR_DST_RING_SIZE 1024
  1482. /*
  1483. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1484. * @soc: Datapath SOC handle
  1485. *
  1486. * This is a timer function used to age out stale AST nodes from
  1487. * AST table
  1488. */
  1489. #ifdef FEATURE_WDS
  1490. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1491. {
  1492. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1493. struct dp_pdev *pdev;
  1494. struct dp_vdev *vdev;
  1495. struct dp_peer *peer;
  1496. struct dp_ast_entry *ase, *temp_ase;
  1497. int i;
  1498. qdf_spin_lock_bh(&soc->ast_lock);
  1499. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1500. pdev = soc->pdev_list[i];
  1501. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1502. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1503. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1504. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1505. /*
  1506. * Do not expire static ast entries
  1507. * and HM WDS entries
  1508. */
  1509. if (ase->type != CDP_TXRX_AST_TYPE_WDS)
  1510. continue;
  1511. if (ase->is_active) {
  1512. ase->is_active = FALSE;
  1513. continue;
  1514. }
  1515. DP_STATS_INC(soc, ast.aged_out, 1);
  1516. dp_peer_del_ast(soc, ase);
  1517. }
  1518. }
  1519. }
  1520. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1521. }
  1522. qdf_spin_unlock_bh(&soc->ast_lock);
  1523. if (qdf_atomic_read(&soc->cmn_init_done))
  1524. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1525. }
  1526. /*
  1527. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1528. * @soc: Datapath SOC handle
  1529. *
  1530. * Return: None
  1531. */
  1532. static void dp_soc_wds_attach(struct dp_soc *soc)
  1533. {
  1534. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1535. dp_wds_aging_timer_fn, (void *)soc,
  1536. QDF_TIMER_TYPE_WAKE_APPS);
  1537. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1538. }
  1539. /*
  1540. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1541. * @txrx_soc: DP SOC handle
  1542. *
  1543. * Return: None
  1544. */
  1545. static void dp_soc_wds_detach(struct dp_soc *soc)
  1546. {
  1547. qdf_timer_stop(&soc->wds_aging_timer);
  1548. qdf_timer_free(&soc->wds_aging_timer);
  1549. }
  1550. #else
  1551. static void dp_soc_wds_attach(struct dp_soc *soc)
  1552. {
  1553. }
  1554. static void dp_soc_wds_detach(struct dp_soc *soc)
  1555. {
  1556. }
  1557. #endif
  1558. /*
  1559. * dp_soc_reset_ring_map() - Reset cpu ring map
  1560. * @soc: Datapath soc handler
  1561. *
  1562. * This api resets the default cpu ring map
  1563. */
  1564. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1565. {
  1566. uint8_t i;
  1567. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1568. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1569. if (nss_config == 1) {
  1570. /*
  1571. * Setting Tx ring map for one nss offloaded radio
  1572. */
  1573. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1574. } else if (nss_config == 2) {
  1575. /*
  1576. * Setting Tx ring for two nss offloaded radios
  1577. */
  1578. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1579. } else {
  1580. /*
  1581. * Setting Tx ring map for all nss offloaded radios
  1582. */
  1583. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1584. }
  1585. }
  1586. }
  1587. /*
  1588. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1589. * @dp_soc - DP soc handle
  1590. * @ring_type - ring type
  1591. * @ring_num - ring_num
  1592. *
  1593. * return 0 or 1
  1594. */
  1595. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1596. {
  1597. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1598. uint8_t status = 0;
  1599. switch (ring_type) {
  1600. case WBM2SW_RELEASE:
  1601. case REO_DST:
  1602. case RXDMA_BUF:
  1603. status = ((nss_config) & (1 << ring_num));
  1604. break;
  1605. default:
  1606. break;
  1607. }
  1608. return status;
  1609. }
  1610. /*
  1611. * dp_soc_reset_intr_mask() - reset interrupt mask
  1612. * @dp_soc - DP Soc handle
  1613. *
  1614. * Return: Return void
  1615. */
  1616. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1617. {
  1618. uint8_t j;
  1619. int *grp_mask = NULL;
  1620. int group_number, mask, num_ring;
  1621. /* number of tx ring */
  1622. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1623. /*
  1624. * group mask for tx completion ring.
  1625. */
  1626. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1627. /* loop and reset the mask for only offloaded ring */
  1628. for (j = 0; j < num_ring; j++) {
  1629. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1630. continue;
  1631. }
  1632. /*
  1633. * Group number corresponding to tx offloaded ring.
  1634. */
  1635. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1636. if (group_number < 0) {
  1637. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1638. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1639. WBM2SW_RELEASE, j);
  1640. return;
  1641. }
  1642. /* reset the tx mask for offloaded ring */
  1643. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1644. mask &= (~(1 << j));
  1645. /*
  1646. * reset the interrupt mask for offloaded ring.
  1647. */
  1648. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1649. }
  1650. /* number of rx rings */
  1651. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1652. /*
  1653. * group mask for reo destination ring.
  1654. */
  1655. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1656. /* loop and reset the mask for only offloaded ring */
  1657. for (j = 0; j < num_ring; j++) {
  1658. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1659. continue;
  1660. }
  1661. /*
  1662. * Group number corresponding to rx offloaded ring.
  1663. */
  1664. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1665. if (group_number < 0) {
  1666. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1667. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1668. REO_DST, j);
  1669. return;
  1670. }
  1671. /* set the interrupt mask for offloaded ring */
  1672. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1673. mask &= (~(1 << j));
  1674. /*
  1675. * set the interrupt mask to zero for rx offloaded radio.
  1676. */
  1677. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1678. }
  1679. /*
  1680. * group mask for Rx buffer refill ring
  1681. */
  1682. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1683. /* loop and reset the mask for only offloaded ring */
  1684. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1685. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1686. continue;
  1687. }
  1688. /*
  1689. * Group number corresponding to rx offloaded ring.
  1690. */
  1691. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1692. if (group_number < 0) {
  1693. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1694. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1695. REO_DST, j);
  1696. return;
  1697. }
  1698. /* set the interrupt mask for offloaded ring */
  1699. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1700. group_number);
  1701. mask &= (~(1 << j));
  1702. /*
  1703. * set the interrupt mask to zero for rx offloaded radio.
  1704. */
  1705. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1706. group_number, mask);
  1707. }
  1708. }
  1709. #ifdef IPA_OFFLOAD
  1710. /**
  1711. * dp_reo_remap_config() - configure reo remap register value based
  1712. * nss configuration.
  1713. * based on offload_radio value below remap configuration
  1714. * get applied.
  1715. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1716. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1717. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1718. * 3 - both Radios handled by NSS (remap not required)
  1719. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1720. *
  1721. * @remap1: output parameter indicates reo remap 1 register value
  1722. * @remap2: output parameter indicates reo remap 2 register value
  1723. * Return: bool type, true if remap is configured else false.
  1724. */
  1725. static bool dp_reo_remap_config(struct dp_soc *soc,
  1726. uint32_t *remap1,
  1727. uint32_t *remap2)
  1728. {
  1729. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1730. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1731. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1732. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1733. return true;
  1734. }
  1735. #else
  1736. static bool dp_reo_remap_config(struct dp_soc *soc,
  1737. uint32_t *remap1,
  1738. uint32_t *remap2)
  1739. {
  1740. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1741. switch (offload_radio) {
  1742. case 0:
  1743. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1744. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1745. (0x3 << 18) | (0x4 << 21)) << 8;
  1746. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1747. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1748. (0x3 << 18) | (0x4 << 21)) << 8;
  1749. break;
  1750. case 1:
  1751. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1752. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1753. (0x2 << 18) | (0x3 << 21)) << 8;
  1754. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1755. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1756. (0x4 << 18) | (0x2 << 21)) << 8;
  1757. break;
  1758. case 2:
  1759. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1760. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1761. (0x1 << 18) | (0x3 << 21)) << 8;
  1762. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1763. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1764. (0x4 << 18) | (0x1 << 21)) << 8;
  1765. break;
  1766. case 3:
  1767. /* return false if both radios are offloaded to NSS */
  1768. return false;
  1769. }
  1770. return true;
  1771. }
  1772. #endif
  1773. /*
  1774. * dp_reo_frag_dst_set() - configure reo register to set the
  1775. * fragment destination ring
  1776. * @soc : Datapath soc
  1777. * @frag_dst_ring : output parameter to set fragment destination ring
  1778. *
  1779. * Based on offload_radio below fragment destination rings is selected
  1780. * 0 - TCL
  1781. * 1 - SW1
  1782. * 2 - SW2
  1783. * 3 - SW3
  1784. * 4 - SW4
  1785. * 5 - Release
  1786. * 6 - FW
  1787. * 7 - alternate select
  1788. *
  1789. * return: void
  1790. */
  1791. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1792. {
  1793. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1794. switch (offload_radio) {
  1795. case 0:
  1796. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1797. break;
  1798. case 3:
  1799. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1800. break;
  1801. default:
  1802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1803. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1804. break;
  1805. }
  1806. }
  1807. /*
  1808. * dp_soc_cmn_setup() - Common SoC level initializion
  1809. * @soc: Datapath SOC handle
  1810. *
  1811. * This is an internal function used to setup common SOC data structures,
  1812. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1813. */
  1814. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1815. {
  1816. int i;
  1817. struct hal_reo_params reo_params;
  1818. int tx_ring_size;
  1819. int tx_comp_ring_size;
  1820. if (qdf_atomic_read(&soc->cmn_init_done))
  1821. return 0;
  1822. if (dp_hw_link_desc_pool_setup(soc))
  1823. goto fail1;
  1824. /* Setup SRNG rings */
  1825. /* Common rings */
  1826. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1827. WBM_RELEASE_RING_SIZE)) {
  1828. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1829. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1830. goto fail1;
  1831. }
  1832. soc->num_tcl_data_rings = 0;
  1833. /* Tx data rings */
  1834. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1835. soc->num_tcl_data_rings =
  1836. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1837. tx_comp_ring_size =
  1838. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1839. tx_ring_size =
  1840. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1841. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1842. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1843. TCL_DATA, i, 0, tx_ring_size)) {
  1844. QDF_TRACE(QDF_MODULE_ID_DP,
  1845. QDF_TRACE_LEVEL_ERROR,
  1846. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1847. goto fail1;
  1848. }
  1849. /*
  1850. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1851. * count
  1852. */
  1853. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1854. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1855. QDF_TRACE(QDF_MODULE_ID_DP,
  1856. QDF_TRACE_LEVEL_ERROR,
  1857. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1858. goto fail1;
  1859. }
  1860. }
  1861. } else {
  1862. /* This will be incremented during per pdev ring setup */
  1863. soc->num_tcl_data_rings = 0;
  1864. }
  1865. if (dp_tx_soc_attach(soc)) {
  1866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1867. FL("dp_tx_soc_attach failed"));
  1868. goto fail1;
  1869. }
  1870. /* TCL command and status rings */
  1871. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1872. TCL_CMD_RING_SIZE)) {
  1873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1874. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1875. goto fail1;
  1876. }
  1877. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1878. TCL_STATUS_RING_SIZE)) {
  1879. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1880. FL("dp_srng_setup failed for tcl_status_ring"));
  1881. goto fail1;
  1882. }
  1883. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1884. * descriptors
  1885. */
  1886. /* Rx data rings */
  1887. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1888. soc->num_reo_dest_rings =
  1889. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1890. QDF_TRACE(QDF_MODULE_ID_DP,
  1891. QDF_TRACE_LEVEL_ERROR,
  1892. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1893. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1894. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1895. i, 0, REO_DST_RING_SIZE)) {
  1896. QDF_TRACE(QDF_MODULE_ID_DP,
  1897. QDF_TRACE_LEVEL_ERROR,
  1898. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1899. goto fail1;
  1900. }
  1901. }
  1902. } else {
  1903. /* This will be incremented during per pdev ring setup */
  1904. soc->num_reo_dest_rings = 0;
  1905. }
  1906. /* LMAC RxDMA to SW Rings configuration */
  1907. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1908. /* Only valid for MCL */
  1909. struct dp_pdev *pdev = soc->pdev_list[0];
  1910. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1911. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1912. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1913. QDF_TRACE(QDF_MODULE_ID_DP,
  1914. QDF_TRACE_LEVEL_ERROR,
  1915. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1916. goto fail1;
  1917. }
  1918. }
  1919. }
  1920. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1921. /* REO reinjection ring */
  1922. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1923. REO_REINJECT_RING_SIZE)) {
  1924. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1925. FL("dp_srng_setup failed for reo_reinject_ring"));
  1926. goto fail1;
  1927. }
  1928. /* Rx release ring */
  1929. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1930. RX_RELEASE_RING_SIZE)) {
  1931. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1932. FL("dp_srng_setup failed for rx_rel_ring"));
  1933. goto fail1;
  1934. }
  1935. /* Rx exception ring */
  1936. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1937. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1939. FL("dp_srng_setup failed for reo_exception_ring"));
  1940. goto fail1;
  1941. }
  1942. /* REO command and status rings */
  1943. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1944. REO_CMD_RING_SIZE)) {
  1945. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1946. FL("dp_srng_setup failed for reo_cmd_ring"));
  1947. goto fail1;
  1948. }
  1949. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1950. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1951. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1952. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1953. REO_STATUS_RING_SIZE)) {
  1954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1955. FL("dp_srng_setup failed for reo_status_ring"));
  1956. goto fail1;
  1957. }
  1958. qdf_spinlock_create(&soc->ast_lock);
  1959. dp_soc_wds_attach(soc);
  1960. /* Reset the cpu ring map if radio is NSS offloaded */
  1961. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1962. dp_soc_reset_cpu_ring_map(soc);
  1963. dp_soc_reset_intr_mask(soc);
  1964. }
  1965. /* Setup HW REO */
  1966. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1967. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1968. /*
  1969. * Reo ring remap is not required if both radios
  1970. * are offloaded to NSS
  1971. */
  1972. if (!dp_reo_remap_config(soc,
  1973. &reo_params.remap1,
  1974. &reo_params.remap2))
  1975. goto out;
  1976. reo_params.rx_hash_enabled = true;
  1977. }
  1978. /* setup the global rx defrag waitlist */
  1979. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1980. soc->rx.defrag.timeout_ms =
  1981. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1982. soc->rx.flags.defrag_timeout_check =
  1983. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1984. qdf_spinlock_create(&soc->rx.defrag.defrag_lock);
  1985. out:
  1986. /*
  1987. * set the fragment destination ring
  1988. */
  1989. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1990. hal_reo_setup(soc->hal_soc, &reo_params);
  1991. qdf_atomic_set(&soc->cmn_init_done, 1);
  1992. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1993. return 0;
  1994. fail1:
  1995. /*
  1996. * Cleanup will be done as part of soc_detach, which will
  1997. * be called on pdev attach failure
  1998. */
  1999. return QDF_STATUS_E_FAILURE;
  2000. }
  2001. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  2002. static void dp_lro_hash_setup(struct dp_soc *soc)
  2003. {
  2004. struct cdp_lro_hash_config lro_hash;
  2005. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2006. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  2007. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2008. FL("LRO disabled RX hash disabled"));
  2009. return;
  2010. }
  2011. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  2012. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  2013. lro_hash.lro_enable = 1;
  2014. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  2015. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  2016. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  2017. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  2018. }
  2019. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  2020. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  2021. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2022. LRO_IPV4_SEED_ARR_SZ));
  2023. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  2024. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2025. LRO_IPV6_SEED_ARR_SZ));
  2026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2027. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  2028. lro_hash.lro_enable, lro_hash.tcp_flag,
  2029. lro_hash.tcp_flag_mask);
  2030. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2031. QDF_TRACE_LEVEL_ERROR,
  2032. (void *)lro_hash.toeplitz_hash_ipv4,
  2033. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  2034. LRO_IPV4_SEED_ARR_SZ));
  2035. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  2036. QDF_TRACE_LEVEL_ERROR,
  2037. (void *)lro_hash.toeplitz_hash_ipv6,
  2038. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  2039. LRO_IPV6_SEED_ARR_SZ));
  2040. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  2041. if (soc->cdp_soc.ol_ops->lro_hash_config)
  2042. (void)soc->cdp_soc.ol_ops->lro_hash_config
  2043. (soc->ctrl_psoc, &lro_hash);
  2044. }
  2045. /*
  2046. * dp_rxdma_ring_setup() - configure the RX DMA rings
  2047. * @soc: data path SoC handle
  2048. * @pdev: Physical device handle
  2049. *
  2050. * Return: 0 - success, > 0 - failure
  2051. */
  2052. #ifdef QCA_HOST2FW_RXBUF_RING
  2053. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2054. struct dp_pdev *pdev)
  2055. {
  2056. int max_mac_rings =
  2057. wlan_cfg_get_num_mac_rings
  2058. (pdev->wlan_cfg_ctx);
  2059. int i;
  2060. for (i = 0; i < max_mac_rings; i++) {
  2061. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2062. "%s: pdev_id %d mac_id %d\n",
  2063. __func__, pdev->pdev_id, i);
  2064. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  2065. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  2066. QDF_TRACE(QDF_MODULE_ID_DP,
  2067. QDF_TRACE_LEVEL_ERROR,
  2068. FL("failed rx mac ring setup"));
  2069. return QDF_STATUS_E_FAILURE;
  2070. }
  2071. }
  2072. return QDF_STATUS_SUCCESS;
  2073. }
  2074. #else
  2075. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  2076. struct dp_pdev *pdev)
  2077. {
  2078. return QDF_STATUS_SUCCESS;
  2079. }
  2080. #endif
  2081. /**
  2082. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  2083. * @pdev - DP_PDEV handle
  2084. *
  2085. * Return: void
  2086. */
  2087. static inline void
  2088. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  2089. {
  2090. uint8_t map_id;
  2091. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  2092. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  2093. sizeof(default_dscp_tid_map));
  2094. }
  2095. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  2096. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  2097. pdev->dscp_tid_map[map_id],
  2098. map_id);
  2099. }
  2100. }
  2101. #ifdef QCA_SUPPORT_SON
  2102. /**
  2103. * dp_mark_peer_inact(): Update peer inactivity status
  2104. * @peer_handle - datapath peer handle
  2105. *
  2106. * Return: void
  2107. */
  2108. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  2109. {
  2110. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  2111. struct dp_pdev *pdev;
  2112. struct dp_soc *soc;
  2113. bool inactive_old;
  2114. if (!peer)
  2115. return;
  2116. pdev = peer->vdev->pdev;
  2117. soc = pdev->soc;
  2118. inactive_old = peer->peer_bs_inact_flag == 1;
  2119. if (!inactive)
  2120. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2121. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  2122. if (inactive_old != inactive) {
  2123. /**
  2124. * Note: a node lookup can happen in RX datapath context
  2125. * when a node changes from inactive to active (at most once
  2126. * per inactivity timeout threshold)
  2127. */
  2128. if (soc->cdp_soc.ol_ops->record_act_change) {
  2129. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  2130. peer->mac_addr.raw, !inactive);
  2131. }
  2132. }
  2133. }
  2134. /**
  2135. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2136. *
  2137. * Periodically checks the inactivity status
  2138. */
  2139. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2140. {
  2141. struct dp_pdev *pdev;
  2142. struct dp_vdev *vdev;
  2143. struct dp_peer *peer;
  2144. struct dp_soc *soc;
  2145. int i;
  2146. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2147. qdf_spin_lock(&soc->peer_ref_mutex);
  2148. for (i = 0; i < soc->pdev_count; i++) {
  2149. pdev = soc->pdev_list[i];
  2150. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2151. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2152. if (vdev->opmode != wlan_op_mode_ap)
  2153. continue;
  2154. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2155. if (!peer->authorize) {
  2156. /**
  2157. * Inactivity check only interested in
  2158. * connected node
  2159. */
  2160. continue;
  2161. }
  2162. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2163. /**
  2164. * This check ensures we do not wait extra long
  2165. * due to the potential race condition
  2166. */
  2167. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2168. }
  2169. if (peer->peer_bs_inact > 0) {
  2170. /* Do not let it wrap around */
  2171. peer->peer_bs_inact--;
  2172. }
  2173. if (peer->peer_bs_inact == 0)
  2174. dp_mark_peer_inact(peer, true);
  2175. }
  2176. }
  2177. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2178. }
  2179. qdf_spin_unlock(&soc->peer_ref_mutex);
  2180. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2181. soc->pdev_bs_inact_interval * 1000);
  2182. }
  2183. /**
  2184. * dp_free_inact_timer(): free inact timer
  2185. * @timer - inact timer handle
  2186. *
  2187. * Return: bool
  2188. */
  2189. void dp_free_inact_timer(struct dp_soc *soc)
  2190. {
  2191. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2192. }
  2193. #else
  2194. void dp_mark_peer_inact(void *peer, bool inactive)
  2195. {
  2196. return;
  2197. }
  2198. void dp_free_inact_timer(struct dp_soc *soc)
  2199. {
  2200. return;
  2201. }
  2202. #endif
  2203. #ifdef IPA_OFFLOAD
  2204. /**
  2205. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2206. * @soc: data path instance
  2207. * @pdev: core txrx pdev context
  2208. *
  2209. * Return: QDF_STATUS_SUCCESS: success
  2210. * QDF_STATUS_E_RESOURCES: Error return
  2211. */
  2212. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2213. struct dp_pdev *pdev)
  2214. {
  2215. /* Setup second Rx refill buffer ring */
  2216. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2217. IPA_RX_REFILL_BUF_RING_IDX,
  2218. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2219. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2220. FL("dp_srng_setup failed second rx refill ring"));
  2221. return QDF_STATUS_E_FAILURE;
  2222. }
  2223. return QDF_STATUS_SUCCESS;
  2224. }
  2225. /**
  2226. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2227. * @soc: data path instance
  2228. * @pdev: core txrx pdev context
  2229. *
  2230. * Return: void
  2231. */
  2232. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2233. struct dp_pdev *pdev)
  2234. {
  2235. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2236. IPA_RX_REFILL_BUF_RING_IDX);
  2237. }
  2238. #else
  2239. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2240. struct dp_pdev *pdev)
  2241. {
  2242. return QDF_STATUS_SUCCESS;
  2243. }
  2244. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2245. struct dp_pdev *pdev)
  2246. {
  2247. }
  2248. #endif
  2249. /*
  2250. * dp_pdev_attach_wifi3() - attach txrx pdev
  2251. * @ctrl_pdev: Opaque PDEV object
  2252. * @txrx_soc: Datapath SOC handle
  2253. * @htc_handle: HTC handle for host-target interface
  2254. * @qdf_osdev: QDF OS device
  2255. * @pdev_id: PDEV ID
  2256. *
  2257. * Return: DP PDEV handle on success, NULL on failure
  2258. */
  2259. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2260. struct cdp_cfg *ctrl_pdev,
  2261. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2262. {
  2263. int tx_ring_size;
  2264. int tx_comp_ring_size;
  2265. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2266. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2267. int mac_id;
  2268. if (!pdev) {
  2269. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2270. FL("DP PDEV memory allocation failed"));
  2271. goto fail0;
  2272. }
  2273. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2274. if (!pdev->wlan_cfg_ctx) {
  2275. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2276. FL("pdev cfg_attach failed"));
  2277. qdf_mem_free(pdev);
  2278. goto fail0;
  2279. }
  2280. /*
  2281. * set nss pdev config based on soc config
  2282. */
  2283. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2284. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2285. pdev->soc = soc;
  2286. pdev->osif_pdev = ctrl_pdev;
  2287. pdev->pdev_id = pdev_id;
  2288. soc->pdev_list[pdev_id] = pdev;
  2289. soc->pdev_count++;
  2290. TAILQ_INIT(&pdev->vdev_list);
  2291. qdf_spinlock_create(&pdev->vdev_list_lock);
  2292. pdev->vdev_count = 0;
  2293. qdf_spinlock_create(&pdev->tx_mutex);
  2294. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2295. TAILQ_INIT(&pdev->neighbour_peers_list);
  2296. if (dp_soc_cmn_setup(soc)) {
  2297. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2298. FL("dp_soc_cmn_setup failed"));
  2299. goto fail1;
  2300. }
  2301. /* Setup per PDEV TCL rings if configured */
  2302. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2303. tx_ring_size =
  2304. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2305. tx_comp_ring_size =
  2306. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2307. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2308. pdev_id, pdev_id, tx_ring_size)) {
  2309. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2310. FL("dp_srng_setup failed for tcl_data_ring"));
  2311. goto fail1;
  2312. }
  2313. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2314. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2315. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2316. FL("dp_srng_setup failed for tx_comp_ring"));
  2317. goto fail1;
  2318. }
  2319. soc->num_tcl_data_rings++;
  2320. }
  2321. /* Tx specific init */
  2322. if (dp_tx_pdev_attach(pdev)) {
  2323. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2324. FL("dp_tx_pdev_attach failed"));
  2325. goto fail1;
  2326. }
  2327. /* Setup per PDEV REO rings if configured */
  2328. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2329. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2330. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2331. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2332. FL("dp_srng_setup failed for reo_dest_ringn"));
  2333. goto fail1;
  2334. }
  2335. soc->num_reo_dest_rings++;
  2336. }
  2337. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2338. RXDMA_REFILL_RING_SIZE)) {
  2339. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2340. FL("dp_srng_setup failed rx refill ring"));
  2341. goto fail1;
  2342. }
  2343. if (dp_rxdma_ring_setup(soc, pdev)) {
  2344. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2345. FL("RXDMA ring config failed"));
  2346. goto fail1;
  2347. }
  2348. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2349. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  2350. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2351. RXDMA_MONITOR_BUF, 0, mac_for_pdev,
  2352. RXDMA_MONITOR_BUF_RING_SIZE)) {
  2353. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2354. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2355. goto fail1;
  2356. }
  2357. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2358. RXDMA_MONITOR_DST, 0, mac_for_pdev,
  2359. RXDMA_MONITOR_DST_RING_SIZE)) {
  2360. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2361. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2362. goto fail1;
  2363. }
  2364. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2365. RXDMA_MONITOR_STATUS, 0, mac_for_pdev,
  2366. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2367. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2368. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2369. goto fail1;
  2370. }
  2371. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2372. RXDMA_MONITOR_DESC, 0, mac_for_pdev,
  2373. RXDMA_MONITOR_DESC_RING_SIZE)) {
  2374. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2375. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2376. goto fail1;
  2377. }
  2378. }
  2379. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2380. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2381. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2382. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2383. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2384. goto fail1;
  2385. }
  2386. }
  2387. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2388. goto fail1;
  2389. if (dp_ipa_ring_resource_setup(soc, pdev))
  2390. goto fail1;
  2391. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2392. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2393. FL("dp_ipa_uc_attach failed"));
  2394. goto fail1;
  2395. }
  2396. /* Rx specific init */
  2397. if (dp_rx_pdev_attach(pdev)) {
  2398. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2399. FL("dp_rx_pdev_attach failed"));
  2400. goto fail0;
  2401. }
  2402. DP_STATS_INIT(pdev);
  2403. /* Monitor filter init */
  2404. pdev->mon_filter_mode = MON_FILTER_ALL;
  2405. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2406. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2407. pdev->fp_data_filter = FILTER_DATA_ALL;
  2408. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2409. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2410. pdev->mo_data_filter = FILTER_DATA_ALL;
  2411. #ifndef CONFIG_WIN
  2412. /* MCL */
  2413. dp_local_peer_id_pool_init(pdev);
  2414. #endif
  2415. dp_dscp_tid_map_setup(pdev);
  2416. /* Rx monitor mode specific init */
  2417. if (dp_rx_pdev_mon_attach(pdev)) {
  2418. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2419. "dp_rx_pdev_attach failed\n");
  2420. goto fail1;
  2421. }
  2422. if (dp_wdi_event_attach(pdev)) {
  2423. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2424. "dp_wdi_evet_attach failed\n");
  2425. goto fail1;
  2426. }
  2427. /* set the reo destination during initialization */
  2428. pdev->reo_dest = pdev->pdev_id + 1;
  2429. /*
  2430. * initialize ppdu tlv list
  2431. */
  2432. TAILQ_INIT(&pdev->ppdu_info_list);
  2433. pdev->tlv_count = 0;
  2434. pdev->list_depth = 0;
  2435. return (struct cdp_pdev *)pdev;
  2436. fail1:
  2437. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2438. fail0:
  2439. return NULL;
  2440. }
  2441. /*
  2442. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2443. * @soc: data path SoC handle
  2444. * @pdev: Physical device handle
  2445. *
  2446. * Return: void
  2447. */
  2448. #ifdef QCA_HOST2FW_RXBUF_RING
  2449. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2450. struct dp_pdev *pdev)
  2451. {
  2452. int max_mac_rings =
  2453. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2454. int i;
  2455. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2456. max_mac_rings : MAX_RX_MAC_RINGS;
  2457. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2458. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2459. RXDMA_BUF, 1);
  2460. qdf_timer_free(&soc->mon_reap_timer);
  2461. }
  2462. #else
  2463. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2464. struct dp_pdev *pdev)
  2465. {
  2466. }
  2467. #endif
  2468. /*
  2469. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2470. * @pdev: device object
  2471. *
  2472. * Return: void
  2473. */
  2474. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2475. {
  2476. struct dp_neighbour_peer *peer = NULL;
  2477. struct dp_neighbour_peer *temp_peer = NULL;
  2478. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2479. neighbour_peer_list_elem, temp_peer) {
  2480. /* delete this peer from the list */
  2481. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2482. peer, neighbour_peer_list_elem);
  2483. qdf_mem_free(peer);
  2484. }
  2485. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2486. }
  2487. /**
  2488. * dp_htt_ppdu_stats_detach() - detach stats resources
  2489. * @pdev: Datapath PDEV handle
  2490. *
  2491. * Return: void
  2492. */
  2493. static void dp_htt_ppdu_stats_detach(struct dp_pdev *pdev)
  2494. {
  2495. struct ppdu_info *ppdu_info, *ppdu_info_next;
  2496. TAILQ_FOREACH_SAFE(ppdu_info, &pdev->ppdu_info_list,
  2497. ppdu_info_list_elem, ppdu_info_next) {
  2498. if (!ppdu_info)
  2499. break;
  2500. qdf_assert_always(ppdu_info->nbuf);
  2501. qdf_nbuf_free(ppdu_info->nbuf);
  2502. qdf_mem_free(ppdu_info);
  2503. }
  2504. }
  2505. /*
  2506. * dp_pdev_detach_wifi3() - detach txrx pdev
  2507. * @txrx_pdev: Datapath PDEV handle
  2508. * @force: Force detach
  2509. *
  2510. */
  2511. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2512. {
  2513. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2514. struct dp_soc *soc = pdev->soc;
  2515. qdf_nbuf_t curr_nbuf, next_nbuf;
  2516. int mac_id;
  2517. dp_wdi_event_detach(pdev);
  2518. dp_tx_pdev_detach(pdev);
  2519. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2520. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2521. TCL_DATA, pdev->pdev_id);
  2522. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2523. WBM2SW_RELEASE, pdev->pdev_id);
  2524. }
  2525. dp_pktlogmod_exit(pdev);
  2526. dp_rx_pdev_detach(pdev);
  2527. dp_rx_pdev_mon_detach(pdev);
  2528. dp_neighbour_peers_detach(pdev);
  2529. qdf_spinlock_destroy(&pdev->tx_mutex);
  2530. qdf_spinlock_destroy(&pdev->vdev_list_lock);
  2531. dp_ipa_uc_detach(soc, pdev);
  2532. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2533. /* Cleanup per PDEV REO rings if configured */
  2534. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2535. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2536. REO_DST, pdev->pdev_id);
  2537. }
  2538. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2539. dp_rxdma_ring_cleanup(soc, pdev);
  2540. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2541. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring[mac_id],
  2542. RXDMA_MONITOR_BUF, 0);
  2543. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring[mac_id],
  2544. RXDMA_MONITOR_DST, 0);
  2545. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring[mac_id],
  2546. RXDMA_MONITOR_STATUS, 0);
  2547. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring[mac_id],
  2548. RXDMA_MONITOR_DESC, 0);
  2549. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[mac_id],
  2550. RXDMA_DST, 0);
  2551. }
  2552. curr_nbuf = pdev->invalid_peer_head_msdu;
  2553. while (curr_nbuf) {
  2554. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2555. qdf_nbuf_free(curr_nbuf);
  2556. curr_nbuf = next_nbuf;
  2557. }
  2558. dp_htt_ppdu_stats_detach(pdev);
  2559. soc->pdev_list[pdev->pdev_id] = NULL;
  2560. soc->pdev_count--;
  2561. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2562. qdf_mem_free(pdev->dp_txrx_handle);
  2563. qdf_mem_free(pdev);
  2564. }
  2565. /*
  2566. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2567. * @soc: DP SOC handle
  2568. */
  2569. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2570. {
  2571. struct reo_desc_list_node *desc;
  2572. struct dp_rx_tid *rx_tid;
  2573. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2574. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2575. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2576. rx_tid = &desc->rx_tid;
  2577. qdf_mem_unmap_nbytes_single(soc->osdev,
  2578. rx_tid->hw_qdesc_paddr,
  2579. QDF_DMA_BIDIRECTIONAL,
  2580. rx_tid->hw_qdesc_alloc_size);
  2581. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2582. qdf_mem_free(desc);
  2583. }
  2584. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2585. qdf_list_destroy(&soc->reo_desc_freelist);
  2586. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2587. }
  2588. /*
  2589. * dp_soc_detach_wifi3() - Detach txrx SOC
  2590. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2591. */
  2592. static void dp_soc_detach_wifi3(void *txrx_soc)
  2593. {
  2594. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2595. int i;
  2596. qdf_atomic_set(&soc->cmn_init_done, 0);
  2597. qdf_flush_work(&soc->htt_stats.work);
  2598. qdf_disable_work(&soc->htt_stats.work);
  2599. /* Free pending htt stats messages */
  2600. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2601. dp_free_inact_timer(soc);
  2602. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2603. if (soc->pdev_list[i])
  2604. dp_pdev_detach_wifi3(
  2605. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2606. }
  2607. dp_peer_find_detach(soc);
  2608. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2609. * SW descriptors
  2610. */
  2611. /* Free the ring memories */
  2612. /* Common rings */
  2613. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2614. dp_tx_soc_detach(soc);
  2615. /* Tx data rings */
  2616. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2617. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2618. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2619. TCL_DATA, i);
  2620. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2621. WBM2SW_RELEASE, i);
  2622. }
  2623. }
  2624. /* TCL command and status rings */
  2625. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2626. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2627. /* Rx data rings */
  2628. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2629. soc->num_reo_dest_rings =
  2630. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2631. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2632. /* TODO: Get number of rings and ring sizes
  2633. * from wlan_cfg
  2634. */
  2635. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2636. REO_DST, i);
  2637. }
  2638. }
  2639. /* REO reinjection ring */
  2640. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2641. /* Rx release ring */
  2642. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2643. /* Rx exception ring */
  2644. /* TODO: Better to store ring_type and ring_num in
  2645. * dp_srng during setup
  2646. */
  2647. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2648. /* REO command and status rings */
  2649. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2650. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2651. dp_hw_link_desc_pool_cleanup(soc);
  2652. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2653. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2654. htt_soc_detach(soc->htt_handle);
  2655. qdf_spinlock_destroy(&soc->rx.defrag.defrag_lock);
  2656. dp_reo_cmdlist_destroy(soc);
  2657. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2658. dp_reo_desc_freelist_destroy(soc);
  2659. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2660. dp_soc_wds_detach(soc);
  2661. qdf_spinlock_destroy(&soc->ast_lock);
  2662. qdf_mem_free(soc);
  2663. }
  2664. /*
  2665. * dp_rxdma_ring_config() - configure the RX DMA rings
  2666. *
  2667. * This function is used to configure the MAC rings.
  2668. * On MCL host provides buffers in Host2FW ring
  2669. * FW refills (copies) buffers to the ring and updates
  2670. * ring_idx in register
  2671. *
  2672. * @soc: data path SoC handle
  2673. *
  2674. * Return: void
  2675. */
  2676. #ifdef QCA_HOST2FW_RXBUF_RING
  2677. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2678. {
  2679. int i;
  2680. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2681. struct dp_pdev *pdev = soc->pdev_list[i];
  2682. if (pdev) {
  2683. int mac_id;
  2684. bool dbs_enable = 0;
  2685. int max_mac_rings =
  2686. wlan_cfg_get_num_mac_rings
  2687. (pdev->wlan_cfg_ctx);
  2688. htt_srng_setup(soc->htt_handle, 0,
  2689. pdev->rx_refill_buf_ring.hal_srng,
  2690. RXDMA_BUF);
  2691. if (pdev->rx_refill_buf_ring2.hal_srng)
  2692. htt_srng_setup(soc->htt_handle, 0,
  2693. pdev->rx_refill_buf_ring2.hal_srng,
  2694. RXDMA_BUF);
  2695. if (soc->cdp_soc.ol_ops->
  2696. is_hw_dbs_2x2_capable) {
  2697. dbs_enable = soc->cdp_soc.ol_ops->
  2698. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2699. }
  2700. if (dbs_enable) {
  2701. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2702. QDF_TRACE_LEVEL_ERROR,
  2703. FL("DBS enabled max_mac_rings %d\n"),
  2704. max_mac_rings);
  2705. } else {
  2706. max_mac_rings = 1;
  2707. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2708. QDF_TRACE_LEVEL_ERROR,
  2709. FL("DBS disabled, max_mac_rings %d\n"),
  2710. max_mac_rings);
  2711. }
  2712. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2713. FL("pdev_id %d max_mac_rings %d\n"),
  2714. pdev->pdev_id, max_mac_rings);
  2715. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  2716. int mac_for_pdev = dp_get_mac_id_for_pdev(
  2717. mac_id, pdev->pdev_id);
  2718. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2719. QDF_TRACE_LEVEL_ERROR,
  2720. FL("mac_id %d\n"), mac_for_pdev);
  2721. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2722. pdev->rx_mac_buf_ring[mac_id]
  2723. .hal_srng,
  2724. RXDMA_BUF);
  2725. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2726. pdev->rxdma_err_dst_ring[mac_id]
  2727. .hal_srng,
  2728. RXDMA_DST);
  2729. /* Configure monitor mode rings */
  2730. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2731. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2732. RXDMA_MONITOR_BUF);
  2733. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2734. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2735. RXDMA_MONITOR_DST);
  2736. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2737. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2738. RXDMA_MONITOR_STATUS);
  2739. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2740. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2741. RXDMA_MONITOR_DESC);
  2742. }
  2743. }
  2744. }
  2745. /*
  2746. * Timer to reap rxdma status rings.
  2747. * Needed until we enable ppdu end interrupts
  2748. */
  2749. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2750. dp_service_mon_rings, (void *)soc,
  2751. QDF_TIMER_TYPE_WAKE_APPS);
  2752. soc->reap_timer_init = 1;
  2753. }
  2754. #else
  2755. /* This is only for WIN */
  2756. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2757. {
  2758. int i;
  2759. int mac_id;
  2760. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2761. struct dp_pdev *pdev = soc->pdev_list[i];
  2762. if (pdev == NULL)
  2763. continue;
  2764. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  2765. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, i);
  2766. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2767. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2768. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2769. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  2770. RXDMA_MONITOR_BUF);
  2771. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2772. pdev->rxdma_mon_dst_ring[mac_id].hal_srng,
  2773. RXDMA_MONITOR_DST);
  2774. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2775. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  2776. RXDMA_MONITOR_STATUS);
  2777. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2778. pdev->rxdma_mon_desc_ring[mac_id].hal_srng,
  2779. RXDMA_MONITOR_DESC);
  2780. htt_srng_setup(soc->htt_handle, mac_for_pdev,
  2781. pdev->rxdma_err_dst_ring[mac_id].hal_srng,
  2782. RXDMA_DST);
  2783. }
  2784. }
  2785. }
  2786. #endif
  2787. /*
  2788. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2789. * @txrx_soc: Datapath SOC handle
  2790. */
  2791. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2792. {
  2793. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2794. htt_soc_attach_target(soc->htt_handle);
  2795. dp_rxdma_ring_config(soc);
  2796. DP_STATS_INIT(soc);
  2797. /* initialize work queue for stats processing */
  2798. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2799. return 0;
  2800. }
  2801. /*
  2802. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2803. * @txrx_soc: Datapath SOC handle
  2804. */
  2805. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2806. {
  2807. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2808. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2809. }
  2810. /*
  2811. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2812. * @txrx_soc: Datapath SOC handle
  2813. * @nss_cfg: nss config
  2814. */
  2815. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2816. {
  2817. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2818. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2819. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2820. /*
  2821. * TODO: masked out based on the per offloaded radio
  2822. */
  2823. if (config == dp_nss_cfg_dbdc) {
  2824. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2825. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2826. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2827. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2828. }
  2829. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2830. FL("nss-wifi<0> nss config is enabled"));
  2831. }
  2832. /*
  2833. * dp_vdev_attach_wifi3() - attach txrx vdev
  2834. * @txrx_pdev: Datapath PDEV handle
  2835. * @vdev_mac_addr: MAC address of the virtual interface
  2836. * @vdev_id: VDEV Id
  2837. * @wlan_op_mode: VDEV operating mode
  2838. *
  2839. * Return: DP VDEV handle on success, NULL on failure
  2840. */
  2841. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2842. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2843. {
  2844. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2845. struct dp_soc *soc = pdev->soc;
  2846. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2847. if (!vdev) {
  2848. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2849. FL("DP VDEV memory allocation failed"));
  2850. goto fail0;
  2851. }
  2852. vdev->pdev = pdev;
  2853. vdev->vdev_id = vdev_id;
  2854. vdev->opmode = op_mode;
  2855. vdev->osdev = soc->osdev;
  2856. vdev->osif_rx = NULL;
  2857. vdev->osif_rsim_rx_decap = NULL;
  2858. vdev->osif_get_key = NULL;
  2859. vdev->osif_rx_mon = NULL;
  2860. vdev->osif_tx_free_ext = NULL;
  2861. vdev->osif_vdev = NULL;
  2862. vdev->delete.pending = 0;
  2863. vdev->safemode = 0;
  2864. vdev->drop_unenc = 1;
  2865. vdev->sec_type = cdp_sec_type_none;
  2866. #ifdef notyet
  2867. vdev->filters_num = 0;
  2868. #endif
  2869. qdf_mem_copy(
  2870. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2871. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2872. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2873. vdev->dscp_tid_map_id = 0;
  2874. vdev->mcast_enhancement_en = 0;
  2875. /* TODO: Initialize default HTT meta data that will be used in
  2876. * TCL descriptors for packets transmitted from this VDEV
  2877. */
  2878. TAILQ_INIT(&vdev->peer_list);
  2879. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2880. /* add this vdev into the pdev's list */
  2881. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2882. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2883. pdev->vdev_count++;
  2884. dp_tx_vdev_attach(vdev);
  2885. if ((soc->intr_mode == DP_INTR_POLL) &&
  2886. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2887. if (pdev->vdev_count == 1)
  2888. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2889. }
  2890. dp_lro_hash_setup(soc);
  2891. /* LRO */
  2892. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2893. wlan_op_mode_sta == vdev->opmode)
  2894. vdev->lro_enable = true;
  2895. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2896. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2897. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2898. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2899. DP_STATS_INIT(vdev);
  2900. if (wlan_op_mode_sta == vdev->opmode)
  2901. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2902. vdev->mac_addr.raw);
  2903. return (struct cdp_vdev *)vdev;
  2904. fail0:
  2905. return NULL;
  2906. }
  2907. /**
  2908. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2909. * @vdev: Datapath VDEV handle
  2910. * @osif_vdev: OSIF vdev handle
  2911. * @txrx_ops: Tx and Rx operations
  2912. *
  2913. * Return: DP VDEV handle on success, NULL on failure
  2914. */
  2915. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2916. void *osif_vdev,
  2917. struct ol_txrx_ops *txrx_ops)
  2918. {
  2919. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2920. vdev->osif_vdev = osif_vdev;
  2921. vdev->osif_rx = txrx_ops->rx.rx;
  2922. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2923. vdev->osif_get_key = txrx_ops->get_key;
  2924. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2925. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2926. #ifdef notyet
  2927. #if ATH_SUPPORT_WAPI
  2928. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2929. #endif
  2930. #endif
  2931. #ifdef UMAC_SUPPORT_PROXY_ARP
  2932. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2933. #endif
  2934. vdev->me_convert = txrx_ops->me_convert;
  2935. /* TODO: Enable the following once Tx code is integrated */
  2936. if (vdev->mesh_vdev)
  2937. txrx_ops->tx.tx = dp_tx_send_mesh;
  2938. else
  2939. txrx_ops->tx.tx = dp_tx_send;
  2940. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2942. "DP Vdev Register success");
  2943. }
  2944. /**
  2945. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2946. * @vdev: Datapath VDEV handle
  2947. *
  2948. * Return: void
  2949. */
  2950. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2951. {
  2952. struct dp_pdev *pdev = vdev->pdev;
  2953. struct dp_soc *soc = pdev->soc;
  2954. struct dp_peer *peer;
  2955. uint16_t *peer_ids;
  2956. uint8_t i = 0, j = 0;
  2957. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2958. if (!peer_ids) {
  2959. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2960. "DP alloc failure - unable to flush peers");
  2961. return;
  2962. }
  2963. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2964. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2965. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2966. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2967. if (j < soc->max_peers)
  2968. peer_ids[j++] = peer->peer_ids[i];
  2969. }
  2970. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2971. for (i = 0; i < j ; i++)
  2972. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2973. qdf_mem_free(peer_ids);
  2974. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2975. FL("Flushed peers for vdev object %pK "), vdev);
  2976. }
  2977. /*
  2978. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2979. * @txrx_vdev: Datapath VDEV handle
  2980. * @callback: Callback OL_IF on completion of detach
  2981. * @cb_context: Callback context
  2982. *
  2983. */
  2984. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2985. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2986. {
  2987. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2988. struct dp_pdev *pdev = vdev->pdev;
  2989. struct dp_soc *soc = pdev->soc;
  2990. /* preconditions */
  2991. qdf_assert(vdev);
  2992. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  2993. /* remove the vdev from its parent pdev's list */
  2994. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2995. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  2996. if (wlan_op_mode_sta == vdev->opmode)
  2997. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2998. /*
  2999. * If Target is hung, flush all peers before detaching vdev
  3000. * this will free all references held due to missing
  3001. * unmap commands from Target
  3002. */
  3003. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  3004. dp_vdev_flush_peers(vdev);
  3005. /*
  3006. * Use peer_ref_mutex while accessing peer_list, in case
  3007. * a peer is in the process of being removed from the list.
  3008. */
  3009. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3010. /* check that the vdev has no peers allocated */
  3011. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  3012. /* debug print - will be removed later */
  3013. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3014. FL("not deleting vdev object %pK (%pM)"
  3015. "until deletion finishes for all its peers"),
  3016. vdev, vdev->mac_addr.raw);
  3017. /* indicate that the vdev needs to be deleted */
  3018. vdev->delete.pending = 1;
  3019. vdev->delete.callback = callback;
  3020. vdev->delete.context = cb_context;
  3021. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3022. return;
  3023. }
  3024. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3025. dp_tx_vdev_detach(vdev);
  3026. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3027. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  3028. qdf_mem_free(vdev);
  3029. if (callback)
  3030. callback(cb_context);
  3031. }
  3032. /*
  3033. * dp_peer_create_wifi3() - attach txrx peer
  3034. * @txrx_vdev: Datapath VDEV handle
  3035. * @peer_mac_addr: Peer MAC address
  3036. *
  3037. * Return: DP peeer handle on success, NULL on failure
  3038. */
  3039. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  3040. uint8_t *peer_mac_addr)
  3041. {
  3042. struct dp_peer *peer;
  3043. int i;
  3044. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3045. struct dp_pdev *pdev;
  3046. struct dp_soc *soc;
  3047. /* preconditions */
  3048. qdf_assert(vdev);
  3049. qdf_assert(peer_mac_addr);
  3050. pdev = vdev->pdev;
  3051. soc = pdev->soc;
  3052. peer = dp_peer_find_hash_find(pdev->soc, peer_mac_addr,
  3053. 0, vdev->vdev_id);
  3054. if (peer) {
  3055. peer->delete_in_progress = false;
  3056. qdf_spin_lock_bh(&soc->ast_lock);
  3057. TAILQ_INIT(&peer->ast_entry_list);
  3058. qdf_spin_unlock_bh(&soc->ast_lock);
  3059. /*
  3060. * on peer create, peer ref count decrements, sice new peer is not
  3061. * getting created earlier reference is reused, peer_unref_delete will
  3062. * take care of incrementing count
  3063. * */
  3064. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3065. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3066. vdev->vdev_id, peer->mac_addr.raw);
  3067. }
  3068. #ifndef CONFIG_WIN
  3069. dp_local_peer_id_alloc(pdev, peer);
  3070. #endif
  3071. DP_STATS_INIT(peer);
  3072. return (void *)peer;
  3073. }
  3074. #ifdef notyet
  3075. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  3076. soc->mempool_ol_ath_peer);
  3077. #else
  3078. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  3079. #endif
  3080. if (!peer)
  3081. return NULL; /* failure */
  3082. qdf_mem_zero(peer, sizeof(struct dp_peer));
  3083. TAILQ_INIT(&peer->ast_entry_list);
  3084. /* store provided params */
  3085. peer->vdev = vdev;
  3086. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  3087. qdf_spinlock_create(&peer->peer_info_lock);
  3088. qdf_mem_copy(
  3089. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  3090. /* TODO: See of rx_opt_proc is really required */
  3091. peer->rx_opt_proc = soc->rx_opt_proc;
  3092. /* initialize the peer_id */
  3093. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  3094. peer->peer_ids[i] = HTT_INVALID_PEER;
  3095. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3096. qdf_atomic_init(&peer->ref_cnt);
  3097. /* keep one reference for attach */
  3098. qdf_atomic_inc(&peer->ref_cnt);
  3099. /* add this peer into the vdev's list */
  3100. if (wlan_op_mode_sta == vdev->opmode)
  3101. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  3102. else
  3103. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  3104. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3105. /* TODO: See if hash based search is required */
  3106. dp_peer_find_hash_add(soc, peer);
  3107. /* Initialize the peer state */
  3108. peer->state = OL_TXRX_PEER_STATE_DISC;
  3109. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3110. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  3111. vdev, peer, peer->mac_addr.raw,
  3112. qdf_atomic_read(&peer->ref_cnt));
  3113. /*
  3114. * For every peer MAp message search and set if bss_peer
  3115. */
  3116. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  3117. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3118. "vdev bss_peer!!!!");
  3119. peer->bss_peer = 1;
  3120. vdev->vap_bss_peer = peer;
  3121. }
  3122. #ifndef CONFIG_WIN
  3123. dp_local_peer_id_alloc(pdev, peer);
  3124. #endif
  3125. DP_STATS_INIT(peer);
  3126. return (void *)peer;
  3127. }
  3128. /*
  3129. * dp_peer_setup_wifi3() - initialize the peer
  3130. * @vdev_hdl: virtual device object
  3131. * @peer: Peer object
  3132. *
  3133. * Return: void
  3134. */
  3135. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  3136. {
  3137. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  3138. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3139. struct dp_pdev *pdev;
  3140. struct dp_soc *soc;
  3141. bool hash_based = 0;
  3142. enum cdp_host_reo_dest_ring reo_dest;
  3143. /* preconditions */
  3144. qdf_assert(vdev);
  3145. qdf_assert(peer);
  3146. pdev = vdev->pdev;
  3147. soc = pdev->soc;
  3148. peer->last_assoc_rcvd = 0;
  3149. peer->last_disassoc_rcvd = 0;
  3150. peer->last_deauth_rcvd = 0;
  3151. /*
  3152. * hash based steering is disabled for Radios which are offloaded
  3153. * to NSS
  3154. */
  3155. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  3156. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  3157. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3158. FL("hash based steering for pdev: %d is %d\n"),
  3159. pdev->pdev_id, hash_based);
  3160. /*
  3161. * Below line of code will ensure the proper reo_dest ring is chosen
  3162. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  3163. */
  3164. reo_dest = pdev->reo_dest;
  3165. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  3166. /* TODO: Check the destination ring number to be passed to FW */
  3167. soc->cdp_soc.ol_ops->peer_set_default_routing(
  3168. pdev->osif_pdev, peer->mac_addr.raw,
  3169. peer->vdev->vdev_id, hash_based, reo_dest);
  3170. }
  3171. dp_peer_rx_init(pdev, peer);
  3172. return;
  3173. }
  3174. /*
  3175. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  3176. * @vdev_handle: virtual device object
  3177. * @htt_pkt_type: type of pkt
  3178. *
  3179. * Return: void
  3180. */
  3181. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  3182. enum htt_cmn_pkt_type val)
  3183. {
  3184. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3185. vdev->tx_encap_type = val;
  3186. }
  3187. /*
  3188. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  3189. * @vdev_handle: virtual device object
  3190. * @htt_pkt_type: type of pkt
  3191. *
  3192. * Return: void
  3193. */
  3194. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3195. enum htt_cmn_pkt_type val)
  3196. {
  3197. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3198. vdev->rx_decap_type = val;
  3199. }
  3200. /*
  3201. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3202. * @pdev_handle: physical device object
  3203. * @val: reo destination ring index (1 - 4)
  3204. *
  3205. * Return: void
  3206. */
  3207. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3208. enum cdp_host_reo_dest_ring val)
  3209. {
  3210. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3211. if (pdev)
  3212. pdev->reo_dest = val;
  3213. }
  3214. /*
  3215. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3216. * @pdev_handle: physical device object
  3217. *
  3218. * Return: reo destination ring index
  3219. */
  3220. static enum cdp_host_reo_dest_ring
  3221. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3222. {
  3223. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3224. if (pdev)
  3225. return pdev->reo_dest;
  3226. else
  3227. return cdp_host_reo_dest_ring_unknown;
  3228. }
  3229. #ifdef QCA_SUPPORT_SON
  3230. static void dp_son_peer_authorize(struct dp_peer *peer)
  3231. {
  3232. struct dp_soc *soc;
  3233. soc = peer->vdev->pdev->soc;
  3234. peer->peer_bs_inact_flag = 0;
  3235. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3236. return;
  3237. }
  3238. #else
  3239. static void dp_son_peer_authorize(struct dp_peer *peer)
  3240. {
  3241. return;
  3242. }
  3243. #endif
  3244. /*
  3245. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3246. * @pdev_handle: device object
  3247. * @val: value to be set
  3248. *
  3249. * Return: void
  3250. */
  3251. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3252. uint32_t val)
  3253. {
  3254. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3255. /* Enable/Disable smart mesh filtering. This flag will be checked
  3256. * during rx processing to check if packets are from NAC clients.
  3257. */
  3258. pdev->filter_neighbour_peers = val;
  3259. return 0;
  3260. }
  3261. /*
  3262. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3263. * address for smart mesh filtering
  3264. * @pdev_handle: device object
  3265. * @cmd: Add/Del command
  3266. * @macaddr: nac client mac address
  3267. *
  3268. * Return: void
  3269. */
  3270. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3271. uint32_t cmd, uint8_t *macaddr)
  3272. {
  3273. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3274. struct dp_neighbour_peer *peer = NULL;
  3275. if (!macaddr)
  3276. goto fail0;
  3277. /* Store address of NAC (neighbour peer) which will be checked
  3278. * against TA of received packets.
  3279. */
  3280. if (cmd == DP_NAC_PARAM_ADD) {
  3281. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3282. sizeof(*peer));
  3283. if (!peer) {
  3284. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3285. FL("DP neighbour peer node memory allocation failed"));
  3286. goto fail0;
  3287. }
  3288. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3289. macaddr, DP_MAC_ADDR_LEN);
  3290. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3291. /* add this neighbour peer into the list */
  3292. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3293. neighbour_peer_list_elem);
  3294. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3295. return 1;
  3296. } else if (cmd == DP_NAC_PARAM_DEL) {
  3297. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3298. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3299. neighbour_peer_list_elem) {
  3300. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3301. macaddr, DP_MAC_ADDR_LEN)) {
  3302. /* delete this peer from the list */
  3303. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3304. peer, neighbour_peer_list_elem);
  3305. qdf_mem_free(peer);
  3306. break;
  3307. }
  3308. }
  3309. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3310. return 1;
  3311. }
  3312. fail0:
  3313. return 0;
  3314. }
  3315. /*
  3316. * dp_get_sec_type() - Get the security type
  3317. * @peer: Datapath peer handle
  3318. * @sec_idx: Security id (mcast, ucast)
  3319. *
  3320. * return sec_type: Security type
  3321. */
  3322. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3323. {
  3324. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3325. return dpeer->security[sec_idx].sec_type;
  3326. }
  3327. /*
  3328. * dp_peer_authorize() - authorize txrx peer
  3329. * @peer_handle: Datapath peer handle
  3330. * @authorize
  3331. *
  3332. */
  3333. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3334. {
  3335. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3336. struct dp_soc *soc;
  3337. if (peer != NULL) {
  3338. soc = peer->vdev->pdev->soc;
  3339. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3340. dp_son_peer_authorize(peer);
  3341. peer->authorize = authorize ? 1 : 0;
  3342. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3343. }
  3344. }
  3345. #ifdef QCA_SUPPORT_SON
  3346. /*
  3347. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3348. * @pdev_handle: Device handle
  3349. * @new_threshold : updated threshold value
  3350. *
  3351. */
  3352. static void
  3353. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3354. u_int16_t new_threshold)
  3355. {
  3356. struct dp_vdev *vdev;
  3357. struct dp_peer *peer;
  3358. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3359. struct dp_soc *soc = pdev->soc;
  3360. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3361. if (old_threshold == new_threshold)
  3362. return;
  3363. soc->pdev_bs_inact_reload = new_threshold;
  3364. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3365. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3366. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3367. if (vdev->opmode != wlan_op_mode_ap)
  3368. continue;
  3369. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3370. if (!peer->authorize)
  3371. continue;
  3372. if (old_threshold - peer->peer_bs_inact >=
  3373. new_threshold) {
  3374. dp_mark_peer_inact((void *)peer, true);
  3375. peer->peer_bs_inact = 0;
  3376. } else {
  3377. peer->peer_bs_inact = new_threshold -
  3378. (old_threshold - peer->peer_bs_inact);
  3379. }
  3380. }
  3381. }
  3382. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3383. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3384. }
  3385. /**
  3386. * dp_txrx_reset_inact_count(): Reset inact count
  3387. * @pdev_handle - device handle
  3388. *
  3389. * Return: void
  3390. */
  3391. static void
  3392. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3393. {
  3394. struct dp_vdev *vdev = NULL;
  3395. struct dp_peer *peer = NULL;
  3396. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3397. struct dp_soc *soc = pdev->soc;
  3398. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3399. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3400. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3401. if (vdev->opmode != wlan_op_mode_ap)
  3402. continue;
  3403. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3404. if (!peer->authorize)
  3405. continue;
  3406. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3407. }
  3408. }
  3409. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3410. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3411. }
  3412. /**
  3413. * dp_set_inact_params(): set inactivity params
  3414. * @pdev_handle - device handle
  3415. * @inact_check_interval - inactivity interval
  3416. * @inact_normal - Inactivity normal
  3417. * @inact_overload - Inactivity overload
  3418. *
  3419. * Return: bool
  3420. */
  3421. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3422. u_int16_t inact_check_interval,
  3423. u_int16_t inact_normal, u_int16_t inact_overload)
  3424. {
  3425. struct dp_soc *soc;
  3426. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3427. if (!pdev)
  3428. return false;
  3429. soc = pdev->soc;
  3430. if (!soc)
  3431. return false;
  3432. soc->pdev_bs_inact_interval = inact_check_interval;
  3433. soc->pdev_bs_inact_normal = inact_normal;
  3434. soc->pdev_bs_inact_overload = inact_overload;
  3435. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3436. soc->pdev_bs_inact_normal);
  3437. return true;
  3438. }
  3439. /**
  3440. * dp_start_inact_timer(): Inactivity timer start
  3441. * @pdev_handle - device handle
  3442. * @enable - Inactivity timer start/stop
  3443. *
  3444. * Return: bool
  3445. */
  3446. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3447. {
  3448. struct dp_soc *soc;
  3449. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3450. if (!pdev)
  3451. return false;
  3452. soc = pdev->soc;
  3453. if (!soc)
  3454. return false;
  3455. if (enable) {
  3456. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3457. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3458. soc->pdev_bs_inact_interval * 1000);
  3459. } else {
  3460. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3461. }
  3462. return true;
  3463. }
  3464. /**
  3465. * dp_set_overload(): Set inactivity overload
  3466. * @pdev_handle - device handle
  3467. * @overload - overload status
  3468. *
  3469. * Return: void
  3470. */
  3471. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3472. {
  3473. struct dp_soc *soc;
  3474. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3475. if (!pdev)
  3476. return;
  3477. soc = pdev->soc;
  3478. if (!soc)
  3479. return;
  3480. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3481. overload ? soc->pdev_bs_inact_overload :
  3482. soc->pdev_bs_inact_normal);
  3483. }
  3484. /**
  3485. * dp_peer_is_inact(): check whether peer is inactive
  3486. * @peer_handle - datapath peer handle
  3487. *
  3488. * Return: bool
  3489. */
  3490. bool dp_peer_is_inact(void *peer_handle)
  3491. {
  3492. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3493. if (!peer)
  3494. return false;
  3495. return peer->peer_bs_inact_flag == 1;
  3496. }
  3497. /**
  3498. * dp_init_inact_timer: initialize the inact timer
  3499. * @soc - SOC handle
  3500. *
  3501. * Return: void
  3502. */
  3503. void dp_init_inact_timer(struct dp_soc *soc)
  3504. {
  3505. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3506. dp_txrx_peer_find_inact_timeout_handler,
  3507. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3508. }
  3509. #else
  3510. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3511. u_int16_t inact_normal, u_int16_t inact_overload)
  3512. {
  3513. return false;
  3514. }
  3515. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3516. {
  3517. return false;
  3518. }
  3519. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3520. {
  3521. return;
  3522. }
  3523. void dp_init_inact_timer(struct dp_soc *soc)
  3524. {
  3525. return;
  3526. }
  3527. bool dp_peer_is_inact(void *peer)
  3528. {
  3529. return false;
  3530. }
  3531. #endif
  3532. /*
  3533. * dp_peer_unref_delete() - unref and delete peer
  3534. * @peer_handle: Datapath peer handle
  3535. *
  3536. */
  3537. void dp_peer_unref_delete(void *peer_handle)
  3538. {
  3539. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3540. struct dp_peer *bss_peer = NULL;
  3541. struct dp_vdev *vdev = peer->vdev;
  3542. struct dp_pdev *pdev = vdev->pdev;
  3543. struct dp_soc *soc = pdev->soc;
  3544. struct dp_peer *tmppeer;
  3545. int found = 0;
  3546. uint16_t peer_id;
  3547. uint16_t vdev_id;
  3548. /*
  3549. * Hold the lock all the way from checking if the peer ref count
  3550. * is zero until the peer references are removed from the hash
  3551. * table and vdev list (if the peer ref count is zero).
  3552. * This protects against a new HL tx operation starting to use the
  3553. * peer object just after this function concludes it's done being used.
  3554. * Furthermore, the lock needs to be held while checking whether the
  3555. * vdev's list of peers is empty, to make sure that list is not modified
  3556. * concurrently with the empty check.
  3557. */
  3558. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3559. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3560. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3561. peer, qdf_atomic_read(&peer->ref_cnt));
  3562. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3563. peer_id = peer->peer_ids[0];
  3564. vdev_id = vdev->vdev_id;
  3565. /*
  3566. * Make sure that the reference to the peer in
  3567. * peer object map is removed
  3568. */
  3569. if (peer_id != HTT_INVALID_PEER)
  3570. soc->peer_id_to_obj_map[peer_id] = NULL;
  3571. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3572. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3573. /* remove the reference to the peer from the hash table */
  3574. dp_peer_find_hash_remove(soc, peer);
  3575. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3576. if (tmppeer == peer) {
  3577. found = 1;
  3578. break;
  3579. }
  3580. }
  3581. if (found) {
  3582. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3583. peer_list_elem);
  3584. } else {
  3585. /*Ignoring the remove operation as peer not found*/
  3586. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3587. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3588. peer, vdev, &peer->vdev->peer_list);
  3589. }
  3590. /* cleanup the peer data */
  3591. dp_peer_cleanup(vdev, peer);
  3592. /* check whether the parent vdev has no peers left */
  3593. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3594. /*
  3595. * Now that there are no references to the peer, we can
  3596. * release the peer reference lock.
  3597. */
  3598. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3599. /*
  3600. * Check if the parent vdev was waiting for its peers
  3601. * to be deleted, in order for it to be deleted too.
  3602. */
  3603. if (vdev->delete.pending) {
  3604. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3605. vdev->delete.callback;
  3606. void *vdev_delete_context =
  3607. vdev->delete.context;
  3608. QDF_TRACE(QDF_MODULE_ID_DP,
  3609. QDF_TRACE_LEVEL_INFO_HIGH,
  3610. FL("deleting vdev object %pK (%pM)"
  3611. " - its last peer is done"),
  3612. vdev, vdev->mac_addr.raw);
  3613. /* all peers are gone, go ahead and delete it */
  3614. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3615. FLOW_TYPE_VDEV,
  3616. vdev_id);
  3617. dp_tx_vdev_detach(vdev);
  3618. QDF_TRACE(QDF_MODULE_ID_DP,
  3619. QDF_TRACE_LEVEL_INFO_HIGH,
  3620. FL("deleting vdev object %pK (%pM)"),
  3621. vdev, vdev->mac_addr.raw);
  3622. qdf_mem_free(vdev);
  3623. vdev = NULL;
  3624. if (vdev_delete_cb)
  3625. vdev_delete_cb(vdev_delete_context);
  3626. }
  3627. } else {
  3628. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3629. }
  3630. if (vdev) {
  3631. if (vdev->vap_bss_peer == peer) {
  3632. vdev->vap_bss_peer = NULL;
  3633. }
  3634. }
  3635. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3636. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3637. vdev_id, peer->mac_addr.raw);
  3638. }
  3639. if (!vdev || !vdev->vap_bss_peer) {
  3640. goto free_peer;
  3641. }
  3642. #ifdef notyet
  3643. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3644. #else
  3645. bss_peer = vdev->vap_bss_peer;
  3646. DP_UPDATE_STATS(bss_peer, peer);
  3647. free_peer:
  3648. qdf_mem_free(peer);
  3649. #endif
  3650. } else {
  3651. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3652. }
  3653. }
  3654. /*
  3655. * dp_peer_detach_wifi3() – Detach txrx peer
  3656. * @peer_handle: Datapath peer handle
  3657. * @bitmap: bitmap indicating special handling of request.
  3658. *
  3659. */
  3660. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3661. {
  3662. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3663. /* redirect the peer's rx delivery function to point to a
  3664. * discard func
  3665. */
  3666. peer->rx_opt_proc = dp_rx_discard;
  3667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3668. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3669. #ifndef CONFIG_WIN
  3670. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3671. #endif
  3672. qdf_spinlock_destroy(&peer->peer_info_lock);
  3673. /*
  3674. * Remove the reference added during peer_attach.
  3675. * The peer will still be left allocated until the
  3676. * PEER_UNMAP message arrives to remove the other
  3677. * reference, added by the PEER_MAP message.
  3678. */
  3679. dp_peer_unref_delete(peer_handle);
  3680. }
  3681. /*
  3682. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3683. * @peer_handle: Datapath peer handle
  3684. *
  3685. */
  3686. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3687. {
  3688. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3689. return vdev->mac_addr.raw;
  3690. }
  3691. /*
  3692. * dp_vdev_set_wds() - Enable per packet stats
  3693. * @vdev_handle: DP VDEV handle
  3694. * @val: value
  3695. *
  3696. * Return: none
  3697. */
  3698. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3699. {
  3700. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3701. vdev->wds_enabled = val;
  3702. return 0;
  3703. }
  3704. /*
  3705. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3706. * @peer_handle: Datapath peer handle
  3707. *
  3708. */
  3709. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3710. uint8_t vdev_id)
  3711. {
  3712. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3713. struct dp_vdev *vdev = NULL;
  3714. if (qdf_unlikely(!pdev))
  3715. return NULL;
  3716. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  3717. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3718. if (vdev->vdev_id == vdev_id)
  3719. break;
  3720. }
  3721. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  3722. return (struct cdp_vdev *)vdev;
  3723. }
  3724. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3725. {
  3726. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3727. return vdev->opmode;
  3728. }
  3729. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3730. {
  3731. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3732. struct dp_pdev *pdev = vdev->pdev;
  3733. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3734. }
  3735. /**
  3736. * dp_reset_monitor_mode() - Disable monitor mode
  3737. * @pdev_handle: Datapath PDEV handle
  3738. *
  3739. * Return: 0 on success, not 0 on failure
  3740. */
  3741. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3742. {
  3743. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3744. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3745. struct dp_soc *soc = pdev->soc;
  3746. uint8_t pdev_id;
  3747. int mac_id;
  3748. pdev_id = pdev->pdev_id;
  3749. soc = pdev->soc;
  3750. qdf_spin_lock_bh(&pdev->mon_lock);
  3751. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3752. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3753. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3754. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3755. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3756. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3757. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3758. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3759. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3760. }
  3761. pdev->monitor_vdev = NULL;
  3762. qdf_spin_unlock_bh(&pdev->mon_lock);
  3763. return 0;
  3764. }
  3765. /**
  3766. * dp_set_nac() - set peer_nac
  3767. * @peer_handle: Datapath PEER handle
  3768. *
  3769. * Return: void
  3770. */
  3771. static void dp_set_nac(struct cdp_peer *peer_handle)
  3772. {
  3773. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3774. peer->nac = 1;
  3775. }
  3776. /**
  3777. * dp_get_tx_pending() - read pending tx
  3778. * @pdev_handle: Datapath PDEV handle
  3779. *
  3780. * Return: outstanding tx
  3781. */
  3782. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3783. {
  3784. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3785. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3786. }
  3787. /**
  3788. * dp_get_peer_mac_from_peer_id() - get peer mac
  3789. * @pdev_handle: Datapath PDEV handle
  3790. * @peer_id: Peer ID
  3791. * @peer_mac: MAC addr of PEER
  3792. *
  3793. * Return: void
  3794. */
  3795. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3796. uint32_t peer_id, uint8_t *peer_mac)
  3797. {
  3798. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3799. struct dp_peer *peer;
  3800. if (pdev && peer_mac) {
  3801. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3802. if (peer && peer->mac_addr.raw) {
  3803. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3804. DP_MAC_ADDR_LEN);
  3805. }
  3806. }
  3807. }
  3808. /**
  3809. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3810. * @vdev_handle: Datapath VDEV handle
  3811. * @smart_monitor: Flag to denote if its smart monitor mode
  3812. *
  3813. * Return: 0 on success, not 0 on failure
  3814. */
  3815. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3816. uint8_t smart_monitor)
  3817. {
  3818. /* Many monitor VAPs can exists in a system but only one can be up at
  3819. * anytime
  3820. */
  3821. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3822. struct dp_pdev *pdev;
  3823. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3824. struct dp_soc *soc;
  3825. uint8_t pdev_id;
  3826. int mac_id;
  3827. qdf_assert(vdev);
  3828. pdev = vdev->pdev;
  3829. pdev_id = pdev->pdev_id;
  3830. soc = pdev->soc;
  3831. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3832. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3833. pdev, pdev_id, soc, vdev);
  3834. /*Check if current pdev's monitor_vdev exists */
  3835. if (pdev->monitor_vdev) {
  3836. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3837. "vdev=%pK\n", vdev);
  3838. qdf_assert(vdev);
  3839. }
  3840. pdev->monitor_vdev = vdev;
  3841. /* If smart monitor mode, do not configure monitor ring */
  3842. if (smart_monitor)
  3843. return QDF_STATUS_SUCCESS;
  3844. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3845. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3846. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3847. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3848. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3849. pdev->mo_data_filter);
  3850. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3851. htt_tlv_filter.mpdu_start = 1;
  3852. htt_tlv_filter.msdu_start = 1;
  3853. htt_tlv_filter.packet = 1;
  3854. htt_tlv_filter.msdu_end = 1;
  3855. htt_tlv_filter.mpdu_end = 1;
  3856. htt_tlv_filter.packet_header = 1;
  3857. htt_tlv_filter.attention = 1;
  3858. htt_tlv_filter.ppdu_start = 0;
  3859. htt_tlv_filter.ppdu_end = 0;
  3860. htt_tlv_filter.ppdu_end_user_stats = 0;
  3861. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3862. htt_tlv_filter.ppdu_end_status_done = 0;
  3863. htt_tlv_filter.header_per_msdu = 1;
  3864. htt_tlv_filter.enable_fp =
  3865. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3866. htt_tlv_filter.enable_md = 0;
  3867. htt_tlv_filter.enable_mo =
  3868. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3869. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3870. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3871. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3872. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3873. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3874. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3875. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3876. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3877. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3878. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3879. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3880. }
  3881. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3882. htt_tlv_filter.mpdu_start = 1;
  3883. htt_tlv_filter.msdu_start = 0;
  3884. htt_tlv_filter.packet = 0;
  3885. htt_tlv_filter.msdu_end = 0;
  3886. htt_tlv_filter.mpdu_end = 0;
  3887. htt_tlv_filter.attention = 0;
  3888. htt_tlv_filter.ppdu_start = 1;
  3889. htt_tlv_filter.ppdu_end = 1;
  3890. htt_tlv_filter.ppdu_end_user_stats = 1;
  3891. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3892. htt_tlv_filter.ppdu_end_status_done = 1;
  3893. htt_tlv_filter.enable_fp = 1;
  3894. htt_tlv_filter.enable_md = 0;
  3895. htt_tlv_filter.enable_mo = 1;
  3896. if (pdev->mcopy_mode) {
  3897. htt_tlv_filter.packet_header = 1;
  3898. }
  3899. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  3900. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  3901. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  3902. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  3903. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  3904. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  3905. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3906. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  3907. pdev->pdev_id);
  3908. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3909. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3910. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3911. }
  3912. return QDF_STATUS_SUCCESS;
  3913. }
  3914. /**
  3915. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3916. * @pdev_handle: Datapath PDEV handle
  3917. * @filter_val: Flag to select Filter for monitor mode
  3918. * Return: 0 on success, not 0 on failure
  3919. */
  3920. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3921. struct cdp_monitor_filter *filter_val)
  3922. {
  3923. /* Many monitor VAPs can exists in a system but only one can be up at
  3924. * anytime
  3925. */
  3926. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3927. struct dp_vdev *vdev = pdev->monitor_vdev;
  3928. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3929. struct dp_soc *soc;
  3930. uint8_t pdev_id;
  3931. int mac_id;
  3932. pdev_id = pdev->pdev_id;
  3933. soc = pdev->soc;
  3934. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3935. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3936. pdev, pdev_id, soc, vdev);
  3937. /*Check if current pdev's monitor_vdev exists */
  3938. if (!pdev->monitor_vdev) {
  3939. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3940. "vdev=%pK\n", vdev);
  3941. qdf_assert(vdev);
  3942. }
  3943. /* update filter mode, type in pdev structure */
  3944. pdev->mon_filter_mode = filter_val->mode;
  3945. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3946. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3947. pdev->fp_data_filter = filter_val->fp_data;
  3948. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3949. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3950. pdev->mo_data_filter = filter_val->mo_data;
  3951. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3952. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3953. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3954. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3955. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3956. pdev->mo_data_filter);
  3957. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3958. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3959. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3960. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3961. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3962. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3963. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3964. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  3965. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  3966. }
  3967. htt_tlv_filter.mpdu_start = 1;
  3968. htt_tlv_filter.msdu_start = 1;
  3969. htt_tlv_filter.packet = 1;
  3970. htt_tlv_filter.msdu_end = 1;
  3971. htt_tlv_filter.mpdu_end = 1;
  3972. htt_tlv_filter.packet_header = 1;
  3973. htt_tlv_filter.attention = 1;
  3974. htt_tlv_filter.ppdu_start = 0;
  3975. htt_tlv_filter.ppdu_end = 0;
  3976. htt_tlv_filter.ppdu_end_user_stats = 0;
  3977. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3978. htt_tlv_filter.ppdu_end_status_done = 0;
  3979. htt_tlv_filter.header_per_msdu = 1;
  3980. htt_tlv_filter.enable_fp =
  3981. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3982. htt_tlv_filter.enable_md = 0;
  3983. htt_tlv_filter.enable_mo =
  3984. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3985. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3986. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3987. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3988. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3989. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3990. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3991. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  3992. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  3993. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  3994. pdev->rxdma_mon_buf_ring[mac_id].hal_srng,
  3995. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3996. }
  3997. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3998. htt_tlv_filter.mpdu_start = 1;
  3999. htt_tlv_filter.msdu_start = 0;
  4000. htt_tlv_filter.packet = 0;
  4001. htt_tlv_filter.msdu_end = 0;
  4002. htt_tlv_filter.mpdu_end = 0;
  4003. htt_tlv_filter.attention = 0;
  4004. htt_tlv_filter.ppdu_start = 1;
  4005. htt_tlv_filter.ppdu_end = 1;
  4006. htt_tlv_filter.ppdu_end_user_stats = 1;
  4007. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4008. htt_tlv_filter.ppdu_end_status_done = 1;
  4009. htt_tlv_filter.enable_fp = 1;
  4010. htt_tlv_filter.enable_md = 0;
  4011. htt_tlv_filter.enable_mo = 1;
  4012. if (pdev->mcopy_mode) {
  4013. htt_tlv_filter.packet_header = 1;
  4014. }
  4015. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4016. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4017. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4018. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4019. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4020. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4021. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4022. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  4023. pdev->pdev_id);
  4024. htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
  4025. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  4026. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  4027. }
  4028. return QDF_STATUS_SUCCESS;
  4029. }
  4030. /**
  4031. * dp_get_pdev_id_frm_pdev() - get pdev_id
  4032. * @pdev_handle: Datapath PDEV handle
  4033. *
  4034. * Return: pdev_id
  4035. */
  4036. static
  4037. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  4038. {
  4039. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4040. return pdev->pdev_id;
  4041. }
  4042. /**
  4043. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  4044. * @vdev_handle: Datapath VDEV handle
  4045. * Return: true on ucast filter flag set
  4046. */
  4047. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  4048. {
  4049. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4050. struct dp_pdev *pdev;
  4051. pdev = vdev->pdev;
  4052. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  4053. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  4054. return true;
  4055. return false;
  4056. }
  4057. /**
  4058. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  4059. * @vdev_handle: Datapath VDEV handle
  4060. * Return: true on mcast filter flag set
  4061. */
  4062. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  4063. {
  4064. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4065. struct dp_pdev *pdev;
  4066. pdev = vdev->pdev;
  4067. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  4068. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  4069. return true;
  4070. return false;
  4071. }
  4072. /**
  4073. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  4074. * @vdev_handle: Datapath VDEV handle
  4075. * Return: true on non data filter flag set
  4076. */
  4077. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  4078. {
  4079. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4080. struct dp_pdev *pdev;
  4081. pdev = vdev->pdev;
  4082. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  4083. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  4084. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  4085. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  4086. return true;
  4087. }
  4088. }
  4089. return false;
  4090. }
  4091. #ifdef MESH_MODE_SUPPORT
  4092. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  4093. {
  4094. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4095. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4096. FL("val %d"), val);
  4097. vdev->mesh_vdev = val;
  4098. }
  4099. /*
  4100. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  4101. * @vdev_hdl: virtual device object
  4102. * @val: value to be set
  4103. *
  4104. * Return: void
  4105. */
  4106. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  4107. {
  4108. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  4109. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  4110. FL("val %d"), val);
  4111. vdev->mesh_rx_filter = val;
  4112. }
  4113. #endif
  4114. /*
  4115. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  4116. * Current scope is bar received count
  4117. *
  4118. * @pdev_handle: DP_PDEV handle
  4119. *
  4120. * Return: void
  4121. */
  4122. #define STATS_PROC_TIMEOUT (HZ/1000)
  4123. static void
  4124. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  4125. {
  4126. struct dp_vdev *vdev;
  4127. struct dp_peer *peer;
  4128. uint32_t waitcnt;
  4129. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4130. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4131. if (!peer) {
  4132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4133. FL("DP Invalid Peer refernce"));
  4134. return;
  4135. }
  4136. if (peer->delete_in_progress) {
  4137. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4138. FL("DP Peer deletion in progress"));
  4139. continue;
  4140. }
  4141. qdf_atomic_inc(&peer->ref_cnt);
  4142. waitcnt = 0;
  4143. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  4144. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  4145. && waitcnt < 10) {
  4146. schedule_timeout_interruptible(
  4147. STATS_PROC_TIMEOUT);
  4148. waitcnt++;
  4149. }
  4150. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  4151. dp_peer_unref_delete(peer);
  4152. }
  4153. }
  4154. }
  4155. /**
  4156. * dp_rx_bar_stats_cb(): BAR received stats callback
  4157. * @soc: SOC handle
  4158. * @cb_ctxt: Call back context
  4159. * @reo_status: Reo status
  4160. *
  4161. * return: void
  4162. */
  4163. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  4164. union hal_reo_status *reo_status)
  4165. {
  4166. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  4167. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  4168. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  4169. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  4170. queue_status->header.status);
  4171. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4172. return;
  4173. }
  4174. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  4175. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  4176. }
  4177. /**
  4178. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  4179. * @vdev: DP VDEV handle
  4180. *
  4181. * return: void
  4182. */
  4183. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  4184. {
  4185. struct dp_peer *peer = NULL;
  4186. struct dp_soc *soc = vdev->pdev->soc;
  4187. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  4188. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  4189. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  4190. DP_UPDATE_STATS(vdev, peer);
  4191. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4192. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4193. &vdev->stats, (uint16_t) vdev->vdev_id,
  4194. UPDATE_VDEV_STATS);
  4195. }
  4196. /**
  4197. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  4198. * @pdev: DP PDEV handle
  4199. *
  4200. * return: void
  4201. */
  4202. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  4203. {
  4204. struct dp_vdev *vdev = NULL;
  4205. struct dp_soc *soc = pdev->soc;
  4206. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  4207. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  4208. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  4209. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  4210. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  4211. dp_aggregate_vdev_stats(vdev);
  4212. DP_UPDATE_STATS(pdev, vdev);
  4213. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  4214. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  4215. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  4216. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  4217. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  4218. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  4219. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  4220. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  4221. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  4222. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  4223. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  4224. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4225. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4226. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4227. DP_STATS_AGGR(pdev, vdev,
  4228. tx_i.mcast_en.dropped_map_error);
  4229. DP_STATS_AGGR(pdev, vdev,
  4230. tx_i.mcast_en.dropped_self_mac);
  4231. DP_STATS_AGGR(pdev, vdev,
  4232. tx_i.mcast_en.dropped_send_fail);
  4233. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4234. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4235. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4236. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4237. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4238. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4239. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4240. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4241. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4242. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4243. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4244. pdev->stats.tx_i.dropped.dma_error +
  4245. pdev->stats.tx_i.dropped.ring_full +
  4246. pdev->stats.tx_i.dropped.enqueue_fail +
  4247. pdev->stats.tx_i.dropped.desc_na +
  4248. pdev->stats.tx_i.dropped.res_full;
  4249. pdev->stats.tx.last_ack_rssi =
  4250. vdev->stats.tx.last_ack_rssi;
  4251. pdev->stats.tx_i.tso.num_seg =
  4252. vdev->stats.tx_i.tso.num_seg;
  4253. }
  4254. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  4255. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4256. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4257. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4258. }
  4259. /**
  4260. * dp_vdev_getstats() - get vdev packet level stats
  4261. * @vdev_handle: Datapath VDEV handle
  4262. * @stats: cdp network device stats structure
  4263. *
  4264. * Return: void
  4265. */
  4266. static void dp_vdev_getstats(void *vdev_handle,
  4267. struct cdp_dev_stats *stats)
  4268. {
  4269. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4270. dp_aggregate_vdev_stats(vdev);
  4271. }
  4272. /**
  4273. * dp_pdev_getstats() - get pdev packet level stats
  4274. * @pdev_handle: Datapath PDEV handle
  4275. * @stats: cdp network device stats structure
  4276. *
  4277. * Return: void
  4278. */
  4279. static void dp_pdev_getstats(void *pdev_handle,
  4280. struct cdp_dev_stats *stats)
  4281. {
  4282. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4283. dp_aggregate_pdev_stats(pdev);
  4284. stats->tx_packets = pdev->stats.tx_i.rcvd.num;
  4285. stats->tx_bytes = pdev->stats.tx_i.rcvd.bytes;
  4286. stats->tx_errors = pdev->stats.tx.tx_failed +
  4287. pdev->stats.tx_i.dropped.dropped_pkt.num;
  4288. stats->tx_dropped = stats->tx_errors;
  4289. stats->rx_packets = pdev->stats.rx.unicast.num +
  4290. pdev->stats.rx.multicast.num +
  4291. pdev->stats.rx.bcast.num;
  4292. stats->rx_bytes = pdev->stats.rx.unicast.bytes +
  4293. pdev->stats.rx.multicast.bytes +
  4294. pdev->stats.rx.bcast.bytes;
  4295. }
  4296. /**
  4297. * dp_get_device_stats() - get interface level packet stats
  4298. * @handle: device handle
  4299. * @stats: cdp network device stats structure
  4300. * @type: device type pdev/vdev
  4301. *
  4302. * Return: void
  4303. */
  4304. static void dp_get_device_stats(void *handle,
  4305. struct cdp_dev_stats *stats, uint8_t type)
  4306. {
  4307. switch (type) {
  4308. case UPDATE_VDEV_STATS:
  4309. dp_vdev_getstats(handle, stats);
  4310. break;
  4311. case UPDATE_PDEV_STATS:
  4312. dp_pdev_getstats(handle, stats);
  4313. break;
  4314. default:
  4315. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4316. "apstats cannot be updated for this input "
  4317. "type %d\n", type);
  4318. break;
  4319. }
  4320. }
  4321. /**
  4322. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4323. * @pdev: DP_PDEV Handle
  4324. *
  4325. * Return:void
  4326. */
  4327. static inline void
  4328. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4329. {
  4330. uint8_t index = 0;
  4331. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4332. DP_PRINT_STATS("Received From Stack:");
  4333. DP_PRINT_STATS(" Packets = %d",
  4334. pdev->stats.tx_i.rcvd.num);
  4335. DP_PRINT_STATS(" Bytes = %llu",
  4336. pdev->stats.tx_i.rcvd.bytes);
  4337. DP_PRINT_STATS("Processed:");
  4338. DP_PRINT_STATS(" Packets = %d",
  4339. pdev->stats.tx_i.processed.num);
  4340. DP_PRINT_STATS(" Bytes = %llu",
  4341. pdev->stats.tx_i.processed.bytes);
  4342. DP_PRINT_STATS("Total Completions:");
  4343. DP_PRINT_STATS(" Packets = %u",
  4344. pdev->stats.tx.comp_pkt.num);
  4345. DP_PRINT_STATS(" Bytes = %llu",
  4346. pdev->stats.tx.comp_pkt.bytes);
  4347. DP_PRINT_STATS("Successful Completions:");
  4348. DP_PRINT_STATS(" Packets = %u",
  4349. pdev->stats.tx.tx_success.num);
  4350. DP_PRINT_STATS(" Bytes = %llu",
  4351. pdev->stats.tx.tx_success.bytes);
  4352. DP_PRINT_STATS("Dropped:");
  4353. DP_PRINT_STATS(" Total = %d",
  4354. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4355. DP_PRINT_STATS(" Dma_map_error = %d",
  4356. pdev->stats.tx_i.dropped.dma_error);
  4357. DP_PRINT_STATS(" Ring Full = %d",
  4358. pdev->stats.tx_i.dropped.ring_full);
  4359. DP_PRINT_STATS(" Descriptor Not available = %d",
  4360. pdev->stats.tx_i.dropped.desc_na);
  4361. DP_PRINT_STATS(" HW enqueue failed= %d",
  4362. pdev->stats.tx_i.dropped.enqueue_fail);
  4363. DP_PRINT_STATS(" Resources Full = %d",
  4364. pdev->stats.tx_i.dropped.res_full);
  4365. DP_PRINT_STATS(" FW removed = %d",
  4366. pdev->stats.tx.dropped.fw_rem);
  4367. DP_PRINT_STATS(" FW removed transmitted = %d",
  4368. pdev->stats.tx.dropped.fw_rem_tx);
  4369. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4370. pdev->stats.tx.dropped.fw_rem_notx);
  4371. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4372. pdev->stats.tx.dropped.fw_reason1);
  4373. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4374. pdev->stats.tx.dropped.fw_reason2);
  4375. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4376. pdev->stats.tx.dropped.fw_reason3);
  4377. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4378. pdev->stats.tx.dropped.age_out);
  4379. DP_PRINT_STATS("Scatter Gather:");
  4380. DP_PRINT_STATS(" Packets = %d",
  4381. pdev->stats.tx_i.sg.sg_pkt.num);
  4382. DP_PRINT_STATS(" Bytes = %llu",
  4383. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4384. DP_PRINT_STATS(" Dropped By Host = %d",
  4385. pdev->stats.tx_i.sg.dropped_host);
  4386. DP_PRINT_STATS(" Dropped By Target = %d",
  4387. pdev->stats.tx_i.sg.dropped_target);
  4388. DP_PRINT_STATS("TSO:");
  4389. DP_PRINT_STATS(" Number of Segments = %d",
  4390. pdev->stats.tx_i.tso.num_seg);
  4391. DP_PRINT_STATS(" Packets = %d",
  4392. pdev->stats.tx_i.tso.tso_pkt.num);
  4393. DP_PRINT_STATS(" Bytes = %llu",
  4394. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4395. DP_PRINT_STATS(" Dropped By Host = %d",
  4396. pdev->stats.tx_i.tso.dropped_host);
  4397. DP_PRINT_STATS("Mcast Enhancement:");
  4398. DP_PRINT_STATS(" Packets = %d",
  4399. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4400. DP_PRINT_STATS(" Bytes = %llu",
  4401. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4402. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4403. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4404. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4405. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4406. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4407. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4408. DP_PRINT_STATS(" Unicast sent = %d",
  4409. pdev->stats.tx_i.mcast_en.ucast);
  4410. DP_PRINT_STATS("Raw:");
  4411. DP_PRINT_STATS(" Packets = %d",
  4412. pdev->stats.tx_i.raw.raw_pkt.num);
  4413. DP_PRINT_STATS(" Bytes = %llu",
  4414. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4415. DP_PRINT_STATS(" DMA map error = %d",
  4416. pdev->stats.tx_i.raw.dma_map_error);
  4417. DP_PRINT_STATS("Reinjected:");
  4418. DP_PRINT_STATS(" Packets = %d",
  4419. pdev->stats.tx_i.reinject_pkts.num);
  4420. DP_PRINT_STATS(" Bytes = %llu\n",
  4421. pdev->stats.tx_i.reinject_pkts.bytes);
  4422. DP_PRINT_STATS("Inspected:");
  4423. DP_PRINT_STATS(" Packets = %d",
  4424. pdev->stats.tx_i.inspect_pkts.num);
  4425. DP_PRINT_STATS(" Bytes = %llu",
  4426. pdev->stats.tx_i.inspect_pkts.bytes);
  4427. DP_PRINT_STATS("Nawds Multicast:");
  4428. DP_PRINT_STATS(" Packets = %d",
  4429. pdev->stats.tx_i.nawds_mcast.num);
  4430. DP_PRINT_STATS(" Bytes = %llu",
  4431. pdev->stats.tx_i.nawds_mcast.bytes);
  4432. DP_PRINT_STATS("CCE Classified:");
  4433. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4434. pdev->stats.tx_i.cce_classified);
  4435. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4436. pdev->stats.tx_i.cce_classified_raw);
  4437. DP_PRINT_STATS("Mesh stats:");
  4438. DP_PRINT_STATS(" frames to firmware: %u",
  4439. pdev->stats.tx_i.mesh.exception_fw);
  4440. DP_PRINT_STATS(" completions from fw: %u",
  4441. pdev->stats.tx_i.mesh.completion_fw);
  4442. DP_PRINT_STATS("PPDU stats counter");
  4443. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4444. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4445. pdev->stats.ppdu_stats_counter[index]);
  4446. }
  4447. }
  4448. /**
  4449. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4450. * @pdev: DP_PDEV Handle
  4451. *
  4452. * Return: void
  4453. */
  4454. static inline void
  4455. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4456. {
  4457. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4458. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4459. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4460. pdev->stats.rx.rcvd_reo[0].num,
  4461. pdev->stats.rx.rcvd_reo[1].num,
  4462. pdev->stats.rx.rcvd_reo[2].num,
  4463. pdev->stats.rx.rcvd_reo[3].num);
  4464. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4465. pdev->stats.rx.rcvd_reo[0].bytes,
  4466. pdev->stats.rx.rcvd_reo[1].bytes,
  4467. pdev->stats.rx.rcvd_reo[2].bytes,
  4468. pdev->stats.rx.rcvd_reo[3].bytes);
  4469. DP_PRINT_STATS("Replenished:");
  4470. DP_PRINT_STATS(" Packets = %d",
  4471. pdev->stats.replenish.pkts.num);
  4472. DP_PRINT_STATS(" Bytes = %llu",
  4473. pdev->stats.replenish.pkts.bytes);
  4474. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4475. pdev->stats.buf_freelist);
  4476. DP_PRINT_STATS(" Low threshold intr = %d",
  4477. pdev->stats.replenish.low_thresh_intrs);
  4478. DP_PRINT_STATS("Dropped:");
  4479. DP_PRINT_STATS(" msdu_not_done = %d",
  4480. pdev->stats.dropped.msdu_not_done);
  4481. DP_PRINT_STATS(" mon_rx_drop = %d",
  4482. pdev->stats.dropped.mon_rx_drop);
  4483. DP_PRINT_STATS("Sent To Stack:");
  4484. DP_PRINT_STATS(" Packets = %d",
  4485. pdev->stats.rx.to_stack.num);
  4486. DP_PRINT_STATS(" Bytes = %llu",
  4487. pdev->stats.rx.to_stack.bytes);
  4488. DP_PRINT_STATS("Multicast/Broadcast:");
  4489. DP_PRINT_STATS(" Packets = %d",
  4490. (pdev->stats.rx.multicast.num +
  4491. pdev->stats.rx.bcast.num));
  4492. DP_PRINT_STATS(" Bytes = %llu",
  4493. (pdev->stats.rx.multicast.bytes +
  4494. pdev->stats.rx.bcast.bytes));
  4495. DP_PRINT_STATS("Errors:");
  4496. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4497. pdev->stats.replenish.rxdma_err);
  4498. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4499. pdev->stats.err.desc_alloc_fail);
  4500. DP_PRINT_STATS(" IP checksum error = %d",
  4501. pdev->stats.err.ip_csum_err);
  4502. DP_PRINT_STATS(" TCP/UDP checksum error = %d",
  4503. pdev->stats.err.tcp_udp_csum_err);
  4504. /* Get bar_recv_cnt */
  4505. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4506. DP_PRINT_STATS("BAR Received Count: = %d",
  4507. pdev->stats.rx.bar_recv_cnt);
  4508. }
  4509. /**
  4510. * dp_print_pdev_rx_mon_stats(): Print Pdev level RX monitor stats
  4511. * @pdev: DP_PDEV Handle
  4512. *
  4513. * Return: void
  4514. */
  4515. static inline void
  4516. dp_print_pdev_rx_mon_stats(struct dp_pdev *pdev)
  4517. {
  4518. struct cdp_pdev_mon_stats *rx_mon_stats;
  4519. rx_mon_stats = &pdev->rx_mon_stats;
  4520. DP_PRINT_STATS("PDEV Rx Monitor Stats:\n");
  4521. dp_rx_mon_print_dbg_ppdu_stats(rx_mon_stats);
  4522. DP_PRINT_STATS("status_ppdu_done_cnt = %d",
  4523. rx_mon_stats->status_ppdu_done);
  4524. DP_PRINT_STATS("dest_ppdu_done_cnt = %d",
  4525. rx_mon_stats->dest_ppdu_done);
  4526. DP_PRINT_STATS("dest_mpdu_done_cnt = %d",
  4527. rx_mon_stats->dest_mpdu_done);
  4528. DP_PRINT_STATS("dest_mpdu_drop_cnt = %d",
  4529. rx_mon_stats->dest_mpdu_drop);
  4530. }
  4531. /**
  4532. * dp_print_soc_tx_stats(): Print SOC level stats
  4533. * @soc DP_SOC Handle
  4534. *
  4535. * Return: void
  4536. */
  4537. static inline void
  4538. dp_print_soc_tx_stats(struct dp_soc *soc)
  4539. {
  4540. uint8_t desc_pool_id;
  4541. soc->stats.tx.desc_in_use = 0;
  4542. DP_PRINT_STATS("SOC Tx Stats:\n");
  4543. for (desc_pool_id = 0;
  4544. desc_pool_id < wlan_cfg_get_num_tx_desc_pool(soc->wlan_cfg_ctx);
  4545. desc_pool_id++)
  4546. soc->stats.tx.desc_in_use +=
  4547. soc->tx_desc[desc_pool_id].num_allocated;
  4548. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4549. soc->stats.tx.desc_in_use);
  4550. DP_PRINT_STATS("Invalid peer:");
  4551. DP_PRINT_STATS(" Packets = %d",
  4552. soc->stats.tx.tx_invalid_peer.num);
  4553. DP_PRINT_STATS(" Bytes = %llu",
  4554. soc->stats.tx.tx_invalid_peer.bytes);
  4555. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4556. soc->stats.tx.tcl_ring_full[0],
  4557. soc->stats.tx.tcl_ring_full[1],
  4558. soc->stats.tx.tcl_ring_full[2]);
  4559. }
  4560. /**
  4561. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4562. * @soc: DP_SOC Handle
  4563. *
  4564. * Return:void
  4565. */
  4566. static inline void
  4567. dp_print_soc_rx_stats(struct dp_soc *soc)
  4568. {
  4569. uint32_t i;
  4570. char reo_error[DP_REO_ERR_LENGTH];
  4571. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4572. uint8_t index = 0;
  4573. DP_PRINT_STATS("SOC Rx Stats:\n");
  4574. DP_PRINT_STATS("Errors:\n");
  4575. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4576. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4577. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4578. DP_PRINT_STATS("Invalid RBM = %d",
  4579. soc->stats.rx.err.invalid_rbm);
  4580. DP_PRINT_STATS("Invalid Vdev = %d",
  4581. soc->stats.rx.err.invalid_vdev);
  4582. DP_PRINT_STATS("Invalid Pdev = %d",
  4583. soc->stats.rx.err.invalid_pdev);
  4584. DP_PRINT_STATS("Invalid Peer = %d",
  4585. soc->stats.rx.err.rx_invalid_peer.num);
  4586. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4587. soc->stats.rx.err.hal_ring_access_fail);
  4588. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4589. index += qdf_snprint(&rxdma_error[index],
  4590. DP_RXDMA_ERR_LENGTH - index,
  4591. " %d", soc->stats.rx.err.rxdma_error[i]);
  4592. }
  4593. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4594. rxdma_error);
  4595. index = 0;
  4596. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4597. index += qdf_snprint(&reo_error[index],
  4598. DP_REO_ERR_LENGTH - index,
  4599. " %d", soc->stats.rx.err.reo_error[i]);
  4600. }
  4601. DP_PRINT_STATS("REO Error(0-14):%s",
  4602. reo_error);
  4603. }
  4604. /**
  4605. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4606. * @soc: DP_SOC handle
  4607. * @srng: DP_SRNG handle
  4608. * @ring_name: SRNG name
  4609. *
  4610. * Return: void
  4611. */
  4612. static inline void
  4613. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4614. char *ring_name)
  4615. {
  4616. uint32_t tailp;
  4617. uint32_t headp;
  4618. if (srng->hal_srng != NULL) {
  4619. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4620. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4621. ring_name, headp, tailp);
  4622. }
  4623. }
  4624. /**
  4625. * dp_print_ring_stats(): Print tail and head pointer
  4626. * @pdev: DP_PDEV handle
  4627. *
  4628. * Return:void
  4629. */
  4630. static inline void
  4631. dp_print_ring_stats(struct dp_pdev *pdev)
  4632. {
  4633. uint32_t i;
  4634. char ring_name[STR_MAXLEN + 1];
  4635. int mac_id;
  4636. dp_print_ring_stat_from_hal(pdev->soc,
  4637. &pdev->soc->reo_exception_ring,
  4638. "Reo Exception Ring");
  4639. dp_print_ring_stat_from_hal(pdev->soc,
  4640. &pdev->soc->reo_reinject_ring,
  4641. "Reo Inject Ring");
  4642. dp_print_ring_stat_from_hal(pdev->soc,
  4643. &pdev->soc->reo_cmd_ring,
  4644. "Reo Command Ring");
  4645. dp_print_ring_stat_from_hal(pdev->soc,
  4646. &pdev->soc->reo_status_ring,
  4647. "Reo Status Ring");
  4648. dp_print_ring_stat_from_hal(pdev->soc,
  4649. &pdev->soc->rx_rel_ring,
  4650. "Rx Release ring");
  4651. dp_print_ring_stat_from_hal(pdev->soc,
  4652. &pdev->soc->tcl_cmd_ring,
  4653. "Tcl command Ring");
  4654. dp_print_ring_stat_from_hal(pdev->soc,
  4655. &pdev->soc->tcl_status_ring,
  4656. "Tcl Status Ring");
  4657. dp_print_ring_stat_from_hal(pdev->soc,
  4658. &pdev->soc->wbm_desc_rel_ring,
  4659. "Wbm Desc Rel Ring");
  4660. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4661. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4662. dp_print_ring_stat_from_hal(pdev->soc,
  4663. &pdev->soc->reo_dest_ring[i],
  4664. ring_name);
  4665. }
  4666. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4667. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4668. dp_print_ring_stat_from_hal(pdev->soc,
  4669. &pdev->soc->tcl_data_ring[i],
  4670. ring_name);
  4671. }
  4672. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4673. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4674. dp_print_ring_stat_from_hal(pdev->soc,
  4675. &pdev->soc->tx_comp_ring[i],
  4676. ring_name);
  4677. }
  4678. dp_print_ring_stat_from_hal(pdev->soc,
  4679. &pdev->rx_refill_buf_ring,
  4680. "Rx Refill Buf Ring");
  4681. dp_print_ring_stat_from_hal(pdev->soc,
  4682. &pdev->rx_refill_buf_ring2,
  4683. "Second Rx Refill Buf Ring");
  4684. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  4685. dp_print_ring_stat_from_hal(pdev->soc,
  4686. &pdev->rxdma_mon_buf_ring[mac_id],
  4687. "Rxdma Mon Buf Ring");
  4688. dp_print_ring_stat_from_hal(pdev->soc,
  4689. &pdev->rxdma_mon_dst_ring[mac_id],
  4690. "Rxdma Mon Dst Ring");
  4691. dp_print_ring_stat_from_hal(pdev->soc,
  4692. &pdev->rxdma_mon_status_ring[mac_id],
  4693. "Rxdma Mon Status Ring");
  4694. dp_print_ring_stat_from_hal(pdev->soc,
  4695. &pdev->rxdma_mon_desc_ring[mac_id],
  4696. "Rxdma mon desc Ring");
  4697. }
  4698. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4699. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4700. dp_print_ring_stat_from_hal(pdev->soc,
  4701. &pdev->rxdma_err_dst_ring[i],
  4702. ring_name);
  4703. }
  4704. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4705. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4706. dp_print_ring_stat_from_hal(pdev->soc,
  4707. &pdev->rx_mac_buf_ring[i],
  4708. ring_name);
  4709. }
  4710. }
  4711. /**
  4712. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4713. * @vdev: DP_VDEV handle
  4714. *
  4715. * Return:void
  4716. */
  4717. static inline void
  4718. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4719. {
  4720. struct dp_peer *peer = NULL;
  4721. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4722. DP_STATS_CLR(vdev->pdev);
  4723. DP_STATS_CLR(vdev->pdev->soc);
  4724. DP_STATS_CLR(vdev);
  4725. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4726. if (!peer)
  4727. return;
  4728. DP_STATS_CLR(peer);
  4729. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4730. soc->cdp_soc.ol_ops->update_dp_stats(
  4731. vdev->pdev->osif_pdev,
  4732. &peer->stats,
  4733. peer->peer_ids[0],
  4734. UPDATE_PEER_STATS);
  4735. }
  4736. }
  4737. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4738. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4739. &vdev->stats, (uint16_t)vdev->vdev_id,
  4740. UPDATE_VDEV_STATS);
  4741. }
  4742. /**
  4743. * dp_print_rx_rates(): Print Rx rate stats
  4744. * @vdev: DP_VDEV handle
  4745. *
  4746. * Return:void
  4747. */
  4748. static inline void
  4749. dp_print_rx_rates(struct dp_vdev *vdev)
  4750. {
  4751. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4752. uint8_t i, mcs, pkt_type;
  4753. uint8_t index = 0;
  4754. char nss[DP_NSS_LENGTH];
  4755. DP_PRINT_STATS("Rx Rate Info:\n");
  4756. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4757. index = 0;
  4758. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4759. if (!dp_rate_string[pkt_type][mcs].valid)
  4760. continue;
  4761. DP_PRINT_STATS(" %s = %d",
  4762. dp_rate_string[pkt_type][mcs].mcs_type,
  4763. pdev->stats.rx.pkt_type[pkt_type].
  4764. mcs_count[mcs]);
  4765. }
  4766. DP_PRINT_STATS("\n");
  4767. }
  4768. index = 0;
  4769. for (i = 0; i < SS_COUNT; i++) {
  4770. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4771. " %d", pdev->stats.rx.nss[i]);
  4772. }
  4773. DP_PRINT_STATS("NSS(1-8) = %s",
  4774. nss);
  4775. DP_PRINT_STATS("SGI ="
  4776. " 0.8us %d,"
  4777. " 0.4us %d,"
  4778. " 1.6us %d,"
  4779. " 3.2us %d,",
  4780. pdev->stats.rx.sgi_count[0],
  4781. pdev->stats.rx.sgi_count[1],
  4782. pdev->stats.rx.sgi_count[2],
  4783. pdev->stats.rx.sgi_count[3]);
  4784. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4785. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4786. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4787. DP_PRINT_STATS("Reception Type ="
  4788. " SU: %d,"
  4789. " MU_MIMO:%d,"
  4790. " MU_OFDMA:%d,"
  4791. " MU_OFDMA_MIMO:%d\n",
  4792. pdev->stats.rx.reception_type[0],
  4793. pdev->stats.rx.reception_type[1],
  4794. pdev->stats.rx.reception_type[2],
  4795. pdev->stats.rx.reception_type[3]);
  4796. DP_PRINT_STATS("Aggregation:\n");
  4797. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4798. pdev->stats.rx.ampdu_cnt);
  4799. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4800. pdev->stats.rx.non_ampdu_cnt);
  4801. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4802. pdev->stats.rx.amsdu_cnt);
  4803. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4804. pdev->stats.rx.non_amsdu_cnt);
  4805. }
  4806. /**
  4807. * dp_print_tx_rates(): Print tx rates
  4808. * @vdev: DP_VDEV handle
  4809. *
  4810. * Return:void
  4811. */
  4812. static inline void
  4813. dp_print_tx_rates(struct dp_vdev *vdev)
  4814. {
  4815. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4816. uint8_t mcs, pkt_type;
  4817. uint32_t index;
  4818. DP_PRINT_STATS("Tx Rate Info:\n");
  4819. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4820. index = 0;
  4821. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4822. if (!dp_rate_string[pkt_type][mcs].valid)
  4823. continue;
  4824. DP_PRINT_STATS(" %s = %d",
  4825. dp_rate_string[pkt_type][mcs].mcs_type,
  4826. pdev->stats.tx.pkt_type[pkt_type].
  4827. mcs_count[mcs]);
  4828. }
  4829. DP_PRINT_STATS("\n");
  4830. }
  4831. DP_PRINT_STATS("SGI ="
  4832. " 0.8us %d"
  4833. " 0.4us %d"
  4834. " 1.6us %d"
  4835. " 3.2us %d",
  4836. pdev->stats.tx.sgi_count[0],
  4837. pdev->stats.tx.sgi_count[1],
  4838. pdev->stats.tx.sgi_count[2],
  4839. pdev->stats.tx.sgi_count[3]);
  4840. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4841. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4842. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4843. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4844. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4845. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4846. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4847. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4848. DP_PRINT_STATS("Aggregation:\n");
  4849. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4850. pdev->stats.tx.amsdu_cnt);
  4851. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4852. pdev->stats.tx.non_amsdu_cnt);
  4853. }
  4854. /**
  4855. * dp_print_peer_stats():print peer stats
  4856. * @peer: DP_PEER handle
  4857. *
  4858. * return void
  4859. */
  4860. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4861. {
  4862. uint8_t i, mcs, pkt_type;
  4863. uint32_t index;
  4864. char nss[DP_NSS_LENGTH];
  4865. DP_PRINT_STATS("Node Tx Stats:\n");
  4866. DP_PRINT_STATS("Total Packet Completions = %d",
  4867. peer->stats.tx.comp_pkt.num);
  4868. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4869. peer->stats.tx.comp_pkt.bytes);
  4870. DP_PRINT_STATS("Success Packets = %d",
  4871. peer->stats.tx.tx_success.num);
  4872. DP_PRINT_STATS("Success Bytes = %llu",
  4873. peer->stats.tx.tx_success.bytes);
  4874. DP_PRINT_STATS("Unicast Success Packets = %d",
  4875. peer->stats.tx.ucast.num);
  4876. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4877. peer->stats.tx.ucast.bytes);
  4878. DP_PRINT_STATS("Multicast Success Packets = %d",
  4879. peer->stats.tx.mcast.num);
  4880. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4881. peer->stats.tx.mcast.bytes);
  4882. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4883. peer->stats.tx.bcast.num);
  4884. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4885. peer->stats.tx.bcast.bytes);
  4886. DP_PRINT_STATS("Packets Failed = %d",
  4887. peer->stats.tx.tx_failed);
  4888. DP_PRINT_STATS("Packets In OFDMA = %d",
  4889. peer->stats.tx.ofdma);
  4890. DP_PRINT_STATS("Packets In STBC = %d",
  4891. peer->stats.tx.stbc);
  4892. DP_PRINT_STATS("Packets In LDPC = %d",
  4893. peer->stats.tx.ldpc);
  4894. DP_PRINT_STATS("Packet Retries = %d",
  4895. peer->stats.tx.retries);
  4896. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4897. peer->stats.tx.amsdu_cnt);
  4898. DP_PRINT_STATS("Last Packet RSSI = %d",
  4899. peer->stats.tx.last_ack_rssi);
  4900. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4901. peer->stats.tx.dropped.fw_rem);
  4902. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4903. peer->stats.tx.dropped.fw_rem_tx);
  4904. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4905. peer->stats.tx.dropped.fw_rem_notx);
  4906. DP_PRINT_STATS("Dropped : Age Out = %d",
  4907. peer->stats.tx.dropped.age_out);
  4908. DP_PRINT_STATS("NAWDS : ");
  4909. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4910. peer->stats.tx.nawds_mcast_drop);
  4911. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4912. peer->stats.tx.nawds_mcast.num);
  4913. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4914. peer->stats.tx.nawds_mcast.bytes);
  4915. DP_PRINT_STATS("Rate Info:");
  4916. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4917. index = 0;
  4918. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4919. if (!dp_rate_string[pkt_type][mcs].valid)
  4920. continue;
  4921. DP_PRINT_STATS(" %s = %d",
  4922. dp_rate_string[pkt_type][mcs].mcs_type,
  4923. peer->stats.tx.pkt_type[pkt_type].
  4924. mcs_count[mcs]);
  4925. }
  4926. DP_PRINT_STATS("\n");
  4927. }
  4928. DP_PRINT_STATS("SGI = "
  4929. " 0.8us %d"
  4930. " 0.4us %d"
  4931. " 1.6us %d"
  4932. " 3.2us %d",
  4933. peer->stats.tx.sgi_count[0],
  4934. peer->stats.tx.sgi_count[1],
  4935. peer->stats.tx.sgi_count[2],
  4936. peer->stats.tx.sgi_count[3]);
  4937. DP_PRINT_STATS("Excess Retries per AC ");
  4938. DP_PRINT_STATS(" Best effort = %d",
  4939. peer->stats.tx.excess_retries_per_ac[0]);
  4940. DP_PRINT_STATS(" Background= %d",
  4941. peer->stats.tx.excess_retries_per_ac[1]);
  4942. DP_PRINT_STATS(" Video = %d",
  4943. peer->stats.tx.excess_retries_per_ac[2]);
  4944. DP_PRINT_STATS(" Voice = %d",
  4945. peer->stats.tx.excess_retries_per_ac[3]);
  4946. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4947. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4948. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4949. index = 0;
  4950. for (i = 0; i < SS_COUNT; i++) {
  4951. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4952. " %d", peer->stats.tx.nss[i]);
  4953. }
  4954. DP_PRINT_STATS("NSS(1-8) = %s",
  4955. nss);
  4956. DP_PRINT_STATS("Aggregation:");
  4957. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4958. peer->stats.tx.amsdu_cnt);
  4959. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4960. peer->stats.tx.non_amsdu_cnt);
  4961. DP_PRINT_STATS("Node Rx Stats:");
  4962. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4963. peer->stats.rx.to_stack.num);
  4964. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4965. peer->stats.rx.to_stack.bytes);
  4966. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4967. DP_PRINT_STATS("Ring Id = %d", i);
  4968. DP_PRINT_STATS(" Packets Received = %d",
  4969. peer->stats.rx.rcvd_reo[i].num);
  4970. DP_PRINT_STATS(" Bytes Received = %llu",
  4971. peer->stats.rx.rcvd_reo[i].bytes);
  4972. }
  4973. DP_PRINT_STATS("Multicast Packets Received = %d",
  4974. peer->stats.rx.multicast.num);
  4975. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4976. peer->stats.rx.multicast.bytes);
  4977. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4978. peer->stats.rx.bcast.num);
  4979. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4980. peer->stats.rx.bcast.bytes);
  4981. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4982. peer->stats.rx.intra_bss.pkts.num);
  4983. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4984. peer->stats.rx.intra_bss.pkts.bytes);
  4985. DP_PRINT_STATS("Raw Packets Received = %d",
  4986. peer->stats.rx.raw.num);
  4987. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4988. peer->stats.rx.raw.bytes);
  4989. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4990. peer->stats.rx.err.mic_err);
  4991. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4992. peer->stats.rx.err.decrypt_err);
  4993. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4994. peer->stats.rx.non_ampdu_cnt);
  4995. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4996. peer->stats.rx.ampdu_cnt);
  4997. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4998. peer->stats.rx.non_amsdu_cnt);
  4999. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  5000. peer->stats.rx.amsdu_cnt);
  5001. DP_PRINT_STATS("NAWDS : ");
  5002. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  5003. peer->stats.rx.nawds_mcast_drop);
  5004. DP_PRINT_STATS("SGI ="
  5005. " 0.8us %d"
  5006. " 0.4us %d"
  5007. " 1.6us %d"
  5008. " 3.2us %d",
  5009. peer->stats.rx.sgi_count[0],
  5010. peer->stats.rx.sgi_count[1],
  5011. peer->stats.rx.sgi_count[2],
  5012. peer->stats.rx.sgi_count[3]);
  5013. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  5014. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  5015. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  5016. DP_PRINT_STATS("Reception Type ="
  5017. " SU %d,"
  5018. " MU_MIMO %d,"
  5019. " MU_OFDMA %d,"
  5020. " MU_OFDMA_MIMO %d",
  5021. peer->stats.rx.reception_type[0],
  5022. peer->stats.rx.reception_type[1],
  5023. peer->stats.rx.reception_type[2],
  5024. peer->stats.rx.reception_type[3]);
  5025. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  5026. index = 0;
  5027. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  5028. if (!dp_rate_string[pkt_type][mcs].valid)
  5029. continue;
  5030. DP_PRINT_STATS(" %s = %d",
  5031. dp_rate_string[pkt_type][mcs].mcs_type,
  5032. peer->stats.rx.pkt_type[pkt_type].
  5033. mcs_count[mcs]);
  5034. }
  5035. DP_PRINT_STATS("\n");
  5036. }
  5037. index = 0;
  5038. for (i = 0; i < SS_COUNT; i++) {
  5039. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  5040. " %d", peer->stats.rx.nss[i]);
  5041. }
  5042. DP_PRINT_STATS("NSS(1-8) = %s",
  5043. nss);
  5044. DP_PRINT_STATS("Aggregation:");
  5045. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  5046. peer->stats.rx.ampdu_cnt);
  5047. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  5048. peer->stats.rx.non_ampdu_cnt);
  5049. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  5050. peer->stats.rx.amsdu_cnt);
  5051. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  5052. peer->stats.rx.non_amsdu_cnt);
  5053. }
  5054. /**
  5055. * dp_print_host_stats()- Function to print the stats aggregated at host
  5056. * @vdev_handle: DP_VDEV handle
  5057. * @type: host stats type
  5058. *
  5059. * Available Stat types
  5060. * TXRX_CLEAR_STATS : Clear the stats
  5061. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  5062. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  5063. * TXRX_TX_HOST_STATS: Print Tx Stats
  5064. * TXRX_RX_HOST_STATS: Print Rx Stats
  5065. * TXRX_AST_STATS: Print AST Stats
  5066. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  5067. *
  5068. * Return: 0 on success, print error message in case of failure
  5069. */
  5070. static int
  5071. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  5072. {
  5073. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5074. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5075. dp_aggregate_pdev_stats(pdev);
  5076. switch (type) {
  5077. case TXRX_CLEAR_STATS:
  5078. dp_txrx_host_stats_clr(vdev);
  5079. break;
  5080. case TXRX_RX_RATE_STATS:
  5081. dp_print_rx_rates(vdev);
  5082. break;
  5083. case TXRX_TX_RATE_STATS:
  5084. dp_print_tx_rates(vdev);
  5085. break;
  5086. case TXRX_TX_HOST_STATS:
  5087. dp_print_pdev_tx_stats(pdev);
  5088. dp_print_soc_tx_stats(pdev->soc);
  5089. break;
  5090. case TXRX_RX_HOST_STATS:
  5091. dp_print_pdev_rx_stats(pdev);
  5092. dp_print_soc_rx_stats(pdev->soc);
  5093. break;
  5094. case TXRX_AST_STATS:
  5095. dp_print_ast_stats(pdev->soc);
  5096. dp_print_peer_table(vdev);
  5097. break;
  5098. case TXRX_SRNG_PTR_STATS:
  5099. dp_print_ring_stats(pdev);
  5100. break;
  5101. case TXRX_RX_MON_STATS:
  5102. dp_print_pdev_rx_mon_stats(pdev);
  5103. break;
  5104. default:
  5105. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  5106. break;
  5107. }
  5108. return 0;
  5109. }
  5110. /*
  5111. * dp_get_host_peer_stats()- function to print peer stats
  5112. * @pdev_handle: DP_PDEV handle
  5113. * @mac_addr: mac address of the peer
  5114. *
  5115. * Return: void
  5116. */
  5117. static void
  5118. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  5119. {
  5120. struct dp_peer *peer;
  5121. uint8_t local_id;
  5122. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  5123. &local_id);
  5124. if (!peer) {
  5125. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  5126. "%s: Invalid peer\n", __func__);
  5127. return;
  5128. }
  5129. dp_print_peer_stats(peer);
  5130. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  5131. return;
  5132. }
  5133. /*
  5134. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  5135. * @pdev: DP_PDEV handle
  5136. *
  5137. * Return: void
  5138. */
  5139. static void
  5140. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  5141. {
  5142. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  5143. int mac_id;
  5144. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  5145. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5146. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5147. pdev->pdev_id);
  5148. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5149. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5150. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5151. }
  5152. }
  5153. /*
  5154. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  5155. * @pdev: DP_PDEV handle
  5156. *
  5157. * Return: void
  5158. */
  5159. static void
  5160. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  5161. {
  5162. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  5163. int mac_id;
  5164. htt_tlv_filter.mpdu_start = 1;
  5165. htt_tlv_filter.msdu_start = 0;
  5166. htt_tlv_filter.packet = 0;
  5167. htt_tlv_filter.msdu_end = 0;
  5168. htt_tlv_filter.mpdu_end = 0;
  5169. htt_tlv_filter.attention = 0;
  5170. htt_tlv_filter.ppdu_start = 1;
  5171. htt_tlv_filter.ppdu_end = 1;
  5172. htt_tlv_filter.ppdu_end_user_stats = 1;
  5173. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  5174. htt_tlv_filter.ppdu_end_status_done = 1;
  5175. htt_tlv_filter.enable_fp = 1;
  5176. htt_tlv_filter.enable_md = 0;
  5177. if (pdev->mcopy_mode) {
  5178. htt_tlv_filter.packet_header = 1;
  5179. htt_tlv_filter.enable_mo = 1;
  5180. }
  5181. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  5182. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  5183. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  5184. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  5185. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  5186. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  5187. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  5188. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  5189. pdev->pdev_id);
  5190. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, mac_for_pdev,
  5191. pdev->rxdma_mon_status_ring[mac_id].hal_srng,
  5192. RXDMA_MONITOR_STATUS, RX_BUFFER_SIZE, &htt_tlv_filter);
  5193. }
  5194. }
  5195. /*
  5196. *dp_set_bpr_enable() - API to enable/disable bpr feature
  5197. *@pdev_handle: DP_PDEV handle.
  5198. *@val: Provided value.
  5199. *
  5200. *Return: void
  5201. */
  5202. static void
  5203. dp_set_bpr_enable(struct cdp_pdev *pdev_handle, int val)
  5204. {
  5205. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5206. switch (val) {
  5207. case CDP_BPR_DISABLE:
  5208. pdev->bpr_enable = CDP_BPR_DISABLE;
  5209. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en &&
  5210. !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  5211. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5212. } else if (pdev->enhanced_stats_en &&
  5213. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5214. !pdev->pktlog_ppdu_stats) {
  5215. dp_h2t_cfg_stats_msg_send(pdev,
  5216. DP_PPDU_STATS_CFG_ENH_STATS,
  5217. pdev->pdev_id);
  5218. }
  5219. break;
  5220. case CDP_BPR_ENABLE:
  5221. pdev->bpr_enable = CDP_BPR_ENABLE;
  5222. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable &&
  5223. !pdev->mcopy_mode && !pdev->pktlog_ppdu_stats) {
  5224. dp_h2t_cfg_stats_msg_send(pdev,
  5225. DP_PPDU_STATS_CFG_BPR,
  5226. pdev->pdev_id);
  5227. } else if (pdev->enhanced_stats_en &&
  5228. !pdev->tx_sniffer_enable && !pdev->mcopy_mode &&
  5229. !pdev->pktlog_ppdu_stats) {
  5230. dp_h2t_cfg_stats_msg_send(pdev,
  5231. DP_PPDU_STATS_CFG_BPR_ENH,
  5232. pdev->pdev_id);
  5233. } else if (pdev->pktlog_ppdu_stats) {
  5234. dp_h2t_cfg_stats_msg_send(pdev,
  5235. DP_PPDU_STATS_CFG_BPR_PKTLOG,
  5236. pdev->pdev_id);
  5237. }
  5238. break;
  5239. default:
  5240. break;
  5241. }
  5242. }
  5243. /*
  5244. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  5245. * @pdev_handle: DP_PDEV handle
  5246. * @val: user provided value
  5247. *
  5248. * Return: void
  5249. */
  5250. static void
  5251. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  5252. {
  5253. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5254. switch (val) {
  5255. case 0:
  5256. pdev->tx_sniffer_enable = 0;
  5257. pdev->mcopy_mode = 0;
  5258. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  5259. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5260. dp_ppdu_ring_reset(pdev);
  5261. } else if (pdev->enhanced_stats_en) {
  5262. dp_h2t_cfg_stats_msg_send(pdev,
  5263. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5264. }
  5265. break;
  5266. case 1:
  5267. pdev->tx_sniffer_enable = 1;
  5268. pdev->mcopy_mode = 0;
  5269. if (!pdev->pktlog_ppdu_stats)
  5270. dp_h2t_cfg_stats_msg_send(pdev,
  5271. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5272. break;
  5273. case 2:
  5274. pdev->mcopy_mode = 1;
  5275. pdev->tx_sniffer_enable = 0;
  5276. if (!pdev->enhanced_stats_en)
  5277. dp_ppdu_ring_cfg(pdev);
  5278. if (!pdev->pktlog_ppdu_stats)
  5279. dp_h2t_cfg_stats_msg_send(pdev,
  5280. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  5281. break;
  5282. default:
  5283. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5284. "Invalid value\n");
  5285. break;
  5286. }
  5287. }
  5288. /*
  5289. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  5290. * @pdev_handle: DP_PDEV handle
  5291. *
  5292. * Return: void
  5293. */
  5294. static void
  5295. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5296. {
  5297. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5298. pdev->enhanced_stats_en = 1;
  5299. if (!pdev->mcopy_mode)
  5300. dp_ppdu_ring_cfg(pdev);
  5301. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5302. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  5303. }
  5304. /*
  5305. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  5306. * @pdev_handle: DP_PDEV handle
  5307. *
  5308. * Return: void
  5309. */
  5310. static void
  5311. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  5312. {
  5313. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5314. pdev->enhanced_stats_en = 0;
  5315. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  5316. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  5317. if (!pdev->mcopy_mode)
  5318. dp_ppdu_ring_reset(pdev);
  5319. }
  5320. /*
  5321. * dp_get_fw_peer_stats()- function to print peer stats
  5322. * @pdev_handle: DP_PDEV handle
  5323. * @mac_addr: mac address of the peer
  5324. * @cap: Type of htt stats requested
  5325. *
  5326. * Currently Supporting only MAC ID based requests Only
  5327. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  5328. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  5329. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  5330. *
  5331. * Return: void
  5332. */
  5333. static void
  5334. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  5335. uint32_t cap)
  5336. {
  5337. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5338. int i;
  5339. uint32_t config_param0 = 0;
  5340. uint32_t config_param1 = 0;
  5341. uint32_t config_param2 = 0;
  5342. uint32_t config_param3 = 0;
  5343. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  5344. config_param0 |= (1 << (cap + 1));
  5345. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  5346. config_param1 |= (1 << i);
  5347. }
  5348. config_param2 |= (mac_addr[0] & 0x000000ff);
  5349. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  5350. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  5351. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  5352. config_param3 |= (mac_addr[4] & 0x000000ff);
  5353. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  5354. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  5355. config_param0, config_param1, config_param2,
  5356. config_param3, 0, 0, 0);
  5357. }
  5358. /* This struct definition will be removed from here
  5359. * once it get added in FW headers*/
  5360. struct httstats_cmd_req {
  5361. uint32_t config_param0;
  5362. uint32_t config_param1;
  5363. uint32_t config_param2;
  5364. uint32_t config_param3;
  5365. int cookie;
  5366. u_int8_t stats_id;
  5367. };
  5368. /*
  5369. * dp_get_htt_stats: function to process the httstas request
  5370. * @pdev_handle: DP pdev handle
  5371. * @data: pointer to request data
  5372. * @data_len: length for request data
  5373. *
  5374. * return: void
  5375. */
  5376. static void
  5377. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  5378. {
  5379. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5380. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  5381. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  5382. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  5383. req->config_param0, req->config_param1,
  5384. req->config_param2, req->config_param3,
  5385. req->cookie, 0, 0);
  5386. }
  5387. /*
  5388. * dp_set_pdev_param: function to set parameters in pdev
  5389. * @pdev_handle: DP pdev handle
  5390. * @param: parameter type to be set
  5391. * @val: value of parameter to be set
  5392. *
  5393. * return: void
  5394. */
  5395. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5396. enum cdp_pdev_param_type param, uint8_t val)
  5397. {
  5398. switch (param) {
  5399. case CDP_CONFIG_DEBUG_SNIFFER:
  5400. dp_config_debug_sniffer(pdev_handle, val);
  5401. break;
  5402. case CDP_CONFIG_BPR_ENABLE:
  5403. dp_set_bpr_enable(pdev_handle, val);
  5404. break;
  5405. default:
  5406. break;
  5407. }
  5408. }
  5409. /*
  5410. * dp_set_vdev_param: function to set parameters in vdev
  5411. * @param: parameter type to be set
  5412. * @val: value of parameter to be set
  5413. *
  5414. * return: void
  5415. */
  5416. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5417. enum cdp_vdev_param_type param, uint32_t val)
  5418. {
  5419. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5420. switch (param) {
  5421. case CDP_ENABLE_WDS:
  5422. vdev->wds_enabled = val;
  5423. break;
  5424. case CDP_ENABLE_NAWDS:
  5425. vdev->nawds_enabled = val;
  5426. break;
  5427. case CDP_ENABLE_MCAST_EN:
  5428. vdev->mcast_enhancement_en = val;
  5429. break;
  5430. case CDP_ENABLE_PROXYSTA:
  5431. vdev->proxysta_vdev = val;
  5432. break;
  5433. case CDP_UPDATE_TDLS_FLAGS:
  5434. vdev->tdls_link_connected = val;
  5435. break;
  5436. case CDP_CFG_WDS_AGING_TIMER:
  5437. if (val == 0)
  5438. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5439. else if (val != vdev->wds_aging_timer_val)
  5440. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5441. vdev->wds_aging_timer_val = val;
  5442. break;
  5443. case CDP_ENABLE_AP_BRIDGE:
  5444. if (wlan_op_mode_sta != vdev->opmode)
  5445. vdev->ap_bridge_enabled = val;
  5446. else
  5447. vdev->ap_bridge_enabled = false;
  5448. break;
  5449. case CDP_ENABLE_CIPHER:
  5450. vdev->sec_type = val;
  5451. break;
  5452. case CDP_ENABLE_QWRAP_ISOLATION:
  5453. vdev->isolation_vdev = val;
  5454. break;
  5455. default:
  5456. break;
  5457. }
  5458. dp_tx_vdev_update_search_flags(vdev);
  5459. }
  5460. /**
  5461. * dp_peer_set_nawds: set nawds bit in peer
  5462. * @peer_handle: pointer to peer
  5463. * @value: enable/disable nawds
  5464. *
  5465. * return: void
  5466. */
  5467. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5468. {
  5469. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5470. peer->nawds_enabled = value;
  5471. }
  5472. /*
  5473. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5474. * @vdev_handle: DP_VDEV handle
  5475. * @map_id:ID of map that needs to be updated
  5476. *
  5477. * Return: void
  5478. */
  5479. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5480. uint8_t map_id)
  5481. {
  5482. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5483. vdev->dscp_tid_map_id = map_id;
  5484. return;
  5485. }
  5486. /*
  5487. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5488. * @pdev_handle: DP_PDEV handle
  5489. * @buf: to hold pdev_stats
  5490. *
  5491. * Return: int
  5492. */
  5493. static int
  5494. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5495. {
  5496. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5497. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5498. struct cdp_txrx_stats_req req = {0,};
  5499. dp_aggregate_pdev_stats(pdev);
  5500. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5501. req.cookie_val = 1;
  5502. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5503. req.param1, req.param2, req.param3, 0,
  5504. req.cookie_val, 0);
  5505. msleep(DP_MAX_SLEEP_TIME);
  5506. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5507. req.cookie_val = 1;
  5508. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5509. req.param1, req.param2, req.param3, 0,
  5510. req.cookie_val, 0);
  5511. msleep(DP_MAX_SLEEP_TIME);
  5512. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5513. return TXRX_STATS_LEVEL;
  5514. }
  5515. /**
  5516. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5517. * @pdev: DP_PDEV handle
  5518. * @map_id: ID of map that needs to be updated
  5519. * @tos: index value in map
  5520. * @tid: tid value passed by the user
  5521. *
  5522. * Return: void
  5523. */
  5524. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5525. uint8_t map_id, uint8_t tos, uint8_t tid)
  5526. {
  5527. uint8_t dscp;
  5528. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5529. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5530. pdev->dscp_tid_map[map_id][dscp] = tid;
  5531. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5532. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5533. map_id, dscp);
  5534. return;
  5535. }
  5536. /**
  5537. * dp_fw_stats_process(): Process TxRX FW stats request
  5538. * @vdev_handle: DP VDEV handle
  5539. * @req: stats request
  5540. *
  5541. * return: int
  5542. */
  5543. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5544. struct cdp_txrx_stats_req *req)
  5545. {
  5546. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5547. struct dp_pdev *pdev = NULL;
  5548. uint32_t stats = req->stats;
  5549. uint8_t mac_id = req->mac_id;
  5550. if (!vdev) {
  5551. DP_TRACE(NONE, "VDEV not found");
  5552. return 1;
  5553. }
  5554. pdev = vdev->pdev;
  5555. /*
  5556. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5557. * from param0 to param3 according to below rule:
  5558. *
  5559. * PARAM:
  5560. * - config_param0 : start_offset (stats type)
  5561. * - config_param1 : stats bmask from start offset
  5562. * - config_param2 : stats bmask from start offset + 32
  5563. * - config_param3 : stats bmask from start offset + 64
  5564. */
  5565. if (req->stats == CDP_TXRX_STATS_0) {
  5566. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5567. req->param1 = 0xFFFFFFFF;
  5568. req->param2 = 0xFFFFFFFF;
  5569. req->param3 = 0xFFFFFFFF;
  5570. }
  5571. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5572. req->param1, req->param2, req->param3,
  5573. 0, 0, mac_id);
  5574. }
  5575. /**
  5576. * dp_txrx_stats_request - function to map to firmware and host stats
  5577. * @vdev: virtual handle
  5578. * @req: stats request
  5579. *
  5580. * Return: integer
  5581. */
  5582. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5583. struct cdp_txrx_stats_req *req)
  5584. {
  5585. int host_stats;
  5586. int fw_stats;
  5587. enum cdp_stats stats;
  5588. if (!vdev || !req) {
  5589. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5590. "Invalid vdev/req instance");
  5591. return 0;
  5592. }
  5593. stats = req->stats;
  5594. if (stats >= CDP_TXRX_MAX_STATS)
  5595. return 0;
  5596. /*
  5597. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5598. * has to be updated if new FW HTT stats added
  5599. */
  5600. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5601. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5602. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5603. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5604. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5605. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5606. stats, fw_stats, host_stats);
  5607. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5608. /* update request with FW stats type */
  5609. req->stats = fw_stats;
  5610. return dp_fw_stats_process(vdev, req);
  5611. }
  5612. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5613. (host_stats <= TXRX_HOST_STATS_MAX))
  5614. return dp_print_host_stats(vdev, host_stats);
  5615. else
  5616. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5617. "Wrong Input for TxRx Stats");
  5618. return 0;
  5619. }
  5620. /*
  5621. * dp_print_napi_stats(): NAPI stats
  5622. * @soc - soc handle
  5623. */
  5624. static void dp_print_napi_stats(struct dp_soc *soc)
  5625. {
  5626. hif_print_napi_stats(soc->hif_handle);
  5627. }
  5628. /*
  5629. * dp_print_per_ring_stats(): Packet count per ring
  5630. * @soc - soc handle
  5631. */
  5632. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5633. {
  5634. uint8_t ring;
  5635. uint16_t core;
  5636. uint64_t total_packets;
  5637. DP_TRACE(FATAL, "Reo packets per ring:");
  5638. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5639. total_packets = 0;
  5640. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5641. for (core = 0; core < NR_CPUS; core++) {
  5642. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5643. core, soc->stats.rx.ring_packets[core][ring]);
  5644. total_packets += soc->stats.rx.ring_packets[core][ring];
  5645. }
  5646. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5647. ring, total_packets);
  5648. }
  5649. }
  5650. /*
  5651. * dp_txrx_path_stats() - Function to display dump stats
  5652. * @soc - soc handle
  5653. *
  5654. * return: none
  5655. */
  5656. static void dp_txrx_path_stats(struct dp_soc *soc)
  5657. {
  5658. uint8_t error_code;
  5659. uint8_t loop_pdev;
  5660. struct dp_pdev *pdev;
  5661. uint8_t i;
  5662. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5663. pdev = soc->pdev_list[loop_pdev];
  5664. dp_aggregate_pdev_stats(pdev);
  5665. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5666. "Tx path Statistics:");
  5667. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5668. pdev->stats.tx_i.rcvd.num,
  5669. pdev->stats.tx_i.rcvd.bytes);
  5670. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5671. pdev->stats.tx_i.processed.num,
  5672. pdev->stats.tx_i.processed.bytes);
  5673. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5674. pdev->stats.tx.tx_success.num,
  5675. pdev->stats.tx.tx_success.bytes);
  5676. DP_TRACE(FATAL, "Dropped in host:");
  5677. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5678. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5679. DP_TRACE(FATAL, "Descriptor not available: %u",
  5680. pdev->stats.tx_i.dropped.desc_na);
  5681. DP_TRACE(FATAL, "Ring full: %u",
  5682. pdev->stats.tx_i.dropped.ring_full);
  5683. DP_TRACE(FATAL, "Enqueue fail: %u",
  5684. pdev->stats.tx_i.dropped.enqueue_fail);
  5685. DP_TRACE(FATAL, "DMA Error: %u",
  5686. pdev->stats.tx_i.dropped.dma_error);
  5687. DP_TRACE(FATAL, "Dropped in hardware:");
  5688. DP_TRACE(FATAL, "total packets dropped: %u",
  5689. pdev->stats.tx.tx_failed);
  5690. DP_TRACE(FATAL, "mpdu age out: %u",
  5691. pdev->stats.tx.dropped.age_out);
  5692. DP_TRACE(FATAL, "firmware removed: %u",
  5693. pdev->stats.tx.dropped.fw_rem);
  5694. DP_TRACE(FATAL, "firmware removed tx: %u",
  5695. pdev->stats.tx.dropped.fw_rem_tx);
  5696. DP_TRACE(FATAL, "firmware removed notx %u",
  5697. pdev->stats.tx.dropped.fw_rem_notx);
  5698. DP_TRACE(FATAL, "peer_invalid: %u",
  5699. pdev->soc->stats.tx.tx_invalid_peer.num);
  5700. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5701. DP_TRACE(FATAL, "Single Packet: %u",
  5702. pdev->stats.tx_comp_histogram.pkts_1);
  5703. DP_TRACE(FATAL, "2-20 Packets: %u",
  5704. pdev->stats.tx_comp_histogram.pkts_2_20);
  5705. DP_TRACE(FATAL, "21-40 Packets: %u",
  5706. pdev->stats.tx_comp_histogram.pkts_21_40);
  5707. DP_TRACE(FATAL, "41-60 Packets: %u",
  5708. pdev->stats.tx_comp_histogram.pkts_41_60);
  5709. DP_TRACE(FATAL, "61-80 Packets: %u",
  5710. pdev->stats.tx_comp_histogram.pkts_61_80);
  5711. DP_TRACE(FATAL, "81-100 Packets: %u",
  5712. pdev->stats.tx_comp_histogram.pkts_81_100);
  5713. DP_TRACE(FATAL, "101-200 Packets: %u",
  5714. pdev->stats.tx_comp_histogram.pkts_101_200);
  5715. DP_TRACE(FATAL, " 201+ Packets: %u",
  5716. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5717. DP_TRACE(FATAL, "Rx path statistics");
  5718. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5719. pdev->stats.rx.to_stack.num,
  5720. pdev->stats.rx.to_stack.bytes);
  5721. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5722. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5723. i, pdev->stats.rx.rcvd_reo[i].num,
  5724. pdev->stats.rx.rcvd_reo[i].bytes);
  5725. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5726. pdev->stats.rx.intra_bss.pkts.num,
  5727. pdev->stats.rx.intra_bss.pkts.bytes);
  5728. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5729. pdev->stats.rx.intra_bss.fail.num,
  5730. pdev->stats.rx.intra_bss.fail.bytes);
  5731. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5732. pdev->stats.rx.raw.num,
  5733. pdev->stats.rx.raw.bytes);
  5734. DP_TRACE(FATAL, "dropped: error %u msdus",
  5735. pdev->stats.rx.err.mic_err);
  5736. DP_TRACE(FATAL, "peer invalid %u",
  5737. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5738. DP_TRACE(FATAL, "Reo Statistics");
  5739. DP_TRACE(FATAL, "rbm error: %u msdus",
  5740. pdev->soc->stats.rx.err.invalid_rbm);
  5741. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5742. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5743. DP_TRACE(FATAL, "Reo errors");
  5744. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5745. error_code++) {
  5746. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5747. error_code,
  5748. pdev->soc->stats.rx.err.reo_error[error_code]);
  5749. }
  5750. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5751. error_code++) {
  5752. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5753. error_code,
  5754. pdev->soc->stats.rx.err
  5755. .rxdma_error[error_code]);
  5756. }
  5757. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5758. DP_TRACE(FATAL, "Single Packet: %u",
  5759. pdev->stats.rx_ind_histogram.pkts_1);
  5760. DP_TRACE(FATAL, "2-20 Packets: %u",
  5761. pdev->stats.rx_ind_histogram.pkts_2_20);
  5762. DP_TRACE(FATAL, "21-40 Packets: %u",
  5763. pdev->stats.rx_ind_histogram.pkts_21_40);
  5764. DP_TRACE(FATAL, "41-60 Packets: %u",
  5765. pdev->stats.rx_ind_histogram.pkts_41_60);
  5766. DP_TRACE(FATAL, "61-80 Packets: %u",
  5767. pdev->stats.rx_ind_histogram.pkts_61_80);
  5768. DP_TRACE(FATAL, "81-100 Packets: %u",
  5769. pdev->stats.rx_ind_histogram.pkts_81_100);
  5770. DP_TRACE(FATAL, "101-200 Packets: %u",
  5771. pdev->stats.rx_ind_histogram.pkts_101_200);
  5772. DP_TRACE(FATAL, " 201+ Packets: %u",
  5773. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5774. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5775. __func__,
  5776. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5777. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5778. pdev->soc->wlan_cfg_ctx->rx_hash,
  5779. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5780. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5781. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5782. __func__,
  5783. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5784. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5785. #endif
  5786. }
  5787. }
  5788. /*
  5789. * dp_txrx_dump_stats() - Dump statistics
  5790. * @value - Statistics option
  5791. */
  5792. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5793. enum qdf_stats_verbosity_level level)
  5794. {
  5795. struct dp_soc *soc =
  5796. (struct dp_soc *)psoc;
  5797. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5798. if (!soc) {
  5799. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5800. "%s: soc is NULL", __func__);
  5801. return QDF_STATUS_E_INVAL;
  5802. }
  5803. switch (value) {
  5804. case CDP_TXRX_PATH_STATS:
  5805. dp_txrx_path_stats(soc);
  5806. break;
  5807. case CDP_RX_RING_STATS:
  5808. dp_print_per_ring_stats(soc);
  5809. break;
  5810. case CDP_TXRX_TSO_STATS:
  5811. /* TODO: NOT IMPLEMENTED */
  5812. break;
  5813. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5814. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5815. break;
  5816. case CDP_DP_NAPI_STATS:
  5817. dp_print_napi_stats(soc);
  5818. break;
  5819. case CDP_TXRX_DESC_STATS:
  5820. /* TODO: NOT IMPLEMENTED */
  5821. break;
  5822. default:
  5823. status = QDF_STATUS_E_INVAL;
  5824. break;
  5825. }
  5826. return status;
  5827. }
  5828. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5829. /**
  5830. * dp_update_flow_control_parameters() - API to store datapath
  5831. * config parameters
  5832. * @soc: soc handle
  5833. * @cfg: ini parameter handle
  5834. *
  5835. * Return: void
  5836. */
  5837. static inline
  5838. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5839. struct cdp_config_params *params)
  5840. {
  5841. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5842. params->tx_flow_stop_queue_threshold;
  5843. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5844. params->tx_flow_start_queue_offset;
  5845. }
  5846. #else
  5847. static inline
  5848. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5849. struct cdp_config_params *params)
  5850. {
  5851. }
  5852. #endif
  5853. /**
  5854. * dp_update_config_parameters() - API to store datapath
  5855. * config parameters
  5856. * @soc: soc handle
  5857. * @cfg: ini parameter handle
  5858. *
  5859. * Return: status
  5860. */
  5861. static
  5862. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5863. struct cdp_config_params *params)
  5864. {
  5865. struct dp_soc *soc = (struct dp_soc *)psoc;
  5866. if (!(soc)) {
  5867. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5868. "%s: Invalid handle", __func__);
  5869. return QDF_STATUS_E_INVAL;
  5870. }
  5871. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5872. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5873. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5874. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5875. params->tcp_udp_checksumoffload;
  5876. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5877. dp_update_flow_control_parameters(soc, params);
  5878. return QDF_STATUS_SUCCESS;
  5879. }
  5880. /**
  5881. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5882. * config parameters
  5883. * @vdev_handle - datapath vdev handle
  5884. * @cfg: ini parameter handle
  5885. *
  5886. * Return: status
  5887. */
  5888. #ifdef WDS_VENDOR_EXTENSION
  5889. void
  5890. dp_txrx_set_wds_rx_policy(
  5891. struct cdp_vdev *vdev_handle,
  5892. u_int32_t val)
  5893. {
  5894. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5895. struct dp_peer *peer;
  5896. if (vdev->opmode == wlan_op_mode_ap) {
  5897. /* for ap, set it on bss_peer */
  5898. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5899. if (peer->bss_peer) {
  5900. peer->wds_ecm.wds_rx_filter = 1;
  5901. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5902. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5903. break;
  5904. }
  5905. }
  5906. } else if (vdev->opmode == wlan_op_mode_sta) {
  5907. peer = TAILQ_FIRST(&vdev->peer_list);
  5908. peer->wds_ecm.wds_rx_filter = 1;
  5909. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5910. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5911. }
  5912. }
  5913. /**
  5914. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5915. *
  5916. * @peer_handle - datapath peer handle
  5917. * @wds_tx_ucast: policy for unicast transmission
  5918. * @wds_tx_mcast: policy for multicast transmission
  5919. *
  5920. * Return: void
  5921. */
  5922. void
  5923. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5924. int wds_tx_ucast, int wds_tx_mcast)
  5925. {
  5926. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5927. if (wds_tx_ucast || wds_tx_mcast) {
  5928. peer->wds_enabled = 1;
  5929. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5930. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5931. } else {
  5932. peer->wds_enabled = 0;
  5933. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5934. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5935. }
  5936. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5937. FL("Policy Update set to :\
  5938. peer->wds_enabled %d\
  5939. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5940. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5941. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5942. peer->wds_ecm.wds_tx_mcast_4addr);
  5943. return;
  5944. }
  5945. #endif
  5946. static struct cdp_wds_ops dp_ops_wds = {
  5947. .vdev_set_wds = dp_vdev_set_wds,
  5948. #ifdef WDS_VENDOR_EXTENSION
  5949. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5950. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5951. #endif
  5952. };
  5953. /*
  5954. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5955. * @soc - datapath soc handle
  5956. * @peer - datapath peer handle
  5957. *
  5958. * Delete the AST entries belonging to a peer
  5959. */
  5960. #ifdef FEATURE_AST
  5961. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5962. struct dp_peer *peer)
  5963. {
  5964. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5965. qdf_spin_lock_bh(&soc->ast_lock);
  5966. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5967. dp_peer_del_ast(soc, ast_entry);
  5968. qdf_spin_unlock_bh(&soc->ast_lock);
  5969. }
  5970. #else
  5971. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5972. struct dp_peer *peer)
  5973. {
  5974. }
  5975. #endif
  5976. /*
  5977. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5978. * @vdev_handle - datapath vdev handle
  5979. * @callback - callback function
  5980. * @ctxt: callback context
  5981. *
  5982. */
  5983. static void
  5984. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5985. ol_txrx_data_tx_cb callback, void *ctxt)
  5986. {
  5987. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5988. vdev->tx_non_std_data_callback.func = callback;
  5989. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5990. }
  5991. /**
  5992. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5993. * @pdev_hdl: datapath pdev handle
  5994. *
  5995. * Return: opaque pointer to dp txrx handle
  5996. */
  5997. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5998. {
  5999. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6000. return pdev->dp_txrx_handle;
  6001. }
  6002. /**
  6003. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  6004. * @pdev_hdl: datapath pdev handle
  6005. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  6006. *
  6007. * Return: void
  6008. */
  6009. static void
  6010. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  6011. {
  6012. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  6013. pdev->dp_txrx_handle = dp_txrx_hdl;
  6014. }
  6015. /**
  6016. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  6017. * @soc_handle: datapath soc handle
  6018. *
  6019. * Return: opaque pointer to external dp (non-core DP)
  6020. */
  6021. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  6022. {
  6023. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6024. return soc->external_txrx_handle;
  6025. }
  6026. /**
  6027. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  6028. * @soc_handle: datapath soc handle
  6029. * @txrx_handle: opaque pointer to external dp (non-core DP)
  6030. *
  6031. * Return: void
  6032. */
  6033. static void
  6034. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  6035. {
  6036. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  6037. soc->external_txrx_handle = txrx_handle;
  6038. }
  6039. #ifdef FEATURE_AST
  6040. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  6041. {
  6042. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  6043. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  6044. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6045. /*
  6046. * For BSS peer, new peer is not created on alloc_node if the
  6047. * peer with same address already exists , instead refcnt is
  6048. * increased for existing peer. Correspondingly in delete path,
  6049. * only refcnt is decreased; and peer is only deleted , when all
  6050. * references are deleted. So delete_in_progress should not be set
  6051. * for bss_peer, unless only 2 reference remains (peer map reference
  6052. * and peer hash table reference).
  6053. */
  6054. if (peer->bss_peer && (qdf_atomic_read(&peer->ref_cnt) > 2)) {
  6055. return;
  6056. }
  6057. peer->delete_in_progress = true;
  6058. dp_peer_delete_ast_entries(soc, peer);
  6059. }
  6060. #endif
  6061. #ifdef ATH_SUPPORT_NAC_RSSI
  6062. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  6063. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  6064. uint8_t chan_num)
  6065. {
  6066. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  6067. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  6068. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  6069. pdev->nac_rssi_filtering = 1;
  6070. /* Store address of NAC (neighbour peer) which will be checked
  6071. * against TA of received packets.
  6072. */
  6073. if (cmd == CDP_NAC_PARAM_ADD) {
  6074. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  6075. client_macaddr, DP_MAC_ADDR_LEN);
  6076. vdev->cdp_nac_rssi_enabled = 1;
  6077. } else if (cmd == CDP_NAC_PARAM_DEL) {
  6078. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  6079. client_macaddr, DP_MAC_ADDR_LEN)) {
  6080. /* delete this peer from the list */
  6081. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  6082. DP_MAC_ADDR_LEN);
  6083. }
  6084. vdev->cdp_nac_rssi_enabled = 0;
  6085. }
  6086. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  6087. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  6088. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  6089. return QDF_STATUS_SUCCESS;
  6090. }
  6091. #endif
  6092. static QDF_STATUS dp_peer_map_attach_wifi3(struct cdp_soc_t *soc_hdl,
  6093. uint32_t max_peers)
  6094. {
  6095. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  6096. soc->max_peers = max_peers;
  6097. qdf_print ("%s max_peers %u\n", __func__, max_peers);
  6098. if (dp_peer_find_attach(soc))
  6099. return QDF_STATUS_E_FAILURE;
  6100. return QDF_STATUS_SUCCESS;
  6101. }
  6102. static struct cdp_cmn_ops dp_ops_cmn = {
  6103. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  6104. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  6105. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  6106. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  6107. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  6108. .txrx_peer_create = dp_peer_create_wifi3,
  6109. .txrx_peer_setup = dp_peer_setup_wifi3,
  6110. #ifdef FEATURE_AST
  6111. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  6112. #else
  6113. .txrx_peer_teardown = NULL,
  6114. #endif
  6115. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  6116. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  6117. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  6118. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  6119. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  6120. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  6121. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  6122. .txrx_peer_delete = dp_peer_delete_wifi3,
  6123. .txrx_vdev_register = dp_vdev_register_wifi3,
  6124. .txrx_soc_detach = dp_soc_detach_wifi3,
  6125. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  6126. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  6127. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  6128. .txrx_ath_getstats = dp_get_device_stats,
  6129. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  6130. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  6131. .delba_process = dp_delba_process_wifi3,
  6132. .set_addba_response = dp_set_addba_response,
  6133. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  6134. .flush_cache_rx_queue = NULL,
  6135. /* TODO: get API's for dscp-tid need to be added*/
  6136. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  6137. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  6138. .txrx_stats_request = dp_txrx_stats_request,
  6139. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  6140. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  6141. .txrx_set_nac = dp_set_nac,
  6142. .txrx_get_tx_pending = dp_get_tx_pending,
  6143. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  6144. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  6145. .display_stats = dp_txrx_dump_stats,
  6146. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  6147. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  6148. #ifdef DP_INTR_POLL_BASED
  6149. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  6150. #else
  6151. .txrx_intr_attach = dp_soc_interrupt_attach,
  6152. #endif
  6153. .txrx_intr_detach = dp_soc_interrupt_detach,
  6154. .set_pn_check = dp_set_pn_check_wifi3,
  6155. .update_config_parameters = dp_update_config_parameters,
  6156. /* TODO: Add other functions */
  6157. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  6158. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  6159. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  6160. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  6161. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  6162. .tx_send = dp_tx_send,
  6163. .txrx_peer_reset_ast = dp_wds_reset_ast_wifi3,
  6164. .txrx_peer_reset_ast_table = dp_wds_reset_ast_table_wifi3,
  6165. .txrx_peer_flush_ast_table = dp_wds_flush_ast_table_wifi3,
  6166. .txrx_peer_map_attach = dp_peer_map_attach_wifi3,
  6167. };
  6168. static struct cdp_ctrl_ops dp_ops_ctrl = {
  6169. .txrx_peer_authorize = dp_peer_authorize,
  6170. #ifdef QCA_SUPPORT_SON
  6171. .txrx_set_inact_params = dp_set_inact_params,
  6172. .txrx_start_inact_timer = dp_start_inact_timer,
  6173. .txrx_set_overload = dp_set_overload,
  6174. .txrx_peer_is_inact = dp_peer_is_inact,
  6175. .txrx_mark_peer_inact = dp_mark_peer_inact,
  6176. #endif
  6177. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  6178. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  6179. #ifdef MESH_MODE_SUPPORT
  6180. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  6181. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  6182. #endif
  6183. .txrx_set_vdev_param = dp_set_vdev_param,
  6184. .txrx_peer_set_nawds = dp_peer_set_nawds,
  6185. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  6186. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  6187. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  6188. .txrx_update_filter_neighbour_peers =
  6189. dp_update_filter_neighbour_peers,
  6190. .txrx_get_sec_type = dp_get_sec_type,
  6191. /* TODO: Add other functions */
  6192. .txrx_wdi_event_sub = dp_wdi_event_sub,
  6193. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  6194. #ifdef WDI_EVENT_ENABLE
  6195. .txrx_get_pldev = dp_get_pldev,
  6196. #endif
  6197. .txrx_set_pdev_param = dp_set_pdev_param,
  6198. #ifdef ATH_SUPPORT_NAC_RSSI
  6199. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  6200. #endif
  6201. };
  6202. static struct cdp_me_ops dp_ops_me = {
  6203. #ifdef ATH_SUPPORT_IQUE
  6204. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  6205. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  6206. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  6207. #endif
  6208. };
  6209. static struct cdp_mon_ops dp_ops_mon = {
  6210. .txrx_monitor_set_filter_ucast_data = NULL,
  6211. .txrx_monitor_set_filter_mcast_data = NULL,
  6212. .txrx_monitor_set_filter_non_data = NULL,
  6213. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  6214. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  6215. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  6216. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  6217. /* Added support for HK advance filter */
  6218. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  6219. };
  6220. static struct cdp_host_stats_ops dp_ops_host_stats = {
  6221. .txrx_per_peer_stats = dp_get_host_peer_stats,
  6222. .get_fw_peer_stats = dp_get_fw_peer_stats,
  6223. .get_htt_stats = dp_get_htt_stats,
  6224. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  6225. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  6226. .txrx_stats_publish = dp_txrx_stats_publish,
  6227. /* TODO */
  6228. };
  6229. static struct cdp_raw_ops dp_ops_raw = {
  6230. /* TODO */
  6231. };
  6232. #ifdef CONFIG_WIN
  6233. static struct cdp_pflow_ops dp_ops_pflow = {
  6234. /* TODO */
  6235. };
  6236. #endif /* CONFIG_WIN */
  6237. #ifdef FEATURE_RUNTIME_PM
  6238. /**
  6239. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  6240. * @opaque_pdev: DP pdev context
  6241. *
  6242. * DP is ready to runtime suspend if there are no pending TX packets.
  6243. *
  6244. * Return: QDF_STATUS
  6245. */
  6246. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  6247. {
  6248. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6249. struct dp_soc *soc = pdev->soc;
  6250. /* Call DP TX flow control API to check if there is any
  6251. pending packets */
  6252. if (soc->intr_mode == DP_INTR_POLL)
  6253. qdf_timer_stop(&soc->int_timer);
  6254. return QDF_STATUS_SUCCESS;
  6255. }
  6256. /**
  6257. * dp_runtime_resume() - ensure DP is ready to runtime resume
  6258. * @opaque_pdev: DP pdev context
  6259. *
  6260. * Resume DP for runtime PM.
  6261. *
  6262. * Return: QDF_STATUS
  6263. */
  6264. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  6265. {
  6266. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6267. struct dp_soc *soc = pdev->soc;
  6268. void *hal_srng;
  6269. int i;
  6270. if (soc->intr_mode == DP_INTR_POLL)
  6271. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6272. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  6273. hal_srng = soc->tcl_data_ring[i].hal_srng;
  6274. if (hal_srng) {
  6275. /* We actually only need to acquire the lock */
  6276. hal_srng_access_start(soc->hal_soc, hal_srng);
  6277. /* Update SRC ring head pointer for HW to send
  6278. all pending packets */
  6279. hal_srng_access_end(soc->hal_soc, hal_srng);
  6280. }
  6281. }
  6282. return QDF_STATUS_SUCCESS;
  6283. }
  6284. #endif /* FEATURE_RUNTIME_PM */
  6285. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  6286. {
  6287. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6288. struct dp_soc *soc = pdev->soc;
  6289. if (soc->intr_mode == DP_INTR_POLL)
  6290. qdf_timer_stop(&soc->int_timer);
  6291. return QDF_STATUS_SUCCESS;
  6292. }
  6293. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  6294. {
  6295. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  6296. struct dp_soc *soc = pdev->soc;
  6297. if (soc->intr_mode == DP_INTR_POLL)
  6298. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  6299. return QDF_STATUS_SUCCESS;
  6300. }
  6301. #ifndef CONFIG_WIN
  6302. static struct cdp_misc_ops dp_ops_misc = {
  6303. .tx_non_std = dp_tx_non_std,
  6304. .get_opmode = dp_get_opmode,
  6305. #ifdef FEATURE_RUNTIME_PM
  6306. .runtime_suspend = dp_runtime_suspend,
  6307. .runtime_resume = dp_runtime_resume,
  6308. #endif /* FEATURE_RUNTIME_PM */
  6309. .pkt_log_init = dp_pkt_log_init,
  6310. .pkt_log_con_service = dp_pkt_log_con_service,
  6311. };
  6312. static struct cdp_flowctl_ops dp_ops_flowctl = {
  6313. /* WIFI 3.0 DP implement as required. */
  6314. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  6315. .flow_pool_map_handler = dp_tx_flow_pool_map,
  6316. .flow_pool_unmap_handler = dp_tx_flow_pool_unmap,
  6317. .register_pause_cb = dp_txrx_register_pause_cb,
  6318. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  6319. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  6320. };
  6321. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  6322. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6323. };
  6324. #ifdef IPA_OFFLOAD
  6325. static struct cdp_ipa_ops dp_ops_ipa = {
  6326. .ipa_get_resource = dp_ipa_get_resource,
  6327. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  6328. .ipa_op_response = dp_ipa_op_response,
  6329. .ipa_register_op_cb = dp_ipa_register_op_cb,
  6330. .ipa_get_stat = dp_ipa_get_stat,
  6331. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  6332. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  6333. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  6334. .ipa_setup = dp_ipa_setup,
  6335. .ipa_cleanup = dp_ipa_cleanup,
  6336. .ipa_setup_iface = dp_ipa_setup_iface,
  6337. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  6338. .ipa_enable_pipes = dp_ipa_enable_pipes,
  6339. .ipa_disable_pipes = dp_ipa_disable_pipes,
  6340. .ipa_set_perf_level = dp_ipa_set_perf_level
  6341. };
  6342. #endif
  6343. static struct cdp_bus_ops dp_ops_bus = {
  6344. .bus_suspend = dp_bus_suspend,
  6345. .bus_resume = dp_bus_resume
  6346. };
  6347. static struct cdp_ocb_ops dp_ops_ocb = {
  6348. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6349. };
  6350. static struct cdp_throttle_ops dp_ops_throttle = {
  6351. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6352. };
  6353. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  6354. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6355. };
  6356. static struct cdp_cfg_ops dp_ops_cfg = {
  6357. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  6358. };
  6359. /*
  6360. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  6361. * @dev: physical device instance
  6362. * @peer_mac_addr: peer mac address
  6363. * @local_id: local id for the peer
  6364. * @debug_id: to track enum peer access
  6365. * Return: peer instance pointer
  6366. */
  6367. static inline void *
  6368. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  6369. u8 *local_id,
  6370. enum peer_debug_id_type debug_id)
  6371. {
  6372. /*
  6373. * Currently this function does not implement the "get ref"
  6374. * functionality and is mapped to dp_find_peer_by_addr which does not
  6375. * increment the peer ref count. So the peer state is uncertain after
  6376. * calling this API. The functionality needs to be implemented.
  6377. * Accordingly the corresponding release_ref function is NULL.
  6378. */
  6379. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  6380. }
  6381. static struct cdp_peer_ops dp_ops_peer = {
  6382. .register_peer = dp_register_peer,
  6383. .clear_peer = dp_clear_peer,
  6384. .find_peer_by_addr = dp_find_peer_by_addr,
  6385. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  6386. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  6387. .peer_release_ref = NULL,
  6388. .local_peer_id = dp_local_peer_id,
  6389. .peer_find_by_local_id = dp_peer_find_by_local_id,
  6390. .peer_state_update = dp_peer_state_update,
  6391. .get_vdevid = dp_get_vdevid,
  6392. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  6393. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  6394. .get_vdev_for_peer = dp_get_vdev_for_peer,
  6395. .get_peer_state = dp_get_peer_state,
  6396. .last_assoc_received = dp_get_last_assoc_received,
  6397. .last_disassoc_received = dp_get_last_disassoc_received,
  6398. .last_deauth_received = dp_get_last_deauth_received,
  6399. };
  6400. #endif
  6401. static struct cdp_ops dp_txrx_ops = {
  6402. .cmn_drv_ops = &dp_ops_cmn,
  6403. .ctrl_ops = &dp_ops_ctrl,
  6404. .me_ops = &dp_ops_me,
  6405. .mon_ops = &dp_ops_mon,
  6406. .host_stats_ops = &dp_ops_host_stats,
  6407. .wds_ops = &dp_ops_wds,
  6408. .raw_ops = &dp_ops_raw,
  6409. #ifdef CONFIG_WIN
  6410. .pflow_ops = &dp_ops_pflow,
  6411. #endif /* CONFIG_WIN */
  6412. #ifndef CONFIG_WIN
  6413. .misc_ops = &dp_ops_misc,
  6414. .cfg_ops = &dp_ops_cfg,
  6415. .flowctl_ops = &dp_ops_flowctl,
  6416. .l_flowctl_ops = &dp_ops_l_flowctl,
  6417. #ifdef IPA_OFFLOAD
  6418. .ipa_ops = &dp_ops_ipa,
  6419. #endif
  6420. .bus_ops = &dp_ops_bus,
  6421. .ocb_ops = &dp_ops_ocb,
  6422. .peer_ops = &dp_ops_peer,
  6423. .throttle_ops = &dp_ops_throttle,
  6424. .mob_stats_ops = &dp_ops_mob_stats,
  6425. #endif
  6426. };
  6427. /*
  6428. * dp_soc_set_txrx_ring_map()
  6429. * @dp_soc: DP handler for soc
  6430. *
  6431. * Return: Void
  6432. */
  6433. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6434. {
  6435. uint32_t i;
  6436. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6437. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6438. }
  6439. }
  6440. /*
  6441. * dp_soc_attach_wifi3() - Attach txrx SOC
  6442. * @ctrl_psoc: Opaque SOC handle from control plane
  6443. * @htc_handle: Opaque HTC handle
  6444. * @hif_handle: Opaque HIF handle
  6445. * @qdf_osdev: QDF device
  6446. *
  6447. * Return: DP SOC handle on success, NULL on failure
  6448. */
  6449. /*
  6450. * Local prototype added to temporarily address warning caused by
  6451. * -Wmissing-prototypes. A more correct solution, namely to expose
  6452. * a prototype in an appropriate header file, will come later.
  6453. */
  6454. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6455. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6456. struct ol_if_ops *ol_ops);
  6457. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6458. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6459. struct ol_if_ops *ol_ops)
  6460. {
  6461. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6462. if (!soc) {
  6463. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6464. FL("DP SOC memory allocation failed"));
  6465. goto fail0;
  6466. }
  6467. soc->cdp_soc.ops = &dp_txrx_ops;
  6468. soc->cdp_soc.ol_ops = ol_ops;
  6469. soc->ctrl_psoc = ctrl_psoc;
  6470. soc->osdev = qdf_osdev;
  6471. soc->hif_handle = hif_handle;
  6472. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6473. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6474. soc->hal_soc, qdf_osdev);
  6475. if (!soc->htt_handle) {
  6476. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6477. FL("HTT attach failed"));
  6478. goto fail1;
  6479. }
  6480. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6481. if (!soc->wlan_cfg_ctx) {
  6482. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6483. FL("wlan_cfg_soc_attach failed"));
  6484. goto fail2;
  6485. }
  6486. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6487. soc->cce_disable = false;
  6488. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6489. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6490. CDP_CFG_MAX_PEER_ID);
  6491. if (ret != -EINVAL) {
  6492. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6493. }
  6494. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6495. CDP_CFG_CCE_DISABLE);
  6496. if (ret == 1)
  6497. soc->cce_disable = true;
  6498. }
  6499. qdf_spinlock_create(&soc->peer_ref_mutex);
  6500. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6501. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6502. /* fill the tx/rx cpu ring map*/
  6503. dp_soc_set_txrx_ring_map(soc);
  6504. qdf_spinlock_create(&soc->htt_stats.lock);
  6505. /* initialize work queue for stats processing */
  6506. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6507. /*Initialize inactivity timer for wifison */
  6508. dp_init_inact_timer(soc);
  6509. return (void *)soc;
  6510. fail2:
  6511. htt_soc_detach(soc->htt_handle);
  6512. fail1:
  6513. qdf_mem_free(soc);
  6514. fail0:
  6515. return NULL;
  6516. }
  6517. /*
  6518. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6519. *
  6520. * @soc: handle to DP soc
  6521. * @mac_id: MAC id
  6522. *
  6523. * Return: Return pdev corresponding to MAC
  6524. */
  6525. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6526. {
  6527. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6528. return soc->pdev_list[mac_id];
  6529. /* Typically for MCL as there only 1 PDEV*/
  6530. return soc->pdev_list[0];
  6531. }
  6532. /*
  6533. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6534. * @soc: DP SoC context
  6535. * @max_mac_rings: No of MAC rings
  6536. *
  6537. * Return: None
  6538. */
  6539. static
  6540. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6541. int *max_mac_rings)
  6542. {
  6543. bool dbs_enable = false;
  6544. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6545. dbs_enable = soc->cdp_soc.ol_ops->
  6546. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6547. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6548. }
  6549. /*
  6550. * dp_set_pktlog_wifi3() - attach txrx vdev
  6551. * @pdev: Datapath PDEV handle
  6552. * @event: which event's notifications are being subscribed to
  6553. * @enable: WDI event subscribe or not. (True or False)
  6554. *
  6555. * Return: Success, NULL on failure
  6556. */
  6557. #ifdef WDI_EVENT_ENABLE
  6558. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6559. bool enable)
  6560. {
  6561. struct dp_soc *soc = pdev->soc;
  6562. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6563. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6564. (pdev->wlan_cfg_ctx);
  6565. uint8_t mac_id = 0;
  6566. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6567. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6568. FL("Max_mac_rings %d \n"),
  6569. max_mac_rings);
  6570. if (enable) {
  6571. switch (event) {
  6572. case WDI_EVENT_RX_DESC:
  6573. if (pdev->monitor_vdev) {
  6574. /* Nothing needs to be done if monitor mode is
  6575. * enabled
  6576. */
  6577. return 0;
  6578. }
  6579. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6580. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6581. htt_tlv_filter.mpdu_start = 1;
  6582. htt_tlv_filter.msdu_start = 1;
  6583. htt_tlv_filter.msdu_end = 1;
  6584. htt_tlv_filter.mpdu_end = 1;
  6585. htt_tlv_filter.packet_header = 1;
  6586. htt_tlv_filter.attention = 1;
  6587. htt_tlv_filter.ppdu_start = 1;
  6588. htt_tlv_filter.ppdu_end = 1;
  6589. htt_tlv_filter.ppdu_end_user_stats = 1;
  6590. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6591. htt_tlv_filter.ppdu_end_status_done = 1;
  6592. htt_tlv_filter.enable_fp = 1;
  6593. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6594. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6595. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6596. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6597. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6598. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6599. for (mac_id = 0; mac_id < max_mac_rings;
  6600. mac_id++) {
  6601. int mac_for_pdev =
  6602. dp_get_mac_id_for_pdev(mac_id,
  6603. pdev->pdev_id);
  6604. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6605. mac_for_pdev,
  6606. pdev->rxdma_mon_status_ring[mac_id]
  6607. .hal_srng,
  6608. RXDMA_MONITOR_STATUS,
  6609. RX_BUFFER_SIZE,
  6610. &htt_tlv_filter);
  6611. }
  6612. if (soc->reap_timer_init)
  6613. qdf_timer_mod(&soc->mon_reap_timer,
  6614. DP_INTR_POLL_TIMER_MS);
  6615. }
  6616. break;
  6617. case WDI_EVENT_LITE_RX:
  6618. if (pdev->monitor_vdev) {
  6619. /* Nothing needs to be done if monitor mode is
  6620. * enabled
  6621. */
  6622. return 0;
  6623. }
  6624. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6625. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6626. htt_tlv_filter.ppdu_start = 1;
  6627. htt_tlv_filter.ppdu_end = 1;
  6628. htt_tlv_filter.ppdu_end_user_stats = 1;
  6629. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6630. htt_tlv_filter.ppdu_end_status_done = 1;
  6631. htt_tlv_filter.mpdu_start = 1;
  6632. htt_tlv_filter.enable_fp = 1;
  6633. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6634. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6635. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6636. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6637. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6638. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6639. for (mac_id = 0; mac_id < max_mac_rings;
  6640. mac_id++) {
  6641. int mac_for_pdev =
  6642. dp_get_mac_id_for_pdev(mac_id,
  6643. pdev->pdev_id);
  6644. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6645. mac_for_pdev,
  6646. pdev->rxdma_mon_status_ring[mac_id]
  6647. .hal_srng,
  6648. RXDMA_MONITOR_STATUS,
  6649. RX_BUFFER_SIZE_PKTLOG_LITE,
  6650. &htt_tlv_filter);
  6651. }
  6652. if (soc->reap_timer_init)
  6653. qdf_timer_mod(&soc->mon_reap_timer,
  6654. DP_INTR_POLL_TIMER_MS);
  6655. }
  6656. break;
  6657. case WDI_EVENT_LITE_T2H:
  6658. if (pdev->monitor_vdev) {
  6659. /* Nothing needs to be done if monitor mode is
  6660. * enabled
  6661. */
  6662. return 0;
  6663. }
  6664. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6665. int mac_for_pdev = dp_get_mac_id_for_pdev(
  6666. mac_id, pdev->pdev_id);
  6667. pdev->pktlog_ppdu_stats = true;
  6668. dp_h2t_cfg_stats_msg_send(pdev,
  6669. DP_PPDU_TXLITE_STATS_BITMASK_CFG,
  6670. mac_for_pdev);
  6671. }
  6672. break;
  6673. default:
  6674. /* Nothing needs to be done for other pktlog types */
  6675. break;
  6676. }
  6677. } else {
  6678. switch (event) {
  6679. case WDI_EVENT_RX_DESC:
  6680. case WDI_EVENT_LITE_RX:
  6681. if (pdev->monitor_vdev) {
  6682. /* Nothing needs to be done if monitor mode is
  6683. * enabled
  6684. */
  6685. return 0;
  6686. }
  6687. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6688. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6689. for (mac_id = 0; mac_id < max_mac_rings;
  6690. mac_id++) {
  6691. int mac_for_pdev =
  6692. dp_get_mac_id_for_pdev(mac_id,
  6693. pdev->pdev_id);
  6694. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6695. mac_for_pdev,
  6696. pdev->rxdma_mon_status_ring[mac_id]
  6697. .hal_srng,
  6698. RXDMA_MONITOR_STATUS,
  6699. RX_BUFFER_SIZE,
  6700. &htt_tlv_filter);
  6701. }
  6702. if (soc->reap_timer_init)
  6703. qdf_timer_stop(&soc->mon_reap_timer);
  6704. }
  6705. break;
  6706. case WDI_EVENT_LITE_T2H:
  6707. if (pdev->monitor_vdev) {
  6708. /* Nothing needs to be done if monitor mode is
  6709. * enabled
  6710. */
  6711. return 0;
  6712. }
  6713. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6714. * passing value 0. Once these macros will define in htt
  6715. * header file will use proper macros
  6716. */
  6717. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6718. int mac_for_pdev =
  6719. dp_get_mac_id_for_pdev(mac_id,
  6720. pdev->pdev_id);
  6721. pdev->pktlog_ppdu_stats = false;
  6722. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6723. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6724. mac_for_pdev);
  6725. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6726. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6727. mac_for_pdev);
  6728. } else if (pdev->enhanced_stats_en) {
  6729. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6730. mac_for_pdev);
  6731. }
  6732. }
  6733. break;
  6734. default:
  6735. /* Nothing needs to be done for other pktlog types */
  6736. break;
  6737. }
  6738. }
  6739. return 0;
  6740. }
  6741. #endif
  6742. #ifdef CONFIG_MCL
  6743. /*
  6744. * dp_service_mon_rings()- timer to reap monitor rings
  6745. * reqd as we are not getting ppdu end interrupts
  6746. * @arg: SoC Handle
  6747. *
  6748. * Return:
  6749. *
  6750. */
  6751. static void dp_service_mon_rings(void *arg)
  6752. {
  6753. struct dp_soc *soc = (struct dp_soc *) arg;
  6754. int ring = 0, work_done, mac_id;
  6755. struct dp_pdev *pdev = NULL;
  6756. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  6757. pdev = soc->pdev_list[ring];
  6758. if (pdev == NULL)
  6759. continue;
  6760. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  6761. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id,
  6762. pdev->pdev_id);
  6763. work_done = dp_mon_process(soc, mac_for_pdev,
  6764. QCA_NAPI_BUDGET);
  6765. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6766. FL("Reaped %d descs from Monitor rings"),
  6767. work_done);
  6768. }
  6769. }
  6770. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6771. }
  6772. #ifndef REMOVE_PKT_LOG
  6773. /**
  6774. * dp_pkt_log_init() - API to initialize packet log
  6775. * @ppdev: physical device handle
  6776. * @scn: HIF context
  6777. *
  6778. * Return: none
  6779. */
  6780. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6781. {
  6782. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6783. if (handle->pkt_log_init) {
  6784. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6785. "%s: Packet log not initialized", __func__);
  6786. return;
  6787. }
  6788. pktlog_sethandle(&handle->pl_dev, scn);
  6789. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6790. if (pktlogmod_init(scn)) {
  6791. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6792. "%s: pktlogmod_init failed", __func__);
  6793. handle->pkt_log_init = false;
  6794. } else {
  6795. handle->pkt_log_init = true;
  6796. }
  6797. }
  6798. /**
  6799. * dp_pkt_log_con_service() - connect packet log service
  6800. * @ppdev: physical device handle
  6801. * @scn: device context
  6802. *
  6803. * Return: none
  6804. */
  6805. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6806. {
  6807. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6808. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6809. pktlog_htc_attach();
  6810. }
  6811. /**
  6812. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6813. * @handle: Pdev handle
  6814. *
  6815. * Return: none
  6816. */
  6817. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6818. {
  6819. void *scn = (void *)handle->soc->hif_handle;
  6820. if (!scn) {
  6821. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6822. "%s: Invalid hif(scn) handle", __func__);
  6823. return;
  6824. }
  6825. pktlogmod_exit(scn);
  6826. handle->pkt_log_init = false;
  6827. }
  6828. #endif
  6829. #else
  6830. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6831. #endif