dp_rx_err.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107
  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  49. *
  50. * @soc: core txrx main context
  51. * @ring_desc: opaque pointer to the REO error ring descriptor
  52. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  53. * @head: head of the local descriptor free-list
  54. * @tail: tail of the local descriptor free-list
  55. * @quota: No. of units (packets) that can be serviced in one shot.
  56. *
  57. * This function is used to drop all MSDU in an MPDU
  58. *
  59. * Return: uint32_t: No. of elements processed
  60. */
  61. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  62. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  63. union dp_rx_desc_list_elem_t **head,
  64. union dp_rx_desc_list_elem_t **tail,
  65. uint32_t quota)
  66. {
  67. uint32_t rx_bufs_used = 0;
  68. void *link_desc_va;
  69. struct hal_buf_info buf_info;
  70. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  71. int i;
  72. uint8_t *rx_tlv_hdr;
  73. uint32_t tid;
  74. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  75. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  76. /* No UNMAP required -- this is "malloc_consistent" memory */
  77. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  78. &mpdu_desc_info->msdu_count);
  79. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  80. struct dp_rx_desc *rx_desc =
  81. dp_rx_cookie_2_va_rxdma_buf(soc,
  82. msdu_list.sw_cookie[i]);
  83. qdf_assert(rx_desc);
  84. if (!dp_rx_desc_check_magic(rx_desc)) {
  85. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  86. FL("Invalid rx_desc cookie=%d"),
  87. msdu_list.sw_cookie[i]);
  88. return rx_bufs_used;
  89. }
  90. rx_bufs_used++;
  91. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "Packet received with PN error for tid :%d", tid);
  94. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  95. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  96. hal_rx_print_pn(rx_tlv_hdr);
  97. /* Just free the buffers */
  98. qdf_nbuf_free(rx_desc->nbuf);
  99. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  100. }
  101. return rx_bufs_used;
  102. }
  103. /**
  104. * dp_rx_pn_error_handle() - Handles PN check errors
  105. *
  106. * @soc: core txrx main context
  107. * @ring_desc: opaque pointer to the REO error ring descriptor
  108. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  109. * @head: head of the local descriptor free-list
  110. * @tail: tail of the local descriptor free-list
  111. * @quota: No. of units (packets) that can be serviced in one shot.
  112. *
  113. * This function implements PN error handling
  114. * If the peer is configured to ignore the PN check errors
  115. * or if DP feels, that this frame is still OK, the frame can be
  116. * re-injected back to REO to use some of the other features
  117. * of REO e.g. duplicate detection/routing to other cores
  118. *
  119. * Return: uint32_t: No. of elements processed
  120. */
  121. static uint32_t
  122. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  123. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  124. union dp_rx_desc_list_elem_t **head,
  125. union dp_rx_desc_list_elem_t **tail,
  126. uint32_t quota)
  127. {
  128. uint16_t peer_id;
  129. uint32_t rx_bufs_used = 0;
  130. struct dp_peer *peer;
  131. bool peer_pn_policy = false;
  132. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  133. mpdu_desc_info->peer_meta_data);
  134. peer = dp_peer_find_by_id(soc, peer_id);
  135. if (qdf_likely(peer)) {
  136. /*
  137. * TODO: Check for peer specific policies & set peer_pn_policy
  138. */
  139. }
  140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  141. "Packet received with PN error");
  142. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  143. "discard rx due to PN error for peer %p "
  144. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  145. peer,
  146. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  147. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  148. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  149. /* No peer PN policy -- definitely drop */
  150. if (!peer_pn_policy)
  151. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  152. mpdu_desc_info,
  153. head, tail, quota);
  154. return rx_bufs_used;
  155. }
  156. /**
  157. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  158. *
  159. * @soc: core txrx main context
  160. * @ring_desc: opaque pointer to the REO error ring descriptor
  161. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  162. * @head: head of the local descriptor free-list
  163. * @tail: tail of the local descriptor free-list
  164. * @quota: No. of units (packets) that can be serviced in one shot.
  165. *
  166. * This function implements the error handling when sequence number
  167. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  168. * need to be handled:
  169. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  170. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  171. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  172. * For case B), the frame is normally dropped, no more action is taken
  173. *
  174. * Return: uint32_t: No. of elements processed
  175. */
  176. static uint32_t
  177. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  178. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  179. union dp_rx_desc_list_elem_t **head,
  180. union dp_rx_desc_list_elem_t **tail,
  181. uint32_t quota)
  182. {
  183. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  184. head, tail, quota);
  185. }
  186. static bool
  187. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  188. struct dp_rx_desc *rx_desc)
  189. {
  190. bool mpdu_done = false;
  191. /* TODO: Currently only single radio is supported, hence
  192. * pdev hard coded to '0' index
  193. */
  194. struct dp_pdev *dp_pdev = soc->pdev_list[0];
  195. if (hal_rx_msdu_end_first_msdu_get(rx_desc->rx_buf_start)) {
  196. qdf_nbuf_set_chfrag_start(rx_desc->nbuf, 1);
  197. soc->invalid_peer_head_msdu = NULL;
  198. soc->invalid_peer_tail_msdu = NULL;
  199. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc->rx_buf_start,
  200. &(dp_pdev->ppdu_info.rx_status));
  201. }
  202. if (hal_rx_msdu_end_last_msdu_get(rx_desc->rx_buf_start)) {
  203. qdf_nbuf_set_chfrag_end(rx_desc->nbuf, 1);
  204. mpdu_done = true;
  205. }
  206. DP_RX_LIST_APPEND(soc->invalid_peer_head_msdu,
  207. soc->invalid_peer_tail_msdu,
  208. nbuf);
  209. return mpdu_done;
  210. }
  211. /**
  212. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  213. * descriptor violation on either a
  214. * REO or WBM ring
  215. *
  216. * @soc: core DP main context
  217. * @rx_desc : pointer to the sw rx descriptor
  218. * @head: pointer to head of rx descriptors to be added to free list
  219. * @tail: pointer to tail of rx descriptors to be added to free list
  220. * quota: upper limit of descriptors that can be reaped
  221. *
  222. * This function handles NULL queue descriptor violations arising out
  223. * a missing REO queue for a given peer or a given TID. This typically
  224. * may happen if a packet is received on a QOS enabled TID before the
  225. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  226. * it may also happen for MC/BC frames if they are not routed to the
  227. * non-QOS TID queue, in the absence of any other default TID queue.
  228. * This error can show up both in a REO destination or WBM release ring.
  229. *
  230. * Return: uint32_t: No. of Rx buffers reaped
  231. */
  232. static uint32_t
  233. dp_rx_null_q_desc_handle(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  234. union dp_rx_desc_list_elem_t **head,
  235. union dp_rx_desc_list_elem_t **tail,
  236. uint32_t quota)
  237. {
  238. uint32_t rx_bufs_used = 0;
  239. uint32_t pkt_len, l2_hdr_offset;
  240. uint16_t msdu_len;
  241. qdf_nbuf_t nbuf;
  242. struct dp_vdev *vdev;
  243. uint16_t peer_id = 0xFFFF;
  244. struct dp_peer *peer = NULL;
  245. uint32_t sgi, rate_mcs, tid;
  246. uint8_t count;
  247. struct mect_entry *mect_entry;
  248. uint8_t *nbuf_data = NULL;
  249. rx_bufs_used++;
  250. nbuf = rx_desc->nbuf;
  251. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  252. QDF_DMA_BIDIRECTIONAL);
  253. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  254. l2_hdr_offset =
  255. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  256. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  257. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  258. /* Set length in nbuf */
  259. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  260. /*
  261. * Check if DMA completed -- msdu_done is the last bit
  262. * to be written
  263. */
  264. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  265. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  266. FL("MSDU DONE failure"));
  267. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  268. QDF_TRACE_LEVEL_INFO);
  269. qdf_assert(0);
  270. }
  271. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  272. peer = dp_peer_find_by_id(soc, peer_id);
  273. if (!peer) {
  274. bool mpdu_done = false;
  275. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  276. FL("peer is NULL"));
  277. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_desc);
  278. if (mpdu_done)
  279. dp_rx_process_invalid_peer(soc, nbuf);
  280. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  281. return rx_bufs_used;
  282. }
  283. vdev = peer->vdev;
  284. if (!vdev) {
  285. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  286. FL("INVALID vdev %p OR osif_rx"), vdev);
  287. /* Drop & free packet */
  288. qdf_nbuf_free(nbuf);
  289. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  290. goto fail;
  291. }
  292. sgi = hal_rx_msdu_start_sgi_get(rx_desc->rx_buf_start);
  293. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_desc->rx_buf_start);
  294. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  295. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  296. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  297. __func__, __LINE__, sgi, rate_mcs, tid);
  298. /*
  299. * Advance the packet start pointer by total size of
  300. * pre-header TLV's
  301. */
  302. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  303. nbuf_data = qdf_nbuf_data(nbuf);
  304. for (count = 0; count < soc->mect_cnt; count++) {
  305. mect_entry = &soc->mect_table[count];
  306. mect_entry->ts = jiffies_64;
  307. if (!(memcmp(mect_entry->mac_addr, &nbuf_data[DP_MAC_ADDR_LEN],
  308. DP_MAC_ADDR_LEN))) {
  309. QDF_TRACE(QDF_MODULE_ID_DP,
  310. QDF_TRACE_LEVEL_INFO,
  311. FL("received pkt with same src MAC"));
  312. /* Drop & free packet */
  313. qdf_nbuf_free(nbuf);
  314. /* Statistics */
  315. goto fail;
  316. }
  317. }
  318. /* WDS Source Port Learning */
  319. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet) &&
  320. (vdev->wds_enabled))
  321. dp_rx_wds_srcport_learn(soc, rx_desc->rx_buf_start, peer, nbuf);
  322. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
  323. rx_desc->rx_buf_start)) {
  324. /* TODO: Assuming that qos_control_valid also indicates
  325. * unicast. Should we check this?
  326. */
  327. if (peer &&
  328. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  329. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  330. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  331. }
  332. }
  333. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  334. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  335. "%s: p_id %d msdu_len %d hdr_off %d",
  336. __func__, peer_id, msdu_len, l2_hdr_offset);
  337. print_hex_dump(KERN_ERR,
  338. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  339. qdf_nbuf_data(nbuf), 128, false);
  340. #endif /* NAPIER_EMULATION */
  341. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  342. qdf_nbuf_set_next(nbuf, NULL);
  343. dp_rx_deliver_raw(vdev, nbuf, peer);
  344. } else {
  345. if (qdf_unlikely(peer->bss_peer)) {
  346. QDF_TRACE(QDF_MODULE_ID_DP,
  347. QDF_TRACE_LEVEL_INFO,
  348. FL("received pkt with same src MAC"));
  349. /* Drop & free packet */
  350. qdf_nbuf_free(nbuf);
  351. goto fail;
  352. }
  353. if (vdev->osif_rx) {
  354. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  355. FL("vdev %p osif_rx %p"), vdev,
  356. vdev->osif_rx);
  357. qdf_nbuf_set_next(nbuf, NULL);
  358. vdev->osif_rx(vdev->osif_vdev, nbuf);
  359. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  360. } else {
  361. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  362. FL("INVALID vdev %p OR osif_rx"), vdev);
  363. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  364. }
  365. }
  366. fail:
  367. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  368. return rx_bufs_used;
  369. }
  370. /**
  371. * dp_rx_err_deliver() - Function to deliver error frames to OS
  372. *
  373. * @soc: core DP main context
  374. * @rx_desc : pointer to the sw rx descriptor
  375. * @head: pointer to head of rx descriptors to be added to free list
  376. * @tail: pointer to tail of rx descriptors to be added to free list
  377. * quota: upper limit of descriptors that can be reaped
  378. *
  379. * Return: uint32_t: No. of Rx buffers reaped
  380. */
  381. static uint32_t
  382. dp_rx_err_deliver(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  383. union dp_rx_desc_list_elem_t **head,
  384. union dp_rx_desc_list_elem_t **tail,
  385. uint32_t quota)
  386. {
  387. uint32_t rx_bufs_used = 0;
  388. uint32_t pkt_len, l2_hdr_offset;
  389. uint16_t msdu_len;
  390. qdf_nbuf_t nbuf;
  391. struct dp_vdev *vdev;
  392. uint16_t peer_id = 0xFFFF;
  393. struct dp_peer *peer = NULL;
  394. rx_bufs_used++;
  395. nbuf = rx_desc->nbuf;
  396. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  397. QDF_DMA_BIDIRECTIONAL);
  398. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  399. /*
  400. * Check if DMA completed -- msdu_done is the last bit
  401. * to be written
  402. */
  403. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  404. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  405. FL("MSDU DONE failure"));
  406. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  407. QDF_TRACE_LEVEL_INFO);
  408. qdf_assert(0);
  409. }
  410. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  411. peer = dp_peer_find_by_id(soc, peer_id);
  412. if (!peer) {
  413. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  414. FL("peer is NULL"));
  415. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  416. qdf_nbuf_len(nbuf));
  417. /* Drop & free packet */
  418. qdf_nbuf_free(nbuf);
  419. goto fail;
  420. }
  421. vdev = peer->vdev;
  422. if (!vdev) {
  423. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  424. FL("INVALID vdev %p OR osif_rx"), vdev);
  425. /* Drop & free packet */
  426. qdf_nbuf_free(nbuf);
  427. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  428. goto fail;
  429. }
  430. /* Drop & free packet if mesh mode not enabled */
  431. if (!vdev->mesh_vdev) {
  432. qdf_nbuf_free(nbuf);
  433. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  434. goto fail;
  435. }
  436. l2_hdr_offset =
  437. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  438. msdu_len =
  439. hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  440. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  441. /* Set length in nbuf */
  442. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  443. qdf_nbuf_set_next(nbuf, NULL);
  444. /*
  445. * Advance the packet start pointer by total size of
  446. * pre-header TLV's
  447. */
  448. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  449. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  450. dp_rx_deliver_raw(vdev, nbuf, peer);
  451. } else {
  452. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  453. vdev->osif_rx(vdev->osif_vdev, nbuf);
  454. }
  455. fail:
  456. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  457. return rx_bufs_used;
  458. }
  459. /**
  460. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  461. * (WBM), following error handling
  462. *
  463. * @soc: core DP main context
  464. * @ring_desc: opaque pointer to the REO error ring descriptor
  465. *
  466. * Return: QDF_STATUS
  467. */
  468. static QDF_STATUS
  469. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc)
  470. {
  471. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  472. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  473. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  474. void *hal_soc = soc->hal_soc;
  475. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  476. void *src_srng_desc;
  477. if (!wbm_rel_srng) {
  478. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  479. "WBM RELEASE RING not initialized");
  480. return status;
  481. }
  482. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  483. /* TODO */
  484. /*
  485. * Need API to convert from hal_ring pointer to
  486. * Ring Type / Ring Id combo
  487. */
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. FL("HAL RING Access For WBM Release SRNG Failed - %p"),
  490. wbm_rel_srng);
  491. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  492. goto done;
  493. }
  494. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  495. if (qdf_likely(src_srng_desc)) {
  496. /* Return link descriptor through WBM ring (SW2WBM)*/
  497. hal_rx_msdu_link_desc_set(hal_soc,
  498. src_srng_desc, buf_addr_info);
  499. status = QDF_STATUS_SUCCESS;
  500. } else {
  501. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  502. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  503. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  504. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  505. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  506. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  507. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  508. }
  509. done:
  510. hal_srng_access_end(hal_soc, wbm_rel_srng);
  511. return status;
  512. }
  513. /**
  514. * dp_rx_err_process() - Processes error frames routed to REO error ring
  515. *
  516. * @soc: core txrx main context
  517. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  518. * @quota: No. of units (packets) that can be serviced in one shot.
  519. *
  520. * This function implements error processing and top level demultiplexer
  521. * for all the frames routed to REO error ring.
  522. *
  523. * Return: uint32_t: No. of elements processed
  524. */
  525. uint32_t
  526. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  527. {
  528. void *hal_soc;
  529. void *ring_desc;
  530. union dp_rx_desc_list_elem_t *head = NULL;
  531. union dp_rx_desc_list_elem_t *tail = NULL;
  532. uint32_t rx_bufs_used = 0;
  533. uint8_t buf_type;
  534. uint8_t error, rbm;
  535. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  536. struct hal_buf_info hbi;
  537. struct dp_pdev *dp_pdev;
  538. struct dp_srng *dp_rxdma_srng;
  539. struct rx_desc_pool *rx_desc_pool;
  540. /* Debug -- Remove later */
  541. qdf_assert(soc && hal_ring);
  542. hal_soc = soc->hal_soc;
  543. /* Debug -- Remove later */
  544. qdf_assert(hal_soc);
  545. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  546. /* TODO */
  547. /*
  548. * Need API to convert from hal_ring pointer to
  549. * Ring Type / Ring Id combo
  550. */
  551. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  552. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  553. FL("HAL RING Access Failed -- %p"), hal_ring);
  554. goto done;
  555. }
  556. while (qdf_likely((ring_desc =
  557. hal_srng_dst_get_next(hal_soc, hal_ring))
  558. && quota--)) {
  559. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  560. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  561. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  562. /*
  563. * Check if the buffer is to be processed on this processor
  564. */
  565. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  566. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  567. /* TODO */
  568. /* Call appropriate handler */
  569. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  571. FL("Invalid RBM %d"), rbm);
  572. continue;
  573. }
  574. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  575. /*
  576. * For REO error ring, expect only MSDU LINK DESC
  577. */
  578. qdf_assert(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  579. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  580. /* Get the MPDU DESC info */
  581. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  582. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  583. /* TODO */
  584. rx_bufs_used += dp_rx_frag_handle(soc,
  585. ring_desc, &mpdu_desc_info,
  586. &head, &tail, quota);
  587. DP_STATS_INC(soc, rx.rx_frags, 1);
  588. continue;
  589. }
  590. if (hal_rx_reo_is_pn_error(ring_desc)) {
  591. /* TOD0 */
  592. DP_STATS_INC(soc,
  593. rx.err.
  594. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  595. 1);
  596. rx_bufs_used += dp_rx_pn_error_handle(soc,
  597. ring_desc, &mpdu_desc_info,
  598. &head, &tail, quota);
  599. continue;
  600. }
  601. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  602. /* TOD0 */
  603. DP_STATS_INC(soc,
  604. rx.err.
  605. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  606. 1);
  607. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  608. ring_desc, &mpdu_desc_info,
  609. &head, &tail, quota);
  610. continue;
  611. }
  612. /* Return link descriptor through WBM ring (SW2WBM)*/
  613. dp_rx_link_desc_return(soc, ring_desc);
  614. }
  615. done:
  616. hal_srng_access_end(hal_soc, hal_ring);
  617. /* Assume MAC id = 0, owner = 0 */
  618. if (rx_bufs_used) {
  619. dp_pdev = soc->pdev_list[0];
  620. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  621. rx_desc_pool = &soc->rx_desc_buf[0];
  622. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  623. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  624. }
  625. return rx_bufs_used; /* Assume no scale factor for now */
  626. }
  627. /**
  628. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  629. *
  630. * @soc: core txrx main context
  631. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  632. * @quota: No. of units (packets) that can be serviced in one shot.
  633. *
  634. * This function implements error processing and top level demultiplexer
  635. * for all the frames routed to WBM2HOST sw release ring.
  636. *
  637. * Return: uint32_t: No. of elements processed
  638. */
  639. uint32_t
  640. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  641. {
  642. void *hal_soc;
  643. void *ring_desc;
  644. struct dp_rx_desc *rx_desc;
  645. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  646. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  647. uint32_t rx_bufs_used[MAX_PDEV_CNT] = { 0 };
  648. uint32_t rx_bufs_reaped = 0;
  649. uint8_t buf_type, rbm;
  650. uint8_t wbm_err_src;
  651. uint32_t rx_buf_cookie;
  652. uint8_t mac_id;
  653. struct dp_pdev *dp_pdev;
  654. struct dp_srng *dp_rxdma_srng;
  655. struct rx_desc_pool *rx_desc_pool;
  656. uint8_t pool_id;
  657. /* Debug -- Remove later */
  658. qdf_assert(soc && hal_ring);
  659. hal_soc = soc->hal_soc;
  660. /* Debug -- Remove later */
  661. qdf_assert(hal_soc);
  662. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  663. /* TODO */
  664. /*
  665. * Need API to convert from hal_ring pointer to
  666. * Ring Type / Ring Id combo
  667. */
  668. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  669. FL("HAL RING Access Failed -- %p"), hal_ring);
  670. goto done;
  671. }
  672. while (qdf_likely((ring_desc =
  673. hal_srng_dst_get_next(hal_soc, hal_ring))
  674. && quota--)) {
  675. /* XXX */
  676. wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
  677. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  678. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  679. /*
  680. * Check if the buffer is to be processed on this processor
  681. */
  682. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  683. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  684. /* TODO */
  685. /* Call appropriate handler */
  686. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  687. FL("Invalid RBM %d"), rbm);
  688. continue;
  689. }
  690. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  691. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  692. qdf_assert(rx_desc);
  693. if (!dp_rx_desc_check_magic(rx_desc)) {
  694. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  695. FL("Invalid rx_desc cookie=%d"),
  696. rx_buf_cookie);
  697. continue;
  698. }
  699. pool_id = rx_desc->pool_id;
  700. /* XXX */
  701. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  702. /*
  703. * For WBM ring, expect only MSDU buffers
  704. */
  705. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  706. if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  707. uint8_t push_reason =
  708. HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
  709. if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  710. uint8_t reo_error_code =
  711. HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
  712. DP_STATS_INC(soc, rx.err.reo_error[
  713. reo_error_code], 1);
  714. switch (reo_error_code) {
  715. /*
  716. * Handling for packets which have NULL REO
  717. * queue descriptor
  718. */
  719. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  720. QDF_TRACE(QDF_MODULE_ID_DP,
  721. QDF_TRACE_LEVEL_WARN,
  722. "Got pkt with REO ERROR: %d",
  723. reo_error_code);
  724. rx_bufs_used[pool_id] +=
  725. dp_rx_null_q_desc_handle(soc,
  726. rx_desc,
  727. &head[pool_id],
  728. &tail[pool_id], quota);
  729. continue;
  730. /* TODO */
  731. /* Add per error code accounting */
  732. default:
  733. QDF_TRACE(QDF_MODULE_ID_DP,
  734. QDF_TRACE_LEVEL_ERROR,
  735. "REO error %d detected",
  736. reo_error_code);
  737. }
  738. }
  739. } else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
  740. uint8_t push_reason =
  741. HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
  742. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  743. uint8_t rxdma_error_code =
  744. HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
  745. DP_STATS_INC(soc, rx.err.rxdma_error[
  746. rxdma_error_code], 1);
  747. switch (rxdma_error_code) {
  748. case HAL_RXDMA_ERR_UNENCRYPTED:
  749. rx_bufs_used[pool_id] +=
  750. dp_rx_err_deliver(soc,
  751. rx_desc,
  752. &head[pool_id],
  753. &tail[pool_id],
  754. quota);
  755. continue;
  756. default:
  757. QDF_TRACE(QDF_MODULE_ID_DP,
  758. QDF_TRACE_LEVEL_ERROR,
  759. "RXDMA error %d",
  760. rxdma_error_code);
  761. }
  762. }
  763. } else {
  764. /* Should not come here */
  765. qdf_assert(0);
  766. }
  767. rx_bufs_used[rx_desc->pool_id]++;
  768. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  769. QDF_DMA_BIDIRECTIONAL);
  770. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  771. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  772. QDF_TRACE_LEVEL_INFO);
  773. qdf_nbuf_free(rx_desc->nbuf);
  774. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  775. &tail[rx_desc->pool_id], rx_desc);
  776. }
  777. done:
  778. hal_srng_access_end(hal_soc, hal_ring);
  779. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  780. if (rx_bufs_used[mac_id]) {
  781. dp_pdev = soc->pdev_list[mac_id];
  782. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  783. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  784. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  785. rx_desc_pool, rx_bufs_used[mac_id],
  786. &head[mac_id], &tail[mac_id],
  787. HAL_RX_BUF_RBM_SW3_BM);
  788. rx_bufs_reaped += rx_bufs_used[mac_id];
  789. }
  790. }
  791. return rx_bufs_reaped; /* Assume no scale factor for now */
  792. }
  793. /**
  794. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  795. *
  796. * @soc: core DP main context
  797. * @mac_id: mac id which is one of 3 mac_ids
  798. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  799. * @head: head of descs list to be freed
  800. * @tail: tail of decs list to be freed
  801. * Return: number of msdu in MPDU to be popped
  802. */
  803. static inline uint32_t
  804. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  805. void *rxdma_dst_ring_desc,
  806. union dp_rx_desc_list_elem_t **head,
  807. union dp_rx_desc_list_elem_t **tail)
  808. {
  809. void *rx_msdu_link_desc;
  810. qdf_nbuf_t msdu;
  811. qdf_nbuf_t last;
  812. struct hal_rx_msdu_list msdu_list;
  813. uint16_t num_msdus;
  814. struct hal_buf_info buf_info;
  815. void *p_buf_addr_info;
  816. void *p_last_buf_addr_info;
  817. uint32_t rx_bufs_used = 0;
  818. uint32_t msdu_cnt;
  819. uint32_t i;
  820. uint8_t push_reason;
  821. uint8_t rxdma_error_code = 0;
  822. msdu = 0;
  823. last = NULL;
  824. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  825. &p_last_buf_addr_info, &msdu_cnt);
  826. push_reason =
  827. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  828. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  829. rxdma_error_code =
  830. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  831. }
  832. do {
  833. rx_msdu_link_desc =
  834. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  835. qdf_assert(rx_msdu_link_desc);
  836. num_msdus = (msdu_cnt > HAL_RX_NUM_MSDU_DESC)?
  837. HAL_RX_NUM_MSDU_DESC:msdu_cnt;
  838. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  839. msdu_cnt -= num_msdus;
  840. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  841. for (i = 0; i < num_msdus; i++) {
  842. struct dp_rx_desc *rx_desc =
  843. dp_rx_cookie_2_va_rxdma_buf(soc,
  844. msdu_list.sw_cookie[i]);
  845. qdf_assert(rx_desc);
  846. msdu = rx_desc->nbuf;
  847. qdf_nbuf_unmap_single(soc->osdev, msdu,
  848. QDF_DMA_FROM_DEVICE);
  849. QDF_TRACE(QDF_MODULE_ID_DP,
  850. QDF_TRACE_LEVEL_DEBUG,
  851. "[%s][%d] msdu_nbuf=%p \n",
  852. __func__, __LINE__, msdu);
  853. qdf_nbuf_free(msdu);
  854. rx_bufs_used++;
  855. dp_rx_add_to_free_desc_list(head,
  856. tail, rx_desc);
  857. }
  858. } else {
  859. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  860. }
  861. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  862. &p_buf_addr_info);
  863. dp_rx_link_desc_return(soc, p_last_buf_addr_info);
  864. p_last_buf_addr_info = p_buf_addr_info;
  865. } while (buf_info.paddr && msdu_cnt);
  866. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  867. return rx_bufs_used;
  868. }
  869. /**
  870. * dp_rxdma_err_process() - RxDMA error processing functionality
  871. *
  872. * @soc: core txrx main contex
  873. * @mac_id: mac id which is one of 3 mac_ids
  874. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  875. * @quota: No. of units (packets) that can be serviced in one shot.
  876. * Return: num of buffers processed
  877. */
  878. uint32_t
  879. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  880. {
  881. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  882. uint8_t pdev_id;
  883. void *hal_soc;
  884. void *rxdma_dst_ring_desc;
  885. void *err_dst_srng;
  886. union dp_rx_desc_list_elem_t *head = NULL;
  887. union dp_rx_desc_list_elem_t *tail = NULL;
  888. struct dp_srng *dp_rxdma_srng;
  889. struct rx_desc_pool *rx_desc_pool;
  890. uint32_t work_done = 0;
  891. uint32_t rx_bufs_used = 0;
  892. #ifdef DP_INTR_POLL_BASED
  893. if (!pdev)
  894. return 0;
  895. #endif
  896. pdev_id = pdev->pdev_id;
  897. err_dst_srng = pdev->rxdma_err_dst_ring.hal_srng;
  898. if (!err_dst_srng) {
  899. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  900. "%s %d : HAL Monitor Destination Ring Init \
  901. Failed -- %p\n",
  902. __func__, __LINE__, err_dst_srng);
  903. return 0;
  904. }
  905. hal_soc = soc->hal_soc;
  906. qdf_assert(hal_soc);
  907. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  909. "%s %d : HAL Monitor Destination Ring Init \
  910. Failed -- %p\n",
  911. __func__, __LINE__, err_dst_srng);
  912. return 0;
  913. }
  914. while (qdf_likely((rxdma_dst_ring_desc =
  915. hal_srng_dst_get_next(hal_soc, err_dst_srng)) && quota--)) {
  916. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  917. rxdma_dst_ring_desc,
  918. &head, &tail);
  919. }
  920. hal_srng_access_end(hal_soc, err_dst_srng);
  921. if (rx_bufs_used) {
  922. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  923. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  924. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  925. rx_desc_pool, rx_bufs_used, &head, &tail,
  926. HAL_RX_BUF_RBM_SW3_BM);
  927. work_done += rx_bufs_used;
  928. }
  929. return work_done;
  930. }