dp_rx.c 69 KB

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  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  41. static inline
  42. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  43. {
  44. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  45. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  46. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  47. return false;
  48. }
  49. return true;
  50. }
  51. #else
  52. static inline
  53. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  54. {
  55. return true;
  56. }
  57. #endif
  58. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  59. {
  60. return vdev->ap_bridge_enabled;
  61. }
  62. #ifdef DUP_RX_DESC_WAR
  63. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  64. hal_ring_handle_t hal_ring,
  65. hal_ring_desc_t ring_desc,
  66. struct dp_rx_desc *rx_desc)
  67. {
  68. void *hal_soc = soc->hal_soc;
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. dp_rx_desc_dump(rx_desc);
  71. }
  72. #else
  73. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  74. hal_ring_handle_t hal_ring_hdl,
  75. hal_ring_desc_t ring_desc,
  76. struct dp_rx_desc *rx_desc)
  77. {
  78. hal_soc_handle_t hal_soc = soc->hal_soc;
  79. dp_rx_desc_dump(rx_desc);
  80. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  81. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  82. qdf_assert_always(0);
  83. }
  84. #endif
  85. /*
  86. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  87. * called during dp rx initialization
  88. * and at the end of dp_rx_process.
  89. *
  90. * @soc: core txrx main context
  91. * @mac_id: mac_id which is one of 3 mac_ids
  92. * @dp_rxdma_srng: dp rxdma circular ring
  93. * @rx_desc_pool: Pointer to free Rx descriptor pool
  94. * @num_req_buffers: number of buffer to be replenished
  95. * @desc_list: list of descs if called from dp_rx_process
  96. * or NULL during dp rx initialization or out of buffer
  97. * interrupt.
  98. * @tail: tail of descs list
  99. * Return: return success or failure
  100. */
  101. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  102. struct dp_srng *dp_rxdma_srng,
  103. struct rx_desc_pool *rx_desc_pool,
  104. uint32_t num_req_buffers,
  105. union dp_rx_desc_list_elem_t **desc_list,
  106. union dp_rx_desc_list_elem_t **tail)
  107. {
  108. uint32_t num_alloc_desc;
  109. uint16_t num_desc_to_free = 0;
  110. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  111. uint32_t num_entries_avail;
  112. uint32_t count;
  113. int sync_hw_ptr = 1;
  114. qdf_dma_addr_t paddr;
  115. qdf_nbuf_t rx_netbuf;
  116. void *rxdma_ring_entry;
  117. union dp_rx_desc_list_elem_t *next;
  118. QDF_STATUS ret;
  119. void *rxdma_srng;
  120. rxdma_srng = dp_rxdma_srng->hal_srng;
  121. if (!rxdma_srng) {
  122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  123. "rxdma srng not initialized");
  124. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  128. "requested %d buffers for replenish", num_req_buffers);
  129. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  130. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  131. rxdma_srng,
  132. sync_hw_ptr);
  133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  134. "no of available entries in rxdma ring: %d",
  135. num_entries_avail);
  136. if (!(*desc_list) && (num_entries_avail >
  137. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  138. num_req_buffers = num_entries_avail;
  139. } else if (num_entries_avail < num_req_buffers) {
  140. num_desc_to_free = num_req_buffers - num_entries_avail;
  141. num_req_buffers = num_entries_avail;
  142. }
  143. if (qdf_unlikely(!num_req_buffers)) {
  144. num_desc_to_free = num_req_buffers;
  145. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  146. goto free_descs;
  147. }
  148. /*
  149. * if desc_list is NULL, allocate the descs from freelist
  150. */
  151. if (!(*desc_list)) {
  152. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  153. rx_desc_pool,
  154. num_req_buffers,
  155. desc_list,
  156. tail);
  157. if (!num_alloc_desc) {
  158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  159. "no free rx_descs in freelist");
  160. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  161. num_req_buffers);
  162. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  163. return QDF_STATUS_E_NOMEM;
  164. }
  165. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  166. "%d rx desc allocated", num_alloc_desc);
  167. num_req_buffers = num_alloc_desc;
  168. }
  169. count = 0;
  170. while (count < num_req_buffers) {
  171. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  172. RX_BUFFER_SIZE,
  173. RX_BUFFER_RESERVATION,
  174. RX_BUFFER_ALIGNMENT,
  175. FALSE);
  176. if (qdf_unlikely(!rx_netbuf)) {
  177. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  178. break;
  179. }
  180. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  181. QDF_DMA_FROM_DEVICE);
  182. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  183. qdf_nbuf_free(rx_netbuf);
  184. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  185. continue;
  186. }
  187. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  188. /*
  189. * check if the physical address of nbuf->data is
  190. * less then 0x50000000 then free the nbuf and try
  191. * allocating new nbuf. We can try for 100 times.
  192. * this is a temp WAR till we fix it properly.
  193. */
  194. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  195. if (ret == QDF_STATUS_E_FAILURE) {
  196. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  197. break;
  198. }
  199. count++;
  200. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  201. rxdma_srng);
  202. qdf_assert_always(rxdma_ring_entry);
  203. next = (*desc_list)->next;
  204. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  205. /* rx_desc.in_use should be zero at this time*/
  206. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  207. (*desc_list)->rx_desc.in_use = 1;
  208. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  209. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  210. (unsigned long long)paddr,
  211. (*desc_list)->rx_desc.cookie);
  212. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  213. (*desc_list)->rx_desc.cookie,
  214. rx_desc_pool->owner);
  215. *desc_list = next;
  216. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  217. }
  218. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  219. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  220. count, num_desc_to_free);
  221. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  222. (RX_BUFFER_SIZE * count));
  223. free_descs:
  224. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  225. /*
  226. * add any available free desc back to the free list
  227. */
  228. if (*desc_list)
  229. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  230. mac_id, rx_desc_pool);
  231. return QDF_STATUS_SUCCESS;
  232. }
  233. /*
  234. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  235. * pkts to RAW mode simulation to
  236. * decapsulate the pkt.
  237. *
  238. * @vdev: vdev on which RAW mode is enabled
  239. * @nbuf_list: list of RAW pkts to process
  240. * @peer: peer object from which the pkt is rx
  241. *
  242. * Return: void
  243. */
  244. void
  245. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  246. struct dp_peer *peer)
  247. {
  248. qdf_nbuf_t deliver_list_head = NULL;
  249. qdf_nbuf_t deliver_list_tail = NULL;
  250. qdf_nbuf_t nbuf;
  251. nbuf = nbuf_list;
  252. while (nbuf) {
  253. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  254. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  255. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  256. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  257. /*
  258. * reset the chfrag_start and chfrag_end bits in nbuf cb
  259. * as this is a non-amsdu pkt and RAW mode simulation expects
  260. * these bit s to be 0 for non-amsdu pkt.
  261. */
  262. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  263. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  264. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  265. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  266. }
  267. nbuf = next;
  268. }
  269. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  270. &deliver_list_tail, (struct cdp_peer*) peer);
  271. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  272. }
  273. #ifdef DP_LFR
  274. /*
  275. * In case of LFR, data of a new peer might be sent up
  276. * even before peer is added.
  277. */
  278. static inline struct dp_vdev *
  279. dp_get_vdev_from_peer(struct dp_soc *soc,
  280. uint16_t peer_id,
  281. struct dp_peer *peer,
  282. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  283. {
  284. struct dp_vdev *vdev;
  285. uint8_t vdev_id;
  286. if (unlikely(!peer)) {
  287. if (peer_id != HTT_INVALID_PEER) {
  288. vdev_id = DP_PEER_METADATA_ID_GET(
  289. mpdu_desc_info.peer_meta_data);
  290. QDF_TRACE(QDF_MODULE_ID_DP,
  291. QDF_TRACE_LEVEL_DEBUG,
  292. FL("PeerID %d not found use vdevID %d"),
  293. peer_id, vdev_id);
  294. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  295. vdev_id);
  296. } else {
  297. QDF_TRACE(QDF_MODULE_ID_DP,
  298. QDF_TRACE_LEVEL_DEBUG,
  299. FL("Invalid PeerID %d"),
  300. peer_id);
  301. return NULL;
  302. }
  303. } else {
  304. vdev = peer->vdev;
  305. }
  306. return vdev;
  307. }
  308. #else
  309. static inline struct dp_vdev *
  310. dp_get_vdev_from_peer(struct dp_soc *soc,
  311. uint16_t peer_id,
  312. struct dp_peer *peer,
  313. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  314. {
  315. if (unlikely(!peer)) {
  316. QDF_TRACE(QDF_MODULE_ID_DP,
  317. QDF_TRACE_LEVEL_DEBUG,
  318. FL("Peer not found for peerID %d"),
  319. peer_id);
  320. return NULL;
  321. } else {
  322. return peer->vdev;
  323. }
  324. }
  325. #endif
  326. #ifndef FEATURE_WDS
  327. static void
  328. dp_rx_da_learn(struct dp_soc *soc,
  329. uint8_t *rx_tlv_hdr,
  330. struct dp_peer *ta_peer,
  331. qdf_nbuf_t nbuf)
  332. {
  333. }
  334. #endif
  335. /*
  336. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  337. *
  338. * @soc: core txrx main context
  339. * @ta_peer : source peer entry
  340. * @rx_tlv_hdr : start address of rx tlvs
  341. * @nbuf : nbuf that has to be intrabss forwarded
  342. *
  343. * Return: bool: true if it is forwarded else false
  344. */
  345. static bool
  346. dp_rx_intrabss_fwd(struct dp_soc *soc,
  347. struct dp_peer *ta_peer,
  348. uint8_t *rx_tlv_hdr,
  349. qdf_nbuf_t nbuf)
  350. {
  351. uint16_t da_idx;
  352. uint16_t len;
  353. uint8_t is_frag;
  354. struct dp_peer *da_peer;
  355. struct dp_ast_entry *ast_entry;
  356. qdf_nbuf_t nbuf_copy;
  357. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  358. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  359. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  360. tid_stats.tid_rx_stats[ring_id][tid];
  361. /* check if the destination peer is available in peer table
  362. * and also check if the source peer and destination peer
  363. * belong to the same vap and destination peer is not bss peer.
  364. */
  365. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  366. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  367. ast_entry = soc->ast_table[da_idx];
  368. if (!ast_entry)
  369. return false;
  370. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  371. ast_entry->is_active = TRUE;
  372. return false;
  373. }
  374. da_peer = ast_entry->peer;
  375. if (!da_peer)
  376. return false;
  377. /* TA peer cannot be same as peer(DA) on which AST is present
  378. * this indicates a change in topology and that AST entries
  379. * are yet to be updated.
  380. */
  381. if (da_peer == ta_peer)
  382. return false;
  383. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  384. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  385. is_frag = qdf_nbuf_is_frag(nbuf);
  386. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  387. /* linearize the nbuf just before we send to
  388. * dp_tx_send()
  389. */
  390. if (qdf_unlikely(is_frag)) {
  391. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  392. return false;
  393. nbuf = qdf_nbuf_unshare(nbuf);
  394. if (!nbuf) {
  395. DP_STATS_INC_PKT(ta_peer,
  396. rx.intra_bss.fail,
  397. 1,
  398. len);
  399. /* return true even though the pkt is
  400. * not forwarded. Basically skb_unshare
  401. * failed and we want to continue with
  402. * next nbuf.
  403. */
  404. tid_stats->fail_cnt[INTRABSS_DROP]++;
  405. return true;
  406. }
  407. }
  408. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  409. nbuf)) {
  410. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  411. len);
  412. return true;
  413. } else {
  414. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  415. len);
  416. tid_stats->fail_cnt[INTRABSS_DROP]++;
  417. return false;
  418. }
  419. }
  420. }
  421. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  422. * source, then clone the pkt and send the cloned pkt for
  423. * intra BSS forwarding and original pkt up the network stack
  424. * Note: how do we handle multicast pkts. do we forward
  425. * all multicast pkts as is or let a higher layer module
  426. * like igmpsnoop decide whether to forward or not with
  427. * Mcast enhancement.
  428. */
  429. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  430. !ta_peer->bss_peer))) {
  431. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  432. goto end;
  433. nbuf_copy = qdf_nbuf_copy(nbuf);
  434. if (!nbuf_copy)
  435. goto end;
  436. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  437. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  438. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  439. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  440. tid_stats->fail_cnt[INTRABSS_DROP]++;
  441. qdf_nbuf_free(nbuf_copy);
  442. } else {
  443. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  444. tid_stats->intrabss_cnt++;
  445. }
  446. }
  447. end:
  448. /* return false as we have to still send the original pkt
  449. * up the stack
  450. */
  451. return false;
  452. }
  453. #ifdef MESH_MODE_SUPPORT
  454. /**
  455. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  456. *
  457. * @vdev: DP Virtual device handle
  458. * @nbuf: Buffer pointer
  459. * @rx_tlv_hdr: start of rx tlv header
  460. * @peer: pointer to peer
  461. *
  462. * This function allocated memory for mesh receive stats and fill the
  463. * required stats. Stores the memory address in skb cb.
  464. *
  465. * Return: void
  466. */
  467. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  468. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  469. {
  470. struct mesh_recv_hdr_s *rx_info = NULL;
  471. uint32_t pkt_type;
  472. uint32_t nss;
  473. uint32_t rate_mcs;
  474. uint32_t bw;
  475. /* fill recv mesh stats */
  476. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  477. /* upper layers are resposible to free this memory */
  478. if (!rx_info) {
  479. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  480. "Memory allocation failed for mesh rx stats");
  481. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  482. return;
  483. }
  484. rx_info->rs_flags = MESH_RXHDR_VER1;
  485. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  486. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  487. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  488. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  489. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  490. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  491. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  492. if (vdev->osif_get_key)
  493. vdev->osif_get_key(vdev->osif_vdev,
  494. &rx_info->rs_decryptkey[0],
  495. &peer->mac_addr.raw[0],
  496. rx_info->rs_keyix);
  497. }
  498. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  499. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  500. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  501. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  502. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  503. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  504. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  505. (bw << 24);
  506. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  507. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  508. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  509. rx_info->rs_flags,
  510. rx_info->rs_rssi,
  511. rx_info->rs_channel,
  512. rx_info->rs_ratephy1,
  513. rx_info->rs_keyix);
  514. }
  515. /**
  516. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  517. *
  518. * @vdev: DP Virtual device handle
  519. * @nbuf: Buffer pointer
  520. * @rx_tlv_hdr: start of rx tlv header
  521. *
  522. * This checks if the received packet is matching any filter out
  523. * catogery and and drop the packet if it matches.
  524. *
  525. * Return: status(0 indicates drop, 1 indicate to no drop)
  526. */
  527. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  528. uint8_t *rx_tlv_hdr)
  529. {
  530. union dp_align_mac_addr mac_addr;
  531. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  532. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  533. if (hal_rx_mpdu_get_fr_ds(rx_tlv_hdr))
  534. return QDF_STATUS_SUCCESS;
  535. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  536. if (hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  537. return QDF_STATUS_SUCCESS;
  538. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  539. if (!hal_rx_mpdu_get_fr_ds(rx_tlv_hdr)
  540. && !hal_rx_mpdu_get_to_ds(rx_tlv_hdr))
  541. return QDF_STATUS_SUCCESS;
  542. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  543. if (hal_rx_mpdu_get_addr1(rx_tlv_hdr,
  544. &mac_addr.raw[0]))
  545. return QDF_STATUS_E_FAILURE;
  546. if (!qdf_mem_cmp(&mac_addr.raw[0],
  547. &vdev->mac_addr.raw[0],
  548. QDF_MAC_ADDR_SIZE))
  549. return QDF_STATUS_SUCCESS;
  550. }
  551. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  552. if (hal_rx_mpdu_get_addr2(rx_tlv_hdr,
  553. &mac_addr.raw[0]))
  554. return QDF_STATUS_E_FAILURE;
  555. if (!qdf_mem_cmp(&mac_addr.raw[0],
  556. &vdev->mac_addr.raw[0],
  557. QDF_MAC_ADDR_SIZE))
  558. return QDF_STATUS_SUCCESS;
  559. }
  560. }
  561. return QDF_STATUS_E_FAILURE;
  562. }
  563. #else
  564. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  565. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  566. {
  567. }
  568. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  569. uint8_t *rx_tlv_hdr)
  570. {
  571. return QDF_STATUS_E_FAILURE;
  572. }
  573. #endif
  574. #ifdef FEATURE_NAC_RSSI
  575. /**
  576. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  577. * clients
  578. * @pdev: DP pdev handle
  579. * @rx_pkt_hdr: Rx packet Header
  580. *
  581. * return: dp_vdev*
  582. */
  583. static
  584. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  585. uint8_t *rx_pkt_hdr)
  586. {
  587. struct ieee80211_frame *wh;
  588. struct dp_neighbour_peer *peer = NULL;
  589. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  590. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  591. return NULL;
  592. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  593. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  594. neighbour_peer_list_elem) {
  595. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  596. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  597. QDF_TRACE(
  598. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  599. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  600. peer->neighbour_peers_macaddr.raw[0],
  601. peer->neighbour_peers_macaddr.raw[1],
  602. peer->neighbour_peers_macaddr.raw[2],
  603. peer->neighbour_peers_macaddr.raw[3],
  604. peer->neighbour_peers_macaddr.raw[4],
  605. peer->neighbour_peers_macaddr.raw[5]);
  606. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  607. return pdev->monitor_vdev;
  608. }
  609. }
  610. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  611. return NULL;
  612. }
  613. /**
  614. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  615. * @soc: DP SOC handle
  616. * @mpdu: mpdu for which peer is invalid
  617. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  618. * pool_id has same mapping)
  619. *
  620. * return: integer type
  621. */
  622. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  623. uint8_t mac_id)
  624. {
  625. struct dp_invalid_peer_msg msg;
  626. struct dp_vdev *vdev = NULL;
  627. struct dp_pdev *pdev = NULL;
  628. struct ieee80211_frame *wh;
  629. qdf_nbuf_t curr_nbuf, next_nbuf;
  630. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  631. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  632. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  633. if (!HAL_IS_DECAP_FORMAT_RAW(rx_tlv_hdr)) {
  634. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  635. "Drop decapped frames");
  636. goto free;
  637. }
  638. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  639. if (!DP_FRAME_IS_DATA(wh)) {
  640. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  641. "NAWDS valid only for data frames");
  642. goto free;
  643. }
  644. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  645. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  646. "Invalid nbuf length");
  647. goto free;
  648. }
  649. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  650. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  651. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  652. "PDEV %s", !pdev ? "not found" : "down");
  653. goto free;
  654. }
  655. if (pdev->filter_neighbour_peers) {
  656. /* Next Hop scenario not yet handle */
  657. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  658. if (vdev) {
  659. dp_rx_mon_deliver(soc, pdev->pdev_id,
  660. pdev->invalid_peer_head_msdu,
  661. pdev->invalid_peer_tail_msdu);
  662. pdev->invalid_peer_head_msdu = NULL;
  663. pdev->invalid_peer_tail_msdu = NULL;
  664. return 0;
  665. }
  666. }
  667. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  668. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  669. QDF_MAC_ADDR_SIZE) == 0) {
  670. goto out;
  671. }
  672. }
  673. if (!vdev) {
  674. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  675. "VDEV not found");
  676. goto free;
  677. }
  678. out:
  679. msg.wh = wh;
  680. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  681. msg.nbuf = mpdu;
  682. msg.vdev_id = vdev->vdev_id;
  683. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  684. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(pdev->ctrl_pdev,
  685. &msg);
  686. free:
  687. /* Drop and free packet */
  688. curr_nbuf = mpdu;
  689. while (curr_nbuf) {
  690. next_nbuf = qdf_nbuf_next(curr_nbuf);
  691. qdf_nbuf_free(curr_nbuf);
  692. curr_nbuf = next_nbuf;
  693. }
  694. return 0;
  695. }
  696. /**
  697. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  698. * @soc: DP SOC handle
  699. * @mpdu: mpdu for which peer is invalid
  700. * @mpdu_done: if an mpdu is completed
  701. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  702. * pool_id has same mapping)
  703. *
  704. * return: integer type
  705. */
  706. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  707. qdf_nbuf_t mpdu, bool mpdu_done,
  708. uint8_t mac_id)
  709. {
  710. /* Only trigger the process when mpdu is completed */
  711. if (mpdu_done)
  712. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  713. }
  714. #else
  715. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  716. uint8_t mac_id)
  717. {
  718. qdf_nbuf_t curr_nbuf, next_nbuf;
  719. struct dp_pdev *pdev;
  720. struct dp_vdev *vdev = NULL;
  721. struct ieee80211_frame *wh;
  722. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  723. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  724. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  725. if (!DP_FRAME_IS_DATA(wh)) {
  726. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  727. "only for data frames");
  728. goto free;
  729. }
  730. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  732. "Invalid nbuf length");
  733. goto free;
  734. }
  735. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  736. if (!pdev) {
  737. QDF_TRACE(QDF_MODULE_ID_DP,
  738. QDF_TRACE_LEVEL_ERROR,
  739. "PDEV not found");
  740. goto free;
  741. }
  742. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  743. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  744. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  745. QDF_MAC_ADDR_SIZE) == 0) {
  746. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  747. goto out;
  748. }
  749. }
  750. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  751. if (!vdev) {
  752. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  753. "VDEV not found");
  754. goto free;
  755. }
  756. out:
  757. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  758. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  759. free:
  760. /* reset the head and tail pointers */
  761. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  762. if (pdev) {
  763. pdev->invalid_peer_head_msdu = NULL;
  764. pdev->invalid_peer_tail_msdu = NULL;
  765. }
  766. /* Drop and free packet */
  767. curr_nbuf = mpdu;
  768. while (curr_nbuf) {
  769. next_nbuf = qdf_nbuf_next(curr_nbuf);
  770. qdf_nbuf_free(curr_nbuf);
  771. curr_nbuf = next_nbuf;
  772. }
  773. return 0;
  774. }
  775. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  776. qdf_nbuf_t mpdu, bool mpdu_done,
  777. uint8_t mac_id)
  778. {
  779. /* Process the nbuf */
  780. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  781. }
  782. #endif
  783. #ifdef RECEIVE_OFFLOAD
  784. /**
  785. * dp_rx_print_offload_info() - Print offload info from RX TLV
  786. * @rx_tlv: RX TLV for which offload information is to be printed
  787. *
  788. * Return: None
  789. */
  790. static void dp_rx_print_offload_info(uint8_t *rx_tlv)
  791. {
  792. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  793. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  794. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  795. dp_verbose_debug("chksum 0x%x", HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv));
  796. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  797. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  798. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  799. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  800. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  801. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  802. dp_verbose_debug("---------------------------------------------------------");
  803. }
  804. /**
  805. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  806. * @soc: DP SOC handle
  807. * @rx_tlv: RX TLV received for the msdu
  808. * @msdu: msdu for which GRO info needs to be filled
  809. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  810. *
  811. * Return: None
  812. */
  813. static
  814. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  815. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  816. {
  817. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  818. return;
  819. /* Filling up RX offload info only for TCP packets */
  820. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  821. return;
  822. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  823. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  824. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  825. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  826. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  827. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  828. HAL_RX_TLV_GET_TCP_CHKSUM(rx_tlv);
  829. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  830. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  831. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  832. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  833. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  834. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  835. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  836. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  837. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  838. HAL_RX_TLV_GET_IPV6(rx_tlv);
  839. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  840. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  841. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  842. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  843. dp_rx_print_offload_info(rx_tlv);
  844. }
  845. #else
  846. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  847. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  848. {
  849. }
  850. #endif /* RECEIVE_OFFLOAD */
  851. /**
  852. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  853. *
  854. * @nbuf: pointer to msdu.
  855. * @mpdu_len: mpdu length
  856. *
  857. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  858. */
  859. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  860. {
  861. bool last_nbuf;
  862. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  863. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  864. last_nbuf = false;
  865. } else {
  866. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  867. last_nbuf = true;
  868. }
  869. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  870. return last_nbuf;
  871. }
  872. /**
  873. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  874. * multiple nbufs.
  875. * @nbuf: pointer to the first msdu of an amsdu.
  876. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  877. *
  878. *
  879. * This function implements the creation of RX frag_list for cases
  880. * where an MSDU is spread across multiple nbufs.
  881. *
  882. * Return: returns the head nbuf which contains complete frag_list.
  883. */
  884. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  885. {
  886. qdf_nbuf_t parent, next, frag_list;
  887. uint16_t frag_list_len = 0;
  888. uint16_t mpdu_len;
  889. bool last_nbuf;
  890. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  891. /*
  892. * this is a case where the complete msdu fits in one single nbuf.
  893. * in this case HW sets both start and end bit and we only need to
  894. * reset these bits for RAW mode simulator to decap the pkt
  895. */
  896. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  897. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  898. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  899. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  900. return nbuf;
  901. }
  902. /*
  903. * This is a case where we have multiple msdus (A-MSDU) spread across
  904. * multiple nbufs. here we create a fraglist out of these nbufs.
  905. *
  906. * the moment we encounter a nbuf with continuation bit set we
  907. * know for sure we have an MSDU which is spread across multiple
  908. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  909. */
  910. parent = nbuf;
  911. frag_list = nbuf->next;
  912. nbuf = nbuf->next;
  913. /*
  914. * set the start bit in the first nbuf we encounter with continuation
  915. * bit set. This has the proper mpdu length set as it is the first
  916. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  917. * nbufs will form the frag_list of the parent nbuf.
  918. */
  919. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  920. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  921. /*
  922. * this is where we set the length of the fragments which are
  923. * associated to the parent nbuf. We iterate through the frag_list
  924. * till we hit the last_nbuf of the list.
  925. */
  926. do {
  927. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  928. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  929. frag_list_len += qdf_nbuf_len(nbuf);
  930. if (last_nbuf) {
  931. next = nbuf->next;
  932. nbuf->next = NULL;
  933. break;
  934. }
  935. nbuf = nbuf->next;
  936. } while (!last_nbuf);
  937. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  938. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  939. parent->next = next;
  940. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  941. return parent;
  942. }
  943. /**
  944. * dp_rx_compute_delay() - Compute and fill in all timestamps
  945. * to pass in correct fields
  946. *
  947. * @vdev: pdev handle
  948. * @tx_desc: tx descriptor
  949. * @tid: tid value
  950. * Return: none
  951. */
  952. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  953. {
  954. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  955. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  956. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  957. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  958. uint32_t interframe_delay =
  959. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  960. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  961. CDP_DELAY_STATS_REAP_STACK, ring_id);
  962. /*
  963. * Update interframe delay stats calculated at deliver_data_ol point.
  964. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  965. * interframe delay will not be calculate correctly for 1st frame.
  966. * On the other side, this will help in avoiding extra per packet check
  967. * of vdev->prev_rx_deliver_tstamp.
  968. */
  969. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  970. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  971. vdev->prev_rx_deliver_tstamp = current_ts;
  972. }
  973. /**
  974. * dp_rx_drop_nbuf_list() - drop an nbuf list
  975. * @pdev: dp pdev reference
  976. * @buf_list: buffer list to be dropepd
  977. *
  978. * Return: int (number of bufs dropped)
  979. */
  980. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  981. qdf_nbuf_t buf_list)
  982. {
  983. struct cdp_tid_rx_stats *stats = NULL;
  984. uint8_t tid = 0, ring_id = 0;
  985. int num_dropped = 0;
  986. qdf_nbuf_t buf, next_buf;
  987. buf = buf_list;
  988. while (buf) {
  989. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  990. next_buf = qdf_nbuf_queue_next(buf);
  991. tid = qdf_nbuf_get_tid_val(buf);
  992. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  993. stats->fail_cnt[INVALID_PEER_VDEV]++;
  994. stats->delivered_to_stack--;
  995. qdf_nbuf_free(buf);
  996. buf = next_buf;
  997. num_dropped++;
  998. }
  999. return num_dropped;
  1000. }
  1001. #ifdef PEER_CACHE_RX_PKTS
  1002. /**
  1003. * dp_rx_flush_rx_cached() - flush cached rx frames
  1004. * @peer: peer
  1005. * @drop: flag to drop frames or forward to net stack
  1006. *
  1007. * Return: None
  1008. */
  1009. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1010. {
  1011. struct dp_peer_cached_bufq *bufqi;
  1012. struct dp_rx_cached_buf *cache_buf = NULL;
  1013. ol_txrx_rx_fp data_rx = NULL;
  1014. int num_buff_elem;
  1015. QDF_STATUS status;
  1016. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1017. qdf_atomic_dec(&peer->flush_in_progress);
  1018. return;
  1019. }
  1020. qdf_spin_lock_bh(&peer->peer_info_lock);
  1021. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1022. data_rx = peer->vdev->osif_rx;
  1023. else
  1024. drop = true;
  1025. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1026. bufqi = &peer->bufq_info;
  1027. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1028. qdf_list_remove_front(&bufqi->cached_bufq,
  1029. (qdf_list_node_t **)&cache_buf);
  1030. while (cache_buf) {
  1031. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1032. cache_buf->buf);
  1033. bufqi->entries -= num_buff_elem;
  1034. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1035. if (drop) {
  1036. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1037. cache_buf->buf);
  1038. } else {
  1039. /* Flush the cached frames to OSIF DEV */
  1040. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1041. if (status != QDF_STATUS_SUCCESS)
  1042. bufqi->dropped = dp_rx_drop_nbuf_list(
  1043. peer->vdev->pdev,
  1044. cache_buf->buf);
  1045. }
  1046. qdf_mem_free(cache_buf);
  1047. cache_buf = NULL;
  1048. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1049. qdf_list_remove_front(&bufqi->cached_bufq,
  1050. (qdf_list_node_t **)&cache_buf);
  1051. }
  1052. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1053. qdf_atomic_dec(&peer->flush_in_progress);
  1054. }
  1055. /**
  1056. * dp_rx_enqueue_rx() - cache rx frames
  1057. * @peer: peer
  1058. * @rx_buf_list: cache buffer list
  1059. *
  1060. * Return: None
  1061. */
  1062. static QDF_STATUS
  1063. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1064. {
  1065. struct dp_rx_cached_buf *cache_buf;
  1066. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1067. int num_buff_elem;
  1068. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1069. bufqi->entries, bufqi->dropped);
  1070. if (!peer->valid) {
  1071. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1072. rx_buf_list);
  1073. return QDF_STATUS_E_INVAL;
  1074. }
  1075. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1076. if (bufqi->entries >= bufqi->thresh) {
  1077. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1078. rx_buf_list);
  1079. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1080. return QDF_STATUS_E_RESOURCES;
  1081. }
  1082. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1083. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1084. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1085. if (!cache_buf) {
  1086. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1087. "Failed to allocate buf to cache rx frames");
  1088. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1089. rx_buf_list);
  1090. return QDF_STATUS_E_NOMEM;
  1091. }
  1092. cache_buf->buf = rx_buf_list;
  1093. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1094. qdf_list_insert_back(&bufqi->cached_bufq,
  1095. &cache_buf->node);
  1096. bufqi->entries += num_buff_elem;
  1097. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1098. return QDF_STATUS_SUCCESS;
  1099. }
  1100. static inline
  1101. bool dp_rx_is_peer_cache_bufq_supported(void)
  1102. {
  1103. return true;
  1104. }
  1105. #else
  1106. static inline
  1107. bool dp_rx_is_peer_cache_bufq_supported(void)
  1108. {
  1109. return false;
  1110. }
  1111. static inline QDF_STATUS
  1112. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1113. {
  1114. return QDF_STATUS_SUCCESS;
  1115. }
  1116. #endif
  1117. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1118. struct dp_peer *peer,
  1119. qdf_nbuf_t nbuf_head,
  1120. qdf_nbuf_t nbuf_tail)
  1121. {
  1122. /*
  1123. * highly unlikely to have a vdev without a registered rx
  1124. * callback function. if so let us free the nbuf_list.
  1125. */
  1126. if (qdf_unlikely(!vdev->osif_rx)) {
  1127. if (dp_rx_is_peer_cache_bufq_supported())
  1128. dp_rx_enqueue_rx(peer, nbuf_head);
  1129. else
  1130. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1131. return;
  1132. }
  1133. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1134. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1135. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1136. &nbuf_tail, (struct cdp_peer *) peer);
  1137. }
  1138. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1139. }
  1140. /**
  1141. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1142. * @nbuf: pointer to the first msdu of an amsdu.
  1143. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1144. *
  1145. * The ipsumed field of the skb is set based on whether HW validated the
  1146. * IP/TCP/UDP checksum.
  1147. *
  1148. * Return: void
  1149. */
  1150. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1151. qdf_nbuf_t nbuf,
  1152. uint8_t *rx_tlv_hdr)
  1153. {
  1154. qdf_nbuf_rx_cksum_t cksum = {0};
  1155. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1156. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1157. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1158. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1159. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1160. } else {
  1161. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1162. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1163. }
  1164. }
  1165. /**
  1166. * dp_rx_msdu_stats_update() - update per msdu stats.
  1167. * @soc: core txrx main context
  1168. * @nbuf: pointer to the first msdu of an amsdu.
  1169. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1170. * @peer: pointer to the peer object.
  1171. * @ring_id: reo dest ring number on which pkt is reaped.
  1172. * @tid_stats: per tid rx stats.
  1173. *
  1174. * update all the per msdu stats for that nbuf.
  1175. * Return: void
  1176. */
  1177. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1178. qdf_nbuf_t nbuf,
  1179. uint8_t *rx_tlv_hdr,
  1180. struct dp_peer *peer,
  1181. uint8_t ring_id,
  1182. struct cdp_tid_rx_stats *tid_stats)
  1183. {
  1184. bool is_ampdu, is_not_amsdu;
  1185. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1186. struct dp_vdev *vdev = peer->vdev;
  1187. qdf_ether_header_t *eh;
  1188. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1189. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1190. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1191. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1192. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1193. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1194. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1195. tid_stats->msdu_cnt++;
  1196. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1197. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1198. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1199. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1200. tid_stats->mcast_msdu_cnt++;
  1201. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1202. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1203. tid_stats->bcast_msdu_cnt++;
  1204. }
  1205. }
  1206. /*
  1207. * currently we can return from here as we have similar stats
  1208. * updated at per ppdu level instead of msdu level
  1209. */
  1210. if (!soc->process_rx_status)
  1211. return;
  1212. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1213. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1214. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1215. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1216. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1217. tid = qdf_nbuf_get_tid_val(nbuf);
  1218. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1219. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1220. rx_tlv_hdr);
  1221. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1222. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1223. DP_STATS_INC(peer, rx.bw[bw], 1);
  1224. /*
  1225. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1226. * then increase index [nss - 1] in array counter.
  1227. */
  1228. if (nss > 0 && (pkt_type == DOT11_N ||
  1229. pkt_type == DOT11_AC ||
  1230. pkt_type == DOT11_AX))
  1231. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1232. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1233. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1234. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1235. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1236. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1237. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1238. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1239. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1240. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1241. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1242. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1243. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1244. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1245. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1246. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1247. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1248. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1249. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1250. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1251. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1252. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1253. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1254. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1255. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1256. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1257. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1258. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1259. if ((soc->process_rx_status) &&
  1260. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1261. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1262. if (!vdev->pdev)
  1263. return;
  1264. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1265. &peer->stats, peer->peer_ids[0],
  1266. UPDATE_PEER_STATS,
  1267. vdev->pdev->pdev_id);
  1268. #endif
  1269. }
  1270. }
  1271. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1272. uint8_t *rx_tlv_hdr,
  1273. qdf_nbuf_t nbuf)
  1274. {
  1275. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1276. (hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr) >
  1277. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1278. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1279. qdf_nbuf_is_da_valid(nbuf) &&
  1280. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1281. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1282. return false;
  1283. return true;
  1284. }
  1285. #ifndef WDS_VENDOR_EXTENSION
  1286. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1287. struct dp_vdev *vdev,
  1288. struct dp_peer *peer)
  1289. {
  1290. return 1;
  1291. }
  1292. #endif
  1293. #ifdef RX_DESC_DEBUG_CHECK
  1294. /**
  1295. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1296. * corruption
  1297. *
  1298. * @ring_desc: REO ring descriptor
  1299. * @rx_desc: Rx descriptor
  1300. *
  1301. * Return: NONE
  1302. */
  1303. static inline
  1304. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1305. struct dp_rx_desc *rx_desc)
  1306. {
  1307. struct hal_buf_info hbi;
  1308. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1309. /* Sanity check for possible buffer paddr corruption */
  1310. qdf_assert_always((&hbi)->paddr ==
  1311. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1312. }
  1313. #else
  1314. static inline
  1315. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1316. struct dp_rx_desc *rx_desc)
  1317. {
  1318. }
  1319. #endif
  1320. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1321. static inline
  1322. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1323. {
  1324. bool limit_hit = false;
  1325. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1326. limit_hit =
  1327. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1328. if (limit_hit)
  1329. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1330. return limit_hit;
  1331. }
  1332. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1333. {
  1334. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1335. }
  1336. #else
  1337. static inline
  1338. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1339. {
  1340. return false;
  1341. }
  1342. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1343. {
  1344. return false;
  1345. }
  1346. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1347. /**
  1348. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1349. *
  1350. * @nbuf: pkt skb pointer
  1351. *
  1352. * Return: true if matched, false if not
  1353. */
  1354. static inline
  1355. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1356. {
  1357. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1358. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1359. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1360. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1361. return true;
  1362. else
  1363. return false;
  1364. }
  1365. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1366. /**
  1367. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1368. * no corresbonding peer found
  1369. * @soc: core txrx main context
  1370. * @nbuf: pkt skb pointer
  1371. *
  1372. * This function will try to deliver some RX special frames to stack
  1373. * even there is no peer matched found. for instance, LFR case, some
  1374. * eapol data will be sent to host before peer_map done.
  1375. *
  1376. * Return: None
  1377. */
  1378. static inline
  1379. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1380. {
  1381. uint32_t peer_mdata;
  1382. uint16_t peer_id;
  1383. uint8_t vdev_id;
  1384. struct dp_vdev *vdev;
  1385. uint32_t l2_hdr_offset = 0;
  1386. uint16_t msdu_len = 0;
  1387. uint32_t pkt_len = 0;
  1388. uint8_t *rx_tlv_hdr;
  1389. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1390. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1391. if (peer_id > soc->max_peers)
  1392. goto deliver_fail;
  1393. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1394. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1395. if (!vdev || !vdev->osif_rx)
  1396. goto deliver_fail;
  1397. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1398. l2_hdr_offset =
  1399. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1400. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1401. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1402. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1403. qdf_nbuf_pull_head(nbuf,
  1404. RX_PKT_TLVS_LEN +
  1405. l2_hdr_offset);
  1406. /* only allow special frames */
  1407. if (!dp_is_special_data(nbuf))
  1408. goto deliver_fail;
  1409. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1410. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1411. return;
  1412. deliver_fail:
  1413. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1414. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1415. qdf_nbuf_free(nbuf);
  1416. }
  1417. #else
  1418. static inline
  1419. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1420. {
  1421. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1422. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1423. qdf_nbuf_free(nbuf);
  1424. }
  1425. #endif
  1426. /**
  1427. * dp_rx_process() - Brain of the Rx processing functionality
  1428. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1429. * @soc: core txrx main context
  1430. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1431. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1432. * @quota: No. of units (packets) that can be serviced in one shot.
  1433. *
  1434. * This function implements the core of Rx functionality. This is
  1435. * expected to handle only non-error frames.
  1436. *
  1437. * Return: uint32_t: No. of elements processed
  1438. */
  1439. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1440. uint8_t reo_ring_num, uint32_t quota)
  1441. {
  1442. hal_ring_desc_t ring_desc;
  1443. hal_soc_handle_t hal_soc;
  1444. struct dp_rx_desc *rx_desc = NULL;
  1445. qdf_nbuf_t nbuf, next;
  1446. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1447. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1448. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1449. uint32_t l2_hdr_offset = 0;
  1450. uint16_t msdu_len = 0;
  1451. uint16_t peer_id;
  1452. struct dp_peer *peer;
  1453. struct dp_vdev *vdev;
  1454. uint32_t pkt_len = 0;
  1455. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1456. struct hal_rx_msdu_desc_info msdu_desc_info;
  1457. enum hal_reo_error_status error;
  1458. uint32_t peer_mdata;
  1459. uint8_t *rx_tlv_hdr;
  1460. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1461. uint8_t mac_id = 0;
  1462. struct dp_pdev *pdev;
  1463. struct dp_pdev *rx_pdev;
  1464. struct dp_srng *dp_rxdma_srng;
  1465. struct rx_desc_pool *rx_desc_pool;
  1466. struct dp_soc *soc = int_ctx->soc;
  1467. uint8_t ring_id = 0;
  1468. uint8_t core_id = 0;
  1469. struct cdp_tid_rx_stats *tid_stats;
  1470. qdf_nbuf_t nbuf_head;
  1471. qdf_nbuf_t nbuf_tail;
  1472. qdf_nbuf_t deliver_list_head;
  1473. qdf_nbuf_t deliver_list_tail;
  1474. uint32_t num_rx_bufs_reaped = 0;
  1475. uint32_t intr_id;
  1476. struct hif_opaque_softc *scn;
  1477. int32_t tid = 0;
  1478. bool is_prev_msdu_last = true;
  1479. uint32_t num_entries_avail = 0;
  1480. uint32_t rx_ol_pkt_cnt = 0;
  1481. DP_HIST_INIT();
  1482. qdf_assert_always(soc && hal_ring_hdl);
  1483. hal_soc = soc->hal_soc;
  1484. qdf_assert_always(hal_soc);
  1485. scn = soc->hif_handle;
  1486. hif_pm_runtime_mark_last_busy(scn);
  1487. intr_id = int_ctx->dp_intr_id;
  1488. more_data:
  1489. /* reset local variables here to be re-used in the function */
  1490. nbuf_head = NULL;
  1491. nbuf_tail = NULL;
  1492. deliver_list_head = NULL;
  1493. deliver_list_tail = NULL;
  1494. peer = NULL;
  1495. vdev = NULL;
  1496. num_rx_bufs_reaped = 0;
  1497. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1498. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1499. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1500. qdf_mem_zero(head, sizeof(head));
  1501. qdf_mem_zero(tail, sizeof(tail));
  1502. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1503. /*
  1504. * Need API to convert from hal_ring pointer to
  1505. * Ring Type / Ring Id combo
  1506. */
  1507. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1508. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1509. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1510. goto done;
  1511. }
  1512. /*
  1513. * start reaping the buffers from reo ring and queue
  1514. * them in per vdev queue.
  1515. * Process the received pkts in a different per vdev loop.
  1516. */
  1517. while (qdf_likely(quota &&
  1518. (ring_desc = hal_srng_dst_peek(hal_soc,
  1519. hal_ring_hdl)))) {
  1520. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1521. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1522. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1523. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1524. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1525. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1526. /* Don't know how to deal with this -- assert */
  1527. qdf_assert(0);
  1528. }
  1529. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1530. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1531. qdf_assert(rx_desc);
  1532. /*
  1533. * this is a unlikely scenario where the host is reaping
  1534. * a descriptor which it already reaped just a while ago
  1535. * but is yet to replenish it back to HW.
  1536. * In this case host will dump the last 128 descriptors
  1537. * including the software descriptor rx_desc and assert.
  1538. */
  1539. if (qdf_unlikely(!rx_desc->in_use)) {
  1540. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1541. dp_info_rl("Reaping rx_desc not in use!");
  1542. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1543. ring_desc, rx_desc);
  1544. /* ignore duplicate RX desc and continue to process */
  1545. /* Pop out the descriptor */
  1546. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1547. continue;
  1548. }
  1549. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1550. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1551. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1552. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1553. ring_desc, rx_desc);
  1554. }
  1555. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1556. /* TODO */
  1557. /*
  1558. * Need a separate API for unmapping based on
  1559. * phyiscal address
  1560. */
  1561. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1562. QDF_DMA_FROM_DEVICE);
  1563. rx_desc->unmapped = 1;
  1564. core_id = smp_processor_id();
  1565. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1566. /* Get MPDU DESC info */
  1567. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1568. /* Get MSDU DESC info */
  1569. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1570. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1571. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1572. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1573. HAL_MPDU_F_RAW_AMPDU)) {
  1574. /* previous msdu has end bit set, so current one is
  1575. * the new MPDU
  1576. */
  1577. if (is_prev_msdu_last) {
  1578. is_prev_msdu_last = false;
  1579. /* Get number of entries available in HW ring */
  1580. num_entries_avail =
  1581. hal_srng_dst_num_valid(hal_soc,
  1582. hal_ring_hdl, 1);
  1583. /* For new MPDU check if we can read complete
  1584. * MPDU by comparing the number of buffers
  1585. * available and number of buffers needed to
  1586. * reap this MPDU
  1587. */
  1588. if (((msdu_desc_info.msdu_len /
  1589. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1590. num_entries_avail)
  1591. break;
  1592. } else {
  1593. if (msdu_desc_info.msdu_flags &
  1594. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1595. is_prev_msdu_last = true;
  1596. }
  1597. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1598. }
  1599. /* Pop out the descriptor*/
  1600. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1601. rx_bufs_reaped[rx_desc->pool_id]++;
  1602. peer_mdata = mpdu_desc_info.peer_meta_data;
  1603. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1604. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1605. /*
  1606. * save msdu flags first, last and continuation msdu in
  1607. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1608. * length to nbuf->cb. This ensures the info required for
  1609. * per pkt processing is always in the same cache line.
  1610. * This helps in improving throughput for smaller pkt
  1611. * sizes.
  1612. */
  1613. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1614. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1615. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1616. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1617. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1618. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1619. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1620. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1621. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1622. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1623. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1624. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1625. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1626. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1627. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1628. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1629. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1630. /*
  1631. * if continuation bit is set then we have MSDU spread
  1632. * across multiple buffers, let us not decrement quota
  1633. * till we reap all buffers of that MSDU.
  1634. */
  1635. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1636. quota -= 1;
  1637. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1638. &tail[rx_desc->pool_id],
  1639. rx_desc);
  1640. num_rx_bufs_reaped++;
  1641. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1642. break;
  1643. }
  1644. done:
  1645. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1646. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1647. /*
  1648. * continue with next mac_id if no pkts were reaped
  1649. * from that pool
  1650. */
  1651. if (!rx_bufs_reaped[mac_id])
  1652. continue;
  1653. pdev = soc->pdev_list[mac_id];
  1654. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1655. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1656. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1657. rx_desc_pool, rx_bufs_reaped[mac_id],
  1658. &head[mac_id], &tail[mac_id]);
  1659. }
  1660. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1661. /* Peer can be NULL is case of LFR */
  1662. if (qdf_likely(peer))
  1663. vdev = NULL;
  1664. /*
  1665. * BIG loop where each nbuf is dequeued from global queue,
  1666. * processed and queued back on a per vdev basis. These nbufs
  1667. * are sent to stack as and when we run out of nbufs
  1668. * or a new nbuf dequeued from global queue has a different
  1669. * vdev when compared to previous nbuf.
  1670. */
  1671. nbuf = nbuf_head;
  1672. while (nbuf) {
  1673. next = nbuf->next;
  1674. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1675. /* Get TID from struct cb->tid_val, save to tid */
  1676. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1677. tid = qdf_nbuf_get_tid_val(nbuf);
  1678. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1679. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1680. peer = dp_peer_find_by_id(soc, peer_id);
  1681. if (peer) {
  1682. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1683. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1684. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1685. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1686. QDF_NBUF_RX_PKT_DATA_TRACK;
  1687. }
  1688. rx_bufs_used++;
  1689. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1690. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1691. deliver_list_tail);
  1692. deliver_list_head = NULL;
  1693. deliver_list_tail = NULL;
  1694. }
  1695. if (qdf_likely(peer)) {
  1696. vdev = peer->vdev;
  1697. } else {
  1698. nbuf->next = NULL;
  1699. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1700. nbuf = next;
  1701. continue;
  1702. }
  1703. if (qdf_unlikely(!vdev)) {
  1704. qdf_nbuf_free(nbuf);
  1705. nbuf = next;
  1706. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1707. dp_peer_unref_del_find_by_id(peer);
  1708. continue;
  1709. }
  1710. rx_pdev = vdev->pdev;
  1711. DP_RX_TID_SAVE(nbuf, tid);
  1712. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1713. qdf_nbuf_set_timestamp(nbuf);
  1714. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1715. tid_stats =
  1716. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1717. /*
  1718. * Check if DMA completed -- msdu_done is the last bit
  1719. * to be written
  1720. */
  1721. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1722. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1723. dp_err("MSDU DONE failure");
  1724. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1725. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1726. QDF_TRACE_LEVEL_INFO);
  1727. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1728. qdf_nbuf_free(nbuf);
  1729. qdf_assert(0);
  1730. nbuf = next;
  1731. continue;
  1732. }
  1733. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1734. /*
  1735. * First IF condition:
  1736. * 802.11 Fragmented pkts are reinjected to REO
  1737. * HW block as SG pkts and for these pkts we only
  1738. * need to pull the RX TLVS header length.
  1739. * Second IF condition:
  1740. * The below condition happens when an MSDU is spread
  1741. * across multiple buffers. This can happen in two cases
  1742. * 1. The nbuf size is smaller then the received msdu.
  1743. * ex: we have set the nbuf size to 2048 during
  1744. * nbuf_alloc. but we received an msdu which is
  1745. * 2304 bytes in size then this msdu is spread
  1746. * across 2 nbufs.
  1747. *
  1748. * 2. AMSDUs when RAW mode is enabled.
  1749. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1750. * across 1st nbuf and 2nd nbuf and last MSDU is
  1751. * spread across 2nd nbuf and 3rd nbuf.
  1752. *
  1753. * for these scenarios let us create a skb frag_list and
  1754. * append these buffers till the last MSDU of the AMSDU
  1755. * Third condition:
  1756. * This is the most likely case, we receive 802.3 pkts
  1757. * decapsulated by HW, here we need to set the pkt length.
  1758. */
  1759. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1760. bool is_mcbc, is_sa_vld, is_da_vld;
  1761. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr);
  1762. is_sa_vld = hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr);
  1763. is_da_vld = hal_rx_msdu_end_da_is_valid_get(rx_tlv_hdr);
  1764. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1765. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1766. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1767. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1768. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1769. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1770. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1771. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1772. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1773. next = nbuf->next;
  1774. } else {
  1775. l2_hdr_offset =
  1776. hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  1777. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1778. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1779. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1780. qdf_nbuf_pull_head(nbuf,
  1781. RX_PKT_TLVS_LEN +
  1782. l2_hdr_offset);
  1783. }
  1784. /*
  1785. * process frame for mulitpass phrase processing
  1786. */
  1787. if (qdf_unlikely(vdev->multipass_en)) {
  1788. dp_rx_multipass_process(peer, nbuf, tid);
  1789. }
  1790. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1791. QDF_TRACE(QDF_MODULE_ID_DP,
  1792. QDF_TRACE_LEVEL_ERROR,
  1793. FL("Policy Check Drop pkt"));
  1794. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1795. /* Drop & free packet */
  1796. qdf_nbuf_free(nbuf);
  1797. /* Statistics */
  1798. nbuf = next;
  1799. dp_peer_unref_del_find_by_id(peer);
  1800. continue;
  1801. }
  1802. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1803. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1804. (hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr) ==
  1805. false))) {
  1806. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1807. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1808. qdf_nbuf_free(nbuf);
  1809. nbuf = next;
  1810. dp_peer_unref_del_find_by_id(peer);
  1811. continue;
  1812. }
  1813. if (soc->process_rx_status)
  1814. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1815. /* Update the protocol tag in SKB based on CCE metadata */
  1816. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1817. reo_ring_num, false, true);
  1818. /* Update the flow tag in SKB based on FSE metadata */
  1819. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1820. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1821. ring_id, tid_stats);
  1822. if (qdf_unlikely(vdev->mesh_vdev)) {
  1823. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1824. == QDF_STATUS_SUCCESS) {
  1825. QDF_TRACE(QDF_MODULE_ID_DP,
  1826. QDF_TRACE_LEVEL_INFO_MED,
  1827. FL("mesh pkt filtered"));
  1828. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1829. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1830. 1);
  1831. qdf_nbuf_free(nbuf);
  1832. nbuf = next;
  1833. dp_peer_unref_del_find_by_id(peer);
  1834. continue;
  1835. }
  1836. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1837. }
  1838. if (qdf_likely(vdev->rx_decap_type ==
  1839. htt_cmn_pkt_type_ethernet) &&
  1840. qdf_likely(!vdev->mesh_vdev)) {
  1841. /* WDS Destination Address Learning */
  1842. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1843. /* Due to HW issue, sometimes we see that the sa_idx
  1844. * and da_idx are invalid with sa_valid and da_valid
  1845. * bits set
  1846. *
  1847. * in this case we also see that value of
  1848. * sa_sw_peer_id is set as 0
  1849. *
  1850. * Drop the packet if sa_idx and da_idx OOB or
  1851. * sa_sw_peerid is 0
  1852. */
  1853. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1854. qdf_nbuf_free(nbuf);
  1855. nbuf = next;
  1856. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1857. dp_peer_unref_del_find_by_id(peer);
  1858. continue;
  1859. }
  1860. /* WDS Source Port Learning */
  1861. if (qdf_likely(vdev->wds_enabled))
  1862. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1863. peer, nbuf);
  1864. /* Intrabss-fwd */
  1865. if (dp_rx_check_ap_bridge(vdev))
  1866. if (dp_rx_intrabss_fwd(soc,
  1867. peer,
  1868. rx_tlv_hdr,
  1869. nbuf)) {
  1870. nbuf = next;
  1871. dp_peer_unref_del_find_by_id(peer);
  1872. tid_stats->intrabss_cnt++;
  1873. continue; /* Get next desc */
  1874. }
  1875. }
  1876. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  1877. qdf_nbuf_cb_update_peer_local_id(nbuf, peer->local_id);
  1878. DP_RX_LIST_APPEND(deliver_list_head,
  1879. deliver_list_tail,
  1880. nbuf);
  1881. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1882. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1883. tid_stats->delivered_to_stack++;
  1884. nbuf = next;
  1885. dp_peer_unref_del_find_by_id(peer);
  1886. }
  1887. if (deliver_list_head && peer)
  1888. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1889. deliver_list_tail);
  1890. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  1891. if (quota &&
  1892. hal_srng_dst_peek_sync_locked(soc->hal_soc,
  1893. hal_ring_hdl)) {
  1894. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1895. if (!hif_exec_should_yield(scn, intr_id))
  1896. goto more_data;
  1897. }
  1898. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  1899. vdev->osif_gro_flush(vdev->osif_vdev,
  1900. reo_ring_num);
  1901. }
  1902. }
  1903. /* Update histogram statistics by looping through pdev's */
  1904. DP_RX_HIST_STATS_PER_PDEV();
  1905. return rx_bufs_used; /* Assume no scale factor for now */
  1906. }
  1907. /**
  1908. * dp_rx_detach() - detach dp rx
  1909. * @pdev: core txrx pdev context
  1910. *
  1911. * This function will detach DP RX into main device context
  1912. * will free DP Rx resources.
  1913. *
  1914. * Return: void
  1915. */
  1916. void
  1917. dp_rx_pdev_detach(struct dp_pdev *pdev)
  1918. {
  1919. uint8_t pdev_id = pdev->pdev_id;
  1920. struct dp_soc *soc = pdev->soc;
  1921. struct rx_desc_pool *rx_desc_pool;
  1922. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  1923. if (rx_desc_pool->pool_size != 0) {
  1924. if (!dp_is_soc_reinit(soc))
  1925. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  1926. rx_desc_pool);
  1927. else
  1928. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1929. }
  1930. return;
  1931. }
  1932. static QDF_STATUS
  1933. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  1934. struct dp_pdev *dp_pdev)
  1935. {
  1936. qdf_dma_addr_t paddr;
  1937. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  1938. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  1939. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  1940. FALSE);
  1941. if (!(*nbuf)) {
  1942. dp_err("nbuf alloc failed");
  1943. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  1944. return ret;
  1945. }
  1946. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  1947. QDF_DMA_FROM_DEVICE);
  1948. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  1949. qdf_nbuf_free(*nbuf);
  1950. dp_err("nbuf map failed");
  1951. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  1952. return ret;
  1953. }
  1954. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  1955. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  1956. if (ret == QDF_STATUS_E_FAILURE) {
  1957. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  1958. QDF_DMA_FROM_DEVICE);
  1959. qdf_nbuf_free(*nbuf);
  1960. dp_err("nbuf check x86 failed");
  1961. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  1962. return ret;
  1963. }
  1964. return QDF_STATUS_SUCCESS;
  1965. }
  1966. QDF_STATUS
  1967. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  1968. struct dp_srng *dp_rxdma_srng,
  1969. struct rx_desc_pool *rx_desc_pool,
  1970. uint32_t num_req_buffers)
  1971. {
  1972. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  1973. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  1974. union dp_rx_desc_list_elem_t *next;
  1975. void *rxdma_ring_entry;
  1976. qdf_dma_addr_t paddr;
  1977. qdf_nbuf_t *rx_nbuf_arr;
  1978. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  1979. uint32_t buffer_index, nbuf_ptrs_per_page;
  1980. qdf_nbuf_t nbuf;
  1981. QDF_STATUS ret;
  1982. int page_idx, total_pages;
  1983. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1984. union dp_rx_desc_list_elem_t *tail = NULL;
  1985. if (qdf_unlikely(!rxdma_srng)) {
  1986. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  1987. return QDF_STATUS_E_FAILURE;
  1988. }
  1989. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  1990. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  1991. num_req_buffers, &desc_list, &tail);
  1992. if (!nr_descs) {
  1993. dp_err("no free rx_descs in freelist");
  1994. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  1995. return QDF_STATUS_E_NOMEM;
  1996. }
  1997. dp_debug("got %u RX descs for driver attach", nr_descs);
  1998. /*
  1999. * Try to allocate pointers to the nbuf one page at a time.
  2000. * Take pointers that can fit in one page of memory and
  2001. * iterate through the total descriptors that need to be
  2002. * allocated in order of pages. Reuse the pointers that
  2003. * have been allocated to fit in one page across each
  2004. * iteration to index into the nbuf.
  2005. */
  2006. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2007. /*
  2008. * Add an extra page to store the remainder if any
  2009. */
  2010. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2011. total_pages++;
  2012. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2013. if (!rx_nbuf_arr) {
  2014. dp_err("failed to allocate nbuf array");
  2015. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2016. QDF_BUG(0);
  2017. return QDF_STATUS_E_NOMEM;
  2018. }
  2019. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2020. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2021. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2022. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2023. /*
  2024. * The last page of buffer pointers may not be required
  2025. * completely based on the number of descriptors. Below
  2026. * check will ensure we are allocating only the
  2027. * required number of descriptors.
  2028. */
  2029. if (nr_nbuf_total >= nr_descs)
  2030. break;
  2031. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2032. &rx_nbuf_arr[nr_nbuf],
  2033. dp_pdev);
  2034. if (QDF_IS_STATUS_ERROR(ret))
  2035. break;
  2036. nr_nbuf_total++;
  2037. }
  2038. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2039. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2040. rxdma_ring_entry =
  2041. hal_srng_src_get_next(dp_soc->hal_soc,
  2042. rxdma_srng);
  2043. qdf_assert_always(rxdma_ring_entry);
  2044. next = desc_list->next;
  2045. nbuf = rx_nbuf_arr[buffer_index];
  2046. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2047. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2048. desc_list->rx_desc.in_use = 1;
  2049. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2050. desc_list->rx_desc.cookie,
  2051. rx_desc_pool->owner);
  2052. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2053. desc_list = next;
  2054. }
  2055. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2056. }
  2057. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2058. qdf_mem_free(rx_nbuf_arr);
  2059. if (!nr_nbuf_total) {
  2060. dp_err("No nbuf's allocated");
  2061. QDF_BUG(0);
  2062. return QDF_STATUS_E_RESOURCES;
  2063. }
  2064. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2065. RX_BUFFER_SIZE * nr_nbuf_total);
  2066. return QDF_STATUS_SUCCESS;
  2067. }
  2068. /**
  2069. * dp_rx_attach() - attach DP RX
  2070. * @pdev: core txrx pdev context
  2071. *
  2072. * This function will attach a DP RX instance into the main
  2073. * device (SOC) context. Will allocate dp rx resource and
  2074. * initialize resources.
  2075. *
  2076. * Return: QDF_STATUS_SUCCESS: success
  2077. * QDF_STATUS_E_RESOURCES: Error return
  2078. */
  2079. QDF_STATUS
  2080. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2081. {
  2082. uint8_t pdev_id = pdev->pdev_id;
  2083. struct dp_soc *soc = pdev->soc;
  2084. uint32_t rxdma_entries;
  2085. uint32_t rx_sw_desc_weight;
  2086. struct dp_srng *dp_rxdma_srng;
  2087. struct rx_desc_pool *rx_desc_pool;
  2088. QDF_STATUS ret_val;
  2089. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2090. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2091. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2092. return QDF_STATUS_SUCCESS;
  2093. }
  2094. pdev = soc->pdev_list[pdev_id];
  2095. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2096. rxdma_entries = dp_rxdma_srng->num_entries;
  2097. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2098. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2099. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2100. dp_rx_desc_pool_alloc(soc, pdev_id,
  2101. rx_sw_desc_weight * rxdma_entries,
  2102. rx_desc_pool);
  2103. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2104. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2105. ret_val = dp_rx_fst_attach(soc, pdev);
  2106. if ((ret_val != QDF_STATUS_SUCCESS) &&
  2107. (ret_val != QDF_STATUS_E_NOSUPPORT)) {
  2108. QDF_TRACE(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_ERROR,
  2109. "RX Flow Search Table attach failed: pdev %d err %d",
  2110. pdev_id, ret_val);
  2111. return ret_val;
  2112. }
  2113. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2114. rx_desc_pool, rxdma_entries - 1);
  2115. }
  2116. /*
  2117. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2118. * @soc: core txrx main context
  2119. * @pdev: core txrx pdev context
  2120. *
  2121. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2122. * until retry times reaches max threshold or succeeded.
  2123. *
  2124. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2125. */
  2126. qdf_nbuf_t
  2127. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2128. {
  2129. uint8_t *buf;
  2130. int32_t nbuf_retry_count;
  2131. QDF_STATUS ret;
  2132. qdf_nbuf_t nbuf = NULL;
  2133. for (nbuf_retry_count = 0; nbuf_retry_count <
  2134. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2135. nbuf_retry_count++) {
  2136. /* Allocate a new skb */
  2137. nbuf = qdf_nbuf_alloc(soc->osdev,
  2138. RX_BUFFER_SIZE,
  2139. RX_BUFFER_RESERVATION,
  2140. RX_BUFFER_ALIGNMENT,
  2141. FALSE);
  2142. if (!nbuf) {
  2143. DP_STATS_INC(pdev,
  2144. replenish.nbuf_alloc_fail, 1);
  2145. continue;
  2146. }
  2147. buf = qdf_nbuf_data(nbuf);
  2148. memset(buf, 0, RX_BUFFER_SIZE);
  2149. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2150. QDF_DMA_FROM_DEVICE);
  2151. /* nbuf map failed */
  2152. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2153. qdf_nbuf_free(nbuf);
  2154. DP_STATS_INC(pdev, replenish.map_err, 1);
  2155. continue;
  2156. }
  2157. /* qdf_nbuf alloc and map succeeded */
  2158. break;
  2159. }
  2160. /* qdf_nbuf still alloc or map failed */
  2161. if (qdf_unlikely(nbuf_retry_count >=
  2162. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2163. return NULL;
  2164. return nbuf;
  2165. }