dp_rx.h 21 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _DP_RX_H
  19. #define _DP_RX_H
  20. #include "hal_rx.h"
  21. #include "dp_tx.h"
  22. #include "dp_peer.h"
  23. #include "dp_internal.h"
  24. #ifdef RXDMA_OPTIMIZATION
  25. #define RX_BUFFER_ALIGNMENT 128
  26. #else /* RXDMA_OPTIMIZATION */
  27. #define RX_BUFFER_ALIGNMENT 4
  28. #endif /* RXDMA_OPTIMIZATION */
  29. #ifdef QCA_HOST2FW_RXBUF_RING
  30. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW1_BM
  31. #else
  32. #define DP_WBM2SW_RBM HAL_RX_BUF_RBM_SW3_BM
  33. #endif
  34. #define RX_BUFFER_SIZE 2048
  35. #define RX_BUFFER_RESERVATION 0
  36. #define DP_PEER_METADATA_PEER_ID_MASK 0x0000ffff
  37. #define DP_PEER_METADATA_PEER_ID_SHIFT 0
  38. #define DP_PEER_METADATA_VDEV_ID_MASK 0x00070000
  39. #define DP_PEER_METADATA_VDEV_ID_SHIFT 16
  40. #define DP_PEER_METADATA_PEER_ID_GET(_peer_metadata) \
  41. (((_peer_metadata) & DP_PEER_METADATA_PEER_ID_MASK) \
  42. >> DP_PEER_METADATA_PEER_ID_SHIFT)
  43. #define DP_PEER_METADATA_ID_GET(_peer_metadata) \
  44. (((_peer_metadata) & DP_PEER_METADATA_VDEV_ID_MASK) \
  45. >> DP_PEER_METADATA_VDEV_ID_SHIFT)
  46. #define DP_RX_DESC_MAGIC 0xdec0de
  47. /**
  48. * struct dp_rx_desc
  49. *
  50. * @nbuf : VA of the "skb" posted
  51. * @rx_buf_start : VA of the original Rx buffer, before
  52. * movement of any skb->data pointer
  53. * @cookie : index into the sw array which holds
  54. * the sw Rx descriptors
  55. * Cookie space is 21 bits:
  56. * lower 18 bits -- index
  57. * upper 3 bits -- pool_id
  58. * @pool_id : pool Id for which this allocated.
  59. * Can only be used if there is no flow
  60. * steering
  61. * @in_use rx_desc is in use
  62. * @unmapped used to mark rx_desc an unmapped if the corresponding
  63. * nbuf is already unmapped
  64. */
  65. struct dp_rx_desc {
  66. qdf_nbuf_t nbuf;
  67. uint8_t *rx_buf_start;
  68. uint32_t cookie;
  69. uint8_t pool_id;
  70. #ifdef RX_DESC_DEBUG_CHECK
  71. uint32_t magic;
  72. #endif
  73. uint8_t in_use:1,
  74. unmapped:1;
  75. };
  76. #define RX_DESC_COOKIE_INDEX_SHIFT 0
  77. #define RX_DESC_COOKIE_INDEX_MASK 0x3ffff /* 18 bits */
  78. #define RX_DESC_COOKIE_POOL_ID_SHIFT 18
  79. #define RX_DESC_COOKIE_POOL_ID_MASK 0x1c0000
  80. #define DP_RX_DESC_COOKIE_POOL_ID_GET(_cookie) \
  81. (((_cookie) & RX_DESC_COOKIE_POOL_ID_MASK) >> \
  82. RX_DESC_COOKIE_POOL_ID_SHIFT)
  83. #define DP_RX_DESC_COOKIE_INDEX_GET(_cookie) \
  84. (((_cookie) & RX_DESC_COOKIE_INDEX_MASK) >> \
  85. RX_DESC_COOKIE_INDEX_SHIFT)
  86. /*
  87. *dp_rx_xor_block() - xor block of data
  88. *@b: destination data block
  89. *@a: source data block
  90. *@len: length of the data to process
  91. *
  92. *Returns: None
  93. */
  94. static inline void dp_rx_xor_block(uint8_t *b, const uint8_t *a, qdf_size_t len)
  95. {
  96. qdf_size_t i;
  97. for (i = 0; i < len; i++)
  98. b[i] ^= a[i];
  99. }
  100. /*
  101. *dp_rx_rotl() - rotate the bits left
  102. *@val: unsigned integer input value
  103. *@bits: number of bits
  104. *
  105. *Returns: Integer with left rotated by number of 'bits'
  106. */
  107. static inline uint32_t dp_rx_rotl(uint32_t val, int bits)
  108. {
  109. return (val << bits) | (val >> (32 - bits));
  110. }
  111. /*
  112. *dp_rx_rotr() - rotate the bits right
  113. *@val: unsigned integer input value
  114. *@bits: number of bits
  115. *
  116. *Returns: Integer with right rotated by number of 'bits'
  117. */
  118. static inline uint32_t dp_rx_rotr(uint32_t val, int bits)
  119. {
  120. return (val >> bits) | (val << (32 - bits));
  121. }
  122. /*
  123. * dp_set_rx_queue() - set queue_mapping in skb
  124. * @nbuf: skb
  125. * @queue_id: rx queue_id
  126. *
  127. * Return: void
  128. */
  129. #ifdef QCA_OL_RX_MULTIQ_SUPPORT
  130. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  131. {
  132. qdf_nbuf_record_rx_queue(nbuf, queue_id);
  133. return;
  134. }
  135. #else
  136. static inline void dp_set_rx_queue(qdf_nbuf_t nbuf, uint8_t queue_id)
  137. {
  138. }
  139. #endif
  140. /*
  141. *dp_rx_xswap() - swap the bits left
  142. *@val: unsigned integer input value
  143. *
  144. *Returns: Integer with bits swapped
  145. */
  146. static inline uint32_t dp_rx_xswap(uint32_t val)
  147. {
  148. return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8);
  149. }
  150. /*
  151. *dp_rx_get_le32_split() - get little endian 32 bits split
  152. *@b0: byte 0
  153. *@b1: byte 1
  154. *@b2: byte 2
  155. *@b3: byte 3
  156. *
  157. *Returns: Integer with split little endian 32 bits
  158. */
  159. static inline uint32_t dp_rx_get_le32_split(uint8_t b0, uint8_t b1, uint8_t b2,
  160. uint8_t b3)
  161. {
  162. return b0 | (b1 << 8) | (b2 << 16) | (b3 << 24);
  163. }
  164. /*
  165. *dp_rx_get_le32() - get little endian 32 bits
  166. *@b0: byte 0
  167. *@b1: byte 1
  168. *@b2: byte 2
  169. *@b3: byte 3
  170. *
  171. *Returns: Integer with little endian 32 bits
  172. */
  173. static inline uint32_t dp_rx_get_le32(const uint8_t *p)
  174. {
  175. return dp_rx_get_le32_split(p[0], p[1], p[2], p[3]);
  176. }
  177. /*
  178. * dp_rx_put_le32() - put little endian 32 bits
  179. * @p: destination char array
  180. * @v: source 32-bit integer
  181. *
  182. * Returns: None
  183. */
  184. static inline void dp_rx_put_le32(uint8_t *p, uint32_t v)
  185. {
  186. p[0] = (v) & 0xff;
  187. p[1] = (v >> 8) & 0xff;
  188. p[2] = (v >> 16) & 0xff;
  189. p[3] = (v >> 24) & 0xff;
  190. }
  191. /* Extract michal mic block of data */
  192. #define dp_rx_michael_block(l, r) \
  193. do { \
  194. r ^= dp_rx_rotl(l, 17); \
  195. l += r; \
  196. r ^= dp_rx_xswap(l); \
  197. l += r; \
  198. r ^= dp_rx_rotl(l, 3); \
  199. l += r; \
  200. r ^= dp_rx_rotr(l, 2); \
  201. l += r; \
  202. } while (0)
  203. /**
  204. * struct dp_rx_desc_list_elem_t
  205. *
  206. * @next : Next pointer to form free list
  207. * @rx_desc : DP Rx descriptor
  208. */
  209. union dp_rx_desc_list_elem_t {
  210. union dp_rx_desc_list_elem_t *next;
  211. struct dp_rx_desc rx_desc;
  212. };
  213. /**
  214. * dp_rx_cookie_2_va_rxdma_buf() - Converts cookie to a virtual address of
  215. * the Rx descriptor on Rx DMA source ring buffer
  216. * @soc: core txrx main context
  217. * @cookie: cookie used to lookup virtual address
  218. *
  219. * Return: void *: Virtual Address of the Rx descriptor
  220. */
  221. static inline
  222. void *dp_rx_cookie_2_va_rxdma_buf(struct dp_soc *soc, uint32_t cookie)
  223. {
  224. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  225. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  226. struct rx_desc_pool *rx_desc_pool;
  227. if (qdf_unlikely(pool_id >= MAX_RXDESC_POOLS))
  228. return NULL;
  229. rx_desc_pool = &soc->rx_desc_buf[pool_id];
  230. if (qdf_unlikely(index >= rx_desc_pool->pool_size))
  231. return NULL;
  232. return &(soc->rx_desc_buf[pool_id].array[index].rx_desc);
  233. }
  234. /**
  235. * dp_rx_cookie_2_va_mon_buf() - Converts cookie to a virtual address of
  236. * the Rx descriptor on monitor ring buffer
  237. * @soc: core txrx main context
  238. * @cookie: cookie used to lookup virtual address
  239. *
  240. * Return: void *: Virtual Address of the Rx descriptor
  241. */
  242. static inline
  243. void *dp_rx_cookie_2_va_mon_buf(struct dp_soc *soc, uint32_t cookie)
  244. {
  245. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  246. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  247. /* TODO */
  248. /* Add sanity for pool_id & index */
  249. return &(soc->rx_desc_mon[pool_id].array[index].rx_desc);
  250. }
  251. /**
  252. * dp_rx_cookie_2_va_mon_status() - Converts cookie to a virtual address of
  253. * the Rx descriptor on monitor status ring buffer
  254. * @soc: core txrx main context
  255. * @cookie: cookie used to lookup virtual address
  256. *
  257. * Return: void *: Virtual Address of the Rx descriptor
  258. */
  259. static inline
  260. void *dp_rx_cookie_2_va_mon_status(struct dp_soc *soc, uint32_t cookie)
  261. {
  262. uint8_t pool_id = DP_RX_DESC_COOKIE_POOL_ID_GET(cookie);
  263. uint16_t index = DP_RX_DESC_COOKIE_INDEX_GET(cookie);
  264. /* TODO */
  265. /* Add sanity for pool_id & index */
  266. return &(soc->rx_desc_status[pool_id].array[index].rx_desc);
  267. }
  268. void dp_rx_add_desc_list_to_free_list(struct dp_soc *soc,
  269. union dp_rx_desc_list_elem_t **local_desc_list,
  270. union dp_rx_desc_list_elem_t **tail,
  271. uint16_t pool_id,
  272. struct rx_desc_pool *rx_desc_pool);
  273. uint16_t dp_rx_get_free_desc_list(struct dp_soc *soc, uint32_t pool_id,
  274. struct rx_desc_pool *rx_desc_pool,
  275. uint16_t num_descs,
  276. union dp_rx_desc_list_elem_t **desc_list,
  277. union dp_rx_desc_list_elem_t **tail);
  278. QDF_STATUS dp_rx_pdev_attach(struct dp_pdev *pdev);
  279. void dp_rx_pdev_detach(struct dp_pdev *pdev);
  280. uint32_t
  281. dp_rx_process(struct dp_intr *int_ctx, void *hal_ring, uint32_t quota);
  282. uint32_t dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  283. uint32_t
  284. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota);
  285. /**
  286. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  287. * multiple nbufs.
  288. * @nbuf: pointer to the first msdu of an amsdu.
  289. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  290. *
  291. * This function implements the creation of RX frag_list for cases
  292. * where an MSDU is spread across multiple nbufs.
  293. *
  294. * Return: returns the head nbuf which contains complete frag_list.
  295. */
  296. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  297. QDF_STATUS dp_rx_desc_pool_alloc(struct dp_soc *soc,
  298. uint32_t pool_id,
  299. uint32_t pool_size,
  300. struct rx_desc_pool *rx_desc_pool);
  301. void dp_rx_desc_pool_free(struct dp_soc *soc,
  302. uint32_t pool_id,
  303. struct rx_desc_pool *rx_desc_pool);
  304. void dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  305. struct dp_peer *peer);
  306. /**
  307. * dp_rx_add_to_free_desc_list() - Adds to a local free descriptor list
  308. *
  309. * @head: pointer to the head of local free list
  310. * @tail: pointer to the tail of local free list
  311. * @new: new descriptor that is added to the free list
  312. *
  313. * Return: void:
  314. */
  315. static inline
  316. void dp_rx_add_to_free_desc_list(union dp_rx_desc_list_elem_t **head,
  317. union dp_rx_desc_list_elem_t **tail,
  318. struct dp_rx_desc *new)
  319. {
  320. qdf_assert(head && new);
  321. new->nbuf = NULL;
  322. new->in_use = 0;
  323. new->unmapped = 0;
  324. ((union dp_rx_desc_list_elem_t *)new)->next = *head;
  325. *head = (union dp_rx_desc_list_elem_t *)new;
  326. if (*tail == NULL)
  327. *tail = *head;
  328. }
  329. /**
  330. * dp_rx_wds_srcport_learn() - Add or update the STA PEER which
  331. * is behind the WDS repeater.
  332. *
  333. * @soc: core txrx main context
  334. * @rx_tlv_hdr: base address of RX TLV header
  335. * @ta_peer: WDS repeater peer
  336. * @nbuf: rx pkt
  337. *
  338. * Return: void:
  339. */
  340. #ifdef FEATURE_WDS
  341. static inline void
  342. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  343. uint8_t *rx_tlv_hdr,
  344. struct dp_peer *ta_peer,
  345. qdf_nbuf_t nbuf)
  346. {
  347. uint16_t sa_sw_peer_id = hal_rx_msdu_end_sa_sw_peer_id_get(rx_tlv_hdr);
  348. uint32_t flags = IEEE80211_NODE_F_WDS_HM;
  349. uint32_t ret = 0;
  350. uint8_t wds_src_mac[IEEE80211_ADDR_LEN];
  351. struct dp_ast_entry *ast;
  352. uint16_t sa_idx;
  353. /* Do wds source port learning only if it is a 4-address mpdu */
  354. if (!(qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  355. hal_rx_get_mpdu_mac_ad4_valid(rx_tlv_hdr)))
  356. return;
  357. memcpy(wds_src_mac, (qdf_nbuf_data(nbuf) + IEEE80211_ADDR_LEN),
  358. IEEE80211_ADDR_LEN);
  359. if (qdf_unlikely(!hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr))) {
  360. ret = dp_peer_add_ast(soc,
  361. ta_peer,
  362. wds_src_mac,
  363. CDP_TXRX_AST_TYPE_WDS,
  364. flags);
  365. return;
  366. }
  367. /*
  368. * Get the AST entry from HW SA index and mark it as active
  369. */
  370. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  371. qdf_spin_lock_bh(&soc->ast_lock);
  372. ast = soc->ast_table[sa_idx];
  373. if (!ast) {
  374. qdf_spin_unlock_bh(&soc->ast_lock);
  375. return;
  376. }
  377. /*
  378. * Ensure we are updating the right AST entry by
  379. * validating ast_idx.
  380. * There is a possibility we might arrive here without
  381. * AST MAP event , so this check is mandatory
  382. */
  383. if (ast->ast_idx == sa_idx)
  384. ast->is_active = TRUE;
  385. /* Handle client roaming */
  386. if (sa_sw_peer_id != ta_peer->peer_ids[0])
  387. dp_peer_update_ast(soc, ta_peer, ast, flags);
  388. qdf_spin_unlock_bh(&soc->ast_lock);
  389. return;
  390. }
  391. #else
  392. static inline void
  393. dp_rx_wds_srcport_learn(struct dp_soc *soc,
  394. uint8_t *rx_tlv_hdr,
  395. struct dp_peer *ta_peer,
  396. qdf_nbuf_t nbuf)
  397. {
  398. }
  399. #endif
  400. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t nbuf);
  401. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  402. qdf_nbuf_t mpdu, bool mpdu_done);
  403. void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr);
  404. #define DP_RX_LIST_APPEND(head, tail, elem) \
  405. do { \
  406. if (!(head)) { \
  407. (head) = (elem); \
  408. } else { \
  409. qdf_nbuf_set_next((tail), (elem)); \
  410. } \
  411. (tail) = (elem); \
  412. qdf_nbuf_set_next((tail), NULL); \
  413. } while (0)
  414. #ifndef BUILD_X86
  415. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  416. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  417. {
  418. return QDF_STATUS_SUCCESS;
  419. }
  420. #else
  421. #define MAX_RETRY 100
  422. static inline int check_x86_paddr(struct dp_soc *dp_soc, qdf_nbuf_t *rx_netbuf,
  423. qdf_dma_addr_t *paddr, struct dp_pdev *pdev)
  424. {
  425. uint32_t nbuf_retry = 0;
  426. int32_t ret;
  427. const uint32_t x86_phy_addr = 0x50000000;
  428. /*
  429. * in M2M emulation platforms (x86) the memory below 0x50000000
  430. * is reserved for target use, so any memory allocated in this
  431. * region should not be used by host
  432. */
  433. do {
  434. if (qdf_likely(*paddr > x86_phy_addr))
  435. return QDF_STATUS_SUCCESS;
  436. else {
  437. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  438. "phy addr %pK exceeded 0x50000000 trying again\n",
  439. paddr);
  440. nbuf_retry++;
  441. if ((*rx_netbuf)) {
  442. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  443. QDF_DMA_BIDIRECTIONAL);
  444. /* Not freeing buffer intentionally.
  445. * Observed that same buffer is getting
  446. * re-allocated resulting in longer load time
  447. * WMI init timeout.
  448. * This buffer is anyway not useful so skip it.
  449. **/
  450. }
  451. *rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  452. RX_BUFFER_SIZE,
  453. RX_BUFFER_RESERVATION,
  454. RX_BUFFER_ALIGNMENT,
  455. FALSE);
  456. if (qdf_unlikely(!(*rx_netbuf)))
  457. return QDF_STATUS_E_FAILURE;
  458. ret = qdf_nbuf_map_single(dp_soc->osdev, *rx_netbuf,
  459. QDF_DMA_BIDIRECTIONAL);
  460. if (qdf_unlikely(ret == QDF_STATUS_E_FAILURE)) {
  461. qdf_nbuf_free(*rx_netbuf);
  462. *rx_netbuf = NULL;
  463. continue;
  464. }
  465. *paddr = qdf_nbuf_get_frag_paddr(*rx_netbuf, 0);
  466. }
  467. } while (nbuf_retry < MAX_RETRY);
  468. if ((*rx_netbuf)) {
  469. qdf_nbuf_unmap_single(dp_soc->osdev, *rx_netbuf,
  470. QDF_DMA_BIDIRECTIONAL);
  471. qdf_nbuf_free(*rx_netbuf);
  472. }
  473. return QDF_STATUS_E_FAILURE;
  474. }
  475. #endif
  476. /**
  477. * dp_rx_cookie_2_link_desc_va() - Converts cookie to a virtual address of
  478. * the MSDU Link Descriptor
  479. * @soc: core txrx main context
  480. * @buf_info: buf_info include cookie that used to lookup virtual address of
  481. * link descriptor Normally this is just an index into a per SOC array.
  482. *
  483. * This is the VA of the link descriptor, that HAL layer later uses to
  484. * retrieve the list of MSDU's for a given MPDU.
  485. *
  486. * Return: void *: Virtual Address of the Rx descriptor
  487. */
  488. static inline
  489. void *dp_rx_cookie_2_link_desc_va(struct dp_soc *soc,
  490. struct hal_buf_info *buf_info)
  491. {
  492. void *link_desc_va;
  493. uint32_t bank_id = LINK_DESC_COOKIE_BANK_ID(buf_info->sw_cookie);
  494. /* TODO */
  495. /* Add sanity for cookie */
  496. link_desc_va = soc->link_desc_banks[bank_id].base_vaddr +
  497. (buf_info->paddr -
  498. soc->link_desc_banks[bank_id].base_paddr);
  499. return link_desc_va;
  500. }
  501. /**
  502. * dp_rx_cookie_2_mon_link_desc_va() - Converts cookie to a virtual address of
  503. * the MSDU Link Descriptor
  504. * @pdev: core txrx pdev context
  505. * @buf_info: buf_info includes cookie that used to lookup virtual address of
  506. * link descriptor. Normally this is just an index into a per pdev array.
  507. *
  508. * This is the VA of the link descriptor in monitor mode destination ring,
  509. * that HAL layer later uses to retrieve the list of MSDU's for a given MPDU.
  510. *
  511. * Return: void *: Virtual Address of the Rx descriptor
  512. */
  513. static inline
  514. void *dp_rx_cookie_2_mon_link_desc_va(struct dp_pdev *pdev,
  515. struct hal_buf_info *buf_info,
  516. int mac_id)
  517. {
  518. void *link_desc_va;
  519. int mac_for_pdev = dp_get_mac_id_for_mac(pdev->soc, mac_id);
  520. /* TODO */
  521. /* Add sanity for cookie */
  522. link_desc_va =
  523. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_vaddr +
  524. (buf_info->paddr -
  525. pdev->link_desc_banks[mac_for_pdev][buf_info->sw_cookie].base_paddr);
  526. return link_desc_va;
  527. }
  528. /**
  529. * dp_rx_defrag_concat() - Concatenate the fragments
  530. *
  531. * @dst: destination pointer to the buffer
  532. * @src: source pointer from where the fragment payload is to be copied
  533. *
  534. * Return: QDF_STATUS
  535. */
  536. static inline QDF_STATUS dp_rx_defrag_concat(qdf_nbuf_t dst, qdf_nbuf_t src)
  537. {
  538. /*
  539. * Inside qdf_nbuf_cat, if it is necessary to reallocate dst
  540. * to provide space for src, the headroom portion is copied from
  541. * the original dst buffer to the larger new dst buffer.
  542. * (This is needed, because the headroom of the dst buffer
  543. * contains the rx desc.)
  544. */
  545. if (qdf_nbuf_cat(dst, src))
  546. return QDF_STATUS_E_DEFRAG_ERROR;
  547. return QDF_STATUS_SUCCESS;
  548. }
  549. /*
  550. * dp_rx_ast_set_active() - set the active flag of the astentry
  551. * corresponding to a hw index.
  552. * @soc: core txrx main context
  553. * @sa_idx: hw idx
  554. * @is_active: active flag
  555. *
  556. */
  557. #ifdef FEATURE_WDS
  558. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  559. {
  560. struct dp_ast_entry *ast;
  561. qdf_spin_lock_bh(&soc->ast_lock);
  562. ast = soc->ast_table[sa_idx];
  563. /*
  564. * Ensure we are updating the right AST entry by
  565. * validating ast_idx.
  566. * There is a possibility we might arrive here without
  567. * AST MAP event , so this check is mandatory
  568. */
  569. if (ast && (ast->ast_idx == sa_idx)) {
  570. ast->is_active = is_active;
  571. qdf_spin_unlock_bh(&soc->ast_lock);
  572. return QDF_STATUS_SUCCESS;
  573. }
  574. qdf_spin_unlock_bh(&soc->ast_lock);
  575. return QDF_STATUS_E_FAILURE;
  576. }
  577. #else
  578. static inline QDF_STATUS dp_rx_ast_set_active(struct dp_soc *soc, uint16_t sa_idx, bool is_active)
  579. {
  580. return QDF_STATUS_SUCCESS;
  581. }
  582. #endif
  583. /*
  584. * check_qwrap_multicast_loopback() - Check if rx packet is a loopback packet.
  585. * In qwrap mode, packets originated from
  586. * any vdev should not loopback and
  587. * should be dropped.
  588. * @vdev: vdev on which rx packet is received
  589. * @nbuf: rx pkt
  590. *
  591. */
  592. #if ATH_SUPPORT_WRAP
  593. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  594. qdf_nbuf_t nbuf)
  595. {
  596. struct dp_vdev *psta_vdev;
  597. struct dp_pdev *pdev = vdev->pdev;
  598. struct dp_soc *soc = pdev->soc;
  599. uint8_t *data = qdf_nbuf_data(nbuf);
  600. uint8_t i;
  601. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  602. pdev = soc->pdev_list[i];
  603. if (qdf_unlikely(vdev->proxysta_vdev)) {
  604. /* In qwrap isolation mode, allow loopback packets as all
  605. * packets go to RootAP and Loopback on the mpsta.
  606. */
  607. if (vdev->isolation_vdev)
  608. return false;
  609. TAILQ_FOREACH(psta_vdev, &pdev->vdev_list, vdev_list_elem) {
  610. if (qdf_unlikely(psta_vdev->proxysta_vdev &&
  611. !qdf_mem_cmp(psta_vdev->mac_addr.raw,
  612. &data[DP_MAC_ADDR_LEN], DP_MAC_ADDR_LEN))) {
  613. /* Drop packet if source address is equal to
  614. * any of the vdev addresses.
  615. */
  616. return true;
  617. }
  618. }
  619. }
  620. }
  621. return false;
  622. }
  623. #else
  624. static inline bool check_qwrap_multicast_loopback(struct dp_vdev *vdev,
  625. qdf_nbuf_t nbuf)
  626. {
  627. return false;
  628. }
  629. #endif
  630. /*
  631. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  632. * called during dp rx initialization
  633. * and at the end of dp_rx_process.
  634. *
  635. * @soc: core txrx main context
  636. * @mac_id: mac_id which is one of 3 mac_ids
  637. * @dp_rxdma_srng: dp rxdma circular ring
  638. * @rx_desc_pool: Pointer to free Rx descriptor pool
  639. * @num_req_buffers: number of buffer to be replenished
  640. * @desc_list: list of descs if called from dp_rx_process
  641. * or NULL during dp rx initialization or out of buffer
  642. * interrupt.
  643. * @tail: tail of descs list
  644. * Return: return success or failure
  645. */
  646. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  647. struct dp_srng *dp_rxdma_srng,
  648. struct rx_desc_pool *rx_desc_pool,
  649. uint32_t num_req_buffers,
  650. union dp_rx_desc_list_elem_t **desc_list,
  651. union dp_rx_desc_list_elem_t **tail);
  652. /**
  653. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  654. * (WBM), following error handling
  655. *
  656. * @soc: core DP main context
  657. * @buf_addr_info: opaque pointer to the REO error ring descriptor
  658. * @buf_addr_info: void pointer to the buffer_addr_info
  659. * @bm_action: put to idle_list or release to msdu_list
  660. * Return: QDF_STATUS
  661. */
  662. QDF_STATUS
  663. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action);
  664. QDF_STATUS
  665. dp_rx_link_desc_buf_return(struct dp_soc *soc, struct dp_srng *dp_rxdma_srng,
  666. void *buf_addr_info, uint8_t bm_action);
  667. /**
  668. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  669. * (WBM) by address
  670. *
  671. * @soc: core DP main context
  672. * @link_desc_addr: link descriptor addr
  673. *
  674. * Return: QDF_STATUS
  675. */
  676. QDF_STATUS
  677. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  678. uint8_t bm_action);
  679. uint32_t
  680. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id,
  681. uint32_t quota);
  682. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  683. uint8_t *rx_tlv_hdr, struct dp_peer *peer);
  684. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  685. uint8_t *rx_tlv_hdr);
  686. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr, struct dp_vdev *vdev,
  687. struct dp_peer *peer, int rx_mcast);
  688. qdf_nbuf_t
  689. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev);
  690. #endif /* _DP_RX_H */