
Kernel audio drivers can be categorised into below folders. asoc - ALSA based drivers, asoc/codecs - codec drivers, ipc - APR IPC communication drivers, dsp - DSP low level drivers/Audio ION/ADSP Loader, dsp/codecs - Native encoders and decoders, soc - SoC based drivers(pinctrl/regmap/soundwire) Restructure drivers to above folder format. Include directories also follow above format. Change-Id: I8fa0857baaacd47db126fb5c1f1f5ed7e886dbc0 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
627 строки
15 KiB
C
627 строки
15 KiB
C
/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include "../../../drivers/clk/qcom/common.h"
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <dt-bindings/clock/qcom,audio-ext-clk.h>
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#include <dsp/q6afe-v2.h>
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#include "audio-ext-clk-up.h"
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enum audio_clk_mux {
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AP_CLK2,
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LPASS_MCLK,
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LPASS_MCLK2,
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};
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struct pinctrl_info {
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struct pinctrl *pinctrl;
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struct pinctrl_state *sleep;
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struct pinctrl_state *active;
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char __iomem *base;
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};
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struct audio_ext_ap_clk {
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bool enabled;
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int gpio;
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struct clk_fixed_factor fact;
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};
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struct audio_ext_pmi_clk {
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int gpio;
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struct clk_fixed_factor fact;
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};
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struct audio_ext_ap_clk2 {
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bool enabled;
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struct pinctrl_info pnctrl_info;
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struct clk_fixed_factor fact;
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};
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struct audio_ext_lpass_mclk {
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struct pinctrl_info pnctrl_info;
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struct clk_fixed_factor fact;
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};
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static struct afe_clk_set clk2_config = {
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Q6AFE_LPASS_CLK_CONFIG_API_VERSION,
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Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR,
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Q6AFE_LPASS_IBIT_CLK_11_P2896_MHZ,
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Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
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Q6AFE_LPASS_CLK_ROOT_DEFAULT,
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0,
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};
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static struct afe_clk_set lpass_default = {
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Q6AFE_LPASS_CLK_CONFIG_API_VERSION,
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Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR,
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Q6AFE_LPASS_IBIT_CLK_11_P2896_MHZ,
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Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
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Q6AFE_LPASS_CLK_ROOT_DEFAULT,
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0,
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};
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static struct afe_clk_set lpass_mclk = {
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Q6AFE_LPASS_CLK_CONFIG_API_VERSION,
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Q6AFE_LPASS_CLK_ID_MCLK_1,
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Q6AFE_LPASS_OSR_CLK_11_P2896_MHZ,
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Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
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Q6AFE_LPASS_CLK_ROOT_DEFAULT,
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0,
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};
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static inline struct audio_ext_ap_clk *to_audio_ap_clk(struct clk_hw *hw)
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{
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return container_of(hw, struct audio_ext_ap_clk, fact.hw);
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}
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static int audio_ext_clk_prepare(struct clk_hw *hw)
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{
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struct audio_ext_ap_clk *audio_clk = to_audio_ap_clk(hw);
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pr_debug("%s: gpio: %d\n", __func__, audio_clk->gpio);
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if (gpio_is_valid(audio_clk->gpio))
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return gpio_direction_output(audio_clk->gpio, 1);
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return 0;
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}
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static void audio_ext_clk_unprepare(struct clk_hw *hw)
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{
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struct audio_ext_ap_clk *audio_clk = to_audio_ap_clk(hw);
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pr_debug("%s: gpio: %d\n", __func__, audio_clk->gpio);
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if (gpio_is_valid(audio_clk->gpio))
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gpio_direction_output(audio_clk->gpio, 0);
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}
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static inline struct audio_ext_ap_clk2 *to_audio_ap_clk2(struct clk_hw *hw)
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{
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return container_of(hw, struct audio_ext_ap_clk2, fact.hw);
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}
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static int audio_ext_clk2_prepare(struct clk_hw *hw)
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{
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struct audio_ext_ap_clk2 *audio_clk2 = to_audio_ap_clk2(hw);
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struct pinctrl_info *pnctrl_info = &audio_clk2->pnctrl_info;
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int ret;
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if (!pnctrl_info->pinctrl || !pnctrl_info->active)
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return 0;
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->active);
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if (ret) {
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pr_err("%s: active state select failed with %d\n",
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__func__, ret);
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return -EIO;
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}
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clk2_config.enable = 1;
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ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk2_config);
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if (ret < 0) {
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pr_err("%s: failed to set clock, ret = %d\n", __func__, ret);
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return -EINVAL;
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}
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return 0;
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}
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static void audio_ext_clk2_unprepare(struct clk_hw *hw)
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{
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struct audio_ext_ap_clk2 *audio_clk2 = to_audio_ap_clk2(hw);
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struct pinctrl_info *pnctrl_info = &audio_clk2->pnctrl_info;
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int ret;
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if (!pnctrl_info->pinctrl || !pnctrl_info->sleep)
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return;
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->sleep);
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if (ret)
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pr_err("%s: sleep state select failed with %d\n",
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__func__, ret);
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clk2_config.enable = 0;
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ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk2_config);
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if (ret < 0)
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pr_err("%s: failed to reset clock, ret = %d\n", __func__, ret);
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}
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static inline struct audio_ext_lpass_mclk *to_audio_lpass_mclk(
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struct clk_hw *hw)
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{
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return container_of(hw, struct audio_ext_lpass_mclk, fact.hw);
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}
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static int audio_ext_lpass_mclk_prepare(struct clk_hw *hw)
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{
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struct audio_ext_lpass_mclk *audio_lpass_mclk = to_audio_lpass_mclk(hw);
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struct pinctrl_info *pnctrl_info = &audio_lpass_mclk->pnctrl_info;
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int ret;
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lpass_mclk.enable = 1;
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ret = afe_set_lpass_clock_v2(AFE_PORT_ID_PRIMARY_MI2S_RX,
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&lpass_mclk);
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if (ret < 0) {
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pr_err("%s afe_set_digital_codec_core_clock failed\n",
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__func__);
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return ret;
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}
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if (pnctrl_info->pinctrl) {
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->active);
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if (ret) {
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pr_err("%s: active state select failed with %d\n",
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__func__, ret);
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return -EIO;
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}
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}
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if (pnctrl_info->base)
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iowrite32(1, pnctrl_info->base);
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return 0;
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}
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static void audio_ext_lpass_mclk_unprepare(struct clk_hw *hw)
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{
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struct audio_ext_lpass_mclk *audio_lpass_mclk = to_audio_lpass_mclk(hw);
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struct pinctrl_info *pnctrl_info = &audio_lpass_mclk->pnctrl_info;
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int ret;
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if (pnctrl_info->pinctrl) {
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->sleep);
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if (ret) {
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pr_err("%s: active state select failed with %d\n",
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__func__, ret);
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return;
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}
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}
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lpass_mclk.enable = 0;
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ret = afe_set_lpass_clock_v2(AFE_PORT_ID_PRIMARY_MI2S_RX,
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&lpass_mclk);
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if (ret < 0)
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pr_err("%s: afe_set_digital_codec_core_clock failed, ret = %d\n",
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__func__, ret);
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if (pnctrl_info->base)
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iowrite32(0, pnctrl_info->base);
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}
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static int audio_ext_lpass_mclk2_prepare(struct clk_hw *hw)
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{
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struct audio_ext_lpass_mclk *audio_lpass_mclk2 =
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to_audio_lpass_mclk(hw);
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struct pinctrl_info *pnctrl_info = &audio_lpass_mclk2->pnctrl_info;
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int ret;
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if (pnctrl_info->pinctrl) {
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->active);
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if (ret) {
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pr_err("%s: active state select failed with %d\n",
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__func__, ret);
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return -EIO;
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}
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}
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lpass_default.enable = 1;
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ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &lpass_default);
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if (ret < 0) {
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pr_err("%s: failed to set clock, ret = %d\n", __func__, ret);
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return -EINVAL;
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}
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return 0;
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}
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static void audio_ext_lpass_mclk2_unprepare(struct clk_hw *hw)
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{
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struct audio_ext_lpass_mclk *audio_lpass_mclk2 =
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to_audio_lpass_mclk(hw);
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struct pinctrl_info *pnctrl_info = &audio_lpass_mclk2->pnctrl_info;
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int ret;
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if (pnctrl_info->pinctrl) {
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->sleep);
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if (ret)
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pr_err("%s: sleep state select failed with %d\n",
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__func__, ret);
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}
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lpass_default.enable = 0;
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ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &lpass_default);
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if (ret < 0)
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pr_err("%s: failed to reset clock, ret = %d\n", __func__, ret);
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}
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static const struct clk_ops audio_ext_ap_clk_ops = {
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.prepare = audio_ext_clk_prepare,
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.unprepare = audio_ext_clk_unprepare,
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};
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static const struct clk_ops audio_ext_ap_clk2_ops = {
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.prepare = audio_ext_clk2_prepare,
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.unprepare = audio_ext_clk2_unprepare,
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};
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static const struct clk_ops audio_ext_lpass_mclk_ops = {
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.prepare = audio_ext_lpass_mclk_prepare,
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.unprepare = audio_ext_lpass_mclk_unprepare,
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};
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static const struct clk_ops audio_ext_lpass_mclk2_ops = {
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.prepare = audio_ext_lpass_mclk2_prepare,
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.unprepare = audio_ext_lpass_mclk2_unprepare,
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};
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static struct audio_ext_pmi_clk audio_pmi_clk = {
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.gpio = -EINVAL,
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_ext_pmi_clk",
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.parent_names = (const char *[]){ "div_clk1" },
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.num_parents = 1,
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.ops = &clk_dummy_ops,
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},
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},
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};
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static struct audio_ext_pmi_clk audio_pmi_lnbb_clk = {
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.gpio = -EINVAL,
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_ext_pmi_lnbb_clk",
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.parent_names = (const char *[]){ "ln_bb_clk2" },
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.num_parents = 1,
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.ops = &clk_dummy_ops,
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},
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},
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};
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static struct audio_ext_ap_clk audio_ap_clk = {
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.gpio = -EINVAL,
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_ap_clk",
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.ops = &audio_ext_ap_clk_ops,
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},
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},
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};
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static struct audio_ext_ap_clk2 audio_ap_clk2 = {
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.enabled = false,
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.pnctrl_info = {NULL},
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_ap_clk2",
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.ops = &audio_ext_ap_clk2_ops,
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},
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},
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};
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static struct audio_ext_lpass_mclk audio_lpass_mclk = {
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.pnctrl_info = {NULL},
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_lpass_mclk",
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.ops = &audio_ext_lpass_mclk_ops,
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},
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},
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};
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static struct audio_ext_lpass_mclk audio_lpass_mclk2 = {
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.pnctrl_info = {NULL},
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.fact = {
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.mult = 1,
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.div = 1,
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.hw.init = &(struct clk_init_data){
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.name = "audio_lpass_mclk2",
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.ops = &audio_ext_lpass_mclk2_ops,
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},
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},
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};
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static struct clk_hw *audio_msm_hws[] = {
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&audio_pmi_clk.fact.hw,
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&audio_ap_clk.fact.hw,
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&audio_ap_clk2.fact.hw,
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&audio_lpass_mclk.fact.hw,
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&audio_lpass_mclk2.fact.hw,
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};
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static struct clk_hw *audio_msm_hws1[] = {
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&audio_pmi_lnbb_clk.fact.hw,
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};
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static int audio_get_pinctrl(struct platform_device *pdev,
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enum audio_clk_mux mux)
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{
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struct device *dev = &pdev->dev;
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struct pinctrl_info *pnctrl_info;
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struct pinctrl *pinctrl;
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int ret;
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u32 reg;
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switch (mux) {
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case AP_CLK2:
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pnctrl_info = &audio_ap_clk2.pnctrl_info;
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break;
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case LPASS_MCLK:
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pnctrl_info = &audio_lpass_mclk.pnctrl_info;
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break;
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case LPASS_MCLK2:
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pnctrl_info = &audio_lpass_mclk2.pnctrl_info;
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break;
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default:
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dev_err(dev, "%s Not a valid MUX ID: %d\n",
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__func__, mux);
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return -EINVAL;
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}
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if (pnctrl_info->pinctrl) {
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dev_dbg(dev, "%s: already requested before\n",
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__func__);
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return -EINVAL;
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}
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pinctrl = devm_pinctrl_get(dev);
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if (IS_ERR_OR_NULL(pinctrl)) {
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dev_dbg(dev, "%s: Unable to get pinctrl handle\n",
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__func__);
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return -EINVAL;
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}
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pnctrl_info->pinctrl = pinctrl;
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/* get all state handles from Device Tree */
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pnctrl_info->sleep = pinctrl_lookup_state(pinctrl, "sleep");
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if (IS_ERR(pnctrl_info->sleep)) {
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dev_err(dev, "%s: could not get sleep pinstate\n",
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__func__);
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goto err;
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}
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pnctrl_info->active = pinctrl_lookup_state(pinctrl, "active");
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if (IS_ERR(pnctrl_info->active)) {
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dev_err(dev, "%s: could not get active pinstate\n",
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__func__);
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goto err;
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}
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/* Reset the TLMM pins to a default state */
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ret = pinctrl_select_state(pnctrl_info->pinctrl,
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pnctrl_info->sleep);
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if (ret) {
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dev_err(dev, "%s: Disable TLMM pins failed with %d\n",
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__func__, ret);
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goto err;
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}
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ret = of_property_read_u32(dev->of_node, "qcom,mclk-clk-reg", ®);
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if (ret < 0) {
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dev_dbg(dev, "%s: miss mclk reg\n", __func__);
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} else {
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pnctrl_info->base = ioremap(reg, sizeof(u32));
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if (pnctrl_info->base == NULL) {
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dev_err(dev, "%s ioremap failed\n", __func__);
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goto err;
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}
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}
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return 0;
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err:
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devm_pinctrl_put(pnctrl_info->pinctrl);
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return -EINVAL;
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}
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static int audio_ref_clk_probe(struct platform_device *pdev)
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{
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int clk_gpio;
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int ret;
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u32 mclk_freq;
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struct clk *audio_clk;
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struct device *dev = &pdev->dev;
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int i;
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struct clk_onecell_data *clk_data;
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ret = of_property_read_u32(pdev->dev.of_node,
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"qcom,codec-mclk-clk-freq",
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&mclk_freq);
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if (!ret) {
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lpass_mclk.clk_freq_in_hz = mclk_freq;
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ret = audio_get_pinctrl(pdev, LPASS_MCLK);
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if (ret)
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dev_err(&pdev->dev, "%s: Parsing pinctrl %s failed\n",
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__func__, "LPASS_MCLK");
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ret = audio_get_pinctrl(pdev, LPASS_MCLK2);
|
|
if (ret)
|
|
dev_dbg(&pdev->dev, "%s: Parsing pinctrl %s failed\n",
|
|
__func__, "LPASS_MCLK2");
|
|
}
|
|
|
|
clk_gpio = of_get_named_gpio(pdev->dev.of_node,
|
|
"qcom,audio-ref-clk-gpio", 0);
|
|
if (clk_gpio > 0) {
|
|
ret = gpio_request(clk_gpio, "EXT_CLK");
|
|
if (ret) {
|
|
dev_err(&pdev->dev,
|
|
"Request ext clk gpio failed %d, err:%d\n",
|
|
clk_gpio, ret);
|
|
goto err;
|
|
}
|
|
if (of_property_read_bool(pdev->dev.of_node,
|
|
"qcom,node_has_rpm_clock")) {
|
|
audio_pmi_clk.gpio = clk_gpio;
|
|
} else
|
|
audio_ap_clk.gpio = clk_gpio;
|
|
|
|
}
|
|
|
|
ret = audio_get_pinctrl(pdev, AP_CLK2);
|
|
if (ret)
|
|
dev_dbg(&pdev->dev, "%s: Parsing pinctrl failed\n",
|
|
__func__);
|
|
|
|
clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
|
|
if (!clk_data)
|
|
goto err_gpio;
|
|
|
|
|
|
clk_gpio = of_get_named_gpio(pdev->dev.of_node,
|
|
"qcom,audio-ref-clk-gpio", 0);
|
|
if (clk_gpio > 0) {
|
|
clk_data->clk_num = ARRAY_SIZE(audio_msm_hws);
|
|
clk_data->clks = devm_kzalloc(&pdev->dev,
|
|
clk_data->clk_num *
|
|
sizeof(struct clk *),
|
|
GFP_KERNEL);
|
|
if (!clk_data->clks)
|
|
goto err_clk;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(audio_msm_hws); i++) {
|
|
audio_clk = devm_clk_register(dev, audio_msm_hws[i]);
|
|
if (IS_ERR(audio_clk)) {
|
|
dev_err(&pdev->dev,
|
|
"%s: ref clock: %d register failed\n",
|
|
__func__, i);
|
|
return PTR_ERR(audio_clk);
|
|
}
|
|
clk_data->clks[i] = audio_clk;
|
|
}
|
|
} else {
|
|
clk_data->clk_num = ARRAY_SIZE(audio_msm_hws1);
|
|
clk_data->clks = devm_kzalloc(&pdev->dev,
|
|
clk_data->clk_num *
|
|
sizeof(struct clk *),
|
|
GFP_KERNEL);
|
|
if (!clk_data->clks)
|
|
goto err_clk;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(audio_msm_hws1); i++) {
|
|
audio_clk = devm_clk_register(dev, audio_msm_hws1[i]);
|
|
if (IS_ERR(audio_clk)) {
|
|
dev_err(&pdev->dev,
|
|
"%s: ref clock: %d register failed\n",
|
|
__func__, i);
|
|
return PTR_ERR(audio_clk);
|
|
}
|
|
clk_data->clks[i] = audio_clk;
|
|
}
|
|
}
|
|
|
|
ret = of_clk_add_provider(pdev->dev.of_node,
|
|
of_clk_src_onecell_get, clk_data);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "%s: audio ref clock register failed\n",
|
|
__func__);
|
|
goto err_gpio;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_clk:
|
|
if (clk_data)
|
|
devm_kfree(&pdev->dev, clk_data->clks);
|
|
devm_kfree(&pdev->dev, clk_data);
|
|
err_gpio:
|
|
gpio_free(clk_gpio);
|
|
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static int audio_ref_clk_remove(struct platform_device *pdev)
|
|
{
|
|
struct pinctrl_info *pnctrl_info = &audio_ap_clk2.pnctrl_info;
|
|
|
|
if (audio_pmi_clk.gpio > 0)
|
|
gpio_free(audio_pmi_clk.gpio);
|
|
else if (audio_ap_clk.gpio > 0)
|
|
gpio_free(audio_ap_clk.gpio);
|
|
|
|
if (pnctrl_info->pinctrl) {
|
|
devm_pinctrl_put(pnctrl_info->pinctrl);
|
|
pnctrl_info->pinctrl = NULL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id audio_ref_clk_match[] = {
|
|
{.compatible = "qcom,audio-ref-clk"},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, audio_ref_clk_match);
|
|
|
|
static struct platform_driver audio_ref_clk_driver = {
|
|
.driver = {
|
|
.name = "audio-ref-clk",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = audio_ref_clk_match,
|
|
},
|
|
.probe = audio_ref_clk_probe,
|
|
.remove = audio_ref_clk_remove,
|
|
};
|
|
|
|
int audio_ref_clk_platform_init(void)
|
|
{
|
|
return platform_driver_register(&audio_ref_clk_driver);
|
|
}
|
|
|
|
void audio_ref_clk_platform_exit(void)
|
|
{
|
|
platform_driver_unregister(&audio_ref_clk_driver);
|
|
}
|
|
|
|
MODULE_DESCRIPTION("Audio Ref Up Clock module platform driver");
|
|
MODULE_LICENSE("GPL v2");
|