q6core.c 51 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/module.h>
  7. #include <linux/platform_device.h>
  8. #include <linux/of_device.h>
  9. #include <linux/string.h>
  10. #include <linux/types.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/mutex.h>
  13. #include <linux/sched.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/kobject.h>
  17. #include <linux/delay.h>
  18. #include <dsp/q6core.h>
  19. #include <dsp/audio_cal_utils.h>
  20. #include <dsp/apr_audio-v2.h>
  21. #include <soc/snd_event.h>
  22. #include <ipc/apr.h>
  23. #include "adsp_err.h"
  24. #define TIMEOUT_MS 1000
  25. /*
  26. * AVS bring up in the modem is optimized for the new
  27. * Sub System Restart design and 100 milliseconds timeout
  28. * is sufficient to make sure the Q6 will be ready.
  29. */
  30. #define Q6_READY_TIMEOUT_MS 100
  31. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  32. #define APR_ENOTREADY 10
  33. #define MEMPOOL_ID_MASK 0xFF
  34. #define MDF_MAP_TOKEN 0xF000
  35. enum {
  36. META_CAL,
  37. CUST_TOP_CAL,
  38. CORE_MAX_CAL
  39. };
  40. enum ver_query_status {
  41. VER_QUERY_UNATTEMPTED,
  42. VER_QUERY_UNSUPPORTED,
  43. VER_QUERY_SUPPORTED
  44. };
  45. struct q6core_avcs_ver_info {
  46. enum ver_query_status status;
  47. struct avcs_fwk_ver_info *ver_info;
  48. };
  49. struct q6core_str {
  50. struct apr_svc *core_handle_q;
  51. wait_queue_head_t bus_bw_req_wait;
  52. wait_queue_head_t mdf_map_resp_wait;
  53. wait_queue_head_t cmd_req_wait;
  54. wait_queue_head_t avcs_fwk_ver_req_wait;
  55. wait_queue_head_t lpass_npa_rsc_wait;
  56. u32 lpass_npa_rsc_rsp_rcvd;
  57. u32 bus_bw_resp_received;
  58. u32 mdf_map_resp_received;
  59. enum cmd_flags {
  60. FLAG_NONE,
  61. FLAG_CMDRSP_LICENSE_RESULT
  62. } cmd_resp_received_flag;
  63. u32 avcs_fwk_ver_resp_received;
  64. struct mutex cmd_lock;
  65. struct mutex ver_lock;
  66. union {
  67. struct avcs_cmdrsp_get_license_validation_result
  68. cmdrsp_license_result;
  69. } cmd_resp_payload;
  70. u32 param;
  71. struct cal_type_data *cal_data[CORE_MAX_CAL];
  72. uint32_t mem_map_cal_handle;
  73. uint32_t mdf_mem_map_cal_handle;
  74. uint32_t npa_client_handle;
  75. int32_t adsp_status;
  76. int32_t avs_state;
  77. struct q6core_avcs_ver_info q6core_avcs_ver_info;
  78. };
  79. static struct q6core_str q6core_lcl;
  80. struct generic_get_data_ {
  81. int valid;
  82. int size_in_ints;
  83. int ints[];
  84. };
  85. static struct generic_get_data_ *generic_get_data;
  86. static DEFINE_MUTEX(kset_lock);
  87. static struct kset *audio_uevent_kset;
  88. static int q6core_init_uevent_kset(void)
  89. {
  90. int ret = 0;
  91. mutex_lock(&kset_lock);
  92. if (audio_uevent_kset)
  93. goto done;
  94. /* Create a kset under /sys/kernel/ */
  95. audio_uevent_kset = kset_create_and_add("q6audio", NULL, kernel_kobj);
  96. if (!audio_uevent_kset) {
  97. pr_err("%s: error creating uevent kernel set", __func__);
  98. ret = -EINVAL;
  99. }
  100. done:
  101. mutex_unlock(&kset_lock);
  102. return ret;
  103. }
  104. static void q6core_destroy_uevent_kset(void)
  105. {
  106. if (audio_uevent_kset) {
  107. kset_unregister(audio_uevent_kset);
  108. audio_uevent_kset = NULL;
  109. }
  110. }
  111. /**
  112. * q6core_init_uevent_data - initialize kernel object required to send uevents.
  113. *
  114. * @uevent_data: uevent data (dynamically allocated memory).
  115. * @name: name of the kernel object.
  116. *
  117. * Returns 0 on success or error otherwise.
  118. */
  119. int q6core_init_uevent_data(struct audio_uevent_data *uevent_data, char *name)
  120. {
  121. int ret = -EINVAL;
  122. if (!uevent_data || !name)
  123. return ret;
  124. ret = q6core_init_uevent_kset();
  125. if (ret)
  126. return ret;
  127. /* Set kset for kobject before initializing the kobject */
  128. uevent_data->kobj.kset = audio_uevent_kset;
  129. /* Initialize kobject and add it to kernel */
  130. ret = kobject_init_and_add(&uevent_data->kobj, &uevent_data->ktype,
  131. NULL, "%s", name);
  132. if (ret) {
  133. pr_err("%s: error initializing uevent kernel object: %d",
  134. __func__, ret);
  135. kobject_put(&uevent_data->kobj);
  136. return ret;
  137. }
  138. /* Send kobject add event to the system */
  139. kobject_uevent(&uevent_data->kobj, KOBJ_ADD);
  140. return ret;
  141. }
  142. EXPORT_SYMBOL(q6core_init_uevent_data);
  143. /**
  144. * q6core_destroy_uevent_data - destroy kernel object.
  145. *
  146. * @uevent_data: uevent data.
  147. */
  148. void q6core_destroy_uevent_data(struct audio_uevent_data *uevent_data)
  149. {
  150. if (uevent_data)
  151. kobject_put(&uevent_data->kobj);
  152. }
  153. EXPORT_SYMBOL(q6core_destroy_uevent_data);
  154. /**
  155. * q6core_send_uevent - send uevent to userspace.
  156. *
  157. * @uevent_data: uevent data.
  158. * @event: event to send.
  159. *
  160. * Returns 0 on success or error otherwise.
  161. */
  162. int q6core_send_uevent(struct audio_uevent_data *uevent_data, char *event)
  163. {
  164. char *env[] = { event, NULL };
  165. if (!event || !uevent_data)
  166. return -EINVAL;
  167. return kobject_uevent_env(&uevent_data->kobj, KOBJ_CHANGE, env);
  168. }
  169. EXPORT_SYMBOL(q6core_send_uevent);
  170. static int parse_fwk_version_info(uint32_t *payload)
  171. {
  172. size_t ver_size;
  173. int num_services;
  174. pr_debug("%s: Payload info num services %d\n",
  175. __func__, payload[4]);
  176. /*
  177. * payload1[4] is the number of services running on DSP
  178. * Based on this info, we copy the payload into core
  179. * avcs version info structure.
  180. */
  181. num_services = payload[4];
  182. if (num_services > VSS_MAX_AVCS_NUM_SERVICES) {
  183. pr_err("%s: num_services: %d greater than max services: %d\n",
  184. __func__, num_services, VSS_MAX_AVCS_NUM_SERVICES);
  185. return -EINVAL;
  186. }
  187. /*
  188. * Dynamically allocate memory for all
  189. * the services based on num_services
  190. */
  191. ver_size = sizeof(struct avcs_get_fwk_version) +
  192. num_services * sizeof(struct avs_svc_api_info);
  193. q6core_lcl.q6core_avcs_ver_info.ver_info =
  194. kzalloc(ver_size, GFP_ATOMIC);
  195. if (q6core_lcl.q6core_avcs_ver_info.ver_info == NULL)
  196. return -ENOMEM;
  197. memcpy(q6core_lcl.q6core_avcs_ver_info.ver_info, (uint8_t *) payload,
  198. ver_size);
  199. return 0;
  200. }
  201. static int32_t aprv2_core_fn_q(struct apr_client_data *data, void *priv)
  202. {
  203. uint32_t *payload1;
  204. int ret = 0;
  205. if (data == NULL) {
  206. pr_err("%s: data argument is null\n", __func__);
  207. return -EINVAL;
  208. }
  209. pr_debug("%s: core msg: payload len = %u, apr resp opcode = 0x%x\n",
  210. __func__,
  211. data->payload_size, data->opcode);
  212. switch (data->opcode) {
  213. case APR_BASIC_RSP_RESULT:{
  214. if (data->payload_size == 0) {
  215. pr_err("%s: APR_BASIC_RSP_RESULT No Payload ",
  216. __func__);
  217. return 0;
  218. }
  219. payload1 = data->payload;
  220. switch (payload1[0]) {
  221. case AVCS_CMD_SHARED_MEM_UNMAP_REGIONS:
  222. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS status[0x%x]\n",
  223. __func__, payload1[1]);
  224. /* -ADSP status to match Linux error standard */
  225. q6core_lcl.adsp_status = -payload1[1];
  226. q6core_lcl.bus_bw_resp_received = 1;
  227. wake_up(&q6core_lcl.bus_bw_req_wait);
  228. break;
  229. case AVCS_CMD_SHARED_MEM_MAP_REGIONS:
  230. pr_debug("%s: Cmd = AVCS_CMD_SHARED_MEM_MAP_REGIONS status[0x%x]\n",
  231. __func__, payload1[1]);
  232. /* -ADSP status to match Linux error standard */
  233. q6core_lcl.adsp_status = -payload1[1];
  234. q6core_lcl.bus_bw_resp_received = 1;
  235. wake_up(&q6core_lcl.bus_bw_req_wait);
  236. break;
  237. case AVCS_CMD_MAP_MDF_SHARED_MEMORY:
  238. pr_debug("%s: Cmd = AVCS_CMD_MAP_MDF_SHARED_MEMORY status[0x%x]\n",
  239. __func__, payload1[1]);
  240. /* -ADSP status to match Linux error standard */
  241. q6core_lcl.adsp_status = -payload1[1];
  242. q6core_lcl.bus_bw_resp_received = 1;
  243. wake_up(&q6core_lcl.bus_bw_req_wait);
  244. break;
  245. case AVCS_CMD_REGISTER_TOPOLOGIES:
  246. pr_debug("%s: Cmd = AVCS_CMD_REGISTER_TOPOLOGIES status[0x%x]\n",
  247. __func__, payload1[1]);
  248. /* -ADSP status to match Linux error standard */
  249. q6core_lcl.adsp_status = -payload1[1];
  250. q6core_lcl.bus_bw_resp_received = 1;
  251. wake_up(&q6core_lcl.bus_bw_req_wait);
  252. break;
  253. case AVCS_CMD_DEREGISTER_TOPOLOGIES:
  254. pr_debug("%s: Cmd = AVCS_CMD_DEREGISTER_TOPOLOGIES status[0x%x]\n",
  255. __func__, payload1[1]);
  256. q6core_lcl.bus_bw_resp_received = 1;
  257. wake_up(&q6core_lcl.bus_bw_req_wait);
  258. break;
  259. case AVCS_CMD_GET_FWK_VERSION:
  260. pr_debug("%s: Cmd = AVCS_CMD_GET_FWK_VERSION status[%s]\n",
  261. __func__, adsp_err_get_err_str(payload1[1]));
  262. /* ADSP status to match Linux error standard */
  263. q6core_lcl.adsp_status = -payload1[1];
  264. if (payload1[1] == ADSP_EUNSUPPORTED)
  265. q6core_lcl.q6core_avcs_ver_info.status =
  266. VER_QUERY_UNSUPPORTED;
  267. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  268. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  269. break;
  270. case AVCS_CMD_LOAD_TOPO_MODULES:
  271. case AVCS_CMD_UNLOAD_TOPO_MODULES:
  272. pr_debug("%s: Cmd = %s status[%s]\n",
  273. __func__,
  274. (payload1[0] == AVCS_CMD_LOAD_TOPO_MODULES) ?
  275. "AVCS_CMD_LOAD_TOPO_MODULES" :
  276. "AVCS_CMD_UNLOAD_TOPO_MODULES",
  277. adsp_err_get_err_str(payload1[1]));
  278. break;
  279. case AVCS_CMD_DESTROY_LPASS_NPA_CLIENT:
  280. case AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES:
  281. pr_debug("%s: Cmd = AVCS_CMD_CREATE_LPASS_NPA_CLIENT/AVCS_CMD_DESTROY_LPASS_NPA_CLIENT status[%s]\n",
  282. __func__, adsp_err_get_err_str(payload1[1]));
  283. /* ADSP status to match Linux error standard */
  284. q6core_lcl.adsp_status = -payload1[1];
  285. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  286. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  287. break;
  288. default:
  289. pr_err("%s: Invalid cmd rsp[0x%x][0x%x] opcode %d\n",
  290. __func__,
  291. payload1[0], payload1[1], data->opcode);
  292. break;
  293. }
  294. break;
  295. }
  296. case RESET_EVENTS:{
  297. pr_debug("%s: Reset event received in Core service\n",
  298. __func__);
  299. /*
  300. * no reset for q6core_avcs_ver_info done as
  301. * the data will not change after SSR
  302. */
  303. apr_reset(q6core_lcl.core_handle_q);
  304. q6core_lcl.core_handle_q = NULL;
  305. break;
  306. }
  307. case AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS:
  308. payload1 = data->payload;
  309. pr_debug("%s: AVCS_CMDRSP_SHARED_MEM_MAP_REGIONS handle %d\n",
  310. __func__, payload1[0]);
  311. if (data->token == MDF_MAP_TOKEN) {
  312. q6core_lcl.mdf_mem_map_cal_handle = payload1[0];
  313. q6core_lcl.mdf_map_resp_received = 1;
  314. wake_up(&q6core_lcl.mdf_map_resp_wait);
  315. } else {
  316. q6core_lcl.mem_map_cal_handle = payload1[0];
  317. q6core_lcl.bus_bw_resp_received = 1;
  318. wake_up(&q6core_lcl.bus_bw_req_wait);
  319. }
  320. break;
  321. case AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT:
  322. payload1 = data->payload;
  323. pr_debug("%s: AVCS_CMDRSP_CREATE_LPASS_NPA_CLIENT handle %d\n",
  324. __func__, payload1[1]);
  325. q6core_lcl.adsp_status = payload1[0];
  326. q6core_lcl.npa_client_handle = payload1[1];
  327. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 1;
  328. wake_up(&q6core_lcl.lpass_npa_rsc_wait);
  329. break;
  330. case AVCS_CMDRSP_ADSP_EVENT_GET_STATE:
  331. payload1 = data->payload;
  332. q6core_lcl.param = payload1[0];
  333. pr_debug("%s: Received ADSP get state response 0x%x\n",
  334. __func__, q6core_lcl.param);
  335. /* ensure .param is updated prior to .bus_bw_resp_received */
  336. wmb();
  337. q6core_lcl.bus_bw_resp_received = 1;
  338. wake_up(&q6core_lcl.bus_bw_req_wait);
  339. break;
  340. case AVCS_CMDRSP_GET_LICENSE_VALIDATION_RESULT:
  341. payload1 = data->payload;
  342. pr_debug("%s: cmd = LICENSE_VALIDATION_RESULT, result = 0x%x\n",
  343. __func__, payload1[0]);
  344. q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result
  345. = payload1[0];
  346. q6core_lcl.cmd_resp_received_flag = FLAG_CMDRSP_LICENSE_RESULT;
  347. wake_up(&q6core_lcl.cmd_req_wait);
  348. break;
  349. case AVCS_CMDRSP_GET_FWK_VERSION:
  350. pr_debug("%s: Received AVCS_CMDRSP_GET_FWK_VERSION\n",
  351. __func__);
  352. payload1 = data->payload;
  353. ret = parse_fwk_version_info(payload1);
  354. if (ret < 0) {
  355. q6core_lcl.adsp_status = ret;
  356. pr_err("%s: Failed to parse payload:%d\n",
  357. __func__, ret);
  358. } else {
  359. q6core_lcl.q6core_avcs_ver_info.status =
  360. VER_QUERY_SUPPORTED;
  361. }
  362. q6core_lcl.avcs_fwk_ver_resp_received = 1;
  363. wake_up(&q6core_lcl.avcs_fwk_ver_req_wait);
  364. break;
  365. default:
  366. pr_err("%s: Message id from adsp core svc: 0x%x\n",
  367. __func__, data->opcode);
  368. if (generic_get_data) {
  369. generic_get_data->valid = 1;
  370. generic_get_data->size_in_ints =
  371. data->payload_size/sizeof(int);
  372. pr_debug("callback size = %i\n",
  373. data->payload_size);
  374. memcpy(generic_get_data->ints, data->payload,
  375. data->payload_size);
  376. q6core_lcl.bus_bw_resp_received = 1;
  377. wake_up(&q6core_lcl.bus_bw_req_wait);
  378. break;
  379. }
  380. break;
  381. }
  382. return 0;
  383. }
  384. void ocm_core_open(void)
  385. {
  386. if (q6core_lcl.core_handle_q == NULL)
  387. q6core_lcl.core_handle_q = apr_register("ADSP", "CORE",
  388. aprv2_core_fn_q, 0xFFFFFFFF, NULL);
  389. pr_debug("%s: Open_q %pK\n", __func__, q6core_lcl.core_handle_q);
  390. if (q6core_lcl.core_handle_q == NULL)
  391. pr_err("%s: Unable to register CORE\n", __func__);
  392. }
  393. struct cal_block_data *cal_utils_get_cal_block_by_key(
  394. struct cal_type_data *cal_type, uint32_t key)
  395. {
  396. struct list_head *ptr, *next;
  397. struct cal_block_data *cal_block = NULL;
  398. struct audio_cal_info_metainfo *metainfo;
  399. list_for_each_safe(ptr, next,
  400. &cal_type->cal_blocks) {
  401. cal_block = list_entry(ptr,
  402. struct cal_block_data, list);
  403. metainfo = (struct audio_cal_info_metainfo *)
  404. cal_block->cal_info;
  405. if (metainfo->nKey != key) {
  406. pr_debug("%s: metainfo key mismatch!!! found:%x, needed:%x\n",
  407. __func__, metainfo->nKey, key);
  408. } else {
  409. pr_debug("%s: metainfo key match found", __func__);
  410. return cal_block;
  411. }
  412. }
  413. return NULL;
  414. }
  415. static int q6core_send_get_avcs_fwk_ver_cmd(void)
  416. {
  417. struct apr_hdr avcs_ver_cmd;
  418. int ret;
  419. avcs_ver_cmd.hdr_field =
  420. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD, APR_HDR_LEN(APR_HDR_SIZE),
  421. APR_PKT_VER);
  422. avcs_ver_cmd.pkt_size = sizeof(struct apr_hdr);
  423. avcs_ver_cmd.src_port = 0;
  424. avcs_ver_cmd.dest_port = 0;
  425. avcs_ver_cmd.token = 0;
  426. avcs_ver_cmd.opcode = AVCS_CMD_GET_FWK_VERSION;
  427. q6core_lcl.adsp_status = 0;
  428. q6core_lcl.avcs_fwk_ver_resp_received = 0;
  429. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  430. (uint32_t *) &avcs_ver_cmd);
  431. if (ret < 0) {
  432. pr_err("%s: failed to send apr packet, ret=%d\n", __func__,
  433. ret);
  434. goto done;
  435. }
  436. ret = wait_event_timeout(q6core_lcl.avcs_fwk_ver_req_wait,
  437. (q6core_lcl.avcs_fwk_ver_resp_received == 1),
  438. msecs_to_jiffies(TIMEOUT_MS));
  439. if (!ret) {
  440. pr_err("%s: wait_event timeout for AVCS fwk version info\n",
  441. __func__);
  442. ret = -ETIMEDOUT;
  443. goto done;
  444. }
  445. if (q6core_lcl.adsp_status < 0) {
  446. /*
  447. * adsp_err_get_err_str expects a positive value but we store
  448. * the DSP error as negative to match the Linux error standard.
  449. * Pass in the negated value so adsp_err_get_err_str returns
  450. * the correct string.
  451. */
  452. pr_err("%s: DSP returned error[%s]\n", __func__,
  453. adsp_err_get_err_str(-q6core_lcl.adsp_status));
  454. ret = adsp_err_get_lnx_err_code(q6core_lcl.adsp_status);
  455. goto done;
  456. }
  457. ret = 0;
  458. done:
  459. return ret;
  460. }
  461. int q6core_get_service_version(uint32_t service_id,
  462. struct avcs_fwk_ver_info *ver_info,
  463. size_t size)
  464. {
  465. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  466. int i;
  467. uint32_t num_services;
  468. size_t ver_size;
  469. int ret;
  470. if (ver_info == NULL) {
  471. pr_err("%s: ver_info is NULL\n", __func__);
  472. return -EINVAL;
  473. }
  474. ret = q6core_get_fwk_version_size(service_id);
  475. if (ret < 0) {
  476. pr_err("%s: Failed to get service size for service id %d with error %d\n",
  477. __func__, service_id, ret);
  478. return ret;
  479. }
  480. ver_size = ret;
  481. if (ver_size != size) {
  482. pr_err("%s: Expected size %zu and provided size %zu do not match\n",
  483. __func__, ver_size, size);
  484. return -EINVAL;
  485. }
  486. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  487. num_services = cached_ver_info->avcs_fwk_version.num_services;
  488. if (service_id == AVCS_SERVICE_ID_ALL) {
  489. memcpy(ver_info, cached_ver_info, ver_size);
  490. return 0;
  491. }
  492. ver_info->avcs_fwk_version = cached_ver_info->avcs_fwk_version;
  493. for (i = 0; i < num_services; i++) {
  494. if (cached_ver_info->services[i].service_id == service_id) {
  495. ver_info->services[0] = cached_ver_info->services[i];
  496. return 0;
  497. }
  498. }
  499. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  500. return -EINVAL;
  501. }
  502. EXPORT_SYMBOL(q6core_get_service_version);
  503. static int q6core_get_avcs_fwk_version(void)
  504. {
  505. int ret = 0;
  506. mutex_lock(&(q6core_lcl.ver_lock));
  507. pr_debug("%s: q6core_avcs_ver_info.status(%d)\n", __func__,
  508. q6core_lcl.q6core_avcs_ver_info.status);
  509. switch (q6core_lcl.q6core_avcs_ver_info.status) {
  510. case VER_QUERY_SUPPORTED:
  511. pr_debug("%s: AVCS FWK version query already attempted\n",
  512. __func__);
  513. break;
  514. case VER_QUERY_UNSUPPORTED:
  515. ret = -EOPNOTSUPP;
  516. break;
  517. case VER_QUERY_UNATTEMPTED:
  518. pr_debug("%s: Attempting AVCS FWK version query\n", __func__);
  519. if (q6core_is_adsp_ready()) {
  520. ret = q6core_send_get_avcs_fwk_ver_cmd();
  521. } else {
  522. pr_err("%s: ADSP is not ready to query version\n",
  523. __func__);
  524. ret = -ENODEV;
  525. }
  526. break;
  527. default:
  528. pr_err("%s: Invalid version query status %d\n", __func__,
  529. q6core_lcl.q6core_avcs_ver_info.status);
  530. ret = -EINVAL;
  531. break;
  532. }
  533. mutex_unlock(&(q6core_lcl.ver_lock));
  534. return ret;
  535. }
  536. size_t q6core_get_fwk_version_size(uint32_t service_id)
  537. {
  538. int ret = 0;
  539. uint32_t num_services;
  540. ret = q6core_get_avcs_fwk_version();
  541. if (ret)
  542. goto done;
  543. if (q6core_lcl.q6core_avcs_ver_info.ver_info != NULL) {
  544. num_services = q6core_lcl.q6core_avcs_ver_info.ver_info
  545. ->avcs_fwk_version.num_services;
  546. } else {
  547. pr_err("%s: ver_info is NULL\n", __func__);
  548. ret = -EINVAL;
  549. goto done;
  550. }
  551. ret = sizeof(struct avcs_get_fwk_version);
  552. if (service_id == AVCS_SERVICE_ID_ALL)
  553. ret += num_services * sizeof(struct avs_svc_api_info);
  554. else
  555. ret += sizeof(struct avs_svc_api_info);
  556. done:
  557. return ret;
  558. }
  559. EXPORT_SYMBOL(q6core_get_fwk_version_size);
  560. /**
  561. * q6core_get_avcs_version_per_service -
  562. * to get api version of a particular service
  563. *
  564. * @service_id: id of the service
  565. *
  566. * Returns valid version on success or error (negative value) on failure
  567. */
  568. int q6core_get_avcs_api_version_per_service(uint32_t service_id)
  569. {
  570. struct avcs_fwk_ver_info *cached_ver_info = NULL;
  571. int i;
  572. uint32_t num_services;
  573. int ret = 0;
  574. if (service_id == AVCS_SERVICE_ID_ALL)
  575. return -EINVAL;
  576. ret = q6core_get_avcs_fwk_version();
  577. if (ret < 0) {
  578. pr_err("%s: failure in getting AVCS version\n", __func__);
  579. return ret;
  580. }
  581. cached_ver_info = q6core_lcl.q6core_avcs_ver_info.ver_info;
  582. num_services = cached_ver_info->avcs_fwk_version.num_services;
  583. for (i = 0; i < num_services; i++) {
  584. if (cached_ver_info->services[i].service_id == service_id)
  585. return cached_ver_info->services[i].api_version;
  586. }
  587. pr_err("%s: No service matching service ID %d\n", __func__, service_id);
  588. return -EINVAL;
  589. }
  590. EXPORT_SYMBOL(q6core_get_avcs_api_version_per_service);
  591. /**
  592. * core_set_license -
  593. * command to set license for module
  594. *
  595. * @key: license key hash
  596. * @module_id: DSP Module ID
  597. *
  598. * Returns 0 on success or error on failure
  599. */
  600. int32_t core_set_license(uint32_t key, uint32_t module_id)
  601. {
  602. struct avcs_cmd_set_license *cmd_setl = NULL;
  603. struct cal_block_data *cal_block = NULL;
  604. int rc = 0, packet_size = 0;
  605. pr_debug("%s: key:0x%x, id:0x%x\n", __func__, key, module_id);
  606. mutex_lock(&(q6core_lcl.cmd_lock));
  607. if (q6core_lcl.cal_data[META_CAL] == NULL) {
  608. pr_err("%s: cal_data not initialized yet!!\n", __func__);
  609. rc = -EINVAL;
  610. goto cmd_unlock;
  611. }
  612. mutex_lock(&((q6core_lcl.cal_data[META_CAL])->lock));
  613. cal_block = cal_utils_get_cal_block_by_key(
  614. q6core_lcl.cal_data[META_CAL], key);
  615. if (cal_block == NULL ||
  616. cal_block->cal_data.kvaddr == NULL ||
  617. cal_block->cal_data.size <= 0) {
  618. pr_err("%s: Invalid cal block to send", __func__);
  619. rc = -EINVAL;
  620. goto cal_data_unlock;
  621. }
  622. packet_size = sizeof(struct avcs_cmd_set_license) +
  623. cal_block->cal_data.size;
  624. /*round up total packet_size to next 4 byte boundary*/
  625. packet_size = ((packet_size + 0x3)>>2)<<2;
  626. cmd_setl = kzalloc(packet_size, GFP_KERNEL);
  627. if (cmd_setl == NULL) {
  628. rc = -ENOMEM;
  629. goto cal_data_unlock;
  630. }
  631. ocm_core_open();
  632. if (q6core_lcl.core_handle_q == NULL) {
  633. pr_err("%s: apr registration for CORE failed\n", __func__);
  634. rc = -ENODEV;
  635. goto fail_cmd;
  636. }
  637. cmd_setl->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  638. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  639. cmd_setl->hdr.pkt_size = packet_size;
  640. cmd_setl->hdr.src_port = 0;
  641. cmd_setl->hdr.dest_port = 0;
  642. cmd_setl->hdr.token = 0;
  643. cmd_setl->hdr.opcode = AVCS_CMD_SET_LICENSE;
  644. cmd_setl->id = module_id;
  645. cmd_setl->overwrite = 1;
  646. cmd_setl->size = cal_block->cal_data.size;
  647. memcpy((uint8_t *)cmd_setl + sizeof(struct avcs_cmd_set_license),
  648. cal_block->cal_data.kvaddr,
  649. cal_block->cal_data.size);
  650. pr_info("%s: Set license opcode=0x%x, id =0x%x, size = %d\n",
  651. __func__, cmd_setl->hdr.opcode,
  652. cmd_setl->id, cmd_setl->size);
  653. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)cmd_setl);
  654. if (rc < 0)
  655. pr_err("%s: SET_LICENSE failed op[0x%x]rc[%d]\n",
  656. __func__, cmd_setl->hdr.opcode, rc);
  657. fail_cmd:
  658. kfree(cmd_setl);
  659. cal_data_unlock:
  660. mutex_unlock(&((q6core_lcl.cal_data[META_CAL])->lock));
  661. cmd_unlock:
  662. mutex_unlock(&(q6core_lcl.cmd_lock));
  663. return rc;
  664. }
  665. EXPORT_SYMBOL(core_set_license);
  666. /**
  667. * core_get_license_status -
  668. * command to retrieve license status for module
  669. *
  670. * @module_id: DSP Module ID
  671. *
  672. * Returns 0 on success or error on failure
  673. */
  674. int32_t core_get_license_status(uint32_t module_id)
  675. {
  676. struct avcs_cmd_get_license_validation_result get_lvr_cmd;
  677. int ret = 0;
  678. pr_debug("%s: module_id 0x%x", __func__, module_id);
  679. mutex_lock(&(q6core_lcl.cmd_lock));
  680. ocm_core_open();
  681. if (q6core_lcl.core_handle_q == NULL) {
  682. pr_err("%s: apr registration for CORE failed\n", __func__);
  683. ret = -ENODEV;
  684. goto fail_cmd;
  685. }
  686. get_lvr_cmd.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  687. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  688. get_lvr_cmd.hdr.pkt_size =
  689. sizeof(struct avcs_cmd_get_license_validation_result);
  690. get_lvr_cmd.hdr.src_port = 0;
  691. get_lvr_cmd.hdr.dest_port = 0;
  692. get_lvr_cmd.hdr.token = 0;
  693. get_lvr_cmd.hdr.opcode = AVCS_CMD_GET_LICENSE_VALIDATION_RESULT;
  694. get_lvr_cmd.id = module_id;
  695. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &get_lvr_cmd);
  696. if (ret < 0) {
  697. pr_err("%s: license_validation request failed, err %d\n",
  698. __func__, ret);
  699. ret = -EREMOTE;
  700. goto fail_cmd;
  701. }
  702. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  703. mutex_unlock(&(q6core_lcl.cmd_lock));
  704. ret = wait_event_timeout(q6core_lcl.cmd_req_wait,
  705. (q6core_lcl.cmd_resp_received_flag ==
  706. FLAG_CMDRSP_LICENSE_RESULT),
  707. msecs_to_jiffies(TIMEOUT_MS));
  708. mutex_lock(&(q6core_lcl.cmd_lock));
  709. if (!ret) {
  710. pr_err("%s: wait_event timeout for CMDRSP_LICENSE_RESULT\n",
  711. __func__);
  712. ret = -ETIME;
  713. goto fail_cmd;
  714. }
  715. q6core_lcl.cmd_resp_received_flag &= ~(FLAG_CMDRSP_LICENSE_RESULT);
  716. ret = q6core_lcl.cmd_resp_payload.cmdrsp_license_result.result;
  717. fail_cmd:
  718. mutex_unlock(&(q6core_lcl.cmd_lock));
  719. pr_info("%s: cmdrsp_license_result.result = 0x%x for module 0x%x\n",
  720. __func__, ret, module_id);
  721. return ret;
  722. }
  723. EXPORT_SYMBOL(core_get_license_status);
  724. /**
  725. * core_set_dolby_manufacturer_id -
  726. * command to set dolby manufacturer id
  727. *
  728. * @manufacturer_id: Dolby manufacturer id
  729. *
  730. * Returns 0 on success or error on failure
  731. */
  732. uint32_t core_set_dolby_manufacturer_id(int manufacturer_id)
  733. {
  734. struct adsp_dolby_manufacturer_id payload;
  735. int rc = 0;
  736. pr_debug("%s: manufacturer_id :%d\n", __func__, manufacturer_id);
  737. mutex_lock(&(q6core_lcl.cmd_lock));
  738. ocm_core_open();
  739. if (q6core_lcl.core_handle_q) {
  740. payload.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_EVENT,
  741. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  742. payload.hdr.pkt_size =
  743. sizeof(struct adsp_dolby_manufacturer_id);
  744. payload.hdr.src_port = 0;
  745. payload.hdr.dest_port = 0;
  746. payload.hdr.token = 0;
  747. payload.hdr.opcode = ADSP_CMD_SET_DOLBY_MANUFACTURER_ID;
  748. payload.manufacturer_id = manufacturer_id;
  749. pr_debug("%s: Send Dolby security opcode=0x%x manufacturer ID = %d\n",
  750. __func__,
  751. payload.hdr.opcode, payload.manufacturer_id);
  752. rc = apr_send_pkt(q6core_lcl.core_handle_q,
  753. (uint32_t *)&payload);
  754. if (rc < 0)
  755. pr_err("%s: SET_DOLBY_MANUFACTURER_ID failed op[0x%x]rc[%d]\n",
  756. __func__, payload.hdr.opcode, rc);
  757. }
  758. mutex_unlock(&(q6core_lcl.cmd_lock));
  759. return rc;
  760. }
  761. EXPORT_SYMBOL(core_set_dolby_manufacturer_id);
  762. int32_t q6core_load_unload_topo_modules(uint32_t topo_id,
  763. bool preload_type)
  764. {
  765. struct avcs_cmd_load_unload_topo_modules load_unload_topo_modules;
  766. int ret = 0;
  767. mutex_lock(&(q6core_lcl.cmd_lock));
  768. ocm_core_open();
  769. if (q6core_lcl.core_handle_q == NULL) {
  770. pr_err("%s: apr registration for CORE failed\n", __func__);
  771. ret = -ENODEV;
  772. goto done;
  773. }
  774. memset(&load_unload_topo_modules, 0, sizeof(load_unload_topo_modules));
  775. load_unload_topo_modules.hdr.hdr_field =
  776. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  777. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  778. load_unload_topo_modules.hdr.pkt_size =
  779. sizeof(struct avcs_cmd_load_unload_topo_modules);
  780. load_unload_topo_modules.hdr.src_port = 0;
  781. load_unload_topo_modules.hdr.dest_port = 0;
  782. load_unload_topo_modules.hdr.token = 0;
  783. if (preload_type == CORE_LOAD_TOPOLOGY)
  784. load_unload_topo_modules.hdr.opcode =
  785. AVCS_CMD_LOAD_TOPO_MODULES;
  786. else
  787. load_unload_topo_modules.hdr.opcode =
  788. AVCS_CMD_UNLOAD_TOPO_MODULES;
  789. load_unload_topo_modules.topology_id = topo_id;
  790. ret = apr_send_pkt(q6core_lcl.core_handle_q,
  791. (uint32_t *) &load_unload_topo_modules);
  792. if (ret < 0) {
  793. pr_err("%s: Load/unload topo modules failed for topology = %d ret = %d\n",
  794. __func__, topo_id, ret);
  795. ret = -EINVAL;
  796. }
  797. done:
  798. mutex_unlock(&(q6core_lcl.cmd_lock));
  799. return ret;
  800. }
  801. EXPORT_SYMBOL(q6core_load_unload_topo_modules);
  802. /**
  803. * q6core_is_adsp_ready - check adsp ready status
  804. *
  805. * Returns true if adsp is ready otherwise returns false
  806. */
  807. bool q6core_is_adsp_ready(void)
  808. {
  809. int rc = 0;
  810. bool ret = false;
  811. struct apr_hdr hdr;
  812. pr_debug("%s: enter\n", __func__);
  813. memset(&hdr, 0, sizeof(hdr));
  814. hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  815. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  816. hdr.pkt_size = APR_PKT_SIZE(APR_HDR_SIZE, 0);
  817. hdr.opcode = AVCS_CMD_ADSP_EVENT_GET_STATE;
  818. mutex_lock(&(q6core_lcl.cmd_lock));
  819. ocm_core_open();
  820. if (q6core_lcl.core_handle_q) {
  821. q6core_lcl.bus_bw_resp_received = 0;
  822. rc = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)&hdr);
  823. if (rc < 0) {
  824. pr_err("%s: Get ADSP state APR packet send event %d\n",
  825. __func__, rc);
  826. goto bail;
  827. }
  828. rc = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  829. (q6core_lcl.bus_bw_resp_received == 1),
  830. msecs_to_jiffies(Q6_READY_TIMEOUT_MS));
  831. if (rc > 0 && q6core_lcl.bus_bw_resp_received) {
  832. /* ensure to read updated param by callback thread */
  833. rmb();
  834. ret = !!q6core_lcl.param;
  835. }
  836. }
  837. bail:
  838. pr_debug("%s: leave, rc %d, adsp ready %d\n", __func__, rc, ret);
  839. mutex_unlock(&(q6core_lcl.cmd_lock));
  840. return ret;
  841. }
  842. EXPORT_SYMBOL(q6core_is_adsp_ready);
  843. int q6core_create_lpass_npa_client(uint32_t node_id, char *client_name,
  844. uint32_t *client_handle)
  845. {
  846. struct avcs_cmd_create_lpass_npa_client_t create_lpass_npa_client;
  847. struct avcs_cmd_create_lpass_npa_client_t *cmd_ptr =
  848. &create_lpass_npa_client;
  849. int ret = 0;
  850. if (!client_name) {
  851. pr_err("%s: Invalid params\n", __func__);
  852. return -EINVAL;
  853. }
  854. mutex_lock(&(q6core_lcl.cmd_lock));
  855. memset(cmd_ptr, 0, sizeof(create_lpass_npa_client));
  856. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  857. APR_HDR_LEN(APR_HDR_SIZE),
  858. APR_PKT_VER);
  859. cmd_ptr->hdr.pkt_size = sizeof(create_lpass_npa_client);
  860. cmd_ptr->hdr.src_port = 0;
  861. cmd_ptr->hdr.dest_port = 0;
  862. cmd_ptr->hdr.token = 0;
  863. cmd_ptr->hdr.opcode = AVCS_CMD_CREATE_LPASS_NPA_CLIENT;
  864. cmd_ptr->node_id = AVCS_SLEEP_ISLAND_CORE_DRIVER_NODE_ID;
  865. strlcpy(cmd_ptr->client_name, client_name,
  866. sizeof(cmd_ptr->client_name));
  867. pr_debug("%s: create lpass npa client opcode[0x%x] node id[0x%x]\n",
  868. __func__, cmd_ptr->hdr.opcode, cmd_ptr->node_id);
  869. *client_handle = 0;
  870. q6core_lcl.adsp_status = 0;
  871. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  872. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  873. if (ret < 0) {
  874. pr_err("%s: create lpass npa client failed %d\n",
  875. __func__, ret);
  876. ret = -EINVAL;
  877. goto done;
  878. }
  879. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  880. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  881. msecs_to_jiffies(TIMEOUT_MS));
  882. if (!ret) {
  883. pr_err("%s: timeout. waited for create lpass npa rsc client\n",
  884. __func__);
  885. ret = -ETIMEDOUT;
  886. goto done;
  887. } else {
  888. /* set ret to 0 as no timeout happened */
  889. ret = 0;
  890. }
  891. if (q6core_lcl.adsp_status < 0) {
  892. pr_err("%s: DSP returned error %d\n",
  893. __func__, q6core_lcl.adsp_status);
  894. ret = q6core_lcl.adsp_status;
  895. goto done;
  896. }
  897. *client_handle = q6core_lcl.npa_client_handle;
  898. pr_debug("%s: q6core_lcl.npa_client_handle %d\n", __func__,
  899. q6core_lcl.npa_client_handle);
  900. done:
  901. mutex_unlock(&q6core_lcl.cmd_lock);
  902. return ret;
  903. }
  904. EXPORT_SYMBOL(q6core_create_lpass_npa_client);
  905. int q6core_destroy_lpass_npa_client(uint32_t client_handle)
  906. {
  907. struct avcs_cmd_destroy_lpass_npa_client_t destroy_lpass_npa_client;
  908. struct avcs_cmd_destroy_lpass_npa_client_t *cmd_ptr =
  909. &destroy_lpass_npa_client;
  910. int ret = 0;
  911. mutex_lock(&(q6core_lcl.cmd_lock));
  912. memset(cmd_ptr, 0, sizeof(destroy_lpass_npa_client));
  913. cmd_ptr->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  914. APR_HDR_LEN(APR_HDR_SIZE),
  915. APR_PKT_VER);
  916. cmd_ptr->hdr.pkt_size = sizeof(destroy_lpass_npa_client);
  917. cmd_ptr->hdr.src_port = 0;
  918. cmd_ptr->hdr.dest_port = 0;
  919. cmd_ptr->hdr.token = 0;
  920. cmd_ptr->hdr.opcode = AVCS_CMD_DESTROY_LPASS_NPA_CLIENT;
  921. cmd_ptr->client_handle = client_handle;
  922. pr_debug("%s: dstry lpass npa client opcode[0x%x] client hdl[0x%x]\n",
  923. __func__, cmd_ptr->hdr.opcode, cmd_ptr->client_handle);
  924. q6core_lcl.adsp_status = 0;
  925. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  926. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  927. if (ret < 0) {
  928. pr_err("%s: destroy lpass npa client failed %d\n",
  929. __func__, ret);
  930. ret = -EINVAL;
  931. goto done;
  932. }
  933. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  934. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  935. msecs_to_jiffies(TIMEOUT_MS));
  936. if (!ret) {
  937. pr_err("%s: timeout. waited for destroy lpass npa rsc client\n",
  938. __func__);
  939. ret = -ETIMEDOUT;
  940. goto done;
  941. } else {
  942. /* set ret to 0 as no timeout happened */
  943. ret = 0;
  944. }
  945. if (q6core_lcl.adsp_status < 0) {
  946. pr_err("%s: DSP returned error %d\n",
  947. __func__, q6core_lcl.adsp_status);
  948. ret = q6core_lcl.adsp_status;
  949. }
  950. done:
  951. mutex_unlock(&q6core_lcl.cmd_lock);
  952. return ret;
  953. }
  954. EXPORT_SYMBOL(q6core_destroy_lpass_npa_client);
  955. int q6core_request_island_transition(uint32_t client_handle,
  956. uint32_t island_allow_mode)
  957. {
  958. struct avcs_sleep_node_island_transition_config_t island_tsn_cfg;
  959. struct avcs_sleep_node_island_transition_config_t *cmd_ptr =
  960. &island_tsn_cfg;
  961. int ret = 0;
  962. mutex_lock(&(q6core_lcl.cmd_lock));
  963. memset(cmd_ptr, 0, sizeof(island_tsn_cfg));
  964. cmd_ptr->req_lpass_npa_rsc.hdr.hdr_field =
  965. APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  966. APR_HDR_LEN(APR_HDR_SIZE),
  967. APR_PKT_VER);
  968. cmd_ptr->req_lpass_npa_rsc.hdr.pkt_size = sizeof(island_tsn_cfg);
  969. cmd_ptr->req_lpass_npa_rsc.hdr.src_port = 0;
  970. cmd_ptr->req_lpass_npa_rsc.hdr.dest_port = 0;
  971. cmd_ptr->req_lpass_npa_rsc.hdr.token = 0;
  972. cmd_ptr->req_lpass_npa_rsc.hdr.opcode =
  973. AVCS_CMD_REQUEST_LPASS_NPA_RESOURCES;
  974. cmd_ptr->req_lpass_npa_rsc.client_handle = client_handle;
  975. cmd_ptr->req_lpass_npa_rsc.resource_id =
  976. AVCS_SLEEP_NODE_ISLAND_TRANSITION_RESOURCE_ID;
  977. cmd_ptr->island_allow_mode = island_allow_mode;
  978. pr_debug("%s: req islnd tnsn opcode[0x%x] island_allow_mode[0x%x]\n",
  979. __func__, cmd_ptr->req_lpass_npa_rsc.hdr.opcode,
  980. cmd_ptr->island_allow_mode);
  981. q6core_lcl.adsp_status = 0;
  982. q6core_lcl.lpass_npa_rsc_rsp_rcvd = 0;
  983. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) cmd_ptr);
  984. if (ret < 0) {
  985. pr_err("%s: island tnsn cmd send failed %d\n",
  986. __func__, ret);
  987. ret = -EINVAL;
  988. goto done;
  989. }
  990. ret = wait_event_timeout(q6core_lcl.lpass_npa_rsc_wait,
  991. (q6core_lcl.lpass_npa_rsc_rsp_rcvd == 1),
  992. msecs_to_jiffies(TIMEOUT_MS));
  993. if (!ret) {
  994. pr_err("%s: timeout. waited for island lpass npa rsc req\n",
  995. __func__);
  996. ret = -ETIMEDOUT;
  997. goto done;
  998. } else {
  999. /* set ret to 0 as no timeout happened */
  1000. ret = 0;
  1001. }
  1002. if (q6core_lcl.adsp_status < 0) {
  1003. pr_err("%s: DSP returned error %d\n",
  1004. __func__, q6core_lcl.adsp_status);
  1005. ret = q6core_lcl.adsp_status;
  1006. }
  1007. done:
  1008. mutex_unlock(&q6core_lcl.cmd_lock);
  1009. return ret;
  1010. }
  1011. EXPORT_SYMBOL(q6core_request_island_transition);
  1012. int q6core_map_memory_regions(phys_addr_t *buf_add, uint32_t mempool_id,
  1013. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1014. {
  1015. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1016. struct avs_shared_map_region_payload *mregions = NULL;
  1017. void *mmap_region_cmd = NULL;
  1018. void *payload = NULL;
  1019. int ret = 0;
  1020. int i = 0;
  1021. int cmd_size = 0;
  1022. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1023. + sizeof(struct avs_shared_map_region_payload)
  1024. * bufcnt;
  1025. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1026. if (mmap_region_cmd == NULL)
  1027. return -ENOMEM;
  1028. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1029. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1030. APR_HDR_LEN(APR_HDR_SIZE),
  1031. APR_PKT_VER);
  1032. mmap_regions->hdr.pkt_size = cmd_size;
  1033. mmap_regions->hdr.src_port = 0;
  1034. mmap_regions->hdr.dest_port = 0;
  1035. mmap_regions->hdr.token = 0;
  1036. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1037. mmap_regions->mem_pool_id = mempool_id & 0x00ff;
  1038. mmap_regions->num_regions = bufcnt & 0x00ff;
  1039. mmap_regions->property_flag = 0x00;
  1040. payload = ((u8 *) mmap_region_cmd +
  1041. sizeof(struct avs_cmd_shared_mem_map_regions));
  1042. mregions = (struct avs_shared_map_region_payload *)payload;
  1043. for (i = 0; i < bufcnt; i++) {
  1044. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1045. mregions->shm_addr_msw =
  1046. msm_audio_populate_upper_32_bits(buf_add[i]);
  1047. mregions->mem_size_bytes = bufsz[i];
  1048. ++mregions;
  1049. }
  1050. pr_debug("%s: sending memory map, addr %pK, size %d, bufcnt = %d\n",
  1051. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1052. *map_handle = 0;
  1053. q6core_lcl.adsp_status = 0;
  1054. q6core_lcl.bus_bw_resp_received = 0;
  1055. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1056. mmap_regions);
  1057. if (ret < 0) {
  1058. pr_err("%s: mmap regions failed %d\n",
  1059. __func__, ret);
  1060. ret = -EINVAL;
  1061. goto done;
  1062. }
  1063. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1064. (q6core_lcl.bus_bw_resp_received == 1),
  1065. msecs_to_jiffies(TIMEOUT_MS));
  1066. if (!ret) {
  1067. pr_err("%s: timeout. waited for memory map\n", __func__);
  1068. ret = -ETIME;
  1069. goto done;
  1070. } else {
  1071. /* set ret to 0 as no timeout happened */
  1072. ret = 0;
  1073. }
  1074. if (q6core_lcl.adsp_status < 0) {
  1075. pr_err("%s: DSP returned error %d\n",
  1076. __func__, q6core_lcl.adsp_status);
  1077. ret = q6core_lcl.adsp_status;
  1078. goto done;
  1079. }
  1080. *map_handle = q6core_lcl.mem_map_cal_handle;
  1081. done:
  1082. kfree(mmap_region_cmd);
  1083. return ret;
  1084. }
  1085. /**
  1086. * q6core_map_mdf_memory_regions - for sending MDF shared memory map information
  1087. * to ADSP.
  1088. *
  1089. * @buf_add: array of buffers.
  1090. * @mempool_id: memory pool ID
  1091. * @bufsz: size of the buffer
  1092. * @bufcnt: buffers count
  1093. * @map_handle: map handle received from ADSP
  1094. */
  1095. int q6core_map_mdf_memory_regions(uint64_t *buf_add, uint32_t mempool_id,
  1096. uint32_t *bufsz, uint32_t bufcnt, uint32_t *map_handle)
  1097. {
  1098. struct avs_cmd_shared_mem_map_regions *mmap_regions = NULL;
  1099. struct avs_shared_map_region_payload *mregions = NULL;
  1100. void *mmap_region_cmd = NULL;
  1101. void *payload = NULL;
  1102. int ret = 0;
  1103. int i = 0;
  1104. int cmd_size = 0;
  1105. mutex_lock(&q6core_lcl.cmd_lock);
  1106. cmd_size = sizeof(struct avs_cmd_shared_mem_map_regions)
  1107. + sizeof(struct avs_shared_map_region_payload)
  1108. * bufcnt;
  1109. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1110. if (mmap_region_cmd == NULL)
  1111. return -ENOMEM;
  1112. mmap_regions = (struct avs_cmd_shared_mem_map_regions *)mmap_region_cmd;
  1113. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1114. APR_HDR_LEN(APR_HDR_SIZE),
  1115. APR_PKT_VER);
  1116. mmap_regions->hdr.pkt_size = cmd_size;
  1117. mmap_regions->hdr.src_port = 0;
  1118. mmap_regions->hdr.dest_port = 0;
  1119. mmap_regions->hdr.token = MDF_MAP_TOKEN;
  1120. mmap_regions->hdr.opcode = AVCS_CMD_SHARED_MEM_MAP_REGIONS;
  1121. mmap_regions->mem_pool_id = mempool_id & MEMPOOL_ID_MASK;
  1122. mmap_regions->num_regions = bufcnt & 0x00ff;
  1123. mmap_regions->property_flag = 0x00;
  1124. payload = ((u8 *) mmap_region_cmd +
  1125. sizeof(struct avs_cmd_shared_mem_map_regions));
  1126. mregions = (struct avs_shared_map_region_payload *)payload;
  1127. for (i = 0; i < bufcnt; i++) {
  1128. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1129. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1130. mregions->mem_size_bytes = bufsz[i];
  1131. ++mregions;
  1132. }
  1133. pr_debug("%s: sending MDF memory map, addr %pK, size %d, bufcnt = %d\n",
  1134. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1135. *map_handle = 0;
  1136. q6core_lcl.adsp_status = 0;
  1137. q6core_lcl.mdf_map_resp_received = 0;
  1138. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1139. mmap_regions);
  1140. if (ret < 0) {
  1141. pr_err("%s: mmap regions failed %d\n",
  1142. __func__, ret);
  1143. ret = -EINVAL;
  1144. goto done;
  1145. }
  1146. ret = wait_event_timeout(q6core_lcl.mdf_map_resp_wait,
  1147. (q6core_lcl.mdf_map_resp_received == 1),
  1148. msecs_to_jiffies(TIMEOUT_MS));
  1149. if (!ret) {
  1150. pr_err("%s: timeout. waited for memory map\n", __func__);
  1151. ret = -ETIMEDOUT;
  1152. goto done;
  1153. } else {
  1154. /* set ret to 0 as no timeout happened */
  1155. ret = 0;
  1156. }
  1157. if (q6core_lcl.adsp_status < 0) {
  1158. pr_err("%s: DSP returned error %d\n",
  1159. __func__, q6core_lcl.adsp_status);
  1160. ret = q6core_lcl.adsp_status;
  1161. goto done;
  1162. }
  1163. *map_handle = q6core_lcl.mdf_mem_map_cal_handle;
  1164. done:
  1165. kfree(mmap_region_cmd);
  1166. mutex_unlock(&q6core_lcl.cmd_lock);
  1167. return ret;
  1168. }
  1169. EXPORT_SYMBOL(q6core_map_mdf_memory_regions);
  1170. int q6core_memory_unmap_regions(uint32_t mem_map_handle)
  1171. {
  1172. struct avs_cmd_shared_mem_unmap_regions unmap_regions;
  1173. int ret = 0;
  1174. memset(&unmap_regions, 0, sizeof(unmap_regions));
  1175. unmap_regions.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1176. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1177. unmap_regions.hdr.pkt_size = sizeof(unmap_regions);
  1178. unmap_regions.hdr.src_svc = APR_SVC_ADSP_CORE;
  1179. unmap_regions.hdr.src_domain = APR_DOMAIN_APPS;
  1180. unmap_regions.hdr.src_port = 0;
  1181. unmap_regions.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1182. unmap_regions.hdr.dest_domain = APR_DOMAIN_ADSP;
  1183. unmap_regions.hdr.dest_port = 0;
  1184. unmap_regions.hdr.token = 0;
  1185. unmap_regions.hdr.opcode = AVCS_CMD_SHARED_MEM_UNMAP_REGIONS;
  1186. unmap_regions.mem_map_handle = mem_map_handle;
  1187. q6core_lcl.adsp_status = 0;
  1188. q6core_lcl.bus_bw_resp_received = 0;
  1189. pr_debug("%s: unmap regions map handle %d\n",
  1190. __func__, mem_map_handle);
  1191. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1192. &unmap_regions);
  1193. if (ret < 0) {
  1194. pr_err("%s: unmap regions failed %d\n",
  1195. __func__, ret);
  1196. ret = -EINVAL;
  1197. goto done;
  1198. }
  1199. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1200. (q6core_lcl.bus_bw_resp_received == 1),
  1201. msecs_to_jiffies(TIMEOUT_MS));
  1202. if (!ret) {
  1203. pr_err("%s: timeout. waited for memory_unmap\n",
  1204. __func__);
  1205. ret = -ETIME;
  1206. goto done;
  1207. } else {
  1208. /* set ret to 0 as no timeout happened */
  1209. ret = 0;
  1210. }
  1211. if (q6core_lcl.adsp_status < 0) {
  1212. pr_err("%s: DSP returned error %d\n",
  1213. __func__, q6core_lcl.adsp_status);
  1214. ret = q6core_lcl.adsp_status;
  1215. goto done;
  1216. }
  1217. done:
  1218. return ret;
  1219. }
  1220. int q6core_map_mdf_shared_memory(uint32_t map_handle, uint64_t *buf_add,
  1221. uint32_t proc_id, uint32_t *bufsz, uint32_t bufcnt)
  1222. {
  1223. struct avs_cmd_map_mdf_shared_memory *mmap_regions = NULL;
  1224. struct avs_shared_map_region_payload *mregions = NULL;
  1225. void *mmap_region_cmd = NULL;
  1226. void *payload = NULL;
  1227. int ret = 0;
  1228. int i = 0;
  1229. int cmd_size = 0;
  1230. cmd_size = sizeof(struct avs_cmd_map_mdf_shared_memory)
  1231. + sizeof(struct avs_shared_map_region_payload)
  1232. * bufcnt;
  1233. mmap_region_cmd = kzalloc(cmd_size, GFP_KERNEL);
  1234. if (mmap_region_cmd == NULL)
  1235. return -ENOMEM;
  1236. mmap_regions = (struct avs_cmd_map_mdf_shared_memory *)mmap_region_cmd;
  1237. mmap_regions->hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1238. APR_HDR_LEN(APR_HDR_SIZE),
  1239. APR_PKT_VER);
  1240. mmap_regions->hdr.pkt_size = cmd_size;
  1241. mmap_regions->hdr.src_port = 0;
  1242. mmap_regions->hdr.dest_port = 0;
  1243. mmap_regions->hdr.token = 0;
  1244. mmap_regions->hdr.opcode = AVCS_CMD_MAP_MDF_SHARED_MEMORY;
  1245. mmap_regions->mem_map_handle = map_handle;
  1246. mmap_regions->proc_id = proc_id & 0x00ff;
  1247. mmap_regions->num_regions = bufcnt & 0x00ff;
  1248. payload = ((u8 *) mmap_region_cmd +
  1249. sizeof(struct avs_cmd_map_mdf_shared_memory));
  1250. mregions = (struct avs_shared_map_region_payload *)payload;
  1251. for (i = 0; i < bufcnt; i++) {
  1252. mregions->shm_addr_lsw = lower_32_bits(buf_add[i]);
  1253. mregions->shm_addr_msw = upper_32_bits(buf_add[i]);
  1254. mregions->mem_size_bytes = bufsz[i];
  1255. ++mregions;
  1256. }
  1257. pr_debug("%s: sending mdf memory map, addr %pa, size %d, bufcnt = %d\n",
  1258. __func__, buf_add, bufsz[0], mmap_regions->num_regions);
  1259. q6core_lcl.adsp_status = 0;
  1260. q6core_lcl.bus_bw_resp_received = 0;
  1261. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *)
  1262. mmap_regions);
  1263. if (ret < 0) {
  1264. pr_err("%s: mdf memory map failed %d\n",
  1265. __func__, ret);
  1266. ret = -EINVAL;
  1267. goto done;
  1268. }
  1269. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1270. (q6core_lcl.bus_bw_resp_received == 1),
  1271. msecs_to_jiffies(TIMEOUT_MS));
  1272. if (!ret) {
  1273. pr_err("%s: timeout. waited for mdf memory map\n",
  1274. __func__);
  1275. ret = -ETIME;
  1276. goto done;
  1277. } else {
  1278. /* set ret to 0 as no timeout happened */
  1279. ret = 0;
  1280. }
  1281. /*
  1282. * When the remote DSP is not ready, the ADSP will validate and store
  1283. * the memory information and return APR_ENOTREADY to HLOS. The ADSP
  1284. * will map the memory with remote DSP when it is ready. HLOS should
  1285. * not treat APR_ENOTREADY as an error.
  1286. */
  1287. if (q6core_lcl.adsp_status != -APR_ENOTREADY) {
  1288. pr_err("%s: DSP returned error %d\n",
  1289. __func__, q6core_lcl.adsp_status);
  1290. ret = q6core_lcl.adsp_status;
  1291. goto done;
  1292. }
  1293. done:
  1294. kfree(mmap_region_cmd);
  1295. return ret;
  1296. }
  1297. static int q6core_dereg_all_custom_topologies(void)
  1298. {
  1299. int ret = 0;
  1300. struct avcs_cmd_deregister_topologies dereg_top;
  1301. memset(&dereg_top, 0, sizeof(dereg_top));
  1302. dereg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1303. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1304. dereg_top.hdr.pkt_size = sizeof(dereg_top);
  1305. dereg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1306. dereg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1307. dereg_top.hdr.src_port = 0;
  1308. dereg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1309. dereg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1310. dereg_top.hdr.dest_port = 0;
  1311. dereg_top.hdr.token = 0;
  1312. dereg_top.hdr.opcode = AVCS_CMD_DEREGISTER_TOPOLOGIES;
  1313. dereg_top.payload_addr_lsw = 0;
  1314. dereg_top.payload_addr_msw = 0;
  1315. dereg_top.mem_map_handle = 0;
  1316. dereg_top.payload_size = 0;
  1317. dereg_top.mode = AVCS_MODE_DEREGISTER_ALL_CUSTOM_TOPOLOGIES;
  1318. q6core_lcl.bus_bw_resp_received = 0;
  1319. pr_debug("%s: Deregister topologies mode %d\n",
  1320. __func__, dereg_top.mode);
  1321. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &dereg_top);
  1322. if (ret < 0) {
  1323. pr_err("%s: Deregister topologies failed %d\n",
  1324. __func__, ret);
  1325. goto done;
  1326. }
  1327. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1328. (q6core_lcl.bus_bw_resp_received == 1),
  1329. msecs_to_jiffies(TIMEOUT_MS));
  1330. if (!ret) {
  1331. pr_err("%s: wait_event timeout for Deregister topologies\n",
  1332. __func__);
  1333. goto done;
  1334. }
  1335. done:
  1336. return ret;
  1337. }
  1338. static int q6core_send_custom_topologies(void)
  1339. {
  1340. int ret = 0;
  1341. int ret2 = 0;
  1342. struct cal_block_data *cal_block = NULL;
  1343. struct avcs_cmd_register_topologies reg_top;
  1344. if (!q6core_is_adsp_ready()) {
  1345. pr_err("%s: ADSP is not ready!\n", __func__);
  1346. return -ENODEV;
  1347. }
  1348. memset(&reg_top, 0, sizeof(reg_top));
  1349. mutex_lock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1350. mutex_lock(&q6core_lcl.cmd_lock);
  1351. cal_block = cal_utils_get_only_cal_block(
  1352. q6core_lcl.cal_data[CUST_TOP_CAL]);
  1353. if (cal_block == NULL) {
  1354. pr_debug("%s: cal block is NULL!\n", __func__);
  1355. goto unlock;
  1356. }
  1357. if (cal_block->cal_data.size <= 0) {
  1358. pr_debug("%s: cal size is %zd not sending\n",
  1359. __func__, cal_block->cal_data.size);
  1360. goto unlock;
  1361. }
  1362. q6core_dereg_all_custom_topologies();
  1363. ret = q6core_map_memory_regions(&cal_block->cal_data.paddr,
  1364. ADSP_MEMORY_MAP_SHMEM8_4K_POOL,
  1365. (uint32_t *)&cal_block->map_data.map_size, 1,
  1366. &cal_block->map_data.q6map_handle);
  1367. if (ret) {
  1368. pr_err("%s: q6core_map_memory_regions failed\n", __func__);
  1369. goto unlock;
  1370. }
  1371. reg_top.hdr.hdr_field = APR_HDR_FIELD(APR_MSG_TYPE_SEQ_CMD,
  1372. APR_HDR_LEN(APR_HDR_SIZE), APR_PKT_VER);
  1373. reg_top.hdr.pkt_size = sizeof(reg_top);
  1374. reg_top.hdr.src_svc = APR_SVC_ADSP_CORE;
  1375. reg_top.hdr.src_domain = APR_DOMAIN_APPS;
  1376. reg_top.hdr.src_port = 0;
  1377. reg_top.hdr.dest_svc = APR_SVC_ADSP_CORE;
  1378. reg_top.hdr.dest_domain = APR_DOMAIN_ADSP;
  1379. reg_top.hdr.dest_port = 0;
  1380. reg_top.hdr.token = 0;
  1381. reg_top.hdr.opcode = AVCS_CMD_REGISTER_TOPOLOGIES;
  1382. reg_top.payload_addr_lsw =
  1383. lower_32_bits(cal_block->cal_data.paddr);
  1384. reg_top.payload_addr_msw =
  1385. msm_audio_populate_upper_32_bits(cal_block->cal_data.paddr);
  1386. reg_top.mem_map_handle = cal_block->map_data.q6map_handle;
  1387. reg_top.payload_size = cal_block->cal_data.size;
  1388. q6core_lcl.adsp_status = 0;
  1389. q6core_lcl.bus_bw_resp_received = 0;
  1390. pr_debug("%s: Register topologies addr %pK, size %zd, map handle %d\n",
  1391. __func__, &cal_block->cal_data.paddr, cal_block->cal_data.size,
  1392. cal_block->map_data.q6map_handle);
  1393. ret = apr_send_pkt(q6core_lcl.core_handle_q, (uint32_t *) &reg_top);
  1394. if (ret < 0) {
  1395. pr_err("%s: Register topologies failed %d\n",
  1396. __func__, ret);
  1397. goto unmap;
  1398. }
  1399. ret = wait_event_timeout(q6core_lcl.bus_bw_req_wait,
  1400. (q6core_lcl.bus_bw_resp_received == 1),
  1401. msecs_to_jiffies(TIMEOUT_MS));
  1402. if (!ret) {
  1403. pr_err("%s: wait_event timeout for Register topologies\n",
  1404. __func__);
  1405. goto unmap;
  1406. }
  1407. if (q6core_lcl.adsp_status < 0)
  1408. ret = q6core_lcl.adsp_status;
  1409. unmap:
  1410. ret2 = q6core_memory_unmap_regions(cal_block->map_data.q6map_handle);
  1411. if (ret2) {
  1412. pr_err("%s: q6core_memory_unmap_regions failed for map handle %d\n",
  1413. __func__, cal_block->map_data.q6map_handle);
  1414. ret = ret2;
  1415. goto unlock;
  1416. }
  1417. unlock:
  1418. mutex_unlock(&q6core_lcl.cmd_lock);
  1419. mutex_unlock(&q6core_lcl.cal_data[CUST_TOP_CAL]->lock);
  1420. return ret;
  1421. }
  1422. static int get_cal_type_index(int32_t cal_type)
  1423. {
  1424. int ret = -EINVAL;
  1425. switch (cal_type) {
  1426. case AUDIO_CORE_METAINFO_CAL_TYPE:
  1427. ret = META_CAL;
  1428. break;
  1429. case CORE_CUSTOM_TOPOLOGIES_CAL_TYPE:
  1430. ret = CUST_TOP_CAL;
  1431. break;
  1432. default:
  1433. pr_err("%s: invalid cal type %d!\n", __func__, cal_type);
  1434. }
  1435. return ret;
  1436. }
  1437. static int q6core_alloc_cal(int32_t cal_type,
  1438. size_t data_size, void *data)
  1439. {
  1440. int ret = 0;
  1441. int cal_index;
  1442. cal_index = get_cal_type_index(cal_type);
  1443. if (cal_index < 0) {
  1444. pr_err("%s: could not get cal index %d!\n",
  1445. __func__, cal_index);
  1446. ret = -EINVAL;
  1447. goto done;
  1448. }
  1449. ret = cal_utils_alloc_cal(data_size, data,
  1450. q6core_lcl.cal_data[cal_index], 0, NULL);
  1451. if (ret < 0) {
  1452. pr_err("%s: cal_utils_alloc_block failed, ret = %d, cal type = %d!\n",
  1453. __func__, ret, cal_type);
  1454. goto done;
  1455. }
  1456. done:
  1457. return ret;
  1458. }
  1459. static int q6core_dealloc_cal(int32_t cal_type,
  1460. size_t data_size, void *data)
  1461. {
  1462. int ret = 0;
  1463. int cal_index;
  1464. cal_index = get_cal_type_index(cal_type);
  1465. if (cal_index < 0) {
  1466. pr_err("%s: could not get cal index %d!\n",
  1467. __func__, cal_index);
  1468. ret = -EINVAL;
  1469. goto done;
  1470. }
  1471. ret = cal_utils_dealloc_cal(data_size, data,
  1472. q6core_lcl.cal_data[cal_index]);
  1473. if (ret < 0) {
  1474. pr_err("%s: cal_utils_dealloc_block failed, ret = %d, cal type = %d!\n",
  1475. __func__, ret, cal_type);
  1476. goto done;
  1477. }
  1478. done:
  1479. return ret;
  1480. }
  1481. static int q6core_set_cal(int32_t cal_type,
  1482. size_t data_size, void *data)
  1483. {
  1484. int ret = 0;
  1485. int cal_index;
  1486. cal_index = get_cal_type_index(cal_type);
  1487. if (cal_index < 0) {
  1488. pr_err("%s: could not get cal index %d!\n",
  1489. __func__, cal_index);
  1490. ret = -EINVAL;
  1491. goto done;
  1492. }
  1493. ret = cal_utils_set_cal(data_size, data,
  1494. q6core_lcl.cal_data[cal_index], 0, NULL);
  1495. if (ret < 0) {
  1496. pr_err("%s: cal_utils_set_cal failed, ret = %d, cal type = %d!\n",
  1497. __func__, ret, cal_type);
  1498. goto done;
  1499. }
  1500. if (cal_index == CUST_TOP_CAL)
  1501. ret = q6core_send_custom_topologies();
  1502. done:
  1503. return ret;
  1504. }
  1505. static void q6core_delete_cal_data(void)
  1506. {
  1507. pr_debug("%s:\n", __func__);
  1508. cal_utils_destroy_cal_types(CORE_MAX_CAL, q6core_lcl.cal_data);
  1509. }
  1510. static int q6core_init_cal_data(void)
  1511. {
  1512. int ret = 0;
  1513. struct cal_type_info cal_type_info[] = {
  1514. {{AUDIO_CORE_METAINFO_CAL_TYPE,
  1515. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1516. q6core_set_cal, NULL, NULL} },
  1517. {NULL, NULL, cal_utils_match_buf_num} },
  1518. {{CORE_CUSTOM_TOPOLOGIES_CAL_TYPE,
  1519. {q6core_alloc_cal, q6core_dealloc_cal, NULL,
  1520. q6core_set_cal, NULL, NULL} },
  1521. {NULL, NULL, cal_utils_match_buf_num} }
  1522. };
  1523. pr_debug("%s:\n", __func__);
  1524. ret = cal_utils_create_cal_types(CORE_MAX_CAL,
  1525. q6core_lcl.cal_data, cal_type_info);
  1526. if (ret < 0) {
  1527. pr_err("%s: could not create cal type!\n",
  1528. __func__);
  1529. goto err;
  1530. }
  1531. return ret;
  1532. err:
  1533. q6core_delete_cal_data();
  1534. return ret;
  1535. }
  1536. static int q6core_is_avs_up(int32_t *avs_state)
  1537. {
  1538. unsigned long timeout;
  1539. int32_t adsp_ready = 0;
  1540. int ret = 0;
  1541. timeout = jiffies +
  1542. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  1543. do {
  1544. adsp_ready = q6core_is_adsp_ready();
  1545. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1546. adsp_ready ? "ready" : "not ready");
  1547. if (adsp_ready)
  1548. break;
  1549. /*
  1550. * ADSP will be coming up after boot up and AVS might
  1551. * not be fully up when the control reaches here.
  1552. * So, wait for 50msec before checking ADSP state again.
  1553. */
  1554. msleep(50);
  1555. } while (time_after(timeout, jiffies));
  1556. *avs_state = adsp_ready;
  1557. pr_debug("%s: ADSP Audio is %s\n", __func__,
  1558. adsp_ready ? "ready" : "not ready");
  1559. if (!adsp_ready) {
  1560. pr_err_ratelimited("%s: Timeout. ADSP Audio is not ready\n",
  1561. __func__);
  1562. ret = -ETIMEDOUT;
  1563. }
  1564. return ret;
  1565. }
  1566. static int q6core_ssr_enable(struct device *dev, void *data)
  1567. {
  1568. int32_t avs_state = 0;
  1569. int ret = 0;
  1570. if (!dev) {
  1571. pr_err("%s: dev is NULL\n", __func__);
  1572. return -EINVAL;
  1573. }
  1574. if (!q6core_lcl.avs_state) {
  1575. ret = q6core_is_avs_up(&avs_state);
  1576. if (ret < 0)
  1577. goto err;
  1578. q6core_lcl.avs_state = avs_state;
  1579. }
  1580. err:
  1581. return ret;
  1582. }
  1583. static void q6core_ssr_disable(struct device *dev, void *data)
  1584. {
  1585. /* Reset AVS state to 0 */
  1586. q6core_lcl.avs_state = 0;
  1587. }
  1588. static const struct snd_event_ops q6core_ssr_ops = {
  1589. .enable = q6core_ssr_enable,
  1590. .disable = q6core_ssr_disable,
  1591. };
  1592. static int q6core_probe(struct platform_device *pdev)
  1593. {
  1594. int32_t avs_state = 0;
  1595. int rc = 0;
  1596. rc = q6core_is_avs_up(&avs_state);
  1597. if (rc < 0)
  1598. goto err;
  1599. q6core_lcl.avs_state = avs_state;
  1600. rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
  1601. if (rc) {
  1602. dev_err(&pdev->dev, "%s: failed to add child nodes, rc=%d\n",
  1603. __func__, rc);
  1604. rc = -EINVAL;
  1605. goto err;
  1606. }
  1607. dev_dbg(&pdev->dev, "%s: added child node\n", __func__);
  1608. rc = snd_event_client_register(&pdev->dev, &q6core_ssr_ops, NULL);
  1609. if (!rc) {
  1610. snd_event_notify(&pdev->dev, SND_EVENT_UP);
  1611. } else {
  1612. dev_err(&pdev->dev,
  1613. "%s: Registration with SND event fwk failed rc = %d\n",
  1614. __func__, rc);
  1615. rc = 0;
  1616. }
  1617. err:
  1618. return rc;
  1619. }
  1620. static int q6core_remove(struct platform_device *pdev)
  1621. {
  1622. snd_event_client_deregister(&pdev->dev);
  1623. of_platform_depopulate(&pdev->dev);
  1624. return 0;
  1625. }
  1626. static const struct of_device_id q6core_of_match[] = {
  1627. { .compatible = "qcom,q6core-audio", },
  1628. {},
  1629. };
  1630. static struct platform_driver q6core_driver = {
  1631. .probe = q6core_probe,
  1632. .remove = q6core_remove,
  1633. .driver = {
  1634. .name = "q6core_audio",
  1635. .owner = THIS_MODULE,
  1636. .of_match_table = q6core_of_match,
  1637. }
  1638. };
  1639. int __init core_init(void)
  1640. {
  1641. memset(&q6core_lcl, 0, sizeof(struct q6core_str));
  1642. init_waitqueue_head(&q6core_lcl.bus_bw_req_wait);
  1643. init_waitqueue_head(&q6core_lcl.cmd_req_wait);
  1644. init_waitqueue_head(&q6core_lcl.avcs_fwk_ver_req_wait);
  1645. init_waitqueue_head(&q6core_lcl.mdf_map_resp_wait);
  1646. init_waitqueue_head(&q6core_lcl.lpass_npa_rsc_wait);
  1647. q6core_lcl.cmd_resp_received_flag = FLAG_NONE;
  1648. mutex_init(&q6core_lcl.cmd_lock);
  1649. mutex_init(&q6core_lcl.ver_lock);
  1650. q6core_init_cal_data();
  1651. q6core_init_uevent_kset();
  1652. return platform_driver_register(&q6core_driver);
  1653. }
  1654. void core_exit(void)
  1655. {
  1656. mutex_destroy(&q6core_lcl.cmd_lock);
  1657. mutex_destroy(&q6core_lcl.ver_lock);
  1658. q6core_delete_cal_data();
  1659. q6core_destroy_uevent_kset();
  1660. platform_driver_unregister(&q6core_driver);
  1661. }
  1662. MODULE_DESCRIPTION("ADSP core driver");
  1663. MODULE_LICENSE("GPL v2");